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authorMichal Hanus <mikehanus@protonmail.com>2025-04-14 22:04:32 +0200
committerMichal Hanus <mikehanus@protonmail.com>2025-04-14 22:04:32 +0200
commit2e13c372f1419f08dab7797b244681f889dd9bcf (patch)
tree995a31c40f13068c4135c213e938e0a2a9ed05a3 /nrfdemo/build/mcuboot/zephyr/zephyr.dts
parent620dfd94019f3c7e3022fa5a5fb9c9b51491062d (diff)
nrfdemo
Diffstat (limited to 'nrfdemo/build/mcuboot/zephyr/zephyr.dts')
-rw-r--r--nrfdemo/build/mcuboot/zephyr/zephyr.dts642
1 files changed, 642 insertions, 0 deletions
diff --git a/nrfdemo/build/mcuboot/zephyr/zephyr.dts b/nrfdemo/build/mcuboot/zephyr/zephyr.dts
new file mode 100644
index 0000000..ae59382
--- /dev/null
+++ b/nrfdemo/build/mcuboot/zephyr/zephyr.dts
@@ -0,0 +1,642 @@
+/dts-v1/;
+
+/ {
+ #address-cells = < 0x1 >;
+ #size-cells = < 0x1 >;
+ model = "Conexio Stratus Pro";
+ compatible = "conexio,stratus_pro";
+ chosen {
+ zephyr,entropy = &cryptocell;
+ zephyr,flash-controller = &flash_controller;
+ zephyr,console = &uart0;
+ zephyr,shell-uart = &uart0;
+ zephyr,uart-mcumgr = &uart0;
+ zephyr,sram = &sram0_s;
+ zephyr,flash = &flash0;
+ zephyr,code-partition = &boot_partition;
+ zephyr,sram-secure-partition = &sram0_s;
+ zephyr,sram-non-secure-partition = &sram0_ns;
+ };
+ aliases {
+ led0 = &led0;
+ pwm-led0 = &pwm_led0;
+ sw0 = &button0;
+ bootloader-led0 = &led0;
+ mcuboot-button0 = &button0;
+ mcuboot-led0 = &led0;
+ watchdog0 = &wdt0;
+ };
+ soc {
+ #address-cells = < 0x1 >;
+ #size-cells = < 0x1 >;
+ compatible = "nordic,nrf9151-laca", "nordic,nrf9120", "nordic,nrf91", "simple-bus";
+ interrupt-parent = < &nvic >;
+ ranges;
+ nvic: interrupt-controller@e000e100 {
+ #address-cells = < 0x1 >;
+ compatible = "arm,v8m-nvic";
+ reg = < 0xe000e100 0xc00 >;
+ interrupt-controller;
+ #interrupt-cells = < 0x2 >;
+ arm,num-irq-priority-bits = < 0x3 >;
+ phandle = < 0x1 >;
+ };
+ systick: timer@e000e010 {
+ compatible = "arm,armv8m-systick";
+ reg = < 0xe000e010 0x10 >;
+ status = "disabled";
+ };
+ sram0: memory@20000000 {
+ compatible = "mmio-sram";
+ reg = < 0x20000000 0x40000 >;
+ };
+ peripheral@50000000 {
+ #address-cells = < 0x1 >;
+ #size-cells = < 0x1 >;
+ ranges = < 0x0 0x50000000 0x10000000 >;
+ flash_controller: flash-controller@39000 {
+ compatible = "nordic,nrf91-flash-controller";
+ reg = < 0x39000 0x1000 >;
+ partial-erase;
+ #address-cells = < 0x1 >;
+ #size-cells = < 0x1 >;
+ flash0: flash@0 {
+ compatible = "soc-nv-flash";
+ erase-block-size = < 0x1000 >;
+ write-block-size = < 0x4 >;
+ reg = < 0x0 0x100000 >;
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = < 0x1 >;
+ #size-cells = < 0x1 >;
+ boot_partition: partition@0 {
+ label = "mcuboot";
+ reg = < 0x0 0x10000 >;
+ };
+ slot0_partition: partition@10000 {
+ label = "image-0";
+ reg = < 0x10000 0x40000 >;
+ };
+ slot0_ns_partition: partition@50000 {
+ label = "image-0-nonsecure";
+ reg = < 0x50000 0x30000 >;
+ };
+ slot1_partition: partition@80000 {
+ label = "image-1";
+ reg = < 0x80000 0x40000 >;
+ };
+ slot1_ns_partition: partition@c0000 {
+ label = "image-1-nonsecure";
+ reg = < 0xc0000 0x30000 >;
+ };
+ scratch_partition: partition@f0000 {
+ label = "image-scratch";
+ reg = < 0xf0000 0xa000 >;
+ };
+ storage_partition: partition@fa000 {
+ label = "storage";
+ reg = < 0xfa000 0x6000 >;
+ };
+ };
+ };
+ };
+ adc: adc@e000 {
+ compatible = "nordic,nrf-saadc";
+ reg = < 0xe000 0x1000 >;
+ interrupts = < 0xe 0x1 >;
+ status = "okay";
+ #io-channel-cells = < 0x1 >;
+ };
+ dppic: dppic@17000 {
+ compatible = "nordic,nrf-dppic";
+ reg = < 0x17000 0x1000 >;
+ status = "okay";
+ };
+ egu0: egu@1b000 {
+ compatible = "nordic,nrf-egu";
+ reg = < 0x1b000 0x1000 >;
+ interrupts = < 0x1b 0x1 >;
+ status = "okay";
+ };
+ egu1: egu@1c000 {
+ compatible = "nordic,nrf-egu";
+ reg = < 0x1c000 0x1000 >;
+ interrupts = < 0x1c 0x1 >;
+ status = "okay";
+ };
+ egu2: egu@1d000 {
+ compatible = "nordic,nrf-egu";
+ reg = < 0x1d000 0x1000 >;
+ interrupts = < 0x1d 0x1 >;
+ status = "okay";
+ };
+ egu3: egu@1e000 {
+ compatible = "nordic,nrf-egu";
+ reg = < 0x1e000 0x1000 >;
+ interrupts = < 0x1e 0x1 >;
+ status = "okay";
+ };
+ egu4: egu@1f000 {
+ compatible = "nordic,nrf-egu";
+ reg = < 0x1f000 0x1000 >;
+ interrupts = < 0x1f 0x1 >;
+ status = "okay";
+ };
+ egu5: egu@20000 {
+ compatible = "nordic,nrf-egu";
+ reg = < 0x20000 0x1000 >;
+ interrupts = < 0x20 0x1 >;
+ status = "okay";
+ };
+ ipc: ipc@2a000 {
+ compatible = "nordic,nrf-ipc";
+ reg = < 0x2a000 0x1000 >;
+ interrupts = < 0x2a 0x1 >;
+ status = "okay";
+ };
+ i2s0: i2s@28000 {
+ compatible = "nordic,nrf-i2s";
+ #address-cells = < 0x1 >;
+ #size-cells = < 0x0 >;
+ reg = < 0x28000 0x1000 >;
+ interrupts = < 0x28 0x1 >;
+ status = "disabled";
+ };
+ kmu: kmu@39000 {
+ compatible = "nordic,nrf-kmu";
+ reg = < 0x39000 0x1000 >;
+ interrupts = < 0x39 0x1 >;
+ status = "okay";
+ };
+ pdm0: pdm@26000 {
+ compatible = "nordic,nrf-pdm";
+ reg = < 0x26000 0x1000 >;
+ interrupts = < 0x26 0x1 >;
+ status = "disabled";
+ };
+ regulators: regulator@4000 {
+ compatible = "nordic,nrf-regulators";
+ reg = < 0x4000 0x1000 >;
+ status = "okay";
+ };
+ vmc: vmc@3a000 {
+ compatible = "nordic,nrf-vmc";
+ reg = < 0x3a000 0x1000 >;
+ status = "okay";
+ };
+ uart0: uart@8000 {
+ compatible = "nordic,nrf-uarte";
+ reg = < 0x8000 0x1000 >;
+ interrupts = < 0x8 0x1 >;
+ status = "okay";
+ current-speed = < 0x1c200 >;
+ pinctrl-0 = < &uart0_default >;
+ pinctrl-1 = < &uart0_sleep >;
+ pinctrl-names = "default", "sleep";
+ };
+ uart1: uart@9000 {
+ compatible = "nordic,nrf-uarte";
+ reg = < 0x9000 0x1000 >;
+ interrupts = < 0x9 0x1 >;
+ status = "disabled";
+ };
+ uart2: uart@a000 {
+ compatible = "nordic,nrf-uarte";
+ reg = < 0xa000 0x1000 >;
+ interrupts = < 0xa 0x1 >;
+ status = "disabled";
+ };
+ uart3: uart@b000 {
+ compatible = "nordic,nrf-uarte";
+ reg = < 0xb000 0x1000 >;
+ interrupts = < 0xb 0x1 >;
+ status = "disabled";
+ };
+ i2c0: i2c@8000 {
+ compatible = "nordic,nrf-twim";
+ #address-cells = < 0x1 >;
+ #size-cells = < 0x0 >;
+ reg = < 0x8000 0x1000 >;
+ clock-frequency = < 0x186a0 >;
+ interrupts = < 0x8 0x1 >;
+ easydma-maxcnt-bits = < 0xd >;
+ status = "disabled";
+ };
+ i2c1: i2c@9000 {
+ compatible = "nordic,nrf-twim";
+ #address-cells = < 0x1 >;
+ #size-cells = < 0x0 >;
+ reg = < 0x9000 0x1000 >;
+ clock-frequency = < 0x186a0 >;
+ interrupts = < 0x9 0x1 >;
+ easydma-maxcnt-bits = < 0xd >;
+ status = "disabled";
+ };
+ i2c2: i2c@a000 {
+ compatible = "nordic,nrf-twim";
+ #address-cells = < 0x1 >;
+ #size-cells = < 0x0 >;
+ reg = < 0xa000 0x1000 >;
+ clock-frequency = < 0x61a80 >;
+ interrupts = < 0xa 0x1 >;
+ easydma-maxcnt-bits = < 0xd >;
+ status = "okay";
+ pinctrl-0 = < &i2c2_default >;
+ pinctrl-1 = < &i2c2_sleep >;
+ pinctrl-names = "default", "sleep";
+ pmic_main: npm1300@6b {
+ compatible = "nordic,npm1300";
+ reg = < 0x6b >;
+ pmic_charger: charger {
+ compatible = "nordic,npm1300-charger";
+ term-microvolt = < 0x3f52f0 >;
+ term-warm-microvolt = < 0x3d0900 >;
+ current-microamp = < 0xc3500 >;
+ dischg-limit-microamp = < 0xf4240 >;
+ vbus-limit-microamp = < 0xf4240 >;
+ thermistor-ohms = < 0x2710 >;
+ thermistor-beta = < 0xd34 >;
+ charging-enable;
+ };
+ regulators {
+ compatible = "nordic,npm1300-regulator";
+ reg_1v8: BUCK1 {
+ regulator-min-microvolt = < 0x1b7740 >;
+ regulator-max-microvolt = < 0x1b7740 >;
+ regulator-boot-on;
+ };
+ reg_3v3: BUCK2 {
+ regulator-min-microvolt = < 0x325aa0 >;
+ regulator-max-microvolt = < 0x325aa0 >;
+ regulator-boot-on;
+ };
+ };
+ };
+ lis2dh: lis2dh@18 {
+ compatible = "st,lis2dh";
+ reg = < 0x18 >;
+ irq-gpios = < &gpio0 0x1d 0x0 >;
+ disconnect-sdo-sa0-pull-up;
+ };
+ eeprom0: eeprom@50 {
+ compatible = "atmel,at24";
+ reg = < 0x50 >;
+ size = < 0x800 >;
+ pagesize = < 0x20 >;
+ address-width = < 0x10 >;
+ timeout = < 0x5 >;
+ };
+ };
+ i2c3: i2c@b000 {
+ compatible = "nordic,nrf-twim";
+ #address-cells = < 0x1 >;
+ #size-cells = < 0x0 >;
+ reg = < 0xb000 0x1000 >;
+ clock-frequency = < 0x186a0 >;
+ interrupts = < 0xb 0x1 >;
+ easydma-maxcnt-bits = < 0xd >;
+ status = "disabled";
+ };
+ spi0: spi@8000 {
+ compatible = "nordic,nrf-spim";
+ #address-cells = < 0x1 >;
+ #size-cells = < 0x0 >;
+ reg = < 0x8000 0x1000 >;
+ interrupts = < 0x8 0x1 >;
+ max-frequency = < 0x7a1200 >;
+ easydma-maxcnt-bits = < 0xd >;
+ status = "disabled";
+ };
+ spi1: spi@9000 {
+ compatible = "nordic,nrf-spim";
+ #address-cells = < 0x1 >;
+ #size-cells = < 0x0 >;
+ reg = < 0x9000 0x1000 >;
+ interrupts = < 0x9 0x1 >;
+ max-frequency = < 0x7a1200 >;
+ easydma-maxcnt-bits = < 0xd >;
+ status = "disabled";
+ };
+ spi2: spi@a000 {
+ compatible = "nordic,nrf-spim";
+ #address-cells = < 0x1 >;
+ #size-cells = < 0x0 >;
+ reg = < 0xa000 0x1000 >;
+ interrupts = < 0xa 0x1 >;
+ max-frequency = < 0x7a1200 >;
+ easydma-maxcnt-bits = < 0xd >;
+ status = "disabled";
+ };
+ spi3: edge_connector_spi: spi@b000 {
+ compatible = "nordic,nrf-spim";
+ #address-cells = < 0x1 >;
+ #size-cells = < 0x0 >;
+ reg = < 0xb000 0x1000 >;
+ interrupts = < 0xb 0x1 >;
+ max-frequency = < 0x7a1200 >;
+ easydma-maxcnt-bits = < 0xd >;
+ status = "disabled";
+ cs-gpios = < &gpio0 0x11 0x1 >;
+ pinctrl-0 = < &spi3_default >;
+ pinctrl-1 = < &spi3_sleep >;
+ pinctrl-names = "default", "sleep";
+ };
+ pwm0: pwm@21000 {
+ compatible = "nordic,nrf-pwm";
+ reg = < 0x21000 0x1000 >;
+ interrupts = < 0x21 0x1 >;
+ status = "okay";
+ #pwm-cells = < 0x3 >;
+ pinctrl-0 = < &pwm0_default >;
+ pinctrl-1 = < &pwm0_sleep >;
+ pinctrl-names = "default", "sleep";
+ phandle = < 0xd >;
+ };
+ pwm1: pwm@22000 {
+ compatible = "nordic,nrf-pwm";
+ reg = < 0x22000 0x1000 >;
+ interrupts = < 0x22 0x1 >;
+ status = "disabled";
+ #pwm-cells = < 0x3 >;
+ };
+ pwm2: pwm@23000 {
+ compatible = "nordic,nrf-pwm";
+ reg = < 0x23000 0x1000 >;
+ interrupts = < 0x23 0x1 >;
+ status = "disabled";
+ #pwm-cells = < 0x3 >;
+ };
+ pwm3: pwm@24000 {
+ compatible = "nordic,nrf-pwm";
+ reg = < 0x24000 0x1000 >;
+ interrupts = < 0x24 0x1 >;
+ status = "disabled";
+ #pwm-cells = < 0x3 >;
+ };
+ gpio0: gpio@842500 {
+ compatible = "nordic,nrf-gpio";
+ gpio-controller;
+ reg = < 0x842500 0x300 >;
+ #gpio-cells = < 0x2 >;
+ status = "okay";
+ port = < 0x0 >;
+ gpiote-instance = < &gpiote >;
+ phandle = < 0x6 >;
+ };
+ rtc0: rtc@14000 {
+ compatible = "nordic,nrf-rtc";
+ reg = < 0x14000 0x1000 >;
+ cc-num = < 0x4 >;
+ interrupts = < 0x14 0x1 >;
+ status = "disabled";
+ clock-frequency = < 0x8000 >;
+ prescaler = < 0x1 >;
+ };
+ rtc1: rtc@15000 {
+ compatible = "nordic,nrf-rtc";
+ reg = < 0x15000 0x1000 >;
+ cc-num = < 0x4 >;
+ interrupts = < 0x15 0x1 >;
+ status = "disabled";
+ clock-frequency = < 0x8000 >;
+ prescaler = < 0x1 >;
+ };
+ clock: clock@5000 {
+ compatible = "nordic,nrf-clock";
+ reg = < 0x5000 0x1000 >;
+ interrupts = < 0x5 0x1 >;
+ status = "okay";
+ };
+ power: power@5000 {
+ compatible = "nordic,nrf-power";
+ reg = < 0x5000 0x1000 >;
+ ranges = < 0x0 0x5000 0x1000 >;
+ interrupts = < 0x5 0x1 >;
+ status = "okay";
+ #address-cells = < 0x1 >;
+ #size-cells = < 0x1 >;
+ gpregret1: gpregret1@51c {
+ #address-cells = < 0x1 >;
+ #size-cells = < 0x1 >;
+ compatible = "nordic,nrf-gpregret";
+ reg = < 0x51c 0x1 >;
+ status = "okay";
+ };
+ gpregret2: gpregret2@520 {
+ #address-cells = < 0x1 >;
+ #size-cells = < 0x1 >;
+ compatible = "nordic,nrf-gpregret";
+ reg = < 0x520 0x1 >;
+ status = "okay";
+ };
+ };
+ wdt: wdt0: watchdog@18000 {
+ compatible = "nordic,nrf-wdt";
+ reg = < 0x18000 0x1000 >;
+ interrupts = < 0x18 0x1 >;
+ status = "okay";
+ };
+ timer0: timer@f000 {
+ compatible = "nordic,nrf-timer";
+ status = "disabled";
+ reg = < 0xf000 0x1000 >;
+ cc-num = < 0x6 >;
+ max-bit-width = < 0x20 >;
+ interrupts = < 0xf 0x1 >;
+ prescaler = < 0x0 >;
+ };
+ timer1: timer@10000 {
+ compatible = "nordic,nrf-timer";
+ status = "disabled";
+ reg = < 0x10000 0x1000 >;
+ cc-num = < 0x6 >;
+ max-bit-width = < 0x20 >;
+ interrupts = < 0x10 0x1 >;
+ prescaler = < 0x0 >;
+ phandle = < 0xc >;
+ };
+ timer2: timer@11000 {
+ compatible = "nordic,nrf-timer";
+ status = "disabled";
+ reg = < 0x11000 0x1000 >;
+ cc-num = < 0x6 >;
+ max-bit-width = < 0x20 >;
+ interrupts = < 0x11 0x1 >;
+ prescaler = < 0x0 >;
+ };
+ };
+ cryptocell: crypto@50840000 {
+ compatible = "nordic,cryptocell", "arm,cryptocell-310";
+ reg = < 0x50840000 0x1000 >, < 0x50841000 0x1000 >;
+ reg-names = "wrapper", "core";
+ interrupts = < 0x40 0x1 >;
+ status = "okay";
+ };
+ ctrlap: ctrlap@50006000 {
+ compatible = "nordic,nrf-ctrlapperi";
+ reg = < 0x50006000 0x1000 >;
+ status = "okay";
+ };
+ gpiote: gpiote0: gpiote@5000d000 {
+ compatible = "nordic,nrf-gpiote";
+ reg = < 0x5000d000 0x1000 >;
+ interrupts = < 0xd 0x5 >;
+ status = "okay";
+ instance = < 0x0 >;
+ phandle = < 0xb >;
+ };
+ gpiote1: gpiote@40031000 {
+ compatible = "nordic,nrf-gpiote";
+ reg = < 0x40031000 0x1000 >;
+ interrupts = < 0x31 0x5 >;
+ status = "disabled";
+ instance = < 0x1 >;
+ };
+ spu: spu@50003000 {
+ compatible = "nordic,nrf-spu";
+ reg = < 0x50003000 0x1000 >;
+ interrupts = < 0x3 0x1 >;
+ status = "okay";
+ };
+ ficr: ficr@ff0000 {
+ compatible = "nordic,nrf-ficr";
+ reg = < 0xff0000 0x1000 >;
+ #nordic,ficr-cells = < 0x1 >;
+ status = "okay";
+ };
+ uicr: uicr@ff8000 {
+ compatible = "nordic,nrf-uicr";
+ reg = < 0xff8000 0x1000 >;
+ status = "okay";
+ };
+ };
+ pinctrl: pin-controller {
+ compatible = "nordic,nrf-pinctrl";
+ uart0_default: uart0_default {
+ phandle = < 0x2 >;
+ group1 {
+ psels = < 0x1c >, < 0x2001b >;
+ };
+ };
+ uart0_sleep: uart0_sleep {
+ phandle = < 0x3 >;
+ group1 {
+ psels = < 0x1c >, < 0x2001b >;
+ low-power-enable;
+ };
+ };
+ i2c2_default: i2c2_default {
+ phandle = < 0x4 >;
+ group1 {
+ psels = < 0x180008 >, < 0x160007 >;
+ };
+ };
+ i2c2_sleep: i2c2_sleep {
+ phandle = < 0x5 >;
+ group1 {
+ psels = < 0x180008 >, < 0x160007 >;
+ low-power-enable;
+ };
+ };
+ pwm0_default: pwm0_default {
+ phandle = < 0x9 >;
+ group1 {
+ psels = < 0x2c0019 >;
+ };
+ };
+ pwm0_sleep: pwm0_sleep {
+ phandle = < 0xa >;
+ group1 {
+ psels = < 0x2c0019 >;
+ low-power-enable;
+ };
+ };
+ spi3_default: spi3_default {
+ phandle = < 0x7 >;
+ group1 {
+ psels = < 0x8000d >, < 0xa000e >, < 0xc000f >;
+ };
+ };
+ spi3_sleep: spi3_sleep {
+ phandle = < 0x8 >;
+ group1 {
+ psels = < 0x8000d >, < 0xa000e >, < 0xc000f >;
+ low-power-enable;
+ };
+ };
+ };
+ rng_hci: entropy_bt_hci {
+ compatible = "zephyr,bt-hci-entropy";
+ status = "okay";
+ };
+ sw_pwm: sw-pwm {
+ compatible = "nordic,nrf-sw-pwm";
+ status = "disabled";
+ generator = < &timer1 >;
+ clock-prescaler = < 0x0 >;
+ #pwm-cells = < 0x3 >;
+ };
+ cpus {
+ #address-cells = < 0x1 >;
+ #size-cells = < 0x0 >;
+ cpu@0 {
+ device_type = "cpu";
+ compatible = "arm,cortex-m33f";
+ reg = < 0x0 >;
+ #address-cells = < 0x1 >;
+ #size-cells = < 0x1 >;
+ mpu: mpu@e000ed90 {
+ compatible = "arm,armv8m-mpu";
+ reg = < 0xe000ed90 0x40 >;
+ };
+ };
+ };
+ leds {
+ compatible = "gpio-leds";
+ led0: led_0 {
+ gpios = < &gpio0 0x19 0x0 >;
+ label = "LED";
+ };
+ };
+ pwmleds {
+ compatible = "pwm-leds";
+ pwm_led0: pwm_led_0 {
+ pwms = < &pwm0 0x0 0x1312d00 0x0 >;
+ };
+ };
+ buttons {
+ compatible = "gpio-keys";
+ button0: button_0 {
+ gpios = < &gpio0 0x1f 0x11 >;
+ label = "Mode button";
+ zephyr,code = < 0xb >;
+ };
+ };
+ stratus_header: connector {
+ compatible = "conexio-stratus-header";
+ #gpio-cells = < 0x2 >;
+ gpio-map-mask = < 0xffffffff 0xffffffc0 >;
+ gpio-map-pass-thru = < 0x0 0x3f >;
+ gpio-map = < 0x0 0x0 &gpio0 0x0 0x0 >, < 0x1 0x0 &gpio0 0x1 0x0 >, < 0x2 0x0 &gpio0 0x2 0x0 >, < 0x3 0x0 &gpio0 0x3 0x0 >, < 0x4 0x0 &gpio0 0x4 0x0 >, < 0x5 0x0 &gpio0 0x5 0x0 >, < 0x6 0x0 &gpio0 0x6 0x0 >, < 0x7 0x0 &gpio0 0x7 0x0 >, < 0x8 0x0 &gpio0 0x8 0x0 >, < 0x9 0x0 &gpio0 0x9 0x0 >, < 0xa 0x0 &gpio0 0xa 0x0 >, < 0xb 0x0 &gpio0 0xb 0x0 >, < 0xc 0x0 &gpio0 0xc 0x0 >, < 0xd 0x0 &gpio0 0xd 0x0 >, < 0xe 0x0 &gpio0 0xe 0x0 >, < 0xf 0x0 &gpio0 0xf 0x0 >, < 0x10 0x0 &gpio0 0x10 0x0 >, < 0x11 0x0 &gpio0 0x11 0x0 >, < 0x12 0x0 &gpio0 0x12 0x0 >, < 0x13 0x0 &gpio0 0x13 0x0 >, < 0x14 0x0 &gpio0 0x14 0x0 >, < 0x15 0x0 &gpio0 0x15 0x0 >, < 0x16 0x0 &gpio0 0x16 0x0 >, < 0x17 0x0 &gpio0 0x17 0x0 >, < 0x18 0x0 &gpio0 0x18 0x0 >, < 0x1a 0x0 &gpio0 0x1a 0x0 >, < 0x1b 0x0 &gpio0 0x1b 0x0 >, < 0x1c 0x0 &gpio0 0x1c 0x0 >;
+ };
+ sensor-pwr-ctrl {
+ compatible = "regulator-fixed";
+ regulator-name = "sensor-power";
+ enable-gpios = < &gpio0 0x1a 0x0 >;
+ regulator-boot-on;
+ };
+ reserved-memory {
+ #address-cells = < 0x1 >;
+ #size-cells = < 0x1 >;
+ ranges;
+ sram0_s: image_s@20000000 {
+ reg = < 0x20000000 0x16000 >;
+ };
+ sram0_modem: image_modem@20016000 {
+ reg = < 0x20016000 0xa000 >;
+ };
+ sram0_ns: image_ns@20020000 {
+ reg = < 0x20020000 0x20000 >;
+ };
+ };
+};