diff options
Diffstat (limited to 'nrfdemo/build/mcuboot/zephyr')
539 files changed, 64796 insertions, 0 deletions
diff --git a/nrfdemo/build/mcuboot/zephyr/.cmake.dotconfig.checksum b/nrfdemo/build/mcuboot/zephyr/.cmake.dotconfig.checksum new file mode 100644 index 0000000..75e30c9 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/.cmake.dotconfig.checksum @@ -0,0 +1 @@ +4f68ffe9b195a1d8afae35d2ca7b36231b4b7e0411d6f9c7cbaa5ba5f0cd5e9b1e0d5bc1c8a4ab037e9cddd6d8fee6ac5022dafd86cafd9bec99e8766e919235f6a3149735b8ecc90eaedb8590745d0472bcd29391f889eaf622c98ceffabcd9
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/.config b/nrfdemo/build/mcuboot/zephyr/.config new file mode 100644 index 0000000..eed8e8a --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/.config @@ -0,0 +1,2207 @@ + +# +# MCUboot-specific configuration options +# +# CONFIG_BOOT_USE_MIN_PARTITION_SIZE is not set +CONFIG_PM_PARTITION_SIZE_MCUBOOT_SCRATCH=0x1e000 +CONFIG_PM_PARTITION_SIZE_MCUBOOT_PAD=0x200 +CONFIG_PM_PARTITION_SIZE_MCUBOOT=0xc000 +CONFIG_BOOT_USE_NRF_CC310_BL=y +CONFIG_MCUBOOT_NRF_CLEANUP_PERIPHERAL=y +# CONFIG_MCUBOOT_NRF_CLEANUP_NONSECURE_RAM is not set +CONFIG_BOOT_SIGNATURE_KEY_FILE="root-ec-p256.pem" +# CONFIG_BOOT_NRF_EXTERNAL_CRYPTO is not set +CONFIG_BOOT_ERASE_PROGRESSIVELY=y +# CONFIG_BOOT_IMAGE_ACCESS_HOOKS is not set +# CONFIG_MCUBOOT_CLEANUP_UNUSABLE_SECONDARY is not set +CONFIG_MCUBOOT=y +CONFIG_BOOT_USE_CC310=y +CONFIG_NRFXLIB_CRYPTO=y +CONFIG_NRF_CC310_BL=y + +# +# MCUBoot settings +# +# CONFIG_SINGLE_APPLICATION_SLOT is not set +# CONFIG_BOOT_SIGNATURE_TYPE_NONE is not set +# CONFIG_BOOT_SIGNATURE_TYPE_RSA is not set +CONFIG_BOOT_SIGNATURE_TYPE_ECDSA_P256=y +# CONFIG_BOOT_ECDSA_TINYCRYPT is not set +CONFIG_BOOT_ECDSA_CC310=y +# CONFIG_BOOT_SIGNATURE_TYPE_ED25519 is not set +CONFIG_MCUBOOT_CLEANUP_ARM_CORE=y +CONFIG_MBEDTLS_CFG_FILE="mcuboot-mbedtls-cfg.h" +# CONFIG_BOOT_HW_KEY is not set +CONFIG_BOOT_VALIDATE_SLOT0=y +CONFIG_BOOT_PREFER_SWAP_MOVE=y +# CONFIG_BOOT_SWAP_USING_SCRATCH is not set +# CONFIG_BOOT_UPGRADE_ONLY is not set +CONFIG_BOOT_SWAP_USING_MOVE=y +# CONFIG_BOOT_DIRECT_XIP is not set +# CONFIG_BOOT_RAM_LOAD is not set +# CONFIG_BOOT_FIRMWARE_LOADER is not set +# CONFIG_BOOT_BOOTSTRAP is not set +CONFIG_BOOT_ENCRYPTION_SUPPORT=y +# CONFIG_BOOT_ENCRYPT_IMAGE is not set +CONFIG_BOOT_MAX_IMG_SECTORS=128 +CONFIG_BOOT_SHARE_BACKEND_DISABLED=y +# CONFIG_BOOT_SHARE_BACKEND_EXTERNAL is not set +# CONFIG_BOOT_FIH_PROFILE_OFF is not set +CONFIG_BOOT_FIH_PROFILE_LOW=y +# CONFIG_BOOT_FIH_PROFILE_MEDIUM is not set +# CONFIG_BOOT_FIH_PROFILE_HIGH is not set +CONFIG_BOOT_USB_DFU_NO=y +# CONFIG_BOOT_USB_DFU_WAIT is not set +# CONFIG_BOOT_USB_DFU_GPIO is not set +# CONFIG_BOOT_USE_BENCH is not set +# CONFIG_MCUBOOT_LOG_LEVEL_OFF is not set +# CONFIG_MCUBOOT_LOG_LEVEL_ERR is not set +# CONFIG_MCUBOOT_LOG_LEVEL_WRN is not set +CONFIG_MCUBOOT_LOG_LEVEL_INF=y +# CONFIG_MCUBOOT_LOG_LEVEL_DBG is not set +# CONFIG_MCUBOOT_LOG_LEVEL_DEFAULT is not set +CONFIG_MCUBOOT_LOG_LEVEL=3 +CONFIG_MCUBOOT_LOG_THREAD_STACK_SIZE=768 +# CONFIG_MCUBOOT_INDICATION_LED is not set +# CONFIG_MCUBOOT_SERIAL is not set +# CONFIG_BOOT_INTR_VEC_RELOC is not set +CONFIG_UPDATEABLE_IMAGE_NUMBER=1 +CONFIG_BOOT_WATCHDOG_FEED=y +# CONFIG_MCUBOOT_ACTION_HOOKS is not set +# end of MCUBoot settings + +CONFIG_MCUBOOT_DEVICE_SETTINGS=y + +# +# Zephyr configuration options +# +# CONFIG_MULTITHREADING is not set +CONFIG_USB_DEVICE_PRODUCT="MCUBOOT" +# CONFIG_INPUT is not set +# CONFIG_WIFI is not set +# CONFIG_MIPI_DSI is not set +# CONFIG_MODEM is not set +# CONFIG_UART_INTERRUPT_DRIVEN is not set +# CONFIG_SPI is not set +CONFIG_FLASH_LOAD_SIZE=0x10000 +CONFIG_FLASH_LOAD_OFFSET=0x0 +CONFIG_NUM_IRQS=65 +CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=32768 +CONFIG_FLASH_SIZE=1024 +CONFIG_FLASH_BASE_ADDRESS=0x0 +CONFIG_MP_MAX_NUM_CPUS=1 +CONFIG_PLATFORM_SPECIFIC_INIT=y +CONFIG_SYS_CLOCK_TICKS_PER_SEC=32768 +CONFIG_ROM_START_OFFSET=0 +CONFIG_PINCTRL=y +CONFIG_BUILD_OUTPUT_BIN=y +CONFIG_XIP=y +CONFIG_MAIN_STACK_SIZE=10240 +CONFIG_IDLE_STACK_SIZE=320 +CONFIG_HAS_FLASH_LOAD_OFFSET=y +# CONFIG_SRAM_VECTOR_TABLE is not set +CONFIG_CPU_HAS_ARM_MPU=y +# CONFIG_COUNTER is not set +# CONFIG_SHARED_INTERRUPTS is not set +# CONFIG_PM_DEVICE is not set +CONFIG_TICKLESS_KERNEL=y +CONFIG_CLOCK_CONTROL_INIT_PRIORITY=30 +CONFIG_USE_DT_CODE_PARTITION=y +CONFIG_FPU=y +CONFIG_HW_STACK_PROTECTION=y +# CONFIG_CODE_DATA_RELOCATION_SRAM is not set +CONFIG_SERIAL_INIT_PRIORITY=50 +CONFIG_GPIO=y +CONFIG_SERIAL=y +# CONFIG_CPU_HAS_CUSTOM_FIXED_SOC_MPU_REGIONS is not set +# CONFIG_TINYCRYPT is not set +# CONFIG_MBEDTLS is not set +# CONFIG_MEMC is not set +CONFIG_KERNEL_ENTRY="__start" +# CONFIG_MULTI_LEVEL_INTERRUPTS is not set +# CONFIG_DYNAMIC_INTERRUPTS is not set +# CONFIG_CACHE is not set +CONFIG_LOG=y +# CONFIG_CODE_DATA_RELOCATION is not set +CONFIG_SYSTEM_WORKQUEUE_STACK_SIZE=1024 +CONFIG_DCACHE_LINE_SIZE=32 +CONFIG_GEN_IRQ_VECTOR_TABLE=y +CONFIG_SOC="nrf9151" +# CONFIG_RESET is not set +CONFIG_ARCH_SW_ISR_TABLE_ALIGN=4 +CONFIG_NRF_RTC_TIMER=y +CONFIG_LOG_DOMAIN_NAME="" +CONFIG_BUILD_OUTPUT_HEX=y +CONFIG_CLOCK_CONTROL=y +CONFIG_ARCH_HAS_CUSTOM_BUSY_WAIT=y +CONFIG_SOC_HAS_TIMING_FUNCTIONS=y +# CONFIG_UART_USE_RUNTIME_CONFIGURE is not set +# CONFIG_SYSCON is not set +CONFIG_FLASH_INIT_PRIORITY=50 +CONFIG_GEN_ISR_TABLES=y +CONFIG_GEN_IRQ_START_VECTOR=0 +CONFIG_GEN_SW_ISR_TABLE=y +CONFIG_SRAM_OFFSET=0 +# CONFIG_REBOOT is not set +# CONFIG_POWER_DOMAIN is not set +CONFIG_CONSOLE=y +CONFIG_SOC_SERIES="nrf91" +CONFIG_ARCH_IRQ_VECTOR_TABLE_ALIGN=4 +CONFIG_ISR_STACK_SIZE=2048 +CONFIG_MINIMAL_LIBC_OPTIMIZE_STRING_FOR_SIZE=y +# CONFIG_SCHED_CPU_MASK is not set +# CONFIG_WATCHDOG is not set +CONFIG_ICACHE_LINE_SIZE=32 + +# +# Devicetree Info +# +CONFIG_DT_HAS_ARM_ARMV8M_MPU_ENABLED=y +CONFIG_DT_HAS_ARM_CORTEX_M33F_ENABLED=y +CONFIG_DT_HAS_ARM_CRYPTOCELL_310_ENABLED=y +CONFIG_DT_HAS_ARM_V8M_NVIC_ENABLED=y +CONFIG_DT_HAS_ATMEL_AT24_ENABLED=y +CONFIG_DT_HAS_FIXED_PARTITIONS_ENABLED=y +CONFIG_DT_HAS_GPIO_KEYS_ENABLED=y +CONFIG_DT_HAS_GPIO_LEDS_ENABLED=y +CONFIG_DT_HAS_MMIO_SRAM_ENABLED=y +CONFIG_DT_HAS_NORDIC_NPM1300_ENABLED=y +CONFIG_DT_HAS_NORDIC_NPM1300_CHARGER_ENABLED=y +CONFIG_DT_HAS_NORDIC_NPM1300_REGULATOR_ENABLED=y +CONFIG_DT_HAS_NORDIC_NRF_CLOCK_ENABLED=y +CONFIG_DT_HAS_NORDIC_NRF_CTRLAPPERI_ENABLED=y +CONFIG_DT_HAS_NORDIC_NRF_DPPIC_ENABLED=y +CONFIG_DT_HAS_NORDIC_NRF_EGU_ENABLED=y +CONFIG_DT_HAS_NORDIC_NRF_FICR_ENABLED=y +CONFIG_DT_HAS_NORDIC_NRF_GPIO_ENABLED=y +CONFIG_DT_HAS_NORDIC_NRF_GPIOTE_ENABLED=y +CONFIG_DT_HAS_NORDIC_NRF_GPREGRET_ENABLED=y +CONFIG_DT_HAS_NORDIC_NRF_IPC_ENABLED=y +CONFIG_DT_HAS_NORDIC_NRF_KMU_ENABLED=y +CONFIG_DT_HAS_NORDIC_NRF_PINCTRL_ENABLED=y +CONFIG_DT_HAS_NORDIC_NRF_POWER_ENABLED=y +CONFIG_DT_HAS_NORDIC_NRF_PWM_ENABLED=y +CONFIG_DT_HAS_NORDIC_NRF_REGULATORS_ENABLED=y +CONFIG_DT_HAS_NORDIC_NRF_SAADC_ENABLED=y +CONFIG_DT_HAS_NORDIC_NRF_SPU_ENABLED=y +CONFIG_DT_HAS_NORDIC_NRF_TWIM_ENABLED=y +CONFIG_DT_HAS_NORDIC_NRF_UARTE_ENABLED=y +CONFIG_DT_HAS_NORDIC_NRF_UICR_ENABLED=y +CONFIG_DT_HAS_NORDIC_NRF_VMC_ENABLED=y +CONFIG_DT_HAS_NORDIC_NRF_WDT_ENABLED=y +CONFIG_DT_HAS_NORDIC_NRF91_FLASH_CONTROLLER_ENABLED=y +CONFIG_DT_HAS_PWM_LEDS_ENABLED=y +CONFIG_DT_HAS_REGULATOR_FIXED_ENABLED=y +CONFIG_DT_HAS_SOC_NV_FLASH_ENABLED=y +CONFIG_DT_HAS_ST_LIS2DH_ENABLED=y +CONFIG_DT_HAS_ZEPHYR_BT_HCI_ENTROPY_ENABLED=y +# end of Devicetree Info + +# +# Modules +# + +# +# Available modules. +# + +# +# nrf (/home/mike/Documents/ncs/v2.7.0/nrf) +# +# CONFIG_MBOX is not set +CONFIG_NUM_METAIRQ_PRIORITIES=0 +# CONFIG_INIT_STACKS is not set +CONFIG_MPSL_WORK_STACK_SIZE=1024 + +# +# Nordic nRF Connect +# +CONFIG_WARN_EXPERIMENTAL=y +CONFIG_INIT_ARCH_HW_AT_BOOT=y +CONFIG_NORDIC_QSPI_NOR_FLASH_LAYOUT_PAGE_SIZE=4096 +# CONFIG_GETOPT is not set +# CONFIG_NCS_SAMPLES_DEFAULTS is not set + +# +# Image build variants +# +CONFIG_NCS_MCUBOOT_IN_BUILD=y +# end of Image build variants + +# +# Subsystems +# + +# +# Bootloader +# +# CONFIG_BUILD_S1_VARIANT is not set +# CONFIG_SECURE_BOOT is not set +CONFIG_PM_PARTITION_SIZE_PROVISION=0x280 +# CONFIG_B0_MIN_PARTITION_SIZE is not set +CONFIG_PM_PARTITION_SIZE_B0_IMAGE=0x8000 +# CONFIG_IS_SECURE_BOOTLOADER is not set +CONFIG_IS_BOOTLOADER_IMG=y +# CONFIG_SECURE_BOOT_CRYPTO is not set + +# +# Secure Boot firmware validation +# +CONFIG_SB_VALIDATION_INFO_MAGIC=0x86518483 +CONFIG_SB_VALIDATION_POINTER_MAGIC=0x6919b47e +CONFIG_SB_VALIDATION_INFO_CRYPTO_ID=1 +CONFIG_SB_VALIDATION_INFO_VERSION=2 +CONFIG_SB_VALIDATION_METADATA_OFFSET=0 +CONFIG_SB_VALIDATE_FW_SIGNATURE=y +# end of Secure Boot firmware validation + +# CONFIG_SECURE_BOOT_STORAGE is not set +# end of Bootloader + +# +# Bluetooth Low Energy +# +CONFIG_SYSTEM_WORKQUEUE_PRIORITY=-2 + +# +# BLE over nRF RPC +# +CONFIG_HEAP_MEM_POOL_SIZE=0 +# end of BLE over nRF RPC +# end of Bluetooth Low Energy + +# +# DFU +# +# CONFIG_DFU_MULTI_IMAGE is not set +# CONFIG_DFU_TARGET is not set +# end of DFU + +# CONFIG_ESB is not set +# CONFIG_EMDS is not set + +# +# Peripheral CPU DFU (PCD) +# +# CONFIG_PCD is not set +# CONFIG_PCD_APP is not set +CONFIG_PCD_VERSION_PAGE_BUF_SIZE=2046 +# CONFIG_PCD_NET is not set +# end of Peripheral CPU DFU (PCD) + +# +# Networking +# + +# +# Application protocols +# + +# +# nRF Cloud +# + +# +# Client ID (nRF Cloud Device ID) +# +CONFIG_NRF_CLOUD_CLIENT_ID_SRC_COMPILE_TIME=y +CONFIG_NRF_CLOUD_CLIENT_ID="my-client-id" +# end of Client ID (nRF Cloud Device ID) + +# CONFIG_NRF_CLOUD_MQTT is not set +# CONFIG_NRF_CLOUD_FOTA is not set +CONFIG_FOTA_USE_NRF_CLOUD_SETTINGS_AREA=y +CONFIG_FOTA_DL_TIMEOUT_MIN=15 +# CONFIG_NRF_CLOUD_FOTA_FULL_MODEM_UPDATE is not set +# CONFIG_NRF_CLOUD_REST is not set +# CONFIG_NRF_CLOUD_LOCATION_PARSE_ANCHORS is not set +# CONFIG_NRF_CLOUD_ALERT is not set +# CONFIG_NRF_CLOUD_ALERT_LOG_LEVEL_OFF is not set +# CONFIG_NRF_CLOUD_ALERT_LOG_LEVEL_ERR is not set +# CONFIG_NRF_CLOUD_ALERT_LOG_LEVEL_WRN is not set +# CONFIG_NRF_CLOUD_ALERT_LOG_LEVEL_INF is not set +# CONFIG_NRF_CLOUD_ALERT_LOG_LEVEL_DBG is not set +CONFIG_NRF_CLOUD_ALERT_LOG_LEVEL_DEFAULT=y +CONFIG_NRF_CLOUD_ALERT_LOG_LEVEL=0 +CONFIG_NRF_CLOUD_LOG_OUTPUT_LEVEL=1 +# CONFIG_NRF_CLOUD_LOG_INCLUDE_LEVEL_0 is not set +CONFIG_NRF_CLOUD_LOG_BUF_SIZE=256 +# CONFIG_NRF_CLOUD_LOG_LOG_LEVEL_OFF is not set +# CONFIG_NRF_CLOUD_LOG_LOG_LEVEL_ERR is not set +# CONFIG_NRF_CLOUD_LOG_LOG_LEVEL_WRN is not set +# CONFIG_NRF_CLOUD_LOG_LOG_LEVEL_INF is not set +# CONFIG_NRF_CLOUD_LOG_LOG_LEVEL_DBG is not set +CONFIG_NRF_CLOUD_LOG_LOG_LEVEL_DEFAULT=y +CONFIG_NRF_CLOUD_LOG_LOG_LEVEL=0 +# CONFIG_NRF_CLOUD_COAP is not set + +# +# Send shadow info sections on initial connect (MQTT/CoAP) +# +# end of Send shadow info sections on initial connect (MQTT/CoAP) + +# CONFIG_NRF_CLOUD_GATEWAY is not set +# CONFIG_NRF_CLOUD_LOG_LEVEL_OFF is not set +# CONFIG_NRF_CLOUD_LOG_LEVEL_ERR is not set +# CONFIG_NRF_CLOUD_LOG_LEVEL_WRN is not set +# CONFIG_NRF_CLOUD_LOG_LEVEL_INF is not set +# CONFIG_NRF_CLOUD_LOG_LEVEL_DBG is not set +CONFIG_NRF_CLOUD_LOG_LEVEL_DEFAULT=y +CONFIG_NRF_CLOUD_LOG_LEVEL=0 +# end of nRF Cloud + +# CONFIG_REST_CLIENT is not set +# CONFIG_DOWNLOAD_CLIENT is not set +# CONFIG_AWS_IOT is not set +# CONFIG_AWS_JOBS is not set +# CONFIG_AZURE_IOT_HUB is not set + +# +# Self-Registration (Zi ZHu Ce) +# +# end of Self-Registration (Zi ZHu Ce) + +# CONFIG_ICAL_PARSER is not set +# CONFIG_FTP_CLIENT is not set +# CONFIG_LWM2M_CLIENT_UTILS is not set +# CONFIG_WIFI_CREDENTIALS is not set +# CONFIG_WIFI_CREDENTIALS_STATIC is not set +# CONFIG_MQTT_HELPER is not set +# CONFIG_NRF_MCUMGR_SMP_CLIENT is not set +# end of Application protocols +# end of Networking + +# +# NFC +# +# CONFIG_NFC_NDEF is not set +# CONFIG_NFC_NDEF_PARSER is not set +# CONFIG_NFC_NDEF_PAYLOAD_TYPE_COMMON is not set +# CONFIG_NFC_T2T_PARSER is not set +# CONFIG_NFC_T4T_NDEF_FILE is not set +# CONFIG_NFC_T4T_ISODEP is not set +# CONFIG_NFC_T4T_APDU is not set +# CONFIG_NFC_T4T_CC_FILE is not set +# CONFIG_NFC_T4T_HL_PROCEDURE is not set +# CONFIG_NFC_PLATFORM is not set +# CONFIG_NFC_TNEP_TAG is not set +# CONFIG_NFC_TNEP_POLLER is not set +# CONFIG_NFC_TNEP_CH is not set +# end of NFC + +# CONFIG_APP_EVENT_MANAGER is not set +# CONFIG_NRF_PROFILER is not set +# CONFIG_FW_INFO is not set + +# +# Debug +# +# CONFIG_CPU_LOAD is not set +# CONFIG_ETB_TRACE is not set +# CONFIG_PPI_TRACE is not set +# end of Debug + +# +# Multiprotocol service layer (MPSL) +# +# CONFIG_MPSL_FEM_ONLY is not set +# CONFIG_MPSL_FEM_DEVICE_CONFIG_254 is not set +# CONFIG_MPSL_FEM_LOG_LEVEL_OFF is not set +# CONFIG_MPSL_FEM_LOG_LEVEL_ERR is not set +# CONFIG_MPSL_FEM_LOG_LEVEL_WRN is not set +# CONFIG_MPSL_FEM_LOG_LEVEL_INF is not set +# CONFIG_MPSL_FEM_LOG_LEVEL_DBG is not set +CONFIG_MPSL_FEM_LOG_LEVEL_DEFAULT=y +CONFIG_MPSL_FEM_LOG_LEVEL=0 +CONFIG_MPSL_THREAD_COOP_PRIO=8 +CONFIG_MPSL_TIMESLOT_SESSION_COUNT=0 +# CONFIG_MPSL_ASSERT_HANDLER is not set +# CONFIG_MPSL_LOG_LEVEL_OFF is not set +# CONFIG_MPSL_LOG_LEVEL_ERR is not set +# CONFIG_MPSL_LOG_LEVEL_WRN is not set +# CONFIG_MPSL_LOG_LEVEL_INF is not set +# CONFIG_MPSL_LOG_LEVEL_DBG is not set +CONFIG_MPSL_LOG_LEVEL_DEFAULT=y +CONFIG_MPSL_LOG_LEVEL=0 +# end of Multiprotocol service layer (MPSL) + +# +# Partition Manager +# +CONFIG_PARTITION_MANAGER_ENABLED=y +CONFIG_FLASH_MAP_CUSTOM=y +CONFIG_SRAM_SIZE=88 +CONFIG_SRAM_BASE_ADDRESS=0x20000000 + +# +# Zephyr subsystem configurations +# +# end of Zephyr subsystem configurations + +# +# NCS subsystem configurations +# +# CONFIG_PM_SINGLE_IMAGE is not set +CONFIG_PM_EXTERNAL_FLASH_BASE=0 +CONFIG_PM_EXTERNAL_FLASH_PATH="" +CONFIG_PM_EXTERNAL_FLASH_SIZE_BITS=0 +# CONFIG_PM_EXTERNAL_FLASH_MCUBOOT_SECONDARY is not set +# CONFIG_PM_OVERRIDE_EXTERNAL_DRIVER_CHECK is not set +CONFIG_PM_SRAM_BASE=0x20000000 +CONFIG_PM_SRAM_SIZE=0x40000 +# end of Partition Manager + +# +# nRF RPC (Remote Procedure Call) library +# +# end of nRF RPC (Remote Procedure Call) library + +# +# Full Modem Firmware Update Management(FMFU) +# +# CONFIG_MGMT_FMFU_LOG_LEVEL_OFF is not set +# CONFIG_MGMT_FMFU_LOG_LEVEL_ERR is not set +# CONFIG_MGMT_FMFU_LOG_LEVEL_WRN is not set +# CONFIG_MGMT_FMFU_LOG_LEVEL_INF is not set +# CONFIG_MGMT_FMFU_LOG_LEVEL_DBG is not set +CONFIG_MGMT_FMFU_LOG_LEVEL_DEFAULT=y +CONFIG_MGMT_FMFU_LOG_LEVEL=0 +# end of Full Modem Firmware Update Management(FMFU) + +# +# SUIT-based Firmware Update Management +# +CONFIG_MGMT_SUITFU_TRIGGER_UPDATE_RESET_DELAY_MS=100 +CONFIG_MGMT_SUITFU_AUTO_REGISTER_HANDLERS=y +CONFIG_MGMT_SUITFU_GRP_IMG=y +CONFIG_MGMT_SUITFU_IMAGE_NUMBER=0 +# CONFIG_MGMT_SUITFU_GRP_SUIT is not set +# CONFIG_MGMT_SUITFU_LOG_LEVEL_OFF is not set +# CONFIG_MGMT_SUITFU_LOG_LEVEL_ERR is not set +# CONFIG_MGMT_SUITFU_LOG_LEVEL_WRN is not set +# CONFIG_MGMT_SUITFU_LOG_LEVEL_INF is not set +# CONFIG_MGMT_SUITFU_LOG_LEVEL_DBG is not set +CONFIG_MGMT_SUITFU_LOG_LEVEL_DEFAULT=y +CONFIG_MGMT_SUITFU_LOG_LEVEL=0 +# end of SUIT-based Firmware Update Management + +# CONFIG_CAF is not set + +# +# Nordic IEEE 802.15.4 +# +# end of Nordic IEEE 802.15.4 + +# CONFIG_DM_MODULE is not set + +# +# nRF Security +# +# CONFIG_NORDIC_SECURITY_BACKEND is not set +# CONFIG_NRF_SECURITY is not set +# CONFIG_PSA_WANT_GENERATE_RANDOM is not set +# CONFIG_PSA_WANT_ALG_CTR_DRBG is not set +# CONFIG_PSA_WANT_ALG_HMAC_DRBG is not set +# CONFIG_PSA_WANT_KEY_TYPE_DERIVE is not set +# CONFIG_PSA_WANT_KEY_TYPE_RAW_DATA is not set +# CONFIG_PSA_WANT_KEY_TYPE_HMAC is not set +# CONFIG_PSA_WANT_KEY_TYPE_PASSWORD is not set +# CONFIG_PSA_WANT_KEY_TYPE_PASSWORD_HASH is not set +# CONFIG_PSA_WANT_KEY_TYPE_PEPPER is not set +# CONFIG_PSA_WANT_KEY_TYPE_AES is not set +# CONFIG_PSA_WANT_KEY_TYPE_ARIA is not set +# CONFIG_PSA_WANT_KEY_TYPE_DES is not set +# CONFIG_PSA_WANT_KEY_TYPE_CAMELLIA is not set +# CONFIG_PSA_WANT_KEY_TYPE_SM4 is not set +# CONFIG_PSA_WANT_KEY_TYPE_ARC4 is not set +# CONFIG_PSA_WANT_KEY_TYPE_ECC_KEY_PAIR is not set +# CONFIG_PSA_WANT_KEY_TYPE_ECC_PUBLIC_KEY is not set +# CONFIG_PSA_WANT_KEY_TYPE_ECC_KEY_PAIR_IMPORT is not set +# CONFIG_PSA_WANT_KEY_TYPE_ECC_KEY_PAIR_EXPORT is not set +# CONFIG_PSA_WANT_KEY_TYPE_ECC_KEY_PAIR_GENERATE is not set +# CONFIG_PSA_WANT_KEY_TYPE_ECC_KEY_PAIR_DERIVE is not set +# CONFIG_PSA_WANT_KEY_TYPE_RSA_KEY_PAIR is not set +# CONFIG_PSA_WANT_KEY_TYPE_RSA_PUBLIC_KEY is not set +# CONFIG_PSA_WANT_KEY_TYPE_RSA_KEY_PAIR_IMPORT is not set +# CONFIG_PSA_WANT_KEY_TYPE_RSA_KEY_PAIR_EXPORT is not set +# CONFIG_PSA_WANT_KEY_TYPE_RSA_KEY_PAIR_GENERATE is not set +# CONFIG_PSA_WANT_KEY_TYPE_DH_KEY_PAIR is not set +# CONFIG_PSA_WANT_KEY_TYPE_DH_PUBLIC_KEY is not set +# CONFIG_PSA_WANT_KEY_TYPE_SPAKE2P_KEY_PAIR_IMPORT is not set +# CONFIG_PSA_WANT_KEY_TYPE_SPAKE2P_KEY_PAIR_EXPORT is not set +# CONFIG_PSA_WANT_KEY_TYPE_SPAKE2P_KEY_PAIR_DERIVE is not set +# CONFIG_PSA_WANT_KEY_TYPE_SPAKE2P_KEY_PAIR is not set +# CONFIG_PSA_WANT_KEY_TYPE_SPAKE2P_PUBLIC_KEY is not set +# CONFIG_PSA_WANT_KEY_TYPE_SRP_KEY_PAIR_IMPORT is not set +# CONFIG_PSA_WANT_KEY_TYPE_SRP_KEY_PAIR_EXPORT is not set +# CONFIG_PSA_WANT_KEY_TYPE_SRP_KEY_PAIR_DERIVE is not set +# CONFIG_PSA_WANT_KEY_TYPE_SRP_PUBLIC_KEY is not set +# CONFIG_PSA_WANT_KEY_TYPE_SRP_KEY_PAIR is not set +# CONFIG_PSA_WANT_ALG_CCM is not set +# CONFIG_PSA_WANT_ALG_GCM is not set +# CONFIG_PSA_WANT_ALG_CHACHA20_POLY1305 is not set +# CONFIG_PSA_WANT_ALG_CBC_MAC is not set +# CONFIG_PSA_WANT_ALG_CMAC is not set +# CONFIG_PSA_WANT_ALG_HMAC is not set +# CONFIG_PSA_WANT_ALG_SHA_1 is not set +# CONFIG_PSA_WANT_ALG_SHA_224 is not set +# CONFIG_PSA_WANT_ALG_SHA_384 is not set +# CONFIG_PSA_WANT_ALG_SHA_512 is not set +# CONFIG_PSA_WANT_ALG_SHA_512_224 is not set +# CONFIG_PSA_WANT_ALG_SHA_512_256 is not set +# CONFIG_PSA_WANT_ALG_SHA3_224 is not set +# CONFIG_PSA_WANT_ALG_SHA3_256 is not set +# CONFIG_PSA_WANT_ALG_SHA3_384 is not set +# CONFIG_PSA_WANT_ALG_SHA3_512 is not set +# CONFIG_PSA_WANT_ALG_SM3 is not set +# CONFIG_PSA_WANT_ALG_SHAKE256_512 is not set +# CONFIG_PSA_WANT_ALG_RIPEMD160 is not set +# CONFIG_PSA_WANT_ALG_MD2 is not set +# CONFIG_PSA_WANT_ALG_MD4 is not set +# CONFIG_PSA_WANT_ALG_MD5 is not set +# CONFIG_PSA_WANT_ALG_ECB_NO_PADDING is not set +# CONFIG_PSA_WANT_ALG_CBC_NO_PADDING is not set +# CONFIG_PSA_WANT_ALG_CBC_PKCS7 is not set +# CONFIG_PSA_WANT_ALG_CFB is not set +# CONFIG_PSA_WANT_ALG_CTR is not set +# CONFIG_PSA_WANT_ALG_OFB is not set +# CONFIG_PSA_WANT_ALG_XTS is not set +# CONFIG_PSA_WANT_ALG_CCM_STAR_NO_TAG is not set +# CONFIG_PSA_WANT_ALG_STREAM_CIPHER is not set +# CONFIG_PSA_WANT_ALG_ECDH is not set +# CONFIG_PSA_WANT_ALG_FFDH is not set +# CONFIG_PSA_WANT_ALG_HKDF_EXTRACT is not set +# CONFIG_PSA_WANT_ALG_HKDF_EXPAND is not set +# CONFIG_PSA_WANT_ALG_ECDSA is not set +# CONFIG_PSA_WANT_ALG_ECDSA_ANY is not set +# CONFIG_PSA_WANT_ALG_DETERMINISTIC_ECDSA is not set +# CONFIG_PSA_WANT_ECC_BRAINPOOL_P_R1_160 is not set +# CONFIG_PSA_WANT_ECC_BRAINPOOL_P_R1_192 is not set +# CONFIG_PSA_WANT_ECC_BRAINPOOL_P_R1_224 is not set +# CONFIG_PSA_WANT_ECC_BRAINPOOL_P_R1_256 is not set +# CONFIG_PSA_WANT_ECC_BRAINPOOL_P_R1_320 is not set +# CONFIG_PSA_WANT_ECC_BRAINPOOL_P_R1_384 is not set +# CONFIG_PSA_WANT_ECC_BRAINPOOL_P_R1_512 is not set +# CONFIG_PSA_WANT_ECC_MONTGOMERY_255 is not set +# CONFIG_PSA_WANT_ECC_MONTGOMERY_448 is not set +# CONFIG_PSA_WANT_ECC_TWISTED_EDWARDS_255 is not set +# CONFIG_PSA_WANT_ECC_TWISTED_EDWARDS_448 is not set +# CONFIG_PSA_WANT_ECC_SECP_K1_192 is not set +# CONFIG_PSA_WANT_ECC_SECP_K1_224 is not set +# CONFIG_PSA_WANT_ECC_SECP_K1_256 is not set +# CONFIG_PSA_WANT_ECC_SECP_R1_192 is not set +# CONFIG_PSA_WANT_ECC_SECP_R1_224 is not set +# CONFIG_PSA_WANT_ECC_SECP_R1_256 is not set +# CONFIG_PSA_WANT_ECC_SECP_R1_384 is not set +# CONFIG_PSA_WANT_ECC_SECP_R1_521 is not set +# CONFIG_PSA_WANT_ECC_SECP_R2_160 is not set +# CONFIG_PSA_WANT_ECC_SECT_K1_163 is not set +# CONFIG_PSA_WANT_ECC_SECT_K1_233 is not set +# CONFIG_PSA_WANT_ECC_SECT_K1_239 is not set +# CONFIG_PSA_WANT_ECC_SECT_K1_283 is not set +# CONFIG_PSA_WANT_ECC_SECT_K1_409 is not set +# CONFIG_PSA_WANT_ECC_SECT_K1_571 is not set +# CONFIG_PSA_WANT_ECC_SECT_R1_163 is not set +# CONFIG_PSA_WANT_ECC_SECT_R1_233 is not set +# CONFIG_PSA_WANT_ECC_SECT_R1_283 is not set +# CONFIG_PSA_WANT_ECC_SECT_R1_409 is not set +# CONFIG_PSA_WANT_ECC_SECT_R1_571 is not set +# CONFIG_PSA_WANT_ECC_SECT_R2_163 is not set +# CONFIG_PSA_WANT_ECC_FRP_V1_256 is not set +# CONFIG_PSA_WANT_ALG_RSA_OAEP is not set +# CONFIG_PSA_WANT_ALG_RSA_PKCS1V15_CRYPT is not set +# CONFIG_PSA_WANT_ALG_RSA_PKCS1V15_SIGN is not set +# CONFIG_PSA_WANT_ALG_RSA_PKCS1V15_SIGN_RAW is not set +# CONFIG_PSA_WANT_ALG_RSA_PSS is not set +# CONFIG_PSA_WANT_ALG_RSA_PSS_ANY_SALT is not set +# CONFIG_PSA_WANT_ALG_JPAKE is not set +# CONFIG_PSA_WANT_ALG_SPAKE2P_HMAC is not set +# CONFIG_PSA_WANT_ALG_SPAKE2P_CMAC is not set +# CONFIG_PSA_WANT_ALG_SPAKE2P_MATTER is not set +# CONFIG_PSA_WANT_ALG_SRP_6 is not set +# CONFIG_PSA_WANT_ALG_SRP_PASSWORD_HASH is not set +# CONFIG_PSA_WANT_ALG_PURE_EDDSA is not set +# CONFIG_PSA_WANT_ALG_ED25519PH is not set +# CONFIG_PSA_WANT_ALG_ED448PH is not set +# end of nRF Security + +# +# Audio Module +# +# CONFIG_AUDIO_MODULE_TEST is not set +CONFIG_AUDIO_MODULE_NAME_SIZE=20 +# CONFIG_AUDIO_MODULE_LOG_LEVEL_OFF is not set +# CONFIG_AUDIO_MODULE_LOG_LEVEL_ERR is not set +# CONFIG_AUDIO_MODULE_LOG_LEVEL_WRN is not set +# CONFIG_AUDIO_MODULE_LOG_LEVEL_INF is not set +# CONFIG_AUDIO_MODULE_LOG_LEVEL_DBG is not set +CONFIG_AUDIO_MODULE_LOG_LEVEL_DEFAULT=y +CONFIG_AUDIO_MODULE_LOG_LEVEL=0 +# end of Audio Module + +# CONFIG_UART_ASYNC_ADAPTER is not set +# CONFIG_TRUSTED_STORAGE is not set + +# +# SUIT provisioning +# +# CONFIG_SUIT_MPI_GENERATE is not set +# end of SUIT provisioning + +# CONFIG_SUIT is not set +# end of Subsystems + +# CONFIG_WPA_SUPP is not set +CONFIG_COMMON_LIBC_MALLOC_ARENA_SIZE=0 +CONFIG_POSIX_MAX_FDS=4 +# CONFIG_WFA_QT_LOG_LEVEL_OFF is not set +# CONFIG_WFA_QT_LOG_LEVEL_ERR is not set +# CONFIG_WFA_QT_LOG_LEVEL_WRN is not set +# CONFIG_WFA_QT_LOG_LEVEL_INF is not set +# CONFIG_WFA_QT_LOG_LEVEL_DBG is not set +CONFIG_WFA_QT_LOG_LEVEL_DEFAULT=y +CONFIG_WFA_QT_LOG_LEVEL=0 +# CONFIG_WFA_QT_CONTROL_APP is not set +CONFIG_WFA_QT_THREAD_STACK_SIZE=4096 +CONFIG_WFA_QT_REBOOT_TIMEOUT_MS=1000 +CONFIG_WFA_QT_DEFAULT_INTERFACE="nordic_wlan0" +CONFIG_WPAS_READY_TIMEOUT_MS=10000 + +# +# Libraries +# + +# +# Binary libraries +# +# end of Binary libraries + +# CONFIG_AT_MONITOR is not set +# CONFIG_LTE_LINK_CONTROL is not set +CONFIG_NRF_SPU_FLASH_REGION_SIZE=0x8000 +CONFIG_FPROTECT_BLOCK_SIZE=0x8000 +CONFIG_FPROTECT=y +# CONFIG_FPROTECT_APP is not set +# CONFIG_AT_CMD_CUSTOM is not set +# CONFIG_DK_LIBRARY is not set +# CONFIG_MODEM_INFO is not set +# CONFIG_RESET_ON_FATAL_ERROR is not set +# CONFIG_SMS is not set +# CONFIG_GCF_SMS is not set +# CONFIG_DATE_TIME is not set +# CONFIG_HW_ID_LIBRARY is not set +# CONFIG_WAVE_GEN_LIB is not set +CONFIG_HW_UNIQUE_KEY_SUPPORTED=y +CONFIG_HW_UNIQUE_KEY_PARTITION_SIZE=0 +# CONFIG_MODEM_JWT is not set +# CONFIG_LOCATION is not set +# CONFIG_QOS is not set +# CONFIG_SFLOAT is not set +# CONFIG_CONTIN_ARRAY is not set +# CONFIG_PCM_MIX is not set +# CONFIG_TONE is not set +# CONFIG_PSCM is not set +# CONFIG_DATA_FIFO is not set +# CONFIG_FEM_AL_LIB is not set +# CONFIG_SAMPLE_RATE_CONVERTER is not set +CONFIG_NCS_BOOT_BANNER=y +CONFIG_NCS_APPLICATION_BOOT_BANNER_STRING="MCUboot" +CONFIG_NCS_NCS_BOOT_BANNER_STRING="nRF Connect SDK" +CONFIG_NCS_ZEPHYR_BOOT_BANNER_STRING="Zephyr OS" +# end of Libraries + +# +# Device Drivers +# +# CONFIG_BT_DRIVER_QUIRK_NO_AUTO_DLE is not set +CONFIG_HW_CC3XX=y +# CONFIG_ETH_RTT is not set +# CONFIG_SENSOR is not set +# CONFIG_NRF_SW_LPUART is not set +CONFIG_NRFX_GPIOTE_NUM_OF_EVT_HANDLERS=1 +# CONFIG_FLASH_RPC is not set +# end of Device Drivers + +# +# External libraries +# +# end of External libraries + +# +# Test +# +CONFIG_ZTEST_MULTICORE_DEFAULT_SETTINGS=y +# CONFIG_UNITY is not set + +# +# Mocks +# +# CONFIG_MOCK_NRF_MODEM_AT is not set +# end of Mocks +# end of Test +# end of Nordic nRF Connect + +CONFIG_ZEPHYR_NRF_MODULE=y +# end of nrf (/home/mike/Documents/ncs/v2.7.0/nrf) + +# +# mcuboot (/home/mike/Documents/ncs/v2.7.0/bootloader/mcuboot) +# + +# +# MCUboot +# +CONFIG_SIGN_IMAGES=y +CONFIG_DT_FLASH_WRITE_BLOCK_SIZE=4 +# CONFIG_MCUBOOT_USE_ALL_AVAILABLE_RAM is not set +# end of MCUboot + +CONFIG_ZEPHYR_MCUBOOT_MODULE=y +# end of mcuboot (/home/mike/Documents/ncs/v2.7.0/bootloader/mcuboot) + +# +# mbedtls (/home/mike/Documents/ncs/v2.7.0/modules/crypto/mbedtls) +# +CONFIG_ZEPHYR_MBEDTLS_MODULE=y + +# +# PSA RNG support +# +# end of PSA RNG support + +# +# PSA key type support +# +# end of PSA key type support + +# +# PSA AEAD support +# +# end of PSA AEAD support + +# +# PSA MAC support +# +# end of PSA MAC support + +# +# PSA Hash support +# +# end of PSA Hash support + +# +# PSA Cipher support +# +# end of PSA Cipher support + +# +# PSA Key agreement support +# +# end of PSA Key agreement support + +# +# PSA Key derivation support +# +# end of PSA Key derivation support + +# +# PSA Asymmetric support +# + +# +# Elliptic Curve type support +# +# end of Elliptic Curve type support +# end of PSA Asymmetric support +# end of mbedtls (/home/mike/Documents/ncs/v2.7.0/modules/crypto/mbedtls) + +# +# oberon-psa-crypto (/home/mike/Documents/ncs/v2.7.0/modules/crypto/oberon-psa-crypto) +# +CONFIG_ZEPHYR_OBERON_PSA_CRYPTO_MODULE=y +# end of oberon-psa-crypto (/home/mike/Documents/ncs/v2.7.0/modules/crypto/oberon-psa-crypto) + +# +# trusted-firmware-m (/home/mike/Documents/ncs/v2.7.0/modules/tee/tf-m/trusted-firmware-m) +# +CONFIG_TFM_BOARD="/home/mike/Documents/ncs/v2.7.0/zephyr/modules/trusted-firmware-m/nordic/nrf9120" +CONFIG_ZEPHYR_TRUSTED_FIRMWARE_M_MODULE=y +# end of trusted-firmware-m (/home/mike/Documents/ncs/v2.7.0/modules/tee/tf-m/trusted-firmware-m) + +CONFIG_ZEPHYR_PSA_ARCH_TESTS_MODULE=y +CONFIG_ZEPHYR_SOC_HWMV1_MODULE=y + +# +# cjson (/home/mike/Documents/ncs/v2.7.0/modules/lib/cjson) +# +CONFIG_ZEPHYR_CJSON_MODULE=y +# end of cjson (/home/mike/Documents/ncs/v2.7.0/modules/lib/cjson) + +# +# azure-sdk-for-c (/home/mike/Documents/ncs/v2.7.0/modules/lib/azure-sdk-for-c) +# +# CONFIG_AZURE_SDK is not set +CONFIG_ZEPHYR_AZURE_SDK_FOR_C_MODULE=y +# end of azure-sdk-for-c (/home/mike/Documents/ncs/v2.7.0/modules/lib/azure-sdk-for-c) + +# +# cirrus-logic (/home/mike/Documents/ncs/v2.7.0/modules/hal/cirrus-logic) +# +# CONFIG_HW_CODEC_CIRRUS_LOGIC is not set +CONFIG_ZEPHYR_CIRRUS_LOGIC_MODULE=y +# end of cirrus-logic (/home/mike/Documents/ncs/v2.7.0/modules/hal/cirrus-logic) + +# +# openthread (/home/mike/Documents/ncs/v2.7.0/modules/lib/openthread) +# +# CONFIG_OPENTHREAD is not set +CONFIG_ZEPHYR_OPENTHREAD_MODULE=y +# end of openthread (/home/mike/Documents/ncs/v2.7.0/modules/lib/openthread) + +# +# suit-generator (/home/mike/Documents/ncs/v2.7.0/modules/lib/suit-generator) +# +CONFIG_SUIT_ENVELOPE_TEMPLATE="" +CONFIG_SUIT_ENVELOPE_TARGET="" +CONFIG_SUIT_ENVELOPE_OUTPUT_ARTIFACT="merged.hex" +CONFIG_SUIT_ENVELOPE_OUTPUT_MPI_MERGE=y +# CONFIG_SUIT_LOCAL_ENVELOPE_GENERATE is not set +CONFIG_ZEPHYR_SUIT_GENERATOR_MODULE=y +# end of suit-generator (/home/mike/Documents/ncs/v2.7.0/modules/lib/suit-generator) + +# +# suit-processor (/home/mike/Documents/ncs/v2.7.0/modules/lib/suit-processor) +# +# CONFIG_SUIT_PROCESSOR is not set +CONFIG_SUIT_PLATFORM_DRY_RUN_SUPPORT=y +CONFIG_ZEPHYR_SUIT_PROCESSOR_MODULE=y +# end of suit-processor (/home/mike/Documents/ncs/v2.7.0/modules/lib/suit-processor) + +# +# memfault-firmware-sdk (/home/mike/Documents/ncs/v2.7.0/modules/lib/memfault-firmware-sdk) +# +# CONFIG_MEMFAULT is not set +CONFIG_ZEPHYR_MEMFAULT_FIRMWARE_SDK_MODULE=y +# end of memfault-firmware-sdk (/home/mike/Documents/ncs/v2.7.0/modules/lib/memfault-firmware-sdk) + +# +# coremark (/home/mike/Documents/ncs/v2.7.0/modules/benchmark/coremark) +# +# CONFIG_COREMARK is not set +CONFIG_ZEPHYR_COREMARK_MODULE=y +# end of coremark (/home/mike/Documents/ncs/v2.7.0/modules/benchmark/coremark) + +# +# canopennode (/home/mike/Documents/ncs/v2.7.0/modules/lib/canopennode) +# +CONFIG_ZEPHYR_CANOPENNODE_MODULE=y +# end of canopennode (/home/mike/Documents/ncs/v2.7.0/modules/lib/canopennode) + +# +# chre (/home/mike/Documents/ncs/v2.7.0/modules/lib/chre) +# +CONFIG_ZEPHYR_CHRE_MODULE=y +# CONFIG_CHRE is not set +# end of chre (/home/mike/Documents/ncs/v2.7.0/modules/lib/chre) + +# +# lz4 (/home/mike/Documents/ncs/v2.7.0/modules/lib/lz4) +# +CONFIG_ZEPHYR_LZ4_MODULE=y +# CONFIG_LZ4 is not set +# end of lz4 (/home/mike/Documents/ncs/v2.7.0/modules/lib/lz4) + +# +# nanopb (/home/mike/Documents/ncs/v2.7.0/modules/lib/nanopb) +# +CONFIG_ZEPHYR_NANOPB_MODULE=y +# CONFIG_NANOPB is not set +# end of nanopb (/home/mike/Documents/ncs/v2.7.0/modules/lib/nanopb) + +CONFIG_ZEPHYR_TF_M_TESTS_MODULE=y + +# +# zscilib (/home/mike/Documents/ncs/v2.7.0/modules/lib/zscilib) +# +# CONFIG_ZSL is not set +CONFIG_ZEPHYR_ZSCILIB_MODULE=y +# end of zscilib (/home/mike/Documents/ncs/v2.7.0/modules/lib/zscilib) + +# +# cmsis (/home/mike/Documents/ncs/v2.7.0/modules/hal/cmsis) +# +CONFIG_ZEPHYR_CMSIS_MODULE=y +CONFIG_HAS_CMSIS_CORE=y +CONFIG_HAS_CMSIS_CORE_M=y +# CONFIG_CMSIS_M_CHECK_DEVICE_DEFINES is not set +# end of cmsis (/home/mike/Documents/ncs/v2.7.0/modules/hal/cmsis) + +# +# cmsis-dsp (/home/mike/Documents/ncs/v2.7.0/modules/lib/cmsis-dsp) +# +CONFIG_ZEPHYR_CMSIS_DSP_MODULE=y +# CONFIG_CMSIS_DSP is not set +# end of cmsis-dsp (/home/mike/Documents/ncs/v2.7.0/modules/lib/cmsis-dsp) + +# +# cmsis-nn (/home/mike/Documents/ncs/v2.7.0/modules/lib/cmsis-nn) +# +CONFIG_ZEPHYR_CMSIS_NN_MODULE=y +# CONFIG_CMSIS_NN is not set +# end of cmsis-nn (/home/mike/Documents/ncs/v2.7.0/modules/lib/cmsis-nn) + +# +# fatfs (/home/mike/Documents/ncs/v2.7.0/modules/fs/fatfs) +# +CONFIG_ZEPHYR_FATFS_MODULE=y +# end of fatfs (/home/mike/Documents/ncs/v2.7.0/modules/fs/fatfs) + +# +# hal_nordic (/home/mike/Documents/ncs/v2.7.0/modules/hal/nordic) +# +CONFIG_ZEPHYR_HAL_NORDIC_MODULE=y +# CONFIG_NRF_802154_SOURCE_HAL_NORDIC is not set +CONFIG_HAS_NRFX=y + +# +# nrfx drivers +# + +# +# nrfx drivers logging +# +# CONFIG_NRFX_CLOCK_LOG is not set +# CONFIG_NRFX_DPPI_LOG is not set +# CONFIG_NRFX_GPIOTE_LOG is not set +# CONFIG_NRFX_NVMC_LOG is not set +# CONFIG_NRFX_WDT_LOG is not set +# end of nrfx drivers logging + +CONFIG_NRFX_CLOCK=y +CONFIG_NRFX_CLOCK_LFXO_TWO_STAGE_ENABLED=y +CONFIG_NRFX_DPPI=y +# CONFIG_NRFX_EGU0 is not set +# CONFIG_NRFX_EGU1 is not set +# CONFIG_NRFX_EGU2 is not set +# CONFIG_NRFX_EGU3 is not set +# CONFIG_NRFX_EGU4 is not set +# CONFIG_NRFX_EGU5 is not set +CONFIG_NRFX_GPIOTE=y +CONFIG_NRFX_GPIOTE0=y +# CONFIG_NRFX_GPIOTE1 is not set +# CONFIG_NRFX_I2S0 is not set +# CONFIG_NRFX_IPC is not set +CONFIG_NRFX_NVMC=y +# CONFIG_NRFX_PDM is not set +# CONFIG_NRFX_POWER is not set +# CONFIG_NRFX_PWM0 is not set +# CONFIG_NRFX_PWM1 is not set +# CONFIG_NRFX_PWM2 is not set +# CONFIG_NRFX_PWM3 is not set +# CONFIG_NRFX_RTC0 is not set +# CONFIG_NRFX_RTC1 is not set +# CONFIG_NRFX_SAADC is not set +# CONFIG_NRFX_SPIM0 is not set +# CONFIG_NRFX_SPIM1 is not set +# CONFIG_NRFX_SPIM2 is not set +# CONFIG_NRFX_SPIM3 is not set +# CONFIG_NRFX_SYSTICK is not set +# CONFIG_NRFX_TIMER0 is not set +# CONFIG_NRFX_TIMER1 is not set +# CONFIG_NRFX_TIMER2 is not set +# CONFIG_NRFX_TWIM0 is not set +# CONFIG_NRFX_TWIM1 is not set +# CONFIG_NRFX_TWIM2 is not set +# CONFIG_NRFX_TWIM3 is not set +# CONFIG_NRFX_UARTE0 is not set +# CONFIG_NRFX_UARTE1 is not set +# CONFIG_NRFX_UARTE2 is not set +# CONFIG_NRFX_UARTE3 is not set +CONFIG_NRFX_WDT=y +CONFIG_NRFX_WDT0=y + +# +# Peripheral Resource Sharing module +# +# CONFIG_NRFX_PRS_BOX_0 is not set +# CONFIG_NRFX_PRS_BOX_1 is not set +# CONFIG_NRFX_PRS_BOX_2 is not set +# CONFIG_NRFX_PRS_BOX_3 is not set +# CONFIG_NRFX_PRS_BOX_4 is not set +# end of Peripheral Resource Sharing module +# end of nrfx drivers +# end of hal_nordic (/home/mike/Documents/ncs/v2.7.0/modules/hal/nordic) + +# +# hal_st (/home/mike/Documents/ncs/v2.7.0/modules/hal/st) +# +CONFIG_ZEPHYR_HAL_ST_MODULE=y +# end of hal_st (/home/mike/Documents/ncs/v2.7.0/modules/hal/st) + +CONFIG_ZEPHYR_HAL_WURTHELEKTRONIK_MODULE=y +CONFIG_ZEPHYR_LIBMETAL_MODULE=y + +# +# liblc3 (/home/mike/Documents/ncs/v2.7.0/modules/lib/liblc3) +# +CONFIG_ZEPHYR_LIBLC3_MODULE=y +# CONFIG_LIBLC3 is not set +# end of liblc3 (/home/mike/Documents/ncs/v2.7.0/modules/lib/liblc3) + +# +# littlefs (/home/mike/Documents/ncs/v2.7.0/modules/fs/littlefs) +# +CONFIG_ZEPHYR_LITTLEFS_MODULE=y +# end of littlefs (/home/mike/Documents/ncs/v2.7.0/modules/fs/littlefs) + +# +# loramac-node (/home/mike/Documents/ncs/v2.7.0/modules/lib/loramac-node) +# +CONFIG_ZEPHYR_LORAMAC_NODE_MODULE=y +# CONFIG_HAS_SEMTECH_RADIO_DRIVERS is not set +# end of loramac-node (/home/mike/Documents/ncs/v2.7.0/modules/lib/loramac-node) + +# +# lvgl (/home/mike/Documents/ncs/v2.7.0/modules/lib/gui/lvgl) +# +CONFIG_ZEPHYR_LVGL_MODULE=y +# end of lvgl (/home/mike/Documents/ncs/v2.7.0/modules/lib/gui/lvgl) + +CONFIG_ZEPHYR_MIPI_SYS_T_MODULE=y +CONFIG_ZEPHYR_NRF_HW_MODELS_MODULE=y +CONFIG_ZEPHYR_OPEN_AMP_MODULE=y + +# +# picolibc (/home/mike/Documents/ncs/v2.7.0/modules/lib/picolibc) +# +# CONFIG_PICOLIBC_MODULE is not set +CONFIG_ZEPHYR_PICOLIBC_MODULE=y +# end of picolibc (/home/mike/Documents/ncs/v2.7.0/modules/lib/picolibc) + +# +# segger (/home/mike/Documents/ncs/v2.7.0/modules/debug/segger) +# +CONFIG_ZEPHYR_SEGGER_MODULE=y +CONFIG_HAS_SEGGER_RTT=y +# CONFIG_USE_SEGGER_RTT is not set +# end of segger (/home/mike/Documents/ncs/v2.7.0/modules/debug/segger) + +CONFIG_ZEPHYR_TINYCRYPT_MODULE=y + +# +# uoscore-uedhoc (/home/mike/Documents/ncs/v2.7.0/modules/lib/uoscore-uedhoc) +# +CONFIG_ZEPHYR_UOSCORE_UEDHOC_MODULE=y +# end of uoscore-uedhoc (/home/mike/Documents/ncs/v2.7.0/modules/lib/uoscore-uedhoc) + +# +# zcbor (/home/mike/Documents/ncs/v2.7.0/modules/lib/zcbor) +# +CONFIG_ZEPHYR_ZCBOR_MODULE=y +# CONFIG_ZCBOR is not set +# end of zcbor (/home/mike/Documents/ncs/v2.7.0/modules/lib/zcbor) + +# +# nrfxlib (/home/mike/Documents/ncs/v2.7.0/nrfxlib) +# + +# +# Nordic nrfxlib +# + +# +# nrf_modem (Modem library) +# +# end of nrf_modem (Modem library) + +CONFIG_NRF_MODEM_SHMEM_CTRL_SIZE=0x4e8 +# CONFIG_NFC_T2T_NRFXLIB is not set +# CONFIG_NFC_T4T_NRFXLIB is not set + +# +# Crypto libraries for nRF5x SOCs. +# +CONFIG_HAS_HW_NRF_CC3XX=y +# CONFIG_NRF_OBERON is not set +CONFIG_NRF_CC3XX_PLATFORM=y +CONFIG_CC3XX_MUTEX_LOCK=y +# CONFIG_CC3XX_ATOMIC_LOCK is not set +# end of Crypto libraries for nRF5x SOCs. + +# CONFIG_NRF_RPC is not set +CONFIG_NRF_802154_SOURCE_NRFXLIB=y +# CONFIG_NRF_DM is not set +# CONFIG_SW_CODEC_LC3_T2_SOFTWARE is not set +# CONFIG_NRF_FUEL_GAUGE is not set +# end of Nordic nrfxlib + +CONFIG_ZEPHYR_NRFXLIB_MODULE=y +# end of nrfxlib (/home/mike/Documents/ncs/v2.7.0/nrfxlib) + +# +# connectedhomeip (/home/mike/Documents/ncs/v2.7.0/modules/lib/matter) +# +# CONFIG_CHIP is not set +CONFIG_ZEPHYR_CONNECTEDHOMEIP_MODULE=y +# end of connectedhomeip (/home/mike/Documents/ncs/v2.7.0/modules/lib/matter) + +# CONFIG_LIBMETAL is not set +# CONFIG_LVGL is not set +# CONFIG_HAS_MEC_HAL is not set +# CONFIG_HAS_MPFS_HAL is not set +# CONFIG_HAS_MEC5_HAL is not set +# CONFIG_OPENAMP is not set +# CONFIG_MIPI_SYST_LIB is not set +# CONFIG_HAS_TELINK_DRIVERS is not set +CONFIG_MCUBOOT_BOOTUTIL_LIB=y +# CONFIG_WIFI_NM_WPA_SUPPLICANT is not set + +# +# Unavailable modules, please install those via the project manifest. +# + +# +# hal_gigadevice module not available. +# + +# +# Trusted-firmware-a module not available. +# + +# +# THRIFT module not available. +# +# CONFIG_ACPI is not set +# end of Modules + +CONFIG_BOARD="conexio_stratus_pro" +CONFIG_BOARD_REVISION="" +CONFIG_BOARD_TARGET="conexio_stratus_pro/nrf9151" +# CONFIG_NET_DRIVERS is not set +CONFIG_BOARD_CONEXIO_STRATUS_PRO=y +CONFIG_BOARD_CONEXIO_STRATUS_PRO_NRF9151=y +CONFIG_BOARD_QUALIFIERS="nrf9151" + +# +# Board Options +# +# end of Board Options + +# +# Hardware Configuration +# +CONFIG_SOC_FAMILY="nordic_nrf" +CONFIG_SOC_FAMILY_NORDIC_NRF=y +CONFIG_SOC_SERIES_NRF91X=y +CONFIG_SOC_NRF9120=y +CONFIG_SOC_NRF9151_LACA=y +# CONFIG_MFD is not set +# CONFIG_BUILD_OUTPUT_INFO_HEADER is not set +CONFIG_HAS_HW_NRF_CC310=y +CONFIG_HAS_HW_NRF_CLOCK=y +CONFIG_HAS_HW_NRF_CTRLAP=y +CONFIG_HAS_HW_NRF_DPPIC=y +CONFIG_HAS_HW_NRF_EGU0=y +CONFIG_HAS_HW_NRF_EGU1=y +CONFIG_HAS_HW_NRF_EGU2=y +CONFIG_HAS_HW_NRF_EGU3=y +CONFIG_HAS_HW_NRF_EGU4=y +CONFIG_HAS_HW_NRF_EGU5=y +CONFIG_HAS_HW_NRF_GPIO0=y +CONFIG_HAS_HW_NRF_GPIOTE0=y +CONFIG_HAS_HW_NRF_IPC=y +CONFIG_HAS_HW_NRF_KMU=y +CONFIG_HAS_HW_NRF_NVMC_PE=y +CONFIG_HAS_HW_NRF_POWER=y +CONFIG_HAS_HW_NRF_PWM0=y +CONFIG_HAS_HW_NRF_REGULATORS=y +CONFIG_HAS_HW_NRF_SAADC=y +CONFIG_HAS_HW_NRF_SPU=y +CONFIG_HAS_HW_NRF_TWIM2=y +CONFIG_HAS_HW_NRF_UARTE0=y +CONFIG_HAS_HW_NRF_VMC=y +CONFIG_HAS_HW_NRF_WDT0=y +CONFIG_NRF_ENABLE_ICACHE=y +CONFIG_NRF_SPU_FLASH_REGION_ALIGNMENT=0x8000 +CONFIG_NRF_SPU_RAM_REGION_SIZE=0x2000 +CONFIG_NRF_SPU_RAM_REGION_ALIGNMENT=0x2000 +CONFIG_NRF_RTC_TIMER_USER_CHAN_COUNT=0 +CONFIG_NRF_SOC_SECURE_SUPPORTED=y +CONFIG_NRF_APPROTECT_USE_UICR=y +# CONFIG_NRF_APPROTECT_LOCK is not set +# CONFIG_NRF_APPROTECT_USER_HANDLING is not set +# CONFIG_NRF_TRACE_PORT is not set +CONFIG_GPIO_INIT_PRIORITY=40 +# CONFIG_SOC_LOG_LEVEL_OFF is not set +# CONFIG_SOC_LOG_LEVEL_ERR is not set +# CONFIG_SOC_LOG_LEVEL_WRN is not set +# CONFIG_SOC_LOG_LEVEL_INF is not set +# CONFIG_SOC_LOG_LEVEL_DBG is not set +CONFIG_SOC_LOG_LEVEL_DEFAULT=y +CONFIG_SOC_LOG_LEVEL=0 +# end of Hardware Configuration + +CONFIG_SOC_COMPATIBLE_NRF=y +CONFIG_ARCH="arm" +CONFIG_ARCH_HAS_SINGLE_THREAD_SUPPORT=y +# CONFIG_EXTRA_EXCEPTION_INFO is not set +CONFIG_CPU_CORTEX=y +# CONFIG_ARM_MPU is not set +CONFIG_ARM_MPU_REGION_MIN_ALIGN_AND_SIZE=4 +# CONFIG_MPU_ALLOW_FLASH_WRITE is not set + +# +# ARM Options +# +CONFIG_CPU_CORTEX_M=y +# CONFIG_ARM_ZIMAGE_HEADER is not set +CONFIG_ISA_THUMB2=y +CONFIG_ASSEMBLER_ISA_THUMB2=y +CONFIG_COMPILER_ISA_THUMB2=y +CONFIG_STACK_ALIGN_DOUBLE_WORD=y +# CONFIG_RUNTIME_NMI is not set +CONFIG_FAULT_DUMP=2 +CONFIG_BUILTIN_STACK_GUARD=y +CONFIG_ARM_STACK_PROTECTION=y +CONFIG_FP_HARDABI=y +# CONFIG_FP_SOFTABI is not set +CONFIG_FP16=y +CONFIG_FP16_IEEE=y +# CONFIG_FP16_ALT is not set +CONFIG_CPU_CORTEX_M33=y +CONFIG_CPU_CORTEX_M_HAS_SYSTICK=y +CONFIG_CPU_CORTEX_M_HAS_DWT=y +CONFIG_CPU_CORTEX_M_HAS_BASEPRI=y +CONFIG_CPU_CORTEX_M_HAS_VTOR=y +CONFIG_CPU_CORTEX_M_HAS_SPLIM=y +CONFIG_CPU_CORTEX_M_HAS_PROGRAMMABLE_FAULT_PRIOS=y +CONFIG_CPU_CORTEX_M_HAS_CMSE=y +CONFIG_ARMV7_M_ARMV8_M_MAINLINE=y +CONFIG_ARMV8_M_MAINLINE=y +CONFIG_ARMV8_M_SE=y +CONFIG_ARMV7_M_ARMV8_M_FP=y +CONFIG_ARMV8_M_DSP=y + +# +# ARM Cortex-M0/M0+/M1/M3/M4/M7/M23/M33/M55 options +# +# CONFIG_ZERO_LATENCY_IRQS is not set +# CONFIG_SW_VECTOR_RELAY is not set +# CONFIG_CORTEX_M_DWT is not set +# CONFIG_CORTEX_M_DEBUG_MONITOR_HOOK is not set +# CONFIG_TRAP_UNALIGNED_ACCESS is not set +# end of ARM Cortex-M0/M0+/M1/M3/M4/M7/M23/M33/M55 options + +CONFIG_NULL_POINTER_EXCEPTION_DETECTION_NONE=y +# CONFIG_NULL_POINTER_EXCEPTION_DETECTION_DWT is not set +CONFIG_ARM_TRUSTZONE_M=y +CONFIG_CPU_HAS_NRF_IDAU=y +# end of ARM Options + +CONFIG_ARM=y +CONFIG_ARCH_IS_SET=y + +# +# General Architecture Options +# +# CONFIG_SEMIHOST is not set +# CONFIG_ARCH_LOG_LEVEL_OFF is not set +# CONFIG_ARCH_LOG_LEVEL_ERR is not set +# CONFIG_ARCH_LOG_LEVEL_WRN is not set +# CONFIG_ARCH_LOG_LEVEL_INF is not set +# CONFIG_ARCH_LOG_LEVEL_DBG is not set +CONFIG_ARCH_LOG_LEVEL_DEFAULT=y +CONFIG_ARCH_LOG_LEVEL=0 +CONFIG_LITTLE_ENDIAN=y +# CONFIG_TRUSTED_EXECUTION_SECURE is not set +# CONFIG_TRUSTED_EXECUTION_NONSECURE is not set +CONFIG_GEN_PRIV_STACKS=y +# CONFIG_STACK_GROWS_UP is not set + +# +# Interrupt Configuration +# +CONFIG_ISR_TABLES_LOCAL_DECLARATION_SUPPORTED=y +# CONFIG_ISR_TABLES_LOCAL_DECLARATION is not set +CONFIG_IRQ_VECTOR_TABLE_JUMP_BY_ADDRESS=y +# CONFIG_IRQ_VECTOR_TABLE_JUMP_BY_CODE is not set +CONFIG_EXCEPTION_DEBUG=y +# CONFIG_SIMPLIFIED_EXCEPTION_CODES is not set +# end of Interrupt Configuration +# end of General Architecture Options + +CONFIG_ARCH_HAS_TIMING_FUNCTIONS=y +CONFIG_ARCH_HAS_TRUSTED_EXECUTION=y +CONFIG_ARCH_HAS_STACK_PROTECTION=y +CONFIG_ARCH_HAS_RAMFUNC_SUPPORT=y +CONFIG_ARCH_HAS_NESTED_EXCEPTION_DETECTION=y +CONFIG_ARCH_SUPPORTS_COREDUMP=y +CONFIG_ARCH_SUPPORTS_ARCH_HW_INIT=y +CONFIG_ARCH_SUPPORTS_ROM_START=y +CONFIG_ARCH_HAS_EXTRA_EXCEPTION_INFO=y +CONFIG_ARCH_HAS_THREAD_LOCAL_STORAGE=y +CONFIG_ARCH_HAS_SUSPEND_TO_RAM=y +CONFIG_ARCH_HAS_THREAD_ABORT=y +CONFIG_ARCH_HAS_CODE_DATA_RELOCATION=y +CONFIG_CPU_HAS_TEE=y +CONFIG_CPU_HAS_FPU=y +CONFIG_CPU_HAS_MPU=y +# CONFIG_MPU is not set + +# +# DSP Options +# +# end of DSP Options + +# +# Floating Point Options +# +# end of Floating Point Options + +# +# Cache Options +# +# end of Cache Options + +CONFIG_TOOLCHAIN_HAS_BUILTIN_FFS=y +# CONFIG_ARCH_CPU_IDLE_CUSTOM is not set + +# +# General Kernel Options +# +# CONFIG_KERNEL_LOG_LEVEL_OFF is not set +# CONFIG_KERNEL_LOG_LEVEL_ERR is not set +# CONFIG_KERNEL_LOG_LEVEL_WRN is not set +# CONFIG_KERNEL_LOG_LEVEL_INF is not set +# CONFIG_KERNEL_LOG_LEVEL_DBG is not set +CONFIG_KERNEL_LOG_LEVEL_DEFAULT=y +CONFIG_KERNEL_LOG_LEVEL=0 +CONFIG_NUM_COOP_PRIORITIES=1 +CONFIG_NUM_PREEMPT_PRIORITIES=0 +CONFIG_MAIN_THREAD_PRIORITY=-2 +CONFIG_COOP_ENABLED=y +CONFIG_PRIORITY_CEILING=-127 +# CONFIG_SCHED_DEADLINE is not set +CONFIG_THREAD_STACK_INFO=y +# CONFIG_THREAD_CUSTOM_DATA is not set +# CONFIG_DYNAMIC_THREAD is not set +CONFIG_SCHED_DUMB=y +# CONFIG_SCHED_SCALABLE is not set +# CONFIG_SCHED_MULTIQ is not set +# CONFIG_WAITQ_SCALABLE is not set +CONFIG_WAITQ_DUMB=y + +# +# Misc Kernel related options +# +CONFIG_ERRNO=y +# end of Misc Kernel related options + +# +# Kernel Debugging and Metrics +# +# CONFIG_THREAD_MONITOR is not set +# CONFIG_THREAD_NAME is not set +# CONFIG_THREAD_RUNTIME_STATS is not set +# end of Kernel Debugging and Metrics + +# CONFIG_OBJ_CORE is not set + +# +# System Work Queue Options +# +# CONFIG_SYSTEM_WORKQUEUE_NO_YIELD is not set +# end of System Work Queue Options + +# +# Barrier Operations +# +CONFIG_BARRIER_OPERATIONS_ARCH=y +# end of Barrier Operations + +# +# Atomic Operations +# +CONFIG_ATOMIC_OPERATIONS_BUILTIN=y +# end of Atomic Operations + +# +# Timer API Options +# +# end of Timer API Options + +# +# Other Kernel Object Options +# +# CONFIG_POLL is not set +# CONFIG_MEM_SLAB_TRACE_MAX_UTILIZATION is not set +CONFIG_NUM_MBOX_ASYNC_MSGS=10 +# CONFIG_EVENTS is not set +# CONFIG_PIPES is not set +CONFIG_KERNEL_MEM_POOL=y +# CONFIG_HEAP_MEM_POOL_IGNORE_MIN is not set +# end of Other Kernel Object Options + +CONFIG_ARCH_HAS_CUSTOM_SWAP_TO_MAIN=y +CONFIG_SWAP_NONATOMIC=y +CONFIG_SYS_CLOCK_EXISTS=y +CONFIG_TIMEOUT_64BIT=y +CONFIG_SYS_CLOCK_MAX_TIMEOUT_DAYS=365 + +# +# Security Options +# +# end of Security Options + +# +# Memory Domains +# +# end of Memory Domains + +# +# SMP Options +# +CONFIG_MP_NUM_CPUS=1 +# CONFIG_TICKET_SPINLOCKS is not set +# end of SMP Options + +CONFIG_TOOLCHAIN_SUPPORTS_THREAD_LOCAL_STORAGE=y +# CONFIG_THREAD_LOCAL_STORAGE is not set +# end of General Kernel Options + +# +# Device Options +# +# CONFIG_DEVICE_DEPS is not set +# CONFIG_DEVICE_MUTABLE is not set +# end of Device Options + +# +# Initialization Priorities +# +CONFIG_KERNEL_INIT_PRIORITY_OBJECTS=30 +CONFIG_KERNEL_INIT_PRIORITY_DEFAULT=40 +CONFIG_KERNEL_INIT_PRIORITY_DEVICE=50 +CONFIG_APPLICATION_INIT_PRIORITY=90 +# end of Initialization Priorities + +# +# Virtual Memory Support +# +# end of Virtual Memory Support + +# +# Device Drivers +# +# CONFIG_ADC is not set +# CONFIG_AUDIO is not set +# CONFIG_AUXDISPLAY is not set +# CONFIG_BBRAM is not set +# CONFIG_CAN is not set +# CONFIG_CHARGER is not set +# CONFIG_CLOCK_CONTROL_LOG_LEVEL_OFF is not set +# CONFIG_CLOCK_CONTROL_LOG_LEVEL_ERR is not set +# CONFIG_CLOCK_CONTROL_LOG_LEVEL_WRN is not set +# CONFIG_CLOCK_CONTROL_LOG_LEVEL_INF is not set +# CONFIG_CLOCK_CONTROL_LOG_LEVEL_DBG is not set +CONFIG_CLOCK_CONTROL_LOG_LEVEL_DEFAULT=y +CONFIG_CLOCK_CONTROL_LOG_LEVEL=0 +CONFIG_CLOCK_CONTROL_NRF=y +# CONFIG_CLOCK_CONTROL_NRF_K32SRC_RC is not set +CONFIG_CLOCK_CONTROL_NRF_K32SRC_XTAL=y +# CONFIG_CLOCK_CONTROL_NRF_K32SRC_500PPM is not set +# CONFIG_CLOCK_CONTROL_NRF_K32SRC_250PPM is not set +# CONFIG_CLOCK_CONTROL_NRF_K32SRC_150PPM is not set +# CONFIG_CLOCK_CONTROL_NRF_K32SRC_100PPM is not set +# CONFIG_CLOCK_CONTROL_NRF_K32SRC_75PPM is not set +CONFIG_CLOCK_CONTROL_NRF_K32SRC_50PPM=y +# CONFIG_CLOCK_CONTROL_NRF_K32SRC_30PPM is not set +# CONFIG_CLOCK_CONTROL_NRF_K32SRC_20PPM is not set +CONFIG_CLOCK_CONTROL_NRF_ACCURACY=50 +# CONFIG_CLOCK_CONTROL_FIXED_RATE_CLOCK is not set +CONFIG_CONSOLE_INPUT_MAX_LINE_LEN=128 +CONFIG_CONSOLE_HAS_DRIVER=y +# CONFIG_CONSOLE_HANDLER is not set +CONFIG_CONSOLE_INIT_PRIORITY=60 +CONFIG_UART_CONSOLE=y +# CONFIG_UART_CONSOLE_DEBUG_SERVER_HOOKS is not set +# CONFIG_UART_CONSOLE_MCUMGR is not set +# CONFIG_RAM_CONSOLE is not set +# CONFIG_IPM_CONSOLE_SENDER is not set +# CONFIG_IPM_CONSOLE_RECEIVER is not set +# CONFIG_UART_MCUMGR is not set +# CONFIG_UART_CONSOLE_LOG_LEVEL_OFF is not set +# CONFIG_UART_CONSOLE_LOG_LEVEL_ERR is not set +# CONFIG_UART_CONSOLE_LOG_LEVEL_WRN is not set +# CONFIG_UART_CONSOLE_LOG_LEVEL_INF is not set +# CONFIG_UART_CONSOLE_LOG_LEVEL_DBG is not set +CONFIG_UART_CONSOLE_LOG_LEVEL_DEFAULT=y +CONFIG_UART_CONSOLE_LOG_LEVEL=0 +# CONFIG_GSM_MUX is not set +# CONFIG_EFI_CONSOLE is not set +# CONFIG_COREDUMP_DEVICE is not set +# CONFIG_CRYPTO is not set +# CONFIG_DAC is not set +# CONFIG_DAI is not set +# CONFIG_DISK_DRIVERS is not set +# CONFIG_DISPLAY is not set +# CONFIG_DMA is not set +# CONFIG_EDAC is not set +# CONFIG_EEPROM is not set +# CONFIG_ENTROPY_GENERATOR is not set +# CONFIG_ESPI is not set +CONFIG_FLASH_HAS_DRIVER_ENABLED=y +CONFIG_FLASH_HAS_PAGE_LAYOUT=y +CONFIG_FLASH=y +# CONFIG_FLASH_LOG_LEVEL_OFF is not set +# CONFIG_FLASH_LOG_LEVEL_ERR is not set +# CONFIG_FLASH_LOG_LEVEL_WRN is not set +# CONFIG_FLASH_LOG_LEVEL_INF is not set +# CONFIG_FLASH_LOG_LEVEL_DBG is not set +CONFIG_FLASH_LOG_LEVEL_DEFAULT=y +CONFIG_FLASH_LOG_LEVEL=0 +CONFIG_FLASH_PAGE_LAYOUT=y +CONFIG_SOC_FLASH_NRF=y +CONFIG_SOC_FLASH_NRF_RADIO_SYNC_NONE=y +# CONFIG_SOC_FLASH_NRF_PARTIAL_ERASE is not set +# CONFIG_SOC_FLASH_NRF_UICR is not set +# CONFIG_SOC_FLASH_NRF_EMULATE_ONE_BYTE_WRITE_ACCESS is not set +# CONFIG_FPGA is not set +# CONFIG_FUEL_GAUGE is not set +# CONFIG_GNSS is not set +# CONFIG_GPIO_LOG_LEVEL_OFF is not set +# CONFIG_GPIO_LOG_LEVEL_ERR is not set +# CONFIG_GPIO_LOG_LEVEL_WRN is not set +# CONFIG_GPIO_LOG_LEVEL_INF is not set +# CONFIG_GPIO_LOG_LEVEL_DBG is not set +CONFIG_GPIO_LOG_LEVEL_DEFAULT=y +CONFIG_GPIO_LOG_LEVEL=0 +# CONFIG_GPIO_GET_DIRECTION is not set +# CONFIG_GPIO_GET_CONFIG is not set +# CONFIG_GPIO_HOGS is not set +# CONFIG_GPIO_ENABLE_DISABLE_INTERRUPT is not set +CONFIG_GPIO_NRFX=y +CONFIG_GPIO_NRFX_INTERRUPT=y +# CONFIG_HWINFO is not set +# CONFIG_HWSPINLOCK is not set +# CONFIG_I2C is not set +# CONFIG_I2S is not set +# CONFIG_I3C is not set + +# +# Interrupt controller drivers +# +CONFIG_INTC_INIT_PRIORITY=40 +# CONFIG_INTC_LOG_LEVEL_OFF is not set +# CONFIG_INTC_LOG_LEVEL_ERR is not set +# CONFIG_INTC_LOG_LEVEL_WRN is not set +# CONFIG_INTC_LOG_LEVEL_INF is not set +# CONFIG_INTC_LOG_LEVEL_DBG is not set +CONFIG_INTC_LOG_LEVEL_DEFAULT=y +CONFIG_INTC_LOG_LEVEL=0 +# CONFIG_INTC_ESP32 is not set +# end of Interrupt controller drivers + +# CONFIG_IPM is not set +# CONFIG_KSCAN is not set +# CONFIG_LED is not set +# CONFIG_LED_STRIP is not set +# CONFIG_LORA is not set +# CONFIG_MDIO is not set +# CONFIG_MIPI_DBI is not set + +# +# Miscellaneous Drivers +# +# CONFIG_TIMEAWARE_GPIO is not set +# end of Miscellaneous Drivers + +# CONFIG_MM_DRV is not set +# CONFIG_PCIE is not set +# CONFIG_PCIE_ENDPOINT is not set +# CONFIG_PECI is not set +# CONFIG_PINCTRL_LOG_LEVEL_OFF is not set +# CONFIG_PINCTRL_LOG_LEVEL_ERR is not set +# CONFIG_PINCTRL_LOG_LEVEL_WRN is not set +# CONFIG_PINCTRL_LOG_LEVEL_INF is not set +# CONFIG_PINCTRL_LOG_LEVEL_DBG is not set +CONFIG_PINCTRL_LOG_LEVEL_DEFAULT=y +CONFIG_PINCTRL_LOG_LEVEL=0 +CONFIG_PINCTRL_STORE_REG=y +# CONFIG_PINCTRL_DYNAMIC is not set +CONFIG_PINCTRL_NRF=y +# CONFIG_PM_CPU_OPS is not set +# CONFIG_PS2 is not set +# CONFIG_PTP_CLOCK is not set +# CONFIG_PWM is not set +# CONFIG_REGULATOR is not set +# CONFIG_RETAINED_MEM is not set +# CONFIG_RTC is not set +# CONFIG_SDHC is not set + +# +# Capabilities +# +CONFIG_SERIAL_HAS_DRIVER=y +CONFIG_SERIAL_SUPPORT_ASYNC=y +CONFIG_SERIAL_SUPPORT_INTERRUPT=y +# CONFIG_UART_LOG_LEVEL_OFF is not set +# CONFIG_UART_LOG_LEVEL_ERR is not set +# CONFIG_UART_LOG_LEVEL_WRN is not set +# CONFIG_UART_LOG_LEVEL_INF is not set +# CONFIG_UART_LOG_LEVEL_DBG is not set +CONFIG_UART_LOG_LEVEL_DEFAULT=y +CONFIG_UART_LOG_LEVEL=0 +# CONFIG_UART_ASYNC_API is not set +# CONFIG_UART_LINE_CTRL is not set +# CONFIG_UART_DRV_CMD is not set +# CONFIG_UART_WIDE_DATA is not set +# CONFIG_UART_PIPE is not set +# CONFIG_UART_ASYNC_RX_HELPER is not set + +# +# Serial Drivers +# +CONFIG_UART_NRFX=y +CONFIG_UART_NRFX_UARTE=y +CONFIG_UART_NRFX_UARTE_LEGACY_SHIM=y +CONFIG_UART_0_ENHANCED_POLL_OUT=y +# CONFIG_UART_0_NRF_PARITY_BIT is not set +CONFIG_UART_0_NRF_TX_BUFFER_SIZE=32 +# CONFIG_SMBUS is not set + +# +# Timer drivers +# +# CONFIG_TIMER_READS_ITS_FREQUENCY_AT_RUNTIME is not set +# CONFIG_SYSTEM_CLOCK_SLOPPY_IDLE is not set +CONFIG_SYSTEM_CLOCK_INIT_PRIORITY=0 +CONFIG_TICKLESS_CAPABLE=y +CONFIG_SYSTEM_TIMER_HAS_DISABLE_SUPPORT=y +# CONFIG_NRF_RTC_TIMER_TRIGGER_OVERFLOW is not set +# CONFIG_SYSTEM_CLOCK_NO_WAIT is not set +# CONFIG_SYSTEM_CLOCK_WAIT_FOR_AVAILABILITY is not set +CONFIG_SYSTEM_CLOCK_WAIT_FOR_STABILITY=y +# end of Timer drivers + +# CONFIG_USB_BC12 is not set +# CONFIG_UDC_DRIVER is not set +# CONFIG_UHC_DRIVER is not set +# CONFIG_UVB is not set +# CONFIG_USB_DEVICE_DRIVER is not set +# CONFIG_NRF_USBD_COMMON_LOG_LEVEL_OFF is not set +# CONFIG_NRF_USBD_COMMON_LOG_LEVEL_ERR is not set +# CONFIG_NRF_USBD_COMMON_LOG_LEVEL_WRN is not set +# CONFIG_NRF_USBD_COMMON_LOG_LEVEL_INF is not set +# CONFIG_NRF_USBD_COMMON_LOG_LEVEL_DBG is not set +CONFIG_NRF_USBD_COMMON_LOG_LEVEL_DEFAULT=y +CONFIG_NRF_USBD_COMMON_LOG_LEVEL=0 +# CONFIG_USBC_TCPC_DRIVER is not set +# CONFIG_USBC_LOG_LEVEL_OFF is not set +# CONFIG_USBC_LOG_LEVEL_ERR is not set +# CONFIG_USBC_LOG_LEVEL_WRN is not set +# CONFIG_USBC_LOG_LEVEL_INF is not set +# CONFIG_USBC_LOG_LEVEL_DBG is not set +CONFIG_USBC_LOG_LEVEL_DEFAULT=y +CONFIG_USBC_LOG_LEVEL=0 +# CONFIG_USBC_VBUS_DRIVER is not set +# CONFIG_USBC_PPC_DRIVER is not set +# CONFIG_VIDEO is not set +# CONFIG_VIRTUALIZATION is not set +# CONFIG_W1 is not set +# end of Device Drivers + +# CONFIG_REQUIRES_FULL_LIBC is not set +# CONFIG_REQUIRES_FLOAT_PRINTF is not set +CONFIG_FULL_LIBC_SUPPORTED=y +CONFIG_MINIMAL_LIBC_SUPPORTED=y +CONFIG_NEWLIB_LIBC_SUPPORTED=y +CONFIG_PICOLIBC_SUPPORTED=y + +# +# C Library +# +CONFIG_MINIMAL_LIBC=y +# CONFIG_PICOLIBC is not set +# CONFIG_NEWLIB_LIBC is not set +# CONFIG_EXTERNAL_LIBC is not set +CONFIG_HAS_NEWLIB_LIBC_NANO=y +CONFIG_COMMON_LIBC_ABORT=y +CONFIG_COMMON_LIBC_GMTIME_R=y +CONFIG_COMMON_LIBC_MALLOC=y +CONFIG_COMMON_LIBC_CALLOC=y +CONFIG_COMMON_LIBC_REALLOCARRAY=y +CONFIG_COMMON_LIBC_STRNLEN=y +CONFIG_MINIMAL_LIBC_NON_REENTRANT_FUNCTIONS=y +CONFIG_MINIMAL_LIBC_MALLOC=y +CONFIG_MINIMAL_LIBC_MALLOC_ARENA_SIZE=-2 +CONFIG_MINIMAL_LIBC_CALLOC=y +CONFIG_MINIMAL_LIBC_REALLOCARRAY=y +# CONFIG_MINIMAL_LIBC_LL_PRINTF is not set +# CONFIG_MINIMAL_LIBC_RAND is not set +CONFIG_MINIMAL_LIBC_TIME=y +# CONFIG_MINIMAL_LIBC_STRING_ERROR_TABLE is not set +CONFIG_STDOUT_CONSOLE=y +CONFIG_NEED_LIBC_MEM_PARTITION=y +# end of C Library + +# +# C++ Language Support +# +# CONFIG_CPP is not set + +# +# Deprecated +# +# CONFIG_CPLUSPLUS is not set +# CONFIG_LIB_CPLUSPLUS is not set +# end of Deprecated +# end of C++ Language Support + +# CONFIG_CRC is not set + +# +# Additional libraries +# + +# +# Hash Function Support +# +# CONFIG_SYS_HASH_FUNC32 is not set +# end of Hash Function Support + +# +# Hashmap (Hash Table) Support +# +# CONFIG_SYS_HASH_MAP is not set +# end of Hashmap (Hash Table) Support + +# +# Heap and Memory Allocation +# +# CONFIG_SYS_HEAP_VALIDATE is not set +# CONFIG_SYS_HEAP_STRESS is not set +# CONFIG_SYS_HEAP_INFO is not set +CONFIG_SYS_HEAP_ALLOC_LOOPS=3 +# CONFIG_SYS_HEAP_RUNTIME_STATS is not set +# CONFIG_SYS_HEAP_LISTENER is not set +# CONFIG_SYS_HEAP_SMALL_ONLY is not set +# CONFIG_SYS_HEAP_BIG_ONLY is not set +CONFIG_SYS_HEAP_AUTO=y +# CONFIG_MULTI_HEAP is not set +# CONFIG_SHARED_MULTI_HEAP is not set +# end of Heap and Memory Allocation + +# +# Memory Blocks +# +# CONFIG_SYS_MEM_BLOCKS is not set +# end of Memory Blocks + +# +# OS Support Library +# +# CONFIG_FDTABLE is not set +# CONFIG_PRINTK_SYNC is not set +# CONFIG_MPSC_PBUF is not set +# CONFIG_SPSC_PBUF is not set +CONFIG_HAS_POWEROFF=y +# CONFIG_POWEROFF is not set +# CONFIG_CBPRINTF_COMPLETE is not set +CONFIG_CBPRINTF_NANO=y +CONFIG_CBPRINTF_FULL_INTEGRAL=y +# CONFIG_CBPRINTF_REDUCED_INTEGRAL is not set +# CONFIG_CBPRINTF_FP_A_SUPPORT is not set +# CONFIG_CBPRINTF_FP_ALWAYS_A is not set +CONFIG_CBPRINTF_LIBC_SUBSTS=y +# CONFIG_CBPRINTF_PACKAGE_LOG_LEVEL_OFF is not set +# CONFIG_CBPRINTF_PACKAGE_LOG_LEVEL_ERR is not set +# CONFIG_CBPRINTF_PACKAGE_LOG_LEVEL_WRN is not set +# CONFIG_CBPRINTF_PACKAGE_LOG_LEVEL_INF is not set +# CONFIG_CBPRINTF_PACKAGE_LOG_LEVEL_DBG is not set +CONFIG_CBPRINTF_PACKAGE_LOG_LEVEL_DEFAULT=y +CONFIG_CBPRINTF_PACKAGE_LOG_LEVEL=0 +# CONFIG_CBPRINTF_PACKAGE_LONGDOUBLE is not set +# CONFIG_CBPRINTF_STATIC_PACKAGE_CHECK_ALIGNMENT is not set +CONFIG_CBPRINTF_CONVERT_CHECK_PTR=y +# end of OS Support Library + +# +# POSIX API Support +# + +# +# POSIX Options +# +# CONFIG_POSIX_API is not set +# CONFIG_POSIX_ASYNCHRONOUS_IO is not set +# CONFIG_POSIX_CLOCK is not set +# CONFIG_POSIX_CONFSTR is not set +# CONFIG_POSIX_ENV is not set +# CONFIG_POSIX_ENV_LOG_LEVEL_OFF is not set +# CONFIG_POSIX_ENV_LOG_LEVEL_ERR is not set +# CONFIG_POSIX_ENV_LOG_LEVEL_WRN is not set +# CONFIG_POSIX_ENV_LOG_LEVEL_INF is not set +# CONFIG_POSIX_ENV_LOG_LEVEL_DBG is not set +CONFIG_POSIX_ENV_LOG_LEVEL_DEFAULT=y +CONFIG_POSIX_ENV_LOG_LEVEL=0 +# CONFIG_EVENTFD is not set + +# +# File descriptor table options +# +# end of File descriptor table options + +# CONFIG_FNMATCH is not set +# CONFIG_POSIX_MQUEUE is not set + +# +# sem_t support +# +CONFIG_SEM_VALUE_MAX=32767 +CONFIG_SEM_NAMELEN_MAX=16 +# end of sem_t support + +# +# Signal support +# +CONFIG_POSIX_RTSIG_MAX=0 +# CONFIG_POSIX_SIGNAL is not set +# end of Signal support + +# CONFIG_POSIX_PUTMSG is not set + +# +# Sysconf support +# +# CONFIG_POSIX_SYSCONF is not set +CONFIG_POSIX_PAGE_SIZE_BITS=6 +# end of Sysconf support + +# CONFIG_POSIX_SYSLOG is not set +# CONFIG_TIMER is not set +# CONFIG_POSIX_UNAME is not set +# end of POSIX Options + +# +# POSIX Shell Utilities +# +# end of POSIX Shell Utilities +# end of POSIX API Support + +# CONFIG_OPENAMP_RSC_TABLE is not set +# CONFIG_SMF is not set +CONFIG_LIBGCC_RTLIB=y + +# +# Utility Library +# +# CONFIG_JSON_LIBRARY is not set +# CONFIG_RING_BUFFER is not set +CONFIG_NOTIFY=y +# CONFIG_BASE64 is not set +CONFIG_ONOFF=y +# CONFIG_WINSTREAM is not set +# CONFIG_UTF8 is not set +# end of Utility Library +# end of Additional libraries + +# +# Subsystems and OS Services +# +# CONFIG_BINDESC is not set +# CONFIG_BT is not set + +# +# Controller Area Network (CAN) bus subsystem +# +# end of Controller Area Network (CAN) bus subsystem + +# CONFIG_CONSOLE_SUBSYS is not set + +# +# System Monitoring Options +# +# CONFIG_THREAD_ANALYZER is not set +# end of System Monitoring Options + +# +# Debugging Options +# +# CONFIG_DEBUG is not set +# CONFIG_STACK_USAGE is not set +CONFIG_PRINTK=y +CONFIG_EARLY_CONSOLE=y +# CONFIG_ASSERT is not set +# CONFIG_FORCE_NO_ASSERT is not set +CONFIG_ASSERT_VERBOSE=y +# CONFIG_ASSERT_NO_FILE_INFO is not set +# CONFIG_ASSERT_NO_COND_INFO is not set +# CONFIG_ASSERT_NO_MSG_INFO is not set +# CONFIG_ASSERT_TEST is not set +# CONFIG_OVERRIDE_FRAME_POINTER_DEFAULT is not set +# CONFIG_DEBUG_INFO is not set +# CONFIG_DEBUG_THREAD_INFO is not set +# CONFIG_DEBUG_COREDUMP is not set +# end of Debugging Options + +# CONFIG_MIPI_STP_DECODER is not set +# CONFIG_DISK_ACCESS is not set +# CONFIG_DSP is not set +# CONFIG_EMUL is not set +# CONFIG_CHARACTER_FRAMEBUFFER is not set + +# +# File Systems +# +# CONFIG_FILE_SYSTEM is not set +# CONFIG_FCB is not set +# CONFIG_NVS is not set +# end of File Systems + +# +# Inter Processor Communication +# +# CONFIG_RPMSG_SERVICE is not set +# CONFIG_IPC_SERVICE is not set +# end of Inter Processor Communication + +# CONFIG_JWT is not set +# CONFIG_LLEXT is not set + +# +# Linkable loadable Extension Development Kit (EDK) +# +CONFIG_LLEXT_EDK_NAME="llext-edk" +# CONFIG_LLEXT_EDK_USERSPACE_ONLY is not set +# end of Linkable loadable Extension Development Kit (EDK) + +# +# Logging +# +CONFIG_LOG_CORE_INIT_PRIORITY=0 +# CONFIG_LOG_MODE_DEFERRED is not set +# CONFIG_LOG_MODE_IMMEDIATE is not set +CONFIG_LOG_MODE_MINIMAL=y +# CONFIG_LOG_FRONTEND is not set +# CONFIG_LOG_FRONTEND_OPT_API is not set +# CONFIG_LOG_CUSTOM_HEADER is not set +# CONFIG_LOG_MULTIDOMAIN is not set + +# +# Logging levels filtering +# +CONFIG_LOG_DEFAULT_LEVEL=0 +CONFIG_LOG_OVERRIDE_LEVEL=0 +CONFIG_LOG_MAX_LEVEL=4 +# end of Logging levels filtering + +# +# Processing +# +# end of Processing + +# +# Misc +# +CONFIG_LOG_USE_VLA=y +CONFIG_LOG_SIMPLE_MSG_OPTIMIZE=y +# CONFIG_LOG_ALWAYS_RUNTIME is not set +# CONFIG_LOG_FMT_SECTION is not set +# CONFIG_LOG_FMT_STRING_VALIDATE is not set +# CONFIG_LOG_USE_TAGGED_ARGUMENTS is not set +# end of Misc + +# CONFIG_LOG_OUTPUT is not set +# end of Logging + +# CONFIG_MEM_ATTR is not set + +# +# Device Management +# + +# +# Host command handler subsystem +# +# CONFIG_EC_HOST_CMD is not set +# end of Host command handler subsystem + +# CONFIG_OSDP is not set +# end of Device Management + +# CONFIG_MODBUS is not set +# CONFIG_MODEM_MODULES is not set + +# +# Networking +# +# CONFIG_NET_BUF is not set +# CONFIG_NETWORKING is not set +# end of Networking + +# +# Power Management +# +# end of Power Management + +# +# Portability +# +# end of Portability + +# +# Random Number Generators +# +# CONFIG_TEST_RANDOM_GENERATOR is not set +CONFIG_TIMER_RANDOM_INITIAL_STATE=123456789 +# end of Random Number Generators + +# CONFIG_RTIO is not set + +# +# SD +# +# CONFIG_MMC_STACK is not set +# CONFIG_SDMMC_STACK is not set +# CONFIG_SDIO_STACK is not set +# end of SD + +# CONFIG_SETTINGS is not set +# CONFIG_SHELL is not set +# CONFIG_STATS is not set + +# +# Storage +# +CONFIG_FLASH_MAP=y +# CONFIG_FLASH_AREA_CHECK_INTEGRITY is not set +# CONFIG_FLASH_MAP_LABELS is not set +# CONFIG_STREAM_FLASH is not set +# end of Storage + +# CONFIG_TASK_WDT is not set + +# +# Testing +# +# CONFIG_ZTEST is not set +# CONFIG_ZTEST_MOCKING is not set +# CONFIG_ZTRESS is not set +# CONFIG_TEST is not set +CONFIG_COVERAGE_GCOV_HEAP_SIZE=16384 +# CONFIG_FORCE_COVERAGE is not set +# CONFIG_TEST_USERSPACE is not set +# end of Testing + +# CONFIG_TIMING_FUNCTIONS is not set +# CONFIG_TRACING is not set +# CONFIG_USB_DEVICE_STACK is not set +# CONFIG_USB_DEVICE_STACK_NEXT is not set +# CONFIG_USB_HOST_STACK is not set +# CONFIG_USBC_STACK is not set +# CONFIG_MODULES is not set +# end of Subsystems and OS Services + +CONFIG_TOOLCHAIN_ZEPHYR_0_16=y +CONFIG_TOOLCHAIN_ZEPHYR_SUPPORTS_THREAD_LOCAL_STORAGE=y + +# +# Build and Link Features +# + +# +# Linker Options +# +# CONFIG_LINKER_ORPHAN_SECTION_PLACE is not set +CONFIG_LINKER_ORPHAN_SECTION_WARN=y +# CONFIG_LINKER_ORPHAN_SECTION_ERROR is not set +CONFIG_ROM_END_OFFSET=0 +CONFIG_LD_LINKER_SCRIPT_SUPPORTED=y +CONFIG_LD_LINKER_TEMPLATE=y +# CONFIG_CMAKE_LINKER_GENERATOR is not set +# CONFIG_HAVE_CUSTOM_LINKER_SCRIPT is not set +CONFIG_LINKER_SORT_BY_ALIGNMENT=y + +# +# Linker Sections +# +# CONFIG_LINKER_USE_BOOT_SECTION is not set +# CONFIG_LINKER_USE_PINNED_SECTION is not set +CONFIG_LINKER_GENERIC_SECTIONS_PRESENT_AT_BOOT=y +CONFIG_LINKER_LAST_SECTION_ID=y +CONFIG_LINKER_LAST_SECTION_ID_PATTERN=0xE015E015 +CONFIG_LINKER_USE_RELAX=y +# end of Linker Sections + +CONFIG_LINKER_ITERABLE_SUBALIGN=4 +CONFIG_LINKER_DEVNULL_SUPPORT=y +# CONFIG_LINKER_DEVNULL_MEMORY is not set +# end of Linker Options + +# +# Compiler Options +# +# CONFIG_STD_C90 is not set +CONFIG_STD_C99=y +# CONFIG_STD_C11 is not set +# CONFIG_STD_C17 is not set +# CONFIG_STD_C23 is not set +CONFIG_TOOLCHAIN_SUPPORTS_GNU_EXTENSIONS=y +# CONFIG_GNU_C_EXTENSIONS is not set +# CONFIG_CODING_GUIDELINE_CHECK is not set +CONFIG_COMPILER_FREESTANDING=y +CONFIG_SIZE_OPTIMIZATIONS=y +# CONFIG_SPEED_OPTIMIZATIONS is not set +# CONFIG_DEBUG_OPTIMIZATIONS is not set +# CONFIG_NO_OPTIMIZATIONS is not set +# CONFIG_COMPILER_WARNINGS_AS_ERRORS is not set +# CONFIG_COMPILER_SAVE_TEMPS is not set +CONFIG_COMPILER_TRACK_MACRO_EXPANSION=y +CONFIG_COMPILER_COLOR_DIAGNOSTICS=y +CONFIG_FORTIFY_SOURCE_NONE=y +# CONFIG_FORTIFY_SOURCE_COMPILE_TIME is not set +# CONFIG_FORTIFY_SOURCE_RUN_TIME is not set +CONFIG_COMPILER_OPT="" +# CONFIG_MISRA_SANE is not set +# end of Compiler Options + +# CONFIG_ASSERT_ON_ERRORS is not set +# CONFIG_NO_RUNTIME_CHECKS is not set +CONFIG_RUNTIME_ERROR_CHECKS=y + +# +# Build Options +# +CONFIG_KERNEL_BIN_NAME="zephyr" +CONFIG_OUTPUT_STAT=y +# CONFIG_OUTPUT_SYMBOLS is not set +# CONFIG_OUTPUT_DISASSEMBLY is not set +CONFIG_OUTPUT_PRINT_MEMORY_USAGE=y +# CONFIG_CLEANUP_INTERMEDIATE_FILES is not set +# CONFIG_BUILD_NO_GAP_FILL is not set +# CONFIG_BUILD_OUTPUT_EXE is not set +# CONFIG_BUILD_OUTPUT_S19 is not set +# CONFIG_BUILD_OUTPUT_UF2 is not set +# CONFIG_BUILD_OUTPUT_STRIPPED is not set +# CONFIG_BUILD_OUTPUT_COMPRESS_DEBUG_SECTIONS is not set +# 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b/nrfdemo/build/mcuboot/zephyr/arch/cmake_install.cmake @@ -0,0 +1,46 @@ +# Install script for directory: /home/mike/Documents/ncs/v2.7.0/zephyr/arch + +# Set the install prefix +if(NOT DEFINED CMAKE_INSTALL_PREFIX) + set(CMAKE_INSTALL_PREFIX "/usr/local") +endif() +string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}") + +# Set the install configuration name. +if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME) + if(BUILD_TYPE) + string(REGEX REPLACE "^[^A-Za-z0-9_]+" "" + CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}") + else() + set(CMAKE_INSTALL_CONFIG_NAME "") + endif() + message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"") +endif() + +# Set the component getting installed. +if(NOT CMAKE_INSTALL_COMPONENT) + if(COMPONENT) + message(STATUS "Install component: \"${COMPONENT}\"") + set(CMAKE_INSTALL_COMPONENT "${COMPONENT}") + else() + set(CMAKE_INSTALL_COMPONENT) + endif() +endif() + +# Is this installation the result of a crosscompile? +if(NOT DEFINED CMAKE_CROSSCOMPILING) + set(CMAKE_CROSSCOMPILING "TRUE") +endif() + +# Set default install directory permissions. +if(NOT DEFINED CMAKE_OBJDUMP) + set(CMAKE_OBJDUMP "/home/mike/ncs/toolchains/e9dba88316/opt/zephyr-sdk/arm-zephyr-eabi/bin/arm-zephyr-eabi-objdump") +endif() + +if(NOT CMAKE_INSTALL_LOCAL_ONLY) + # Include the install script for each subdirectory. + include("/home/mike/Documents/ncs/v2.7.0/conexio-firmware-sdk/samples/conexio_stratus/mqtt_control/build/mcuboot/zephyr/arch/common/cmake_install.cmake") + include("/home/mike/Documents/ncs/v2.7.0/conexio-firmware-sdk/samples/conexio_stratus/mqtt_control/build/mcuboot/zephyr/arch/arch/arm/cmake_install.cmake") + +endif() + diff --git a/nrfdemo/build/mcuboot/zephyr/arch/common/CMakeFiles/arch__common.dir/sw_isr_common.c.obj b/nrfdemo/build/mcuboot/zephyr/arch/common/CMakeFiles/arch__common.dir/sw_isr_common.c.obj Binary files differnew file mode 100644 index 0000000..16cdbef --- /dev/null +++ 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+# Set the install configuration name. +if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME) + if(BUILD_TYPE) + string(REGEX REPLACE "^[^A-Za-z0-9_]+" "" + CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}") + else() + set(CMAKE_INSTALL_CONFIG_NAME "") + endif() + message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"") +endif() + +# Set the component getting installed. +if(NOT CMAKE_INSTALL_COMPONENT) + if(COMPONENT) + message(STATUS "Install component: \"${COMPONENT}\"") + set(CMAKE_INSTALL_COMPONENT "${COMPONENT}") + else() + set(CMAKE_INSTALL_COMPONENT) + endif() +endif() + +# Is this installation the result of a crosscompile? +if(NOT DEFINED CMAKE_CROSSCOMPILING) + set(CMAKE_CROSSCOMPILING "TRUE") +endif() + +# Set default install directory permissions. +if(NOT DEFINED CMAKE_OBJDUMP) + set(CMAKE_OBJDUMP "/home/mike/ncs/toolchains/e9dba88316/opt/zephyr-sdk/arm-zephyr-eabi/bin/arm-zephyr-eabi-objdump") +endif() + diff --git a/nrfdemo/build/mcuboot/zephyr/arch/common/libarch__common.a b/nrfdemo/build/mcuboot/zephyr/arch/common/libarch__common.a Binary files differnew file mode 100644 index 0000000..e113550 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/arch/common/libarch__common.a diff --git a/nrfdemo/build/mcuboot/zephyr/arch/common/libisr_tables.a b/nrfdemo/build/mcuboot/zephyr/arch/common/libisr_tables.a Binary files differnew file mode 100644 index 0000000..c883d83 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/arch/common/libisr_tables.a diff --git a/nrfdemo/build/mcuboot/zephyr/autogen-pubkey.c b/nrfdemo/build/mcuboot/zephyr/autogen-pubkey.c new file mode 100644 index 0000000..6e1cf0e --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/autogen-pubkey.c @@ -0,0 +1,16 @@ +/* Autogenerated by imgtool.py, do not edit. */ +const unsigned char ecdsa_pub_key[] = { + 0x30, 0x59, 0x30, 0x13, 0x06, 0x07, 0x2a, 0x86, + 0x48, 0xce, 0x3d, 0x02, 0x01, 0x06, 0x08, 0x2a, + 0x86, 0x48, 0xce, 0x3d, 0x03, 0x01, 0x07, 0x03, + 0x42, 0x00, 0x04, 0x2a, 0xcb, 0x40, 0x3c, 0xe8, + 0xfe, 0xed, 0x5b, 0xa4, 0x49, 0x95, 0xa1, 0xa9, + 0x1d, 0xae, 0xe8, 0xdb, 0xbe, 0x19, 0x37, 0xcd, + 0x14, 0xfb, 0x2f, 0x24, 0x57, 0x37, 0xe5, 0x95, + 0x39, 0x88, 0xd9, 0x94, 0xb9, 0xd6, 0x5a, 0xeb, + 0xd7, 0xcd, 0xd5, 0x30, 0x8a, 0xd6, 0xfe, 0x48, + 0xb2, 0x4a, 0x6a, 0x81, 0x0e, 0xe5, 0xf0, 0x7d, + 0x8b, 0x68, 0x34, 0xcc, 0x3a, 0x6a, 0xfc, 0x53, + 0x8e, 0xfa, 0xc1, +}; +const unsigned int ecdsa_pub_key_len = 91; diff --git a/nrfdemo/build/mcuboot/zephyr/boards/cmake_install.cmake b/nrfdemo/build/mcuboot/zephyr/boards/cmake_install.cmake new file mode 100644 index 0000000..a021a8e --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/boards/cmake_install.cmake @@ -0,0 +1,39 @@ +# Install script for directory: /home/mike/Documents/ncs/v2.7.0/zephyr/boards + +# Set the install prefix +if(NOT DEFINED CMAKE_INSTALL_PREFIX) + set(CMAKE_INSTALL_PREFIX "/usr/local") +endif() +string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}") + +# Set the install configuration name. +if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME) + if(BUILD_TYPE) + string(REGEX REPLACE "^[^A-Za-z0-9_]+" "" + CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}") + else() + set(CMAKE_INSTALL_CONFIG_NAME "") + endif() + message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"") +endif() + +# Set the component getting installed. +if(NOT CMAKE_INSTALL_COMPONENT) + if(COMPONENT) + message(STATUS "Install component: \"${COMPONENT}\"") + set(CMAKE_INSTALL_COMPONENT "${COMPONENT}") + else() + set(CMAKE_INSTALL_COMPONENT) + endif() +endif() + +# Is this installation the result of a crosscompile? +if(NOT DEFINED CMAKE_CROSSCOMPILING) + set(CMAKE_CROSSCOMPILING "TRUE") +endif() + +# Set default install directory permissions. +if(NOT DEFINED CMAKE_OBJDUMP) + set(CMAKE_OBJDUMP "/home/mike/ncs/toolchains/e9dba88316/opt/zephyr-sdk/arm-zephyr-eabi/bin/arm-zephyr-eabi-objdump") +endif() + diff --git a/nrfdemo/build/mcuboot/zephyr/cmake/flash/cmake_install.cmake b/nrfdemo/build/mcuboot/zephyr/cmake/flash/cmake_install.cmake new file mode 100644 index 0000000..8028840 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/cmake/flash/cmake_install.cmake @@ -0,0 +1,39 @@ +# Install script for directory: /home/mike/Documents/ncs/v2.7.0/zephyr/cmake/flash + +# Set the install prefix +if(NOT DEFINED CMAKE_INSTALL_PREFIX) + set(CMAKE_INSTALL_PREFIX "/usr/local") +endif() +string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}") + +# Set the install configuration name. +if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME) + if(BUILD_TYPE) + string(REGEX REPLACE "^[^A-Za-z0-9_]+" "" + CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}") + else() + set(CMAKE_INSTALL_CONFIG_NAME "") + endif() + message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"") +endif() + +# Set the component getting installed. +if(NOT CMAKE_INSTALL_COMPONENT) + if(COMPONENT) + message(STATUS "Install component: \"${COMPONENT}\"") + set(CMAKE_INSTALL_COMPONENT "${COMPONENT}") + else() + set(CMAKE_INSTALL_COMPONENT) + endif() +endif() + +# Is this installation the result of a crosscompile? +if(NOT DEFINED CMAKE_CROSSCOMPILING) + set(CMAKE_CROSSCOMPILING "TRUE") +endif() + +# Set default install directory permissions. +if(NOT DEFINED CMAKE_OBJDUMP) + set(CMAKE_OBJDUMP "/home/mike/ncs/toolchains/e9dba88316/opt/zephyr-sdk/arm-zephyr-eabi/bin/arm-zephyr-eabi-objdump") +endif() + diff --git a/nrfdemo/build/mcuboot/zephyr/cmake/reports/cmake_install.cmake b/nrfdemo/build/mcuboot/zephyr/cmake/reports/cmake_install.cmake new file mode 100644 index 0000000..8a567cf --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/cmake/reports/cmake_install.cmake @@ -0,0 +1,39 @@ +# Install script for directory: /home/mike/Documents/ncs/v2.7.0/zephyr/cmake/reports + +# Set the install prefix +if(NOT DEFINED CMAKE_INSTALL_PREFIX) + set(CMAKE_INSTALL_PREFIX "/usr/local") +endif() +string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}") + +# Set the install configuration name. +if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME) + if(BUILD_TYPE) + string(REGEX REPLACE "^[^A-Za-z0-9_]+" "" + CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}") + else() + set(CMAKE_INSTALL_CONFIG_NAME "") + endif() + message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"") +endif() + +# Set the component getting installed. +if(NOT CMAKE_INSTALL_COMPONENT) + if(COMPONENT) + message(STATUS "Install component: \"${COMPONENT}\"") + set(CMAKE_INSTALL_COMPONENT "${COMPONENT}") + else() + set(CMAKE_INSTALL_COMPONENT) + endif() +endif() + +# Is this installation the result of a crosscompile? +if(NOT DEFINED CMAKE_CROSSCOMPILING) + set(CMAKE_CROSSCOMPILING "TRUE") +endif() + +# Set default install directory permissions. +if(NOT DEFINED CMAKE_OBJDUMP) + set(CMAKE_OBJDUMP "/home/mike/ncs/toolchains/e9dba88316/opt/zephyr-sdk/arm-zephyr-eabi/bin/arm-zephyr-eabi-objdump") +endif() + diff --git a/nrfdemo/build/mcuboot/zephyr/cmake/usage/cmake_install.cmake b/nrfdemo/build/mcuboot/zephyr/cmake/usage/cmake_install.cmake new file mode 100644 index 0000000..eba2a60 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/cmake/usage/cmake_install.cmake @@ -0,0 +1,39 @@ +# Install script for directory: /home/mike/Documents/ncs/v2.7.0/zephyr/cmake/usage + +# Set the install prefix +if(NOT DEFINED CMAKE_INSTALL_PREFIX) + set(CMAKE_INSTALL_PREFIX "/usr/local") +endif() +string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}") + +# Set the install configuration name. +if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME) + if(BUILD_TYPE) + string(REGEX REPLACE "^[^A-Za-z0-9_]+" "" + CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}") + else() + set(CMAKE_INSTALL_CONFIG_NAME "") + endif() + message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"") +endif() + +# Set the component getting installed. +if(NOT CMAKE_INSTALL_COMPONENT) + if(COMPONENT) + message(STATUS "Install component: \"${COMPONENT}\"") + set(CMAKE_INSTALL_COMPONENT "${COMPONENT}") + else() + set(CMAKE_INSTALL_COMPONENT) + endif() +endif() + +# Is this installation the result of a crosscompile? +if(NOT DEFINED CMAKE_CROSSCOMPILING) + set(CMAKE_CROSSCOMPILING "TRUE") +endif() + +# Set default install directory permissions. +if(NOT DEFINED CMAKE_OBJDUMP) + set(CMAKE_OBJDUMP "/home/mike/ncs/toolchains/e9dba88316/opt/zephyr-sdk/arm-zephyr-eabi/bin/arm-zephyr-eabi-objdump") +endif() + diff --git a/nrfdemo/build/mcuboot/zephyr/cmake_install.cmake b/nrfdemo/build/mcuboot/zephyr/cmake_install.cmake new file mode 100644 index 0000000..b12718e --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/cmake_install.cmake @@ -0,0 +1,91 @@ +# Install script for directory: /home/mike/Documents/ncs/v2.7.0/zephyr + +# Set the install prefix +if(NOT DEFINED CMAKE_INSTALL_PREFIX) + set(CMAKE_INSTALL_PREFIX "/usr/local") +endif() +string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}") + +# Set the install configuration name. +if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME) + if(BUILD_TYPE) + string(REGEX REPLACE "^[^A-Za-z0-9_]+" "" + CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}") + else() + set(CMAKE_INSTALL_CONFIG_NAME "") + endif() + message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"") +endif() + +# Set the component getting installed. +if(NOT CMAKE_INSTALL_COMPONENT) + if(COMPONENT) + message(STATUS "Install component: \"${COMPONENT}\"") + set(CMAKE_INSTALL_COMPONENT "${COMPONENT}") + else() + set(CMAKE_INSTALL_COMPONENT) + endif() +endif() + +# Is this installation the result of a crosscompile? +if(NOT DEFINED CMAKE_CROSSCOMPILING) + set(CMAKE_CROSSCOMPILING "TRUE") +endif() + +# Set default install directory permissions. +if(NOT DEFINED CMAKE_OBJDUMP) + set(CMAKE_OBJDUMP "/home/mike/ncs/toolchains/e9dba88316/opt/zephyr-sdk/arm-zephyr-eabi/bin/arm-zephyr-eabi-objdump") +endif() + +if(NOT CMAKE_INSTALL_LOCAL_ONLY) + # Include the install script for each subdirectory. + include("/home/mike/Documents/ncs/v2.7.0/conexio-firmware-sdk/samples/conexio_stratus/mqtt_control/build/mcuboot/zephyr/arch/cmake_install.cmake") + include("/home/mike/Documents/ncs/v2.7.0/conexio-firmware-sdk/samples/conexio_stratus/mqtt_control/build/mcuboot/zephyr/lib/cmake_install.cmake") + include("/home/mike/Documents/ncs/v2.7.0/conexio-firmware-sdk/samples/conexio_stratus/mqtt_control/build/mcuboot/zephyr/soc/cmake_install.cmake") + include("/home/mike/Documents/ncs/v2.7.0/conexio-firmware-sdk/samples/conexio_stratus/mqtt_control/build/mcuboot/zephyr/boards/cmake_install.cmake") + include("/home/mike/Documents/ncs/v2.7.0/conexio-firmware-sdk/samples/conexio_stratus/mqtt_control/build/mcuboot/zephyr/subsys/cmake_install.cmake") + include("/home/mike/Documents/ncs/v2.7.0/conexio-firmware-sdk/samples/conexio_stratus/mqtt_control/build/mcuboot/zephyr/drivers/cmake_install.cmake") + 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"/home/mike/ncs/toolchains/e9dba88316/opt/zephyr-sdk/arm-zephyr-eabi/bin/arm-zephyr-eabi-objdump") +endif() + diff --git a/nrfdemo/build/mcuboot/zephyr/drivers/timer/libdrivers__timer.a b/nrfdemo/build/mcuboot/zephyr/drivers/timer/libdrivers__timer.a Binary files differnew file mode 100644 index 0000000..0bcbb8f --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/drivers/timer/libdrivers__timer.a diff --git a/nrfdemo/build/mcuboot/zephyr/drivers/usb/cmake_install.cmake b/nrfdemo/build/mcuboot/zephyr/drivers/usb/cmake_install.cmake new file mode 100644 index 0000000..70b1cd5 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/drivers/usb/cmake_install.cmake @@ -0,0 +1,45 @@ +# Install script for directory: /home/mike/Documents/ncs/v2.7.0/zephyr/drivers/usb + +# Set the install prefix +if(NOT DEFINED CMAKE_INSTALL_PREFIX) + set(CMAKE_INSTALL_PREFIX "/usr/local") +endif() +string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}") + +# Set the install configuration name. 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include("/home/mike/Documents/ncs/v2.7.0/conexio-firmware-sdk/samples/conexio_stratus/mqtt_control/build/mcuboot/zephyr/drivers/usb/common/cmake_install.cmake") + +endif() + diff --git a/nrfdemo/build/mcuboot/zephyr/drivers/usb/common/cmake_install.cmake b/nrfdemo/build/mcuboot/zephyr/drivers/usb/common/cmake_install.cmake new file mode 100644 index 0000000..b9f9ece --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/drivers/usb/common/cmake_install.cmake @@ -0,0 +1,45 @@ +# Install script for directory: /home/mike/Documents/ncs/v2.7.0/zephyr/drivers/usb/common + +# Set the install prefix +if(NOT DEFINED CMAKE_INSTALL_PREFIX) + set(CMAKE_INSTALL_PREFIX "/usr/local") +endif() +string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}") + +# Set the install configuration name. +if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME) + if(BUILD_TYPE) + string(REGEX REPLACE "^[^A-Za-z0-9_]+" "" + CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}") + else() + set(CMAKE_INSTALL_CONFIG_NAME "") + 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a/nrfdemo/build/mcuboot/zephyr/drivers/usb/common/nrf_usbd_common/cmake_install.cmake b/nrfdemo/build/mcuboot/zephyr/drivers/usb/common/nrf_usbd_common/cmake_install.cmake new file mode 100644 index 0000000..c5af23e --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/drivers/usb/common/nrf_usbd_common/cmake_install.cmake @@ -0,0 +1,39 @@ +# Install script for directory: /home/mike/Documents/ncs/v2.7.0/zephyr/drivers/usb/common/nrf_usbd_common + +# Set the install prefix +if(NOT DEFINED CMAKE_INSTALL_PREFIX) + set(CMAKE_INSTALL_PREFIX "/usr/local") +endif() +string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}") + +# Set the install configuration name. +if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME) + if(BUILD_TYPE) + string(REGEX REPLACE "^[^A-Za-z0-9_]+" "" + CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}") + else() + set(CMAKE_INSTALL_CONFIG_NAME "") + endif() + message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"") +endif() + +# Set the component getting installed. +if(NOT CMAKE_INSTALL_COMPONENT) + if(COMPONENT) + message(STATUS "Install component: \"${COMPONENT}\"") + set(CMAKE_INSTALL_COMPONENT "${COMPONENT}") + else() + set(CMAKE_INSTALL_COMPONENT) + endif() +endif() + +# Is this installation the result of a crosscompile? +if(NOT DEFINED CMAKE_CROSSCOMPILING) + set(CMAKE_CROSSCOMPILING "TRUE") +endif() + +# Set default install directory permissions. +if(NOT DEFINED CMAKE_OBJDUMP) + set(CMAKE_OBJDUMP "/home/mike/ncs/toolchains/e9dba88316/opt/zephyr-sdk/arm-zephyr-eabi/bin/arm-zephyr-eabi-objdump") +endif() + diff --git a/nrfdemo/build/mcuboot/zephyr/drivers/usb_c/cmake_install.cmake b/nrfdemo/build/mcuboot/zephyr/drivers/usb_c/cmake_install.cmake new file mode 100644 index 0000000..f9438c9 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/drivers/usb_c/cmake_install.cmake @@ -0,0 +1,39 @@ +# Install script for directory: /home/mike/Documents/ncs/v2.7.0/zephyr/drivers/usb_c + +# Set the install prefix +if(NOT DEFINED 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"/home/mike/ncs/toolchains/e9dba88316/opt/zephyr-sdk/arm-zephyr-eabi/bin/arm-zephyr-eabi-objdump") +endif() + diff --git a/nrfdemo/build/mcuboot/zephyr/dts.cmake b/nrfdemo/build/mcuboot/zephyr/dts.cmake new file mode 100644 index 0000000..4c7f7ba --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/dts.cmake @@ -0,0 +1,1230 @@ +add_custom_target(devicetree_target) + +set_target_properties(devicetree_target PROPERTIES "DT_CHOSEN|zephyr,entropy" "/soc/crypto@50840000") +set_target_properties(devicetree_target PROPERTIES "DT_CHOSEN|zephyr,flash-controller" "/soc/peripheral@50000000/flash-controller@39000") +set_target_properties(devicetree_target PROPERTIES "DT_CHOSEN|zephyr,console" "/soc/peripheral@50000000/uart@8000") +set_target_properties(devicetree_target PROPERTIES "DT_CHOSEN|zephyr,shell-uart" "/soc/peripheral@50000000/uart@8000") +set_target_properties(devicetree_target PROPERTIES "DT_CHOSEN|zephyr,uart-mcumgr" "/soc/peripheral@50000000/uart@8000") +set_target_properties(devicetree_target PROPERTIES "DT_CHOSEN|zephyr,sram" "/reserved-memory/image_s@20000000") +set_target_properties(devicetree_target PROPERTIES "DT_CHOSEN|zephyr,flash" "/soc/peripheral@50000000/flash-controller@39000/flash@0") +set_target_properties(devicetree_target PROPERTIES "DT_CHOSEN|zephyr,code-partition" "/soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@0") +set_target_properties(devicetree_target PROPERTIES "DT_CHOSEN|zephyr,sram-secure-partition" "/reserved-memory/image_s@20000000") +set_target_properties(devicetree_target PROPERTIES "DT_CHOSEN|zephyr,sram-non-secure-partition" "/reserved-memory/image_ns@20020000") +set_target_properties(devicetree_target PROPERTIES "DT_ALIAS|watchdog0" "/soc/peripheral@50000000/watchdog@18000") +set_target_properties(devicetree_target PROPERTIES "DT_ALIAS|led0" "/leds/led_0") +set_target_properties(devicetree_target PROPERTIES "DT_ALIAS|bootloader-led0" "/leds/led_0") +set_target_properties(devicetree_target PROPERTIES "DT_ALIAS|mcuboot-led0" "/leds/led_0") +set_target_properties(devicetree_target PROPERTIES "DT_ALIAS|pwm-led0" "/pwmleds/pwm_led_0") +set_target_properties(devicetree_target PROPERTIES "DT_ALIAS|sw0" "/buttons/button_0") +set_target_properties(devicetree_target PROPERTIES "DT_ALIAS|mcuboot-button0" "/buttons/button_0") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/|compatible" "conexio,stratus_pro;") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/|NUM" "0") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/|ADDR" "") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/|SIZE" "") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/chosen" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_REG|/chosen|NUM" "0") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/chosen|ADDR" "") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/chosen|SIZE" "") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/aliases" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_REG|/aliases|NUM" "0") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/aliases|ADDR" "") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/aliases|SIZE" "") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/soc" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc|compatible" "nordic,nrf9151-laca;nordic,nrf9120;nordic,nrf91;simple-bus;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc|ranges" "None") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc|NUM" "0") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc|ADDR" "") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc|SIZE" "") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/soc/interrupt-controller@e000e100" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_NODELABEL|nvic" "/soc/interrupt-controller@e000e100") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/interrupt-controller@e000e100|interrupt-controller" "True") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/interrupt-controller@e000e100|wakeup-source" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/interrupt-controller@e000e100|zephyr,pm-device-runtime-auto" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/interrupt-controller@e000e100|compatible" "arm,v8m-nvic;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/interrupt-controller@e000e100|reg" "3758153984;3072;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/interrupt-controller@e000e100|zephyr,deferred-init" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/interrupt-controller@e000e100|arm,num-irq-priority-bits" "3") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/interrupt-controller@e000e100|NUM" "1") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/interrupt-controller@e000e100|ADDR" "0xe000e100;") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/interrupt-controller@e000e100|SIZE" "0xc00;") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/soc/timer@e000e010" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_NODELABEL|systick" "/soc/timer@e000e010") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/timer@e000e010|wakeup-source" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/timer@e000e010|zephyr,pm-device-runtime-auto" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/timer@e000e010|status" "disabled") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/timer@e000e010|compatible" "arm,armv8m-systick;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/timer@e000e010|reg" "3758153744;16;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/timer@e000e010|zephyr,deferred-init" "False") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/timer@e000e010|NUM" "1") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/timer@e000e010|ADDR" "0xe000e010;") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/timer@e000e010|SIZE" "0x10;") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/soc/memory@20000000" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_NODELABEL|sram0" "/soc/memory@20000000") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/memory@20000000|wakeup-source" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/memory@20000000|zephyr,pm-device-runtime-auto" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/memory@20000000|compatible" "mmio-sram;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/memory@20000000|reg" "536870912;262144;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/memory@20000000|zephyr,deferred-init" "False") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/memory@20000000|NUM" "1") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/memory@20000000|ADDR" "0x20000000;") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/memory@20000000|SIZE" "0x40000;") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/soc/peripheral@50000000" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000|ranges" "None") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000|NUM" "0") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000|ADDR" "") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000|SIZE" "") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/soc/peripheral@50000000/flash-controller@39000" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_NODELABEL|flash_controller" "/soc/peripheral@50000000/flash-controller@39000") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/flash-controller@39000|wakeup-source" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/flash-controller@39000|zephyr,pm-device-runtime-auto" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/flash-controller@39000|compatible" "nordic,nrf91-flash-controller;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/flash-controller@39000|reg" "233472;4096;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/flash-controller@39000|zephyr,deferred-init" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/flash-controller@39000|partial-erase" "True") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/flash-controller@39000|NUM" "1") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/flash-controller@39000|ADDR" "0x50039000;") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/flash-controller@39000|SIZE" "0x1000;") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/soc/peripheral@50000000/flash-controller@39000/flash@0" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_NODELABEL|flash0" "/soc/peripheral@50000000/flash-controller@39000/flash@0") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/flash-controller@39000/flash@0|wakeup-source" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/flash-controller@39000/flash@0|zephyr,pm-device-runtime-auto" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/flash-controller@39000/flash@0|compatible" "soc-nv-flash;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/flash-controller@39000/flash@0|reg" "0;1048576;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/flash-controller@39000/flash@0|zephyr,deferred-init" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/flash-controller@39000/flash@0|erase-block-size" "4096") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/flash-controller@39000/flash@0|write-block-size" "4") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/flash-controller@39000/flash@0|NUM" "1") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/flash-controller@39000/flash@0|ADDR" "0x0;") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/flash-controller@39000/flash@0|SIZE" "0x100000;") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/soc/peripheral@50000000/flash-controller@39000/flash@0/partitions" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/flash-controller@39000/flash@0/partitions|NUM" "0") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/flash-controller@39000/flash@0/partitions|ADDR" "") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/flash-controller@39000/flash@0/partitions|SIZE" "") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@0" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_NODELABEL|boot_partition" "/soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@0") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@0|label" "mcuboot") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@0|read-only" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@0|reg" "0;65536;") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@0|NUM" "1") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@0|ADDR" "0x0;") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@0|SIZE" "0x10000;") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@10000" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_NODELABEL|slot0_partition" "/soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@10000") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@10000|label" "image-0") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@10000|read-only" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@10000|reg" "65536;262144;") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@10000|NUM" "1") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@10000|ADDR" "0x10000;") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@10000|SIZE" "0x40000;") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@50000" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_NODELABEL|slot0_ns_partition" "/soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@50000") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@50000|label" "image-0-nonsecure") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@50000|read-only" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@50000|reg" "327680;196608;") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@50000|NUM" "1") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@50000|ADDR" "0x50000;") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@50000|SIZE" "0x30000;") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@80000" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_NODELABEL|slot1_partition" "/soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@80000") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@80000|label" "image-1") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@80000|read-only" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@80000|reg" "524288;262144;") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@80000|NUM" "1") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@80000|ADDR" "0x80000;") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@80000|SIZE" "0x40000;") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@c0000" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_NODELABEL|slot1_ns_partition" "/soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@c0000") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@c0000|label" "image-1-nonsecure") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@c0000|read-only" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@c0000|reg" "786432;196608;") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@c0000|NUM" "1") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@c0000|ADDR" "0xc0000;") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@c0000|SIZE" "0x30000;") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@f0000" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_NODELABEL|scratch_partition" "/soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@f0000") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@f0000|label" "image-scratch") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@f0000|read-only" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@f0000|reg" "983040;40960;") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@f0000|NUM" "1") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@f0000|ADDR" "0xf0000;") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@f0000|SIZE" "0xa000;") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@fa000" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_NODELABEL|storage_partition" "/soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@fa000") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@fa000|label" "storage") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@fa000|read-only" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@fa000|reg" "1024000;24576;") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@fa000|NUM" "1") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@fa000|ADDR" "0xfa000;") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@fa000|SIZE" "0x6000;") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/soc/peripheral@50000000/adc@e000" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_NODELABEL|adc" "/soc/peripheral@50000000/adc@e000") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/adc@e000|wakeup-source" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/adc@e000|zephyr,pm-device-runtime-auto" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/adc@e000|status" "okay") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/adc@e000|compatible" "nordic,nrf-saadc;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/adc@e000|reg" "57344;4096;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/adc@e000|interrupts" "14;1;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/adc@e000|zephyr,deferred-init" "False") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/adc@e000|NUM" "1") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/adc@e000|ADDR" "0x5000e000;") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/adc@e000|SIZE" "0x1000;") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/soc/peripheral@50000000/dppic@17000" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_NODELABEL|dppic" "/soc/peripheral@50000000/dppic@17000") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/dppic@17000|wakeup-source" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/dppic@17000|zephyr,pm-device-runtime-auto" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/dppic@17000|status" "okay") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/dppic@17000|compatible" "nordic,nrf-dppic;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/dppic@17000|reg" "94208;4096;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/dppic@17000|zephyr,deferred-init" "False") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/dppic@17000|NUM" "1") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/dppic@17000|ADDR" "0x50017000;") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/dppic@17000|SIZE" "0x1000;") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/soc/peripheral@50000000/egu@1b000" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_NODELABEL|egu0" "/soc/peripheral@50000000/egu@1b000") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/egu@1b000|wakeup-source" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/egu@1b000|zephyr,pm-device-runtime-auto" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/egu@1b000|status" "okay") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/egu@1b000|compatible" "nordic,nrf-egu;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/egu@1b000|reg" "110592;4096;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/egu@1b000|interrupts" "27;1;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/egu@1b000|zephyr,deferred-init" "False") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/egu@1b000|NUM" "1") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/egu@1b000|ADDR" "0x5001b000;") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/egu@1b000|SIZE" "0x1000;") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/soc/peripheral@50000000/egu@1c000" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_NODELABEL|egu1" "/soc/peripheral@50000000/egu@1c000") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/egu@1c000|wakeup-source" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/egu@1c000|zephyr,pm-device-runtime-auto" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/egu@1c000|status" "okay") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/egu@1c000|compatible" "nordic,nrf-egu;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/egu@1c000|reg" "114688;4096;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/egu@1c000|interrupts" "28;1;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/egu@1c000|zephyr,deferred-init" "False") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/egu@1c000|NUM" "1") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/egu@1c000|ADDR" "0x5001c000;") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/egu@1c000|SIZE" "0x1000;") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/soc/peripheral@50000000/egu@1d000" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_NODELABEL|egu2" "/soc/peripheral@50000000/egu@1d000") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/egu@1d000|wakeup-source" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/egu@1d000|zephyr,pm-device-runtime-auto" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/egu@1d000|status" "okay") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/egu@1d000|compatible" "nordic,nrf-egu;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/egu@1d000|reg" "118784;4096;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/egu@1d000|interrupts" "29;1;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/egu@1d000|zephyr,deferred-init" "False") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/egu@1d000|NUM" "1") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/egu@1d000|ADDR" "0x5001d000;") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/egu@1d000|SIZE" "0x1000;") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/soc/peripheral@50000000/egu@1e000" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_NODELABEL|egu3" "/soc/peripheral@50000000/egu@1e000") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/egu@1e000|wakeup-source" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/egu@1e000|zephyr,pm-device-runtime-auto" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/egu@1e000|status" "okay") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/egu@1e000|compatible" "nordic,nrf-egu;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/egu@1e000|reg" "122880;4096;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/egu@1e000|interrupts" "30;1;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/egu@1e000|zephyr,deferred-init" "False") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/egu@1e000|NUM" "1") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/egu@1e000|ADDR" "0x5001e000;") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/egu@1e000|SIZE" "0x1000;") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/soc/peripheral@50000000/egu@1f000" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_NODELABEL|egu4" "/soc/peripheral@50000000/egu@1f000") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/egu@1f000|wakeup-source" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/egu@1f000|zephyr,pm-device-runtime-auto" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/egu@1f000|status" "okay") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/egu@1f000|compatible" "nordic,nrf-egu;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/egu@1f000|reg" "126976;4096;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/egu@1f000|interrupts" "31;1;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/egu@1f000|zephyr,deferred-init" "False") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/egu@1f000|NUM" "1") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/egu@1f000|ADDR" "0x5001f000;") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/egu@1f000|SIZE" "0x1000;") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/soc/peripheral@50000000/egu@20000" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_NODELABEL|egu5" "/soc/peripheral@50000000/egu@20000") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/egu@20000|wakeup-source" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/egu@20000|zephyr,pm-device-runtime-auto" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/egu@20000|status" "okay") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/egu@20000|compatible" "nordic,nrf-egu;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/egu@20000|reg" "131072;4096;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/egu@20000|interrupts" "32;1;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/egu@20000|zephyr,deferred-init" "False") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/egu@20000|NUM" "1") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/egu@20000|ADDR" "0x50020000;") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/egu@20000|SIZE" "0x1000;") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/soc/peripheral@50000000/ipc@2a000" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_NODELABEL|ipc" "/soc/peripheral@50000000/ipc@2a000") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/ipc@2a000|wakeup-source" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/ipc@2a000|zephyr,pm-device-runtime-auto" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/ipc@2a000|status" "okay") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/ipc@2a000|compatible" "nordic,nrf-ipc;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/ipc@2a000|reg" "172032;4096;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/ipc@2a000|interrupts" "42;1;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/ipc@2a000|zephyr,deferred-init" "False") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/ipc@2a000|NUM" "1") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/ipc@2a000|ADDR" "0x5002a000;") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/ipc@2a000|SIZE" "0x1000;") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/soc/peripheral@50000000/i2s@28000" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_NODELABEL|i2s0" "/soc/peripheral@50000000/i2s@28000") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2s@28000|wakeup-source" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2s@28000|zephyr,pm-device-runtime-auto" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2s@28000|status" "disabled") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2s@28000|compatible" "nordic,nrf-i2s;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2s@28000|reg" "163840;4096;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2s@28000|interrupts" "40;1;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2s@28000|zephyr,deferred-init" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2s@28000|clock-source" "PCLK32M_HFXO") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/i2s@28000|NUM" "1") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/i2s@28000|ADDR" "0x50028000;") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/i2s@28000|SIZE" "0x1000;") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/soc/peripheral@50000000/kmu@39000" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_NODELABEL|kmu" "/soc/peripheral@50000000/kmu@39000") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/kmu@39000|wakeup-source" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/kmu@39000|zephyr,pm-device-runtime-auto" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/kmu@39000|status" "okay") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/kmu@39000|compatible" "nordic,nrf-kmu;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/kmu@39000|reg" "233472;4096;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/kmu@39000|interrupts" "57;1;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/kmu@39000|zephyr,deferred-init" "False") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/kmu@39000|NUM" "1") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/kmu@39000|ADDR" "0x50039000;") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/kmu@39000|SIZE" "0x1000;") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/soc/peripheral@50000000/pdm@26000" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_NODELABEL|pdm0" "/soc/peripheral@50000000/pdm@26000") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/pdm@26000|wakeup-source" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/pdm@26000|zephyr,pm-device-runtime-auto" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/pdm@26000|status" "disabled") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/pdm@26000|compatible" "nordic,nrf-pdm;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/pdm@26000|reg" "155648;4096;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/pdm@26000|interrupts" "38;1;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/pdm@26000|zephyr,deferred-init" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/pdm@26000|clock-source" "PCLK32M_HFXO") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/pdm@26000|queue-size" "4") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/pdm@26000|NUM" "1") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/pdm@26000|ADDR" "0x50026000;") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/pdm@26000|SIZE" "0x1000;") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/soc/peripheral@50000000/regulator@4000" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_NODELABEL|regulators" "/soc/peripheral@50000000/regulator@4000") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/regulator@4000|wakeup-source" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/regulator@4000|zephyr,pm-device-runtime-auto" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/regulator@4000|status" "okay") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/regulator@4000|compatible" "nordic,nrf-regulators;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/regulator@4000|reg" "16384;4096;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/regulator@4000|zephyr,deferred-init" "False") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/regulator@4000|NUM" "1") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/regulator@4000|ADDR" "0x50004000;") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/regulator@4000|SIZE" "0x1000;") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/soc/peripheral@50000000/vmc@3a000" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_NODELABEL|vmc" "/soc/peripheral@50000000/vmc@3a000") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/vmc@3a000|wakeup-source" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/vmc@3a000|zephyr,pm-device-runtime-auto" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/vmc@3a000|status" "okay") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/vmc@3a000|compatible" "nordic,nrf-vmc;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/vmc@3a000|reg" "237568;4096;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/vmc@3a000|zephyr,deferred-init" "False") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/vmc@3a000|NUM" "1") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/vmc@3a000|ADDR" "0x5003a000;") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/vmc@3a000|SIZE" "0x1000;") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/soc/peripheral@50000000/uart@8000" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_NODELABEL|uart0" "/soc/peripheral@50000000/uart@8000") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/uart@8000|wakeup-source" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/uart@8000|zephyr,pm-device-runtime-auto" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/uart@8000|status" "okay") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/uart@8000|compatible" "nordic,nrf-uarte;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/uart@8000|reg" "32768;4096;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/uart@8000|interrupts" "8;1;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/uart@8000|zephyr,deferred-init" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/uart@8000|current-speed" "115200") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/uart@8000|hw-flow-control" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/uart@8000|pinctrl-names" "default;sleep;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/uart@8000|disable-rx" "False") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/uart@8000|NUM" "1") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/uart@8000|ADDR" "0x50008000;") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/uart@8000|SIZE" "0x1000;") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/soc/peripheral@50000000/uart@9000" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_NODELABEL|uart1" "/soc/peripheral@50000000/uart@9000") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/uart@9000|wakeup-source" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/uart@9000|zephyr,pm-device-runtime-auto" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/uart@9000|status" "disabled") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/uart@9000|compatible" "nordic,nrf-uarte;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/uart@9000|reg" "36864;4096;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/uart@9000|interrupts" "9;1;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/uart@9000|zephyr,deferred-init" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/uart@9000|hw-flow-control" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/uart@9000|disable-rx" "False") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/uart@9000|NUM" "1") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/uart@9000|ADDR" "0x50009000;") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/uart@9000|SIZE" "0x1000;") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/soc/peripheral@50000000/uart@a000" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_NODELABEL|uart2" "/soc/peripheral@50000000/uart@a000") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/uart@a000|wakeup-source" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/uart@a000|zephyr,pm-device-runtime-auto" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/uart@a000|status" "disabled") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/uart@a000|compatible" "nordic,nrf-uarte;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/uart@a000|reg" "40960;4096;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/uart@a000|interrupts" "10;1;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/uart@a000|zephyr,deferred-init" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/uart@a000|hw-flow-control" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/uart@a000|disable-rx" "False") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/uart@a000|NUM" "1") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/uart@a000|ADDR" "0x5000a000;") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/uart@a000|SIZE" "0x1000;") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/soc/peripheral@50000000/uart@b000" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_NODELABEL|uart3" "/soc/peripheral@50000000/uart@b000") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/uart@b000|wakeup-source" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/uart@b000|zephyr,pm-device-runtime-auto" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/uart@b000|status" "disabled") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/uart@b000|compatible" "nordic,nrf-uarte;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/uart@b000|reg" "45056;4096;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/uart@b000|interrupts" "11;1;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/uart@b000|zephyr,deferred-init" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/uart@b000|hw-flow-control" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/uart@b000|disable-rx" "False") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/uart@b000|NUM" "1") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/uart@b000|ADDR" "0x5000b000;") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/uart@b000|SIZE" "0x1000;") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/soc/peripheral@50000000/i2c@8000" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_NODELABEL|i2c0" "/soc/peripheral@50000000/i2c@8000") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@8000|wakeup-source" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@8000|zephyr,pm-device-runtime-auto" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@8000|status" "disabled") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@8000|compatible" "nordic,nrf-twim;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@8000|reg" "32768;4096;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@8000|interrupts" "8;1;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@8000|zephyr,deferred-init" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@8000|clock-frequency" "100000") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@8000|sq-size" "4") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@8000|cq-size" "4") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@8000|easydma-maxcnt-bits" "13") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@8000|zephyr,concat-buf-size" "16") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@8000|zephyr,flash-buf-max-size" "16") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/i2c@8000|NUM" "1") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/i2c@8000|ADDR" "0x50008000;") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/i2c@8000|SIZE" "0x1000;") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/soc/peripheral@50000000/i2c@9000" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_NODELABEL|i2c1" "/soc/peripheral@50000000/i2c@9000") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@9000|wakeup-source" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@9000|zephyr,pm-device-runtime-auto" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@9000|status" "disabled") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@9000|compatible" "nordic,nrf-twim;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@9000|reg" "36864;4096;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@9000|interrupts" "9;1;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@9000|zephyr,deferred-init" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@9000|clock-frequency" "100000") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@9000|sq-size" "4") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@9000|cq-size" "4") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@9000|easydma-maxcnt-bits" "13") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@9000|zephyr,concat-buf-size" "16") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@9000|zephyr,flash-buf-max-size" "16") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/i2c@9000|NUM" "1") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/i2c@9000|ADDR" "0x50009000;") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/i2c@9000|SIZE" "0x1000;") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/soc/peripheral@50000000/i2c@a000" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_NODELABEL|i2c2" "/soc/peripheral@50000000/i2c@a000") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@a000|wakeup-source" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@a000|zephyr,pm-device-runtime-auto" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@a000|status" "okay") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@a000|compatible" "nordic,nrf-twim;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@a000|reg" "40960;4096;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@a000|interrupts" "10;1;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@a000|zephyr,deferred-init" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@a000|clock-frequency" "400000") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@a000|sq-size" "4") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@a000|cq-size" "4") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@a000|pinctrl-names" "default;sleep;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@a000|easydma-maxcnt-bits" "13") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@a000|zephyr,concat-buf-size" "16") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@a000|zephyr,flash-buf-max-size" "16") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/i2c@a000|NUM" "1") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/i2c@a000|ADDR" "0x5000a000;") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/i2c@a000|SIZE" "0x1000;") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/soc/peripheral@50000000/i2c@a000/npm1300@6b" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_NODELABEL|pmic_main" "/soc/peripheral@50000000/i2c@a000/npm1300@6b") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@a000/npm1300@6b|wakeup-source" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@a000/npm1300@6b|zephyr,pm-device-runtime-auto" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@a000/npm1300@6b|compatible" "nordic,npm1300;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@a000/npm1300@6b|reg" "107;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@a000/npm1300@6b|zephyr,deferred-init" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@a000/npm1300@6b|ship-to-active-time-ms" "96") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/i2c@a000/npm1300@6b|NUM" "1") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/i2c@a000/npm1300@6b|ADDR" "0x6b;") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/i2c@a000/npm1300@6b|SIZE" "NONE;") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/soc/peripheral@50000000/i2c@a000/npm1300@6b/charger" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_NODELABEL|pmic_charger" "/soc/peripheral@50000000/i2c@a000/npm1300@6b/charger") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@a000/npm1300@6b/charger|wakeup-source" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@a000/npm1300@6b/charger|zephyr,pm-device-runtime-auto" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@a000/npm1300@6b/charger|compatible" "nordic,npm1300-charger;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@a000/npm1300@6b/charger|zephyr,deferred-init" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@a000/npm1300@6b/charger|term-microvolt" "4150000") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@a000/npm1300@6b/charger|term-warm-microvolt" "4000000") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@a000/npm1300@6b/charger|current-microamp" "800000") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@a000/npm1300@6b/charger|dischg-limit-microamp" "1000000") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@a000/npm1300@6b/charger|vbus-limit-microamp" "1000000") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@a000/npm1300@6b/charger|thermistor-ohms" "10000") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@a000/npm1300@6b/charger|thermistor-beta" "3380") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@a000/npm1300@6b/charger|charging-enable" "True") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@a000/npm1300@6b/charger|trickle-microvolt" "2900000") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@a000/npm1300@6b/charger|term-current-percent" "10") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@a000/npm1300@6b/charger|vbatlow-charge-enable" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@a000/npm1300@6b/charger|disable-recharge" "False") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/i2c@a000/npm1300@6b/charger|NUM" "0") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/i2c@a000/npm1300@6b/charger|ADDR" "") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/i2c@a000/npm1300@6b/charger|SIZE" "") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/soc/peripheral@50000000/i2c@a000/npm1300@6b/regulators" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@a000/npm1300@6b/regulators|wakeup-source" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@a000/npm1300@6b/regulators|zephyr,pm-device-runtime-auto" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@a000/npm1300@6b/regulators|compatible" "nordic,npm1300-regulator;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@a000/npm1300@6b/regulators|zephyr,deferred-init" "False") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/i2c@a000/npm1300@6b/regulators|NUM" "0") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/i2c@a000/npm1300@6b/regulators|ADDR" "") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/i2c@a000/npm1300@6b/regulators|SIZE" "") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/soc/peripheral@50000000/i2c@a000/npm1300@6b/regulators/BUCK1" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_NODELABEL|reg_1v8" "/soc/peripheral@50000000/i2c@a000/npm1300@6b/regulators/BUCK1") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@a000/npm1300@6b/regulators/BUCK1|regulator-min-microvolt" "1800000") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@a000/npm1300@6b/regulators/BUCK1|regulator-max-microvolt" "1800000") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@a000/npm1300@6b/regulators/BUCK1|regulator-always-on" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@a000/npm1300@6b/regulators/BUCK1|regulator-boot-on" "True") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@a000/npm1300@6b/regulators/BUCK1|regulator-boot-off" "False") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/i2c@a000/npm1300@6b/regulators/BUCK1|NUM" "0") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/i2c@a000/npm1300@6b/regulators/BUCK1|ADDR" "") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/i2c@a000/npm1300@6b/regulators/BUCK1|SIZE" "") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/soc/peripheral@50000000/i2c@a000/npm1300@6b/regulators/BUCK2" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_NODELABEL|reg_3v3" "/soc/peripheral@50000000/i2c@a000/npm1300@6b/regulators/BUCK2") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@a000/npm1300@6b/regulators/BUCK2|regulator-min-microvolt" "3300000") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@a000/npm1300@6b/regulators/BUCK2|regulator-max-microvolt" "3300000") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@a000/npm1300@6b/regulators/BUCK2|regulator-always-on" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@a000/npm1300@6b/regulators/BUCK2|regulator-boot-on" "True") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@a000/npm1300@6b/regulators/BUCK2|regulator-boot-off" "False") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/i2c@a000/npm1300@6b/regulators/BUCK2|NUM" "0") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/i2c@a000/npm1300@6b/regulators/BUCK2|ADDR" "") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/i2c@a000/npm1300@6b/regulators/BUCK2|SIZE" "") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/soc/peripheral@50000000/i2c@a000/lis2dh@18" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_NODELABEL|lis2dh" "/soc/peripheral@50000000/i2c@a000/lis2dh@18") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@a000/lis2dh@18|wakeup-source" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@a000/lis2dh@18|zephyr,pm-device-runtime-auto" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@a000/lis2dh@18|compatible" "st,lis2dh;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@a000/lis2dh@18|reg" "24;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@a000/lis2dh@18|zephyr,deferred-init" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@a000/lis2dh@18|int1-gpio-config" "0") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@a000/lis2dh@18|int2-gpio-config" "0") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@a000/lis2dh@18|disconnect-sdo-sa0-pull-up" "True") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@a000/lis2dh@18|anym-on-int1" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@a000/lis2dh@18|anym-no-latch" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@a000/lis2dh@18|anym-mode" "0") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/i2c@a000/lis2dh@18|NUM" "1") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/i2c@a000/lis2dh@18|ADDR" "0x18;") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/i2c@a000/lis2dh@18|SIZE" "NONE;") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/soc/peripheral@50000000/i2c@a000/eeprom@50" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_NODELABEL|eeprom0" "/soc/peripheral@50000000/i2c@a000/eeprom@50") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@a000/eeprom@50|wakeup-source" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@a000/eeprom@50|zephyr,pm-device-runtime-auto" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@a000/eeprom@50|compatible" "atmel,at24;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@a000/eeprom@50|reg" "80;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@a000/eeprom@50|zephyr,deferred-init" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@a000/eeprom@50|size" "2048") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@a000/eeprom@50|read-only" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@a000/eeprom@50|pagesize" "32") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@a000/eeprom@50|address-width" "16") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@a000/eeprom@50|timeout" "5") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/i2c@a000/eeprom@50|NUM" "1") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/i2c@a000/eeprom@50|ADDR" "0x50;") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/i2c@a000/eeprom@50|SIZE" "NONE;") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/soc/peripheral@50000000/i2c@b000" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_NODELABEL|i2c3" "/soc/peripheral@50000000/i2c@b000") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@b000|wakeup-source" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@b000|zephyr,pm-device-runtime-auto" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@b000|status" "disabled") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@b000|compatible" "nordic,nrf-twim;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@b000|reg" "45056;4096;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@b000|interrupts" "11;1;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@b000|zephyr,deferred-init" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@b000|clock-frequency" "100000") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@b000|sq-size" "4") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@b000|cq-size" "4") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@b000|easydma-maxcnt-bits" "13") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@b000|zephyr,concat-buf-size" "16") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/i2c@b000|zephyr,flash-buf-max-size" "16") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/i2c@b000|NUM" "1") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/i2c@b000|ADDR" "0x5000b000;") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/i2c@b000|SIZE" "0x1000;") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/soc/peripheral@50000000/spi@8000" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_NODELABEL|spi0" "/soc/peripheral@50000000/spi@8000") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/spi@8000|wakeup-source" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/spi@8000|zephyr,pm-device-runtime-auto" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/spi@8000|status" "disabled") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/spi@8000|compatible" "nordic,nrf-spim;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/spi@8000|reg" "32768;4096;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/spi@8000|interrupts" "8;1;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/spi@8000|zephyr,deferred-init" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/spi@8000|max-frequency" "8000000") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/spi@8000|overrun-character" "255") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/spi@8000|easydma-maxcnt-bits" "13") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/spi@8000|anomaly-58-workaround" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/spi@8000|rx-delay-supported" "False") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/spi@8000|NUM" "1") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/spi@8000|ADDR" "0x50008000;") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/spi@8000|SIZE" "0x1000;") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/soc/peripheral@50000000/spi@9000" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_NODELABEL|spi1" "/soc/peripheral@50000000/spi@9000") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/spi@9000|wakeup-source" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/spi@9000|zephyr,pm-device-runtime-auto" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/spi@9000|status" "disabled") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/spi@9000|compatible" "nordic,nrf-spim;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/spi@9000|reg" "36864;4096;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/spi@9000|interrupts" "9;1;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/spi@9000|zephyr,deferred-init" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/spi@9000|max-frequency" "8000000") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/spi@9000|overrun-character" "255") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/spi@9000|easydma-maxcnt-bits" "13") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/spi@9000|anomaly-58-workaround" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/spi@9000|rx-delay-supported" "False") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/spi@9000|NUM" "1") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/spi@9000|ADDR" "0x50009000;") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/spi@9000|SIZE" "0x1000;") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/soc/peripheral@50000000/spi@a000" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_NODELABEL|spi2" "/soc/peripheral@50000000/spi@a000") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/spi@a000|wakeup-source" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/spi@a000|zephyr,pm-device-runtime-auto" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/spi@a000|status" "disabled") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/spi@a000|compatible" "nordic,nrf-spim;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/spi@a000|reg" "40960;4096;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/spi@a000|interrupts" "10;1;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/spi@a000|zephyr,deferred-init" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/spi@a000|max-frequency" "8000000") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/spi@a000|overrun-character" "255") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/spi@a000|easydma-maxcnt-bits" "13") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/spi@a000|anomaly-58-workaround" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/spi@a000|rx-delay-supported" "False") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/spi@a000|NUM" "1") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/spi@a000|ADDR" "0x5000a000;") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/spi@a000|SIZE" "0x1000;") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/soc/peripheral@50000000/spi@b000" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_NODELABEL|spi3" "/soc/peripheral@50000000/spi@b000") +set_target_properties(devicetree_target PROPERTIES "DT_NODELABEL|edge_connector_spi" "/soc/peripheral@50000000/spi@b000") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/spi@b000|wakeup-source" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/spi@b000|zephyr,pm-device-runtime-auto" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/spi@b000|status" "disabled") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/spi@b000|compatible" "nordic,nrf-spim;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/spi@b000|reg" "45056;4096;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/spi@b000|interrupts" "11;1;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/spi@b000|zephyr,deferred-init" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/spi@b000|pinctrl-names" "default;sleep;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/spi@b000|max-frequency" "8000000") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/spi@b000|overrun-character" "255") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/spi@b000|easydma-maxcnt-bits" "13") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/spi@b000|anomaly-58-workaround" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/spi@b000|rx-delay-supported" "False") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/spi@b000|NUM" "1") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/spi@b000|ADDR" "0x5000b000;") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/spi@b000|SIZE" "0x1000;") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/soc/peripheral@50000000/pwm@21000" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_NODELABEL|pwm0" "/soc/peripheral@50000000/pwm@21000") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/pwm@21000|wakeup-source" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/pwm@21000|zephyr,pm-device-runtime-auto" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/pwm@21000|status" "okay") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/pwm@21000|compatible" "nordic,nrf-pwm;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/pwm@21000|reg" "135168;4096;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/pwm@21000|interrupts" "33;1;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/pwm@21000|zephyr,deferred-init" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/pwm@21000|pinctrl-names" "default;sleep;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/pwm@21000|center-aligned" "False") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/pwm@21000|NUM" "1") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/pwm@21000|ADDR" "0x50021000;") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/pwm@21000|SIZE" "0x1000;") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/soc/peripheral@50000000/pwm@22000" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_NODELABEL|pwm1" "/soc/peripheral@50000000/pwm@22000") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/pwm@22000|wakeup-source" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/pwm@22000|zephyr,pm-device-runtime-auto" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/pwm@22000|status" "disabled") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/pwm@22000|compatible" "nordic,nrf-pwm;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/pwm@22000|reg" "139264;4096;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/pwm@22000|interrupts" "34;1;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/pwm@22000|zephyr,deferred-init" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/pwm@22000|center-aligned" "False") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/pwm@22000|NUM" "1") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/pwm@22000|ADDR" "0x50022000;") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/pwm@22000|SIZE" "0x1000;") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/soc/peripheral@50000000/pwm@23000" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_NODELABEL|pwm2" "/soc/peripheral@50000000/pwm@23000") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/pwm@23000|wakeup-source" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/pwm@23000|zephyr,pm-device-runtime-auto" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/pwm@23000|status" "disabled") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/pwm@23000|compatible" "nordic,nrf-pwm;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/pwm@23000|reg" "143360;4096;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/pwm@23000|interrupts" "35;1;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/pwm@23000|zephyr,deferred-init" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/pwm@23000|center-aligned" "False") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/pwm@23000|NUM" "1") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/pwm@23000|ADDR" "0x50023000;") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/pwm@23000|SIZE" "0x1000;") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/soc/peripheral@50000000/pwm@24000" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_NODELABEL|pwm3" "/soc/peripheral@50000000/pwm@24000") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/pwm@24000|wakeup-source" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/pwm@24000|zephyr,pm-device-runtime-auto" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/pwm@24000|status" "disabled") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/pwm@24000|compatible" "nordic,nrf-pwm;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/pwm@24000|reg" "147456;4096;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/pwm@24000|interrupts" "36;1;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/pwm@24000|zephyr,deferred-init" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/pwm@24000|center-aligned" "False") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/pwm@24000|NUM" "1") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/pwm@24000|ADDR" "0x50024000;") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/pwm@24000|SIZE" "0x1000;") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/soc/peripheral@50000000/gpio@842500" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_NODELABEL|gpio0" "/soc/peripheral@50000000/gpio@842500") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/gpio@842500|gpio-controller" "True") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/gpio@842500|ngpios" "32") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/gpio@842500|wakeup-source" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/gpio@842500|zephyr,pm-device-runtime-auto" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/gpio@842500|status" "okay") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/gpio@842500|compatible" "nordic,nrf-gpio;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/gpio@842500|reg" "8660224;768;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/gpio@842500|zephyr,deferred-init" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/gpio@842500|port" "0") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/gpio@842500|NUM" "1") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/gpio@842500|ADDR" "0x50842500;") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/gpio@842500|SIZE" "0x300;") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/soc/peripheral@50000000/rtc@14000" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_NODELABEL|rtc0" "/soc/peripheral@50000000/rtc@14000") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/rtc@14000|wakeup-source" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/rtc@14000|zephyr,pm-device-runtime-auto" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/rtc@14000|status" "disabled") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/rtc@14000|compatible" "nordic,nrf-rtc;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/rtc@14000|reg" "81920;4096;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/rtc@14000|interrupts" "20;1;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/rtc@14000|zephyr,deferred-init" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/rtc@14000|clock-frequency" "32768") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/rtc@14000|prescaler" "1") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/rtc@14000|cc-num" "4") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/rtc@14000|ppi-wrap" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/rtc@14000|fixed-top" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/rtc@14000|zli" "False") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/rtc@14000|NUM" "1") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/rtc@14000|ADDR" "0x50014000;") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/rtc@14000|SIZE" "0x1000;") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/soc/peripheral@50000000/rtc@15000" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_NODELABEL|rtc1" "/soc/peripheral@50000000/rtc@15000") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/rtc@15000|wakeup-source" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/rtc@15000|zephyr,pm-device-runtime-auto" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/rtc@15000|status" "disabled") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/rtc@15000|compatible" "nordic,nrf-rtc;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/rtc@15000|reg" "86016;4096;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/rtc@15000|interrupts" "21;1;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/rtc@15000|zephyr,deferred-init" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/rtc@15000|clock-frequency" "32768") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/rtc@15000|prescaler" "1") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/rtc@15000|cc-num" "4") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/rtc@15000|ppi-wrap" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/rtc@15000|fixed-top" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/rtc@15000|zli" "False") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/rtc@15000|NUM" "1") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/rtc@15000|ADDR" "0x50015000;") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/rtc@15000|SIZE" "0x1000;") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/soc/peripheral@50000000/clock@5000" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_NODELABEL|clock" "/soc/peripheral@50000000/clock@5000") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/clock@5000|wakeup-source" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/clock@5000|zephyr,pm-device-runtime-auto" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/clock@5000|status" "okay") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/clock@5000|compatible" "nordic,nrf-clock;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/clock@5000|reg" "20480;4096;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/clock@5000|interrupts" "5;1;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/clock@5000|zephyr,deferred-init" "False") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/clock@5000|NUM" "1") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/clock@5000|ADDR" "0x50005000;") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/clock@5000|SIZE" "0x1000;") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/soc/peripheral@50000000/power@5000" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_NODELABEL|power" "/soc/peripheral@50000000/power@5000") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/power@5000|wakeup-source" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/power@5000|zephyr,pm-device-runtime-auto" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/power@5000|status" "okay") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/power@5000|compatible" "nordic,nrf-power;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/power@5000|reg" "20480;4096;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/power@5000|interrupts" "5;1;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/power@5000|zephyr,deferred-init" "False") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/power@5000|NUM" "1") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/power@5000|ADDR" "0x50005000;") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/power@5000|SIZE" "0x1000;") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/soc/peripheral@50000000/power@5000/gpregret1@51c" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_NODELABEL|gpregret1" "/soc/peripheral@50000000/power@5000/gpregret1@51c") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/power@5000/gpregret1@51c|wakeup-source" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/power@5000/gpregret1@51c|zephyr,pm-device-runtime-auto" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/power@5000/gpregret1@51c|status" "okay") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/power@5000/gpregret1@51c|compatible" "nordic,nrf-gpregret;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/power@5000/gpregret1@51c|reg" "1308;1;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/power@5000/gpregret1@51c|zephyr,deferred-init" "False") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/power@5000/gpregret1@51c|NUM" "1") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/power@5000/gpregret1@51c|ADDR" "0x5000551c;") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/power@5000/gpregret1@51c|SIZE" "0x1;") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/soc/peripheral@50000000/power@5000/gpregret2@520" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_NODELABEL|gpregret2" "/soc/peripheral@50000000/power@5000/gpregret2@520") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/power@5000/gpregret2@520|wakeup-source" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/power@5000/gpregret2@520|zephyr,pm-device-runtime-auto" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/power@5000/gpregret2@520|status" "okay") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/power@5000/gpregret2@520|compatible" "nordic,nrf-gpregret;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/power@5000/gpregret2@520|reg" "1312;1;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/power@5000/gpregret2@520|zephyr,deferred-init" "False") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/power@5000/gpregret2@520|NUM" "1") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/power@5000/gpregret2@520|ADDR" "0x50005520;") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/power@5000/gpregret2@520|SIZE" "0x1;") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/soc/peripheral@50000000/watchdog@18000" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_NODELABEL|wdt" "/soc/peripheral@50000000/watchdog@18000") +set_target_properties(devicetree_target PROPERTIES "DT_NODELABEL|wdt0" "/soc/peripheral@50000000/watchdog@18000") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/watchdog@18000|wakeup-source" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/watchdog@18000|zephyr,pm-device-runtime-auto" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/watchdog@18000|status" "okay") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/watchdog@18000|compatible" "nordic,nrf-wdt;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/watchdog@18000|reg" "98304;4096;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/watchdog@18000|interrupts" "24;1;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/watchdog@18000|zephyr,deferred-init" "False") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/watchdog@18000|NUM" "1") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/watchdog@18000|ADDR" "0x50018000;") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/watchdog@18000|SIZE" "0x1000;") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/soc/peripheral@50000000/timer@f000" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_NODELABEL|timer0" "/soc/peripheral@50000000/timer@f000") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/timer@f000|wakeup-source" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/timer@f000|zephyr,pm-device-runtime-auto" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/timer@f000|status" "disabled") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/timer@f000|compatible" "nordic,nrf-timer;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/timer@f000|reg" "61440;4096;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/timer@f000|interrupts" "15;1;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/timer@f000|zephyr,deferred-init" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/timer@f000|cc-num" "6") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/timer@f000|max-bit-width" "32") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/timer@f000|max-frequency" "16000000") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/timer@f000|prescaler" "0") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/timer@f000|zli" "False") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/timer@f000|NUM" "1") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/timer@f000|ADDR" "0x5000f000;") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/timer@f000|SIZE" "0x1000;") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/soc/peripheral@50000000/timer@10000" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_NODELABEL|timer1" "/soc/peripheral@50000000/timer@10000") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/timer@10000|wakeup-source" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/timer@10000|zephyr,pm-device-runtime-auto" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/timer@10000|status" "disabled") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/timer@10000|compatible" "nordic,nrf-timer;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/timer@10000|reg" "65536;4096;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/timer@10000|interrupts" "16;1;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/timer@10000|zephyr,deferred-init" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/timer@10000|cc-num" "6") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/timer@10000|max-bit-width" "32") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/timer@10000|max-frequency" "16000000") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/timer@10000|prescaler" "0") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/timer@10000|zli" "False") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/timer@10000|NUM" "1") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/timer@10000|ADDR" "0x50010000;") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/timer@10000|SIZE" "0x1000;") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/soc/peripheral@50000000/timer@11000" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_NODELABEL|timer2" "/soc/peripheral@50000000/timer@11000") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/timer@11000|wakeup-source" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/timer@11000|zephyr,pm-device-runtime-auto" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/timer@11000|status" "disabled") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/timer@11000|compatible" "nordic,nrf-timer;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/timer@11000|reg" "69632;4096;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/timer@11000|interrupts" "17;1;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/timer@11000|zephyr,deferred-init" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/timer@11000|cc-num" "6") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/timer@11000|max-bit-width" "32") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/timer@11000|max-frequency" "16000000") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/timer@11000|prescaler" "0") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/peripheral@50000000/timer@11000|zli" "False") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/timer@11000|NUM" "1") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/timer@11000|ADDR" "0x50011000;") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/peripheral@50000000/timer@11000|SIZE" "0x1000;") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/soc/crypto@50840000" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_NODELABEL|cryptocell" "/soc/crypto@50840000") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/crypto@50840000|wakeup-source" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/crypto@50840000|zephyr,pm-device-runtime-auto" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/crypto@50840000|status" "okay") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/crypto@50840000|compatible" "nordic,cryptocell;arm,cryptocell-310;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/crypto@50840000|reg" "1350828032;4096;1350832128;4096;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/crypto@50840000|reg-names" "wrapper;core;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/crypto@50840000|interrupts" "64;1;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/crypto@50840000|zephyr,deferred-init" "False") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/crypto@50840000|NUM" "2") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/crypto@50840000|ADDR" "0x50840000;0x50841000;") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/crypto@50840000|SIZE" "0x1000;0x1000;") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/soc/ctrlap@50006000" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_NODELABEL|ctrlap" "/soc/ctrlap@50006000") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/ctrlap@50006000|wakeup-source" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/ctrlap@50006000|zephyr,pm-device-runtime-auto" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/ctrlap@50006000|status" "okay") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/ctrlap@50006000|compatible" "nordic,nrf-ctrlapperi;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/ctrlap@50006000|reg" "1342201856;4096;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/ctrlap@50006000|zephyr,deferred-init" "False") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/ctrlap@50006000|NUM" "1") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/ctrlap@50006000|ADDR" "0x50006000;") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/ctrlap@50006000|SIZE" "0x1000;") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/soc/gpiote@5000d000" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_NODELABEL|gpiote" "/soc/gpiote@5000d000") +set_target_properties(devicetree_target PROPERTIES "DT_NODELABEL|gpiote0" "/soc/gpiote@5000d000") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/gpiote@5000d000|wakeup-source" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/gpiote@5000d000|zephyr,pm-device-runtime-auto" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/gpiote@5000d000|status" "okay") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/gpiote@5000d000|compatible" "nordic,nrf-gpiote;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/gpiote@5000d000|reg" "1342230528;4096;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/gpiote@5000d000|interrupts" "13;5;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/gpiote@5000d000|zephyr,deferred-init" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/gpiote@5000d000|instance" "0") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/gpiote@5000d000|NUM" "1") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/gpiote@5000d000|ADDR" "0x5000d000;") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/gpiote@5000d000|SIZE" "0x1000;") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/soc/gpiote@40031000" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_NODELABEL|gpiote1" "/soc/gpiote@40031000") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/gpiote@40031000|wakeup-source" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/gpiote@40031000|zephyr,pm-device-runtime-auto" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/gpiote@40031000|status" "disabled") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/gpiote@40031000|compatible" "nordic,nrf-gpiote;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/gpiote@40031000|reg" "1073942528;4096;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/gpiote@40031000|interrupts" "49;5;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/gpiote@40031000|zephyr,deferred-init" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/gpiote@40031000|instance" "1") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/gpiote@40031000|NUM" "1") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/gpiote@40031000|ADDR" "0x40031000;") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/gpiote@40031000|SIZE" "0x1000;") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/soc/spu@50003000" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_NODELABEL|spu" "/soc/spu@50003000") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/spu@50003000|wakeup-source" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/spu@50003000|zephyr,pm-device-runtime-auto" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/spu@50003000|status" "okay") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/spu@50003000|compatible" "nordic,nrf-spu;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/spu@50003000|reg" "1342189568;4096;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/spu@50003000|interrupts" "3;1;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/spu@50003000|zephyr,deferred-init" "False") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/spu@50003000|NUM" "1") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/spu@50003000|ADDR" "0x50003000;") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/spu@50003000|SIZE" "0x1000;") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/soc/ficr@ff0000" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_NODELABEL|ficr" "/soc/ficr@ff0000") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/ficr@ff0000|wakeup-source" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/ficr@ff0000|zephyr,pm-device-runtime-auto" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/ficr@ff0000|status" "okay") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/ficr@ff0000|compatible" "nordic,nrf-ficr;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/ficr@ff0000|reg" "16711680;4096;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/ficr@ff0000|zephyr,deferred-init" "False") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/ficr@ff0000|NUM" "1") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/ficr@ff0000|ADDR" "0xff0000;") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/ficr@ff0000|SIZE" "0x1000;") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/soc/uicr@ff8000" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_NODELABEL|uicr" "/soc/uicr@ff8000") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/uicr@ff8000|wakeup-source" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/uicr@ff8000|zephyr,pm-device-runtime-auto" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/uicr@ff8000|status" "okay") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/uicr@ff8000|compatible" "nordic,nrf-uicr;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/uicr@ff8000|reg" "16744448;4096;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/uicr@ff8000|zephyr,deferred-init" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/uicr@ff8000|nfct-pins-as-gpios" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/soc/uicr@ff8000|gpio-as-nreset" "False") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/uicr@ff8000|NUM" "1") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/uicr@ff8000|ADDR" "0xff8000;") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/soc/uicr@ff8000|SIZE" "0x1000;") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/pin-controller" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_NODELABEL|pinctrl" "/pin-controller") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/pin-controller|wakeup-source" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/pin-controller|zephyr,pm-device-runtime-auto" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/pin-controller|compatible" "nordic,nrf-pinctrl;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/pin-controller|zephyr,deferred-init" "False") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/pin-controller|NUM" "0") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/pin-controller|ADDR" "") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/pin-controller|SIZE" "") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/pin-controller/uart0_default" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_NODELABEL|uart0_default" "/pin-controller/uart0_default") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/pin-controller/uart0_default|NUM" "0") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/pin-controller/uart0_default|ADDR" "") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/pin-controller/uart0_default|SIZE" "") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/pin-controller/uart0_default/group1" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/pin-controller/uart0_default/group1|bias-disable" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/pin-controller/uart0_default/group1|bias-pull-up" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/pin-controller/uart0_default/group1|bias-pull-down" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/pin-controller/uart0_default/group1|low-power-enable" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/pin-controller/uart0_default/group1|psels" "28;131099;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/pin-controller/uart0_default/group1|nordic,drive-mode" "0") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/pin-controller/uart0_default/group1|nordic,invert" "False") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/pin-controller/uart0_default/group1|NUM" "0") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/pin-controller/uart0_default/group1|ADDR" "") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/pin-controller/uart0_default/group1|SIZE" "") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/pin-controller/uart0_sleep" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_NODELABEL|uart0_sleep" "/pin-controller/uart0_sleep") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/pin-controller/uart0_sleep|NUM" "0") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/pin-controller/uart0_sleep|ADDR" "") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/pin-controller/uart0_sleep|SIZE" "") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/pin-controller/uart0_sleep/group1" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/pin-controller/uart0_sleep/group1|bias-disable" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/pin-controller/uart0_sleep/group1|bias-pull-up" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/pin-controller/uart0_sleep/group1|bias-pull-down" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/pin-controller/uart0_sleep/group1|low-power-enable" "True") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/pin-controller/uart0_sleep/group1|psels" "28;131099;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/pin-controller/uart0_sleep/group1|nordic,drive-mode" "0") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/pin-controller/uart0_sleep/group1|nordic,invert" "False") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/pin-controller/uart0_sleep/group1|NUM" "0") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/pin-controller/uart0_sleep/group1|ADDR" "") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/pin-controller/uart0_sleep/group1|SIZE" "") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/pin-controller/i2c2_default" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_NODELABEL|i2c2_default" "/pin-controller/i2c2_default") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/pin-controller/i2c2_default|NUM" "0") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/pin-controller/i2c2_default|ADDR" "") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/pin-controller/i2c2_default|SIZE" "") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/pin-controller/i2c2_default/group1" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/pin-controller/i2c2_default/group1|bias-disable" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/pin-controller/i2c2_default/group1|bias-pull-up" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/pin-controller/i2c2_default/group1|bias-pull-down" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/pin-controller/i2c2_default/group1|low-power-enable" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/pin-controller/i2c2_default/group1|psels" "1572872;1441799;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/pin-controller/i2c2_default/group1|nordic,drive-mode" "0") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/pin-controller/i2c2_default/group1|nordic,invert" "False") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/pin-controller/i2c2_default/group1|NUM" "0") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/pin-controller/i2c2_default/group1|ADDR" "") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/pin-controller/i2c2_default/group1|SIZE" "") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/pin-controller/i2c2_sleep" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_NODELABEL|i2c2_sleep" "/pin-controller/i2c2_sleep") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/pin-controller/i2c2_sleep|NUM" "0") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/pin-controller/i2c2_sleep|ADDR" "") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/pin-controller/i2c2_sleep|SIZE" "") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/pin-controller/i2c2_sleep/group1" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/pin-controller/i2c2_sleep/group1|bias-disable" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/pin-controller/i2c2_sleep/group1|bias-pull-up" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/pin-controller/i2c2_sleep/group1|bias-pull-down" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/pin-controller/i2c2_sleep/group1|low-power-enable" "True") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/pin-controller/i2c2_sleep/group1|psels" "1572872;1441799;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/pin-controller/i2c2_sleep/group1|nordic,drive-mode" "0") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/pin-controller/i2c2_sleep/group1|nordic,invert" "False") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/pin-controller/i2c2_sleep/group1|NUM" "0") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/pin-controller/i2c2_sleep/group1|ADDR" "") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/pin-controller/i2c2_sleep/group1|SIZE" "") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/pin-controller/pwm0_default" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_NODELABEL|pwm0_default" "/pin-controller/pwm0_default") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/pin-controller/pwm0_default|NUM" "0") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/pin-controller/pwm0_default|ADDR" "") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/pin-controller/pwm0_default|SIZE" "") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/pin-controller/pwm0_default/group1" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/pin-controller/pwm0_default/group1|bias-disable" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/pin-controller/pwm0_default/group1|bias-pull-up" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/pin-controller/pwm0_default/group1|bias-pull-down" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/pin-controller/pwm0_default/group1|low-power-enable" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/pin-controller/pwm0_default/group1|psels" "2883609;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/pin-controller/pwm0_default/group1|nordic,drive-mode" "0") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/pin-controller/pwm0_default/group1|nordic,invert" "False") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/pin-controller/pwm0_default/group1|NUM" "0") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/pin-controller/pwm0_default/group1|ADDR" "") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/pin-controller/pwm0_default/group1|SIZE" "") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/pin-controller/pwm0_sleep" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_NODELABEL|pwm0_sleep" "/pin-controller/pwm0_sleep") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/pin-controller/pwm0_sleep|NUM" "0") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/pin-controller/pwm0_sleep|ADDR" "") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/pin-controller/pwm0_sleep|SIZE" "") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/pin-controller/pwm0_sleep/group1" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/pin-controller/pwm0_sleep/group1|bias-disable" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/pin-controller/pwm0_sleep/group1|bias-pull-up" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/pin-controller/pwm0_sleep/group1|bias-pull-down" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/pin-controller/pwm0_sleep/group1|low-power-enable" "True") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/pin-controller/pwm0_sleep/group1|psels" "2883609;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/pin-controller/pwm0_sleep/group1|nordic,drive-mode" "0") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/pin-controller/pwm0_sleep/group1|nordic,invert" "False") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/pin-controller/pwm0_sleep/group1|NUM" "0") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/pin-controller/pwm0_sleep/group1|ADDR" "") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/pin-controller/pwm0_sleep/group1|SIZE" "") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/pin-controller/spi3_default" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_NODELABEL|spi3_default" "/pin-controller/spi3_default") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/pin-controller/spi3_default|NUM" "0") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/pin-controller/spi3_default|ADDR" "") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/pin-controller/spi3_default|SIZE" "") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/pin-controller/spi3_default/group1" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/pin-controller/spi3_default/group1|bias-disable" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/pin-controller/spi3_default/group1|bias-pull-up" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/pin-controller/spi3_default/group1|bias-pull-down" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/pin-controller/spi3_default/group1|low-power-enable" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/pin-controller/spi3_default/group1|psels" "524301;655374;786447;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/pin-controller/spi3_default/group1|nordic,drive-mode" "0") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/pin-controller/spi3_default/group1|nordic,invert" "False") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/pin-controller/spi3_default/group1|NUM" "0") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/pin-controller/spi3_default/group1|ADDR" "") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/pin-controller/spi3_default/group1|SIZE" "") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/pin-controller/spi3_sleep" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_NODELABEL|spi3_sleep" "/pin-controller/spi3_sleep") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/pin-controller/spi3_sleep|NUM" "0") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/pin-controller/spi3_sleep|ADDR" "") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/pin-controller/spi3_sleep|SIZE" "") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/pin-controller/spi3_sleep/group1" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/pin-controller/spi3_sleep/group1|bias-disable" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/pin-controller/spi3_sleep/group1|bias-pull-up" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/pin-controller/spi3_sleep/group1|bias-pull-down" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/pin-controller/spi3_sleep/group1|low-power-enable" "True") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/pin-controller/spi3_sleep/group1|psels" "524301;655374;786447;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/pin-controller/spi3_sleep/group1|nordic,drive-mode" "0") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/pin-controller/spi3_sleep/group1|nordic,invert" "False") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/pin-controller/spi3_sleep/group1|NUM" "0") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/pin-controller/spi3_sleep/group1|ADDR" "") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/pin-controller/spi3_sleep/group1|SIZE" "") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/entropy_bt_hci" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_NODELABEL|rng_hci" "/entropy_bt_hci") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/entropy_bt_hci|wakeup-source" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/entropy_bt_hci|zephyr,pm-device-runtime-auto" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/entropy_bt_hci|status" "okay") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/entropy_bt_hci|compatible" "zephyr,bt-hci-entropy;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/entropy_bt_hci|zephyr,deferred-init" "False") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/entropy_bt_hci|NUM" "0") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/entropy_bt_hci|ADDR" "") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/entropy_bt_hci|SIZE" "") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/sw-pwm" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_NODELABEL|sw_pwm" "/sw-pwm") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/sw-pwm|wakeup-source" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/sw-pwm|zephyr,pm-device-runtime-auto" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/sw-pwm|status" "disabled") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/sw-pwm|compatible" "nordic,nrf-sw-pwm;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/sw-pwm|zephyr,deferred-init" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/sw-pwm|clock-prescaler" "0") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/sw-pwm|NUM" "0") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/sw-pwm|ADDR" "") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/sw-pwm|SIZE" "") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/cpus" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_REG|/cpus|NUM" "0") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/cpus|ADDR" "") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/cpus|SIZE" "") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/cpus/cpu@0" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/cpus/cpu@0|wakeup-source" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/cpus/cpu@0|zephyr,pm-device-runtime-auto" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/cpus/cpu@0|compatible" "arm,cortex-m33f;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/cpus/cpu@0|reg" "0;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/cpus/cpu@0|zephyr,deferred-init" "False") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/cpus/cpu@0|NUM" "1") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/cpus/cpu@0|ADDR" "0x0;") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/cpus/cpu@0|SIZE" "NONE;") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/cpus/cpu@0/mpu@e000ed90" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_NODELABEL|mpu" "/cpus/cpu@0/mpu@e000ed90") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/cpus/cpu@0/mpu@e000ed90|wakeup-source" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/cpus/cpu@0/mpu@e000ed90|zephyr,pm-device-runtime-auto" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/cpus/cpu@0/mpu@e000ed90|compatible" "arm,armv8m-mpu;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/cpus/cpu@0/mpu@e000ed90|reg" "3758157200;64;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/cpus/cpu@0/mpu@e000ed90|zephyr,deferred-init" "False") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/cpus/cpu@0/mpu@e000ed90|NUM" "1") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/cpus/cpu@0/mpu@e000ed90|ADDR" "0xe000ed90;") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/cpus/cpu@0/mpu@e000ed90|SIZE" "0x40;") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/leds" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/leds|compatible" "gpio-leds;") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/leds|NUM" "0") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/leds|ADDR" "") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/leds|SIZE" "") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/leds/led_0" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_NODELABEL|led0" "/leds/led_0") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/leds/led_0|label" "LED") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/leds/led_0|NUM" "0") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/leds/led_0|ADDR" "") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/leds/led_0|SIZE" "") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/pwmleds" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/pwmleds|compatible" "pwm-leds;") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/pwmleds|NUM" "0") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/pwmleds|ADDR" "") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/pwmleds|SIZE" "") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/pwmleds/pwm_led_0" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_NODELABEL|pwm_led0" "/pwmleds/pwm_led_0") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/pwmleds/pwm_led_0|NUM" "0") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/pwmleds/pwm_led_0|ADDR" "") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/pwmleds/pwm_led_0|SIZE" "") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/buttons" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/buttons|wakeup-source" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/buttons|zephyr,pm-device-runtime-auto" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/buttons|compatible" "gpio-keys;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/buttons|zephyr,deferred-init" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/buttons|debounce-interval-ms" "30") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/buttons|polling-mode" "False") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/buttons|NUM" "0") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/buttons|ADDR" "") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/buttons|SIZE" "") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/buttons/button_0" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_NODELABEL|button0" "/buttons/button_0") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/buttons/button_0|label" "Mode button") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/buttons/button_0|zephyr,code" "11") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/buttons/button_0|NUM" "0") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/buttons/button_0|ADDR" "") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/buttons/button_0|SIZE" "") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/connector" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_NODELABEL|stratus_header" "/connector") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/connector|compatible" "conexio-stratus-header;") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/connector|NUM" "0") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/connector|ADDR" "") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/connector|SIZE" "") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/sensor-pwr-ctrl" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/sensor-pwr-ctrl|wakeup-source" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/sensor-pwr-ctrl|zephyr,pm-device-runtime-auto" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/sensor-pwr-ctrl|compatible" "regulator-fixed;") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/sensor-pwr-ctrl|zephyr,deferred-init" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/sensor-pwr-ctrl|regulator-name" "sensor-power") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/sensor-pwr-ctrl|regulator-always-on" "False") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/sensor-pwr-ctrl|regulator-boot-on" "True") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/sensor-pwr-ctrl|NUM" "0") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/sensor-pwr-ctrl|ADDR" "") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/sensor-pwr-ctrl|SIZE" "") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/reserved-memory" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/reserved-memory|ranges" "None") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/reserved-memory|NUM" "0") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/reserved-memory|ADDR" "") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/reserved-memory|SIZE" "") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/reserved-memory/image_s@20000000" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_NODELABEL|sram0_s" "/reserved-memory/image_s@20000000") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/reserved-memory/image_s@20000000|reg" "536870912;90112;") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/reserved-memory/image_s@20000000|NUM" "1") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/reserved-memory/image_s@20000000|ADDR" "0x20000000;") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/reserved-memory/image_s@20000000|SIZE" "0x16000;") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/reserved-memory/image_modem@20016000" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_NODELABEL|sram0_modem" "/reserved-memory/image_modem@20016000") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/reserved-memory/image_modem@20016000|reg" "536961024;40960;") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/reserved-memory/image_modem@20016000|NUM" "1") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/reserved-memory/image_modem@20016000|ADDR" "0x20016000;") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/reserved-memory/image_modem@20016000|SIZE" "0xa000;") +set_target_properties(devicetree_target PROPERTIES "DT_NODE|/reserved-memory/image_ns@20020000" TRUE) +set_target_properties(devicetree_target PROPERTIES "DT_NODELABEL|sram0_ns" "/reserved-memory/image_ns@20020000") +set_target_properties(devicetree_target PROPERTIES "DT_PROP|/reserved-memory/image_ns@20020000|reg" "537001984;131072;") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/reserved-memory/image_ns@20020000|NUM" "1") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/reserved-memory/image_ns@20020000|ADDR" "0x20020000;") +set_target_properties(devicetree_target PROPERTIES "DT_REG|/reserved-memory/image_ns@20020000|SIZE" "0x20000;") +set_target_properties(devicetree_target PROPERTIES "DT_COMP|conexio,stratus_pro" "/") +set_target_properties(devicetree_target PROPERTIES "DT_COMP|nordic,nrf9151-laca" "/soc") +set_target_properties(devicetree_target PROPERTIES "DT_COMP|nordic,nrf9120" "/soc") +set_target_properties(devicetree_target PROPERTIES "DT_COMP|nordic,nrf91" "/soc") +set_target_properties(devicetree_target PROPERTIES "DT_COMP|simple-bus" "/soc") +set_target_properties(devicetree_target PROPERTIES "DT_COMP|arm,v8m-nvic" "/soc/interrupt-controller@e000e100") +set_target_properties(devicetree_target PROPERTIES "DT_COMP|arm,armv8m-systick" "/soc/timer@e000e010") +set_target_properties(devicetree_target PROPERTIES "DT_COMP|mmio-sram" "/soc/memory@20000000") +set_target_properties(devicetree_target PROPERTIES "DT_COMP|nordic,nrf91-flash-controller" "/soc/peripheral@50000000/flash-controller@39000") +set_target_properties(devicetree_target PROPERTIES "DT_COMP|soc-nv-flash" "/soc/peripheral@50000000/flash-controller@39000/flash@0") +set_target_properties(devicetree_target PROPERTIES "DT_COMP|nordic,nrf-saadc" "/soc/peripheral@50000000/adc@e000") +set_target_properties(devicetree_target PROPERTIES "DT_COMP|nordic,nrf-dppic" "/soc/peripheral@50000000/dppic@17000") +set_target_properties(devicetree_target PROPERTIES "DT_COMP|nordic,nrf-egu" "/soc/peripheral@50000000/egu@1b000;/soc/peripheral@50000000/egu@1c000;/soc/peripheral@50000000/egu@1d000;/soc/peripheral@50000000/egu@1e000;/soc/peripheral@50000000/egu@1f000;/soc/peripheral@50000000/egu@20000") +set_target_properties(devicetree_target PROPERTIES "DT_COMP|nordic,nrf-ipc" "/soc/peripheral@50000000/ipc@2a000") +set_target_properties(devicetree_target PROPERTIES "DT_COMP|nordic,nrf-i2s" "/soc/peripheral@50000000/i2s@28000") +set_target_properties(devicetree_target PROPERTIES "DT_COMP|nordic,nrf-kmu" "/soc/peripheral@50000000/kmu@39000") +set_target_properties(devicetree_target PROPERTIES "DT_COMP|nordic,nrf-pdm" "/soc/peripheral@50000000/pdm@26000") +set_target_properties(devicetree_target PROPERTIES "DT_COMP|nordic,nrf-regulators" "/soc/peripheral@50000000/regulator@4000") +set_target_properties(devicetree_target PROPERTIES "DT_COMP|nordic,nrf-vmc" "/soc/peripheral@50000000/vmc@3a000") +set_target_properties(devicetree_target PROPERTIES "DT_COMP|nordic,nrf-uarte" "/soc/peripheral@50000000/uart@8000;/soc/peripheral@50000000/uart@9000;/soc/peripheral@50000000/uart@a000;/soc/peripheral@50000000/uart@b000") +set_target_properties(devicetree_target PROPERTIES "DT_COMP|nordic,nrf-twim" "/soc/peripheral@50000000/i2c@8000;/soc/peripheral@50000000/i2c@9000;/soc/peripheral@50000000/i2c@a000;/soc/peripheral@50000000/i2c@b000") +set_target_properties(devicetree_target PROPERTIES "DT_COMP|nordic,npm1300" "/soc/peripheral@50000000/i2c@a000/npm1300@6b") +set_target_properties(devicetree_target PROPERTIES "DT_COMP|nordic,npm1300-charger" "/soc/peripheral@50000000/i2c@a000/npm1300@6b/charger") +set_target_properties(devicetree_target PROPERTIES "DT_COMP|nordic,npm1300-regulator" "/soc/peripheral@50000000/i2c@a000/npm1300@6b/regulators") +set_target_properties(devicetree_target PROPERTIES "DT_COMP|st,lis2dh" "/soc/peripheral@50000000/i2c@a000/lis2dh@18") +set_target_properties(devicetree_target PROPERTIES "DT_COMP|atmel,at24" "/soc/peripheral@50000000/i2c@a000/eeprom@50") +set_target_properties(devicetree_target PROPERTIES "DT_COMP|nordic,nrf-spim" "/soc/peripheral@50000000/spi@8000;/soc/peripheral@50000000/spi@9000;/soc/peripheral@50000000/spi@a000;/soc/peripheral@50000000/spi@b000") +set_target_properties(devicetree_target PROPERTIES "DT_COMP|nordic,nrf-pwm" "/soc/peripheral@50000000/pwm@21000;/soc/peripheral@50000000/pwm@22000;/soc/peripheral@50000000/pwm@23000;/soc/peripheral@50000000/pwm@24000") +set_target_properties(devicetree_target PROPERTIES "DT_COMP|nordic,nrf-gpio" "/soc/peripheral@50000000/gpio@842500") +set_target_properties(devicetree_target PROPERTIES "DT_COMP|nordic,nrf-rtc" "/soc/peripheral@50000000/rtc@14000;/soc/peripheral@50000000/rtc@15000") +set_target_properties(devicetree_target PROPERTIES "DT_COMP|nordic,nrf-clock" "/soc/peripheral@50000000/clock@5000") +set_target_properties(devicetree_target PROPERTIES "DT_COMP|nordic,nrf-power" "/soc/peripheral@50000000/power@5000") +set_target_properties(devicetree_target PROPERTIES "DT_COMP|nordic,nrf-gpregret" "/soc/peripheral@50000000/power@5000/gpregret1@51c;/soc/peripheral@50000000/power@5000/gpregret2@520") +set_target_properties(devicetree_target PROPERTIES "DT_COMP|nordic,nrf-wdt" "/soc/peripheral@50000000/watchdog@18000") +set_target_properties(devicetree_target PROPERTIES "DT_COMP|nordic,nrf-timer" "/soc/peripheral@50000000/timer@f000;/soc/peripheral@50000000/timer@10000;/soc/peripheral@50000000/timer@11000") +set_target_properties(devicetree_target PROPERTIES "DT_COMP|nordic,cryptocell" "/soc/crypto@50840000") +set_target_properties(devicetree_target PROPERTIES "DT_COMP|arm,cryptocell-310" "/soc/crypto@50840000") +set_target_properties(devicetree_target PROPERTIES "DT_COMP|nordic,nrf-ctrlapperi" "/soc/ctrlap@50006000") +set_target_properties(devicetree_target PROPERTIES "DT_COMP|nordic,nrf-gpiote" "/soc/gpiote@5000d000;/soc/gpiote@40031000") +set_target_properties(devicetree_target PROPERTIES "DT_COMP|nordic,nrf-spu" "/soc/spu@50003000") +set_target_properties(devicetree_target PROPERTIES "DT_COMP|nordic,nrf-ficr" "/soc/ficr@ff0000") +set_target_properties(devicetree_target PROPERTIES "DT_COMP|nordic,nrf-uicr" "/soc/uicr@ff8000") +set_target_properties(devicetree_target PROPERTIES "DT_COMP|nordic,nrf-pinctrl" "/pin-controller") +set_target_properties(devicetree_target PROPERTIES "DT_COMP|zephyr,bt-hci-entropy" "/entropy_bt_hci") +set_target_properties(devicetree_target PROPERTIES "DT_COMP|nordic,nrf-sw-pwm" "/sw-pwm") +set_target_properties(devicetree_target PROPERTIES "DT_COMP|arm,cortex-m33f" "/cpus/cpu@0") +set_target_properties(devicetree_target PROPERTIES "DT_COMP|arm,armv8m-mpu" "/cpus/cpu@0/mpu@e000ed90") +set_target_properties(devicetree_target PROPERTIES "DT_COMP|gpio-leds" "/leds") +set_target_properties(devicetree_target PROPERTIES "DT_COMP|pwm-leds" "/pwmleds") +set_target_properties(devicetree_target PROPERTIES "DT_COMP|gpio-keys" "/buttons") +set_target_properties(devicetree_target PROPERTIES "DT_COMP|conexio-stratus-header" "/connector") +set_target_properties(devicetree_target PROPERTIES "DT_COMP|regulator-fixed" "/sensor-pwr-ctrl") diff --git a/nrfdemo/build/mcuboot/zephyr/edt.pickle b/nrfdemo/build/mcuboot/zephyr/edt.pickle Binary files differnew file mode 100644 index 0000000..3516cc8 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/edt.pickle diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/app_commit.h b/nrfdemo/build/mcuboot/zephyr/include/generated/app_commit.h new file mode 100644 index 0000000..1a806c0 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/app_commit.h @@ -0,0 +1,12 @@ +#ifndef _APP_COMMIT_H_ +#define _APP_COMMIT_H_ + +/* values come from cmake/version.cmake + * BUILD_COMMIT related values will be 'git rev-parse', + * alternatively user defined BUILD_VERSION. + */ + +#define APP_COMMIT daf2946a0f07 +#define APP_COMMIT_STRING "daf2946a0f07" + +#endif /* _APP_COMMIT_H_ */ diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/app_data_alignment.ld b/nrfdemo/build/mcuboot/zephyr/include/generated/app_data_alignment.ld new file mode 100644 index 0000000..a9257f1 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/app_data_alignment.ld @@ -0,0 +1,9 @@ +/* + * Copyright (c) 2017 Linaro Limited. + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/* Set initial alignment to the 32 byte minimum for all MPUs */ +_app_data_align = 32; +. = ALIGN(32); diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/app_smem.ld b/nrfdemo/build/mcuboot/zephyr/include/generated/app_smem.ld new file mode 100644 index 0000000..7b3eead --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/app_smem.ld @@ -0,0 +1,38 @@ +/* SPDX-License-Identifier: Apache-2.0 */ + +/* + * This hackish way of including files is due to CMake issues: + * https://gitlab.kitware.com/cmake/cmake/issues/11985 + * https://gitlab.kitware.com/cmake/cmake/issues/13718 + * + * When using the "Unix Makefiles" generator, CMake simply + * greps for "#include" to generate dependency list. + * So if doing it normally, both files are being included + * in the dependency list. This creates weird dependency + * issue: + * + * 1. Using A.ld to create a linker script A.cmd. + * 2. Using A.cmd to generate A_prebuilt.elf. + * 3. Using A_prebuilt.elf to create B.ld. + * 4. Creating B.cmd with B.ld. + * 5. Creating B_prebuilt.elf using B.cmd. + * + * Since the dependency list of A.cmd contains both + * A.ld and B.ld, when make is invoked again, B.ld + * is newer than A.cmd so everything from this point on + * gets rebuilt. In order to break this cycle, this + * hackish needs to be used since CMake does not parse + * macros, and thus these will not appear in + * the dependency list. The dependencies should then be + * put in CMakeLists.txt instead. + * + * Note: Ninja generator does not suffer from this issue. + */ +#ifdef LINKER_APP_SMEM_UNALIGNED +#define APP_SMEM_LD <app_smem_unaligned.ld> +#else +#define APP_SMEM_LD <app_smem_aligned.ld> +#endif + +#include APP_SMEM_LD +#undef APP_SMEM_LD diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/app_smem_aligned.ld b/nrfdemo/build/mcuboot/zephyr/include/generated/app_smem_aligned.ld new file mode 100644 index 0000000..ce36567 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/app_smem_aligned.ld @@ -0,0 +1,3 @@ +/* SPDX-License-Identifier: Apache-2.0 */ + +/* Empty file */ diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/app_smem_unaligned.ld b/nrfdemo/build/mcuboot/zephyr/include/generated/app_smem_unaligned.ld new file mode 100644 index 0000000..ddc31d4 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/app_smem_unaligned.ld @@ -0,0 +1,3 @@ +/* SPDX-License-Identifier: Apache-2.0 */ + +/* Empty file */ diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/app_version.h b/nrfdemo/build/mcuboot/zephyr/include/generated/app_version.h new file mode 100644 index 0000000..26d411d --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/app_version.h @@ -0,0 +1,25 @@ +#ifndef _APP_VERSION_H_ +#define _APP_VERSION_H_ + +/* values come from cmake/version.cmake + * BUILD_VERSION related values will be 'git describe', + * alternatively user defined BUILD_VERSION. + */ + +/* #undef ZEPHYR_VERSION_CODE */ +/* #undef ZEPHYR_VERSION */ + +#define APPVERSION 0x2010000 +#define APP_VERSION_NUMBER 0x20100 +#define APP_VERSION_MAJOR 2 +#define APP_VERSION_MINOR 1 +#define APP_PATCHLEVEL 0 +#define APP_TWEAK 0 +#define APP_VERSION_STRING "2.1.0-dev" +#define APP_VERSION_EXTENDED_STRING "2.1.0-dev+0" +#define APP_VERSION_TWEAK_STRING "2.1.0+0" + +#define APP_BUILD_VERSION v2.1.0-ncs1 + + +#endif /* _APP_VERSION_H_ */ diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/autoconf.h b/nrfdemo/build/mcuboot/zephyr/include/generated/autoconf.h new file mode 100644 index 0000000..9dd5f94 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/autoconf.h @@ -0,0 +1,523 @@ +#define CONFIG_PM_PARTITION_SIZE_MCUBOOT_SCRATCH 0x1e000 +#define CONFIG_PM_PARTITION_SIZE_MCUBOOT_PAD 0x200 +#define CONFIG_PM_PARTITION_SIZE_MCUBOOT 0xc000 +#define CONFIG_BOOT_USE_NRF_CC310_BL 1 +#define CONFIG_MCUBOOT_NRF_CLEANUP_PERIPHERAL 1 +#define CONFIG_BOOT_SIGNATURE_KEY_FILE "root-ec-p256.pem" +#define CONFIG_BOOT_ERASE_PROGRESSIVELY 1 +#define CONFIG_MCUBOOT 1 +#define CONFIG_BOOT_USE_CC310 1 +#define CONFIG_NRFXLIB_CRYPTO 1 +#define CONFIG_NRF_CC310_BL 1 +#define CONFIG_BOOT_SIGNATURE_TYPE_ECDSA_P256 1 +#define CONFIG_BOOT_ECDSA_CC310 1 +#define CONFIG_MCUBOOT_CLEANUP_ARM_CORE 1 +#define CONFIG_MBEDTLS_CFG_FILE "mcuboot-mbedtls-cfg.h" +#define CONFIG_BOOT_VALIDATE_SLOT0 1 +#define CONFIG_BOOT_PREFER_SWAP_MOVE 1 +#define CONFIG_BOOT_SWAP_USING_MOVE 1 +#define CONFIG_BOOT_ENCRYPTION_SUPPORT 1 +#define CONFIG_BOOT_MAX_IMG_SECTORS 128 +#define CONFIG_BOOT_SHARE_BACKEND_DISABLED 1 +#define CONFIG_BOOT_FIH_PROFILE_LOW 1 +#define CONFIG_BOOT_USB_DFU_NO 1 +#define CONFIG_MCUBOOT_LOG_LEVEL_INF 1 +#define CONFIG_MCUBOOT_LOG_LEVEL 3 +#define CONFIG_MCUBOOT_LOG_THREAD_STACK_SIZE 768 +#define CONFIG_UPDATEABLE_IMAGE_NUMBER 1 +#define CONFIG_BOOT_WATCHDOG_FEED 1 +#define CONFIG_MCUBOOT_DEVICE_SETTINGS 1 +#define CONFIG_USB_DEVICE_PRODUCT "MCUBOOT" +#define CONFIG_FLASH_LOAD_SIZE 0x10000 +#define CONFIG_FLASH_LOAD_OFFSET 0x0 +#define CONFIG_NUM_IRQS 65 +#define CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC 32768 +#define CONFIG_FLASH_SIZE 1024 +#define CONFIG_FLASH_BASE_ADDRESS 0x0 +#define CONFIG_MP_MAX_NUM_CPUS 1 +#define CONFIG_PLATFORM_SPECIFIC_INIT 1 +#define CONFIG_SYS_CLOCK_TICKS_PER_SEC 32768 +#define CONFIG_ROM_START_OFFSET 0x0 +#define CONFIG_PINCTRL 1 +#define CONFIG_BUILD_OUTPUT_BIN 1 +#define CONFIG_XIP 1 +#define CONFIG_MAIN_STACK_SIZE 10240 +#define CONFIG_IDLE_STACK_SIZE 320 +#define CONFIG_HAS_FLASH_LOAD_OFFSET 1 +#define CONFIG_CPU_HAS_ARM_MPU 1 +#define CONFIG_TICKLESS_KERNEL 1 +#define CONFIG_CLOCK_CONTROL_INIT_PRIORITY 30 +#define CONFIG_USE_DT_CODE_PARTITION 1 +#define CONFIG_FPU 1 +#define CONFIG_HW_STACK_PROTECTION 1 +#define CONFIG_SERIAL_INIT_PRIORITY 50 +#define CONFIG_GPIO 1 +#define CONFIG_SERIAL 1 +#define CONFIG_KERNEL_ENTRY "__start" +#define CONFIG_LOG 1 +#define CONFIG_SYSTEM_WORKQUEUE_STACK_SIZE 1024 +#define CONFIG_DCACHE_LINE_SIZE 32 +#define CONFIG_GEN_IRQ_VECTOR_TABLE 1 +#define CONFIG_SOC "nrf9151" +#define CONFIG_ARCH_SW_ISR_TABLE_ALIGN 4 +#define CONFIG_NRF_RTC_TIMER 1 +#define CONFIG_LOG_DOMAIN_NAME "" +#define CONFIG_BUILD_OUTPUT_HEX 1 +#define CONFIG_CLOCK_CONTROL 1 +#define CONFIG_ARCH_HAS_CUSTOM_BUSY_WAIT 1 +#define CONFIG_SOC_HAS_TIMING_FUNCTIONS 1 +#define CONFIG_FLASH_INIT_PRIORITY 50 +#define CONFIG_GEN_ISR_TABLES 1 +#define CONFIG_GEN_IRQ_START_VECTOR 0 +#define CONFIG_GEN_SW_ISR_TABLE 1 +#define CONFIG_SRAM_OFFSET 0x0 +#define CONFIG_CONSOLE 1 +#define CONFIG_SOC_SERIES "nrf91" +#define CONFIG_ARCH_IRQ_VECTOR_TABLE_ALIGN 4 +#define CONFIG_ISR_STACK_SIZE 2048 +#define CONFIG_MINIMAL_LIBC_OPTIMIZE_STRING_FOR_SIZE 1 +#define CONFIG_ICACHE_LINE_SIZE 32 +#define CONFIG_DT_HAS_ARM_ARMV8M_MPU_ENABLED 1 +#define CONFIG_DT_HAS_ARM_CORTEX_M33F_ENABLED 1 +#define CONFIG_DT_HAS_ARM_CRYPTOCELL_310_ENABLED 1 +#define CONFIG_DT_HAS_ARM_V8M_NVIC_ENABLED 1 +#define CONFIG_DT_HAS_ATMEL_AT24_ENABLED 1 +#define CONFIG_DT_HAS_FIXED_PARTITIONS_ENABLED 1 +#define CONFIG_DT_HAS_GPIO_KEYS_ENABLED 1 +#define CONFIG_DT_HAS_GPIO_LEDS_ENABLED 1 +#define CONFIG_DT_HAS_MMIO_SRAM_ENABLED 1 +#define CONFIG_DT_HAS_NORDIC_NPM1300_ENABLED 1 +#define CONFIG_DT_HAS_NORDIC_NPM1300_CHARGER_ENABLED 1 +#define CONFIG_DT_HAS_NORDIC_NPM1300_REGULATOR_ENABLED 1 +#define CONFIG_DT_HAS_NORDIC_NRF_CLOCK_ENABLED 1 +#define CONFIG_DT_HAS_NORDIC_NRF_CTRLAPPERI_ENABLED 1 +#define CONFIG_DT_HAS_NORDIC_NRF_DPPIC_ENABLED 1 +#define CONFIG_DT_HAS_NORDIC_NRF_EGU_ENABLED 1 +#define CONFIG_DT_HAS_NORDIC_NRF_FICR_ENABLED 1 +#define CONFIG_DT_HAS_NORDIC_NRF_GPIO_ENABLED 1 +#define CONFIG_DT_HAS_NORDIC_NRF_GPIOTE_ENABLED 1 +#define CONFIG_DT_HAS_NORDIC_NRF_GPREGRET_ENABLED 1 +#define CONFIG_DT_HAS_NORDIC_NRF_IPC_ENABLED 1 +#define CONFIG_DT_HAS_NORDIC_NRF_KMU_ENABLED 1 +#define CONFIG_DT_HAS_NORDIC_NRF_PINCTRL_ENABLED 1 +#define CONFIG_DT_HAS_NORDIC_NRF_POWER_ENABLED 1 +#define CONFIG_DT_HAS_NORDIC_NRF_PWM_ENABLED 1 +#define CONFIG_DT_HAS_NORDIC_NRF_REGULATORS_ENABLED 1 +#define CONFIG_DT_HAS_NORDIC_NRF_SAADC_ENABLED 1 +#define CONFIG_DT_HAS_NORDIC_NRF_SPU_ENABLED 1 +#define CONFIG_DT_HAS_NORDIC_NRF_TWIM_ENABLED 1 +#define CONFIG_DT_HAS_NORDIC_NRF_UARTE_ENABLED 1 +#define CONFIG_DT_HAS_NORDIC_NRF_UICR_ENABLED 1 +#define CONFIG_DT_HAS_NORDIC_NRF_VMC_ENABLED 1 +#define CONFIG_DT_HAS_NORDIC_NRF_WDT_ENABLED 1 +#define CONFIG_DT_HAS_NORDIC_NRF91_FLASH_CONTROLLER_ENABLED 1 +#define CONFIG_DT_HAS_PWM_LEDS_ENABLED 1 +#define CONFIG_DT_HAS_REGULATOR_FIXED_ENABLED 1 +#define CONFIG_DT_HAS_SOC_NV_FLASH_ENABLED 1 +#define CONFIG_DT_HAS_ST_LIS2DH_ENABLED 1 +#define CONFIG_DT_HAS_ZEPHYR_BT_HCI_ENTROPY_ENABLED 1 +#define CONFIG_NUM_METAIRQ_PRIORITIES 0 +#define CONFIG_MPSL_WORK_STACK_SIZE 1024 +#define CONFIG_WARN_EXPERIMENTAL 1 +#define CONFIG_INIT_ARCH_HW_AT_BOOT 1 +#define CONFIG_NORDIC_QSPI_NOR_FLASH_LAYOUT_PAGE_SIZE 4096 +#define CONFIG_NCS_MCUBOOT_IN_BUILD 1 +#define CONFIG_PM_PARTITION_SIZE_PROVISION 0x280 +#define CONFIG_PM_PARTITION_SIZE_B0_IMAGE 0x8000 +#define CONFIG_IS_BOOTLOADER_IMG 1 +#define CONFIG_SB_VALIDATION_INFO_MAGIC 0x86518483 +#define CONFIG_SB_VALIDATION_POINTER_MAGIC 0x6919b47e +#define CONFIG_SB_VALIDATION_INFO_CRYPTO_ID 1 +#define CONFIG_SB_VALIDATION_INFO_VERSION 2 +#define CONFIG_SB_VALIDATION_METADATA_OFFSET 0 +#define CONFIG_SB_VALIDATE_FW_SIGNATURE 1 +#define CONFIG_SYSTEM_WORKQUEUE_PRIORITY -2 +#define CONFIG_HEAP_MEM_POOL_SIZE 0 +#define CONFIG_PCD_VERSION_PAGE_BUF_SIZE 2046 +#define CONFIG_NRF_CLOUD_CLIENT_ID_SRC_COMPILE_TIME 1 +#define CONFIG_NRF_CLOUD_CLIENT_ID "my-client-id" +#define CONFIG_FOTA_USE_NRF_CLOUD_SETTINGS_AREA 1 +#define CONFIG_FOTA_DL_TIMEOUT_MIN 15 +#define CONFIG_NRF_CLOUD_ALERT_LOG_LEVEL_DEFAULT 1 +#define CONFIG_NRF_CLOUD_ALERT_LOG_LEVEL 0 +#define CONFIG_NRF_CLOUD_LOG_OUTPUT_LEVEL 1 +#define CONFIG_NRF_CLOUD_LOG_BUF_SIZE 256 +#define CONFIG_NRF_CLOUD_LOG_LOG_LEVEL_DEFAULT 1 +#define CONFIG_NRF_CLOUD_LOG_LOG_LEVEL 0 +#define CONFIG_NRF_CLOUD_LOG_LEVEL_DEFAULT 1 +#define CONFIG_NRF_CLOUD_LOG_LEVEL 0 +#define CONFIG_MPSL_FEM_LOG_LEVEL_DEFAULT 1 +#define CONFIG_MPSL_FEM_LOG_LEVEL 0 +#define CONFIG_MPSL_THREAD_COOP_PRIO 8 +#define CONFIG_MPSL_TIMESLOT_SESSION_COUNT 0 +#define CONFIG_MPSL_LOG_LEVEL_DEFAULT 1 +#define CONFIG_MPSL_LOG_LEVEL 0 +#define CONFIG_PARTITION_MANAGER_ENABLED 1 +#define CONFIG_FLASH_MAP_CUSTOM 1 +#define CONFIG_SRAM_SIZE 88 +#define CONFIG_SRAM_BASE_ADDRESS 0x20000000 +#define CONFIG_PM_EXTERNAL_FLASH_BASE 0x0 +#define CONFIG_PM_EXTERNAL_FLASH_PATH "" +#define CONFIG_PM_EXTERNAL_FLASH_SIZE_BITS 0 +#define CONFIG_PM_SRAM_BASE 0x20000000 +#define CONFIG_PM_SRAM_SIZE 0x40000 +#define CONFIG_MGMT_FMFU_LOG_LEVEL_DEFAULT 1 +#define CONFIG_MGMT_FMFU_LOG_LEVEL 0 +#define CONFIG_MGMT_SUITFU_TRIGGER_UPDATE_RESET_DELAY_MS 100 +#define CONFIG_MGMT_SUITFU_AUTO_REGISTER_HANDLERS 1 +#define CONFIG_MGMT_SUITFU_GRP_IMG 1 +#define CONFIG_MGMT_SUITFU_IMAGE_NUMBER 0 +#define CONFIG_MGMT_SUITFU_LOG_LEVEL_DEFAULT 1 +#define CONFIG_MGMT_SUITFU_LOG_LEVEL 0 +#define CONFIG_AUDIO_MODULE_NAME_SIZE 20 +#define CONFIG_AUDIO_MODULE_LOG_LEVEL_DEFAULT 1 +#define CONFIG_AUDIO_MODULE_LOG_LEVEL 0 +#define CONFIG_COMMON_LIBC_MALLOC_ARENA_SIZE 0 +#define CONFIG_POSIX_MAX_FDS 4 +#define CONFIG_WFA_QT_LOG_LEVEL_DEFAULT 1 +#define CONFIG_WFA_QT_LOG_LEVEL 0 +#define CONFIG_WFA_QT_THREAD_STACK_SIZE 4096 +#define CONFIG_WFA_QT_REBOOT_TIMEOUT_MS 1000 +#define CONFIG_WFA_QT_DEFAULT_INTERFACE "nordic_wlan0" +#define CONFIG_WPAS_READY_TIMEOUT_MS 10000 +#define CONFIG_NRF_SPU_FLASH_REGION_SIZE 0x8000 +#define CONFIG_FPROTECT_BLOCK_SIZE 0x8000 +#define CONFIG_FPROTECT 1 +#define CONFIG_HW_UNIQUE_KEY_SUPPORTED 1 +#define CONFIG_HW_UNIQUE_KEY_PARTITION_SIZE 0x0 +#define CONFIG_NCS_BOOT_BANNER 1 +#define CONFIG_NCS_APPLICATION_BOOT_BANNER_STRING "MCUboot" +#define CONFIG_NCS_NCS_BOOT_BANNER_STRING "nRF Connect SDK" +#define CONFIG_NCS_ZEPHYR_BOOT_BANNER_STRING "Zephyr OS" +#define CONFIG_HW_CC3XX 1 +#define CONFIG_NRFX_GPIOTE_NUM_OF_EVT_HANDLERS 1 +#define CONFIG_ZTEST_MULTICORE_DEFAULT_SETTINGS 1 +#define CONFIG_ZEPHYR_NRF_MODULE 1 +#define CONFIG_SIGN_IMAGES 1 +#define CONFIG_DT_FLASH_WRITE_BLOCK_SIZE 4 +#define CONFIG_ZEPHYR_MCUBOOT_MODULE 1 +#define CONFIG_ZEPHYR_MBEDTLS_MODULE 1 +#define CONFIG_ZEPHYR_OBERON_PSA_CRYPTO_MODULE 1 +#define CONFIG_TFM_BOARD "/home/mike/Documents/ncs/v2.7.0/zephyr/modules/trusted-firmware-m/nordic/nrf9120" +#define CONFIG_ZEPHYR_TRUSTED_FIRMWARE_M_MODULE 1 +#define CONFIG_ZEPHYR_PSA_ARCH_TESTS_MODULE 1 +#define CONFIG_ZEPHYR_SOC_HWMV1_MODULE 1 +#define CONFIG_ZEPHYR_CJSON_MODULE 1 +#define CONFIG_ZEPHYR_AZURE_SDK_FOR_C_MODULE 1 +#define CONFIG_ZEPHYR_CIRRUS_LOGIC_MODULE 1 +#define CONFIG_ZEPHYR_OPENTHREAD_MODULE 1 +#define CONFIG_SUIT_ENVELOPE_TEMPLATE "" +#define CONFIG_SUIT_ENVELOPE_TARGET "" +#define CONFIG_SUIT_ENVELOPE_OUTPUT_ARTIFACT "merged.hex" +#define CONFIG_SUIT_ENVELOPE_OUTPUT_MPI_MERGE 1 +#define CONFIG_ZEPHYR_SUIT_GENERATOR_MODULE 1 +#define CONFIG_SUIT_PLATFORM_DRY_RUN_SUPPORT 1 +#define CONFIG_ZEPHYR_SUIT_PROCESSOR_MODULE 1 +#define CONFIG_ZEPHYR_MEMFAULT_FIRMWARE_SDK_MODULE 1 +#define CONFIG_ZEPHYR_COREMARK_MODULE 1 +#define CONFIG_ZEPHYR_CANOPENNODE_MODULE 1 +#define CONFIG_ZEPHYR_CHRE_MODULE 1 +#define CONFIG_ZEPHYR_LZ4_MODULE 1 +#define CONFIG_ZEPHYR_NANOPB_MODULE 1 +#define CONFIG_ZEPHYR_TF_M_TESTS_MODULE 1 +#define CONFIG_ZEPHYR_ZSCILIB_MODULE 1 +#define CONFIG_ZEPHYR_CMSIS_MODULE 1 +#define CONFIG_HAS_CMSIS_CORE 1 +#define CONFIG_HAS_CMSIS_CORE_M 1 +#define CONFIG_ZEPHYR_CMSIS_DSP_MODULE 1 +#define CONFIG_ZEPHYR_CMSIS_NN_MODULE 1 +#define CONFIG_ZEPHYR_FATFS_MODULE 1 +#define CONFIG_ZEPHYR_HAL_NORDIC_MODULE 1 +#define CONFIG_HAS_NRFX 1 +#define CONFIG_NRFX_CLOCK 1 +#define CONFIG_NRFX_CLOCK_LFXO_TWO_STAGE_ENABLED 1 +#define CONFIG_NRFX_DPPI 1 +#define CONFIG_NRFX_GPIOTE 1 +#define CONFIG_NRFX_GPIOTE0 1 +#define CONFIG_NRFX_NVMC 1 +#define CONFIG_NRFX_WDT 1 +#define CONFIG_NRFX_WDT0 1 +#define CONFIG_ZEPHYR_HAL_ST_MODULE 1 +#define CONFIG_ZEPHYR_HAL_WURTHELEKTRONIK_MODULE 1 +#define CONFIG_ZEPHYR_LIBMETAL_MODULE 1 +#define CONFIG_ZEPHYR_LIBLC3_MODULE 1 +#define CONFIG_ZEPHYR_LITTLEFS_MODULE 1 +#define CONFIG_ZEPHYR_LORAMAC_NODE_MODULE 1 +#define CONFIG_ZEPHYR_LVGL_MODULE 1 +#define CONFIG_ZEPHYR_MIPI_SYS_T_MODULE 1 +#define CONFIG_ZEPHYR_NRF_HW_MODELS_MODULE 1 +#define CONFIG_ZEPHYR_OPEN_AMP_MODULE 1 +#define CONFIG_ZEPHYR_PICOLIBC_MODULE 1 +#define CONFIG_ZEPHYR_SEGGER_MODULE 1 +#define CONFIG_HAS_SEGGER_RTT 1 +#define CONFIG_ZEPHYR_TINYCRYPT_MODULE 1 +#define CONFIG_ZEPHYR_UOSCORE_UEDHOC_MODULE 1 +#define CONFIG_ZEPHYR_ZCBOR_MODULE 1 +#define CONFIG_NRF_MODEM_SHMEM_CTRL_SIZE 0x4e8 +#define CONFIG_HAS_HW_NRF_CC3XX 1 +#define CONFIG_NRF_CC3XX_PLATFORM 1 +#define CONFIG_CC3XX_MUTEX_LOCK 1 +#define CONFIG_NRF_802154_SOURCE_NRFXLIB 1 +#define CONFIG_ZEPHYR_NRFXLIB_MODULE 1 +#define CONFIG_ZEPHYR_CONNECTEDHOMEIP_MODULE 1 +#define CONFIG_MCUBOOT_BOOTUTIL_LIB 1 +#define CONFIG_BOARD "conexio_stratus_pro" +#define CONFIG_BOARD_REVISION "" +#define CONFIG_BOARD_TARGET "conexio_stratus_pro/nrf9151" +#define CONFIG_BOARD_CONEXIO_STRATUS_PRO 1 +#define CONFIG_BOARD_CONEXIO_STRATUS_PRO_NRF9151 1 +#define CONFIG_BOARD_QUALIFIERS "nrf9151" +#define CONFIG_SOC_FAMILY "nordic_nrf" +#define CONFIG_SOC_FAMILY_NORDIC_NRF 1 +#define CONFIG_SOC_SERIES_NRF91X 1 +#define CONFIG_SOC_NRF9120 1 +#define CONFIG_SOC_NRF9151_LACA 1 +#define CONFIG_HAS_HW_NRF_CC310 1 +#define CONFIG_HAS_HW_NRF_CLOCK 1 +#define CONFIG_HAS_HW_NRF_CTRLAP 1 +#define CONFIG_HAS_HW_NRF_DPPIC 1 +#define CONFIG_HAS_HW_NRF_EGU0 1 +#define CONFIG_HAS_HW_NRF_EGU1 1 +#define CONFIG_HAS_HW_NRF_EGU2 1 +#define CONFIG_HAS_HW_NRF_EGU3 1 +#define CONFIG_HAS_HW_NRF_EGU4 1 +#define CONFIG_HAS_HW_NRF_EGU5 1 +#define CONFIG_HAS_HW_NRF_GPIO0 1 +#define CONFIG_HAS_HW_NRF_GPIOTE0 1 +#define CONFIG_HAS_HW_NRF_IPC 1 +#define CONFIG_HAS_HW_NRF_KMU 1 +#define CONFIG_HAS_HW_NRF_NVMC_PE 1 +#define CONFIG_HAS_HW_NRF_POWER 1 +#define CONFIG_HAS_HW_NRF_PWM0 1 +#define CONFIG_HAS_HW_NRF_REGULATORS 1 +#define CONFIG_HAS_HW_NRF_SAADC 1 +#define CONFIG_HAS_HW_NRF_SPU 1 +#define CONFIG_HAS_HW_NRF_TWIM2 1 +#define CONFIG_HAS_HW_NRF_UARTE0 1 +#define CONFIG_HAS_HW_NRF_VMC 1 +#define CONFIG_HAS_HW_NRF_WDT0 1 +#define CONFIG_NRF_ENABLE_ICACHE 1 +#define CONFIG_NRF_SPU_FLASH_REGION_ALIGNMENT 0x8000 +#define CONFIG_NRF_SPU_RAM_REGION_SIZE 0x2000 +#define CONFIG_NRF_SPU_RAM_REGION_ALIGNMENT 0x2000 +#define CONFIG_NRF_RTC_TIMER_USER_CHAN_COUNT 0 +#define CONFIG_NRF_SOC_SECURE_SUPPORTED 1 +#define CONFIG_NRF_APPROTECT_USE_UICR 1 +#define CONFIG_GPIO_INIT_PRIORITY 40 +#define CONFIG_SOC_LOG_LEVEL_DEFAULT 1 +#define CONFIG_SOC_LOG_LEVEL 0 +#define CONFIG_SOC_COMPATIBLE_NRF 1 +#define CONFIG_ARCH "arm" +#define CONFIG_ARCH_HAS_SINGLE_THREAD_SUPPORT 1 +#define CONFIG_CPU_CORTEX 1 +#define CONFIG_ARM_MPU_REGION_MIN_ALIGN_AND_SIZE 4 +#define CONFIG_CPU_CORTEX_M 1 +#define CONFIG_ISA_THUMB2 1 +#define CONFIG_ASSEMBLER_ISA_THUMB2 1 +#define CONFIG_COMPILER_ISA_THUMB2 1 +#define CONFIG_STACK_ALIGN_DOUBLE_WORD 1 +#define CONFIG_FAULT_DUMP 2 +#define CONFIG_BUILTIN_STACK_GUARD 1 +#define CONFIG_ARM_STACK_PROTECTION 1 +#define CONFIG_FP_HARDABI 1 +#define CONFIG_FP16 1 +#define CONFIG_FP16_IEEE 1 +#define CONFIG_CPU_CORTEX_M33 1 +#define CONFIG_CPU_CORTEX_M_HAS_SYSTICK 1 +#define CONFIG_CPU_CORTEX_M_HAS_DWT 1 +#define CONFIG_CPU_CORTEX_M_HAS_BASEPRI 1 +#define CONFIG_CPU_CORTEX_M_HAS_VTOR 1 +#define CONFIG_CPU_CORTEX_M_HAS_SPLIM 1 +#define CONFIG_CPU_CORTEX_M_HAS_PROGRAMMABLE_FAULT_PRIOS 1 +#define CONFIG_CPU_CORTEX_M_HAS_CMSE 1 +#define CONFIG_ARMV7_M_ARMV8_M_MAINLINE 1 +#define CONFIG_ARMV8_M_MAINLINE 1 +#define CONFIG_ARMV8_M_SE 1 +#define CONFIG_ARMV7_M_ARMV8_M_FP 1 +#define CONFIG_ARMV8_M_DSP 1 +#define CONFIG_NULL_POINTER_EXCEPTION_DETECTION_NONE 1 +#define CONFIG_ARM_TRUSTZONE_M 1 +#define CONFIG_CPU_HAS_NRF_IDAU 1 +#define CONFIG_ARM 1 +#define CONFIG_ARCH_IS_SET 1 +#define CONFIG_ARCH_LOG_LEVEL_DEFAULT 1 +#define CONFIG_ARCH_LOG_LEVEL 0 +#define CONFIG_LITTLE_ENDIAN 1 +#define CONFIG_GEN_PRIV_STACKS 1 +#define CONFIG_ISR_TABLES_LOCAL_DECLARATION_SUPPORTED 1 +#define CONFIG_IRQ_VECTOR_TABLE_JUMP_BY_ADDRESS 1 +#define CONFIG_EXCEPTION_DEBUG 1 +#define CONFIG_ARCH_HAS_TIMING_FUNCTIONS 1 +#define CONFIG_ARCH_HAS_TRUSTED_EXECUTION 1 +#define CONFIG_ARCH_HAS_STACK_PROTECTION 1 +#define CONFIG_ARCH_HAS_RAMFUNC_SUPPORT 1 +#define CONFIG_ARCH_HAS_NESTED_EXCEPTION_DETECTION 1 +#define CONFIG_ARCH_SUPPORTS_COREDUMP 1 +#define CONFIG_ARCH_SUPPORTS_ARCH_HW_INIT 1 +#define CONFIG_ARCH_SUPPORTS_ROM_START 1 +#define CONFIG_ARCH_HAS_EXTRA_EXCEPTION_INFO 1 +#define CONFIG_ARCH_HAS_THREAD_LOCAL_STORAGE 1 +#define CONFIG_ARCH_HAS_SUSPEND_TO_RAM 1 +#define CONFIG_ARCH_HAS_THREAD_ABORT 1 +#define CONFIG_ARCH_HAS_CODE_DATA_RELOCATION 1 +#define CONFIG_CPU_HAS_TEE 1 +#define CONFIG_CPU_HAS_FPU 1 +#define CONFIG_CPU_HAS_MPU 1 +#define CONFIG_TOOLCHAIN_HAS_BUILTIN_FFS 1 +#define CONFIG_KERNEL_LOG_LEVEL_DEFAULT 1 +#define CONFIG_KERNEL_LOG_LEVEL 0 +#define CONFIG_NUM_COOP_PRIORITIES 1 +#define CONFIG_NUM_PREEMPT_PRIORITIES 0 +#define CONFIG_MAIN_THREAD_PRIORITY -2 +#define CONFIG_COOP_ENABLED 1 +#define CONFIG_PRIORITY_CEILING -127 +#define CONFIG_THREAD_STACK_INFO 1 +#define CONFIG_SCHED_DUMB 1 +#define CONFIG_WAITQ_DUMB 1 +#define CONFIG_ERRNO 1 +#define CONFIG_BARRIER_OPERATIONS_ARCH 1 +#define CONFIG_ATOMIC_OPERATIONS_BUILTIN 1 +#define CONFIG_NUM_MBOX_ASYNC_MSGS 10 +#define CONFIG_KERNEL_MEM_POOL 1 +#define CONFIG_ARCH_HAS_CUSTOM_SWAP_TO_MAIN 1 +#define CONFIG_SWAP_NONATOMIC 1 +#define CONFIG_SYS_CLOCK_EXISTS 1 +#define CONFIG_TIMEOUT_64BIT 1 +#define CONFIG_SYS_CLOCK_MAX_TIMEOUT_DAYS 365 +#define CONFIG_MP_NUM_CPUS 1 +#define CONFIG_TOOLCHAIN_SUPPORTS_THREAD_LOCAL_STORAGE 1 +#define CONFIG_KERNEL_INIT_PRIORITY_OBJECTS 30 +#define CONFIG_KERNEL_INIT_PRIORITY_DEFAULT 40 +#define CONFIG_KERNEL_INIT_PRIORITY_DEVICE 50 +#define CONFIG_APPLICATION_INIT_PRIORITY 90 +#define CONFIG_CLOCK_CONTROL_LOG_LEVEL_DEFAULT 1 +#define CONFIG_CLOCK_CONTROL_LOG_LEVEL 0 +#define CONFIG_CLOCK_CONTROL_NRF 1 +#define CONFIG_CLOCK_CONTROL_NRF_K32SRC_XTAL 1 +#define CONFIG_CLOCK_CONTROL_NRF_K32SRC_50PPM 1 +#define CONFIG_CLOCK_CONTROL_NRF_ACCURACY 50 +#define CONFIG_CONSOLE_INPUT_MAX_LINE_LEN 128 +#define CONFIG_CONSOLE_HAS_DRIVER 1 +#define CONFIG_CONSOLE_INIT_PRIORITY 60 +#define CONFIG_UART_CONSOLE 1 +#define CONFIG_UART_CONSOLE_LOG_LEVEL_DEFAULT 1 +#define CONFIG_UART_CONSOLE_LOG_LEVEL 0 +#define CONFIG_FLASH_HAS_DRIVER_ENABLED 1 +#define CONFIG_FLASH_HAS_PAGE_LAYOUT 1 +#define CONFIG_FLASH 1 +#define CONFIG_FLASH_LOG_LEVEL_DEFAULT 1 +#define CONFIG_FLASH_LOG_LEVEL 0 +#define CONFIG_FLASH_PAGE_LAYOUT 1 +#define CONFIG_SOC_FLASH_NRF 1 +#define CONFIG_SOC_FLASH_NRF_RADIO_SYNC_NONE 1 +#define CONFIG_GPIO_LOG_LEVEL_DEFAULT 1 +#define CONFIG_GPIO_LOG_LEVEL 0 +#define CONFIG_GPIO_NRFX 1 +#define CONFIG_GPIO_NRFX_INTERRUPT 1 +#define CONFIG_INTC_INIT_PRIORITY 40 +#define CONFIG_INTC_LOG_LEVEL_DEFAULT 1 +#define CONFIG_INTC_LOG_LEVEL 0 +#define CONFIG_PINCTRL_LOG_LEVEL_DEFAULT 1 +#define CONFIG_PINCTRL_LOG_LEVEL 0 +#define CONFIG_PINCTRL_STORE_REG 1 +#define CONFIG_PINCTRL_NRF 1 +#define CONFIG_SERIAL_HAS_DRIVER 1 +#define CONFIG_SERIAL_SUPPORT_ASYNC 1 +#define CONFIG_SERIAL_SUPPORT_INTERRUPT 1 +#define CONFIG_UART_LOG_LEVEL_DEFAULT 1 +#define CONFIG_UART_LOG_LEVEL 0 +#define CONFIG_UART_NRFX 1 +#define CONFIG_UART_NRFX_UARTE 1 +#define CONFIG_UART_NRFX_UARTE_LEGACY_SHIM 1 +#define CONFIG_UART_0_ENHANCED_POLL_OUT 1 +#define CONFIG_UART_0_NRF_TX_BUFFER_SIZE 32 +#define CONFIG_SYSTEM_CLOCK_INIT_PRIORITY 0 +#define CONFIG_TICKLESS_CAPABLE 1 +#define CONFIG_SYSTEM_TIMER_HAS_DISABLE_SUPPORT 1 +#define CONFIG_SYSTEM_CLOCK_WAIT_FOR_STABILITY 1 +#define CONFIG_NRF_USBD_COMMON_LOG_LEVEL_DEFAULT 1 +#define CONFIG_NRF_USBD_COMMON_LOG_LEVEL 0 +#define CONFIG_USBC_LOG_LEVEL_DEFAULT 1 +#define CONFIG_USBC_LOG_LEVEL 0 +#define CONFIG_FULL_LIBC_SUPPORTED 1 +#define CONFIG_MINIMAL_LIBC_SUPPORTED 1 +#define CONFIG_NEWLIB_LIBC_SUPPORTED 1 +#define CONFIG_PICOLIBC_SUPPORTED 1 +#define CONFIG_MINIMAL_LIBC 1 +#define CONFIG_HAS_NEWLIB_LIBC_NANO 1 +#define CONFIG_COMMON_LIBC_ABORT 1 +#define CONFIG_COMMON_LIBC_GMTIME_R 1 +#define CONFIG_COMMON_LIBC_MALLOC 1 +#define CONFIG_COMMON_LIBC_CALLOC 1 +#define CONFIG_COMMON_LIBC_REALLOCARRAY 1 +#define CONFIG_COMMON_LIBC_STRNLEN 1 +#define CONFIG_MINIMAL_LIBC_NON_REENTRANT_FUNCTIONS 1 +#define CONFIG_MINIMAL_LIBC_MALLOC 1 +#define CONFIG_MINIMAL_LIBC_MALLOC_ARENA_SIZE -2 +#define CONFIG_MINIMAL_LIBC_CALLOC 1 +#define CONFIG_MINIMAL_LIBC_REALLOCARRAY 1 +#define CONFIG_MINIMAL_LIBC_TIME 1 +#define CONFIG_STDOUT_CONSOLE 1 +#define CONFIG_NEED_LIBC_MEM_PARTITION 1 +#define CONFIG_SYS_HEAP_ALLOC_LOOPS 3 +#define CONFIG_SYS_HEAP_AUTO 1 +#define CONFIG_HAS_POWEROFF 1 +#define CONFIG_CBPRINTF_NANO 1 +#define CONFIG_CBPRINTF_FULL_INTEGRAL 1 +#define CONFIG_CBPRINTF_LIBC_SUBSTS 1 +#define CONFIG_CBPRINTF_PACKAGE_LOG_LEVEL_DEFAULT 1 +#define CONFIG_CBPRINTF_PACKAGE_LOG_LEVEL 0 +#define CONFIG_CBPRINTF_CONVERT_CHECK_PTR 1 +#define CONFIG_POSIX_ENV_LOG_LEVEL_DEFAULT 1 +#define CONFIG_POSIX_ENV_LOG_LEVEL 0 +#define CONFIG_SEM_VALUE_MAX 32767 +#define CONFIG_SEM_NAMELEN_MAX 16 +#define CONFIG_POSIX_RTSIG_MAX 0 +#define CONFIG_POSIX_PAGE_SIZE_BITS 6 +#define CONFIG_LIBGCC_RTLIB 1 +#define CONFIG_NOTIFY 1 +#define CONFIG_ONOFF 1 +#define CONFIG_PRINTK 1 +#define CONFIG_EARLY_CONSOLE 1 +#define CONFIG_ASSERT_VERBOSE 1 +#define CONFIG_LLEXT_EDK_NAME "llext-edk" +#define CONFIG_LOG_CORE_INIT_PRIORITY 0 +#define CONFIG_LOG_MODE_MINIMAL 1 +#define CONFIG_LOG_DEFAULT_LEVEL 0 +#define CONFIG_LOG_OVERRIDE_LEVEL 0 +#define CONFIG_LOG_MAX_LEVEL 4 +#define CONFIG_LOG_USE_VLA 1 +#define CONFIG_LOG_SIMPLE_MSG_OPTIMIZE 1 +#define CONFIG_TIMER_RANDOM_INITIAL_STATE 123456789 +#define CONFIG_FLASH_MAP 1 +#define CONFIG_COVERAGE_GCOV_HEAP_SIZE 16384 +#define CONFIG_TOOLCHAIN_ZEPHYR_0_16 1 +#define CONFIG_TOOLCHAIN_ZEPHYR_SUPPORTS_THREAD_LOCAL_STORAGE 1 +#define CONFIG_LINKER_ORPHAN_SECTION_WARN 1 +#define CONFIG_ROM_END_OFFSET 0x0 +#define CONFIG_LD_LINKER_SCRIPT_SUPPORTED 1 +#define CONFIG_LD_LINKER_TEMPLATE 1 +#define CONFIG_LINKER_SORT_BY_ALIGNMENT 1 +#define CONFIG_LINKER_GENERIC_SECTIONS_PRESENT_AT_BOOT 1 +#define CONFIG_LINKER_LAST_SECTION_ID 1 +#define CONFIG_LINKER_LAST_SECTION_ID_PATTERN 0xE015E015 +#define CONFIG_LINKER_USE_RELAX 1 +#define CONFIG_LINKER_ITERABLE_SUBALIGN 4 +#define CONFIG_LINKER_DEVNULL_SUPPORT 1 +#define CONFIG_STD_C99 1 +#define CONFIG_TOOLCHAIN_SUPPORTS_GNU_EXTENSIONS 1 +#define CONFIG_COMPILER_FREESTANDING 1 +#define CONFIG_SIZE_OPTIMIZATIONS 1 +#define CONFIG_COMPILER_TRACK_MACRO_EXPANSION 1 +#define CONFIG_COMPILER_COLOR_DIAGNOSTICS 1 +#define CONFIG_FORTIFY_SOURCE_NONE 1 +#define CONFIG_COMPILER_OPT "" +#define CONFIG_RUNTIME_ERROR_CHECKS 1 +#define CONFIG_KERNEL_BIN_NAME "zephyr" +#define CONFIG_OUTPUT_STAT 1 +#define CONFIG_OUTPUT_PRINT_MEMORY_USAGE 1 +#define CONFIG_BUILD_OUTPUT_META 1 +#define CONFIG_BUILD_OUTPUT_STRIP_PATHS 1 +#define CONFIG_CHECK_INIT_PRIORITIES 1 +#define CONFIG_WARN_DEPRECATED 1 +#define CONFIG_ENFORCE_ZEPHYR_STDINT 1 diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/devicetree_generated.h b/nrfdemo/build/mcuboot/zephyr/include/generated/devicetree_generated.h new file mode 100644 index 0000000..ad0608c --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/devicetree_generated.h @@ -0,0 +1,12023 @@ +/* + * Generated by gen_defines.py + * + * DTS input file: + * /home/mike/Documents/ncs/v2.7.0/conexio-firmware-sdk/samples/conexio_stratus/mqtt_control/build/mcuboot/zephyr/zephyr.dts.pre + * + * Directories with bindings: + * /home/mike/Documents/ncs/v2.7.0/nrf/dts/bindings, $ZEPHYR_BASE/dts/bindings + * + * Node dependency ordering (ordinal and path): + * 0 / + * 1 /aliases + * 2 /chosen + * 3 /connector + * 4 /entropy_bt_hci + * 5 /soc + * 6 /soc/interrupt-controller@e000e100 + * 7 /soc/gpiote@5000d000 + * 8 /soc/peripheral@50000000 + * 9 /soc/peripheral@50000000/gpio@842500 + * 10 /sensor-pwr-ctrl + * 11 /soc/peripheral@50000000/timer@10000 + * 12 /sw-pwm + * 13 /buttons + * 14 /buttons/button_0 + * 15 /cpus + * 16 /cpus/cpu@0 + * 17 /cpus/cpu@0/mpu@e000ed90 + * 18 /leds + * 19 /leds/led_0 + * 20 /pin-controller + * 21 /pin-controller/i2c2_default + * 22 /pin-controller/i2c2_default/group1 + * 23 /pin-controller/i2c2_sleep + * 24 /pin-controller/i2c2_sleep/group1 + * 25 /pin-controller/pwm0_default + * 26 /pin-controller/pwm0_default/group1 + * 27 /pin-controller/pwm0_sleep + * 28 /pin-controller/pwm0_sleep/group1 + * 29 /pin-controller/spi3_default + * 30 /pin-controller/spi3_default/group1 + * 31 /pin-controller/spi3_sleep + * 32 /pin-controller/spi3_sleep/group1 + * 33 /pin-controller/uart0_default + * 34 /pin-controller/uart0_default/group1 + * 35 /pin-controller/uart0_sleep + * 36 /pin-controller/uart0_sleep/group1 + * 37 /soc/peripheral@50000000/pwm@21000 + * 38 /pwmleds + * 39 /pwmleds/pwm_led_0 + * 40 /reserved-memory + * 41 /reserved-memory/image_modem@20016000 + * 42 /reserved-memory/image_ns@20020000 + * 43 /reserved-memory/image_s@20000000 + * 44 /soc/crypto@50840000 + * 45 /soc/ctrlap@50006000 + * 46 /soc/ficr@ff0000 + * 47 /soc/gpiote@40031000 + * 48 /soc/memory@20000000 + * 49 /soc/spu@50003000 + * 50 /soc/timer@e000e010 + * 51 /soc/uicr@ff8000 + * 52 /soc/peripheral@50000000/adc@e000 + * 53 /soc/peripheral@50000000/clock@5000 + * 54 /soc/peripheral@50000000/dppic@17000 + * 55 /soc/peripheral@50000000/egu@1b000 + * 56 /soc/peripheral@50000000/egu@1c000 + * 57 /soc/peripheral@50000000/egu@1d000 + * 58 /soc/peripheral@50000000/egu@1e000 + * 59 /soc/peripheral@50000000/egu@1f000 + * 60 /soc/peripheral@50000000/egu@20000 + * 61 /soc/peripheral@50000000/i2c@8000 + * 62 /soc/peripheral@50000000/i2c@9000 + * 63 /soc/peripheral@50000000/i2c@b000 + * 64 /soc/peripheral@50000000/i2s@28000 + * 65 /soc/peripheral@50000000/ipc@2a000 + * 66 /soc/peripheral@50000000/kmu@39000 + * 67 /soc/peripheral@50000000/pdm@26000 + * 68 /soc/peripheral@50000000/pwm@22000 + * 69 /soc/peripheral@50000000/pwm@23000 + * 70 /soc/peripheral@50000000/pwm@24000 + * 71 /soc/peripheral@50000000/regulator@4000 + * 72 /soc/peripheral@50000000/rtc@14000 + * 73 /soc/peripheral@50000000/rtc@15000 + * 74 /soc/peripheral@50000000/spi@8000 + * 75 /soc/peripheral@50000000/spi@9000 + * 76 /soc/peripheral@50000000/spi@a000 + * 77 /soc/peripheral@50000000/spi@b000 + * 78 /soc/peripheral@50000000/timer@f000 + * 79 /soc/peripheral@50000000/timer@11000 + * 80 /soc/peripheral@50000000/uart@8000 + * 81 /soc/peripheral@50000000/uart@9000 + * 82 /soc/peripheral@50000000/uart@a000 + * 83 /soc/peripheral@50000000/uart@b000 + * 84 /soc/peripheral@50000000/vmc@3a000 + * 85 /soc/peripheral@50000000/watchdog@18000 + * 86 /soc/peripheral@50000000/flash-controller@39000 + * 87 /soc/peripheral@50000000/flash-controller@39000/flash@0 + * 88 /soc/peripheral@50000000/flash-controller@39000/flash@0/partitions + * 89 /soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@0 + * 90 /soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@10000 + * 91 /soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@50000 + * 92 /soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@80000 + * 93 /soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@c0000 + * 94 /soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@f0000 + * 95 /soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@fa000 + * 96 /soc/peripheral@50000000/i2c@a000 + * 97 /soc/peripheral@50000000/i2c@a000/eeprom@50 + * 98 /soc/peripheral@50000000/i2c@a000/lis2dh@18 + * 99 /soc/peripheral@50000000/i2c@a000/npm1300@6b + * 100 /soc/peripheral@50000000/i2c@a000/npm1300@6b/charger + * 101 /soc/peripheral@50000000/i2c@a000/npm1300@6b/regulators + * 102 /soc/peripheral@50000000/i2c@a000/npm1300@6b/regulators/BUCK1 + * 103 /soc/peripheral@50000000/i2c@a000/npm1300@6b/regulators/BUCK2 + * 104 /soc/peripheral@50000000/power@5000 + * 105 /soc/peripheral@50000000/power@5000/gpregret1@51c + * 106 /soc/peripheral@50000000/power@5000/gpregret2@520 + * + * Definitions derived from these nodes in dependency order are next, + * followed by /chosen nodes. + */ + +/* Used to remove brackets from around a single argument */ +#define DT_DEBRACKET_INTERNAL(...) __VA_ARGS__ + +/* + * Devicetree node: / + * + * Node identifier: DT_N + */ + +/* Node's full path: */ +#define DT_N_PATH "/" + +/* Node's name with unit-address: */ +#define DT_N_FULL_NAME "/" + +/* Helper macros for child nodes of this node. */ +#define DT_N_CHILD_NUM 13 +#define DT_N_CHILD_NUM_STATUS_OKAY 12 +#define DT_N_FOREACH_CHILD(fn) fn(DT_N_S_chosen) fn(DT_N_S_aliases) fn(DT_N_S_soc) fn(DT_N_S_pin_controller) fn(DT_N_S_entropy_bt_hci) fn(DT_N_S_sw_pwm) fn(DT_N_S_cpus) fn(DT_N_S_leds) fn(DT_N_S_pwmleds) fn(DT_N_S_buttons) fn(DT_N_S_connector) fn(DT_N_S_sensor_pwr_ctrl) fn(DT_N_S_reserved_memory) +#define DT_N_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_chosen) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_aliases) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pin_controller) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_entropy_bt_hci) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_sw_pwm) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_cpus) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_leds) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pwmleds) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_buttons) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_connector) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_sensor_pwr_ctrl) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_reserved_memory) +#define DT_N_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_chosen, __VA_ARGS__) fn(DT_N_S_aliases, __VA_ARGS__) fn(DT_N_S_soc, __VA_ARGS__) fn(DT_N_S_pin_controller, __VA_ARGS__) fn(DT_N_S_entropy_bt_hci, __VA_ARGS__) fn(DT_N_S_sw_pwm, __VA_ARGS__) fn(DT_N_S_cpus, __VA_ARGS__) fn(DT_N_S_leds, __VA_ARGS__) fn(DT_N_S_pwmleds, __VA_ARGS__) fn(DT_N_S_buttons, __VA_ARGS__) fn(DT_N_S_connector, __VA_ARGS__) fn(DT_N_S_sensor_pwr_ctrl, __VA_ARGS__) fn(DT_N_S_reserved_memory, __VA_ARGS__) +#define DT_N_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_chosen, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_aliases, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pin_controller, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_entropy_bt_hci, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_sw_pwm, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_cpus, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_leds, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pwmleds, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_buttons, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_connector, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_sensor_pwr_ctrl, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_reserved_memory, __VA_ARGS__) +#define DT_N_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_chosen) fn(DT_N_S_aliases) fn(DT_N_S_soc) fn(DT_N_S_pin_controller) fn(DT_N_S_entropy_bt_hci) fn(DT_N_S_cpus) fn(DT_N_S_leds) fn(DT_N_S_pwmleds) fn(DT_N_S_buttons) fn(DT_N_S_connector) fn(DT_N_S_sensor_pwr_ctrl) fn(DT_N_S_reserved_memory) +#define DT_N_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_chosen) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_aliases) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pin_controller) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_entropy_bt_hci) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_cpus) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_leds) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pwmleds) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_buttons) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_connector) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_sensor_pwr_ctrl) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_reserved_memory) +#define DT_N_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_chosen, __VA_ARGS__) fn(DT_N_S_aliases, __VA_ARGS__) fn(DT_N_S_soc, __VA_ARGS__) fn(DT_N_S_pin_controller, __VA_ARGS__) fn(DT_N_S_entropy_bt_hci, __VA_ARGS__) fn(DT_N_S_cpus, __VA_ARGS__) fn(DT_N_S_leds, __VA_ARGS__) fn(DT_N_S_pwmleds, __VA_ARGS__) fn(DT_N_S_buttons, __VA_ARGS__) fn(DT_N_S_connector, __VA_ARGS__) fn(DT_N_S_sensor_pwr_ctrl, __VA_ARGS__) fn(DT_N_S_reserved_memory, __VA_ARGS__) +#define DT_N_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_chosen, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_aliases, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pin_controller, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_entropy_bt_hci, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_cpus, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_leds, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pwmleds, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_buttons, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_connector, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_sensor_pwr_ctrl, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_reserved_memory, __VA_ARGS__) + +/* Node's dependency ordinal: */ +#define DT_N_ORD 0 +#define DT_N_ORD_STR_SORTABLE 00000 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_REQUIRES_ORDS /* nothing */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_SUPPORTS_ORDS \ + 1, /* /aliases */ \ + 2, /* /chosen */ \ + 3, /* /connector */ \ + 4, /* /entropy_bt_hci */ \ + 5, /* /soc */ \ + 10, /* /sensor-pwr-ctrl */ \ + 12, /* /sw-pwm */ \ + 13, /* /buttons */ \ + 15, /* /cpus */ \ + 18, /* /leds */ \ + 20, /* /pin-controller */ \ + 38, /* /pwmleds */ \ + 40, /* /reserved-memory */ + +/* Existence and alternate IDs: */ +#define DT_N_EXISTS 1 +#define DT_N_INST_0_conexio_stratus_pro DT_N + +/* Macros for properties that are special in the specification: */ +#define DT_N_REG_NUM 0 +#define DT_N_RANGES_NUM 0 +#define DT_N_FOREACH_RANGE(fn) +#define DT_N_IRQ_NUM 0 +#define DT_N_IRQ_LEVEL 0 +#define DT_N_COMPAT_MATCHES_conexio_stratus_pro 1 +#define DT_N_STATUS_okay 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_P_compatible {"conexio,stratus_pro"} +#define DT_N_P_compatible_IDX_0 "conexio,stratus_pro" +#define DT_N_P_compatible_IDX_0_STRING_UNQUOTED conexio,stratus_pro +#define DT_N_P_compatible_IDX_0_STRING_TOKEN conexio_stratus_pro +#define DT_N_P_compatible_IDX_0_STRING_UPPER_TOKEN CONEXIO_STRATUS_PRO +#define DT_N_P_compatible_IDX_0_EXISTS 1 +#define DT_N_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N, compatible, 0) +#define DT_N_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N, compatible, 0) +#define DT_N_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N, compatible, 0, __VA_ARGS__) +#define DT_N_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N, compatible, 0, __VA_ARGS__) +#define DT_N_P_compatible_LEN 1 +#define DT_N_P_compatible_EXISTS 1 + +/* + * Devicetree node: /aliases + * + * Node identifier: DT_N_S_aliases + */ + +/* Node's full path: */ +#define DT_N_S_aliases_PATH "/aliases" + +/* Node's name with unit-address: */ +#define DT_N_S_aliases_FULL_NAME "aliases" + +/* Node parent (/) identifier: */ +#define DT_N_S_aliases_PARENT DT_N + +/* Node's index in its parent's list of children: */ +#define DT_N_S_aliases_CHILD_IDX 1 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_aliases_CHILD_NUM 0 +#define DT_N_S_aliases_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_aliases_FOREACH_CHILD(fn) +#define DT_N_S_aliases_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_aliases_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_aliases_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_aliases_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_aliases_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_aliases_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_aliases_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's dependency ordinal: */ +#define DT_N_S_aliases_ORD 1 +#define DT_N_S_aliases_ORD_STR_SORTABLE 00001 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_aliases_REQUIRES_ORDS \ + 0, /* / */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_aliases_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_aliases_EXISTS 1 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_aliases_REG_NUM 0 +#define DT_N_S_aliases_RANGES_NUM 0 +#define DT_N_S_aliases_FOREACH_RANGE(fn) +#define DT_N_S_aliases_IRQ_NUM 0 +#define DT_N_S_aliases_IRQ_LEVEL 0 +#define DT_N_S_aliases_STATUS_okay 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_aliases_PINCTRL_NUM 0 + +/* (No generic property macros) */ + +/* + * Devicetree node: /chosen + * + * Node identifier: DT_N_S_chosen + */ + +/* Node's full path: */ +#define DT_N_S_chosen_PATH "/chosen" + +/* Node's name with unit-address: */ +#define DT_N_S_chosen_FULL_NAME "chosen" + +/* Node parent (/) identifier: */ +#define DT_N_S_chosen_PARENT DT_N + +/* Node's index in its parent's list of children: */ +#define DT_N_S_chosen_CHILD_IDX 0 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_chosen_CHILD_NUM 0 +#define DT_N_S_chosen_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_chosen_FOREACH_CHILD(fn) +#define DT_N_S_chosen_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_chosen_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_chosen_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_chosen_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_chosen_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_chosen_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_chosen_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's dependency ordinal: */ +#define DT_N_S_chosen_ORD 2 +#define DT_N_S_chosen_ORD_STR_SORTABLE 00002 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_chosen_REQUIRES_ORDS \ + 0, /* / */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_chosen_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_chosen_EXISTS 1 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_chosen_REG_NUM 0 +#define DT_N_S_chosen_RANGES_NUM 0 +#define DT_N_S_chosen_FOREACH_RANGE(fn) +#define DT_N_S_chosen_IRQ_NUM 0 +#define DT_N_S_chosen_IRQ_LEVEL 0 +#define DT_N_S_chosen_STATUS_okay 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_chosen_PINCTRL_NUM 0 + +/* (No generic property macros) */ + +/* + * Devicetree node: /connector + * + * Node identifier: DT_N_S_connector + */ + +/* Node's full path: */ +#define DT_N_S_connector_PATH "/connector" + +/* Node's name with unit-address: */ +#define DT_N_S_connector_FULL_NAME "connector" + +/* Node parent (/) identifier: */ +#define DT_N_S_connector_PARENT DT_N + +/* Node's index in its parent's list of children: */ +#define DT_N_S_connector_CHILD_IDX 10 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_connector_CHILD_NUM 0 +#define DT_N_S_connector_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_connector_FOREACH_CHILD(fn) +#define DT_N_S_connector_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_connector_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_connector_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_connector_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_connector_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_connector_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_connector_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's dependency ordinal: */ +#define DT_N_S_connector_ORD 3 +#define DT_N_S_connector_ORD_STR_SORTABLE 00003 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_connector_REQUIRES_ORDS \ + 0, /* / */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_connector_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_connector_EXISTS 1 +#define DT_N_INST_0_conexio_stratus_header DT_N_S_connector +#define DT_N_NODELABEL_stratus_header DT_N_S_connector + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_connector_REG_NUM 0 +#define DT_N_S_connector_RANGES_NUM 0 +#define DT_N_S_connector_FOREACH_RANGE(fn) +#define DT_N_S_connector_IRQ_NUM 0 +#define DT_N_S_connector_IRQ_LEVEL 0 +#define DT_N_S_connector_COMPAT_MATCHES_conexio_stratus_header 1 +#define DT_N_S_connector_STATUS_okay 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_connector_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_connector_P_compatible {"conexio-stratus-header"} +#define DT_N_S_connector_P_compatible_IDX_0 "conexio-stratus-header" +#define DT_N_S_connector_P_compatible_IDX_0_STRING_UNQUOTED conexio-stratus-header +#define DT_N_S_connector_P_compatible_IDX_0_STRING_TOKEN conexio_stratus_header +#define DT_N_S_connector_P_compatible_IDX_0_STRING_UPPER_TOKEN CONEXIO_STRATUS_HEADER +#define DT_N_S_connector_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_connector_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_connector, compatible, 0) +#define DT_N_S_connector_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_connector, compatible, 0) +#define DT_N_S_connector_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_connector, compatible, 0, __VA_ARGS__) +#define DT_N_S_connector_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_connector, compatible, 0, __VA_ARGS__) +#define DT_N_S_connector_P_compatible_LEN 1 +#define DT_N_S_connector_P_compatible_EXISTS 1 + +/* + * Devicetree node: /entropy_bt_hci + * + * Node identifier: DT_N_S_entropy_bt_hci + * + * Binding (compatible = zephyr,bt-hci-entropy): + * $ZEPHYR_BASE/dts/bindings/bluetooth/zephyr,bt-hci-entropy.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_entropy_bt_hci_PATH "/entropy_bt_hci" + +/* Node's name with unit-address: */ +#define DT_N_S_entropy_bt_hci_FULL_NAME "entropy_bt_hci" + +/* Node parent (/) identifier: */ +#define DT_N_S_entropy_bt_hci_PARENT DT_N + +/* Node's index in its parent's list of children: */ +#define DT_N_S_entropy_bt_hci_CHILD_IDX 4 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_entropy_bt_hci_CHILD_NUM 0 +#define DT_N_S_entropy_bt_hci_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_entropy_bt_hci_FOREACH_CHILD(fn) +#define DT_N_S_entropy_bt_hci_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_entropy_bt_hci_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_entropy_bt_hci_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_entropy_bt_hci_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_entropy_bt_hci_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_entropy_bt_hci_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_entropy_bt_hci_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's dependency ordinal: */ +#define DT_N_S_entropy_bt_hci_ORD 4 +#define DT_N_S_entropy_bt_hci_ORD_STR_SORTABLE 00004 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_entropy_bt_hci_REQUIRES_ORDS \ + 0, /* / */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_entropy_bt_hci_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_entropy_bt_hci_EXISTS 1 +#define DT_N_INST_0_zephyr_bt_hci_entropy DT_N_S_entropy_bt_hci +#define DT_N_NODELABEL_rng_hci DT_N_S_entropy_bt_hci + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_entropy_bt_hci_REG_NUM 0 +#define DT_N_S_entropy_bt_hci_RANGES_NUM 0 +#define DT_N_S_entropy_bt_hci_FOREACH_RANGE(fn) +#define DT_N_S_entropy_bt_hci_IRQ_NUM 0 +#define DT_N_S_entropy_bt_hci_IRQ_LEVEL 0 +#define DT_N_S_entropy_bt_hci_COMPAT_MATCHES_zephyr_bt_hci_entropy 1 +#define DT_N_S_entropy_bt_hci_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_entropy_bt_hci_COMPAT_VENDOR_IDX_0 "Zephyr-specific binding" +#define DT_N_S_entropy_bt_hci_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_entropy_bt_hci_COMPAT_MODEL_IDX_0 "bt-hci-entropy" +#define DT_N_S_entropy_bt_hci_STATUS_okay 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_entropy_bt_hci_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_entropy_bt_hci_P_wakeup_source 0 +#define DT_N_S_entropy_bt_hci_P_wakeup_source_EXISTS 1 +#define DT_N_S_entropy_bt_hci_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_entropy_bt_hci_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_entropy_bt_hci_P_status "okay" +#define DT_N_S_entropy_bt_hci_P_status_STRING_UNQUOTED okay +#define DT_N_S_entropy_bt_hci_P_status_STRING_TOKEN okay +#define DT_N_S_entropy_bt_hci_P_status_STRING_UPPER_TOKEN OKAY +#define DT_N_S_entropy_bt_hci_P_status_IDX_0 "okay" +#define DT_N_S_entropy_bt_hci_P_status_IDX_0_EXISTS 1 +#define DT_N_S_entropy_bt_hci_P_status_ENUM_IDX 1 +#define DT_N_S_entropy_bt_hci_P_status_ENUM_VAL_okay_EXISTS 1 +#define DT_N_S_entropy_bt_hci_P_status_ENUM_TOKEN okay +#define DT_N_S_entropy_bt_hci_P_status_ENUM_UPPER_TOKEN OKAY +#define DT_N_S_entropy_bt_hci_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_entropy_bt_hci, status, 0) +#define DT_N_S_entropy_bt_hci_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_entropy_bt_hci, status, 0) +#define DT_N_S_entropy_bt_hci_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_entropy_bt_hci, status, 0, __VA_ARGS__) +#define DT_N_S_entropy_bt_hci_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_entropy_bt_hci, status, 0, __VA_ARGS__) +#define DT_N_S_entropy_bt_hci_P_status_LEN 1 +#define DT_N_S_entropy_bt_hci_P_status_EXISTS 1 +#define DT_N_S_entropy_bt_hci_P_compatible {"zephyr,bt-hci-entropy"} +#define DT_N_S_entropy_bt_hci_P_compatible_IDX_0 "zephyr,bt-hci-entropy" +#define DT_N_S_entropy_bt_hci_P_compatible_IDX_0_STRING_UNQUOTED zephyr,bt-hci-entropy +#define DT_N_S_entropy_bt_hci_P_compatible_IDX_0_STRING_TOKEN zephyr_bt_hci_entropy +#define DT_N_S_entropy_bt_hci_P_compatible_IDX_0_STRING_UPPER_TOKEN ZEPHYR_BT_HCI_ENTROPY +#define DT_N_S_entropy_bt_hci_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_entropy_bt_hci_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_entropy_bt_hci, compatible, 0) +#define DT_N_S_entropy_bt_hci_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_entropy_bt_hci, compatible, 0) +#define DT_N_S_entropy_bt_hci_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_entropy_bt_hci, compatible, 0, __VA_ARGS__) +#define DT_N_S_entropy_bt_hci_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_entropy_bt_hci, compatible, 0, __VA_ARGS__) +#define DT_N_S_entropy_bt_hci_P_compatible_LEN 1 +#define DT_N_S_entropy_bt_hci_P_compatible_EXISTS 1 +#define DT_N_S_entropy_bt_hci_P_zephyr_deferred_init 0 +#define DT_N_S_entropy_bt_hci_P_zephyr_deferred_init_EXISTS 1 + +/* + * Devicetree node: /soc + * + * Node identifier: DT_N_S_soc + */ + +/* Node's full path: */ +#define DT_N_S_soc_PATH "/soc" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_FULL_NAME "soc" + +/* Node parent (/) identifier: */ +#define DT_N_S_soc_PARENT DT_N + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_CHILD_IDX 2 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_CHILD_NUM 11 +#define DT_N_S_soc_CHILD_NUM_STATUS_OKAY 9 +#define DT_N_S_soc_FOREACH_CHILD(fn) fn(DT_N_S_soc_S_interrupt_controller_e000e100) fn(DT_N_S_soc_S_timer_e000e010) fn(DT_N_S_soc_S_memory_20000000) fn(DT_N_S_soc_S_peripheral_50000000) fn(DT_N_S_soc_S_crypto_50840000) fn(DT_N_S_soc_S_ctrlap_50006000) fn(DT_N_S_soc_S_gpiote_5000d000) fn(DT_N_S_soc_S_gpiote_40031000) fn(DT_N_S_soc_S_spu_50003000) fn(DT_N_S_soc_S_ficr_ff0000) fn(DT_N_S_soc_S_uicr_ff8000) +#define DT_N_S_soc_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_soc_S_interrupt_controller_e000e100) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timer_e000e010) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_memory_20000000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_crypto_50840000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_ctrlap_50006000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_gpiote_5000d000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_gpiote_40031000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_spu_50003000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_ficr_ff0000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_uicr_ff8000) +#define DT_N_S_soc_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_soc_S_interrupt_controller_e000e100, __VA_ARGS__) fn(DT_N_S_soc_S_timer_e000e010, __VA_ARGS__) fn(DT_N_S_soc_S_memory_20000000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000, __VA_ARGS__) fn(DT_N_S_soc_S_crypto_50840000, __VA_ARGS__) fn(DT_N_S_soc_S_ctrlap_50006000, __VA_ARGS__) fn(DT_N_S_soc_S_gpiote_5000d000, __VA_ARGS__) fn(DT_N_S_soc_S_gpiote_40031000, __VA_ARGS__) fn(DT_N_S_soc_S_spu_50003000, __VA_ARGS__) fn(DT_N_S_soc_S_ficr_ff0000, __VA_ARGS__) fn(DT_N_S_soc_S_uicr_ff8000, __VA_ARGS__) +#define DT_N_S_soc_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_interrupt_controller_e000e100, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timer_e000e010, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_memory_20000000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_crypto_50840000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_ctrlap_50006000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_gpiote_5000d000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_gpiote_40031000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_spu_50003000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_ficr_ff0000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_uicr_ff8000, __VA_ARGS__) +#define DT_N_S_soc_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_soc_S_interrupt_controller_e000e100) fn(DT_N_S_soc_S_memory_20000000) fn(DT_N_S_soc_S_peripheral_50000000) fn(DT_N_S_soc_S_crypto_50840000) fn(DT_N_S_soc_S_ctrlap_50006000) fn(DT_N_S_soc_S_gpiote_5000d000) fn(DT_N_S_soc_S_spu_50003000) fn(DT_N_S_soc_S_ficr_ff0000) fn(DT_N_S_soc_S_uicr_ff8000) +#define DT_N_S_soc_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_soc_S_interrupt_controller_e000e100) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_memory_20000000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_crypto_50840000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_ctrlap_50006000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_gpiote_5000d000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_spu_50003000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_ficr_ff0000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_uicr_ff8000) +#define DT_N_S_soc_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_soc_S_interrupt_controller_e000e100, __VA_ARGS__) fn(DT_N_S_soc_S_memory_20000000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000, __VA_ARGS__) fn(DT_N_S_soc_S_crypto_50840000, __VA_ARGS__) fn(DT_N_S_soc_S_ctrlap_50006000, __VA_ARGS__) fn(DT_N_S_soc_S_gpiote_5000d000, __VA_ARGS__) fn(DT_N_S_soc_S_spu_50003000, __VA_ARGS__) fn(DT_N_S_soc_S_ficr_ff0000, __VA_ARGS__) fn(DT_N_S_soc_S_uicr_ff8000, __VA_ARGS__) +#define DT_N_S_soc_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_interrupt_controller_e000e100, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_memory_20000000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_crypto_50840000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_ctrlap_50006000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_gpiote_5000d000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_spu_50003000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_ficr_ff0000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_uicr_ff8000, __VA_ARGS__) + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_ORD 5 +#define DT_N_S_soc_ORD_STR_SORTABLE 00005 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_REQUIRES_ORDS \ + 0, /* / */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_SUPPORTS_ORDS \ + 6, /* /soc/interrupt-controller@e000e100 */ \ + 7, /* /soc/gpiote@5000d000 */ \ + 8, /* /soc/peripheral@50000000 */ \ + 44, /* /soc/crypto@50840000 */ \ + 45, /* /soc/ctrlap@50006000 */ \ + 46, /* /soc/ficr@ff0000 */ \ + 47, /* /soc/gpiote@40031000 */ \ + 48, /* /soc/memory@20000000 */ \ + 49, /* /soc/spu@50003000 */ \ + 50, /* /soc/timer@e000e010 */ \ + 51, /* /soc/uicr@ff8000 */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_EXISTS 1 +#define DT_N_INST_0_nordic_nrf9151_laca DT_N_S_soc +#define DT_N_INST_0_nordic_nrf9120 DT_N_S_soc +#define DT_N_INST_0_nordic_nrf91 DT_N_S_soc +#define DT_N_INST_0_simple_bus DT_N_S_soc + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_REG_NUM 0 +#define DT_N_S_soc_RANGES_NUM 0 +#define DT_N_S_soc_FOREACH_RANGE(fn) +#define DT_N_S_soc_IRQ_NUM 0 +#define DT_N_S_soc_IRQ_LEVEL 0 +#define DT_N_S_soc_COMPAT_MATCHES_nordic_nrf9151_laca 1 +#define DT_N_S_soc_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor" +#define DT_N_S_soc_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_COMPAT_MODEL_IDX_0 "nrf9151-laca" +#define DT_N_S_soc_COMPAT_MATCHES_nordic_nrf9120 1 +#define DT_N_S_soc_COMPAT_VENDOR_IDX_1_EXISTS 1 +#define DT_N_S_soc_COMPAT_VENDOR_IDX_1 "Nordic Semiconductor" +#define DT_N_S_soc_COMPAT_MODEL_IDX_1_EXISTS 1 +#define DT_N_S_soc_COMPAT_MODEL_IDX_1 "nrf9120" +#define DT_N_S_soc_COMPAT_MATCHES_nordic_nrf91 1 +#define DT_N_S_soc_COMPAT_VENDOR_IDX_2_EXISTS 1 +#define DT_N_S_soc_COMPAT_VENDOR_IDX_2 "Nordic Semiconductor" +#define DT_N_S_soc_COMPAT_MODEL_IDX_2_EXISTS 1 +#define DT_N_S_soc_COMPAT_MODEL_IDX_2 "nrf91" +#define DT_N_S_soc_COMPAT_MATCHES_simple_bus 1 +#define DT_N_S_soc_STATUS_okay 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_soc_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_P_compatible {"nordic,nrf9151-laca", "nordic,nrf9120", "nordic,nrf91", "simple-bus"} +#define DT_N_S_soc_P_compatible_IDX_0 "nordic,nrf9151-laca" +#define DT_N_S_soc_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf9151-laca +#define DT_N_S_soc_P_compatible_IDX_0_STRING_TOKEN nordic_nrf9151_laca +#define DT_N_S_soc_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF9151_LACA +#define DT_N_S_soc_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_P_compatible_IDX_1 "nordic,nrf9120" +#define DT_N_S_soc_P_compatible_IDX_1_STRING_UNQUOTED nordic,nrf9120 +#define DT_N_S_soc_P_compatible_IDX_1_STRING_TOKEN nordic_nrf9120 +#define DT_N_S_soc_P_compatible_IDX_1_STRING_UPPER_TOKEN NORDIC_NRF9120 +#define DT_N_S_soc_P_compatible_IDX_1_EXISTS 1 +#define DT_N_S_soc_P_compatible_IDX_2 "nordic,nrf91" +#define DT_N_S_soc_P_compatible_IDX_2_STRING_UNQUOTED nordic,nrf91 +#define DT_N_S_soc_P_compatible_IDX_2_STRING_TOKEN nordic_nrf91 +#define DT_N_S_soc_P_compatible_IDX_2_STRING_UPPER_TOKEN NORDIC_NRF91 +#define DT_N_S_soc_P_compatible_IDX_2_EXISTS 1 +#define DT_N_S_soc_P_compatible_IDX_3 "simple-bus" +#define DT_N_S_soc_P_compatible_IDX_3_STRING_UNQUOTED simple-bus +#define DT_N_S_soc_P_compatible_IDX_3_STRING_TOKEN simple_bus +#define DT_N_S_soc_P_compatible_IDX_3_STRING_UPPER_TOKEN SIMPLE_BUS +#define DT_N_S_soc_P_compatible_IDX_3_EXISTS 1 +#define DT_N_S_soc_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc, compatible, 0) \ + fn(DT_N_S_soc, compatible, 1) \ + fn(DT_N_S_soc, compatible, 2) \ + fn(DT_N_S_soc, compatible, 3) +#define DT_N_S_soc_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc, compatible, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc, compatible, 1) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc, compatible, 2) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc, compatible, 3) +#define DT_N_S_soc_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc, compatible, 0, __VA_ARGS__) \ + fn(DT_N_S_soc, compatible, 1, __VA_ARGS__) \ + fn(DT_N_S_soc, compatible, 2, __VA_ARGS__) \ + fn(DT_N_S_soc, compatible, 3, __VA_ARGS__) +#define DT_N_S_soc_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc, compatible, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc, compatible, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc, compatible, 2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc, compatible, 3, __VA_ARGS__) +#define DT_N_S_soc_P_compatible_LEN 4 +#define DT_N_S_soc_P_compatible_EXISTS 1 +#define DT_N_S_soc_P_ranges_EXISTS 1 + +/* + * Devicetree node: /soc/interrupt-controller@e000e100 + * + * Node identifier: DT_N_S_soc_S_interrupt_controller_e000e100 + * + * Binding (compatible = arm,v8m-nvic): + * $ZEPHYR_BASE/dts/bindings/interrupt-controller/arm,v8m-nvic.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_interrupt_controller_e000e100_PATH "/soc/interrupt-controller@e000e100" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_interrupt_controller_e000e100_FULL_NAME "interrupt-controller@e000e100" + +/* Node parent (/soc) identifier: */ +#define DT_N_S_soc_S_interrupt_controller_e000e100_PARENT DT_N_S_soc + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_interrupt_controller_e000e100_CHILD_IDX 0 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_interrupt_controller_e000e100_CHILD_NUM 0 +#define DT_N_S_soc_S_interrupt_controller_e000e100_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_interrupt_controller_e000e100_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_interrupt_controller_e000e100_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_interrupt_controller_e000e100_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_interrupt_controller_e000e100_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_interrupt_controller_e000e100_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_interrupt_controller_e000e100_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_interrupt_controller_e000e100_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_interrupt_controller_e000e100_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_interrupt_controller_e000e100_ORD 6 +#define DT_N_S_soc_S_interrupt_controller_e000e100_ORD_STR_SORTABLE 00006 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_interrupt_controller_e000e100_REQUIRES_ORDS \ + 5, /* /soc */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_interrupt_controller_e000e100_SUPPORTS_ORDS \ + 7, /* /soc/gpiote@5000d000 */ \ + 11, /* /soc/peripheral@50000000/timer@10000 */ \ + 37, /* /soc/peripheral@50000000/pwm@21000 */ \ + 44, /* /soc/crypto@50840000 */ \ + 47, /* /soc/gpiote@40031000 */ \ + 49, /* /soc/spu@50003000 */ \ + 52, /* /soc/peripheral@50000000/adc@e000 */ \ + 53, /* /soc/peripheral@50000000/clock@5000 */ \ + 55, /* /soc/peripheral@50000000/egu@1b000 */ \ + 56, /* /soc/peripheral@50000000/egu@1c000 */ \ + 57, /* /soc/peripheral@50000000/egu@1d000 */ \ + 58, /* /soc/peripheral@50000000/egu@1e000 */ \ + 59, /* /soc/peripheral@50000000/egu@1f000 */ \ + 60, /* /soc/peripheral@50000000/egu@20000 */ \ + 61, /* /soc/peripheral@50000000/i2c@8000 */ \ + 62, /* /soc/peripheral@50000000/i2c@9000 */ \ + 63, /* /soc/peripheral@50000000/i2c@b000 */ \ + 64, /* /soc/peripheral@50000000/i2s@28000 */ \ + 65, /* /soc/peripheral@50000000/ipc@2a000 */ \ + 66, /* /soc/peripheral@50000000/kmu@39000 */ \ + 67, /* /soc/peripheral@50000000/pdm@26000 */ \ + 68, /* /soc/peripheral@50000000/pwm@22000 */ \ + 69, /* /soc/peripheral@50000000/pwm@23000 */ \ + 70, /* /soc/peripheral@50000000/pwm@24000 */ \ + 72, /* /soc/peripheral@50000000/rtc@14000 */ \ + 73, /* /soc/peripheral@50000000/rtc@15000 */ \ + 74, /* /soc/peripheral@50000000/spi@8000 */ \ + 75, /* /soc/peripheral@50000000/spi@9000 */ \ + 76, /* /soc/peripheral@50000000/spi@a000 */ \ + 77, /* /soc/peripheral@50000000/spi@b000 */ \ + 78, /* /soc/peripheral@50000000/timer@f000 */ \ + 79, /* /soc/peripheral@50000000/timer@11000 */ \ + 80, /* /soc/peripheral@50000000/uart@8000 */ \ + 81, /* /soc/peripheral@50000000/uart@9000 */ \ + 82, /* /soc/peripheral@50000000/uart@a000 */ \ + 83, /* /soc/peripheral@50000000/uart@b000 */ \ + 85, /* /soc/peripheral@50000000/watchdog@18000 */ \ + 96, /* /soc/peripheral@50000000/i2c@a000 */ \ + 104, /* /soc/peripheral@50000000/power@5000 */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_interrupt_controller_e000e100_EXISTS 1 +#define DT_N_INST_0_arm_v8m_nvic DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_NODELABEL_nvic DT_N_S_soc_S_interrupt_controller_e000e100 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_interrupt_controller_e000e100_REG_NUM 1 +#define DT_N_S_soc_S_interrupt_controller_e000e100_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_e000e100_REG_IDX_0_VAL_ADDRESS 3758153984 /* 0xe000e100 */ +#define DT_N_S_soc_S_interrupt_controller_e000e100_REG_IDX_0_VAL_SIZE 3072 /* 0xc00 */ +#define DT_N_S_soc_S_interrupt_controller_e000e100_RANGES_NUM 0 +#define DT_N_S_soc_S_interrupt_controller_e000e100_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_interrupt_controller_e000e100_IRQ_NUM 0 +#define DT_N_S_soc_S_interrupt_controller_e000e100_IRQ_LEVEL 0 +#define DT_N_S_soc_S_interrupt_controller_e000e100_COMPAT_MATCHES_arm_v8m_nvic 1 +#define DT_N_S_soc_S_interrupt_controller_e000e100_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_e000e100_COMPAT_VENDOR_IDX_0 "ARM Ltd." +#define DT_N_S_soc_S_interrupt_controller_e000e100_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_e000e100_COMPAT_MODEL_IDX_0 "v8m-nvic" +#define DT_N_S_soc_S_interrupt_controller_e000e100_STATUS_okay 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_soc_S_interrupt_controller_e000e100_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_interrupt_controller_e000e100_P_interrupt_controller 1 +#define DT_N_S_soc_S_interrupt_controller_e000e100_P_interrupt_controller_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_e000e100_P_wakeup_source 0 +#define DT_N_S_soc_S_interrupt_controller_e000e100_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_e000e100_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_interrupt_controller_e000e100_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_e000e100_P_compatible {"arm,v8m-nvic"} +#define DT_N_S_soc_S_interrupt_controller_e000e100_P_compatible_IDX_0 "arm,v8m-nvic" +#define DT_N_S_soc_S_interrupt_controller_e000e100_P_compatible_IDX_0_STRING_UNQUOTED arm,v8m-nvic +#define DT_N_S_soc_S_interrupt_controller_e000e100_P_compatible_IDX_0_STRING_TOKEN arm_v8m_nvic +#define DT_N_S_soc_S_interrupt_controller_e000e100_P_compatible_IDX_0_STRING_UPPER_TOKEN ARM_V8M_NVIC +#define DT_N_S_soc_S_interrupt_controller_e000e100_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_e000e100_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_interrupt_controller_e000e100, compatible, 0) +#define DT_N_S_soc_S_interrupt_controller_e000e100_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_interrupt_controller_e000e100, compatible, 0) +#define DT_N_S_soc_S_interrupt_controller_e000e100_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_interrupt_controller_e000e100, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_interrupt_controller_e000e100_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_interrupt_controller_e000e100, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_interrupt_controller_e000e100_P_compatible_LEN 1 +#define DT_N_S_soc_S_interrupt_controller_e000e100_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_e000e100_P_reg {3758153984 /* 0xe000e100 */, 3072 /* 0xc00 */} +#define DT_N_S_soc_S_interrupt_controller_e000e100_P_reg_IDX_0 3758153984 +#define DT_N_S_soc_S_interrupt_controller_e000e100_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_e000e100_P_reg_IDX_1 3072 +#define DT_N_S_soc_S_interrupt_controller_e000e100_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_e000e100_P_reg_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_e000e100_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_interrupt_controller_e000e100_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_e000e100_P_arm_num_irq_priority_bits 3 +#define DT_N_S_soc_S_interrupt_controller_e000e100_P_arm_num_irq_priority_bits_EXISTS 1 + +/* + * Devicetree node: /soc/gpiote@5000d000 + * + * Node identifier: DT_N_S_soc_S_gpiote_5000d000 + * + * Binding (compatible = nordic,nrf-gpiote): + * $ZEPHYR_BASE/dts/bindings/gpio/nordic,nrf-gpiote.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_gpiote_5000d000_PATH "/soc/gpiote@5000d000" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_gpiote_5000d000_FULL_NAME "gpiote@5000d000" + +/* Node parent (/soc) identifier: */ +#define DT_N_S_soc_S_gpiote_5000d000_PARENT DT_N_S_soc + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_gpiote_5000d000_CHILD_IDX 6 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_gpiote_5000d000_CHILD_NUM 0 +#define DT_N_S_soc_S_gpiote_5000d000_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_gpiote_5000d000_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_gpiote_5000d000_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_gpiote_5000d000_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_gpiote_5000d000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_gpiote_5000d000_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_gpiote_5000d000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_gpiote_5000d000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_gpiote_5000d000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_gpiote_5000d000_ORD 7 +#define DT_N_S_soc_S_gpiote_5000d000_ORD_STR_SORTABLE 00007 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_gpiote_5000d000_REQUIRES_ORDS \ + 5, /* /soc */ \ + 6, /* /soc/interrupt-controller@e000e100 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_gpiote_5000d000_SUPPORTS_ORDS \ + 9, /* /soc/peripheral@50000000/gpio@842500 */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_gpiote_5000d000_EXISTS 1 +#define DT_N_INST_0_nordic_nrf_gpiote DT_N_S_soc_S_gpiote_5000d000 +#define DT_N_NODELABEL_gpiote DT_N_S_soc_S_gpiote_5000d000 +#define DT_N_NODELABEL_gpiote0 DT_N_S_soc_S_gpiote_5000d000 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_gpiote_5000d000_REG_NUM 1 +#define DT_N_S_soc_S_gpiote_5000d000_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_gpiote_5000d000_REG_IDX_0_VAL_ADDRESS 1342230528 /* 0x5000d000 */ +#define DT_N_S_soc_S_gpiote_5000d000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */ +#define DT_N_S_soc_S_gpiote_5000d000_RANGES_NUM 0 +#define DT_N_S_soc_S_gpiote_5000d000_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_gpiote_5000d000_IRQ_NUM 1 +#define DT_N_S_soc_S_gpiote_5000d000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_gpiote_5000d000_IRQ_IDX_0_VAL_irq 13 +#define DT_N_S_soc_S_gpiote_5000d000_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_gpiote_5000d000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_gpiote_5000d000_IRQ_IDX_0_VAL_priority 5 +#define DT_N_S_soc_S_gpiote_5000d000_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_gpiote_5000d000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_gpiote_5000d000_IRQ_LEVEL 1 +#define DT_N_S_soc_S_gpiote_5000d000_COMPAT_MATCHES_nordic_nrf_gpiote 1 +#define DT_N_S_soc_S_gpiote_5000d000_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_gpiote_5000d000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor" +#define DT_N_S_soc_S_gpiote_5000d000_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_gpiote_5000d000_COMPAT_MODEL_IDX_0 "nrf-gpiote" +#define DT_N_S_soc_S_gpiote_5000d000_STATUS_okay 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_soc_S_gpiote_5000d000_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_gpiote_5000d000_P_wakeup_source 0 +#define DT_N_S_soc_S_gpiote_5000d000_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_gpiote_5000d000_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_gpiote_5000d000_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_gpiote_5000d000_P_status "okay" +#define DT_N_S_soc_S_gpiote_5000d000_P_status_STRING_UNQUOTED okay +#define DT_N_S_soc_S_gpiote_5000d000_P_status_STRING_TOKEN okay +#define DT_N_S_soc_S_gpiote_5000d000_P_status_STRING_UPPER_TOKEN OKAY +#define DT_N_S_soc_S_gpiote_5000d000_P_status_IDX_0 "okay" +#define DT_N_S_soc_S_gpiote_5000d000_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_gpiote_5000d000_P_status_ENUM_IDX 1 +#define DT_N_S_soc_S_gpiote_5000d000_P_status_ENUM_VAL_okay_EXISTS 1 +#define DT_N_S_soc_S_gpiote_5000d000_P_status_ENUM_TOKEN okay +#define DT_N_S_soc_S_gpiote_5000d000_P_status_ENUM_UPPER_TOKEN OKAY +#define DT_N_S_soc_S_gpiote_5000d000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_gpiote_5000d000, status, 0) +#define DT_N_S_soc_S_gpiote_5000d000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_gpiote_5000d000, status, 0) +#define DT_N_S_soc_S_gpiote_5000d000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_gpiote_5000d000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_gpiote_5000d000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_gpiote_5000d000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_gpiote_5000d000_P_status_LEN 1 +#define DT_N_S_soc_S_gpiote_5000d000_P_status_EXISTS 1 +#define DT_N_S_soc_S_gpiote_5000d000_P_compatible {"nordic,nrf-gpiote"} +#define DT_N_S_soc_S_gpiote_5000d000_P_compatible_IDX_0 "nordic,nrf-gpiote" +#define DT_N_S_soc_S_gpiote_5000d000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-gpiote +#define DT_N_S_soc_S_gpiote_5000d000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_gpiote +#define DT_N_S_soc_S_gpiote_5000d000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_GPIOTE +#define DT_N_S_soc_S_gpiote_5000d000_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_gpiote_5000d000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_gpiote_5000d000, compatible, 0) +#define DT_N_S_soc_S_gpiote_5000d000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_gpiote_5000d000, compatible, 0) +#define DT_N_S_soc_S_gpiote_5000d000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_gpiote_5000d000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_gpiote_5000d000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_gpiote_5000d000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_gpiote_5000d000_P_compatible_LEN 1 +#define DT_N_S_soc_S_gpiote_5000d000_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_gpiote_5000d000_P_reg {1342230528 /* 0x5000d000 */, 4096 /* 0x1000 */} +#define DT_N_S_soc_S_gpiote_5000d000_P_reg_IDX_0 1342230528 +#define DT_N_S_soc_S_gpiote_5000d000_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_gpiote_5000d000_P_reg_IDX_1 4096 +#define DT_N_S_soc_S_gpiote_5000d000_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_gpiote_5000d000_P_reg_EXISTS 1 +#define DT_N_S_soc_S_gpiote_5000d000_P_interrupts {13 /* 0xd */, 5 /* 0x5 */} +#define DT_N_S_soc_S_gpiote_5000d000_P_interrupts_IDX_0 13 +#define DT_N_S_soc_S_gpiote_5000d000_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_gpiote_5000d000_P_interrupts_IDX_1 5 +#define DT_N_S_soc_S_gpiote_5000d000_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_gpiote_5000d000_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_gpiote_5000d000_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_gpiote_5000d000_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_gpiote_5000d000_P_instance 0 +#define DT_N_S_soc_S_gpiote_5000d000_P_instance_EXISTS 1 + +/* + * Devicetree node: /soc/peripheral@50000000 + * + * Node identifier: DT_N_S_soc_S_peripheral_50000000 + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_peripheral_50000000_PATH "/soc/peripheral@50000000" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_peripheral_50000000_FULL_NAME "peripheral@50000000" + +/* Node parent (/soc) identifier: */ +#define DT_N_S_soc_S_peripheral_50000000_PARENT DT_N_S_soc + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_peripheral_50000000_CHILD_IDX 3 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_peripheral_50000000_CHILD_NUM 40 +#define DT_N_S_soc_S_peripheral_50000000_CHILD_NUM_STATUS_OKAY 20 +#define DT_N_S_soc_S_peripheral_50000000_FOREACH_CHILD(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000) fn(DT_N_S_soc_S_peripheral_50000000_S_adc_e000) fn(DT_N_S_soc_S_peripheral_50000000_S_dppic_17000) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1b000) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1c000) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1d000) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1e000) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1f000) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_20000) fn(DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000) fn(DT_N_S_soc_S_peripheral_50000000_S_i2s_28000) fn(DT_N_S_soc_S_peripheral_50000000_S_kmu_39000) fn(DT_N_S_soc_S_peripheral_50000000_S_pdm_26000) fn(DT_N_S_soc_S_peripheral_50000000_S_regulator_4000) fn(DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_8000) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_9000) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_a000) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_b000) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_8000) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_9000) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_b000) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_8000) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_9000) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_a000) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_21000) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_22000) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_23000) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_24000) fn(DT_N_S_soc_S_peripheral_50000000_S_gpio_842500) fn(DT_N_S_soc_S_peripheral_50000000_S_rtc_14000) fn(DT_N_S_soc_S_peripheral_50000000_S_rtc_15000) fn(DT_N_S_soc_S_peripheral_50000000_S_clock_5000) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000) fn(DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000) fn(DT_N_S_soc_S_peripheral_50000000_S_timer_f000) fn(DT_N_S_soc_S_peripheral_50000000_S_timer_10000) fn(DT_N_S_soc_S_peripheral_50000000_S_timer_11000) +#define DT_N_S_soc_S_peripheral_50000000_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_adc_e000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_dppic_17000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1b000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1c000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1d000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1e000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1f000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_egu_20000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_i2s_28000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_kmu_39000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_pdm_26000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_regulator_4000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_uart_8000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_uart_9000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_uart_a000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_uart_b000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_8000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_9000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_b000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_spi_8000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_spi_9000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_spi_a000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_21000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_22000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_23000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_24000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_gpio_842500) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_rtc_14000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_rtc_15000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_clock_5000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_timer_f000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_timer_10000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_timer_11000) +#define DT_N_S_soc_S_peripheral_50000000_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_adc_e000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_dppic_17000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1b000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1c000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1d000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1e000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1f000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_20000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_i2s_28000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_kmu_39000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_pdm_26000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_regulator_4000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_8000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_9000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_a000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_b000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_8000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_9000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_b000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_8000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_9000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_a000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_21000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_22000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_23000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_24000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_gpio_842500, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_rtc_14000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_rtc_15000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_clock_5000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_timer_f000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_timer_10000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_timer_11000, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_adc_e000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_dppic_17000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1b000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1c000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1d000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1e000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1f000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_egu_20000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_i2s_28000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_kmu_39000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_pdm_26000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_regulator_4000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_uart_8000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_uart_9000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_uart_a000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_uart_b000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_8000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_9000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_b000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_spi_8000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_spi_9000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_spi_a000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_21000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_22000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_23000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_24000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_gpio_842500, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_rtc_14000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_rtc_15000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_clock_5000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_timer_f000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_timer_10000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_timer_11000, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000) fn(DT_N_S_soc_S_peripheral_50000000_S_adc_e000) fn(DT_N_S_soc_S_peripheral_50000000_S_dppic_17000) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1b000) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1c000) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1d000) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1e000) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1f000) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_20000) fn(DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000) fn(DT_N_S_soc_S_peripheral_50000000_S_kmu_39000) fn(DT_N_S_soc_S_peripheral_50000000_S_regulator_4000) fn(DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_8000) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_21000) fn(DT_N_S_soc_S_peripheral_50000000_S_gpio_842500) fn(DT_N_S_soc_S_peripheral_50000000_S_clock_5000) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000) fn(DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000) +#define DT_N_S_soc_S_peripheral_50000000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_adc_e000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_dppic_17000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1b000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1c000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1d000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1e000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1f000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_egu_20000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_kmu_39000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_regulator_4000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_uart_8000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_21000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_gpio_842500) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_clock_5000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000) +#define DT_N_S_soc_S_peripheral_50000000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_adc_e000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_dppic_17000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1b000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1c000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1d000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1e000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1f000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_20000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_kmu_39000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_regulator_4000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_8000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_21000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_gpio_842500, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_clock_5000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_adc_e000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_dppic_17000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1b000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1c000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1d000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1e000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1f000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_egu_20000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_kmu_39000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_regulator_4000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_uart_8000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_21000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_gpio_842500, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_clock_5000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000, __VA_ARGS__) + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_peripheral_50000000_ORD 8 +#define DT_N_S_soc_S_peripheral_50000000_ORD_STR_SORTABLE 00008 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_peripheral_50000000_REQUIRES_ORDS \ + 5, /* /soc */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_peripheral_50000000_SUPPORTS_ORDS \ + 9, /* /soc/peripheral@50000000/gpio@842500 */ \ + 11, /* /soc/peripheral@50000000/timer@10000 */ \ + 37, /* /soc/peripheral@50000000/pwm@21000 */ \ + 52, /* /soc/peripheral@50000000/adc@e000 */ \ + 53, /* /soc/peripheral@50000000/clock@5000 */ \ + 54, /* /soc/peripheral@50000000/dppic@17000 */ \ + 55, /* /soc/peripheral@50000000/egu@1b000 */ \ + 56, /* /soc/peripheral@50000000/egu@1c000 */ \ + 57, /* /soc/peripheral@50000000/egu@1d000 */ \ + 58, /* /soc/peripheral@50000000/egu@1e000 */ \ + 59, /* /soc/peripheral@50000000/egu@1f000 */ \ + 60, /* /soc/peripheral@50000000/egu@20000 */ \ + 61, /* /soc/peripheral@50000000/i2c@8000 */ \ + 62, /* /soc/peripheral@50000000/i2c@9000 */ \ + 63, /* /soc/peripheral@50000000/i2c@b000 */ \ + 64, /* /soc/peripheral@50000000/i2s@28000 */ \ + 65, /* /soc/peripheral@50000000/ipc@2a000 */ \ + 66, /* /soc/peripheral@50000000/kmu@39000 */ \ + 67, /* /soc/peripheral@50000000/pdm@26000 */ \ + 68, /* /soc/peripheral@50000000/pwm@22000 */ \ + 69, /* /soc/peripheral@50000000/pwm@23000 */ \ + 70, /* /soc/peripheral@50000000/pwm@24000 */ \ + 71, /* /soc/peripheral@50000000/regulator@4000 */ \ + 72, /* /soc/peripheral@50000000/rtc@14000 */ \ + 73, /* /soc/peripheral@50000000/rtc@15000 */ \ + 74, /* /soc/peripheral@50000000/spi@8000 */ \ + 75, /* /soc/peripheral@50000000/spi@9000 */ \ + 76, /* /soc/peripheral@50000000/spi@a000 */ \ + 77, /* /soc/peripheral@50000000/spi@b000 */ \ + 78, /* /soc/peripheral@50000000/timer@f000 */ \ + 79, /* /soc/peripheral@50000000/timer@11000 */ \ + 80, /* /soc/peripheral@50000000/uart@8000 */ \ + 81, /* /soc/peripheral@50000000/uart@9000 */ \ + 82, /* /soc/peripheral@50000000/uart@a000 */ \ + 83, /* /soc/peripheral@50000000/uart@b000 */ \ + 84, /* /soc/peripheral@50000000/vmc@3a000 */ \ + 85, /* /soc/peripheral@50000000/watchdog@18000 */ \ + 86, /* /soc/peripheral@50000000/flash-controller@39000 */ \ + 96, /* /soc/peripheral@50000000/i2c@a000 */ \ + 104, /* /soc/peripheral@50000000/power@5000 */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_peripheral_50000000_EXISTS 1 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_peripheral_50000000_REG_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_RANGES_NUM 1 +#define DT_N_S_soc_S_peripheral_50000000_RANGES_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_RANGES_IDX_0_VAL_CHILD_BUS_ADDRESS 0 /* 0x0 */ +#define DT_N_S_soc_S_peripheral_50000000_RANGES_IDX_0_VAL_PARENT_BUS_ADDRESS 1342177280 /* 0x50000000 */ +#define DT_N_S_soc_S_peripheral_50000000_RANGES_IDX_0_VAL_LENGTH 268435456 /* 0x10000000 */ +#define DT_N_S_soc_S_peripheral_50000000_FOREACH_RANGE(fn) fn(DT_N_S_soc_S_peripheral_50000000, 0) +#define DT_N_S_soc_S_peripheral_50000000_IRQ_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_IRQ_LEVEL 0 +#define DT_N_S_soc_S_peripheral_50000000_STATUS_okay 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_soc_S_peripheral_50000000_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_peripheral_50000000_P_ranges_EXISTS 1 + +/* + * Devicetree node: /soc/peripheral@50000000/gpio@842500 + * + * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_gpio_842500 + * + * Binding (compatible = nordic,nrf-gpio): + * $ZEPHYR_BASE/dts/bindings/gpio/nordic,nrf-gpio.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_PATH "/soc/peripheral@50000000/gpio@842500" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_FULL_NAME "gpio@842500" + +/* Node parent (/soc/peripheral@50000000) identifier: */ +#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_PARENT DT_N_S_soc_S_peripheral_50000000 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_CHILD_IDX 31 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_CHILD_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_ORD 9 +#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_ORD_STR_SORTABLE 00009 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_REQUIRES_ORDS \ + 7, /* /soc/gpiote@5000d000 */ \ + 8, /* /soc/peripheral@50000000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_SUPPORTS_ORDS \ + 10, /* /sensor-pwr-ctrl */ \ + 13, /* /buttons */ \ + 14, /* /buttons/button_0 */ \ + 18, /* /leds */ \ + 19, /* /leds/led_0 */ \ + 77, /* /soc/peripheral@50000000/spi@b000 */ \ + 98, /* /soc/peripheral@50000000/i2c@a000/lis2dh@18 */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_EXISTS 1 +#define DT_N_INST_0_nordic_nrf_gpio DT_N_S_soc_S_peripheral_50000000_S_gpio_842500 +#define DT_N_NODELABEL_gpio0 DT_N_S_soc_S_peripheral_50000000_S_gpio_842500 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_REG_NUM 1 +#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_REG_IDX_0_VAL_ADDRESS 1350837504 /* 0x50842500 */ +#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_REG_IDX_0_VAL_SIZE 768 /* 0x300 */ +#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_RANGES_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_IRQ_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_IRQ_LEVEL 0 +#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_COMPAT_MATCHES_nordic_nrf_gpio 1 +#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor" +#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_COMPAT_MODEL_IDX_0 "nrf-gpio" +#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_STATUS_okay 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_gpio_controller 1 +#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_gpio_controller_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_ngpios 32 +#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_ngpios_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_wakeup_source 0 +#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_status "okay" +#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_status_STRING_UNQUOTED okay +#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_status_STRING_TOKEN okay +#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_status_STRING_UPPER_TOKEN OKAY +#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_status_IDX_0 "okay" +#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_status_ENUM_IDX 1 +#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_status_ENUM_VAL_okay_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_status_ENUM_TOKEN okay +#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_status_ENUM_UPPER_TOKEN OKAY +#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_gpio_842500, status, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_gpio_842500, status, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_gpio_842500, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_gpio_842500, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_status_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_status_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_compatible {"nordic,nrf-gpio"} +#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_compatible_IDX_0 "nordic,nrf-gpio" +#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-gpio +#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_gpio +#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_GPIO +#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_gpio_842500, compatible, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_gpio_842500, compatible, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_gpio_842500, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_gpio_842500, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_compatible_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_reg {8660224 /* 0x842500 */, 768 /* 0x300 */} +#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_reg_IDX_0 8660224 +#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_reg_IDX_1 768 +#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_reg_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_gpiote_instance DT_N_S_soc_S_gpiote_5000d000 +#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_gpiote_instance_IDX_0 DT_N_S_soc_S_gpiote_5000d000 +#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_gpiote_instance_IDX_0_PH DT_N_S_soc_S_gpiote_5000d000 +#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_gpiote_instance_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_gpiote_instance_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_gpio_842500, gpiote_instance, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_gpiote_instance_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_gpio_842500, gpiote_instance, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_gpiote_instance_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_gpio_842500, gpiote_instance, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_gpiote_instance_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_gpio_842500, gpiote_instance, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_gpiote_instance_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_gpiote_instance_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_port 0 +#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_port_EXISTS 1 + +/* + * Devicetree node: /sensor-pwr-ctrl + * + * Node identifier: DT_N_S_sensor_pwr_ctrl + * + * Binding (compatible = regulator-fixed): + * $ZEPHYR_BASE/dts/bindings/regulator/regulator-fixed.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_sensor_pwr_ctrl_PATH "/sensor-pwr-ctrl" + +/* Node's name with unit-address: */ +#define DT_N_S_sensor_pwr_ctrl_FULL_NAME "sensor-pwr-ctrl" + +/* Node parent (/) identifier: */ +#define DT_N_S_sensor_pwr_ctrl_PARENT DT_N + +/* Node's index in its parent's list of children: */ +#define DT_N_S_sensor_pwr_ctrl_CHILD_IDX 11 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_sensor_pwr_ctrl_CHILD_NUM 0 +#define DT_N_S_sensor_pwr_ctrl_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_sensor_pwr_ctrl_FOREACH_CHILD(fn) +#define DT_N_S_sensor_pwr_ctrl_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_sensor_pwr_ctrl_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_sensor_pwr_ctrl_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_sensor_pwr_ctrl_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_sensor_pwr_ctrl_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_sensor_pwr_ctrl_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_sensor_pwr_ctrl_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's dependency ordinal: */ +#define DT_N_S_sensor_pwr_ctrl_ORD 10 +#define DT_N_S_sensor_pwr_ctrl_ORD_STR_SORTABLE 00010 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_sensor_pwr_ctrl_REQUIRES_ORDS \ + 0, /* / */ \ + 9, /* /soc/peripheral@50000000/gpio@842500 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_sensor_pwr_ctrl_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_sensor_pwr_ctrl_EXISTS 1 +#define DT_N_INST_0_regulator_fixed DT_N_S_sensor_pwr_ctrl + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_sensor_pwr_ctrl_REG_NUM 0 +#define DT_N_S_sensor_pwr_ctrl_RANGES_NUM 0 +#define DT_N_S_sensor_pwr_ctrl_FOREACH_RANGE(fn) +#define DT_N_S_sensor_pwr_ctrl_IRQ_NUM 0 +#define DT_N_S_sensor_pwr_ctrl_IRQ_LEVEL 0 +#define DT_N_S_sensor_pwr_ctrl_COMPAT_MATCHES_regulator_fixed 1 +#define DT_N_S_sensor_pwr_ctrl_STATUS_okay 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_sensor_pwr_ctrl_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_sensor_pwr_ctrl_P_wakeup_source 0 +#define DT_N_S_sensor_pwr_ctrl_P_wakeup_source_EXISTS 1 +#define DT_N_S_sensor_pwr_ctrl_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_sensor_pwr_ctrl_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_sensor_pwr_ctrl_P_compatible {"regulator-fixed"} +#define DT_N_S_sensor_pwr_ctrl_P_compatible_IDX_0 "regulator-fixed" +#define DT_N_S_sensor_pwr_ctrl_P_compatible_IDX_0_STRING_UNQUOTED regulator-fixed +#define DT_N_S_sensor_pwr_ctrl_P_compatible_IDX_0_STRING_TOKEN regulator_fixed +#define DT_N_S_sensor_pwr_ctrl_P_compatible_IDX_0_STRING_UPPER_TOKEN REGULATOR_FIXED +#define DT_N_S_sensor_pwr_ctrl_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_sensor_pwr_ctrl_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_sensor_pwr_ctrl, compatible, 0) +#define DT_N_S_sensor_pwr_ctrl_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_sensor_pwr_ctrl, compatible, 0) +#define DT_N_S_sensor_pwr_ctrl_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_sensor_pwr_ctrl, compatible, 0, __VA_ARGS__) +#define DT_N_S_sensor_pwr_ctrl_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_sensor_pwr_ctrl, compatible, 0, __VA_ARGS__) +#define DT_N_S_sensor_pwr_ctrl_P_compatible_LEN 1 +#define DT_N_S_sensor_pwr_ctrl_P_compatible_EXISTS 1 +#define DT_N_S_sensor_pwr_ctrl_P_zephyr_deferred_init 0 +#define DT_N_S_sensor_pwr_ctrl_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_sensor_pwr_ctrl_P_regulator_name "sensor-power" +#define DT_N_S_sensor_pwr_ctrl_P_regulator_name_STRING_UNQUOTED sensor-power +#define DT_N_S_sensor_pwr_ctrl_P_regulator_name_STRING_TOKEN sensor_power +#define DT_N_S_sensor_pwr_ctrl_P_regulator_name_STRING_UPPER_TOKEN SENSOR_POWER +#define DT_N_S_sensor_pwr_ctrl_P_regulator_name_IDX_0 "sensor-power" +#define DT_N_S_sensor_pwr_ctrl_P_regulator_name_IDX_0_EXISTS 1 +#define DT_N_S_sensor_pwr_ctrl_P_regulator_name_FOREACH_PROP_ELEM(fn) fn(DT_N_S_sensor_pwr_ctrl, regulator_name, 0) +#define DT_N_S_sensor_pwr_ctrl_P_regulator_name_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_sensor_pwr_ctrl, regulator_name, 0) +#define DT_N_S_sensor_pwr_ctrl_P_regulator_name_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_sensor_pwr_ctrl, regulator_name, 0, __VA_ARGS__) +#define DT_N_S_sensor_pwr_ctrl_P_regulator_name_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_sensor_pwr_ctrl, regulator_name, 0, __VA_ARGS__) +#define DT_N_S_sensor_pwr_ctrl_P_regulator_name_LEN 1 +#define DT_N_S_sensor_pwr_ctrl_P_regulator_name_EXISTS 1 +#define DT_N_S_sensor_pwr_ctrl_P_regulator_always_on 0 +#define DT_N_S_sensor_pwr_ctrl_P_regulator_always_on_EXISTS 1 +#define DT_N_S_sensor_pwr_ctrl_P_regulator_boot_on 1 +#define DT_N_S_sensor_pwr_ctrl_P_regulator_boot_on_EXISTS 1 +#define DT_N_S_sensor_pwr_ctrl_P_enable_gpios_IDX_0_EXISTS 1 +#define DT_N_S_sensor_pwr_ctrl_P_enable_gpios_IDX_0_PH DT_N_S_soc_S_peripheral_50000000_S_gpio_842500 +#define DT_N_S_sensor_pwr_ctrl_P_enable_gpios_IDX_0_VAL_pin 26 +#define DT_N_S_sensor_pwr_ctrl_P_enable_gpios_IDX_0_VAL_pin_EXISTS 1 +#define DT_N_S_sensor_pwr_ctrl_P_enable_gpios_IDX_0_VAL_flags 0 +#define DT_N_S_sensor_pwr_ctrl_P_enable_gpios_IDX_0_VAL_flags_EXISTS 1 +#define DT_N_S_sensor_pwr_ctrl_P_enable_gpios_FOREACH_PROP_ELEM(fn) fn(DT_N_S_sensor_pwr_ctrl, enable_gpios, 0) +#define DT_N_S_sensor_pwr_ctrl_P_enable_gpios_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_sensor_pwr_ctrl, enable_gpios, 0) +#define DT_N_S_sensor_pwr_ctrl_P_enable_gpios_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_sensor_pwr_ctrl, enable_gpios, 0, __VA_ARGS__) +#define DT_N_S_sensor_pwr_ctrl_P_enable_gpios_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_sensor_pwr_ctrl, enable_gpios, 0, __VA_ARGS__) +#define DT_N_S_sensor_pwr_ctrl_P_enable_gpios_LEN 1 +#define DT_N_S_sensor_pwr_ctrl_P_enable_gpios_EXISTS 1 + +/* + * Devicetree node: /soc/peripheral@50000000/timer@10000 + * + * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_timer_10000 + * + * Binding (compatible = nordic,nrf-timer): + * $ZEPHYR_BASE/dts/bindings/timer/nordic,nrf-timer.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_PATH "/soc/peripheral@50000000/timer@10000" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_FULL_NAME "timer@10000" + +/* Node parent (/soc/peripheral@50000000) identifier: */ +#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_PARENT DT_N_S_soc_S_peripheral_50000000 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_CHILD_IDX 38 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_CHILD_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_ORD 11 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_ORD_STR_SORTABLE 00011 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_REQUIRES_ORDS \ + 6, /* /soc/interrupt-controller@e000e100 */ \ + 8, /* /soc/peripheral@50000000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_SUPPORTS_ORDS \ + 12, /* /sw-pwm */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_EXISTS 1 +#define DT_N_INST_1_nordic_nrf_timer DT_N_S_soc_S_peripheral_50000000_S_timer_10000 +#define DT_N_NODELABEL_timer1 DT_N_S_soc_S_peripheral_50000000_S_timer_10000 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_REG_NUM 1 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_REG_IDX_0_VAL_ADDRESS 1342242816 /* 0x50010000 */ +#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */ +#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_RANGES_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_IRQ_NUM 1 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_IRQ_IDX_0_VAL_irq 16 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_IRQ_IDX_0_VAL_priority 1 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_IRQ_LEVEL 1 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_COMPAT_MATCHES_nordic_nrf_timer 1 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor" +#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_COMPAT_MODEL_IDX_0 "nrf-timer" +#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_STATUS_disabled 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_wakeup_source 0 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_status "disabled" +#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_status_ENUM_IDX 2 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_status_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_status_ENUM_TOKEN disabled +#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_status_ENUM_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_timer_10000, status, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_timer_10000, status, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_timer_10000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_timer_10000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_status_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_status_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_compatible {"nordic,nrf-timer"} +#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_compatible_IDX_0 "nordic,nrf-timer" +#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-timer +#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_timer +#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_TIMER +#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_timer_10000, compatible, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_timer_10000, compatible, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_timer_10000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_timer_10000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_compatible_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_reg {65536 /* 0x10000 */, 4096 /* 0x1000 */} +#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_reg_IDX_0 65536 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_reg_IDX_1 4096 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_reg_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_interrupts {16 /* 0x10 */, 1 /* 0x1 */} +#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_interrupts_IDX_0 16 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_interrupts_IDX_1 1 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_cc_num 6 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_cc_num_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_max_bit_width 32 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_max_bit_width_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_max_frequency 16000000 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_max_frequency_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_prescaler 0 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_prescaler_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_zli 0 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_zli_EXISTS 1 + +/* + * Devicetree node: /sw-pwm + * + * Node identifier: DT_N_S_sw_pwm + * + * Binding (compatible = nordic,nrf-sw-pwm): + * $ZEPHYR_BASE/dts/bindings/pwm/nordic,nrf-sw-pwm.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_sw_pwm_PATH "/sw-pwm" + +/* Node's name with unit-address: */ +#define DT_N_S_sw_pwm_FULL_NAME "sw-pwm" + +/* Node parent (/) identifier: */ +#define DT_N_S_sw_pwm_PARENT DT_N + +/* Node's index in its parent's list of children: */ +#define DT_N_S_sw_pwm_CHILD_IDX 5 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_sw_pwm_CHILD_NUM 0 +#define DT_N_S_sw_pwm_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_sw_pwm_FOREACH_CHILD(fn) +#define DT_N_S_sw_pwm_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_sw_pwm_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_sw_pwm_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_sw_pwm_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_sw_pwm_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_sw_pwm_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_sw_pwm_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's dependency ordinal: */ +#define DT_N_S_sw_pwm_ORD 12 +#define DT_N_S_sw_pwm_ORD_STR_SORTABLE 00012 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_sw_pwm_REQUIRES_ORDS \ + 0, /* / */ \ + 11, /* /soc/peripheral@50000000/timer@10000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_sw_pwm_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_sw_pwm_EXISTS 1 +#define DT_N_INST_0_nordic_nrf_sw_pwm DT_N_S_sw_pwm +#define DT_N_NODELABEL_sw_pwm DT_N_S_sw_pwm + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_sw_pwm_REG_NUM 0 +#define DT_N_S_sw_pwm_RANGES_NUM 0 +#define DT_N_S_sw_pwm_FOREACH_RANGE(fn) +#define DT_N_S_sw_pwm_IRQ_NUM 0 +#define DT_N_S_sw_pwm_IRQ_LEVEL 0 +#define DT_N_S_sw_pwm_COMPAT_MATCHES_nordic_nrf_sw_pwm 1 +#define DT_N_S_sw_pwm_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_sw_pwm_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor" +#define DT_N_S_sw_pwm_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_sw_pwm_COMPAT_MODEL_IDX_0 "nrf-sw-pwm" +#define DT_N_S_sw_pwm_STATUS_disabled 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_sw_pwm_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_sw_pwm_P_wakeup_source 0 +#define DT_N_S_sw_pwm_P_wakeup_source_EXISTS 1 +#define DT_N_S_sw_pwm_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_sw_pwm_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_sw_pwm_P_status "disabled" +#define DT_N_S_sw_pwm_P_status_STRING_UNQUOTED disabled +#define DT_N_S_sw_pwm_P_status_STRING_TOKEN disabled +#define DT_N_S_sw_pwm_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_sw_pwm_P_status_IDX_0 "disabled" +#define DT_N_S_sw_pwm_P_status_IDX_0_EXISTS 1 +#define DT_N_S_sw_pwm_P_status_ENUM_IDX 2 +#define DT_N_S_sw_pwm_P_status_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_sw_pwm_P_status_ENUM_TOKEN disabled +#define DT_N_S_sw_pwm_P_status_ENUM_UPPER_TOKEN DISABLED +#define DT_N_S_sw_pwm_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_sw_pwm, status, 0) +#define DT_N_S_sw_pwm_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_sw_pwm, status, 0) +#define DT_N_S_sw_pwm_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_sw_pwm, status, 0, __VA_ARGS__) +#define DT_N_S_sw_pwm_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_sw_pwm, status, 0, __VA_ARGS__) +#define DT_N_S_sw_pwm_P_status_LEN 1 +#define DT_N_S_sw_pwm_P_status_EXISTS 1 +#define DT_N_S_sw_pwm_P_compatible {"nordic,nrf-sw-pwm"} +#define DT_N_S_sw_pwm_P_compatible_IDX_0 "nordic,nrf-sw-pwm" +#define DT_N_S_sw_pwm_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-sw-pwm +#define DT_N_S_sw_pwm_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_sw_pwm +#define DT_N_S_sw_pwm_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_SW_PWM +#define DT_N_S_sw_pwm_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_sw_pwm_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_sw_pwm, compatible, 0) +#define DT_N_S_sw_pwm_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_sw_pwm, compatible, 0) +#define DT_N_S_sw_pwm_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_sw_pwm, compatible, 0, __VA_ARGS__) +#define DT_N_S_sw_pwm_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_sw_pwm, compatible, 0, __VA_ARGS__) +#define DT_N_S_sw_pwm_P_compatible_LEN 1 +#define DT_N_S_sw_pwm_P_compatible_EXISTS 1 +#define DT_N_S_sw_pwm_P_zephyr_deferred_init 0 +#define DT_N_S_sw_pwm_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_sw_pwm_P_generator DT_N_S_soc_S_peripheral_50000000_S_timer_10000 +#define DT_N_S_sw_pwm_P_generator_IDX_0 DT_N_S_soc_S_peripheral_50000000_S_timer_10000 +#define DT_N_S_sw_pwm_P_generator_IDX_0_PH DT_N_S_soc_S_peripheral_50000000_S_timer_10000 +#define DT_N_S_sw_pwm_P_generator_IDX_0_EXISTS 1 +#define DT_N_S_sw_pwm_P_generator_FOREACH_PROP_ELEM(fn) fn(DT_N_S_sw_pwm, generator, 0) +#define DT_N_S_sw_pwm_P_generator_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_sw_pwm, generator, 0) +#define DT_N_S_sw_pwm_P_generator_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_sw_pwm, generator, 0, __VA_ARGS__) +#define DT_N_S_sw_pwm_P_generator_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_sw_pwm, generator, 0, __VA_ARGS__) +#define DT_N_S_sw_pwm_P_generator_LEN 1 +#define DT_N_S_sw_pwm_P_generator_EXISTS 1 +#define DT_N_S_sw_pwm_P_clock_prescaler 0 +#define DT_N_S_sw_pwm_P_clock_prescaler_EXISTS 1 + +/* + * Devicetree node: /buttons + * + * Node identifier: DT_N_S_buttons + * + * Binding (compatible = gpio-keys): + * $ZEPHYR_BASE/dts/bindings/input/gpio-keys.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_buttons_PATH "/buttons" + +/* Node's name with unit-address: */ +#define DT_N_S_buttons_FULL_NAME "buttons" + +/* Node parent (/) identifier: */ +#define DT_N_S_buttons_PARENT DT_N + +/* Node's index in its parent's list of children: */ +#define DT_N_S_buttons_CHILD_IDX 9 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_buttons_CHILD_NUM 1 +#define DT_N_S_buttons_CHILD_NUM_STATUS_OKAY 1 +#define DT_N_S_buttons_FOREACH_CHILD(fn) fn(DT_N_S_buttons_S_button_0) +#define DT_N_S_buttons_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_buttons_S_button_0) +#define DT_N_S_buttons_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_buttons_S_button_0, __VA_ARGS__) +#define DT_N_S_buttons_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_buttons_S_button_0, __VA_ARGS__) +#define DT_N_S_buttons_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_buttons_S_button_0) +#define DT_N_S_buttons_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_buttons_S_button_0) +#define DT_N_S_buttons_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_buttons_S_button_0, __VA_ARGS__) +#define DT_N_S_buttons_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_buttons_S_button_0, __VA_ARGS__) + +/* Node's dependency ordinal: */ +#define DT_N_S_buttons_ORD 13 +#define DT_N_S_buttons_ORD_STR_SORTABLE 00013 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_buttons_REQUIRES_ORDS \ + 0, /* / */ \ + 9, /* /soc/peripheral@50000000/gpio@842500 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_buttons_SUPPORTS_ORDS \ + 14, /* /buttons/button_0 */ + +/* Existence and alternate IDs: */ +#define DT_N_S_buttons_EXISTS 1 +#define DT_N_INST_0_gpio_keys DT_N_S_buttons + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_buttons_REG_NUM 0 +#define DT_N_S_buttons_RANGES_NUM 0 +#define DT_N_S_buttons_FOREACH_RANGE(fn) +#define DT_N_S_buttons_IRQ_NUM 0 +#define DT_N_S_buttons_IRQ_LEVEL 0 +#define DT_N_S_buttons_COMPAT_MATCHES_gpio_keys 1 +#define DT_N_S_buttons_STATUS_okay 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_buttons_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_buttons_P_wakeup_source 0 +#define DT_N_S_buttons_P_wakeup_source_EXISTS 1 +#define DT_N_S_buttons_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_buttons_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_buttons_P_compatible {"gpio-keys"} +#define DT_N_S_buttons_P_compatible_IDX_0 "gpio-keys" +#define DT_N_S_buttons_P_compatible_IDX_0_STRING_UNQUOTED gpio-keys +#define DT_N_S_buttons_P_compatible_IDX_0_STRING_TOKEN gpio_keys +#define DT_N_S_buttons_P_compatible_IDX_0_STRING_UPPER_TOKEN GPIO_KEYS +#define DT_N_S_buttons_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_buttons_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_buttons, compatible, 0) +#define DT_N_S_buttons_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_buttons, compatible, 0) +#define DT_N_S_buttons_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_buttons, compatible, 0, __VA_ARGS__) +#define DT_N_S_buttons_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_buttons, compatible, 0, __VA_ARGS__) +#define DT_N_S_buttons_P_compatible_LEN 1 +#define DT_N_S_buttons_P_compatible_EXISTS 1 +#define DT_N_S_buttons_P_zephyr_deferred_init 0 +#define DT_N_S_buttons_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_buttons_P_debounce_interval_ms 30 +#define DT_N_S_buttons_P_debounce_interval_ms_EXISTS 1 +#define DT_N_S_buttons_P_polling_mode 0 +#define DT_N_S_buttons_P_polling_mode_EXISTS 1 + +/* + * Devicetree node: /buttons/button_0 + * + * Node identifier: DT_N_S_buttons_S_button_0 + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_buttons_S_button_0_PATH "/buttons/button_0" + +/* Node's name with unit-address: */ +#define DT_N_S_buttons_S_button_0_FULL_NAME "button_0" + +/* Node parent (/buttons) identifier: */ +#define DT_N_S_buttons_S_button_0_PARENT DT_N_S_buttons + +/* Node's index in its parent's list of children: */ +#define DT_N_S_buttons_S_button_0_CHILD_IDX 0 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_buttons_S_button_0_CHILD_NUM 0 +#define DT_N_S_buttons_S_button_0_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_buttons_S_button_0_FOREACH_CHILD(fn) +#define DT_N_S_buttons_S_button_0_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_buttons_S_button_0_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_buttons_S_button_0_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_buttons_S_button_0_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_buttons_S_button_0_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_buttons_S_button_0_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_buttons_S_button_0_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's dependency ordinal: */ +#define DT_N_S_buttons_S_button_0_ORD 14 +#define DT_N_S_buttons_S_button_0_ORD_STR_SORTABLE 00014 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_buttons_S_button_0_REQUIRES_ORDS \ + 9, /* /soc/peripheral@50000000/gpio@842500 */ \ + 13, /* /buttons */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_buttons_S_button_0_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_buttons_S_button_0_EXISTS 1 +#define DT_N_ALIAS_sw0 DT_N_S_buttons_S_button_0 +#define DT_N_ALIAS_mcuboot_button0 DT_N_S_buttons_S_button_0 +#define DT_N_NODELABEL_button0 DT_N_S_buttons_S_button_0 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_buttons_S_button_0_REG_NUM 0 +#define DT_N_S_buttons_S_button_0_RANGES_NUM 0 +#define DT_N_S_buttons_S_button_0_FOREACH_RANGE(fn) +#define DT_N_S_buttons_S_button_0_IRQ_NUM 0 +#define DT_N_S_buttons_S_button_0_IRQ_LEVEL 0 +#define DT_N_S_buttons_S_button_0_STATUS_okay 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_buttons_S_button_0_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_buttons_S_button_0_P_gpios_IDX_0_EXISTS 1 +#define DT_N_S_buttons_S_button_0_P_gpios_IDX_0_PH DT_N_S_soc_S_peripheral_50000000_S_gpio_842500 +#define DT_N_S_buttons_S_button_0_P_gpios_IDX_0_VAL_pin 31 +#define DT_N_S_buttons_S_button_0_P_gpios_IDX_0_VAL_pin_EXISTS 1 +#define DT_N_S_buttons_S_button_0_P_gpios_IDX_0_VAL_flags 17 +#define DT_N_S_buttons_S_button_0_P_gpios_IDX_0_VAL_flags_EXISTS 1 +#define DT_N_S_buttons_S_button_0_P_gpios_FOREACH_PROP_ELEM(fn) fn(DT_N_S_buttons_S_button_0, gpios, 0) +#define DT_N_S_buttons_S_button_0_P_gpios_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_buttons_S_button_0, gpios, 0) +#define DT_N_S_buttons_S_button_0_P_gpios_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_buttons_S_button_0, gpios, 0, __VA_ARGS__) +#define DT_N_S_buttons_S_button_0_P_gpios_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_buttons_S_button_0, gpios, 0, __VA_ARGS__) +#define DT_N_S_buttons_S_button_0_P_gpios_LEN 1 +#define DT_N_S_buttons_S_button_0_P_gpios_EXISTS 1 +#define DT_N_S_buttons_S_button_0_P_label "Mode button" +#define DT_N_S_buttons_S_button_0_P_label_STRING_UNQUOTED Mode button +#define DT_N_S_buttons_S_button_0_P_label_STRING_TOKEN Mode_button +#define DT_N_S_buttons_S_button_0_P_label_STRING_UPPER_TOKEN MODE_BUTTON +#define DT_N_S_buttons_S_button_0_P_label_IDX_0 "Mode button" +#define DT_N_S_buttons_S_button_0_P_label_IDX_0_EXISTS 1 +#define DT_N_S_buttons_S_button_0_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_buttons_S_button_0, label, 0) +#define DT_N_S_buttons_S_button_0_P_label_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_buttons_S_button_0, label, 0) +#define DT_N_S_buttons_S_button_0_P_label_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_buttons_S_button_0, label, 0, __VA_ARGS__) +#define DT_N_S_buttons_S_button_0_P_label_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_buttons_S_button_0, label, 0, __VA_ARGS__) +#define DT_N_S_buttons_S_button_0_P_label_LEN 1 +#define DT_N_S_buttons_S_button_0_P_label_EXISTS 1 +#define DT_N_S_buttons_S_button_0_P_zephyr_code 11 +#define DT_N_S_buttons_S_button_0_P_zephyr_code_EXISTS 1 + +/* + * Devicetree node: /cpus + * + * Node identifier: DT_N_S_cpus + */ + +/* Node's full path: */ +#define DT_N_S_cpus_PATH "/cpus" + +/* Node's name with unit-address: */ +#define DT_N_S_cpus_FULL_NAME "cpus" + +/* Node parent (/) identifier: */ +#define DT_N_S_cpus_PARENT DT_N + +/* Node's index in its parent's list of children: */ +#define DT_N_S_cpus_CHILD_IDX 6 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_cpus_CHILD_NUM 1 +#define DT_N_S_cpus_CHILD_NUM_STATUS_OKAY 1 +#define DT_N_S_cpus_FOREACH_CHILD(fn) fn(DT_N_S_cpus_S_cpu_0) +#define DT_N_S_cpus_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_cpus_S_cpu_0) +#define DT_N_S_cpus_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_cpus_S_cpu_0, __VA_ARGS__) +#define DT_N_S_cpus_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_cpus_S_cpu_0, __VA_ARGS__) +#define DT_N_S_cpus_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_cpus_S_cpu_0) +#define DT_N_S_cpus_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_cpus_S_cpu_0) +#define DT_N_S_cpus_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_cpus_S_cpu_0, __VA_ARGS__) +#define DT_N_S_cpus_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_cpus_S_cpu_0, __VA_ARGS__) + +/* Node's dependency ordinal: */ +#define DT_N_S_cpus_ORD 15 +#define DT_N_S_cpus_ORD_STR_SORTABLE 00015 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_cpus_REQUIRES_ORDS \ + 0, /* / */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_cpus_SUPPORTS_ORDS \ + 16, /* /cpus/cpu@0 */ + +/* Existence and alternate IDs: */ +#define DT_N_S_cpus_EXISTS 1 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_cpus_REG_NUM 0 +#define DT_N_S_cpus_RANGES_NUM 0 +#define DT_N_S_cpus_FOREACH_RANGE(fn) +#define DT_N_S_cpus_IRQ_NUM 0 +#define DT_N_S_cpus_IRQ_LEVEL 0 +#define DT_N_S_cpus_STATUS_okay 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_cpus_PINCTRL_NUM 0 + +/* (No generic property macros) */ + +/* + * Devicetree node: /cpus/cpu@0 + * + * Node identifier: DT_N_S_cpus_S_cpu_0 + * + * Binding (compatible = arm,cortex-m33f): + * $ZEPHYR_BASE/dts/bindings/cpu/arm,cortex-m33f.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_cpus_S_cpu_0_PATH "/cpus/cpu@0" + +/* Node's name with unit-address: */ +#define DT_N_S_cpus_S_cpu_0_FULL_NAME "cpu@0" + +/* Node parent (/cpus) identifier: */ +#define DT_N_S_cpus_S_cpu_0_PARENT DT_N_S_cpus + +/* Node's index in its parent's list of children: */ +#define DT_N_S_cpus_S_cpu_0_CHILD_IDX 0 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_cpus_S_cpu_0_CHILD_NUM 1 +#define DT_N_S_cpus_S_cpu_0_CHILD_NUM_STATUS_OKAY 1 +#define DT_N_S_cpus_S_cpu_0_FOREACH_CHILD(fn) fn(DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90) +#define DT_N_S_cpus_S_cpu_0_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90) +#define DT_N_S_cpus_S_cpu_0_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90, __VA_ARGS__) +#define DT_N_S_cpus_S_cpu_0_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90, __VA_ARGS__) +#define DT_N_S_cpus_S_cpu_0_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90) +#define DT_N_S_cpus_S_cpu_0_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90) +#define DT_N_S_cpus_S_cpu_0_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90, __VA_ARGS__) +#define DT_N_S_cpus_S_cpu_0_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90, __VA_ARGS__) + +/* Node's dependency ordinal: */ +#define DT_N_S_cpus_S_cpu_0_ORD 16 +#define DT_N_S_cpus_S_cpu_0_ORD_STR_SORTABLE 00016 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_cpus_S_cpu_0_REQUIRES_ORDS \ + 15, /* /cpus */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_cpus_S_cpu_0_SUPPORTS_ORDS \ + 17, /* /cpus/cpu@0/mpu@e000ed90 */ + +/* Existence and alternate IDs: */ +#define DT_N_S_cpus_S_cpu_0_EXISTS 1 +#define DT_N_INST_0_arm_cortex_m33f DT_N_S_cpus_S_cpu_0 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_cpus_S_cpu_0_REG_NUM 1 +#define DT_N_S_cpus_S_cpu_0_REG_IDX_0_EXISTS 1 +#define DT_N_S_cpus_S_cpu_0_REG_IDX_0_VAL_ADDRESS 0 /* 0x0 */ +#define DT_N_S_cpus_S_cpu_0_RANGES_NUM 0 +#define DT_N_S_cpus_S_cpu_0_FOREACH_RANGE(fn) +#define DT_N_S_cpus_S_cpu_0_IRQ_NUM 0 +#define DT_N_S_cpus_S_cpu_0_IRQ_LEVEL 0 +#define DT_N_S_cpus_S_cpu_0_COMPAT_MATCHES_arm_cortex_m33f 1 +#define DT_N_S_cpus_S_cpu_0_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_cpus_S_cpu_0_COMPAT_VENDOR_IDX_0 "ARM Ltd." +#define DT_N_S_cpus_S_cpu_0_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_cpus_S_cpu_0_COMPAT_MODEL_IDX_0 "cortex-m33f" +#define DT_N_S_cpus_S_cpu_0_STATUS_okay 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_cpus_S_cpu_0_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_cpus_S_cpu_0_P_wakeup_source 0 +#define DT_N_S_cpus_S_cpu_0_P_wakeup_source_EXISTS 1 +#define DT_N_S_cpus_S_cpu_0_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_cpus_S_cpu_0_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_cpus_S_cpu_0_P_compatible {"arm,cortex-m33f"} +#define DT_N_S_cpus_S_cpu_0_P_compatible_IDX_0 "arm,cortex-m33f" +#define DT_N_S_cpus_S_cpu_0_P_compatible_IDX_0_STRING_UNQUOTED arm,cortex-m33f +#define DT_N_S_cpus_S_cpu_0_P_compatible_IDX_0_STRING_TOKEN arm_cortex_m33f +#define DT_N_S_cpus_S_cpu_0_P_compatible_IDX_0_STRING_UPPER_TOKEN ARM_CORTEX_M33F +#define DT_N_S_cpus_S_cpu_0_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_cpus_S_cpu_0_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_cpus_S_cpu_0, compatible, 0) +#define DT_N_S_cpus_S_cpu_0_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_cpus_S_cpu_0, compatible, 0) +#define DT_N_S_cpus_S_cpu_0_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_cpus_S_cpu_0, compatible, 0, __VA_ARGS__) +#define DT_N_S_cpus_S_cpu_0_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_cpus_S_cpu_0, compatible, 0, __VA_ARGS__) +#define DT_N_S_cpus_S_cpu_0_P_compatible_LEN 1 +#define DT_N_S_cpus_S_cpu_0_P_compatible_EXISTS 1 +#define DT_N_S_cpus_S_cpu_0_P_reg {0 /* 0x0 */} +#define DT_N_S_cpus_S_cpu_0_P_reg_IDX_0 0 +#define DT_N_S_cpus_S_cpu_0_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_cpus_S_cpu_0_P_reg_EXISTS 1 +#define DT_N_S_cpus_S_cpu_0_P_zephyr_deferred_init 0 +#define DT_N_S_cpus_S_cpu_0_P_zephyr_deferred_init_EXISTS 1 + +/* + * Devicetree node: /cpus/cpu@0/mpu@e000ed90 + * + * Node identifier: DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90 + * + * Binding (compatible = arm,armv8m-mpu): + * $ZEPHYR_BASE/dts/bindings/mmu_mpu/arm,armv8m-mpu.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_PATH "/cpus/cpu@0/mpu@e000ed90" + +/* Node's name with unit-address: */ +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_FULL_NAME "mpu@e000ed90" + +/* Node parent (/cpus/cpu@0) identifier: */ +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_PARENT DT_N_S_cpus_S_cpu_0 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_CHILD_IDX 0 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_CHILD_NUM 0 +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_FOREACH_CHILD(fn) +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's dependency ordinal: */ +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_ORD 17 +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_ORD_STR_SORTABLE 00017 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_REQUIRES_ORDS \ + 16, /* /cpus/cpu@0 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_EXISTS 1 +#define DT_N_INST_0_arm_armv8m_mpu DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90 +#define DT_N_NODELABEL_mpu DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_REG_NUM 1 +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_REG_IDX_0_EXISTS 1 +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_REG_IDX_0_VAL_ADDRESS 3758157200 /* 0xe000ed90 */ +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_REG_IDX_0_VAL_SIZE 64 /* 0x40 */ +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_RANGES_NUM 0 +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_FOREACH_RANGE(fn) +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_IRQ_NUM 0 +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_IRQ_LEVEL 0 +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_COMPAT_MATCHES_arm_armv8m_mpu 1 +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_COMPAT_VENDOR_IDX_0 "ARM Ltd." +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_COMPAT_MODEL_IDX_0 "armv8m-mpu" +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_STATUS_okay 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_P_wakeup_source 0 +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_P_wakeup_source_EXISTS 1 +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_P_compatible {"arm,armv8m-mpu"} +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_P_compatible_IDX_0 "arm,armv8m-mpu" +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_P_compatible_IDX_0_STRING_UNQUOTED arm,armv8m-mpu +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_P_compatible_IDX_0_STRING_TOKEN arm_armv8m_mpu +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_P_compatible_IDX_0_STRING_UPPER_TOKEN ARM_ARMV8M_MPU +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90, compatible, 0) +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90, compatible, 0) +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90, compatible, 0, __VA_ARGS__) +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90, compatible, 0, __VA_ARGS__) +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_P_compatible_LEN 1 +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_P_compatible_EXISTS 1 +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_P_reg {3758157200 /* 0xe000ed90 */, 64 /* 0x40 */} +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_P_reg_IDX_0 3758157200 +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_P_reg_IDX_1 64 +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_P_reg_EXISTS 1 +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_P_zephyr_deferred_init 0 +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_P_zephyr_deferred_init_EXISTS 1 + +/* + * Devicetree node: /leds + * + * Node identifier: DT_N_S_leds + * + * Binding (compatible = gpio-leds): + * $ZEPHYR_BASE/dts/bindings/led/gpio-leds.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_leds_PATH "/leds" + +/* Node's name with unit-address: */ +#define DT_N_S_leds_FULL_NAME "leds" + +/* Node parent (/) identifier: */ +#define DT_N_S_leds_PARENT DT_N + +/* Node's index in its parent's list of children: */ +#define DT_N_S_leds_CHILD_IDX 7 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_leds_CHILD_NUM 1 +#define DT_N_S_leds_CHILD_NUM_STATUS_OKAY 1 +#define DT_N_S_leds_FOREACH_CHILD(fn) fn(DT_N_S_leds_S_led_0) +#define DT_N_S_leds_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_leds_S_led_0) +#define DT_N_S_leds_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_leds_S_led_0, __VA_ARGS__) +#define DT_N_S_leds_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_leds_S_led_0, __VA_ARGS__) +#define DT_N_S_leds_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_leds_S_led_0) +#define DT_N_S_leds_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_leds_S_led_0) +#define DT_N_S_leds_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_leds_S_led_0, __VA_ARGS__) +#define DT_N_S_leds_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_leds_S_led_0, __VA_ARGS__) + +/* Node's dependency ordinal: */ +#define DT_N_S_leds_ORD 18 +#define DT_N_S_leds_ORD_STR_SORTABLE 00018 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_leds_REQUIRES_ORDS \ + 0, /* / */ \ + 9, /* /soc/peripheral@50000000/gpio@842500 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_leds_SUPPORTS_ORDS \ + 19, /* /leds/led_0 */ + +/* Existence and alternate IDs: */ +#define DT_N_S_leds_EXISTS 1 +#define DT_N_INST_0_gpio_leds DT_N_S_leds + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_leds_REG_NUM 0 +#define DT_N_S_leds_RANGES_NUM 0 +#define DT_N_S_leds_FOREACH_RANGE(fn) +#define DT_N_S_leds_IRQ_NUM 0 +#define DT_N_S_leds_IRQ_LEVEL 0 +#define DT_N_S_leds_COMPAT_MATCHES_gpio_leds 1 +#define DT_N_S_leds_STATUS_okay 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_leds_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_leds_P_compatible {"gpio-leds"} +#define DT_N_S_leds_P_compatible_IDX_0 "gpio-leds" +#define DT_N_S_leds_P_compatible_IDX_0_STRING_UNQUOTED gpio-leds +#define DT_N_S_leds_P_compatible_IDX_0_STRING_TOKEN gpio_leds +#define DT_N_S_leds_P_compatible_IDX_0_STRING_UPPER_TOKEN GPIO_LEDS +#define DT_N_S_leds_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_leds_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_leds, compatible, 0) +#define DT_N_S_leds_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_leds, compatible, 0) +#define DT_N_S_leds_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_leds, compatible, 0, __VA_ARGS__) +#define DT_N_S_leds_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_leds, compatible, 0, __VA_ARGS__) +#define DT_N_S_leds_P_compatible_LEN 1 +#define DT_N_S_leds_P_compatible_EXISTS 1 + +/* + * Devicetree node: /leds/led_0 + * + * Node identifier: DT_N_S_leds_S_led_0 + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_leds_S_led_0_PATH "/leds/led_0" + +/* Node's name with unit-address: */ +#define DT_N_S_leds_S_led_0_FULL_NAME "led_0" + +/* Node parent (/leds) identifier: */ +#define DT_N_S_leds_S_led_0_PARENT DT_N_S_leds + +/* Node's index in its parent's list of children: */ +#define DT_N_S_leds_S_led_0_CHILD_IDX 0 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_leds_S_led_0_CHILD_NUM 0 +#define DT_N_S_leds_S_led_0_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_leds_S_led_0_FOREACH_CHILD(fn) +#define DT_N_S_leds_S_led_0_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_leds_S_led_0_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_leds_S_led_0_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_leds_S_led_0_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_leds_S_led_0_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_leds_S_led_0_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_leds_S_led_0_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's dependency ordinal: */ +#define DT_N_S_leds_S_led_0_ORD 19 +#define DT_N_S_leds_S_led_0_ORD_STR_SORTABLE 00019 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_leds_S_led_0_REQUIRES_ORDS \ + 9, /* /soc/peripheral@50000000/gpio@842500 */ \ + 18, /* /leds */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_leds_S_led_0_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_leds_S_led_0_EXISTS 1 +#define DT_N_ALIAS_led0 DT_N_S_leds_S_led_0 +#define DT_N_ALIAS_bootloader_led0 DT_N_S_leds_S_led_0 +#define DT_N_ALIAS_mcuboot_led0 DT_N_S_leds_S_led_0 +#define DT_N_NODELABEL_led0 DT_N_S_leds_S_led_0 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_leds_S_led_0_REG_NUM 0 +#define DT_N_S_leds_S_led_0_RANGES_NUM 0 +#define DT_N_S_leds_S_led_0_FOREACH_RANGE(fn) +#define DT_N_S_leds_S_led_0_IRQ_NUM 0 +#define DT_N_S_leds_S_led_0_IRQ_LEVEL 0 +#define DT_N_S_leds_S_led_0_STATUS_okay 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_leds_S_led_0_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_leds_S_led_0_P_gpios_IDX_0_EXISTS 1 +#define DT_N_S_leds_S_led_0_P_gpios_IDX_0_PH DT_N_S_soc_S_peripheral_50000000_S_gpio_842500 +#define DT_N_S_leds_S_led_0_P_gpios_IDX_0_VAL_pin 25 +#define DT_N_S_leds_S_led_0_P_gpios_IDX_0_VAL_pin_EXISTS 1 +#define DT_N_S_leds_S_led_0_P_gpios_IDX_0_VAL_flags 0 +#define DT_N_S_leds_S_led_0_P_gpios_IDX_0_VAL_flags_EXISTS 1 +#define DT_N_S_leds_S_led_0_P_gpios_FOREACH_PROP_ELEM(fn) fn(DT_N_S_leds_S_led_0, gpios, 0) +#define DT_N_S_leds_S_led_0_P_gpios_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_leds_S_led_0, gpios, 0) +#define DT_N_S_leds_S_led_0_P_gpios_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_leds_S_led_0, gpios, 0, __VA_ARGS__) +#define DT_N_S_leds_S_led_0_P_gpios_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_leds_S_led_0, gpios, 0, __VA_ARGS__) +#define DT_N_S_leds_S_led_0_P_gpios_LEN 1 +#define DT_N_S_leds_S_led_0_P_gpios_EXISTS 1 +#define DT_N_S_leds_S_led_0_P_label "LED" +#define DT_N_S_leds_S_led_0_P_label_STRING_UNQUOTED LED +#define DT_N_S_leds_S_led_0_P_label_STRING_TOKEN LED +#define DT_N_S_leds_S_led_0_P_label_STRING_UPPER_TOKEN LED +#define DT_N_S_leds_S_led_0_P_label_IDX_0 "LED" +#define DT_N_S_leds_S_led_0_P_label_IDX_0_EXISTS 1 +#define DT_N_S_leds_S_led_0_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_leds_S_led_0, label, 0) +#define DT_N_S_leds_S_led_0_P_label_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_leds_S_led_0, label, 0) +#define DT_N_S_leds_S_led_0_P_label_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_leds_S_led_0, label, 0, __VA_ARGS__) +#define DT_N_S_leds_S_led_0_P_label_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_leds_S_led_0, label, 0, __VA_ARGS__) +#define DT_N_S_leds_S_led_0_P_label_LEN 1 +#define DT_N_S_leds_S_led_0_P_label_EXISTS 1 + +/* + * Devicetree node: /pin-controller + * + * Node identifier: DT_N_S_pin_controller + * + * Binding (compatible = nordic,nrf-pinctrl): + * $ZEPHYR_BASE/dts/bindings/pinctrl/nordic,nrf-pinctrl.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_pin_controller_PATH "/pin-controller" + +/* Node's name with unit-address: */ +#define DT_N_S_pin_controller_FULL_NAME "pin-controller" + +/* Node parent (/) identifier: */ +#define DT_N_S_pin_controller_PARENT DT_N + +/* Node's index in its parent's list of children: */ +#define DT_N_S_pin_controller_CHILD_IDX 3 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_pin_controller_CHILD_NUM 8 +#define DT_N_S_pin_controller_CHILD_NUM_STATUS_OKAY 8 +#define DT_N_S_pin_controller_FOREACH_CHILD(fn) fn(DT_N_S_pin_controller_S_uart0_default) fn(DT_N_S_pin_controller_S_uart0_sleep) fn(DT_N_S_pin_controller_S_i2c2_default) fn(DT_N_S_pin_controller_S_i2c2_sleep) fn(DT_N_S_pin_controller_S_pwm0_default) fn(DT_N_S_pin_controller_S_pwm0_sleep) fn(DT_N_S_pin_controller_S_spi3_default) fn(DT_N_S_pin_controller_S_spi3_sleep) +#define DT_N_S_pin_controller_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_pin_controller_S_uart0_default) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pin_controller_S_uart0_sleep) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pin_controller_S_i2c2_default) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pin_controller_S_i2c2_sleep) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pin_controller_S_pwm0_default) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pin_controller_S_pwm0_sleep) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pin_controller_S_spi3_default) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pin_controller_S_spi3_sleep) +#define DT_N_S_pin_controller_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_pin_controller_S_uart0_default, __VA_ARGS__) fn(DT_N_S_pin_controller_S_uart0_sleep, __VA_ARGS__) fn(DT_N_S_pin_controller_S_i2c2_default, __VA_ARGS__) fn(DT_N_S_pin_controller_S_i2c2_sleep, __VA_ARGS__) fn(DT_N_S_pin_controller_S_pwm0_default, __VA_ARGS__) fn(DT_N_S_pin_controller_S_pwm0_sleep, __VA_ARGS__) fn(DT_N_S_pin_controller_S_spi3_default, __VA_ARGS__) fn(DT_N_S_pin_controller_S_spi3_sleep, __VA_ARGS__) +#define DT_N_S_pin_controller_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_pin_controller_S_uart0_default, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pin_controller_S_uart0_sleep, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pin_controller_S_i2c2_default, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pin_controller_S_i2c2_sleep, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pin_controller_S_pwm0_default, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pin_controller_S_pwm0_sleep, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pin_controller_S_spi3_default, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pin_controller_S_spi3_sleep, __VA_ARGS__) +#define DT_N_S_pin_controller_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_pin_controller_S_uart0_default) fn(DT_N_S_pin_controller_S_uart0_sleep) fn(DT_N_S_pin_controller_S_i2c2_default) fn(DT_N_S_pin_controller_S_i2c2_sleep) fn(DT_N_S_pin_controller_S_pwm0_default) fn(DT_N_S_pin_controller_S_pwm0_sleep) fn(DT_N_S_pin_controller_S_spi3_default) fn(DT_N_S_pin_controller_S_spi3_sleep) +#define DT_N_S_pin_controller_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_pin_controller_S_uart0_default) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pin_controller_S_uart0_sleep) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pin_controller_S_i2c2_default) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pin_controller_S_i2c2_sleep) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pin_controller_S_pwm0_default) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pin_controller_S_pwm0_sleep) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pin_controller_S_spi3_default) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pin_controller_S_spi3_sleep) +#define DT_N_S_pin_controller_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_pin_controller_S_uart0_default, __VA_ARGS__) fn(DT_N_S_pin_controller_S_uart0_sleep, __VA_ARGS__) fn(DT_N_S_pin_controller_S_i2c2_default, __VA_ARGS__) fn(DT_N_S_pin_controller_S_i2c2_sleep, __VA_ARGS__) fn(DT_N_S_pin_controller_S_pwm0_default, __VA_ARGS__) fn(DT_N_S_pin_controller_S_pwm0_sleep, __VA_ARGS__) fn(DT_N_S_pin_controller_S_spi3_default, __VA_ARGS__) fn(DT_N_S_pin_controller_S_spi3_sleep, __VA_ARGS__) +#define DT_N_S_pin_controller_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_pin_controller_S_uart0_default, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pin_controller_S_uart0_sleep, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pin_controller_S_i2c2_default, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pin_controller_S_i2c2_sleep, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pin_controller_S_pwm0_default, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pin_controller_S_pwm0_sleep, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pin_controller_S_spi3_default, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pin_controller_S_spi3_sleep, __VA_ARGS__) + +/* Node's dependency ordinal: */ +#define DT_N_S_pin_controller_ORD 20 +#define DT_N_S_pin_controller_ORD_STR_SORTABLE 00020 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_pin_controller_REQUIRES_ORDS \ + 0, /* / */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_pin_controller_SUPPORTS_ORDS \ + 21, /* /pin-controller/i2c2_default */ \ + 23, /* /pin-controller/i2c2_sleep */ \ + 25, /* /pin-controller/pwm0_default */ \ + 27, /* /pin-controller/pwm0_sleep */ \ + 29, /* /pin-controller/spi3_default */ \ + 31, /* /pin-controller/spi3_sleep */ \ + 33, /* /pin-controller/uart0_default */ \ + 35, /* /pin-controller/uart0_sleep */ + +/* Existence and alternate IDs: */ +#define DT_N_S_pin_controller_EXISTS 1 +#define DT_N_INST_0_nordic_nrf_pinctrl DT_N_S_pin_controller +#define DT_N_NODELABEL_pinctrl DT_N_S_pin_controller + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_pin_controller_REG_NUM 0 +#define DT_N_S_pin_controller_RANGES_NUM 0 +#define DT_N_S_pin_controller_FOREACH_RANGE(fn) +#define DT_N_S_pin_controller_IRQ_NUM 0 +#define DT_N_S_pin_controller_IRQ_LEVEL 0 +#define DT_N_S_pin_controller_COMPAT_MATCHES_nordic_nrf_pinctrl 1 +#define DT_N_S_pin_controller_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_pin_controller_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor" +#define DT_N_S_pin_controller_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_pin_controller_COMPAT_MODEL_IDX_0 "nrf-pinctrl" +#define DT_N_S_pin_controller_STATUS_okay 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_pin_controller_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_pin_controller_P_wakeup_source 0 +#define DT_N_S_pin_controller_P_wakeup_source_EXISTS 1 +#define DT_N_S_pin_controller_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_pin_controller_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_pin_controller_P_compatible {"nordic,nrf-pinctrl"} +#define DT_N_S_pin_controller_P_compatible_IDX_0 "nordic,nrf-pinctrl" +#define DT_N_S_pin_controller_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-pinctrl +#define DT_N_S_pin_controller_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_pinctrl +#define DT_N_S_pin_controller_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_PINCTRL +#define DT_N_S_pin_controller_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_pin_controller_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_pin_controller, compatible, 0) +#define DT_N_S_pin_controller_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_pin_controller, compatible, 0) +#define DT_N_S_pin_controller_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_pin_controller, compatible, 0, __VA_ARGS__) +#define DT_N_S_pin_controller_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_pin_controller, compatible, 0, __VA_ARGS__) +#define DT_N_S_pin_controller_P_compatible_LEN 1 +#define DT_N_S_pin_controller_P_compatible_EXISTS 1 +#define DT_N_S_pin_controller_P_zephyr_deferred_init 0 +#define DT_N_S_pin_controller_P_zephyr_deferred_init_EXISTS 1 + +/* + * Devicetree node: /pin-controller/i2c2_default + * + * Node identifier: DT_N_S_pin_controller_S_i2c2_default + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_pin_controller_S_i2c2_default_PATH "/pin-controller/i2c2_default" + +/* Node's name with unit-address: */ +#define DT_N_S_pin_controller_S_i2c2_default_FULL_NAME "i2c2_default" + +/* Node parent (/pin-controller) identifier: */ +#define DT_N_S_pin_controller_S_i2c2_default_PARENT DT_N_S_pin_controller + +/* Node's index in its parent's list of children: */ +#define DT_N_S_pin_controller_S_i2c2_default_CHILD_IDX 2 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_pin_controller_S_i2c2_default_CHILD_NUM 1 +#define DT_N_S_pin_controller_S_i2c2_default_CHILD_NUM_STATUS_OKAY 1 +#define DT_N_S_pin_controller_S_i2c2_default_FOREACH_CHILD(fn) fn(DT_N_S_pin_controller_S_i2c2_default_S_group1) +#define DT_N_S_pin_controller_S_i2c2_default_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_pin_controller_S_i2c2_default_S_group1) +#define DT_N_S_pin_controller_S_i2c2_default_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_pin_controller_S_i2c2_default_S_group1, __VA_ARGS__) +#define DT_N_S_pin_controller_S_i2c2_default_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_pin_controller_S_i2c2_default_S_group1, __VA_ARGS__) +#define DT_N_S_pin_controller_S_i2c2_default_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_pin_controller_S_i2c2_default_S_group1) +#define DT_N_S_pin_controller_S_i2c2_default_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_pin_controller_S_i2c2_default_S_group1) +#define DT_N_S_pin_controller_S_i2c2_default_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_pin_controller_S_i2c2_default_S_group1, __VA_ARGS__) +#define DT_N_S_pin_controller_S_i2c2_default_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_pin_controller_S_i2c2_default_S_group1, __VA_ARGS__) + +/* Node's dependency ordinal: */ +#define DT_N_S_pin_controller_S_i2c2_default_ORD 21 +#define DT_N_S_pin_controller_S_i2c2_default_ORD_STR_SORTABLE 00021 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_pin_controller_S_i2c2_default_REQUIRES_ORDS \ + 20, /* /pin-controller */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_pin_controller_S_i2c2_default_SUPPORTS_ORDS \ + 22, /* /pin-controller/i2c2_default/group1 */ \ + 96, /* /soc/peripheral@50000000/i2c@a000 */ + +/* Existence and alternate IDs: */ +#define DT_N_S_pin_controller_S_i2c2_default_EXISTS 1 +#define DT_N_NODELABEL_i2c2_default DT_N_S_pin_controller_S_i2c2_default + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_pin_controller_S_i2c2_default_REG_NUM 0 +#define DT_N_S_pin_controller_S_i2c2_default_RANGES_NUM 0 +#define DT_N_S_pin_controller_S_i2c2_default_FOREACH_RANGE(fn) +#define DT_N_S_pin_controller_S_i2c2_default_IRQ_NUM 0 +#define DT_N_S_pin_controller_S_i2c2_default_IRQ_LEVEL 0 +#define DT_N_S_pin_controller_S_i2c2_default_STATUS_okay 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_pin_controller_S_i2c2_default_PINCTRL_NUM 0 + +/* (No generic property macros) */ + +/* + * Devicetree node: /pin-controller/i2c2_default/group1 + * + * Node identifier: DT_N_S_pin_controller_S_i2c2_default_S_group1 + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_pin_controller_S_i2c2_default_S_group1_PATH "/pin-controller/i2c2_default/group1" + +/* Node's name with unit-address: */ +#define DT_N_S_pin_controller_S_i2c2_default_S_group1_FULL_NAME "group1" + +/* Node parent (/pin-controller/i2c2_default) identifier: */ +#define DT_N_S_pin_controller_S_i2c2_default_S_group1_PARENT DT_N_S_pin_controller_S_i2c2_default + +/* Node's index in its parent's list of children: */ +#define DT_N_S_pin_controller_S_i2c2_default_S_group1_CHILD_IDX 0 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_pin_controller_S_i2c2_default_S_group1_CHILD_NUM 0 +#define DT_N_S_pin_controller_S_i2c2_default_S_group1_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_pin_controller_S_i2c2_default_S_group1_FOREACH_CHILD(fn) +#define DT_N_S_pin_controller_S_i2c2_default_S_group1_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_pin_controller_S_i2c2_default_S_group1_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_pin_controller_S_i2c2_default_S_group1_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_pin_controller_S_i2c2_default_S_group1_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_pin_controller_S_i2c2_default_S_group1_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_pin_controller_S_i2c2_default_S_group1_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_pin_controller_S_i2c2_default_S_group1_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's dependency ordinal: */ +#define DT_N_S_pin_controller_S_i2c2_default_S_group1_ORD 22 +#define DT_N_S_pin_controller_S_i2c2_default_S_group1_ORD_STR_SORTABLE 00022 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_pin_controller_S_i2c2_default_S_group1_REQUIRES_ORDS \ + 21, /* /pin-controller/i2c2_default */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_pin_controller_S_i2c2_default_S_group1_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_pin_controller_S_i2c2_default_S_group1_EXISTS 1 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_pin_controller_S_i2c2_default_S_group1_REG_NUM 0 +#define DT_N_S_pin_controller_S_i2c2_default_S_group1_RANGES_NUM 0 +#define DT_N_S_pin_controller_S_i2c2_default_S_group1_FOREACH_RANGE(fn) +#define DT_N_S_pin_controller_S_i2c2_default_S_group1_IRQ_NUM 0 +#define DT_N_S_pin_controller_S_i2c2_default_S_group1_IRQ_LEVEL 0 +#define DT_N_S_pin_controller_S_i2c2_default_S_group1_STATUS_okay 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_pin_controller_S_i2c2_default_S_group1_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_pin_controller_S_i2c2_default_S_group1_P_bias_disable 0 +#define DT_N_S_pin_controller_S_i2c2_default_S_group1_P_bias_disable_EXISTS 1 +#define DT_N_S_pin_controller_S_i2c2_default_S_group1_P_bias_pull_up 0 +#define DT_N_S_pin_controller_S_i2c2_default_S_group1_P_bias_pull_up_EXISTS 1 +#define DT_N_S_pin_controller_S_i2c2_default_S_group1_P_bias_pull_down 0 +#define DT_N_S_pin_controller_S_i2c2_default_S_group1_P_bias_pull_down_EXISTS 1 +#define DT_N_S_pin_controller_S_i2c2_default_S_group1_P_low_power_enable 0 +#define DT_N_S_pin_controller_S_i2c2_default_S_group1_P_low_power_enable_EXISTS 1 +#define DT_N_S_pin_controller_S_i2c2_default_S_group1_P_psels {1572872 /* 0x180008 */, 1441799 /* 0x160007 */} +#define DT_N_S_pin_controller_S_i2c2_default_S_group1_P_psels_IDX_0 1572872 +#define DT_N_S_pin_controller_S_i2c2_default_S_group1_P_psels_IDX_0_EXISTS 1 +#define DT_N_S_pin_controller_S_i2c2_default_S_group1_P_psels_IDX_1 1441799 +#define DT_N_S_pin_controller_S_i2c2_default_S_group1_P_psels_IDX_1_EXISTS 1 +#define DT_N_S_pin_controller_S_i2c2_default_S_group1_P_psels_FOREACH_PROP_ELEM(fn) fn(DT_N_S_pin_controller_S_i2c2_default_S_group1, psels, 0) \ + fn(DT_N_S_pin_controller_S_i2c2_default_S_group1, psels, 1) +#define DT_N_S_pin_controller_S_i2c2_default_S_group1_P_psels_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_pin_controller_S_i2c2_default_S_group1, psels, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_pin_controller_S_i2c2_default_S_group1, psels, 1) +#define DT_N_S_pin_controller_S_i2c2_default_S_group1_P_psels_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_pin_controller_S_i2c2_default_S_group1, psels, 0, __VA_ARGS__) \ + fn(DT_N_S_pin_controller_S_i2c2_default_S_group1, psels, 1, __VA_ARGS__) +#define DT_N_S_pin_controller_S_i2c2_default_S_group1_P_psels_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_pin_controller_S_i2c2_default_S_group1, psels, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_pin_controller_S_i2c2_default_S_group1, psels, 1, __VA_ARGS__) +#define DT_N_S_pin_controller_S_i2c2_default_S_group1_P_psels_LEN 2 +#define DT_N_S_pin_controller_S_i2c2_default_S_group1_P_psels_EXISTS 1 +#define DT_N_S_pin_controller_S_i2c2_default_S_group1_P_nordic_drive_mode 0 +#define DT_N_S_pin_controller_S_i2c2_default_S_group1_P_nordic_drive_mode_EXISTS 1 +#define DT_N_S_pin_controller_S_i2c2_default_S_group1_P_nordic_invert 0 +#define DT_N_S_pin_controller_S_i2c2_default_S_group1_P_nordic_invert_EXISTS 1 + +/* + * Devicetree node: /pin-controller/i2c2_sleep + * + * Node identifier: DT_N_S_pin_controller_S_i2c2_sleep + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_pin_controller_S_i2c2_sleep_PATH "/pin-controller/i2c2_sleep" + +/* Node's name with unit-address: */ +#define DT_N_S_pin_controller_S_i2c2_sleep_FULL_NAME "i2c2_sleep" + +/* Node parent (/pin-controller) identifier: */ +#define DT_N_S_pin_controller_S_i2c2_sleep_PARENT DT_N_S_pin_controller + +/* Node's index in its parent's list of children: */ +#define DT_N_S_pin_controller_S_i2c2_sleep_CHILD_IDX 3 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_pin_controller_S_i2c2_sleep_CHILD_NUM 1 +#define DT_N_S_pin_controller_S_i2c2_sleep_CHILD_NUM_STATUS_OKAY 1 +#define DT_N_S_pin_controller_S_i2c2_sleep_FOREACH_CHILD(fn) fn(DT_N_S_pin_controller_S_i2c2_sleep_S_group1) +#define DT_N_S_pin_controller_S_i2c2_sleep_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_pin_controller_S_i2c2_sleep_S_group1) +#define DT_N_S_pin_controller_S_i2c2_sleep_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_pin_controller_S_i2c2_sleep_S_group1, __VA_ARGS__) +#define DT_N_S_pin_controller_S_i2c2_sleep_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_pin_controller_S_i2c2_sleep_S_group1, __VA_ARGS__) +#define DT_N_S_pin_controller_S_i2c2_sleep_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_pin_controller_S_i2c2_sleep_S_group1) +#define DT_N_S_pin_controller_S_i2c2_sleep_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_pin_controller_S_i2c2_sleep_S_group1) +#define DT_N_S_pin_controller_S_i2c2_sleep_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_pin_controller_S_i2c2_sleep_S_group1, __VA_ARGS__) +#define DT_N_S_pin_controller_S_i2c2_sleep_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_pin_controller_S_i2c2_sleep_S_group1, __VA_ARGS__) + +/* Node's dependency ordinal: */ +#define DT_N_S_pin_controller_S_i2c2_sleep_ORD 23 +#define DT_N_S_pin_controller_S_i2c2_sleep_ORD_STR_SORTABLE 00023 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_pin_controller_S_i2c2_sleep_REQUIRES_ORDS \ + 20, /* /pin-controller */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_pin_controller_S_i2c2_sleep_SUPPORTS_ORDS \ + 24, /* /pin-controller/i2c2_sleep/group1 */ \ + 96, /* /soc/peripheral@50000000/i2c@a000 */ + +/* Existence and alternate IDs: */ +#define DT_N_S_pin_controller_S_i2c2_sleep_EXISTS 1 +#define DT_N_NODELABEL_i2c2_sleep DT_N_S_pin_controller_S_i2c2_sleep + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_pin_controller_S_i2c2_sleep_REG_NUM 0 +#define DT_N_S_pin_controller_S_i2c2_sleep_RANGES_NUM 0 +#define DT_N_S_pin_controller_S_i2c2_sleep_FOREACH_RANGE(fn) +#define DT_N_S_pin_controller_S_i2c2_sleep_IRQ_NUM 0 +#define DT_N_S_pin_controller_S_i2c2_sleep_IRQ_LEVEL 0 +#define DT_N_S_pin_controller_S_i2c2_sleep_STATUS_okay 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_pin_controller_S_i2c2_sleep_PINCTRL_NUM 0 + +/* (No generic property macros) */ + +/* + * Devicetree node: /pin-controller/i2c2_sleep/group1 + * + * Node identifier: DT_N_S_pin_controller_S_i2c2_sleep_S_group1 + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_pin_controller_S_i2c2_sleep_S_group1_PATH "/pin-controller/i2c2_sleep/group1" + +/* Node's name with unit-address: */ +#define DT_N_S_pin_controller_S_i2c2_sleep_S_group1_FULL_NAME "group1" + +/* Node parent (/pin-controller/i2c2_sleep) identifier: */ +#define DT_N_S_pin_controller_S_i2c2_sleep_S_group1_PARENT DT_N_S_pin_controller_S_i2c2_sleep + +/* Node's index in its parent's list of children: */ +#define DT_N_S_pin_controller_S_i2c2_sleep_S_group1_CHILD_IDX 0 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_pin_controller_S_i2c2_sleep_S_group1_CHILD_NUM 0 +#define DT_N_S_pin_controller_S_i2c2_sleep_S_group1_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_pin_controller_S_i2c2_sleep_S_group1_FOREACH_CHILD(fn) +#define DT_N_S_pin_controller_S_i2c2_sleep_S_group1_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_pin_controller_S_i2c2_sleep_S_group1_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_pin_controller_S_i2c2_sleep_S_group1_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_pin_controller_S_i2c2_sleep_S_group1_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_pin_controller_S_i2c2_sleep_S_group1_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_pin_controller_S_i2c2_sleep_S_group1_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_pin_controller_S_i2c2_sleep_S_group1_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's dependency ordinal: */ +#define DT_N_S_pin_controller_S_i2c2_sleep_S_group1_ORD 24 +#define DT_N_S_pin_controller_S_i2c2_sleep_S_group1_ORD_STR_SORTABLE 00024 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_pin_controller_S_i2c2_sleep_S_group1_REQUIRES_ORDS \ + 23, /* /pin-controller/i2c2_sleep */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_pin_controller_S_i2c2_sleep_S_group1_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_pin_controller_S_i2c2_sleep_S_group1_EXISTS 1 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_pin_controller_S_i2c2_sleep_S_group1_REG_NUM 0 +#define DT_N_S_pin_controller_S_i2c2_sleep_S_group1_RANGES_NUM 0 +#define DT_N_S_pin_controller_S_i2c2_sleep_S_group1_FOREACH_RANGE(fn) +#define DT_N_S_pin_controller_S_i2c2_sleep_S_group1_IRQ_NUM 0 +#define DT_N_S_pin_controller_S_i2c2_sleep_S_group1_IRQ_LEVEL 0 +#define DT_N_S_pin_controller_S_i2c2_sleep_S_group1_STATUS_okay 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_pin_controller_S_i2c2_sleep_S_group1_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_pin_controller_S_i2c2_sleep_S_group1_P_bias_disable 0 +#define DT_N_S_pin_controller_S_i2c2_sleep_S_group1_P_bias_disable_EXISTS 1 +#define DT_N_S_pin_controller_S_i2c2_sleep_S_group1_P_bias_pull_up 0 +#define DT_N_S_pin_controller_S_i2c2_sleep_S_group1_P_bias_pull_up_EXISTS 1 +#define DT_N_S_pin_controller_S_i2c2_sleep_S_group1_P_bias_pull_down 0 +#define DT_N_S_pin_controller_S_i2c2_sleep_S_group1_P_bias_pull_down_EXISTS 1 +#define DT_N_S_pin_controller_S_i2c2_sleep_S_group1_P_low_power_enable 1 +#define DT_N_S_pin_controller_S_i2c2_sleep_S_group1_P_low_power_enable_EXISTS 1 +#define DT_N_S_pin_controller_S_i2c2_sleep_S_group1_P_psels {1572872 /* 0x180008 */, 1441799 /* 0x160007 */} +#define DT_N_S_pin_controller_S_i2c2_sleep_S_group1_P_psels_IDX_0 1572872 +#define DT_N_S_pin_controller_S_i2c2_sleep_S_group1_P_psels_IDX_0_EXISTS 1 +#define DT_N_S_pin_controller_S_i2c2_sleep_S_group1_P_psels_IDX_1 1441799 +#define DT_N_S_pin_controller_S_i2c2_sleep_S_group1_P_psels_IDX_1_EXISTS 1 +#define DT_N_S_pin_controller_S_i2c2_sleep_S_group1_P_psels_FOREACH_PROP_ELEM(fn) fn(DT_N_S_pin_controller_S_i2c2_sleep_S_group1, psels, 0) \ + fn(DT_N_S_pin_controller_S_i2c2_sleep_S_group1, psels, 1) +#define DT_N_S_pin_controller_S_i2c2_sleep_S_group1_P_psels_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_pin_controller_S_i2c2_sleep_S_group1, psels, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_pin_controller_S_i2c2_sleep_S_group1, psels, 1) +#define DT_N_S_pin_controller_S_i2c2_sleep_S_group1_P_psels_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_pin_controller_S_i2c2_sleep_S_group1, psels, 0, __VA_ARGS__) \ + fn(DT_N_S_pin_controller_S_i2c2_sleep_S_group1, psels, 1, __VA_ARGS__) +#define DT_N_S_pin_controller_S_i2c2_sleep_S_group1_P_psels_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_pin_controller_S_i2c2_sleep_S_group1, psels, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_pin_controller_S_i2c2_sleep_S_group1, psels, 1, __VA_ARGS__) +#define DT_N_S_pin_controller_S_i2c2_sleep_S_group1_P_psels_LEN 2 +#define DT_N_S_pin_controller_S_i2c2_sleep_S_group1_P_psels_EXISTS 1 +#define DT_N_S_pin_controller_S_i2c2_sleep_S_group1_P_nordic_drive_mode 0 +#define DT_N_S_pin_controller_S_i2c2_sleep_S_group1_P_nordic_drive_mode_EXISTS 1 +#define DT_N_S_pin_controller_S_i2c2_sleep_S_group1_P_nordic_invert 0 +#define DT_N_S_pin_controller_S_i2c2_sleep_S_group1_P_nordic_invert_EXISTS 1 + +/* + * Devicetree node: /pin-controller/pwm0_default + * + * Node identifier: DT_N_S_pin_controller_S_pwm0_default + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_pin_controller_S_pwm0_default_PATH "/pin-controller/pwm0_default" + +/* Node's name with unit-address: */ +#define DT_N_S_pin_controller_S_pwm0_default_FULL_NAME "pwm0_default" + +/* Node parent (/pin-controller) identifier: */ +#define DT_N_S_pin_controller_S_pwm0_default_PARENT DT_N_S_pin_controller + +/* Node's index in its parent's list of children: */ +#define DT_N_S_pin_controller_S_pwm0_default_CHILD_IDX 4 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_pin_controller_S_pwm0_default_CHILD_NUM 1 +#define DT_N_S_pin_controller_S_pwm0_default_CHILD_NUM_STATUS_OKAY 1 +#define DT_N_S_pin_controller_S_pwm0_default_FOREACH_CHILD(fn) fn(DT_N_S_pin_controller_S_pwm0_default_S_group1) +#define DT_N_S_pin_controller_S_pwm0_default_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_pin_controller_S_pwm0_default_S_group1) +#define DT_N_S_pin_controller_S_pwm0_default_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_pin_controller_S_pwm0_default_S_group1, __VA_ARGS__) +#define DT_N_S_pin_controller_S_pwm0_default_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_pin_controller_S_pwm0_default_S_group1, __VA_ARGS__) +#define DT_N_S_pin_controller_S_pwm0_default_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_pin_controller_S_pwm0_default_S_group1) +#define DT_N_S_pin_controller_S_pwm0_default_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_pin_controller_S_pwm0_default_S_group1) +#define DT_N_S_pin_controller_S_pwm0_default_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_pin_controller_S_pwm0_default_S_group1, __VA_ARGS__) +#define DT_N_S_pin_controller_S_pwm0_default_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_pin_controller_S_pwm0_default_S_group1, __VA_ARGS__) + +/* Node's dependency ordinal: */ +#define DT_N_S_pin_controller_S_pwm0_default_ORD 25 +#define DT_N_S_pin_controller_S_pwm0_default_ORD_STR_SORTABLE 00025 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_pin_controller_S_pwm0_default_REQUIRES_ORDS \ + 20, /* /pin-controller */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_pin_controller_S_pwm0_default_SUPPORTS_ORDS \ + 26, /* /pin-controller/pwm0_default/group1 */ \ + 37, /* /soc/peripheral@50000000/pwm@21000 */ + +/* Existence and alternate IDs: */ +#define DT_N_S_pin_controller_S_pwm0_default_EXISTS 1 +#define DT_N_NODELABEL_pwm0_default DT_N_S_pin_controller_S_pwm0_default + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_pin_controller_S_pwm0_default_REG_NUM 0 +#define DT_N_S_pin_controller_S_pwm0_default_RANGES_NUM 0 +#define DT_N_S_pin_controller_S_pwm0_default_FOREACH_RANGE(fn) +#define DT_N_S_pin_controller_S_pwm0_default_IRQ_NUM 0 +#define DT_N_S_pin_controller_S_pwm0_default_IRQ_LEVEL 0 +#define DT_N_S_pin_controller_S_pwm0_default_STATUS_okay 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_pin_controller_S_pwm0_default_PINCTRL_NUM 0 + +/* (No generic property macros) */ + +/* + * Devicetree node: /pin-controller/pwm0_default/group1 + * + * Node identifier: DT_N_S_pin_controller_S_pwm0_default_S_group1 + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_pin_controller_S_pwm0_default_S_group1_PATH "/pin-controller/pwm0_default/group1" + +/* Node's name with unit-address: */ +#define DT_N_S_pin_controller_S_pwm0_default_S_group1_FULL_NAME "group1" + +/* Node parent (/pin-controller/pwm0_default) identifier: */ +#define DT_N_S_pin_controller_S_pwm0_default_S_group1_PARENT DT_N_S_pin_controller_S_pwm0_default + +/* Node's index in its parent's list of children: */ +#define DT_N_S_pin_controller_S_pwm0_default_S_group1_CHILD_IDX 0 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_pin_controller_S_pwm0_default_S_group1_CHILD_NUM 0 +#define DT_N_S_pin_controller_S_pwm0_default_S_group1_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_pin_controller_S_pwm0_default_S_group1_FOREACH_CHILD(fn) +#define DT_N_S_pin_controller_S_pwm0_default_S_group1_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_pin_controller_S_pwm0_default_S_group1_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_pin_controller_S_pwm0_default_S_group1_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_pin_controller_S_pwm0_default_S_group1_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_pin_controller_S_pwm0_default_S_group1_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_pin_controller_S_pwm0_default_S_group1_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_pin_controller_S_pwm0_default_S_group1_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's dependency ordinal: */ +#define DT_N_S_pin_controller_S_pwm0_default_S_group1_ORD 26 +#define DT_N_S_pin_controller_S_pwm0_default_S_group1_ORD_STR_SORTABLE 00026 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_pin_controller_S_pwm0_default_S_group1_REQUIRES_ORDS \ + 25, /* /pin-controller/pwm0_default */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_pin_controller_S_pwm0_default_S_group1_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_pin_controller_S_pwm0_default_S_group1_EXISTS 1 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_pin_controller_S_pwm0_default_S_group1_REG_NUM 0 +#define DT_N_S_pin_controller_S_pwm0_default_S_group1_RANGES_NUM 0 +#define DT_N_S_pin_controller_S_pwm0_default_S_group1_FOREACH_RANGE(fn) +#define DT_N_S_pin_controller_S_pwm0_default_S_group1_IRQ_NUM 0 +#define DT_N_S_pin_controller_S_pwm0_default_S_group1_IRQ_LEVEL 0 +#define DT_N_S_pin_controller_S_pwm0_default_S_group1_STATUS_okay 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_pin_controller_S_pwm0_default_S_group1_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_pin_controller_S_pwm0_default_S_group1_P_bias_disable 0 +#define DT_N_S_pin_controller_S_pwm0_default_S_group1_P_bias_disable_EXISTS 1 +#define DT_N_S_pin_controller_S_pwm0_default_S_group1_P_bias_pull_up 0 +#define DT_N_S_pin_controller_S_pwm0_default_S_group1_P_bias_pull_up_EXISTS 1 +#define DT_N_S_pin_controller_S_pwm0_default_S_group1_P_bias_pull_down 0 +#define DT_N_S_pin_controller_S_pwm0_default_S_group1_P_bias_pull_down_EXISTS 1 +#define DT_N_S_pin_controller_S_pwm0_default_S_group1_P_low_power_enable 0 +#define DT_N_S_pin_controller_S_pwm0_default_S_group1_P_low_power_enable_EXISTS 1 +#define DT_N_S_pin_controller_S_pwm0_default_S_group1_P_psels {2883609 /* 0x2c0019 */} +#define DT_N_S_pin_controller_S_pwm0_default_S_group1_P_psels_IDX_0 2883609 +#define DT_N_S_pin_controller_S_pwm0_default_S_group1_P_psels_IDX_0_EXISTS 1 +#define DT_N_S_pin_controller_S_pwm0_default_S_group1_P_psels_FOREACH_PROP_ELEM(fn) fn(DT_N_S_pin_controller_S_pwm0_default_S_group1, psels, 0) +#define DT_N_S_pin_controller_S_pwm0_default_S_group1_P_psels_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_pin_controller_S_pwm0_default_S_group1, psels, 0) +#define DT_N_S_pin_controller_S_pwm0_default_S_group1_P_psels_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_pin_controller_S_pwm0_default_S_group1, psels, 0, __VA_ARGS__) +#define DT_N_S_pin_controller_S_pwm0_default_S_group1_P_psels_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_pin_controller_S_pwm0_default_S_group1, psels, 0, __VA_ARGS__) +#define DT_N_S_pin_controller_S_pwm0_default_S_group1_P_psels_LEN 1 +#define DT_N_S_pin_controller_S_pwm0_default_S_group1_P_psels_EXISTS 1 +#define DT_N_S_pin_controller_S_pwm0_default_S_group1_P_nordic_drive_mode 0 +#define DT_N_S_pin_controller_S_pwm0_default_S_group1_P_nordic_drive_mode_EXISTS 1 +#define DT_N_S_pin_controller_S_pwm0_default_S_group1_P_nordic_invert 0 +#define DT_N_S_pin_controller_S_pwm0_default_S_group1_P_nordic_invert_EXISTS 1 + +/* + * Devicetree node: /pin-controller/pwm0_sleep + * + * Node identifier: DT_N_S_pin_controller_S_pwm0_sleep + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_pin_controller_S_pwm0_sleep_PATH "/pin-controller/pwm0_sleep" + +/* Node's name with unit-address: */ +#define DT_N_S_pin_controller_S_pwm0_sleep_FULL_NAME "pwm0_sleep" + +/* Node parent (/pin-controller) identifier: */ +#define DT_N_S_pin_controller_S_pwm0_sleep_PARENT DT_N_S_pin_controller + +/* Node's index in its parent's list of children: */ +#define DT_N_S_pin_controller_S_pwm0_sleep_CHILD_IDX 5 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_pin_controller_S_pwm0_sleep_CHILD_NUM 1 +#define DT_N_S_pin_controller_S_pwm0_sleep_CHILD_NUM_STATUS_OKAY 1 +#define DT_N_S_pin_controller_S_pwm0_sleep_FOREACH_CHILD(fn) fn(DT_N_S_pin_controller_S_pwm0_sleep_S_group1) +#define DT_N_S_pin_controller_S_pwm0_sleep_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_pin_controller_S_pwm0_sleep_S_group1) +#define DT_N_S_pin_controller_S_pwm0_sleep_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_pin_controller_S_pwm0_sleep_S_group1, __VA_ARGS__) +#define DT_N_S_pin_controller_S_pwm0_sleep_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_pin_controller_S_pwm0_sleep_S_group1, __VA_ARGS__) +#define DT_N_S_pin_controller_S_pwm0_sleep_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_pin_controller_S_pwm0_sleep_S_group1) +#define DT_N_S_pin_controller_S_pwm0_sleep_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_pin_controller_S_pwm0_sleep_S_group1) +#define DT_N_S_pin_controller_S_pwm0_sleep_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_pin_controller_S_pwm0_sleep_S_group1, __VA_ARGS__) +#define DT_N_S_pin_controller_S_pwm0_sleep_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_pin_controller_S_pwm0_sleep_S_group1, __VA_ARGS__) + +/* Node's dependency ordinal: */ +#define DT_N_S_pin_controller_S_pwm0_sleep_ORD 27 +#define DT_N_S_pin_controller_S_pwm0_sleep_ORD_STR_SORTABLE 00027 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_pin_controller_S_pwm0_sleep_REQUIRES_ORDS \ + 20, /* /pin-controller */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_pin_controller_S_pwm0_sleep_SUPPORTS_ORDS \ + 28, /* /pin-controller/pwm0_sleep/group1 */ \ + 37, /* /soc/peripheral@50000000/pwm@21000 */ + +/* Existence and alternate IDs: */ +#define DT_N_S_pin_controller_S_pwm0_sleep_EXISTS 1 +#define DT_N_NODELABEL_pwm0_sleep DT_N_S_pin_controller_S_pwm0_sleep + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_pin_controller_S_pwm0_sleep_REG_NUM 0 +#define DT_N_S_pin_controller_S_pwm0_sleep_RANGES_NUM 0 +#define DT_N_S_pin_controller_S_pwm0_sleep_FOREACH_RANGE(fn) +#define DT_N_S_pin_controller_S_pwm0_sleep_IRQ_NUM 0 +#define DT_N_S_pin_controller_S_pwm0_sleep_IRQ_LEVEL 0 +#define DT_N_S_pin_controller_S_pwm0_sleep_STATUS_okay 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_pin_controller_S_pwm0_sleep_PINCTRL_NUM 0 + +/* (No generic property macros) */ + +/* + * Devicetree node: /pin-controller/pwm0_sleep/group1 + * + * Node identifier: DT_N_S_pin_controller_S_pwm0_sleep_S_group1 + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_pin_controller_S_pwm0_sleep_S_group1_PATH "/pin-controller/pwm0_sleep/group1" + +/* Node's name with unit-address: */ +#define DT_N_S_pin_controller_S_pwm0_sleep_S_group1_FULL_NAME "group1" + +/* Node parent (/pin-controller/pwm0_sleep) identifier: */ +#define DT_N_S_pin_controller_S_pwm0_sleep_S_group1_PARENT DT_N_S_pin_controller_S_pwm0_sleep + +/* Node's index in its parent's list of children: */ +#define DT_N_S_pin_controller_S_pwm0_sleep_S_group1_CHILD_IDX 0 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_pin_controller_S_pwm0_sleep_S_group1_CHILD_NUM 0 +#define DT_N_S_pin_controller_S_pwm0_sleep_S_group1_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_pin_controller_S_pwm0_sleep_S_group1_FOREACH_CHILD(fn) +#define DT_N_S_pin_controller_S_pwm0_sleep_S_group1_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_pin_controller_S_pwm0_sleep_S_group1_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_pin_controller_S_pwm0_sleep_S_group1_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_pin_controller_S_pwm0_sleep_S_group1_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_pin_controller_S_pwm0_sleep_S_group1_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_pin_controller_S_pwm0_sleep_S_group1_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_pin_controller_S_pwm0_sleep_S_group1_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's dependency ordinal: */ +#define DT_N_S_pin_controller_S_pwm0_sleep_S_group1_ORD 28 +#define DT_N_S_pin_controller_S_pwm0_sleep_S_group1_ORD_STR_SORTABLE 00028 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_pin_controller_S_pwm0_sleep_S_group1_REQUIRES_ORDS \ + 27, /* /pin-controller/pwm0_sleep */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_pin_controller_S_pwm0_sleep_S_group1_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_pin_controller_S_pwm0_sleep_S_group1_EXISTS 1 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_pin_controller_S_pwm0_sleep_S_group1_REG_NUM 0 +#define DT_N_S_pin_controller_S_pwm0_sleep_S_group1_RANGES_NUM 0 +#define DT_N_S_pin_controller_S_pwm0_sleep_S_group1_FOREACH_RANGE(fn) +#define DT_N_S_pin_controller_S_pwm0_sleep_S_group1_IRQ_NUM 0 +#define DT_N_S_pin_controller_S_pwm0_sleep_S_group1_IRQ_LEVEL 0 +#define DT_N_S_pin_controller_S_pwm0_sleep_S_group1_STATUS_okay 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_pin_controller_S_pwm0_sleep_S_group1_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_pin_controller_S_pwm0_sleep_S_group1_P_bias_disable 0 +#define DT_N_S_pin_controller_S_pwm0_sleep_S_group1_P_bias_disable_EXISTS 1 +#define DT_N_S_pin_controller_S_pwm0_sleep_S_group1_P_bias_pull_up 0 +#define DT_N_S_pin_controller_S_pwm0_sleep_S_group1_P_bias_pull_up_EXISTS 1 +#define DT_N_S_pin_controller_S_pwm0_sleep_S_group1_P_bias_pull_down 0 +#define DT_N_S_pin_controller_S_pwm0_sleep_S_group1_P_bias_pull_down_EXISTS 1 +#define DT_N_S_pin_controller_S_pwm0_sleep_S_group1_P_low_power_enable 1 +#define DT_N_S_pin_controller_S_pwm0_sleep_S_group1_P_low_power_enable_EXISTS 1 +#define DT_N_S_pin_controller_S_pwm0_sleep_S_group1_P_psels {2883609 /* 0x2c0019 */} +#define DT_N_S_pin_controller_S_pwm0_sleep_S_group1_P_psels_IDX_0 2883609 +#define DT_N_S_pin_controller_S_pwm0_sleep_S_group1_P_psels_IDX_0_EXISTS 1 +#define DT_N_S_pin_controller_S_pwm0_sleep_S_group1_P_psels_FOREACH_PROP_ELEM(fn) fn(DT_N_S_pin_controller_S_pwm0_sleep_S_group1, psels, 0) +#define DT_N_S_pin_controller_S_pwm0_sleep_S_group1_P_psels_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_pin_controller_S_pwm0_sleep_S_group1, psels, 0) +#define DT_N_S_pin_controller_S_pwm0_sleep_S_group1_P_psels_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_pin_controller_S_pwm0_sleep_S_group1, psels, 0, __VA_ARGS__) +#define DT_N_S_pin_controller_S_pwm0_sleep_S_group1_P_psels_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_pin_controller_S_pwm0_sleep_S_group1, psels, 0, __VA_ARGS__) +#define DT_N_S_pin_controller_S_pwm0_sleep_S_group1_P_psels_LEN 1 +#define DT_N_S_pin_controller_S_pwm0_sleep_S_group1_P_psels_EXISTS 1 +#define DT_N_S_pin_controller_S_pwm0_sleep_S_group1_P_nordic_drive_mode 0 +#define DT_N_S_pin_controller_S_pwm0_sleep_S_group1_P_nordic_drive_mode_EXISTS 1 +#define DT_N_S_pin_controller_S_pwm0_sleep_S_group1_P_nordic_invert 0 +#define DT_N_S_pin_controller_S_pwm0_sleep_S_group1_P_nordic_invert_EXISTS 1 + +/* + * Devicetree node: /pin-controller/spi3_default + * + * Node identifier: DT_N_S_pin_controller_S_spi3_default + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_pin_controller_S_spi3_default_PATH "/pin-controller/spi3_default" + +/* Node's name with unit-address: */ +#define DT_N_S_pin_controller_S_spi3_default_FULL_NAME "spi3_default" + +/* Node parent (/pin-controller) identifier: */ +#define DT_N_S_pin_controller_S_spi3_default_PARENT DT_N_S_pin_controller + +/* Node's index in its parent's list of children: */ +#define DT_N_S_pin_controller_S_spi3_default_CHILD_IDX 6 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_pin_controller_S_spi3_default_CHILD_NUM 1 +#define DT_N_S_pin_controller_S_spi3_default_CHILD_NUM_STATUS_OKAY 1 +#define DT_N_S_pin_controller_S_spi3_default_FOREACH_CHILD(fn) fn(DT_N_S_pin_controller_S_spi3_default_S_group1) +#define DT_N_S_pin_controller_S_spi3_default_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_pin_controller_S_spi3_default_S_group1) +#define DT_N_S_pin_controller_S_spi3_default_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_pin_controller_S_spi3_default_S_group1, __VA_ARGS__) +#define DT_N_S_pin_controller_S_spi3_default_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_pin_controller_S_spi3_default_S_group1, __VA_ARGS__) +#define DT_N_S_pin_controller_S_spi3_default_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_pin_controller_S_spi3_default_S_group1) +#define DT_N_S_pin_controller_S_spi3_default_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_pin_controller_S_spi3_default_S_group1) +#define DT_N_S_pin_controller_S_spi3_default_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_pin_controller_S_spi3_default_S_group1, __VA_ARGS__) +#define DT_N_S_pin_controller_S_spi3_default_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_pin_controller_S_spi3_default_S_group1, __VA_ARGS__) + +/* Node's dependency ordinal: */ +#define DT_N_S_pin_controller_S_spi3_default_ORD 29 +#define DT_N_S_pin_controller_S_spi3_default_ORD_STR_SORTABLE 00029 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_pin_controller_S_spi3_default_REQUIRES_ORDS \ + 20, /* /pin-controller */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_pin_controller_S_spi3_default_SUPPORTS_ORDS \ + 30, /* /pin-controller/spi3_default/group1 */ \ + 77, /* /soc/peripheral@50000000/spi@b000 */ + +/* Existence and alternate IDs: */ +#define DT_N_S_pin_controller_S_spi3_default_EXISTS 1 +#define DT_N_NODELABEL_spi3_default DT_N_S_pin_controller_S_spi3_default + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_pin_controller_S_spi3_default_REG_NUM 0 +#define DT_N_S_pin_controller_S_spi3_default_RANGES_NUM 0 +#define DT_N_S_pin_controller_S_spi3_default_FOREACH_RANGE(fn) +#define DT_N_S_pin_controller_S_spi3_default_IRQ_NUM 0 +#define DT_N_S_pin_controller_S_spi3_default_IRQ_LEVEL 0 +#define DT_N_S_pin_controller_S_spi3_default_STATUS_okay 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_pin_controller_S_spi3_default_PINCTRL_NUM 0 + +/* (No generic property macros) */ + +/* + * Devicetree node: /pin-controller/spi3_default/group1 + * + * Node identifier: DT_N_S_pin_controller_S_spi3_default_S_group1 + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_pin_controller_S_spi3_default_S_group1_PATH "/pin-controller/spi3_default/group1" + +/* Node's name with unit-address: */ +#define DT_N_S_pin_controller_S_spi3_default_S_group1_FULL_NAME "group1" + +/* Node parent (/pin-controller/spi3_default) identifier: */ +#define DT_N_S_pin_controller_S_spi3_default_S_group1_PARENT DT_N_S_pin_controller_S_spi3_default + +/* Node's index in its parent's list of children: */ +#define DT_N_S_pin_controller_S_spi3_default_S_group1_CHILD_IDX 0 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_pin_controller_S_spi3_default_S_group1_CHILD_NUM 0 +#define DT_N_S_pin_controller_S_spi3_default_S_group1_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_pin_controller_S_spi3_default_S_group1_FOREACH_CHILD(fn) +#define DT_N_S_pin_controller_S_spi3_default_S_group1_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_pin_controller_S_spi3_default_S_group1_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_pin_controller_S_spi3_default_S_group1_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_pin_controller_S_spi3_default_S_group1_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_pin_controller_S_spi3_default_S_group1_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_pin_controller_S_spi3_default_S_group1_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_pin_controller_S_spi3_default_S_group1_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's dependency ordinal: */ +#define DT_N_S_pin_controller_S_spi3_default_S_group1_ORD 30 +#define DT_N_S_pin_controller_S_spi3_default_S_group1_ORD_STR_SORTABLE 00030 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_pin_controller_S_spi3_default_S_group1_REQUIRES_ORDS \ + 29, /* /pin-controller/spi3_default */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_pin_controller_S_spi3_default_S_group1_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_pin_controller_S_spi3_default_S_group1_EXISTS 1 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_pin_controller_S_spi3_default_S_group1_REG_NUM 0 +#define DT_N_S_pin_controller_S_spi3_default_S_group1_RANGES_NUM 0 +#define DT_N_S_pin_controller_S_spi3_default_S_group1_FOREACH_RANGE(fn) +#define DT_N_S_pin_controller_S_spi3_default_S_group1_IRQ_NUM 0 +#define DT_N_S_pin_controller_S_spi3_default_S_group1_IRQ_LEVEL 0 +#define DT_N_S_pin_controller_S_spi3_default_S_group1_STATUS_okay 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_pin_controller_S_spi3_default_S_group1_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_pin_controller_S_spi3_default_S_group1_P_bias_disable 0 +#define DT_N_S_pin_controller_S_spi3_default_S_group1_P_bias_disable_EXISTS 1 +#define DT_N_S_pin_controller_S_spi3_default_S_group1_P_bias_pull_up 0 +#define DT_N_S_pin_controller_S_spi3_default_S_group1_P_bias_pull_up_EXISTS 1 +#define DT_N_S_pin_controller_S_spi3_default_S_group1_P_bias_pull_down 0 +#define DT_N_S_pin_controller_S_spi3_default_S_group1_P_bias_pull_down_EXISTS 1 +#define DT_N_S_pin_controller_S_spi3_default_S_group1_P_low_power_enable 0 +#define DT_N_S_pin_controller_S_spi3_default_S_group1_P_low_power_enable_EXISTS 1 +#define DT_N_S_pin_controller_S_spi3_default_S_group1_P_psels {524301 /* 0x8000d */, 655374 /* 0xa000e */, 786447 /* 0xc000f */} +#define DT_N_S_pin_controller_S_spi3_default_S_group1_P_psels_IDX_0 524301 +#define DT_N_S_pin_controller_S_spi3_default_S_group1_P_psels_IDX_0_EXISTS 1 +#define DT_N_S_pin_controller_S_spi3_default_S_group1_P_psels_IDX_1 655374 +#define DT_N_S_pin_controller_S_spi3_default_S_group1_P_psels_IDX_1_EXISTS 1 +#define DT_N_S_pin_controller_S_spi3_default_S_group1_P_psels_IDX_2 786447 +#define DT_N_S_pin_controller_S_spi3_default_S_group1_P_psels_IDX_2_EXISTS 1 +#define DT_N_S_pin_controller_S_spi3_default_S_group1_P_psels_FOREACH_PROP_ELEM(fn) fn(DT_N_S_pin_controller_S_spi3_default_S_group1, psels, 0) \ + fn(DT_N_S_pin_controller_S_spi3_default_S_group1, psels, 1) \ + fn(DT_N_S_pin_controller_S_spi3_default_S_group1, psels, 2) +#define DT_N_S_pin_controller_S_spi3_default_S_group1_P_psels_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_pin_controller_S_spi3_default_S_group1, psels, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_pin_controller_S_spi3_default_S_group1, psels, 1) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_pin_controller_S_spi3_default_S_group1, psels, 2) +#define DT_N_S_pin_controller_S_spi3_default_S_group1_P_psels_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_pin_controller_S_spi3_default_S_group1, psels, 0, __VA_ARGS__) \ + fn(DT_N_S_pin_controller_S_spi3_default_S_group1, psels, 1, __VA_ARGS__) \ + fn(DT_N_S_pin_controller_S_spi3_default_S_group1, psels, 2, __VA_ARGS__) +#define DT_N_S_pin_controller_S_spi3_default_S_group1_P_psels_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_pin_controller_S_spi3_default_S_group1, psels, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_pin_controller_S_spi3_default_S_group1, psels, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_pin_controller_S_spi3_default_S_group1, psels, 2, __VA_ARGS__) +#define DT_N_S_pin_controller_S_spi3_default_S_group1_P_psels_LEN 3 +#define DT_N_S_pin_controller_S_spi3_default_S_group1_P_psels_EXISTS 1 +#define DT_N_S_pin_controller_S_spi3_default_S_group1_P_nordic_drive_mode 0 +#define DT_N_S_pin_controller_S_spi3_default_S_group1_P_nordic_drive_mode_EXISTS 1 +#define DT_N_S_pin_controller_S_spi3_default_S_group1_P_nordic_invert 0 +#define DT_N_S_pin_controller_S_spi3_default_S_group1_P_nordic_invert_EXISTS 1 + +/* + * Devicetree node: /pin-controller/spi3_sleep + * + * Node identifier: DT_N_S_pin_controller_S_spi3_sleep + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_pin_controller_S_spi3_sleep_PATH "/pin-controller/spi3_sleep" + +/* Node's name with unit-address: */ +#define DT_N_S_pin_controller_S_spi3_sleep_FULL_NAME "spi3_sleep" + +/* Node parent (/pin-controller) identifier: */ +#define DT_N_S_pin_controller_S_spi3_sleep_PARENT DT_N_S_pin_controller + +/* Node's index in its parent's list of children: */ +#define DT_N_S_pin_controller_S_spi3_sleep_CHILD_IDX 7 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_pin_controller_S_spi3_sleep_CHILD_NUM 1 +#define DT_N_S_pin_controller_S_spi3_sleep_CHILD_NUM_STATUS_OKAY 1 +#define DT_N_S_pin_controller_S_spi3_sleep_FOREACH_CHILD(fn) fn(DT_N_S_pin_controller_S_spi3_sleep_S_group1) +#define DT_N_S_pin_controller_S_spi3_sleep_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_pin_controller_S_spi3_sleep_S_group1) +#define DT_N_S_pin_controller_S_spi3_sleep_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_pin_controller_S_spi3_sleep_S_group1, __VA_ARGS__) +#define DT_N_S_pin_controller_S_spi3_sleep_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_pin_controller_S_spi3_sleep_S_group1, __VA_ARGS__) +#define DT_N_S_pin_controller_S_spi3_sleep_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_pin_controller_S_spi3_sleep_S_group1) +#define DT_N_S_pin_controller_S_spi3_sleep_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_pin_controller_S_spi3_sleep_S_group1) +#define DT_N_S_pin_controller_S_spi3_sleep_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_pin_controller_S_spi3_sleep_S_group1, __VA_ARGS__) +#define DT_N_S_pin_controller_S_spi3_sleep_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_pin_controller_S_spi3_sleep_S_group1, __VA_ARGS__) + +/* Node's dependency ordinal: */ +#define DT_N_S_pin_controller_S_spi3_sleep_ORD 31 +#define DT_N_S_pin_controller_S_spi3_sleep_ORD_STR_SORTABLE 00031 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_pin_controller_S_spi3_sleep_REQUIRES_ORDS \ + 20, /* /pin-controller */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_pin_controller_S_spi3_sleep_SUPPORTS_ORDS \ + 32, /* /pin-controller/spi3_sleep/group1 */ \ + 77, /* /soc/peripheral@50000000/spi@b000 */ + +/* Existence and alternate IDs: */ +#define DT_N_S_pin_controller_S_spi3_sleep_EXISTS 1 +#define DT_N_NODELABEL_spi3_sleep DT_N_S_pin_controller_S_spi3_sleep + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_pin_controller_S_spi3_sleep_REG_NUM 0 +#define DT_N_S_pin_controller_S_spi3_sleep_RANGES_NUM 0 +#define DT_N_S_pin_controller_S_spi3_sleep_FOREACH_RANGE(fn) +#define DT_N_S_pin_controller_S_spi3_sleep_IRQ_NUM 0 +#define DT_N_S_pin_controller_S_spi3_sleep_IRQ_LEVEL 0 +#define DT_N_S_pin_controller_S_spi3_sleep_STATUS_okay 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_pin_controller_S_spi3_sleep_PINCTRL_NUM 0 + +/* (No generic property macros) */ + +/* + * Devicetree node: /pin-controller/spi3_sleep/group1 + * + * Node identifier: DT_N_S_pin_controller_S_spi3_sleep_S_group1 + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_PATH "/pin-controller/spi3_sleep/group1" + +/* Node's name with unit-address: */ +#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_FULL_NAME "group1" + +/* Node parent (/pin-controller/spi3_sleep) identifier: */ +#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_PARENT DT_N_S_pin_controller_S_spi3_sleep + +/* Node's index in its parent's list of children: */ +#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_CHILD_IDX 0 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_CHILD_NUM 0 +#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_FOREACH_CHILD(fn) +#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's dependency ordinal: */ +#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_ORD 32 +#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_ORD_STR_SORTABLE 00032 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_REQUIRES_ORDS \ + 31, /* /pin-controller/spi3_sleep */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_EXISTS 1 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_REG_NUM 0 +#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_RANGES_NUM 0 +#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_FOREACH_RANGE(fn) +#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_IRQ_NUM 0 +#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_IRQ_LEVEL 0 +#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_STATUS_okay 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_P_bias_disable 0 +#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_P_bias_disable_EXISTS 1 +#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_P_bias_pull_up 0 +#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_P_bias_pull_up_EXISTS 1 +#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_P_bias_pull_down 0 +#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_P_bias_pull_down_EXISTS 1 +#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_P_low_power_enable 1 +#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_P_low_power_enable_EXISTS 1 +#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_P_psels {524301 /* 0x8000d */, 655374 /* 0xa000e */, 786447 /* 0xc000f */} +#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_P_psels_IDX_0 524301 +#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_P_psels_IDX_0_EXISTS 1 +#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_P_psels_IDX_1 655374 +#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_P_psels_IDX_1_EXISTS 1 +#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_P_psels_IDX_2 786447 +#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_P_psels_IDX_2_EXISTS 1 +#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_P_psels_FOREACH_PROP_ELEM(fn) fn(DT_N_S_pin_controller_S_spi3_sleep_S_group1, psels, 0) \ + fn(DT_N_S_pin_controller_S_spi3_sleep_S_group1, psels, 1) \ + fn(DT_N_S_pin_controller_S_spi3_sleep_S_group1, psels, 2) +#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_P_psels_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_pin_controller_S_spi3_sleep_S_group1, psels, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_pin_controller_S_spi3_sleep_S_group1, psels, 1) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_pin_controller_S_spi3_sleep_S_group1, psels, 2) +#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_P_psels_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_pin_controller_S_spi3_sleep_S_group1, psels, 0, __VA_ARGS__) \ + fn(DT_N_S_pin_controller_S_spi3_sleep_S_group1, psels, 1, __VA_ARGS__) \ + fn(DT_N_S_pin_controller_S_spi3_sleep_S_group1, psels, 2, __VA_ARGS__) +#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_P_psels_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_pin_controller_S_spi3_sleep_S_group1, psels, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_pin_controller_S_spi3_sleep_S_group1, psels, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_pin_controller_S_spi3_sleep_S_group1, psels, 2, __VA_ARGS__) +#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_P_psels_LEN 3 +#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_P_psels_EXISTS 1 +#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_P_nordic_drive_mode 0 +#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_P_nordic_drive_mode_EXISTS 1 +#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_P_nordic_invert 0 +#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_P_nordic_invert_EXISTS 1 + +/* + * Devicetree node: /pin-controller/uart0_default + * + * Node identifier: DT_N_S_pin_controller_S_uart0_default + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_pin_controller_S_uart0_default_PATH "/pin-controller/uart0_default" + +/* Node's name with unit-address: */ +#define DT_N_S_pin_controller_S_uart0_default_FULL_NAME "uart0_default" + +/* Node parent (/pin-controller) identifier: */ +#define DT_N_S_pin_controller_S_uart0_default_PARENT DT_N_S_pin_controller + +/* Node's index in its parent's list of children: */ +#define DT_N_S_pin_controller_S_uart0_default_CHILD_IDX 0 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_pin_controller_S_uart0_default_CHILD_NUM 1 +#define DT_N_S_pin_controller_S_uart0_default_CHILD_NUM_STATUS_OKAY 1 +#define DT_N_S_pin_controller_S_uart0_default_FOREACH_CHILD(fn) fn(DT_N_S_pin_controller_S_uart0_default_S_group1) +#define DT_N_S_pin_controller_S_uart0_default_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_pin_controller_S_uart0_default_S_group1) +#define DT_N_S_pin_controller_S_uart0_default_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_pin_controller_S_uart0_default_S_group1, __VA_ARGS__) +#define DT_N_S_pin_controller_S_uart0_default_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_pin_controller_S_uart0_default_S_group1, __VA_ARGS__) +#define DT_N_S_pin_controller_S_uart0_default_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_pin_controller_S_uart0_default_S_group1) +#define DT_N_S_pin_controller_S_uart0_default_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_pin_controller_S_uart0_default_S_group1) +#define DT_N_S_pin_controller_S_uart0_default_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_pin_controller_S_uart0_default_S_group1, __VA_ARGS__) +#define DT_N_S_pin_controller_S_uart0_default_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_pin_controller_S_uart0_default_S_group1, __VA_ARGS__) + +/* Node's dependency ordinal: */ +#define DT_N_S_pin_controller_S_uart0_default_ORD 33 +#define DT_N_S_pin_controller_S_uart0_default_ORD_STR_SORTABLE 00033 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_pin_controller_S_uart0_default_REQUIRES_ORDS \ + 20, /* /pin-controller */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_pin_controller_S_uart0_default_SUPPORTS_ORDS \ + 34, /* /pin-controller/uart0_default/group1 */ \ + 80, /* /soc/peripheral@50000000/uart@8000 */ + +/* Existence and alternate IDs: */ +#define DT_N_S_pin_controller_S_uart0_default_EXISTS 1 +#define DT_N_NODELABEL_uart0_default DT_N_S_pin_controller_S_uart0_default + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_pin_controller_S_uart0_default_REG_NUM 0 +#define DT_N_S_pin_controller_S_uart0_default_RANGES_NUM 0 +#define DT_N_S_pin_controller_S_uart0_default_FOREACH_RANGE(fn) +#define DT_N_S_pin_controller_S_uart0_default_IRQ_NUM 0 +#define DT_N_S_pin_controller_S_uart0_default_IRQ_LEVEL 0 +#define DT_N_S_pin_controller_S_uart0_default_STATUS_okay 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_pin_controller_S_uart0_default_PINCTRL_NUM 0 + +/* (No generic property macros) */ + +/* + * Devicetree node: /pin-controller/uart0_default/group1 + * + * Node identifier: DT_N_S_pin_controller_S_uart0_default_S_group1 + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_pin_controller_S_uart0_default_S_group1_PATH "/pin-controller/uart0_default/group1" + +/* Node's name with unit-address: */ +#define DT_N_S_pin_controller_S_uart0_default_S_group1_FULL_NAME "group1" + +/* Node parent (/pin-controller/uart0_default) identifier: */ +#define DT_N_S_pin_controller_S_uart0_default_S_group1_PARENT DT_N_S_pin_controller_S_uart0_default + +/* Node's index in its parent's list of children: */ +#define DT_N_S_pin_controller_S_uart0_default_S_group1_CHILD_IDX 0 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_pin_controller_S_uart0_default_S_group1_CHILD_NUM 0 +#define DT_N_S_pin_controller_S_uart0_default_S_group1_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_pin_controller_S_uart0_default_S_group1_FOREACH_CHILD(fn) +#define DT_N_S_pin_controller_S_uart0_default_S_group1_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_pin_controller_S_uart0_default_S_group1_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_pin_controller_S_uart0_default_S_group1_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_pin_controller_S_uart0_default_S_group1_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_pin_controller_S_uart0_default_S_group1_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_pin_controller_S_uart0_default_S_group1_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_pin_controller_S_uart0_default_S_group1_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's dependency ordinal: */ +#define DT_N_S_pin_controller_S_uart0_default_S_group1_ORD 34 +#define DT_N_S_pin_controller_S_uart0_default_S_group1_ORD_STR_SORTABLE 00034 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_pin_controller_S_uart0_default_S_group1_REQUIRES_ORDS \ + 33, /* /pin-controller/uart0_default */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_pin_controller_S_uart0_default_S_group1_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_pin_controller_S_uart0_default_S_group1_EXISTS 1 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_pin_controller_S_uart0_default_S_group1_REG_NUM 0 +#define DT_N_S_pin_controller_S_uart0_default_S_group1_RANGES_NUM 0 +#define DT_N_S_pin_controller_S_uart0_default_S_group1_FOREACH_RANGE(fn) +#define DT_N_S_pin_controller_S_uart0_default_S_group1_IRQ_NUM 0 +#define DT_N_S_pin_controller_S_uart0_default_S_group1_IRQ_LEVEL 0 +#define DT_N_S_pin_controller_S_uart0_default_S_group1_STATUS_okay 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_pin_controller_S_uart0_default_S_group1_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_pin_controller_S_uart0_default_S_group1_P_bias_disable 0 +#define DT_N_S_pin_controller_S_uart0_default_S_group1_P_bias_disable_EXISTS 1 +#define DT_N_S_pin_controller_S_uart0_default_S_group1_P_bias_pull_up 0 +#define DT_N_S_pin_controller_S_uart0_default_S_group1_P_bias_pull_up_EXISTS 1 +#define DT_N_S_pin_controller_S_uart0_default_S_group1_P_bias_pull_down 0 +#define DT_N_S_pin_controller_S_uart0_default_S_group1_P_bias_pull_down_EXISTS 1 +#define DT_N_S_pin_controller_S_uart0_default_S_group1_P_low_power_enable 0 +#define DT_N_S_pin_controller_S_uart0_default_S_group1_P_low_power_enable_EXISTS 1 +#define DT_N_S_pin_controller_S_uart0_default_S_group1_P_psels {28 /* 0x1c */, 131099 /* 0x2001b */} +#define DT_N_S_pin_controller_S_uart0_default_S_group1_P_psels_IDX_0 28 +#define DT_N_S_pin_controller_S_uart0_default_S_group1_P_psels_IDX_0_EXISTS 1 +#define DT_N_S_pin_controller_S_uart0_default_S_group1_P_psels_IDX_1 131099 +#define DT_N_S_pin_controller_S_uart0_default_S_group1_P_psels_IDX_1_EXISTS 1 +#define DT_N_S_pin_controller_S_uart0_default_S_group1_P_psels_FOREACH_PROP_ELEM(fn) fn(DT_N_S_pin_controller_S_uart0_default_S_group1, psels, 0) \ + fn(DT_N_S_pin_controller_S_uart0_default_S_group1, psels, 1) +#define DT_N_S_pin_controller_S_uart0_default_S_group1_P_psels_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_pin_controller_S_uart0_default_S_group1, psels, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_pin_controller_S_uart0_default_S_group1, psels, 1) +#define DT_N_S_pin_controller_S_uart0_default_S_group1_P_psels_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_pin_controller_S_uart0_default_S_group1, psels, 0, __VA_ARGS__) \ + fn(DT_N_S_pin_controller_S_uart0_default_S_group1, psels, 1, __VA_ARGS__) +#define DT_N_S_pin_controller_S_uart0_default_S_group1_P_psels_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_pin_controller_S_uart0_default_S_group1, psels, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_pin_controller_S_uart0_default_S_group1, psels, 1, __VA_ARGS__) +#define DT_N_S_pin_controller_S_uart0_default_S_group1_P_psels_LEN 2 +#define DT_N_S_pin_controller_S_uart0_default_S_group1_P_psels_EXISTS 1 +#define DT_N_S_pin_controller_S_uart0_default_S_group1_P_nordic_drive_mode 0 +#define DT_N_S_pin_controller_S_uart0_default_S_group1_P_nordic_drive_mode_EXISTS 1 +#define DT_N_S_pin_controller_S_uart0_default_S_group1_P_nordic_invert 0 +#define DT_N_S_pin_controller_S_uart0_default_S_group1_P_nordic_invert_EXISTS 1 + +/* + * Devicetree node: /pin-controller/uart0_sleep + * + * Node identifier: DT_N_S_pin_controller_S_uart0_sleep + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_pin_controller_S_uart0_sleep_PATH "/pin-controller/uart0_sleep" + +/* Node's name with unit-address: */ +#define DT_N_S_pin_controller_S_uart0_sleep_FULL_NAME "uart0_sleep" + +/* Node parent (/pin-controller) identifier: */ +#define DT_N_S_pin_controller_S_uart0_sleep_PARENT DT_N_S_pin_controller + +/* Node's index in its parent's list of children: */ +#define DT_N_S_pin_controller_S_uart0_sleep_CHILD_IDX 1 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_pin_controller_S_uart0_sleep_CHILD_NUM 1 +#define DT_N_S_pin_controller_S_uart0_sleep_CHILD_NUM_STATUS_OKAY 1 +#define DT_N_S_pin_controller_S_uart0_sleep_FOREACH_CHILD(fn) fn(DT_N_S_pin_controller_S_uart0_sleep_S_group1) +#define DT_N_S_pin_controller_S_uart0_sleep_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_pin_controller_S_uart0_sleep_S_group1) +#define DT_N_S_pin_controller_S_uart0_sleep_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_pin_controller_S_uart0_sleep_S_group1, __VA_ARGS__) +#define DT_N_S_pin_controller_S_uart0_sleep_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_pin_controller_S_uart0_sleep_S_group1, __VA_ARGS__) +#define DT_N_S_pin_controller_S_uart0_sleep_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_pin_controller_S_uart0_sleep_S_group1) +#define DT_N_S_pin_controller_S_uart0_sleep_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_pin_controller_S_uart0_sleep_S_group1) +#define DT_N_S_pin_controller_S_uart0_sleep_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_pin_controller_S_uart0_sleep_S_group1, __VA_ARGS__) +#define DT_N_S_pin_controller_S_uart0_sleep_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_pin_controller_S_uart0_sleep_S_group1, __VA_ARGS__) + +/* Node's dependency ordinal: */ +#define DT_N_S_pin_controller_S_uart0_sleep_ORD 35 +#define DT_N_S_pin_controller_S_uart0_sleep_ORD_STR_SORTABLE 00035 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_pin_controller_S_uart0_sleep_REQUIRES_ORDS \ + 20, /* /pin-controller */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_pin_controller_S_uart0_sleep_SUPPORTS_ORDS \ + 36, /* /pin-controller/uart0_sleep/group1 */ \ + 80, /* /soc/peripheral@50000000/uart@8000 */ + +/* Existence and alternate IDs: */ +#define DT_N_S_pin_controller_S_uart0_sleep_EXISTS 1 +#define DT_N_NODELABEL_uart0_sleep DT_N_S_pin_controller_S_uart0_sleep + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_pin_controller_S_uart0_sleep_REG_NUM 0 +#define DT_N_S_pin_controller_S_uart0_sleep_RANGES_NUM 0 +#define DT_N_S_pin_controller_S_uart0_sleep_FOREACH_RANGE(fn) +#define DT_N_S_pin_controller_S_uart0_sleep_IRQ_NUM 0 +#define DT_N_S_pin_controller_S_uart0_sleep_IRQ_LEVEL 0 +#define DT_N_S_pin_controller_S_uart0_sleep_STATUS_okay 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_pin_controller_S_uart0_sleep_PINCTRL_NUM 0 + +/* (No generic property macros) */ + +/* + * Devicetree node: /pin-controller/uart0_sleep/group1 + * + * Node identifier: DT_N_S_pin_controller_S_uart0_sleep_S_group1 + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_PATH "/pin-controller/uart0_sleep/group1" + +/* Node's name with unit-address: */ +#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_FULL_NAME "group1" + +/* Node parent (/pin-controller/uart0_sleep) identifier: */ +#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_PARENT DT_N_S_pin_controller_S_uart0_sleep + +/* Node's index in its parent's list of children: */ +#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_CHILD_IDX 0 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_CHILD_NUM 0 +#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_FOREACH_CHILD(fn) +#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's dependency ordinal: */ +#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_ORD 36 +#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_ORD_STR_SORTABLE 00036 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_REQUIRES_ORDS \ + 35, /* /pin-controller/uart0_sleep */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_EXISTS 1 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_REG_NUM 0 +#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_RANGES_NUM 0 +#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_FOREACH_RANGE(fn) +#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_IRQ_NUM 0 +#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_IRQ_LEVEL 0 +#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_STATUS_okay 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_P_bias_disable 0 +#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_P_bias_disable_EXISTS 1 +#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_P_bias_pull_up 0 +#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_P_bias_pull_up_EXISTS 1 +#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_P_bias_pull_down 0 +#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_P_bias_pull_down_EXISTS 1 +#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_P_low_power_enable 1 +#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_P_low_power_enable_EXISTS 1 +#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_P_psels {28 /* 0x1c */, 131099 /* 0x2001b */} +#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_P_psels_IDX_0 28 +#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_P_psels_IDX_0_EXISTS 1 +#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_P_psels_IDX_1 131099 +#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_P_psels_IDX_1_EXISTS 1 +#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_P_psels_FOREACH_PROP_ELEM(fn) fn(DT_N_S_pin_controller_S_uart0_sleep_S_group1, psels, 0) \ + fn(DT_N_S_pin_controller_S_uart0_sleep_S_group1, psels, 1) +#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_P_psels_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_pin_controller_S_uart0_sleep_S_group1, psels, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_pin_controller_S_uart0_sleep_S_group1, psels, 1) +#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_P_psels_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_pin_controller_S_uart0_sleep_S_group1, psels, 0, __VA_ARGS__) \ + fn(DT_N_S_pin_controller_S_uart0_sleep_S_group1, psels, 1, __VA_ARGS__) +#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_P_psels_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_pin_controller_S_uart0_sleep_S_group1, psels, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_pin_controller_S_uart0_sleep_S_group1, psels, 1, __VA_ARGS__) +#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_P_psels_LEN 2 +#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_P_psels_EXISTS 1 +#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_P_nordic_drive_mode 0 +#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_P_nordic_drive_mode_EXISTS 1 +#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_P_nordic_invert 0 +#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_P_nordic_invert_EXISTS 1 + +/* + * Devicetree node: /soc/peripheral@50000000/pwm@21000 + * + * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_pwm_21000 + * + * Binding (compatible = nordic,nrf-pwm): + * $ZEPHYR_BASE/dts/bindings/pwm/nordic,nrf-pwm.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_PATH "/soc/peripheral@50000000/pwm@21000" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_FULL_NAME "pwm@21000" + +/* Node parent (/soc/peripheral@50000000) identifier: */ +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_PARENT DT_N_S_soc_S_peripheral_50000000 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_CHILD_IDX 27 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_CHILD_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_ORD 37 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_ORD_STR_SORTABLE 00037 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_REQUIRES_ORDS \ + 6, /* /soc/interrupt-controller@e000e100 */ \ + 8, /* /soc/peripheral@50000000 */ \ + 25, /* /pin-controller/pwm0_default */ \ + 27, /* /pin-controller/pwm0_sleep */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_SUPPORTS_ORDS \ + 38, /* /pwmleds */ \ + 39, /* /pwmleds/pwm_led_0 */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_EXISTS 1 +#define DT_N_INST_0_nordic_nrf_pwm DT_N_S_soc_S_peripheral_50000000_S_pwm_21000 +#define DT_N_NODELABEL_pwm0 DT_N_S_soc_S_peripheral_50000000_S_pwm_21000 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_REG_NUM 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_REG_IDX_0_VAL_ADDRESS 1342312448 /* 0x50021000 */ +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */ +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_RANGES_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_IRQ_NUM 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_IRQ_IDX_0_VAL_irq 33 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_IRQ_IDX_0_VAL_priority 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_IRQ_LEVEL 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_COMPAT_MATCHES_nordic_nrf_pwm 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor" +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_COMPAT_MODEL_IDX_0 "nrf-pwm" +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_STATUS_okay 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_PINCTRL_NUM 2 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_PINCTRL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_PINCTRL_IDX_0_TOKEN default +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_PINCTRL_IDX_0_UPPER_TOKEN DEFAULT +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_PINCTRL_NAME_default_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_PINCTRL_NAME_default_IDX 0 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_PINCTRL_NAME_default_IDX_0_PH DT_N_S_pin_controller_S_pwm0_default +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_PINCTRL_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_PINCTRL_IDX_1_TOKEN sleep +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_PINCTRL_IDX_1_UPPER_TOKEN SLEEP +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_PINCTRL_NAME_sleep_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_PINCTRL_NAME_sleep_IDX 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_PINCTRL_NAME_sleep_IDX_0_PH DT_N_S_pin_controller_S_pwm0_sleep + +/* Generic property macros: */ +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_wakeup_source 0 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_status "okay" +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_status_STRING_UNQUOTED okay +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_status_STRING_TOKEN okay +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_status_STRING_UPPER_TOKEN OKAY +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_status_IDX_0 "okay" +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_status_ENUM_IDX 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_status_ENUM_VAL_okay_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_status_ENUM_TOKEN okay +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_status_ENUM_UPPER_TOKEN OKAY +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_21000, status, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_21000, status, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_21000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_21000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_status_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_status_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_compatible {"nordic,nrf-pwm"} +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_compatible_IDX_0 "nordic,nrf-pwm" +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-pwm +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_pwm +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_PWM +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_21000, compatible, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_21000, compatible, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_21000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_21000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_compatible_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_reg {135168 /* 0x21000 */, 4096 /* 0x1000 */} +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_reg_IDX_0 135168 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_reg_IDX_1 4096 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_reg_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_interrupts {33 /* 0x21 */, 1 /* 0x1 */} +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_interrupts_IDX_0 33 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_interrupts_IDX_1 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_pinctrl_0_IDX_0 DT_N_S_pin_controller_S_pwm0_default +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_pinctrl_0_IDX_0_PH DT_N_S_pin_controller_S_pwm0_default +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_pinctrl_0_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_pinctrl_0_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_21000, pinctrl_0, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_pinctrl_0_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_21000, pinctrl_0, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_pinctrl_0_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_21000, pinctrl_0, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_pinctrl_0_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_21000, pinctrl_0, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_pinctrl_0_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_pinctrl_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_pinctrl_1_IDX_0 DT_N_S_pin_controller_S_pwm0_sleep +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_pinctrl_1_IDX_0_PH DT_N_S_pin_controller_S_pwm0_sleep +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_pinctrl_1_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_pinctrl_1_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_21000, pinctrl_1, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_pinctrl_1_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_21000, pinctrl_1, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_pinctrl_1_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_21000, pinctrl_1, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_pinctrl_1_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_21000, pinctrl_1, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_pinctrl_1_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_pinctrl_1_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_pinctrl_names {"default", "sleep"} +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_pinctrl_names_IDX_0 "default" +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_pinctrl_names_IDX_0_STRING_UNQUOTED default +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_pinctrl_names_IDX_0_STRING_TOKEN default +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_pinctrl_names_IDX_0_STRING_UPPER_TOKEN DEFAULT +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_pinctrl_names_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_pinctrl_names_IDX_1 "sleep" +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_pinctrl_names_IDX_1_STRING_UNQUOTED sleep +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_pinctrl_names_IDX_1_STRING_TOKEN sleep +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_pinctrl_names_IDX_1_STRING_UPPER_TOKEN SLEEP +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_pinctrl_names_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_pinctrl_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_21000, pinctrl_names, 0) \ + fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_21000, pinctrl_names, 1) +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_pinctrl_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_21000, pinctrl_names, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_21000, pinctrl_names, 1) +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_pinctrl_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_21000, pinctrl_names, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_21000, pinctrl_names, 1, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_pinctrl_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_21000, pinctrl_names, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_21000, pinctrl_names, 1, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_pinctrl_names_LEN 2 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_pinctrl_names_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_center_aligned 0 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_center_aligned_EXISTS 1 + +/* + * Devicetree node: /pwmleds + * + * Node identifier: DT_N_S_pwmleds + * + * Binding (compatible = pwm-leds): + * $ZEPHYR_BASE/dts/bindings/led/pwm-leds.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_pwmleds_PATH "/pwmleds" + +/* Node's name with unit-address: */ +#define DT_N_S_pwmleds_FULL_NAME "pwmleds" + +/* Node parent (/) identifier: */ +#define DT_N_S_pwmleds_PARENT DT_N + +/* Node's index in its parent's list of children: */ +#define DT_N_S_pwmleds_CHILD_IDX 8 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_pwmleds_CHILD_NUM 1 +#define DT_N_S_pwmleds_CHILD_NUM_STATUS_OKAY 1 +#define DT_N_S_pwmleds_FOREACH_CHILD(fn) fn(DT_N_S_pwmleds_S_pwm_led_0) +#define DT_N_S_pwmleds_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_pwmleds_S_pwm_led_0) +#define DT_N_S_pwmleds_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_pwmleds_S_pwm_led_0, __VA_ARGS__) +#define DT_N_S_pwmleds_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_pwmleds_S_pwm_led_0, __VA_ARGS__) +#define DT_N_S_pwmleds_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_pwmleds_S_pwm_led_0) +#define DT_N_S_pwmleds_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_pwmleds_S_pwm_led_0) +#define DT_N_S_pwmleds_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_pwmleds_S_pwm_led_0, __VA_ARGS__) +#define DT_N_S_pwmleds_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_pwmleds_S_pwm_led_0, __VA_ARGS__) + +/* Node's dependency ordinal: */ +#define DT_N_S_pwmleds_ORD 38 +#define DT_N_S_pwmleds_ORD_STR_SORTABLE 00038 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_pwmleds_REQUIRES_ORDS \ + 0, /* / */ \ + 37, /* /soc/peripheral@50000000/pwm@21000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_pwmleds_SUPPORTS_ORDS \ + 39, /* /pwmleds/pwm_led_0 */ + +/* Existence and alternate IDs: */ +#define DT_N_S_pwmleds_EXISTS 1 +#define DT_N_INST_0_pwm_leds DT_N_S_pwmleds + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_pwmleds_REG_NUM 0 +#define DT_N_S_pwmleds_RANGES_NUM 0 +#define DT_N_S_pwmleds_FOREACH_RANGE(fn) +#define DT_N_S_pwmleds_IRQ_NUM 0 +#define DT_N_S_pwmleds_IRQ_LEVEL 0 +#define DT_N_S_pwmleds_COMPAT_MATCHES_pwm_leds 1 +#define DT_N_S_pwmleds_STATUS_okay 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_pwmleds_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_pwmleds_P_compatible {"pwm-leds"} +#define DT_N_S_pwmleds_P_compatible_IDX_0 "pwm-leds" +#define DT_N_S_pwmleds_P_compatible_IDX_0_STRING_UNQUOTED pwm-leds +#define DT_N_S_pwmleds_P_compatible_IDX_0_STRING_TOKEN pwm_leds +#define DT_N_S_pwmleds_P_compatible_IDX_0_STRING_UPPER_TOKEN PWM_LEDS +#define DT_N_S_pwmleds_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_pwmleds_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_pwmleds, compatible, 0) +#define DT_N_S_pwmleds_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_pwmleds, compatible, 0) +#define DT_N_S_pwmleds_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_pwmleds, compatible, 0, __VA_ARGS__) +#define DT_N_S_pwmleds_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_pwmleds, compatible, 0, __VA_ARGS__) +#define DT_N_S_pwmleds_P_compatible_LEN 1 +#define DT_N_S_pwmleds_P_compatible_EXISTS 1 + +/* + * Devicetree node: /pwmleds/pwm_led_0 + * + * Node identifier: DT_N_S_pwmleds_S_pwm_led_0 + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_pwmleds_S_pwm_led_0_PATH "/pwmleds/pwm_led_0" + +/* Node's name with unit-address: */ +#define DT_N_S_pwmleds_S_pwm_led_0_FULL_NAME "pwm_led_0" + +/* Node parent (/pwmleds) identifier: */ +#define DT_N_S_pwmleds_S_pwm_led_0_PARENT DT_N_S_pwmleds + +/* Node's index in its parent's list of children: */ +#define DT_N_S_pwmleds_S_pwm_led_0_CHILD_IDX 0 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_pwmleds_S_pwm_led_0_CHILD_NUM 0 +#define DT_N_S_pwmleds_S_pwm_led_0_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_pwmleds_S_pwm_led_0_FOREACH_CHILD(fn) +#define DT_N_S_pwmleds_S_pwm_led_0_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_pwmleds_S_pwm_led_0_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_pwmleds_S_pwm_led_0_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_pwmleds_S_pwm_led_0_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_pwmleds_S_pwm_led_0_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_pwmleds_S_pwm_led_0_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_pwmleds_S_pwm_led_0_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's dependency ordinal: */ +#define DT_N_S_pwmleds_S_pwm_led_0_ORD 39 +#define DT_N_S_pwmleds_S_pwm_led_0_ORD_STR_SORTABLE 00039 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_pwmleds_S_pwm_led_0_REQUIRES_ORDS \ + 37, /* /soc/peripheral@50000000/pwm@21000 */ \ + 38, /* /pwmleds */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_pwmleds_S_pwm_led_0_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_pwmleds_S_pwm_led_0_EXISTS 1 +#define DT_N_ALIAS_pwm_led0 DT_N_S_pwmleds_S_pwm_led_0 +#define DT_N_NODELABEL_pwm_led0 DT_N_S_pwmleds_S_pwm_led_0 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_pwmleds_S_pwm_led_0_REG_NUM 0 +#define DT_N_S_pwmleds_S_pwm_led_0_RANGES_NUM 0 +#define DT_N_S_pwmleds_S_pwm_led_0_FOREACH_RANGE(fn) +#define DT_N_S_pwmleds_S_pwm_led_0_IRQ_NUM 0 +#define DT_N_S_pwmleds_S_pwm_led_0_IRQ_LEVEL 0 +#define DT_N_S_pwmleds_S_pwm_led_0_STATUS_okay 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_pwmleds_S_pwm_led_0_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_pwmleds_S_pwm_led_0_P_pwms_IDX_0_EXISTS 1 +#define DT_N_S_pwmleds_S_pwm_led_0_P_pwms_IDX_0_PH DT_N_S_soc_S_peripheral_50000000_S_pwm_21000 +#define DT_N_S_pwmleds_S_pwm_led_0_P_pwms_IDX_0_VAL_channel 0 +#define DT_N_S_pwmleds_S_pwm_led_0_P_pwms_IDX_0_VAL_channel_EXISTS 1 +#define DT_N_S_pwmleds_S_pwm_led_0_P_pwms_IDX_0_VAL_period 20000000 +#define DT_N_S_pwmleds_S_pwm_led_0_P_pwms_IDX_0_VAL_period_EXISTS 1 +#define DT_N_S_pwmleds_S_pwm_led_0_P_pwms_IDX_0_VAL_flags 0 +#define DT_N_S_pwmleds_S_pwm_led_0_P_pwms_IDX_0_VAL_flags_EXISTS 1 +#define DT_N_S_pwmleds_S_pwm_led_0_P_pwms_FOREACH_PROP_ELEM(fn) fn(DT_N_S_pwmleds_S_pwm_led_0, pwms, 0) +#define DT_N_S_pwmleds_S_pwm_led_0_P_pwms_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_pwmleds_S_pwm_led_0, pwms, 0) +#define DT_N_S_pwmleds_S_pwm_led_0_P_pwms_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_pwmleds_S_pwm_led_0, pwms, 0, __VA_ARGS__) +#define DT_N_S_pwmleds_S_pwm_led_0_P_pwms_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_pwmleds_S_pwm_led_0, pwms, 0, __VA_ARGS__) +#define DT_N_S_pwmleds_S_pwm_led_0_P_pwms_LEN 1 +#define DT_N_S_pwmleds_S_pwm_led_0_P_pwms_EXISTS 1 + +/* + * Devicetree node: /reserved-memory + * + * Node identifier: DT_N_S_reserved_memory + */ + +/* Node's full path: */ +#define DT_N_S_reserved_memory_PATH "/reserved-memory" + +/* Node's name with unit-address: */ +#define DT_N_S_reserved_memory_FULL_NAME "reserved-memory" + +/* Node parent (/) identifier: */ +#define DT_N_S_reserved_memory_PARENT DT_N + +/* Node's index in its parent's list of children: */ +#define DT_N_S_reserved_memory_CHILD_IDX 12 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_reserved_memory_CHILD_NUM 3 +#define DT_N_S_reserved_memory_CHILD_NUM_STATUS_OKAY 3 +#define DT_N_S_reserved_memory_FOREACH_CHILD(fn) fn(DT_N_S_reserved_memory_S_image_s_20000000) fn(DT_N_S_reserved_memory_S_image_modem_20016000) fn(DT_N_S_reserved_memory_S_image_ns_20020000) +#define DT_N_S_reserved_memory_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_reserved_memory_S_image_s_20000000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_reserved_memory_S_image_modem_20016000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_reserved_memory_S_image_ns_20020000) +#define DT_N_S_reserved_memory_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_reserved_memory_S_image_s_20000000, __VA_ARGS__) fn(DT_N_S_reserved_memory_S_image_modem_20016000, __VA_ARGS__) fn(DT_N_S_reserved_memory_S_image_ns_20020000, __VA_ARGS__) +#define DT_N_S_reserved_memory_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_reserved_memory_S_image_s_20000000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_reserved_memory_S_image_modem_20016000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_reserved_memory_S_image_ns_20020000, __VA_ARGS__) +#define DT_N_S_reserved_memory_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_reserved_memory_S_image_s_20000000) fn(DT_N_S_reserved_memory_S_image_modem_20016000) fn(DT_N_S_reserved_memory_S_image_ns_20020000) +#define DT_N_S_reserved_memory_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_reserved_memory_S_image_s_20000000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_reserved_memory_S_image_modem_20016000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_reserved_memory_S_image_ns_20020000) +#define DT_N_S_reserved_memory_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_reserved_memory_S_image_s_20000000, __VA_ARGS__) fn(DT_N_S_reserved_memory_S_image_modem_20016000, __VA_ARGS__) fn(DT_N_S_reserved_memory_S_image_ns_20020000, __VA_ARGS__) +#define DT_N_S_reserved_memory_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_reserved_memory_S_image_s_20000000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_reserved_memory_S_image_modem_20016000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_reserved_memory_S_image_ns_20020000, __VA_ARGS__) + +/* Node's dependency ordinal: */ +#define DT_N_S_reserved_memory_ORD 40 +#define DT_N_S_reserved_memory_ORD_STR_SORTABLE 00040 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_reserved_memory_REQUIRES_ORDS \ + 0, /* / */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_reserved_memory_SUPPORTS_ORDS \ + 41, /* /reserved-memory/image_modem@20016000 */ \ + 42, /* /reserved-memory/image_ns@20020000 */ \ + 43, /* /reserved-memory/image_s@20000000 */ + +/* Existence and alternate IDs: */ +#define DT_N_S_reserved_memory_EXISTS 1 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_reserved_memory_REG_NUM 0 +#define DT_N_S_reserved_memory_RANGES_NUM 0 +#define DT_N_S_reserved_memory_FOREACH_RANGE(fn) +#define DT_N_S_reserved_memory_IRQ_NUM 0 +#define DT_N_S_reserved_memory_IRQ_LEVEL 0 +#define DT_N_S_reserved_memory_STATUS_okay 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_reserved_memory_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_reserved_memory_P_ranges_EXISTS 1 + +/* + * Devicetree node: /reserved-memory/image_modem@20016000 + * + * Node identifier: DT_N_S_reserved_memory_S_image_modem_20016000 + */ + +/* Node's full path: */ +#define DT_N_S_reserved_memory_S_image_modem_20016000_PATH "/reserved-memory/image_modem@20016000" + +/* Node's name with unit-address: */ +#define DT_N_S_reserved_memory_S_image_modem_20016000_FULL_NAME "image_modem@20016000" + +/* Node parent (/reserved-memory) identifier: */ +#define DT_N_S_reserved_memory_S_image_modem_20016000_PARENT DT_N_S_reserved_memory + +/* Node's index in its parent's list of children: */ +#define DT_N_S_reserved_memory_S_image_modem_20016000_CHILD_IDX 1 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_reserved_memory_S_image_modem_20016000_CHILD_NUM 0 +#define DT_N_S_reserved_memory_S_image_modem_20016000_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_reserved_memory_S_image_modem_20016000_FOREACH_CHILD(fn) +#define DT_N_S_reserved_memory_S_image_modem_20016000_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_reserved_memory_S_image_modem_20016000_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_reserved_memory_S_image_modem_20016000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_reserved_memory_S_image_modem_20016000_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_reserved_memory_S_image_modem_20016000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_reserved_memory_S_image_modem_20016000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_reserved_memory_S_image_modem_20016000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's dependency ordinal: */ +#define DT_N_S_reserved_memory_S_image_modem_20016000_ORD 41 +#define DT_N_S_reserved_memory_S_image_modem_20016000_ORD_STR_SORTABLE 00041 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_reserved_memory_S_image_modem_20016000_REQUIRES_ORDS \ + 40, /* /reserved-memory */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_reserved_memory_S_image_modem_20016000_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_reserved_memory_S_image_modem_20016000_EXISTS 1 +#define DT_N_NODELABEL_sram0_modem DT_N_S_reserved_memory_S_image_modem_20016000 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_reserved_memory_S_image_modem_20016000_REG_NUM 1 +#define DT_N_S_reserved_memory_S_image_modem_20016000_REG_IDX_0_EXISTS 1 +#define DT_N_S_reserved_memory_S_image_modem_20016000_REG_IDX_0_VAL_ADDRESS 536961024 /* 0x20016000 */ +#define DT_N_S_reserved_memory_S_image_modem_20016000_REG_IDX_0_VAL_SIZE 40960 /* 0xa000 */ +#define DT_N_S_reserved_memory_S_image_modem_20016000_RANGES_NUM 0 +#define DT_N_S_reserved_memory_S_image_modem_20016000_FOREACH_RANGE(fn) +#define DT_N_S_reserved_memory_S_image_modem_20016000_IRQ_NUM 0 +#define DT_N_S_reserved_memory_S_image_modem_20016000_IRQ_LEVEL 0 +#define DT_N_S_reserved_memory_S_image_modem_20016000_STATUS_okay 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_reserved_memory_S_image_modem_20016000_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_reserved_memory_S_image_modem_20016000_P_reg {536961024 /* 0x20016000 */, 40960 /* 0xa000 */} +#define DT_N_S_reserved_memory_S_image_modem_20016000_P_reg_IDX_0 536961024 +#define DT_N_S_reserved_memory_S_image_modem_20016000_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_reserved_memory_S_image_modem_20016000_P_reg_IDX_1 40960 +#define DT_N_S_reserved_memory_S_image_modem_20016000_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_reserved_memory_S_image_modem_20016000_P_reg_EXISTS 1 + +/* + * Devicetree node: /reserved-memory/image_ns@20020000 + * + * Node identifier: DT_N_S_reserved_memory_S_image_ns_20020000 + */ + +/* Node's full path: */ +#define DT_N_S_reserved_memory_S_image_ns_20020000_PATH "/reserved-memory/image_ns@20020000" + +/* Node's name with unit-address: */ +#define DT_N_S_reserved_memory_S_image_ns_20020000_FULL_NAME "image_ns@20020000" + +/* Node parent (/reserved-memory) identifier: */ +#define DT_N_S_reserved_memory_S_image_ns_20020000_PARENT DT_N_S_reserved_memory + +/* Node's index in its parent's list of children: */ +#define DT_N_S_reserved_memory_S_image_ns_20020000_CHILD_IDX 2 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_reserved_memory_S_image_ns_20020000_CHILD_NUM 0 +#define DT_N_S_reserved_memory_S_image_ns_20020000_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_reserved_memory_S_image_ns_20020000_FOREACH_CHILD(fn) +#define DT_N_S_reserved_memory_S_image_ns_20020000_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_reserved_memory_S_image_ns_20020000_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_reserved_memory_S_image_ns_20020000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_reserved_memory_S_image_ns_20020000_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_reserved_memory_S_image_ns_20020000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_reserved_memory_S_image_ns_20020000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_reserved_memory_S_image_ns_20020000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's dependency ordinal: */ +#define DT_N_S_reserved_memory_S_image_ns_20020000_ORD 42 +#define DT_N_S_reserved_memory_S_image_ns_20020000_ORD_STR_SORTABLE 00042 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_reserved_memory_S_image_ns_20020000_REQUIRES_ORDS \ + 40, /* /reserved-memory */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_reserved_memory_S_image_ns_20020000_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_reserved_memory_S_image_ns_20020000_EXISTS 1 +#define DT_N_NODELABEL_sram0_ns DT_N_S_reserved_memory_S_image_ns_20020000 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_reserved_memory_S_image_ns_20020000_REG_NUM 1 +#define DT_N_S_reserved_memory_S_image_ns_20020000_REG_IDX_0_EXISTS 1 +#define DT_N_S_reserved_memory_S_image_ns_20020000_REG_IDX_0_VAL_ADDRESS 537001984 /* 0x20020000 */ +#define DT_N_S_reserved_memory_S_image_ns_20020000_REG_IDX_0_VAL_SIZE 131072 /* 0x20000 */ +#define DT_N_S_reserved_memory_S_image_ns_20020000_RANGES_NUM 0 +#define DT_N_S_reserved_memory_S_image_ns_20020000_FOREACH_RANGE(fn) +#define DT_N_S_reserved_memory_S_image_ns_20020000_IRQ_NUM 0 +#define DT_N_S_reserved_memory_S_image_ns_20020000_IRQ_LEVEL 0 +#define DT_N_S_reserved_memory_S_image_ns_20020000_STATUS_okay 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_reserved_memory_S_image_ns_20020000_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_reserved_memory_S_image_ns_20020000_P_reg {537001984 /* 0x20020000 */, 131072 /* 0x20000 */} +#define DT_N_S_reserved_memory_S_image_ns_20020000_P_reg_IDX_0 537001984 +#define DT_N_S_reserved_memory_S_image_ns_20020000_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_reserved_memory_S_image_ns_20020000_P_reg_IDX_1 131072 +#define DT_N_S_reserved_memory_S_image_ns_20020000_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_reserved_memory_S_image_ns_20020000_P_reg_EXISTS 1 + +/* + * Devicetree node: /reserved-memory/image_s@20000000 + * + * Node identifier: DT_N_S_reserved_memory_S_image_s_20000000 + */ + +/* Node's full path: */ +#define DT_N_S_reserved_memory_S_image_s_20000000_PATH "/reserved-memory/image_s@20000000" + +/* Node's name with unit-address: */ +#define DT_N_S_reserved_memory_S_image_s_20000000_FULL_NAME "image_s@20000000" + +/* Node parent (/reserved-memory) identifier: */ +#define DT_N_S_reserved_memory_S_image_s_20000000_PARENT DT_N_S_reserved_memory + +/* Node's index in its parent's list of children: */ +#define DT_N_S_reserved_memory_S_image_s_20000000_CHILD_IDX 0 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_reserved_memory_S_image_s_20000000_CHILD_NUM 0 +#define DT_N_S_reserved_memory_S_image_s_20000000_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_reserved_memory_S_image_s_20000000_FOREACH_CHILD(fn) +#define DT_N_S_reserved_memory_S_image_s_20000000_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_reserved_memory_S_image_s_20000000_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_reserved_memory_S_image_s_20000000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_reserved_memory_S_image_s_20000000_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_reserved_memory_S_image_s_20000000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_reserved_memory_S_image_s_20000000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_reserved_memory_S_image_s_20000000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's dependency ordinal: */ +#define DT_N_S_reserved_memory_S_image_s_20000000_ORD 43 +#define DT_N_S_reserved_memory_S_image_s_20000000_ORD_STR_SORTABLE 00043 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_reserved_memory_S_image_s_20000000_REQUIRES_ORDS \ + 40, /* /reserved-memory */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_reserved_memory_S_image_s_20000000_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_reserved_memory_S_image_s_20000000_EXISTS 1 +#define DT_N_NODELABEL_sram0_s DT_N_S_reserved_memory_S_image_s_20000000 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_reserved_memory_S_image_s_20000000_REG_NUM 1 +#define DT_N_S_reserved_memory_S_image_s_20000000_REG_IDX_0_EXISTS 1 +#define DT_N_S_reserved_memory_S_image_s_20000000_REG_IDX_0_VAL_ADDRESS 536870912 /* 0x20000000 */ +#define DT_N_S_reserved_memory_S_image_s_20000000_REG_IDX_0_VAL_SIZE 90112 /* 0x16000 */ +#define DT_N_S_reserved_memory_S_image_s_20000000_RANGES_NUM 0 +#define DT_N_S_reserved_memory_S_image_s_20000000_FOREACH_RANGE(fn) +#define DT_N_S_reserved_memory_S_image_s_20000000_IRQ_NUM 0 +#define DT_N_S_reserved_memory_S_image_s_20000000_IRQ_LEVEL 0 +#define DT_N_S_reserved_memory_S_image_s_20000000_STATUS_okay 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_reserved_memory_S_image_s_20000000_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_reserved_memory_S_image_s_20000000_P_reg {536870912 /* 0x20000000 */, 90112 /* 0x16000 */} +#define DT_N_S_reserved_memory_S_image_s_20000000_P_reg_IDX_0 536870912 +#define DT_N_S_reserved_memory_S_image_s_20000000_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_reserved_memory_S_image_s_20000000_P_reg_IDX_1 90112 +#define DT_N_S_reserved_memory_S_image_s_20000000_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_reserved_memory_S_image_s_20000000_P_reg_EXISTS 1 + +/* + * Devicetree node: /soc/crypto@50840000 + * + * Node identifier: DT_N_S_soc_S_crypto_50840000 + * + * Binding (compatible = arm,cryptocell-310): + * $ZEPHYR_BASE/dts/bindings/crypto/arm,cryptocell-310.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_crypto_50840000_PATH "/soc/crypto@50840000" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_crypto_50840000_FULL_NAME "crypto@50840000" + +/* Node parent (/soc) identifier: */ +#define DT_N_S_soc_S_crypto_50840000_PARENT DT_N_S_soc + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_crypto_50840000_CHILD_IDX 4 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_crypto_50840000_CHILD_NUM 0 +#define DT_N_S_soc_S_crypto_50840000_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_crypto_50840000_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_crypto_50840000_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_crypto_50840000_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_crypto_50840000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_crypto_50840000_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_crypto_50840000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_crypto_50840000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_crypto_50840000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_crypto_50840000_ORD 44 +#define DT_N_S_soc_S_crypto_50840000_ORD_STR_SORTABLE 00044 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_crypto_50840000_REQUIRES_ORDS \ + 5, /* /soc */ \ + 6, /* /soc/interrupt-controller@e000e100 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_crypto_50840000_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_crypto_50840000_EXISTS 1 +#define DT_N_INST_0_nordic_cryptocell DT_N_S_soc_S_crypto_50840000 +#define DT_N_INST_0_arm_cryptocell_310 DT_N_S_soc_S_crypto_50840000 +#define DT_N_NODELABEL_cryptocell DT_N_S_soc_S_crypto_50840000 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_crypto_50840000_REG_NUM 2 +#define DT_N_S_soc_S_crypto_50840000_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_crypto_50840000_REG_IDX_0_VAL_ADDRESS 1350828032 /* 0x50840000 */ +#define DT_N_S_soc_S_crypto_50840000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */ +#define DT_N_S_soc_S_crypto_50840000_REG_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_crypto_50840000_REG_IDX_1_VAL_ADDRESS 1350832128 /* 0x50841000 */ +#define DT_N_S_soc_S_crypto_50840000_REG_IDX_1_VAL_SIZE 4096 /* 0x1000 */ +#define DT_N_S_soc_S_crypto_50840000_REG_NAME_wrapper_VAL_ADDRESS DT_N_S_soc_S_crypto_50840000_REG_IDX_0_VAL_ADDRESS +#define DT_N_S_soc_S_crypto_50840000_REG_NAME_wrapper_VAL_SIZE DT_N_S_soc_S_crypto_50840000_REG_IDX_0_VAL_SIZE +#define DT_N_S_soc_S_crypto_50840000_REG_NAME_core_VAL_ADDRESS DT_N_S_soc_S_crypto_50840000_REG_IDX_1_VAL_ADDRESS +#define DT_N_S_soc_S_crypto_50840000_REG_NAME_core_VAL_SIZE DT_N_S_soc_S_crypto_50840000_REG_IDX_1_VAL_SIZE +#define DT_N_S_soc_S_crypto_50840000_RANGES_NUM 0 +#define DT_N_S_soc_S_crypto_50840000_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_crypto_50840000_IRQ_NUM 1 +#define DT_N_S_soc_S_crypto_50840000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_crypto_50840000_IRQ_IDX_0_VAL_irq 64 +#define DT_N_S_soc_S_crypto_50840000_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_crypto_50840000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_crypto_50840000_IRQ_IDX_0_VAL_priority 1 +#define DT_N_S_soc_S_crypto_50840000_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_crypto_50840000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_crypto_50840000_IRQ_LEVEL 1 +#define DT_N_S_soc_S_crypto_50840000_COMPAT_MATCHES_nordic_cryptocell 1 +#define DT_N_S_soc_S_crypto_50840000_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_crypto_50840000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor" +#define DT_N_S_soc_S_crypto_50840000_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_crypto_50840000_COMPAT_MODEL_IDX_0 "cryptocell" +#define DT_N_S_soc_S_crypto_50840000_COMPAT_MATCHES_arm_cryptocell_310 1 +#define DT_N_S_soc_S_crypto_50840000_COMPAT_VENDOR_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_crypto_50840000_COMPAT_VENDOR_IDX_1 "ARM Ltd." +#define DT_N_S_soc_S_crypto_50840000_COMPAT_MODEL_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_crypto_50840000_COMPAT_MODEL_IDX_1 "cryptocell-310" +#define DT_N_S_soc_S_crypto_50840000_STATUS_okay 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_soc_S_crypto_50840000_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_crypto_50840000_P_wakeup_source 0 +#define DT_N_S_soc_S_crypto_50840000_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_crypto_50840000_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_crypto_50840000_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_crypto_50840000_P_status "okay" +#define DT_N_S_soc_S_crypto_50840000_P_status_STRING_UNQUOTED okay +#define DT_N_S_soc_S_crypto_50840000_P_status_STRING_TOKEN okay +#define DT_N_S_soc_S_crypto_50840000_P_status_STRING_UPPER_TOKEN OKAY +#define DT_N_S_soc_S_crypto_50840000_P_status_IDX_0 "okay" +#define DT_N_S_soc_S_crypto_50840000_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_crypto_50840000_P_status_ENUM_IDX 1 +#define DT_N_S_soc_S_crypto_50840000_P_status_ENUM_VAL_okay_EXISTS 1 +#define DT_N_S_soc_S_crypto_50840000_P_status_ENUM_TOKEN okay +#define DT_N_S_soc_S_crypto_50840000_P_status_ENUM_UPPER_TOKEN OKAY +#define DT_N_S_soc_S_crypto_50840000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_crypto_50840000, status, 0) +#define DT_N_S_soc_S_crypto_50840000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_crypto_50840000, status, 0) +#define DT_N_S_soc_S_crypto_50840000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_crypto_50840000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_crypto_50840000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_crypto_50840000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_crypto_50840000_P_status_LEN 1 +#define DT_N_S_soc_S_crypto_50840000_P_status_EXISTS 1 +#define DT_N_S_soc_S_crypto_50840000_P_compatible {"nordic,cryptocell", "arm,cryptocell-310"} +#define DT_N_S_soc_S_crypto_50840000_P_compatible_IDX_0 "nordic,cryptocell" +#define DT_N_S_soc_S_crypto_50840000_P_compatible_IDX_0_STRING_UNQUOTED nordic,cryptocell +#define DT_N_S_soc_S_crypto_50840000_P_compatible_IDX_0_STRING_TOKEN nordic_cryptocell +#define DT_N_S_soc_S_crypto_50840000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_CRYPTOCELL +#define DT_N_S_soc_S_crypto_50840000_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_crypto_50840000_P_compatible_IDX_1 "arm,cryptocell-310" +#define DT_N_S_soc_S_crypto_50840000_P_compatible_IDX_1_STRING_UNQUOTED arm,cryptocell-310 +#define DT_N_S_soc_S_crypto_50840000_P_compatible_IDX_1_STRING_TOKEN arm_cryptocell_310 +#define DT_N_S_soc_S_crypto_50840000_P_compatible_IDX_1_STRING_UPPER_TOKEN ARM_CRYPTOCELL_310 +#define DT_N_S_soc_S_crypto_50840000_P_compatible_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_crypto_50840000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_crypto_50840000, compatible, 0) \ + fn(DT_N_S_soc_S_crypto_50840000, compatible, 1) +#define DT_N_S_soc_S_crypto_50840000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_crypto_50840000, compatible, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_crypto_50840000, compatible, 1) +#define DT_N_S_soc_S_crypto_50840000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_crypto_50840000, compatible, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_crypto_50840000, compatible, 1, __VA_ARGS__) +#define DT_N_S_soc_S_crypto_50840000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_crypto_50840000, compatible, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_crypto_50840000, compatible, 1, __VA_ARGS__) +#define DT_N_S_soc_S_crypto_50840000_P_compatible_LEN 2 +#define DT_N_S_soc_S_crypto_50840000_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_crypto_50840000_P_reg {1350828032 /* 0x50840000 */, 4096 /* 0x1000 */, 1350832128 /* 0x50841000 */, 4096 /* 0x1000 */} +#define DT_N_S_soc_S_crypto_50840000_P_reg_IDX_0 1350828032 +#define DT_N_S_soc_S_crypto_50840000_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_crypto_50840000_P_reg_IDX_1 4096 +#define DT_N_S_soc_S_crypto_50840000_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_crypto_50840000_P_reg_IDX_2 1350832128 +#define DT_N_S_soc_S_crypto_50840000_P_reg_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_crypto_50840000_P_reg_IDX_3 4096 +#define DT_N_S_soc_S_crypto_50840000_P_reg_IDX_3_EXISTS 1 +#define DT_N_S_soc_S_crypto_50840000_P_reg_EXISTS 1 +#define DT_N_S_soc_S_crypto_50840000_P_reg_names {"wrapper", "core"} +#define DT_N_S_soc_S_crypto_50840000_P_reg_names_IDX_0 "wrapper" +#define DT_N_S_soc_S_crypto_50840000_P_reg_names_IDX_0_STRING_UNQUOTED wrapper +#define DT_N_S_soc_S_crypto_50840000_P_reg_names_IDX_0_STRING_TOKEN wrapper +#define DT_N_S_soc_S_crypto_50840000_P_reg_names_IDX_0_STRING_UPPER_TOKEN WRAPPER +#define DT_N_S_soc_S_crypto_50840000_P_reg_names_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_crypto_50840000_P_reg_names_IDX_1 "core" +#define DT_N_S_soc_S_crypto_50840000_P_reg_names_IDX_1_STRING_UNQUOTED core +#define DT_N_S_soc_S_crypto_50840000_P_reg_names_IDX_1_STRING_TOKEN core +#define DT_N_S_soc_S_crypto_50840000_P_reg_names_IDX_1_STRING_UPPER_TOKEN CORE +#define DT_N_S_soc_S_crypto_50840000_P_reg_names_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_crypto_50840000_P_reg_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_crypto_50840000, reg_names, 0) \ + fn(DT_N_S_soc_S_crypto_50840000, reg_names, 1) +#define DT_N_S_soc_S_crypto_50840000_P_reg_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_crypto_50840000, reg_names, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_crypto_50840000, reg_names, 1) +#define DT_N_S_soc_S_crypto_50840000_P_reg_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_crypto_50840000, reg_names, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_crypto_50840000, reg_names, 1, __VA_ARGS__) +#define DT_N_S_soc_S_crypto_50840000_P_reg_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_crypto_50840000, reg_names, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_crypto_50840000, reg_names, 1, __VA_ARGS__) +#define DT_N_S_soc_S_crypto_50840000_P_reg_names_LEN 2 +#define DT_N_S_soc_S_crypto_50840000_P_reg_names_EXISTS 1 +#define DT_N_S_soc_S_crypto_50840000_P_interrupts {64 /* 0x40 */, 1 /* 0x1 */} +#define DT_N_S_soc_S_crypto_50840000_P_interrupts_IDX_0 64 +#define DT_N_S_soc_S_crypto_50840000_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_crypto_50840000_P_interrupts_IDX_1 1 +#define DT_N_S_soc_S_crypto_50840000_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_crypto_50840000_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_crypto_50840000_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_crypto_50840000_P_zephyr_deferred_init_EXISTS 1 + +/* + * Devicetree node: /soc/ctrlap@50006000 + * + * Node identifier: DT_N_S_soc_S_ctrlap_50006000 + * + * Binding (compatible = nordic,nrf-ctrlapperi): + * $ZEPHYR_BASE/dts/bindings/arm/nordic,nrf-ctrlapperi.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_ctrlap_50006000_PATH "/soc/ctrlap@50006000" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_ctrlap_50006000_FULL_NAME "ctrlap@50006000" + +/* Node parent (/soc) identifier: */ +#define DT_N_S_soc_S_ctrlap_50006000_PARENT DT_N_S_soc + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_ctrlap_50006000_CHILD_IDX 5 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_ctrlap_50006000_CHILD_NUM 0 +#define DT_N_S_soc_S_ctrlap_50006000_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_ctrlap_50006000_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_ctrlap_50006000_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_ctrlap_50006000_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_ctrlap_50006000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_ctrlap_50006000_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_ctrlap_50006000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_ctrlap_50006000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_ctrlap_50006000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_ctrlap_50006000_ORD 45 +#define DT_N_S_soc_S_ctrlap_50006000_ORD_STR_SORTABLE 00045 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_ctrlap_50006000_REQUIRES_ORDS \ + 5, /* /soc */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_ctrlap_50006000_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_ctrlap_50006000_EXISTS 1 +#define DT_N_INST_0_nordic_nrf_ctrlapperi DT_N_S_soc_S_ctrlap_50006000 +#define DT_N_NODELABEL_ctrlap DT_N_S_soc_S_ctrlap_50006000 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_ctrlap_50006000_REG_NUM 1 +#define DT_N_S_soc_S_ctrlap_50006000_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_ctrlap_50006000_REG_IDX_0_VAL_ADDRESS 1342201856 /* 0x50006000 */ +#define DT_N_S_soc_S_ctrlap_50006000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */ +#define DT_N_S_soc_S_ctrlap_50006000_RANGES_NUM 0 +#define DT_N_S_soc_S_ctrlap_50006000_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_ctrlap_50006000_IRQ_NUM 0 +#define DT_N_S_soc_S_ctrlap_50006000_IRQ_LEVEL 0 +#define DT_N_S_soc_S_ctrlap_50006000_COMPAT_MATCHES_nordic_nrf_ctrlapperi 1 +#define DT_N_S_soc_S_ctrlap_50006000_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_ctrlap_50006000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor" +#define DT_N_S_soc_S_ctrlap_50006000_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_ctrlap_50006000_COMPAT_MODEL_IDX_0 "nrf-ctrlapperi" +#define DT_N_S_soc_S_ctrlap_50006000_STATUS_okay 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_soc_S_ctrlap_50006000_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_ctrlap_50006000_P_wakeup_source 0 +#define DT_N_S_soc_S_ctrlap_50006000_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_ctrlap_50006000_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_ctrlap_50006000_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_ctrlap_50006000_P_status "okay" +#define DT_N_S_soc_S_ctrlap_50006000_P_status_STRING_UNQUOTED okay +#define DT_N_S_soc_S_ctrlap_50006000_P_status_STRING_TOKEN okay +#define DT_N_S_soc_S_ctrlap_50006000_P_status_STRING_UPPER_TOKEN OKAY +#define DT_N_S_soc_S_ctrlap_50006000_P_status_IDX_0 "okay" +#define DT_N_S_soc_S_ctrlap_50006000_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_ctrlap_50006000_P_status_ENUM_IDX 1 +#define DT_N_S_soc_S_ctrlap_50006000_P_status_ENUM_VAL_okay_EXISTS 1 +#define DT_N_S_soc_S_ctrlap_50006000_P_status_ENUM_TOKEN okay +#define DT_N_S_soc_S_ctrlap_50006000_P_status_ENUM_UPPER_TOKEN OKAY +#define DT_N_S_soc_S_ctrlap_50006000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_ctrlap_50006000, status, 0) +#define DT_N_S_soc_S_ctrlap_50006000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_ctrlap_50006000, status, 0) +#define DT_N_S_soc_S_ctrlap_50006000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_ctrlap_50006000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_ctrlap_50006000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_ctrlap_50006000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_ctrlap_50006000_P_status_LEN 1 +#define DT_N_S_soc_S_ctrlap_50006000_P_status_EXISTS 1 +#define DT_N_S_soc_S_ctrlap_50006000_P_compatible {"nordic,nrf-ctrlapperi"} +#define DT_N_S_soc_S_ctrlap_50006000_P_compatible_IDX_0 "nordic,nrf-ctrlapperi" +#define DT_N_S_soc_S_ctrlap_50006000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-ctrlapperi +#define DT_N_S_soc_S_ctrlap_50006000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_ctrlapperi +#define DT_N_S_soc_S_ctrlap_50006000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_CTRLAPPERI +#define DT_N_S_soc_S_ctrlap_50006000_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_ctrlap_50006000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_ctrlap_50006000, compatible, 0) +#define DT_N_S_soc_S_ctrlap_50006000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_ctrlap_50006000, compatible, 0) +#define DT_N_S_soc_S_ctrlap_50006000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_ctrlap_50006000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_ctrlap_50006000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_ctrlap_50006000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_ctrlap_50006000_P_compatible_LEN 1 +#define DT_N_S_soc_S_ctrlap_50006000_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_ctrlap_50006000_P_reg {1342201856 /* 0x50006000 */, 4096 /* 0x1000 */} +#define DT_N_S_soc_S_ctrlap_50006000_P_reg_IDX_0 1342201856 +#define DT_N_S_soc_S_ctrlap_50006000_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_ctrlap_50006000_P_reg_IDX_1 4096 +#define DT_N_S_soc_S_ctrlap_50006000_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_ctrlap_50006000_P_reg_EXISTS 1 +#define DT_N_S_soc_S_ctrlap_50006000_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_ctrlap_50006000_P_zephyr_deferred_init_EXISTS 1 + +/* + * Devicetree node: /soc/ficr@ff0000 + * + * Node identifier: DT_N_S_soc_S_ficr_ff0000 + * + * Binding (compatible = nordic,nrf-ficr): + * $ZEPHYR_BASE/dts/bindings/misc/nordic,nrf-ficr.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_ficr_ff0000_PATH "/soc/ficr@ff0000" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_ficr_ff0000_FULL_NAME "ficr@ff0000" + +/* Node parent (/soc) identifier: */ +#define DT_N_S_soc_S_ficr_ff0000_PARENT DT_N_S_soc + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_ficr_ff0000_CHILD_IDX 9 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_ficr_ff0000_CHILD_NUM 0 +#define DT_N_S_soc_S_ficr_ff0000_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_ficr_ff0000_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_ficr_ff0000_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_ficr_ff0000_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_ficr_ff0000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_ficr_ff0000_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_ficr_ff0000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_ficr_ff0000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_ficr_ff0000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_ficr_ff0000_ORD 46 +#define DT_N_S_soc_S_ficr_ff0000_ORD_STR_SORTABLE 00046 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_ficr_ff0000_REQUIRES_ORDS \ + 5, /* /soc */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_ficr_ff0000_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_ficr_ff0000_EXISTS 1 +#define DT_N_INST_0_nordic_nrf_ficr DT_N_S_soc_S_ficr_ff0000 +#define DT_N_NODELABEL_ficr DT_N_S_soc_S_ficr_ff0000 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_ficr_ff0000_REG_NUM 1 +#define DT_N_S_soc_S_ficr_ff0000_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_ficr_ff0000_REG_IDX_0_VAL_ADDRESS 16711680 /* 0xff0000 */ +#define DT_N_S_soc_S_ficr_ff0000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */ +#define DT_N_S_soc_S_ficr_ff0000_RANGES_NUM 0 +#define DT_N_S_soc_S_ficr_ff0000_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_ficr_ff0000_IRQ_NUM 0 +#define DT_N_S_soc_S_ficr_ff0000_IRQ_LEVEL 0 +#define DT_N_S_soc_S_ficr_ff0000_COMPAT_MATCHES_nordic_nrf_ficr 1 +#define DT_N_S_soc_S_ficr_ff0000_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_ficr_ff0000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor" +#define DT_N_S_soc_S_ficr_ff0000_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_ficr_ff0000_COMPAT_MODEL_IDX_0 "nrf-ficr" +#define DT_N_S_soc_S_ficr_ff0000_STATUS_okay 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_soc_S_ficr_ff0000_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_ficr_ff0000_P_wakeup_source 0 +#define DT_N_S_soc_S_ficr_ff0000_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_ficr_ff0000_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_ficr_ff0000_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_ficr_ff0000_P_status "okay" +#define DT_N_S_soc_S_ficr_ff0000_P_status_STRING_UNQUOTED okay +#define DT_N_S_soc_S_ficr_ff0000_P_status_STRING_TOKEN okay +#define DT_N_S_soc_S_ficr_ff0000_P_status_STRING_UPPER_TOKEN OKAY +#define DT_N_S_soc_S_ficr_ff0000_P_status_IDX_0 "okay" +#define DT_N_S_soc_S_ficr_ff0000_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_ficr_ff0000_P_status_ENUM_IDX 1 +#define DT_N_S_soc_S_ficr_ff0000_P_status_ENUM_VAL_okay_EXISTS 1 +#define DT_N_S_soc_S_ficr_ff0000_P_status_ENUM_TOKEN okay +#define DT_N_S_soc_S_ficr_ff0000_P_status_ENUM_UPPER_TOKEN OKAY +#define DT_N_S_soc_S_ficr_ff0000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_ficr_ff0000, status, 0) +#define DT_N_S_soc_S_ficr_ff0000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_ficr_ff0000, status, 0) +#define DT_N_S_soc_S_ficr_ff0000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_ficr_ff0000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_ficr_ff0000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_ficr_ff0000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_ficr_ff0000_P_status_LEN 1 +#define DT_N_S_soc_S_ficr_ff0000_P_status_EXISTS 1 +#define DT_N_S_soc_S_ficr_ff0000_P_compatible {"nordic,nrf-ficr"} +#define DT_N_S_soc_S_ficr_ff0000_P_compatible_IDX_0 "nordic,nrf-ficr" +#define DT_N_S_soc_S_ficr_ff0000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-ficr +#define DT_N_S_soc_S_ficr_ff0000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_ficr +#define DT_N_S_soc_S_ficr_ff0000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_FICR +#define DT_N_S_soc_S_ficr_ff0000_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_ficr_ff0000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_ficr_ff0000, compatible, 0) +#define DT_N_S_soc_S_ficr_ff0000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_ficr_ff0000, compatible, 0) +#define DT_N_S_soc_S_ficr_ff0000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_ficr_ff0000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_ficr_ff0000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_ficr_ff0000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_ficr_ff0000_P_compatible_LEN 1 +#define DT_N_S_soc_S_ficr_ff0000_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_ficr_ff0000_P_reg {16711680 /* 0xff0000 */, 4096 /* 0x1000 */} +#define DT_N_S_soc_S_ficr_ff0000_P_reg_IDX_0 16711680 +#define DT_N_S_soc_S_ficr_ff0000_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_ficr_ff0000_P_reg_IDX_1 4096 +#define DT_N_S_soc_S_ficr_ff0000_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_ficr_ff0000_P_reg_EXISTS 1 +#define DT_N_S_soc_S_ficr_ff0000_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_ficr_ff0000_P_zephyr_deferred_init_EXISTS 1 + +/* + * Devicetree node: /soc/gpiote@40031000 + * + * Node identifier: DT_N_S_soc_S_gpiote_40031000 + * + * Binding (compatible = nordic,nrf-gpiote): + * $ZEPHYR_BASE/dts/bindings/gpio/nordic,nrf-gpiote.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_gpiote_40031000_PATH "/soc/gpiote@40031000" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_gpiote_40031000_FULL_NAME "gpiote@40031000" + +/* Node parent (/soc) identifier: */ +#define DT_N_S_soc_S_gpiote_40031000_PARENT DT_N_S_soc + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_gpiote_40031000_CHILD_IDX 7 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_gpiote_40031000_CHILD_NUM 0 +#define DT_N_S_soc_S_gpiote_40031000_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_gpiote_40031000_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_gpiote_40031000_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_gpiote_40031000_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_gpiote_40031000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_gpiote_40031000_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_gpiote_40031000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_gpiote_40031000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_gpiote_40031000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_gpiote_40031000_ORD 47 +#define DT_N_S_soc_S_gpiote_40031000_ORD_STR_SORTABLE 00047 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_gpiote_40031000_REQUIRES_ORDS \ + 5, /* /soc */ \ + 6, /* /soc/interrupt-controller@e000e100 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_gpiote_40031000_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_gpiote_40031000_EXISTS 1 +#define DT_N_INST_1_nordic_nrf_gpiote DT_N_S_soc_S_gpiote_40031000 +#define DT_N_NODELABEL_gpiote1 DT_N_S_soc_S_gpiote_40031000 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_gpiote_40031000_REG_NUM 1 +#define DT_N_S_soc_S_gpiote_40031000_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_gpiote_40031000_REG_IDX_0_VAL_ADDRESS 1073942528 /* 0x40031000 */ +#define DT_N_S_soc_S_gpiote_40031000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */ +#define DT_N_S_soc_S_gpiote_40031000_RANGES_NUM 0 +#define DT_N_S_soc_S_gpiote_40031000_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_gpiote_40031000_IRQ_NUM 1 +#define DT_N_S_soc_S_gpiote_40031000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_gpiote_40031000_IRQ_IDX_0_VAL_irq 49 +#define DT_N_S_soc_S_gpiote_40031000_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_gpiote_40031000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_gpiote_40031000_IRQ_IDX_0_VAL_priority 5 +#define DT_N_S_soc_S_gpiote_40031000_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_gpiote_40031000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_gpiote_40031000_IRQ_LEVEL 1 +#define DT_N_S_soc_S_gpiote_40031000_COMPAT_MATCHES_nordic_nrf_gpiote 1 +#define DT_N_S_soc_S_gpiote_40031000_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_gpiote_40031000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor" +#define DT_N_S_soc_S_gpiote_40031000_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_gpiote_40031000_COMPAT_MODEL_IDX_0 "nrf-gpiote" +#define DT_N_S_soc_S_gpiote_40031000_STATUS_disabled 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_soc_S_gpiote_40031000_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_gpiote_40031000_P_wakeup_source 0 +#define DT_N_S_soc_S_gpiote_40031000_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_gpiote_40031000_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_gpiote_40031000_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_gpiote_40031000_P_status "disabled" +#define DT_N_S_soc_S_gpiote_40031000_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_gpiote_40031000_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_gpiote_40031000_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_gpiote_40031000_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_gpiote_40031000_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_gpiote_40031000_P_status_ENUM_IDX 2 +#define DT_N_S_soc_S_gpiote_40031000_P_status_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_gpiote_40031000_P_status_ENUM_TOKEN disabled +#define DT_N_S_soc_S_gpiote_40031000_P_status_ENUM_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_gpiote_40031000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_gpiote_40031000, status, 0) +#define DT_N_S_soc_S_gpiote_40031000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_gpiote_40031000, status, 0) +#define DT_N_S_soc_S_gpiote_40031000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_gpiote_40031000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_gpiote_40031000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_gpiote_40031000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_gpiote_40031000_P_status_LEN 1 +#define DT_N_S_soc_S_gpiote_40031000_P_status_EXISTS 1 +#define DT_N_S_soc_S_gpiote_40031000_P_compatible {"nordic,nrf-gpiote"} +#define DT_N_S_soc_S_gpiote_40031000_P_compatible_IDX_0 "nordic,nrf-gpiote" +#define DT_N_S_soc_S_gpiote_40031000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-gpiote +#define DT_N_S_soc_S_gpiote_40031000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_gpiote +#define DT_N_S_soc_S_gpiote_40031000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_GPIOTE +#define DT_N_S_soc_S_gpiote_40031000_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_gpiote_40031000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_gpiote_40031000, compatible, 0) +#define DT_N_S_soc_S_gpiote_40031000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_gpiote_40031000, compatible, 0) +#define DT_N_S_soc_S_gpiote_40031000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_gpiote_40031000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_gpiote_40031000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_gpiote_40031000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_gpiote_40031000_P_compatible_LEN 1 +#define DT_N_S_soc_S_gpiote_40031000_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_gpiote_40031000_P_reg {1073942528 /* 0x40031000 */, 4096 /* 0x1000 */} +#define DT_N_S_soc_S_gpiote_40031000_P_reg_IDX_0 1073942528 +#define DT_N_S_soc_S_gpiote_40031000_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_gpiote_40031000_P_reg_IDX_1 4096 +#define DT_N_S_soc_S_gpiote_40031000_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_gpiote_40031000_P_reg_EXISTS 1 +#define DT_N_S_soc_S_gpiote_40031000_P_interrupts {49 /* 0x31 */, 5 /* 0x5 */} +#define DT_N_S_soc_S_gpiote_40031000_P_interrupts_IDX_0 49 +#define DT_N_S_soc_S_gpiote_40031000_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_gpiote_40031000_P_interrupts_IDX_1 5 +#define DT_N_S_soc_S_gpiote_40031000_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_gpiote_40031000_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_gpiote_40031000_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_gpiote_40031000_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_gpiote_40031000_P_instance 1 +#define DT_N_S_soc_S_gpiote_40031000_P_instance_EXISTS 1 + +/* + * Devicetree node: /soc/memory@20000000 + * + * Node identifier: DT_N_S_soc_S_memory_20000000 + * + * Binding (compatible = mmio-sram): + * $ZEPHYR_BASE/dts/bindings/sram/mmio-sram.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_memory_20000000_PATH "/soc/memory@20000000" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_memory_20000000_FULL_NAME "memory@20000000" + +/* Node parent (/soc) identifier: */ +#define DT_N_S_soc_S_memory_20000000_PARENT DT_N_S_soc + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_memory_20000000_CHILD_IDX 2 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_memory_20000000_CHILD_NUM 0 +#define DT_N_S_soc_S_memory_20000000_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_memory_20000000_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_memory_20000000_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_memory_20000000_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_memory_20000000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_memory_20000000_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_memory_20000000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_memory_20000000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_memory_20000000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_memory_20000000_ORD 48 +#define DT_N_S_soc_S_memory_20000000_ORD_STR_SORTABLE 00048 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_memory_20000000_REQUIRES_ORDS \ + 5, /* /soc */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_memory_20000000_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_memory_20000000_EXISTS 1 +#define DT_N_INST_0_mmio_sram DT_N_S_soc_S_memory_20000000 +#define DT_N_NODELABEL_sram0 DT_N_S_soc_S_memory_20000000 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_memory_20000000_REG_NUM 1 +#define DT_N_S_soc_S_memory_20000000_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_memory_20000000_REG_IDX_0_VAL_ADDRESS 536870912 /* 0x20000000 */ +#define DT_N_S_soc_S_memory_20000000_REG_IDX_0_VAL_SIZE 262144 /* 0x40000 */ +#define DT_N_S_soc_S_memory_20000000_RANGES_NUM 0 +#define DT_N_S_soc_S_memory_20000000_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_memory_20000000_IRQ_NUM 0 +#define DT_N_S_soc_S_memory_20000000_IRQ_LEVEL 0 +#define DT_N_S_soc_S_memory_20000000_COMPAT_MATCHES_mmio_sram 1 +#define DT_N_S_soc_S_memory_20000000_STATUS_okay 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_soc_S_memory_20000000_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_memory_20000000_P_wakeup_source 0 +#define DT_N_S_soc_S_memory_20000000_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_memory_20000000_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_memory_20000000_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_memory_20000000_P_compatible {"mmio-sram"} +#define DT_N_S_soc_S_memory_20000000_P_compatible_IDX_0 "mmio-sram" +#define DT_N_S_soc_S_memory_20000000_P_compatible_IDX_0_STRING_UNQUOTED mmio-sram +#define DT_N_S_soc_S_memory_20000000_P_compatible_IDX_0_STRING_TOKEN mmio_sram +#define DT_N_S_soc_S_memory_20000000_P_compatible_IDX_0_STRING_UPPER_TOKEN MMIO_SRAM +#define DT_N_S_soc_S_memory_20000000_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_memory_20000000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_memory_20000000, compatible, 0) +#define DT_N_S_soc_S_memory_20000000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_memory_20000000, compatible, 0) +#define DT_N_S_soc_S_memory_20000000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_memory_20000000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_memory_20000000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_memory_20000000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_memory_20000000_P_compatible_LEN 1 +#define DT_N_S_soc_S_memory_20000000_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_memory_20000000_P_reg {536870912 /* 0x20000000 */, 262144 /* 0x40000 */} +#define DT_N_S_soc_S_memory_20000000_P_reg_IDX_0 536870912 +#define DT_N_S_soc_S_memory_20000000_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_memory_20000000_P_reg_IDX_1 262144 +#define DT_N_S_soc_S_memory_20000000_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_memory_20000000_P_reg_EXISTS 1 +#define DT_N_S_soc_S_memory_20000000_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_memory_20000000_P_zephyr_deferred_init_EXISTS 1 + +/* + * Devicetree node: /soc/spu@50003000 + * + * Node identifier: DT_N_S_soc_S_spu_50003000 + * + * Binding (compatible = nordic,nrf-spu): + * $ZEPHYR_BASE/dts/bindings/arm/nordic,nrf-spu.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_spu_50003000_PATH "/soc/spu@50003000" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_spu_50003000_FULL_NAME "spu@50003000" + +/* Node parent (/soc) identifier: */ +#define DT_N_S_soc_S_spu_50003000_PARENT DT_N_S_soc + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_spu_50003000_CHILD_IDX 8 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_spu_50003000_CHILD_NUM 0 +#define DT_N_S_soc_S_spu_50003000_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_spu_50003000_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_spu_50003000_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_spu_50003000_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_spu_50003000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_spu_50003000_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_spu_50003000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_spu_50003000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_spu_50003000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_spu_50003000_ORD 49 +#define DT_N_S_soc_S_spu_50003000_ORD_STR_SORTABLE 00049 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_spu_50003000_REQUIRES_ORDS \ + 5, /* /soc */ \ + 6, /* /soc/interrupt-controller@e000e100 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_spu_50003000_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_spu_50003000_EXISTS 1 +#define DT_N_INST_0_nordic_nrf_spu DT_N_S_soc_S_spu_50003000 +#define DT_N_NODELABEL_spu DT_N_S_soc_S_spu_50003000 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_spu_50003000_REG_NUM 1 +#define DT_N_S_soc_S_spu_50003000_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spu_50003000_REG_IDX_0_VAL_ADDRESS 1342189568 /* 0x50003000 */ +#define DT_N_S_soc_S_spu_50003000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */ +#define DT_N_S_soc_S_spu_50003000_RANGES_NUM 0 +#define DT_N_S_soc_S_spu_50003000_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_spu_50003000_IRQ_NUM 1 +#define DT_N_S_soc_S_spu_50003000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spu_50003000_IRQ_IDX_0_VAL_irq 3 +#define DT_N_S_soc_S_spu_50003000_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_spu_50003000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spu_50003000_IRQ_IDX_0_VAL_priority 1 +#define DT_N_S_soc_S_spu_50003000_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_spu_50003000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_spu_50003000_IRQ_LEVEL 1 +#define DT_N_S_soc_S_spu_50003000_COMPAT_MATCHES_nordic_nrf_spu 1 +#define DT_N_S_soc_S_spu_50003000_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spu_50003000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor" +#define DT_N_S_soc_S_spu_50003000_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spu_50003000_COMPAT_MODEL_IDX_0 "nrf-spu" +#define DT_N_S_soc_S_spu_50003000_STATUS_okay 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_soc_S_spu_50003000_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_spu_50003000_P_wakeup_source 0 +#define DT_N_S_soc_S_spu_50003000_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_spu_50003000_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_spu_50003000_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_spu_50003000_P_status "okay" +#define DT_N_S_soc_S_spu_50003000_P_status_STRING_UNQUOTED okay +#define DT_N_S_soc_S_spu_50003000_P_status_STRING_TOKEN okay +#define DT_N_S_soc_S_spu_50003000_P_status_STRING_UPPER_TOKEN OKAY +#define DT_N_S_soc_S_spu_50003000_P_status_IDX_0 "okay" +#define DT_N_S_soc_S_spu_50003000_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spu_50003000_P_status_ENUM_IDX 1 +#define DT_N_S_soc_S_spu_50003000_P_status_ENUM_VAL_okay_EXISTS 1 +#define DT_N_S_soc_S_spu_50003000_P_status_ENUM_TOKEN okay +#define DT_N_S_soc_S_spu_50003000_P_status_ENUM_UPPER_TOKEN OKAY +#define DT_N_S_soc_S_spu_50003000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spu_50003000, status, 0) +#define DT_N_S_soc_S_spu_50003000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_spu_50003000, status, 0) +#define DT_N_S_soc_S_spu_50003000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_spu_50003000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_spu_50003000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_spu_50003000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_spu_50003000_P_status_LEN 1 +#define DT_N_S_soc_S_spu_50003000_P_status_EXISTS 1 +#define DT_N_S_soc_S_spu_50003000_P_compatible {"nordic,nrf-spu"} +#define DT_N_S_soc_S_spu_50003000_P_compatible_IDX_0 "nordic,nrf-spu" +#define DT_N_S_soc_S_spu_50003000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-spu +#define DT_N_S_soc_S_spu_50003000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_spu +#define DT_N_S_soc_S_spu_50003000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_SPU +#define DT_N_S_soc_S_spu_50003000_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spu_50003000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spu_50003000, compatible, 0) +#define DT_N_S_soc_S_spu_50003000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_spu_50003000, compatible, 0) +#define DT_N_S_soc_S_spu_50003000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_spu_50003000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_spu_50003000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_spu_50003000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_spu_50003000_P_compatible_LEN 1 +#define DT_N_S_soc_S_spu_50003000_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_spu_50003000_P_reg {1342189568 /* 0x50003000 */, 4096 /* 0x1000 */} +#define DT_N_S_soc_S_spu_50003000_P_reg_IDX_0 1342189568 +#define DT_N_S_soc_S_spu_50003000_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spu_50003000_P_reg_IDX_1 4096 +#define DT_N_S_soc_S_spu_50003000_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_spu_50003000_P_reg_EXISTS 1 +#define DT_N_S_soc_S_spu_50003000_P_interrupts {3 /* 0x3 */, 1 /* 0x1 */} +#define DT_N_S_soc_S_spu_50003000_P_interrupts_IDX_0 3 +#define DT_N_S_soc_S_spu_50003000_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spu_50003000_P_interrupts_IDX_1 1 +#define DT_N_S_soc_S_spu_50003000_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_spu_50003000_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_spu_50003000_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_spu_50003000_P_zephyr_deferred_init_EXISTS 1 + +/* + * Devicetree node: /soc/timer@e000e010 + * + * Node identifier: DT_N_S_soc_S_timer_e000e010 + * + * Binding (compatible = arm,armv8m-systick): + * $ZEPHYR_BASE/dts/bindings/timer/arm,armv8m-systick.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_timer_e000e010_PATH "/soc/timer@e000e010" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_timer_e000e010_FULL_NAME "timer@e000e010" + +/* Node parent (/soc) identifier: */ +#define DT_N_S_soc_S_timer_e000e010_PARENT DT_N_S_soc + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_timer_e000e010_CHILD_IDX 1 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_timer_e000e010_CHILD_NUM 0 +#define DT_N_S_soc_S_timer_e000e010_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_timer_e000e010_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_timer_e000e010_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_timer_e000e010_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_timer_e000e010_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_timer_e000e010_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_timer_e000e010_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_timer_e000e010_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_timer_e000e010_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_timer_e000e010_ORD 50 +#define DT_N_S_soc_S_timer_e000e010_ORD_STR_SORTABLE 00050 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_timer_e000e010_REQUIRES_ORDS \ + 5, /* /soc */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_timer_e000e010_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_timer_e000e010_EXISTS 1 +#define DT_N_INST_0_arm_armv8m_systick DT_N_S_soc_S_timer_e000e010 +#define DT_N_NODELABEL_systick DT_N_S_soc_S_timer_e000e010 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_timer_e000e010_REG_NUM 1 +#define DT_N_S_soc_S_timer_e000e010_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timer_e000e010_REG_IDX_0_VAL_ADDRESS 3758153744 /* 0xe000e010 */ +#define DT_N_S_soc_S_timer_e000e010_REG_IDX_0_VAL_SIZE 16 /* 0x10 */ +#define DT_N_S_soc_S_timer_e000e010_RANGES_NUM 0 +#define DT_N_S_soc_S_timer_e000e010_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_timer_e000e010_IRQ_NUM 0 +#define DT_N_S_soc_S_timer_e000e010_IRQ_LEVEL 0 +#define DT_N_S_soc_S_timer_e000e010_COMPAT_MATCHES_arm_armv8m_systick 1 +#define DT_N_S_soc_S_timer_e000e010_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timer_e000e010_COMPAT_VENDOR_IDX_0 "ARM Ltd." +#define DT_N_S_soc_S_timer_e000e010_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timer_e000e010_COMPAT_MODEL_IDX_0 "armv8m-systick" +#define DT_N_S_soc_S_timer_e000e010_STATUS_disabled 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_soc_S_timer_e000e010_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_timer_e000e010_P_wakeup_source 0 +#define DT_N_S_soc_S_timer_e000e010_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_timer_e000e010_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_timer_e000e010_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_timer_e000e010_P_status "disabled" +#define DT_N_S_soc_S_timer_e000e010_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_timer_e000e010_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_timer_e000e010_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_timer_e000e010_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_timer_e000e010_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timer_e000e010_P_status_ENUM_IDX 2 +#define DT_N_S_soc_S_timer_e000e010_P_status_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_timer_e000e010_P_status_ENUM_TOKEN disabled +#define DT_N_S_soc_S_timer_e000e010_P_status_ENUM_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_timer_e000e010_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timer_e000e010, status, 0) +#define DT_N_S_soc_S_timer_e000e010_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timer_e000e010, status, 0) +#define DT_N_S_soc_S_timer_e000e010_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timer_e000e010, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timer_e000e010_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timer_e000e010, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timer_e000e010_P_status_LEN 1 +#define DT_N_S_soc_S_timer_e000e010_P_status_EXISTS 1 +#define DT_N_S_soc_S_timer_e000e010_P_compatible {"arm,armv8m-systick"} +#define DT_N_S_soc_S_timer_e000e010_P_compatible_IDX_0 "arm,armv8m-systick" +#define DT_N_S_soc_S_timer_e000e010_P_compatible_IDX_0_STRING_UNQUOTED arm,armv8m-systick +#define DT_N_S_soc_S_timer_e000e010_P_compatible_IDX_0_STRING_TOKEN arm_armv8m_systick +#define DT_N_S_soc_S_timer_e000e010_P_compatible_IDX_0_STRING_UPPER_TOKEN ARM_ARMV8M_SYSTICK +#define DT_N_S_soc_S_timer_e000e010_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timer_e000e010_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timer_e000e010, compatible, 0) +#define DT_N_S_soc_S_timer_e000e010_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timer_e000e010, compatible, 0) +#define DT_N_S_soc_S_timer_e000e010_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timer_e000e010, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timer_e000e010_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timer_e000e010, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timer_e000e010_P_compatible_LEN 1 +#define DT_N_S_soc_S_timer_e000e010_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_timer_e000e010_P_reg {3758153744 /* 0xe000e010 */, 16 /* 0x10 */} +#define DT_N_S_soc_S_timer_e000e010_P_reg_IDX_0 3758153744 +#define DT_N_S_soc_S_timer_e000e010_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timer_e000e010_P_reg_IDX_1 16 +#define DT_N_S_soc_S_timer_e000e010_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_timer_e000e010_P_reg_EXISTS 1 +#define DT_N_S_soc_S_timer_e000e010_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_timer_e000e010_P_zephyr_deferred_init_EXISTS 1 + +/* + * Devicetree node: /soc/uicr@ff8000 + * + * Node identifier: DT_N_S_soc_S_uicr_ff8000 + * + * Binding (compatible = nordic,nrf-uicr): + * $ZEPHYR_BASE/dts/bindings/arm/nordic,nrf-uicr.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_uicr_ff8000_PATH "/soc/uicr@ff8000" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_uicr_ff8000_FULL_NAME "uicr@ff8000" + +/* Node parent (/soc) identifier: */ +#define DT_N_S_soc_S_uicr_ff8000_PARENT DT_N_S_soc + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_uicr_ff8000_CHILD_IDX 10 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_uicr_ff8000_CHILD_NUM 0 +#define DT_N_S_soc_S_uicr_ff8000_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_uicr_ff8000_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_uicr_ff8000_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_uicr_ff8000_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_uicr_ff8000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_uicr_ff8000_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_uicr_ff8000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_uicr_ff8000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_uicr_ff8000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_uicr_ff8000_ORD 51 +#define DT_N_S_soc_S_uicr_ff8000_ORD_STR_SORTABLE 00051 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_uicr_ff8000_REQUIRES_ORDS \ + 5, /* /soc */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_uicr_ff8000_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_uicr_ff8000_EXISTS 1 +#define DT_N_INST_0_nordic_nrf_uicr DT_N_S_soc_S_uicr_ff8000 +#define DT_N_NODELABEL_uicr DT_N_S_soc_S_uicr_ff8000 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_uicr_ff8000_REG_NUM 1 +#define DT_N_S_soc_S_uicr_ff8000_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_uicr_ff8000_REG_IDX_0_VAL_ADDRESS 16744448 /* 0xff8000 */ +#define DT_N_S_soc_S_uicr_ff8000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */ +#define DT_N_S_soc_S_uicr_ff8000_RANGES_NUM 0 +#define DT_N_S_soc_S_uicr_ff8000_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_uicr_ff8000_IRQ_NUM 0 +#define DT_N_S_soc_S_uicr_ff8000_IRQ_LEVEL 0 +#define DT_N_S_soc_S_uicr_ff8000_COMPAT_MATCHES_nordic_nrf_uicr 1 +#define DT_N_S_soc_S_uicr_ff8000_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_uicr_ff8000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor" +#define DT_N_S_soc_S_uicr_ff8000_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_uicr_ff8000_COMPAT_MODEL_IDX_0 "nrf-uicr" +#define DT_N_S_soc_S_uicr_ff8000_STATUS_okay 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_soc_S_uicr_ff8000_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_uicr_ff8000_P_wakeup_source 0 +#define DT_N_S_soc_S_uicr_ff8000_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_uicr_ff8000_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_uicr_ff8000_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_uicr_ff8000_P_status "okay" +#define DT_N_S_soc_S_uicr_ff8000_P_status_STRING_UNQUOTED okay +#define DT_N_S_soc_S_uicr_ff8000_P_status_STRING_TOKEN okay +#define DT_N_S_soc_S_uicr_ff8000_P_status_STRING_UPPER_TOKEN OKAY +#define DT_N_S_soc_S_uicr_ff8000_P_status_IDX_0 "okay" +#define DT_N_S_soc_S_uicr_ff8000_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_uicr_ff8000_P_status_ENUM_IDX 1 +#define DT_N_S_soc_S_uicr_ff8000_P_status_ENUM_VAL_okay_EXISTS 1 +#define DT_N_S_soc_S_uicr_ff8000_P_status_ENUM_TOKEN okay +#define DT_N_S_soc_S_uicr_ff8000_P_status_ENUM_UPPER_TOKEN OKAY +#define DT_N_S_soc_S_uicr_ff8000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_uicr_ff8000, status, 0) +#define DT_N_S_soc_S_uicr_ff8000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_uicr_ff8000, status, 0) +#define DT_N_S_soc_S_uicr_ff8000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_uicr_ff8000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_uicr_ff8000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_uicr_ff8000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_uicr_ff8000_P_status_LEN 1 +#define DT_N_S_soc_S_uicr_ff8000_P_status_EXISTS 1 +#define DT_N_S_soc_S_uicr_ff8000_P_compatible {"nordic,nrf-uicr"} +#define DT_N_S_soc_S_uicr_ff8000_P_compatible_IDX_0 "nordic,nrf-uicr" +#define DT_N_S_soc_S_uicr_ff8000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-uicr +#define DT_N_S_soc_S_uicr_ff8000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_uicr +#define DT_N_S_soc_S_uicr_ff8000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_UICR +#define DT_N_S_soc_S_uicr_ff8000_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_uicr_ff8000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_uicr_ff8000, compatible, 0) +#define DT_N_S_soc_S_uicr_ff8000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_uicr_ff8000, compatible, 0) +#define DT_N_S_soc_S_uicr_ff8000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_uicr_ff8000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_uicr_ff8000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_uicr_ff8000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_uicr_ff8000_P_compatible_LEN 1 +#define DT_N_S_soc_S_uicr_ff8000_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_uicr_ff8000_P_reg {16744448 /* 0xff8000 */, 4096 /* 0x1000 */} +#define DT_N_S_soc_S_uicr_ff8000_P_reg_IDX_0 16744448 +#define DT_N_S_soc_S_uicr_ff8000_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_uicr_ff8000_P_reg_IDX_1 4096 +#define DT_N_S_soc_S_uicr_ff8000_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_uicr_ff8000_P_reg_EXISTS 1 +#define DT_N_S_soc_S_uicr_ff8000_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_uicr_ff8000_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_uicr_ff8000_P_nfct_pins_as_gpios 0 +#define DT_N_S_soc_S_uicr_ff8000_P_nfct_pins_as_gpios_EXISTS 1 +#define DT_N_S_soc_S_uicr_ff8000_P_gpio_as_nreset 0 +#define DT_N_S_soc_S_uicr_ff8000_P_gpio_as_nreset_EXISTS 1 + +/* + * Devicetree node: /soc/peripheral@50000000/adc@e000 + * + * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_adc_e000 + * + * Binding (compatible = nordic,nrf-saadc): + * $ZEPHYR_BASE/dts/bindings/adc/nordic,nrf-saadc.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_PATH "/soc/peripheral@50000000/adc@e000" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_FULL_NAME "adc@e000" + +/* Node parent (/soc/peripheral@50000000) identifier: */ +#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_PARENT DT_N_S_soc_S_peripheral_50000000 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_CHILD_IDX 1 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_CHILD_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_ORD 52 +#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_ORD_STR_SORTABLE 00052 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_REQUIRES_ORDS \ + 6, /* /soc/interrupt-controller@e000e100 */ \ + 8, /* /soc/peripheral@50000000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_EXISTS 1 +#define DT_N_INST_0_nordic_nrf_saadc DT_N_S_soc_S_peripheral_50000000_S_adc_e000 +#define DT_N_NODELABEL_adc DT_N_S_soc_S_peripheral_50000000_S_adc_e000 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_REG_NUM 1 +#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_REG_IDX_0_VAL_ADDRESS 1342234624 /* 0x5000e000 */ +#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */ +#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_RANGES_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_IRQ_NUM 1 +#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_IRQ_IDX_0_VAL_irq 14 +#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_IRQ_IDX_0_VAL_priority 1 +#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_IRQ_LEVEL 1 +#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_COMPAT_MATCHES_nordic_nrf_saadc 1 +#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor" +#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_COMPAT_MODEL_IDX_0 "nrf-saadc" +#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_STATUS_okay 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_P_wakeup_source 0 +#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_P_status "okay" +#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_P_status_STRING_UNQUOTED okay +#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_P_status_STRING_TOKEN okay +#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_P_status_STRING_UPPER_TOKEN OKAY +#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_P_status_IDX_0 "okay" +#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_P_status_ENUM_IDX 1 +#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_P_status_ENUM_VAL_okay_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_P_status_ENUM_TOKEN okay +#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_P_status_ENUM_UPPER_TOKEN OKAY +#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_adc_e000, status, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_adc_e000, status, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_adc_e000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_adc_e000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_P_status_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_P_status_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_P_compatible {"nordic,nrf-saadc"} +#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_P_compatible_IDX_0 "nordic,nrf-saadc" +#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-saadc +#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_saadc +#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_SAADC +#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_adc_e000, compatible, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_adc_e000, compatible, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_adc_e000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_adc_e000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_P_compatible_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_P_reg {57344 /* 0xe000 */, 4096 /* 0x1000 */} +#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_P_reg_IDX_0 57344 +#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_P_reg_IDX_1 4096 +#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_P_reg_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_P_interrupts {14 /* 0xe */, 1 /* 0x1 */} +#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_P_interrupts_IDX_0 14 +#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_P_interrupts_IDX_1 1 +#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_P_zephyr_deferred_init_EXISTS 1 + +/* + * Devicetree node: /soc/peripheral@50000000/clock@5000 + * + * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_clock_5000 + * + * Binding (compatible = nordic,nrf-clock): + * $ZEPHYR_BASE/dts/bindings/clock/nordic,nrf-clock.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_PATH "/soc/peripheral@50000000/clock@5000" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_FULL_NAME "clock@5000" + +/* Node parent (/soc/peripheral@50000000) identifier: */ +#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_PARENT DT_N_S_soc_S_peripheral_50000000 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_CHILD_IDX 34 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_CHILD_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_ORD 53 +#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_ORD_STR_SORTABLE 00053 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_REQUIRES_ORDS \ + 6, /* /soc/interrupt-controller@e000e100 */ \ + 8, /* /soc/peripheral@50000000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_EXISTS 1 +#define DT_N_INST_0_nordic_nrf_clock DT_N_S_soc_S_peripheral_50000000_S_clock_5000 +#define DT_N_NODELABEL_clock DT_N_S_soc_S_peripheral_50000000_S_clock_5000 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_REG_NUM 1 +#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_REG_IDX_0_VAL_ADDRESS 1342197760 /* 0x50005000 */ +#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */ +#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_RANGES_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_IRQ_NUM 1 +#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_IRQ_IDX_0_VAL_irq 5 +#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_IRQ_IDX_0_VAL_priority 1 +#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_IRQ_LEVEL 1 +#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_COMPAT_MATCHES_nordic_nrf_clock 1 +#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor" +#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_COMPAT_MODEL_IDX_0 "nrf-clock" +#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_STATUS_okay 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_P_wakeup_source 0 +#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_P_status "okay" +#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_P_status_STRING_UNQUOTED okay +#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_P_status_STRING_TOKEN okay +#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_P_status_STRING_UPPER_TOKEN OKAY +#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_P_status_IDX_0 "okay" +#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_P_status_ENUM_IDX 1 +#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_P_status_ENUM_VAL_okay_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_P_status_ENUM_TOKEN okay +#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_P_status_ENUM_UPPER_TOKEN OKAY +#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_clock_5000, status, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_clock_5000, status, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_clock_5000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_clock_5000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_P_status_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_P_status_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_P_compatible {"nordic,nrf-clock"} +#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_P_compatible_IDX_0 "nordic,nrf-clock" +#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-clock +#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_clock +#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_CLOCK +#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_clock_5000, compatible, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_clock_5000, compatible, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_clock_5000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_clock_5000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_P_compatible_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_P_reg {20480 /* 0x5000 */, 4096 /* 0x1000 */} +#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_P_reg_IDX_0 20480 +#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_P_reg_IDX_1 4096 +#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_P_reg_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_P_interrupts {5 /* 0x5 */, 1 /* 0x1 */} +#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_P_interrupts_IDX_0 5 +#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_P_interrupts_IDX_1 1 +#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_P_zephyr_deferred_init_EXISTS 1 + +/* + * Devicetree node: /soc/peripheral@50000000/dppic@17000 + * + * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_dppic_17000 + * + * Binding (compatible = nordic,nrf-dppic): + * $ZEPHYR_BASE/dts/bindings/misc/nordic,nrf-dppic.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_PATH "/soc/peripheral@50000000/dppic@17000" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_FULL_NAME "dppic@17000" + +/* Node parent (/soc/peripheral@50000000) identifier: */ +#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_PARENT DT_N_S_soc_S_peripheral_50000000 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_CHILD_IDX 2 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_CHILD_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_ORD 54 +#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_ORD_STR_SORTABLE 00054 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_REQUIRES_ORDS \ + 8, /* /soc/peripheral@50000000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_EXISTS 1 +#define DT_N_INST_0_nordic_nrf_dppic DT_N_S_soc_S_peripheral_50000000_S_dppic_17000 +#define DT_N_NODELABEL_dppic DT_N_S_soc_S_peripheral_50000000_S_dppic_17000 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_REG_NUM 1 +#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_REG_IDX_0_VAL_ADDRESS 1342271488 /* 0x50017000 */ +#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */ +#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_RANGES_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_IRQ_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_IRQ_LEVEL 0 +#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_COMPAT_MATCHES_nordic_nrf_dppic 1 +#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor" +#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_COMPAT_MODEL_IDX_0 "nrf-dppic" +#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_STATUS_okay 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_P_wakeup_source 0 +#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_P_status "okay" +#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_P_status_STRING_UNQUOTED okay +#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_P_status_STRING_TOKEN okay +#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_P_status_STRING_UPPER_TOKEN OKAY +#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_P_status_IDX_0 "okay" +#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_P_status_ENUM_IDX 1 +#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_P_status_ENUM_VAL_okay_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_P_status_ENUM_TOKEN okay +#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_P_status_ENUM_UPPER_TOKEN OKAY +#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_dppic_17000, status, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_dppic_17000, status, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_dppic_17000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_dppic_17000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_P_status_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_P_status_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_P_compatible {"nordic,nrf-dppic"} +#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_P_compatible_IDX_0 "nordic,nrf-dppic" +#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-dppic +#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_dppic +#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_DPPIC +#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_dppic_17000, compatible, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_dppic_17000, compatible, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_dppic_17000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_dppic_17000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_P_compatible_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_P_reg {94208 /* 0x17000 */, 4096 /* 0x1000 */} +#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_P_reg_IDX_0 94208 +#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_P_reg_IDX_1 4096 +#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_P_reg_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_P_zephyr_deferred_init_EXISTS 1 + +/* + * Devicetree node: /soc/peripheral@50000000/egu@1b000 + * + * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_egu_1b000 + * + * Binding (compatible = nordic,nrf-egu): + * $ZEPHYR_BASE/dts/bindings/arm/nordic,nrf-egu.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_PATH "/soc/peripheral@50000000/egu@1b000" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_FULL_NAME "egu@1b000" + +/* Node parent (/soc/peripheral@50000000) identifier: */ +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_PARENT DT_N_S_soc_S_peripheral_50000000 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_CHILD_IDX 3 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_CHILD_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_ORD 55 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_ORD_STR_SORTABLE 00055 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_REQUIRES_ORDS \ + 6, /* /soc/interrupt-controller@e000e100 */ \ + 8, /* /soc/peripheral@50000000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_EXISTS 1 +#define DT_N_INST_0_nordic_nrf_egu DT_N_S_soc_S_peripheral_50000000_S_egu_1b000 +#define DT_N_NODELABEL_egu0 DT_N_S_soc_S_peripheral_50000000_S_egu_1b000 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_REG_NUM 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_REG_IDX_0_VAL_ADDRESS 1342287872 /* 0x5001b000 */ +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */ +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_RANGES_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_IRQ_NUM 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_IRQ_IDX_0_VAL_irq 27 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_IRQ_IDX_0_VAL_priority 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_IRQ_LEVEL 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_COMPAT_MATCHES_nordic_nrf_egu 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor" +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_COMPAT_MODEL_IDX_0 "nrf-egu" +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_STATUS_okay 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_P_wakeup_source 0 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_P_status "okay" +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_P_status_STRING_UNQUOTED okay +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_P_status_STRING_TOKEN okay +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_P_status_STRING_UPPER_TOKEN OKAY +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_P_status_IDX_0 "okay" +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_P_status_ENUM_IDX 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_P_status_ENUM_VAL_okay_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_P_status_ENUM_TOKEN okay +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_P_status_ENUM_UPPER_TOKEN OKAY +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1b000, status, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1b000, status, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1b000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1b000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_P_status_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_P_status_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_P_compatible {"nordic,nrf-egu"} +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_P_compatible_IDX_0 "nordic,nrf-egu" +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-egu +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_egu +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_EGU +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1b000, compatible, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1b000, compatible, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1b000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1b000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_P_compatible_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_P_reg {110592 /* 0x1b000 */, 4096 /* 0x1000 */} +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_P_reg_IDX_0 110592 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_P_reg_IDX_1 4096 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_P_reg_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_P_interrupts {27 /* 0x1b */, 1 /* 0x1 */} +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_P_interrupts_IDX_0 27 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_P_interrupts_IDX_1 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_P_zephyr_deferred_init_EXISTS 1 + +/* + * Devicetree node: /soc/peripheral@50000000/egu@1c000 + * + * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_egu_1c000 + * + * Binding (compatible = nordic,nrf-egu): + * $ZEPHYR_BASE/dts/bindings/arm/nordic,nrf-egu.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_PATH "/soc/peripheral@50000000/egu@1c000" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_FULL_NAME "egu@1c000" + +/* Node parent (/soc/peripheral@50000000) identifier: */ +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_PARENT DT_N_S_soc_S_peripheral_50000000 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_CHILD_IDX 4 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_CHILD_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_ORD 56 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_ORD_STR_SORTABLE 00056 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_REQUIRES_ORDS \ + 6, /* /soc/interrupt-controller@e000e100 */ \ + 8, /* /soc/peripheral@50000000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_EXISTS 1 +#define DT_N_INST_1_nordic_nrf_egu DT_N_S_soc_S_peripheral_50000000_S_egu_1c000 +#define DT_N_NODELABEL_egu1 DT_N_S_soc_S_peripheral_50000000_S_egu_1c000 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_REG_NUM 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_REG_IDX_0_VAL_ADDRESS 1342291968 /* 0x5001c000 */ +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */ +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_RANGES_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_IRQ_NUM 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_IRQ_IDX_0_VAL_irq 28 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_IRQ_IDX_0_VAL_priority 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_IRQ_LEVEL 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_COMPAT_MATCHES_nordic_nrf_egu 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor" +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_COMPAT_MODEL_IDX_0 "nrf-egu" +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_STATUS_okay 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_P_wakeup_source 0 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_P_status "okay" +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_P_status_STRING_UNQUOTED okay +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_P_status_STRING_TOKEN okay +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_P_status_STRING_UPPER_TOKEN OKAY +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_P_status_IDX_0 "okay" +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_P_status_ENUM_IDX 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_P_status_ENUM_VAL_okay_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_P_status_ENUM_TOKEN okay +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_P_status_ENUM_UPPER_TOKEN OKAY +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1c000, status, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1c000, status, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1c000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1c000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_P_status_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_P_status_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_P_compatible {"nordic,nrf-egu"} +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_P_compatible_IDX_0 "nordic,nrf-egu" +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-egu +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_egu +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_EGU +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1c000, compatible, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1c000, compatible, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1c000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1c000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_P_compatible_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_P_reg {114688 /* 0x1c000 */, 4096 /* 0x1000 */} +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_P_reg_IDX_0 114688 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_P_reg_IDX_1 4096 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_P_reg_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_P_interrupts {28 /* 0x1c */, 1 /* 0x1 */} +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_P_interrupts_IDX_0 28 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_P_interrupts_IDX_1 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_P_zephyr_deferred_init_EXISTS 1 + +/* + * Devicetree node: /soc/peripheral@50000000/egu@1d000 + * + * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_egu_1d000 + * + * Binding (compatible = nordic,nrf-egu): + * $ZEPHYR_BASE/dts/bindings/arm/nordic,nrf-egu.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_PATH "/soc/peripheral@50000000/egu@1d000" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_FULL_NAME "egu@1d000" + +/* Node parent (/soc/peripheral@50000000) identifier: */ +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_PARENT DT_N_S_soc_S_peripheral_50000000 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_CHILD_IDX 5 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_CHILD_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_ORD 57 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_ORD_STR_SORTABLE 00057 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_REQUIRES_ORDS \ + 6, /* /soc/interrupt-controller@e000e100 */ \ + 8, /* /soc/peripheral@50000000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_EXISTS 1 +#define DT_N_INST_2_nordic_nrf_egu DT_N_S_soc_S_peripheral_50000000_S_egu_1d000 +#define DT_N_NODELABEL_egu2 DT_N_S_soc_S_peripheral_50000000_S_egu_1d000 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_REG_NUM 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_REG_IDX_0_VAL_ADDRESS 1342296064 /* 0x5001d000 */ +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */ +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_RANGES_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_IRQ_NUM 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_IRQ_IDX_0_VAL_irq 29 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_IRQ_IDX_0_VAL_priority 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_IRQ_LEVEL 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_COMPAT_MATCHES_nordic_nrf_egu 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor" +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_COMPAT_MODEL_IDX_0 "nrf-egu" +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_STATUS_okay 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_P_wakeup_source 0 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_P_status "okay" +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_P_status_STRING_UNQUOTED okay +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_P_status_STRING_TOKEN okay +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_P_status_STRING_UPPER_TOKEN OKAY +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_P_status_IDX_0 "okay" +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_P_status_ENUM_IDX 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_P_status_ENUM_VAL_okay_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_P_status_ENUM_TOKEN okay +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_P_status_ENUM_UPPER_TOKEN OKAY +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1d000, status, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1d000, status, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1d000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1d000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_P_status_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_P_status_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_P_compatible {"nordic,nrf-egu"} +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_P_compatible_IDX_0 "nordic,nrf-egu" +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-egu +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_egu +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_EGU +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1d000, compatible, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1d000, compatible, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1d000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1d000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_P_compatible_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_P_reg {118784 /* 0x1d000 */, 4096 /* 0x1000 */} +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_P_reg_IDX_0 118784 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_P_reg_IDX_1 4096 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_P_reg_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_P_interrupts {29 /* 0x1d */, 1 /* 0x1 */} +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_P_interrupts_IDX_0 29 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_P_interrupts_IDX_1 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_P_zephyr_deferred_init_EXISTS 1 + +/* + * Devicetree node: /soc/peripheral@50000000/egu@1e000 + * + * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_egu_1e000 + * + * Binding (compatible = nordic,nrf-egu): + * $ZEPHYR_BASE/dts/bindings/arm/nordic,nrf-egu.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_PATH "/soc/peripheral@50000000/egu@1e000" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_FULL_NAME "egu@1e000" + +/* Node parent (/soc/peripheral@50000000) identifier: */ +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_PARENT DT_N_S_soc_S_peripheral_50000000 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_CHILD_IDX 6 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_CHILD_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_ORD 58 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_ORD_STR_SORTABLE 00058 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_REQUIRES_ORDS \ + 6, /* /soc/interrupt-controller@e000e100 */ \ + 8, /* /soc/peripheral@50000000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_EXISTS 1 +#define DT_N_INST_3_nordic_nrf_egu DT_N_S_soc_S_peripheral_50000000_S_egu_1e000 +#define DT_N_NODELABEL_egu3 DT_N_S_soc_S_peripheral_50000000_S_egu_1e000 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_REG_NUM 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_REG_IDX_0_VAL_ADDRESS 1342300160 /* 0x5001e000 */ +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */ +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_RANGES_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_IRQ_NUM 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_IRQ_IDX_0_VAL_irq 30 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_IRQ_IDX_0_VAL_priority 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_IRQ_LEVEL 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_COMPAT_MATCHES_nordic_nrf_egu 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor" +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_COMPAT_MODEL_IDX_0 "nrf-egu" +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_STATUS_okay 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_P_wakeup_source 0 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_P_status "okay" +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_P_status_STRING_UNQUOTED okay +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_P_status_STRING_TOKEN okay +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_P_status_STRING_UPPER_TOKEN OKAY +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_P_status_IDX_0 "okay" +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_P_status_ENUM_IDX 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_P_status_ENUM_VAL_okay_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_P_status_ENUM_TOKEN okay +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_P_status_ENUM_UPPER_TOKEN OKAY +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1e000, status, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1e000, status, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1e000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1e000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_P_status_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_P_status_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_P_compatible {"nordic,nrf-egu"} +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_P_compatible_IDX_0 "nordic,nrf-egu" +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-egu +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_egu +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_EGU +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1e000, compatible, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1e000, compatible, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1e000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1e000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_P_compatible_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_P_reg {122880 /* 0x1e000 */, 4096 /* 0x1000 */} +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_P_reg_IDX_0 122880 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_P_reg_IDX_1 4096 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_P_reg_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_P_interrupts {30 /* 0x1e */, 1 /* 0x1 */} +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_P_interrupts_IDX_0 30 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_P_interrupts_IDX_1 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_P_zephyr_deferred_init_EXISTS 1 + +/* + * Devicetree node: /soc/peripheral@50000000/egu@1f000 + * + * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_egu_1f000 + * + * Binding (compatible = nordic,nrf-egu): + * $ZEPHYR_BASE/dts/bindings/arm/nordic,nrf-egu.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_PATH "/soc/peripheral@50000000/egu@1f000" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_FULL_NAME "egu@1f000" + +/* Node parent (/soc/peripheral@50000000) identifier: */ +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_PARENT DT_N_S_soc_S_peripheral_50000000 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_CHILD_IDX 7 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_CHILD_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_ORD 59 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_ORD_STR_SORTABLE 00059 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_REQUIRES_ORDS \ + 6, /* /soc/interrupt-controller@e000e100 */ \ + 8, /* /soc/peripheral@50000000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_EXISTS 1 +#define DT_N_INST_4_nordic_nrf_egu DT_N_S_soc_S_peripheral_50000000_S_egu_1f000 +#define DT_N_NODELABEL_egu4 DT_N_S_soc_S_peripheral_50000000_S_egu_1f000 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_REG_NUM 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_REG_IDX_0_VAL_ADDRESS 1342304256 /* 0x5001f000 */ +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */ +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_RANGES_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_IRQ_NUM 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_IRQ_IDX_0_VAL_irq 31 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_IRQ_IDX_0_VAL_priority 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_IRQ_LEVEL 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_COMPAT_MATCHES_nordic_nrf_egu 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor" +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_COMPAT_MODEL_IDX_0 "nrf-egu" +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_STATUS_okay 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_P_wakeup_source 0 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_P_status "okay" +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_P_status_STRING_UNQUOTED okay +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_P_status_STRING_TOKEN okay +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_P_status_STRING_UPPER_TOKEN OKAY +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_P_status_IDX_0 "okay" +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_P_status_ENUM_IDX 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_P_status_ENUM_VAL_okay_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_P_status_ENUM_TOKEN okay +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_P_status_ENUM_UPPER_TOKEN OKAY +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1f000, status, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1f000, status, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1f000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1f000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_P_status_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_P_status_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_P_compatible {"nordic,nrf-egu"} +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_P_compatible_IDX_0 "nordic,nrf-egu" +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-egu +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_egu +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_EGU +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1f000, compatible, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1f000, compatible, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1f000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1f000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_P_compatible_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_P_reg {126976 /* 0x1f000 */, 4096 /* 0x1000 */} +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_P_reg_IDX_0 126976 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_P_reg_IDX_1 4096 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_P_reg_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_P_interrupts {31 /* 0x1f */, 1 /* 0x1 */} +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_P_interrupts_IDX_0 31 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_P_interrupts_IDX_1 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_P_zephyr_deferred_init_EXISTS 1 + +/* + * Devicetree node: /soc/peripheral@50000000/egu@20000 + * + * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_egu_20000 + * + * Binding (compatible = nordic,nrf-egu): + * $ZEPHYR_BASE/dts/bindings/arm/nordic,nrf-egu.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_PATH "/soc/peripheral@50000000/egu@20000" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_FULL_NAME "egu@20000" + +/* Node parent (/soc/peripheral@50000000) identifier: */ +#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_PARENT DT_N_S_soc_S_peripheral_50000000 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_CHILD_IDX 8 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_CHILD_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_ORD 60 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_ORD_STR_SORTABLE 00060 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_REQUIRES_ORDS \ + 6, /* /soc/interrupt-controller@e000e100 */ \ + 8, /* /soc/peripheral@50000000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_EXISTS 1 +#define DT_N_INST_5_nordic_nrf_egu DT_N_S_soc_S_peripheral_50000000_S_egu_20000 +#define DT_N_NODELABEL_egu5 DT_N_S_soc_S_peripheral_50000000_S_egu_20000 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_REG_NUM 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_REG_IDX_0_VAL_ADDRESS 1342308352 /* 0x50020000 */ +#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */ +#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_RANGES_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_IRQ_NUM 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_IRQ_IDX_0_VAL_irq 32 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_IRQ_IDX_0_VAL_priority 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_IRQ_LEVEL 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_COMPAT_MATCHES_nordic_nrf_egu 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor" +#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_COMPAT_MODEL_IDX_0 "nrf-egu" +#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_STATUS_okay 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_P_wakeup_source 0 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_P_status "okay" +#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_P_status_STRING_UNQUOTED okay +#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_P_status_STRING_TOKEN okay +#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_P_status_STRING_UPPER_TOKEN OKAY +#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_P_status_IDX_0 "okay" +#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_P_status_ENUM_IDX 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_P_status_ENUM_VAL_okay_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_P_status_ENUM_TOKEN okay +#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_P_status_ENUM_UPPER_TOKEN OKAY +#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_20000, status, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_20000, status, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_20000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_20000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_P_status_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_P_status_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_P_compatible {"nordic,nrf-egu"} +#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_P_compatible_IDX_0 "nordic,nrf-egu" +#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-egu +#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_egu +#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_EGU +#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_20000, compatible, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_20000, compatible, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_20000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_20000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_P_compatible_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_P_reg {131072 /* 0x20000 */, 4096 /* 0x1000 */} +#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_P_reg_IDX_0 131072 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_P_reg_IDX_1 4096 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_P_reg_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_P_interrupts {32 /* 0x20 */, 1 /* 0x1 */} +#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_P_interrupts_IDX_0 32 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_P_interrupts_IDX_1 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_P_zephyr_deferred_init_EXISTS 1 + +/* + * Devicetree node: /soc/peripheral@50000000/i2c@8000 + * + * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_i2c_8000 + * + * Binding (compatible = nordic,nrf-twim): + * $ZEPHYR_BASE/dts/bindings/i2c/nordic,nrf-twim.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_PATH "/soc/peripheral@50000000/i2c@8000" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_FULL_NAME "i2c@8000" + +/* Node parent (/soc/peripheral@50000000) identifier: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_PARENT DT_N_S_soc_S_peripheral_50000000 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_CHILD_IDX 19 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_CHILD_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_ORD 61 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_ORD_STR_SORTABLE 00061 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_REQUIRES_ORDS \ + 6, /* /soc/interrupt-controller@e000e100 */ \ + 8, /* /soc/peripheral@50000000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_EXISTS 1 +#define DT_N_INST_1_nordic_nrf_twim DT_N_S_soc_S_peripheral_50000000_S_i2c_8000 +#define DT_N_NODELABEL_i2c0 DT_N_S_soc_S_peripheral_50000000_S_i2c_8000 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_REG_NUM 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_REG_IDX_0_VAL_ADDRESS 1342210048 /* 0x50008000 */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_RANGES_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_IRQ_NUM 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_IRQ_IDX_0_VAL_irq 8 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_IRQ_IDX_0_VAL_priority 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_IRQ_LEVEL 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_COMPAT_MATCHES_nordic_nrf_twim 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor" +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_COMPAT_MODEL_IDX_0 "nrf-twim" +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_STATUS_disabled 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_wakeup_source 0 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_status "disabled" +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_status_ENUM_IDX 2 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_status_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_status_ENUM_TOKEN disabled +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_status_ENUM_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_8000, status, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_8000, status, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_8000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_8000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_status_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_status_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_compatible {"nordic,nrf-twim"} +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_compatible_IDX_0 "nordic,nrf-twim" +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-twim +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_twim +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_TWIM +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_8000, compatible, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_8000, compatible, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_8000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_8000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_compatible_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_reg {32768 /* 0x8000 */, 4096 /* 0x1000 */} +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_reg_IDX_0 32768 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_reg_IDX_1 4096 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_reg_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_interrupts {8 /* 0x8 */, 1 /* 0x1 */} +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_interrupts_IDX_0 8 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_interrupts_IDX_1 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_clock_frequency 100000 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_clock_frequency_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_sq_size 4 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_sq_size_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_cq_size 4 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_cq_size_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_easydma_maxcnt_bits 13 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_easydma_maxcnt_bits_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_zephyr_concat_buf_size 16 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_zephyr_concat_buf_size_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_zephyr_flash_buf_max_size 16 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_zephyr_flash_buf_max_size_EXISTS 1 + +/* + * Devicetree node: /soc/peripheral@50000000/i2c@9000 + * + * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_i2c_9000 + * + * Binding (compatible = nordic,nrf-twim): + * $ZEPHYR_BASE/dts/bindings/i2c/nordic,nrf-twim.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_PATH "/soc/peripheral@50000000/i2c@9000" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_FULL_NAME "i2c@9000" + +/* Node parent (/soc/peripheral@50000000) identifier: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_PARENT DT_N_S_soc_S_peripheral_50000000 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_CHILD_IDX 20 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_CHILD_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_ORD 62 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_ORD_STR_SORTABLE 00062 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_REQUIRES_ORDS \ + 6, /* /soc/interrupt-controller@e000e100 */ \ + 8, /* /soc/peripheral@50000000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_EXISTS 1 +#define DT_N_INST_2_nordic_nrf_twim DT_N_S_soc_S_peripheral_50000000_S_i2c_9000 +#define DT_N_NODELABEL_i2c1 DT_N_S_soc_S_peripheral_50000000_S_i2c_9000 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_REG_NUM 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_REG_IDX_0_VAL_ADDRESS 1342214144 /* 0x50009000 */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_RANGES_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_IRQ_NUM 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_IRQ_IDX_0_VAL_irq 9 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_IRQ_IDX_0_VAL_priority 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_IRQ_LEVEL 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_COMPAT_MATCHES_nordic_nrf_twim 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor" +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_COMPAT_MODEL_IDX_0 "nrf-twim" +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_STATUS_disabled 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_wakeup_source 0 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_status "disabled" +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_status_ENUM_IDX 2 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_status_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_status_ENUM_TOKEN disabled +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_status_ENUM_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_9000, status, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_9000, status, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_9000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_9000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_status_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_status_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_compatible {"nordic,nrf-twim"} +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_compatible_IDX_0 "nordic,nrf-twim" +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-twim +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_twim +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_TWIM +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_9000, compatible, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_9000, compatible, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_9000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_9000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_compatible_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_reg {36864 /* 0x9000 */, 4096 /* 0x1000 */} +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_reg_IDX_0 36864 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_reg_IDX_1 4096 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_reg_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_interrupts {9 /* 0x9 */, 1 /* 0x1 */} +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_interrupts_IDX_0 9 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_interrupts_IDX_1 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_clock_frequency 100000 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_clock_frequency_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_sq_size 4 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_sq_size_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_cq_size 4 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_cq_size_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_easydma_maxcnt_bits 13 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_easydma_maxcnt_bits_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_zephyr_concat_buf_size 16 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_zephyr_concat_buf_size_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_zephyr_flash_buf_max_size 16 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_zephyr_flash_buf_max_size_EXISTS 1 + +/* + * Devicetree node: /soc/peripheral@50000000/i2c@b000 + * + * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_i2c_b000 + * + * Binding (compatible = nordic,nrf-twim): + * $ZEPHYR_BASE/dts/bindings/i2c/nordic,nrf-twim.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_PATH "/soc/peripheral@50000000/i2c@b000" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_FULL_NAME "i2c@b000" + +/* Node parent (/soc/peripheral@50000000) identifier: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_PARENT DT_N_S_soc_S_peripheral_50000000 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_CHILD_IDX 22 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_CHILD_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_ORD 63 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_ORD_STR_SORTABLE 00063 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_REQUIRES_ORDS \ + 6, /* /soc/interrupt-controller@e000e100 */ \ + 8, /* /soc/peripheral@50000000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_EXISTS 1 +#define DT_N_INST_3_nordic_nrf_twim DT_N_S_soc_S_peripheral_50000000_S_i2c_b000 +#define DT_N_NODELABEL_i2c3 DT_N_S_soc_S_peripheral_50000000_S_i2c_b000 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_REG_NUM 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_REG_IDX_0_VAL_ADDRESS 1342222336 /* 0x5000b000 */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_RANGES_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_IRQ_NUM 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_IRQ_IDX_0_VAL_irq 11 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_IRQ_IDX_0_VAL_priority 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_IRQ_LEVEL 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_COMPAT_MATCHES_nordic_nrf_twim 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor" +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_COMPAT_MODEL_IDX_0 "nrf-twim" +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_STATUS_disabled 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_wakeup_source 0 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_status "disabled" +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_status_ENUM_IDX 2 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_status_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_status_ENUM_TOKEN disabled +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_status_ENUM_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_b000, status, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_b000, status, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_b000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_b000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_status_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_status_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_compatible {"nordic,nrf-twim"} +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_compatible_IDX_0 "nordic,nrf-twim" +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-twim +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_twim +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_TWIM +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_b000, compatible, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_b000, compatible, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_b000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_b000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_compatible_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_reg {45056 /* 0xb000 */, 4096 /* 0x1000 */} +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_reg_IDX_0 45056 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_reg_IDX_1 4096 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_reg_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_interrupts {11 /* 0xb */, 1 /* 0x1 */} +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_interrupts_IDX_0 11 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_interrupts_IDX_1 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_clock_frequency 100000 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_clock_frequency_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_sq_size 4 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_sq_size_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_cq_size 4 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_cq_size_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_easydma_maxcnt_bits 13 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_easydma_maxcnt_bits_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_zephyr_concat_buf_size 16 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_zephyr_concat_buf_size_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_zephyr_flash_buf_max_size 16 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_zephyr_flash_buf_max_size_EXISTS 1 + +/* + * Devicetree node: /soc/peripheral@50000000/i2s@28000 + * + * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_i2s_28000 + * + * Binding (compatible = nordic,nrf-i2s): + * $ZEPHYR_BASE/dts/bindings/i2s/nordic,nrf-i2s.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_PATH "/soc/peripheral@50000000/i2s@28000" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_FULL_NAME "i2s@28000" + +/* Node parent (/soc/peripheral@50000000) identifier: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_PARENT DT_N_S_soc_S_peripheral_50000000 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_CHILD_IDX 10 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_CHILD_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_ORD 64 +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_ORD_STR_SORTABLE 00064 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_REQUIRES_ORDS \ + 6, /* /soc/interrupt-controller@e000e100 */ \ + 8, /* /soc/peripheral@50000000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_EXISTS 1 +#define DT_N_INST_0_nordic_nrf_i2s DT_N_S_soc_S_peripheral_50000000_S_i2s_28000 +#define DT_N_NODELABEL_i2s0 DT_N_S_soc_S_peripheral_50000000_S_i2s_28000 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_REG_NUM 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_REG_IDX_0_VAL_ADDRESS 1342341120 /* 0x50028000 */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_RANGES_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_IRQ_NUM 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_IRQ_IDX_0_VAL_irq 40 +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_IRQ_IDX_0_VAL_priority 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_IRQ_LEVEL 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_COMPAT_MATCHES_nordic_nrf_i2s 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor" +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_COMPAT_MODEL_IDX_0 "nrf-i2s" +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_STATUS_disabled 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_wakeup_source 0 +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_status "disabled" +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_status_ENUM_IDX 2 +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_status_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_status_ENUM_TOKEN disabled +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_status_ENUM_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_i2s_28000, status, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_i2s_28000, status, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_i2s_28000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_i2s_28000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_status_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_status_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_compatible {"nordic,nrf-i2s"} +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_compatible_IDX_0 "nordic,nrf-i2s" +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-i2s +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_i2s +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_I2S +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_i2s_28000, compatible, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_i2s_28000, compatible, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_i2s_28000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_i2s_28000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_compatible_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_reg {163840 /* 0x28000 */, 4096 /* 0x1000 */} +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_reg_IDX_0 163840 +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_reg_IDX_1 4096 +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_reg_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_interrupts {40 /* 0x28 */, 1 /* 0x1 */} +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_interrupts_IDX_0 40 +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_interrupts_IDX_1 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_clock_source "PCLK32M_HFXO" +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_clock_source_STRING_UNQUOTED PCLK32M_HFXO +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_clock_source_STRING_TOKEN PCLK32M_HFXO +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_clock_source_STRING_UPPER_TOKEN PCLK32M_HFXO +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_clock_source_IDX_0 "PCLK32M_HFXO" +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_clock_source_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_clock_source_ENUM_IDX 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_clock_source_ENUM_VAL_PCLK32M_HFXO_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_clock_source_ENUM_TOKEN PCLK32M_HFXO +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_clock_source_ENUM_UPPER_TOKEN PCLK32M_HFXO +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_clock_source_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_i2s_28000, clock_source, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_clock_source_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_i2s_28000, clock_source, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_clock_source_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_i2s_28000, clock_source, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_clock_source_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_i2s_28000, clock_source, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_clock_source_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_clock_source_EXISTS 1 + +/* + * Devicetree node: /soc/peripheral@50000000/ipc@2a000 + * + * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000 + * + * Binding (compatible = nordic,nrf-ipc): + * $ZEPHYR_BASE/dts/bindings/ipc/nordic,nrf-ipc.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_PATH "/soc/peripheral@50000000/ipc@2a000" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_FULL_NAME "ipc@2a000" + +/* Node parent (/soc/peripheral@50000000) identifier: */ +#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_PARENT DT_N_S_soc_S_peripheral_50000000 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_CHILD_IDX 9 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_CHILD_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_ORD 65 +#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_ORD_STR_SORTABLE 00065 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_REQUIRES_ORDS \ + 6, /* /soc/interrupt-controller@e000e100 */ \ + 8, /* /soc/peripheral@50000000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_EXISTS 1 +#define DT_N_INST_0_nordic_nrf_ipc DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000 +#define DT_N_NODELABEL_ipc DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_REG_NUM 1 +#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_REG_IDX_0_VAL_ADDRESS 1342349312 /* 0x5002a000 */ +#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */ +#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_RANGES_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_IRQ_NUM 1 +#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_IRQ_IDX_0_VAL_irq 42 +#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_IRQ_IDX_0_VAL_priority 1 +#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_IRQ_LEVEL 1 +#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_COMPAT_MATCHES_nordic_nrf_ipc 1 +#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor" +#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_COMPAT_MODEL_IDX_0 "nrf-ipc" +#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_STATUS_okay 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_P_wakeup_source 0 +#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_P_status "okay" +#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_P_status_STRING_UNQUOTED okay +#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_P_status_STRING_TOKEN okay +#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_P_status_STRING_UPPER_TOKEN OKAY +#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_P_status_IDX_0 "okay" +#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_P_status_ENUM_IDX 1 +#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_P_status_ENUM_VAL_okay_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_P_status_ENUM_TOKEN okay +#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_P_status_ENUM_UPPER_TOKEN OKAY +#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000, status, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000, status, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_P_status_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_P_status_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_P_compatible {"nordic,nrf-ipc"} +#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_P_compatible_IDX_0 "nordic,nrf-ipc" +#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-ipc +#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_ipc +#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_IPC +#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000, compatible, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000, compatible, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_P_compatible_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_P_reg {172032 /* 0x2a000 */, 4096 /* 0x1000 */} +#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_P_reg_IDX_0 172032 +#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_P_reg_IDX_1 4096 +#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_P_reg_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_P_interrupts {42 /* 0x2a */, 1 /* 0x1 */} +#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_P_interrupts_IDX_0 42 +#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_P_interrupts_IDX_1 1 +#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_P_zephyr_deferred_init_EXISTS 1 + +/* + * Devicetree node: /soc/peripheral@50000000/kmu@39000 + * + * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_kmu_39000 + * + * Binding (compatible = nordic,nrf-kmu): + * $ZEPHYR_BASE/dts/bindings/arm/nordic,nrf-kmu.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_PATH "/soc/peripheral@50000000/kmu@39000" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_FULL_NAME "kmu@39000" + +/* Node parent (/soc/peripheral@50000000) identifier: */ +#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_PARENT DT_N_S_soc_S_peripheral_50000000 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_CHILD_IDX 11 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_CHILD_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_ORD 66 +#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_ORD_STR_SORTABLE 00066 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_REQUIRES_ORDS \ + 6, /* /soc/interrupt-controller@e000e100 */ \ + 8, /* /soc/peripheral@50000000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_EXISTS 1 +#define DT_N_INST_0_nordic_nrf_kmu DT_N_S_soc_S_peripheral_50000000_S_kmu_39000 +#define DT_N_NODELABEL_kmu DT_N_S_soc_S_peripheral_50000000_S_kmu_39000 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_REG_NUM 1 +#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_REG_IDX_0_VAL_ADDRESS 1342410752 /* 0x50039000 */ +#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */ +#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_RANGES_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_IRQ_NUM 1 +#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_IRQ_IDX_0_VAL_irq 57 +#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_IRQ_IDX_0_VAL_priority 1 +#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_IRQ_LEVEL 1 +#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_COMPAT_MATCHES_nordic_nrf_kmu 1 +#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor" +#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_COMPAT_MODEL_IDX_0 "nrf-kmu" +#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_STATUS_okay 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_P_wakeup_source 0 +#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_P_status "okay" +#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_P_status_STRING_UNQUOTED okay +#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_P_status_STRING_TOKEN okay +#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_P_status_STRING_UPPER_TOKEN OKAY +#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_P_status_IDX_0 "okay" +#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_P_status_ENUM_IDX 1 +#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_P_status_ENUM_VAL_okay_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_P_status_ENUM_TOKEN okay +#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_P_status_ENUM_UPPER_TOKEN OKAY +#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_kmu_39000, status, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_kmu_39000, status, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_kmu_39000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_kmu_39000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_P_status_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_P_status_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_P_compatible {"nordic,nrf-kmu"} +#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_P_compatible_IDX_0 "nordic,nrf-kmu" +#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-kmu +#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_kmu +#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_KMU +#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_kmu_39000, compatible, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_kmu_39000, compatible, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_kmu_39000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_kmu_39000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_P_compatible_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_P_reg {233472 /* 0x39000 */, 4096 /* 0x1000 */} +#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_P_reg_IDX_0 233472 +#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_P_reg_IDX_1 4096 +#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_P_reg_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_P_interrupts {57 /* 0x39 */, 1 /* 0x1 */} +#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_P_interrupts_IDX_0 57 +#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_P_interrupts_IDX_1 1 +#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_P_zephyr_deferred_init_EXISTS 1 + +/* + * Devicetree node: /soc/peripheral@50000000/pdm@26000 + * + * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_pdm_26000 + * + * Binding (compatible = nordic,nrf-pdm): + * $ZEPHYR_BASE/dts/bindings/audio/nordic,nrf-pdm.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_PATH "/soc/peripheral@50000000/pdm@26000" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_FULL_NAME "pdm@26000" + +/* Node parent (/soc/peripheral@50000000) identifier: */ +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_PARENT DT_N_S_soc_S_peripheral_50000000 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_CHILD_IDX 12 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_CHILD_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_ORD 67 +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_ORD_STR_SORTABLE 00067 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_REQUIRES_ORDS \ + 6, /* /soc/interrupt-controller@e000e100 */ \ + 8, /* /soc/peripheral@50000000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_EXISTS 1 +#define DT_N_INST_0_nordic_nrf_pdm DT_N_S_soc_S_peripheral_50000000_S_pdm_26000 +#define DT_N_NODELABEL_pdm0 DT_N_S_soc_S_peripheral_50000000_S_pdm_26000 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_REG_NUM 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_REG_IDX_0_VAL_ADDRESS 1342332928 /* 0x50026000 */ +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */ +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_RANGES_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_IRQ_NUM 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_IRQ_IDX_0_VAL_irq 38 +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_IRQ_IDX_0_VAL_priority 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_IRQ_LEVEL 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_COMPAT_MATCHES_nordic_nrf_pdm 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor" +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_COMPAT_MODEL_IDX_0 "nrf-pdm" +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_STATUS_disabled 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_wakeup_source 0 +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_status "disabled" +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_status_ENUM_IDX 2 +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_status_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_status_ENUM_TOKEN disabled +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_status_ENUM_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_pdm_26000, status, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_pdm_26000, status, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_pdm_26000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_pdm_26000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_status_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_status_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_compatible {"nordic,nrf-pdm"} +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_compatible_IDX_0 "nordic,nrf-pdm" +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-pdm +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_pdm +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_PDM +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_pdm_26000, compatible, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_pdm_26000, compatible, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_pdm_26000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_pdm_26000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_compatible_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_reg {155648 /* 0x26000 */, 4096 /* 0x1000 */} +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_reg_IDX_0 155648 +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_reg_IDX_1 4096 +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_reg_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_interrupts {38 /* 0x26 */, 1 /* 0x1 */} +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_interrupts_IDX_0 38 +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_interrupts_IDX_1 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_clock_source "PCLK32M_HFXO" +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_clock_source_STRING_UNQUOTED PCLK32M_HFXO +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_clock_source_STRING_TOKEN PCLK32M_HFXO +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_clock_source_STRING_UPPER_TOKEN PCLK32M_HFXO +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_clock_source_IDX_0 "PCLK32M_HFXO" +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_clock_source_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_clock_source_ENUM_IDX 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_clock_source_ENUM_VAL_PCLK32M_HFXO_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_clock_source_ENUM_TOKEN PCLK32M_HFXO +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_clock_source_ENUM_UPPER_TOKEN PCLK32M_HFXO +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_clock_source_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_pdm_26000, clock_source, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_clock_source_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_pdm_26000, clock_source, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_clock_source_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_pdm_26000, clock_source, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_clock_source_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_pdm_26000, clock_source, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_clock_source_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_clock_source_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_queue_size 4 +#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_queue_size_EXISTS 1 + +/* + * Devicetree node: /soc/peripheral@50000000/pwm@22000 + * + * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_pwm_22000 + * + * Binding (compatible = nordic,nrf-pwm): + * $ZEPHYR_BASE/dts/bindings/pwm/nordic,nrf-pwm.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_PATH "/soc/peripheral@50000000/pwm@22000" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_FULL_NAME "pwm@22000" + +/* Node parent (/soc/peripheral@50000000) identifier: */ +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_PARENT DT_N_S_soc_S_peripheral_50000000 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_CHILD_IDX 28 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_CHILD_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_ORD 68 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_ORD_STR_SORTABLE 00068 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_REQUIRES_ORDS \ + 6, /* /soc/interrupt-controller@e000e100 */ \ + 8, /* /soc/peripheral@50000000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_EXISTS 1 +#define DT_N_INST_1_nordic_nrf_pwm DT_N_S_soc_S_peripheral_50000000_S_pwm_22000 +#define DT_N_NODELABEL_pwm1 DT_N_S_soc_S_peripheral_50000000_S_pwm_22000 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_REG_NUM 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_REG_IDX_0_VAL_ADDRESS 1342316544 /* 0x50022000 */ +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */ +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_RANGES_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_IRQ_NUM 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_IRQ_IDX_0_VAL_irq 34 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_IRQ_IDX_0_VAL_priority 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_IRQ_LEVEL 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_COMPAT_MATCHES_nordic_nrf_pwm 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor" +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_COMPAT_MODEL_IDX_0 "nrf-pwm" +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_STATUS_disabled 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_P_wakeup_source 0 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_P_status "disabled" +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_P_status_ENUM_IDX 2 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_P_status_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_P_status_ENUM_TOKEN disabled +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_P_status_ENUM_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_22000, status, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_22000, status, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_22000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_22000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_P_status_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_P_status_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_P_compatible {"nordic,nrf-pwm"} +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_P_compatible_IDX_0 "nordic,nrf-pwm" +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-pwm +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_pwm +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_PWM +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_22000, compatible, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_22000, compatible, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_22000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_22000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_P_compatible_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_P_reg {139264 /* 0x22000 */, 4096 /* 0x1000 */} +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_P_reg_IDX_0 139264 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_P_reg_IDX_1 4096 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_P_reg_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_P_interrupts {34 /* 0x22 */, 1 /* 0x1 */} +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_P_interrupts_IDX_0 34 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_P_interrupts_IDX_1 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_P_center_aligned 0 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_P_center_aligned_EXISTS 1 + +/* + * Devicetree node: /soc/peripheral@50000000/pwm@23000 + * + * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_pwm_23000 + * + * Binding (compatible = nordic,nrf-pwm): + * $ZEPHYR_BASE/dts/bindings/pwm/nordic,nrf-pwm.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_PATH "/soc/peripheral@50000000/pwm@23000" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_FULL_NAME "pwm@23000" + +/* Node parent (/soc/peripheral@50000000) identifier: */ +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_PARENT DT_N_S_soc_S_peripheral_50000000 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_CHILD_IDX 29 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_CHILD_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_ORD 69 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_ORD_STR_SORTABLE 00069 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_REQUIRES_ORDS \ + 6, /* /soc/interrupt-controller@e000e100 */ \ + 8, /* /soc/peripheral@50000000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_EXISTS 1 +#define DT_N_INST_2_nordic_nrf_pwm DT_N_S_soc_S_peripheral_50000000_S_pwm_23000 +#define DT_N_NODELABEL_pwm2 DT_N_S_soc_S_peripheral_50000000_S_pwm_23000 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_REG_NUM 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_REG_IDX_0_VAL_ADDRESS 1342320640 /* 0x50023000 */ +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */ +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_RANGES_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_IRQ_NUM 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_IRQ_IDX_0_VAL_irq 35 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_IRQ_IDX_0_VAL_priority 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_IRQ_LEVEL 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_COMPAT_MATCHES_nordic_nrf_pwm 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor" +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_COMPAT_MODEL_IDX_0 "nrf-pwm" +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_STATUS_disabled 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_P_wakeup_source 0 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_P_status "disabled" +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_P_status_ENUM_IDX 2 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_P_status_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_P_status_ENUM_TOKEN disabled +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_P_status_ENUM_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_23000, status, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_23000, status, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_23000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_23000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_P_status_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_P_status_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_P_compatible {"nordic,nrf-pwm"} +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_P_compatible_IDX_0 "nordic,nrf-pwm" +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-pwm +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_pwm +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_PWM +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_23000, compatible, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_23000, compatible, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_23000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_23000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_P_compatible_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_P_reg {143360 /* 0x23000 */, 4096 /* 0x1000 */} +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_P_reg_IDX_0 143360 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_P_reg_IDX_1 4096 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_P_reg_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_P_interrupts {35 /* 0x23 */, 1 /* 0x1 */} +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_P_interrupts_IDX_0 35 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_P_interrupts_IDX_1 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_P_center_aligned 0 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_P_center_aligned_EXISTS 1 + +/* + * Devicetree node: /soc/peripheral@50000000/pwm@24000 + * + * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_pwm_24000 + * + * Binding (compatible = nordic,nrf-pwm): + * $ZEPHYR_BASE/dts/bindings/pwm/nordic,nrf-pwm.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_PATH "/soc/peripheral@50000000/pwm@24000" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_FULL_NAME "pwm@24000" + +/* Node parent (/soc/peripheral@50000000) identifier: */ +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_PARENT DT_N_S_soc_S_peripheral_50000000 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_CHILD_IDX 30 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_CHILD_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_ORD 70 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_ORD_STR_SORTABLE 00070 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_REQUIRES_ORDS \ + 6, /* /soc/interrupt-controller@e000e100 */ \ + 8, /* /soc/peripheral@50000000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_EXISTS 1 +#define DT_N_INST_3_nordic_nrf_pwm DT_N_S_soc_S_peripheral_50000000_S_pwm_24000 +#define DT_N_NODELABEL_pwm3 DT_N_S_soc_S_peripheral_50000000_S_pwm_24000 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_REG_NUM 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_REG_IDX_0_VAL_ADDRESS 1342324736 /* 0x50024000 */ +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */ +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_RANGES_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_IRQ_NUM 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_IRQ_IDX_0_VAL_irq 36 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_IRQ_IDX_0_VAL_priority 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_IRQ_LEVEL 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_COMPAT_MATCHES_nordic_nrf_pwm 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor" +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_COMPAT_MODEL_IDX_0 "nrf-pwm" +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_STATUS_disabled 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_P_wakeup_source 0 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_P_status "disabled" +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_P_status_ENUM_IDX 2 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_P_status_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_P_status_ENUM_TOKEN disabled +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_P_status_ENUM_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_24000, status, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_24000, status, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_24000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_24000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_P_status_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_P_status_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_P_compatible {"nordic,nrf-pwm"} +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_P_compatible_IDX_0 "nordic,nrf-pwm" +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-pwm +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_pwm +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_PWM +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_24000, compatible, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_24000, compatible, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_24000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_24000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_P_compatible_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_P_reg {147456 /* 0x24000 */, 4096 /* 0x1000 */} +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_P_reg_IDX_0 147456 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_P_reg_IDX_1 4096 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_P_reg_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_P_interrupts {36 /* 0x24 */, 1 /* 0x1 */} +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_P_interrupts_IDX_0 36 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_P_interrupts_IDX_1 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_P_center_aligned 0 +#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_P_center_aligned_EXISTS 1 + +/* + * Devicetree node: /soc/peripheral@50000000/regulator@4000 + * + * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_regulator_4000 + * + * Binding (compatible = nordic,nrf-regulators): + * $ZEPHYR_BASE/dts/bindings/power/nordic,nrf-regulators.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_PATH "/soc/peripheral@50000000/regulator@4000" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_FULL_NAME "regulator@4000" + +/* Node parent (/soc/peripheral@50000000) identifier: */ +#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_PARENT DT_N_S_soc_S_peripheral_50000000 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_CHILD_IDX 13 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_CHILD_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_ORD 71 +#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_ORD_STR_SORTABLE 00071 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_REQUIRES_ORDS \ + 8, /* /soc/peripheral@50000000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_EXISTS 1 +#define DT_N_INST_0_nordic_nrf_regulators DT_N_S_soc_S_peripheral_50000000_S_regulator_4000 +#define DT_N_NODELABEL_regulators DT_N_S_soc_S_peripheral_50000000_S_regulator_4000 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_REG_NUM 1 +#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_REG_IDX_0_VAL_ADDRESS 1342193664 /* 0x50004000 */ +#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */ +#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_RANGES_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_IRQ_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_IRQ_LEVEL 0 +#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_COMPAT_MATCHES_nordic_nrf_regulators 1 +#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor" +#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_COMPAT_MODEL_IDX_0 "nrf-regulators" +#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_STATUS_okay 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_P_wakeup_source 0 +#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_P_status "okay" +#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_P_status_STRING_UNQUOTED okay +#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_P_status_STRING_TOKEN okay +#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_P_status_STRING_UPPER_TOKEN OKAY +#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_P_status_IDX_0 "okay" +#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_P_status_ENUM_IDX 1 +#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_P_status_ENUM_VAL_okay_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_P_status_ENUM_TOKEN okay +#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_P_status_ENUM_UPPER_TOKEN OKAY +#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_regulator_4000, status, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_regulator_4000, status, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_regulator_4000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_regulator_4000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_P_status_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_P_status_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_P_compatible {"nordic,nrf-regulators"} +#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_P_compatible_IDX_0 "nordic,nrf-regulators" +#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-regulators +#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_regulators +#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_REGULATORS +#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_regulator_4000, compatible, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_regulator_4000, compatible, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_regulator_4000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_regulator_4000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_P_compatible_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_P_reg {16384 /* 0x4000 */, 4096 /* 0x1000 */} +#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_P_reg_IDX_0 16384 +#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_P_reg_IDX_1 4096 +#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_P_reg_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_P_zephyr_deferred_init_EXISTS 1 + +/* + * Devicetree node: /soc/peripheral@50000000/rtc@14000 + * + * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_rtc_14000 + * + * Binding (compatible = nordic,nrf-rtc): + * $ZEPHYR_BASE/dts/bindings/rtc/nordic,nrf-rtc.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_PATH "/soc/peripheral@50000000/rtc@14000" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_FULL_NAME "rtc@14000" + +/* Node parent (/soc/peripheral@50000000) identifier: */ +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_PARENT DT_N_S_soc_S_peripheral_50000000 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_CHILD_IDX 32 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_CHILD_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_ORD 72 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_ORD_STR_SORTABLE 00072 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_REQUIRES_ORDS \ + 6, /* /soc/interrupt-controller@e000e100 */ \ + 8, /* /soc/peripheral@50000000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_EXISTS 1 +#define DT_N_INST_0_nordic_nrf_rtc DT_N_S_soc_S_peripheral_50000000_S_rtc_14000 +#define DT_N_NODELABEL_rtc0 DT_N_S_soc_S_peripheral_50000000_S_rtc_14000 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_REG_NUM 1 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_REG_IDX_0_VAL_ADDRESS 1342259200 /* 0x50014000 */ +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */ +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_RANGES_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_IRQ_NUM 1 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_IRQ_IDX_0_VAL_irq 20 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_IRQ_IDX_0_VAL_priority 1 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_IRQ_LEVEL 1 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_COMPAT_MATCHES_nordic_nrf_rtc 1 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor" +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_COMPAT_MODEL_IDX_0 "nrf-rtc" +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_STATUS_disabled 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_wakeup_source 0 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_status "disabled" +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_status_ENUM_IDX 2 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_status_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_status_ENUM_TOKEN disabled +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_status_ENUM_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_rtc_14000, status, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_rtc_14000, status, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_rtc_14000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_rtc_14000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_status_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_status_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_compatible {"nordic,nrf-rtc"} +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_compatible_IDX_0 "nordic,nrf-rtc" +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-rtc +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_rtc +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_RTC +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_rtc_14000, compatible, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_rtc_14000, compatible, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_rtc_14000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_rtc_14000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_compatible_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_reg {81920 /* 0x14000 */, 4096 /* 0x1000 */} +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_reg_IDX_0 81920 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_reg_IDX_1 4096 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_reg_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_interrupts {20 /* 0x14 */, 1 /* 0x1 */} +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_interrupts_IDX_0 20 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_interrupts_IDX_1 1 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_clock_frequency 32768 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_clock_frequency_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_prescaler 1 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_prescaler_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_cc_num 4 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_cc_num_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_ppi_wrap 0 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_ppi_wrap_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_fixed_top 0 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_fixed_top_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_zli 0 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_zli_EXISTS 1 + +/* + * Devicetree node: /soc/peripheral@50000000/rtc@15000 + * + * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_rtc_15000 + * + * Binding (compatible = nordic,nrf-rtc): + * $ZEPHYR_BASE/dts/bindings/rtc/nordic,nrf-rtc.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_PATH "/soc/peripheral@50000000/rtc@15000" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_FULL_NAME "rtc@15000" + +/* Node parent (/soc/peripheral@50000000) identifier: */ +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_PARENT DT_N_S_soc_S_peripheral_50000000 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_CHILD_IDX 33 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_CHILD_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_ORD 73 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_ORD_STR_SORTABLE 00073 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_REQUIRES_ORDS \ + 6, /* /soc/interrupt-controller@e000e100 */ \ + 8, /* /soc/peripheral@50000000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_EXISTS 1 +#define DT_N_INST_1_nordic_nrf_rtc DT_N_S_soc_S_peripheral_50000000_S_rtc_15000 +#define DT_N_NODELABEL_rtc1 DT_N_S_soc_S_peripheral_50000000_S_rtc_15000 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_REG_NUM 1 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_REG_IDX_0_VAL_ADDRESS 1342263296 /* 0x50015000 */ +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */ +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_RANGES_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_IRQ_NUM 1 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_IRQ_IDX_0_VAL_irq 21 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_IRQ_IDX_0_VAL_priority 1 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_IRQ_LEVEL 1 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_COMPAT_MATCHES_nordic_nrf_rtc 1 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor" +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_COMPAT_MODEL_IDX_0 "nrf-rtc" +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_STATUS_disabled 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_wakeup_source 0 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_status "disabled" +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_status_ENUM_IDX 2 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_status_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_status_ENUM_TOKEN disabled +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_status_ENUM_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_rtc_15000, status, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_rtc_15000, status, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_rtc_15000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_rtc_15000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_status_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_status_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_compatible {"nordic,nrf-rtc"} +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_compatible_IDX_0 "nordic,nrf-rtc" +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-rtc +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_rtc +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_RTC +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_rtc_15000, compatible, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_rtc_15000, compatible, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_rtc_15000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_rtc_15000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_compatible_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_reg {86016 /* 0x15000 */, 4096 /* 0x1000 */} +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_reg_IDX_0 86016 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_reg_IDX_1 4096 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_reg_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_interrupts {21 /* 0x15 */, 1 /* 0x1 */} +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_interrupts_IDX_0 21 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_interrupts_IDX_1 1 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_clock_frequency 32768 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_clock_frequency_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_prescaler 1 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_prescaler_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_cc_num 4 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_cc_num_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_ppi_wrap 0 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_ppi_wrap_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_fixed_top 0 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_fixed_top_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_zli 0 +#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_zli_EXISTS 1 + +/* + * Devicetree node: /soc/peripheral@50000000/spi@8000 + * + * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_spi_8000 + * + * Binding (compatible = nordic,nrf-spim): + * $ZEPHYR_BASE/dts/bindings/spi/nordic,nrf-spim.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_PATH "/soc/peripheral@50000000/spi@8000" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_FULL_NAME "spi@8000" + +/* Node parent (/soc/peripheral@50000000) identifier: */ +#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_PARENT DT_N_S_soc_S_peripheral_50000000 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_CHILD_IDX 23 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_CHILD_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_ORD 74 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_ORD_STR_SORTABLE 00074 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_REQUIRES_ORDS \ + 6, /* /soc/interrupt-controller@e000e100 */ \ + 8, /* /soc/peripheral@50000000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_EXISTS 1 +#define DT_N_INST_0_nordic_nrf_spim DT_N_S_soc_S_peripheral_50000000_S_spi_8000 +#define DT_N_NODELABEL_spi0 DT_N_S_soc_S_peripheral_50000000_S_spi_8000 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_REG_NUM 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_REG_IDX_0_VAL_ADDRESS 1342210048 /* 0x50008000 */ +#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */ +#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_RANGES_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_IRQ_NUM 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_IRQ_IDX_0_VAL_irq 8 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_IRQ_IDX_0_VAL_priority 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_IRQ_LEVEL 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_COMPAT_MATCHES_nordic_nrf_spim 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor" +#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_COMPAT_MODEL_IDX_0 "nrf-spim" +#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_STATUS_disabled 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_wakeup_source 0 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_status "disabled" +#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_status_ENUM_IDX 2 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_status_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_status_ENUM_TOKEN disabled +#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_status_ENUM_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_8000, status, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_8000, status, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_8000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_8000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_status_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_status_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_compatible {"nordic,nrf-spim"} +#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_compatible_IDX_0 "nordic,nrf-spim" +#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-spim +#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_spim +#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_SPIM +#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_8000, compatible, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_8000, compatible, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_8000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_8000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_compatible_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_reg {32768 /* 0x8000 */, 4096 /* 0x1000 */} +#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_reg_IDX_0 32768 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_reg_IDX_1 4096 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_reg_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_interrupts {8 /* 0x8 */, 1 /* 0x1 */} +#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_interrupts_IDX_0 8 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_interrupts_IDX_1 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_max_frequency 8000000 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_max_frequency_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_overrun_character 255 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_overrun_character_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_easydma_maxcnt_bits 13 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_easydma_maxcnt_bits_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_anomaly_58_workaround 0 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_anomaly_58_workaround_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_rx_delay_supported 0 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_rx_delay_supported_EXISTS 1 + +/* + * Devicetree node: /soc/peripheral@50000000/spi@9000 + * + * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_spi_9000 + * + * Binding (compatible = nordic,nrf-spim): + * $ZEPHYR_BASE/dts/bindings/spi/nordic,nrf-spim.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_PATH "/soc/peripheral@50000000/spi@9000" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_FULL_NAME "spi@9000" + +/* Node parent (/soc/peripheral@50000000) identifier: */ +#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_PARENT DT_N_S_soc_S_peripheral_50000000 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_CHILD_IDX 24 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_CHILD_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_ORD 75 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_ORD_STR_SORTABLE 00075 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_REQUIRES_ORDS \ + 6, /* /soc/interrupt-controller@e000e100 */ \ + 8, /* /soc/peripheral@50000000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_EXISTS 1 +#define DT_N_INST_1_nordic_nrf_spim DT_N_S_soc_S_peripheral_50000000_S_spi_9000 +#define DT_N_NODELABEL_spi1 DT_N_S_soc_S_peripheral_50000000_S_spi_9000 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_REG_NUM 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_REG_IDX_0_VAL_ADDRESS 1342214144 /* 0x50009000 */ +#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */ +#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_RANGES_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_IRQ_NUM 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_IRQ_IDX_0_VAL_irq 9 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_IRQ_IDX_0_VAL_priority 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_IRQ_LEVEL 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_COMPAT_MATCHES_nordic_nrf_spim 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor" +#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_COMPAT_MODEL_IDX_0 "nrf-spim" +#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_STATUS_disabled 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_wakeup_source 0 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_status "disabled" +#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_status_ENUM_IDX 2 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_status_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_status_ENUM_TOKEN disabled +#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_status_ENUM_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_9000, status, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_9000, status, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_9000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_9000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_status_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_status_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_compatible {"nordic,nrf-spim"} +#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_compatible_IDX_0 "nordic,nrf-spim" +#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-spim +#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_spim +#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_SPIM +#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_9000, compatible, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_9000, compatible, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_9000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_9000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_compatible_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_reg {36864 /* 0x9000 */, 4096 /* 0x1000 */} +#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_reg_IDX_0 36864 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_reg_IDX_1 4096 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_reg_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_interrupts {9 /* 0x9 */, 1 /* 0x1 */} +#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_interrupts_IDX_0 9 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_interrupts_IDX_1 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_max_frequency 8000000 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_max_frequency_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_overrun_character 255 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_overrun_character_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_easydma_maxcnt_bits 13 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_easydma_maxcnt_bits_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_anomaly_58_workaround 0 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_anomaly_58_workaround_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_rx_delay_supported 0 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_rx_delay_supported_EXISTS 1 + +/* + * Devicetree node: /soc/peripheral@50000000/spi@a000 + * + * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_spi_a000 + * + * Binding (compatible = nordic,nrf-spim): + * $ZEPHYR_BASE/dts/bindings/spi/nordic,nrf-spim.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_PATH "/soc/peripheral@50000000/spi@a000" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_FULL_NAME "spi@a000" + +/* Node parent (/soc/peripheral@50000000) identifier: */ +#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_PARENT DT_N_S_soc_S_peripheral_50000000 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_CHILD_IDX 25 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_CHILD_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_ORD 76 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_ORD_STR_SORTABLE 00076 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_REQUIRES_ORDS \ + 6, /* /soc/interrupt-controller@e000e100 */ \ + 8, /* /soc/peripheral@50000000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_EXISTS 1 +#define DT_N_INST_2_nordic_nrf_spim DT_N_S_soc_S_peripheral_50000000_S_spi_a000 +#define DT_N_NODELABEL_spi2 DT_N_S_soc_S_peripheral_50000000_S_spi_a000 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_REG_NUM 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_REG_IDX_0_VAL_ADDRESS 1342218240 /* 0x5000a000 */ +#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */ +#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_RANGES_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_IRQ_NUM 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_IRQ_IDX_0_VAL_irq 10 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_IRQ_IDX_0_VAL_priority 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_IRQ_LEVEL 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_COMPAT_MATCHES_nordic_nrf_spim 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor" +#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_COMPAT_MODEL_IDX_0 "nrf-spim" +#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_STATUS_disabled 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_wakeup_source 0 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_status "disabled" +#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_status_ENUM_IDX 2 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_status_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_status_ENUM_TOKEN disabled +#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_status_ENUM_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_a000, status, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_a000, status, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_a000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_a000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_status_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_status_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_compatible {"nordic,nrf-spim"} +#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_compatible_IDX_0 "nordic,nrf-spim" +#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-spim +#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_spim +#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_SPIM +#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_a000, compatible, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_a000, compatible, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_a000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_a000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_compatible_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_reg {40960 /* 0xa000 */, 4096 /* 0x1000 */} +#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_reg_IDX_0 40960 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_reg_IDX_1 4096 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_reg_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_interrupts {10 /* 0xa */, 1 /* 0x1 */} +#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_interrupts_IDX_0 10 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_interrupts_IDX_1 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_max_frequency 8000000 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_max_frequency_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_overrun_character 255 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_overrun_character_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_easydma_maxcnt_bits 13 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_easydma_maxcnt_bits_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_anomaly_58_workaround 0 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_anomaly_58_workaround_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_rx_delay_supported 0 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_rx_delay_supported_EXISTS 1 + +/* + * Devicetree node: /soc/peripheral@50000000/spi@b000 + * + * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_spi_b000 + * + * Binding (compatible = nordic,nrf-spim): + * $ZEPHYR_BASE/dts/bindings/spi/nordic,nrf-spim.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_PATH "/soc/peripheral@50000000/spi@b000" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_FULL_NAME "spi@b000" + +/* Node parent (/soc/peripheral@50000000) identifier: */ +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_PARENT DT_N_S_soc_S_peripheral_50000000 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_CHILD_IDX 26 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_CHILD_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_ORD 77 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_ORD_STR_SORTABLE 00077 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_REQUIRES_ORDS \ + 6, /* /soc/interrupt-controller@e000e100 */ \ + 8, /* /soc/peripheral@50000000 */ \ + 9, /* /soc/peripheral@50000000/gpio@842500 */ \ + 29, /* /pin-controller/spi3_default */ \ + 31, /* /pin-controller/spi3_sleep */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_EXISTS 1 +#define DT_N_INST_3_nordic_nrf_spim DT_N_S_soc_S_peripheral_50000000_S_spi_b000 +#define DT_N_NODELABEL_spi3 DT_N_S_soc_S_peripheral_50000000_S_spi_b000 +#define DT_N_NODELABEL_edge_connector_spi DT_N_S_soc_S_peripheral_50000000_S_spi_b000 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_REG_NUM 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_REG_IDX_0_VAL_ADDRESS 1342222336 /* 0x5000b000 */ +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */ +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_RANGES_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_IRQ_NUM 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_IRQ_IDX_0_VAL_irq 11 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_IRQ_IDX_0_VAL_priority 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_IRQ_LEVEL 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_COMPAT_MATCHES_nordic_nrf_spim 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor" +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_COMPAT_MODEL_IDX_0 "nrf-spim" +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_STATUS_disabled 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_PINCTRL_NUM 2 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_PINCTRL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_PINCTRL_IDX_0_TOKEN default +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_PINCTRL_IDX_0_UPPER_TOKEN DEFAULT +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_PINCTRL_NAME_default_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_PINCTRL_NAME_default_IDX 0 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_PINCTRL_NAME_default_IDX_0_PH DT_N_S_pin_controller_S_spi3_default +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_PINCTRL_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_PINCTRL_IDX_1_TOKEN sleep +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_PINCTRL_IDX_1_UPPER_TOKEN SLEEP +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_PINCTRL_NAME_sleep_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_PINCTRL_NAME_sleep_IDX 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_PINCTRL_NAME_sleep_IDX_0_PH DT_N_S_pin_controller_S_spi3_sleep + +/* Generic property macros: */ +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_wakeup_source 0 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_status "disabled" +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_status_ENUM_IDX 2 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_status_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_status_ENUM_TOKEN disabled +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_status_ENUM_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000, status, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000, status, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_status_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_status_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_compatible {"nordic,nrf-spim"} +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_compatible_IDX_0 "nordic,nrf-spim" +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-spim +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_spim +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_SPIM +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000, compatible, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000, compatible, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_compatible_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_reg {45056 /* 0xb000 */, 4096 /* 0x1000 */} +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_reg_IDX_0 45056 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_reg_IDX_1 4096 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_reg_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_interrupts {11 /* 0xb */, 1 /* 0x1 */} +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_interrupts_IDX_0 11 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_interrupts_IDX_1 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_cs_gpios_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_cs_gpios_IDX_0_PH DT_N_S_soc_S_peripheral_50000000_S_gpio_842500 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_cs_gpios_IDX_0_VAL_pin 17 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_cs_gpios_IDX_0_VAL_pin_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_cs_gpios_IDX_0_VAL_flags 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_cs_gpios_IDX_0_VAL_flags_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_cs_gpios_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000, cs_gpios, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_cs_gpios_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000, cs_gpios, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_cs_gpios_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000, cs_gpios, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_cs_gpios_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000, cs_gpios, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_cs_gpios_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_cs_gpios_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_pinctrl_0_IDX_0 DT_N_S_pin_controller_S_spi3_default +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_pinctrl_0_IDX_0_PH DT_N_S_pin_controller_S_spi3_default +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_pinctrl_0_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_pinctrl_0_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000, pinctrl_0, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_pinctrl_0_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000, pinctrl_0, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_pinctrl_0_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000, pinctrl_0, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_pinctrl_0_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000, pinctrl_0, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_pinctrl_0_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_pinctrl_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_pinctrl_1_IDX_0 DT_N_S_pin_controller_S_spi3_sleep +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_pinctrl_1_IDX_0_PH DT_N_S_pin_controller_S_spi3_sleep +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_pinctrl_1_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_pinctrl_1_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000, pinctrl_1, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_pinctrl_1_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000, pinctrl_1, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_pinctrl_1_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000, pinctrl_1, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_pinctrl_1_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000, pinctrl_1, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_pinctrl_1_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_pinctrl_1_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_pinctrl_names {"default", "sleep"} +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_pinctrl_names_IDX_0 "default" +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_pinctrl_names_IDX_0_STRING_UNQUOTED default +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_pinctrl_names_IDX_0_STRING_TOKEN default +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_pinctrl_names_IDX_0_STRING_UPPER_TOKEN DEFAULT +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_pinctrl_names_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_pinctrl_names_IDX_1 "sleep" +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_pinctrl_names_IDX_1_STRING_UNQUOTED sleep +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_pinctrl_names_IDX_1_STRING_TOKEN sleep +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_pinctrl_names_IDX_1_STRING_UPPER_TOKEN SLEEP +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_pinctrl_names_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_pinctrl_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000, pinctrl_names, 0) \ + fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000, pinctrl_names, 1) +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_pinctrl_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000, pinctrl_names, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000, pinctrl_names, 1) +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_pinctrl_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000, pinctrl_names, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000, pinctrl_names, 1, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_pinctrl_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000, pinctrl_names, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000, pinctrl_names, 1, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_pinctrl_names_LEN 2 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_pinctrl_names_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_max_frequency 8000000 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_max_frequency_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_overrun_character 255 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_overrun_character_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_easydma_maxcnt_bits 13 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_easydma_maxcnt_bits_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_anomaly_58_workaround 0 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_anomaly_58_workaround_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_rx_delay_supported 0 +#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_rx_delay_supported_EXISTS 1 + +/* + * Devicetree node: /soc/peripheral@50000000/timer@f000 + * + * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_timer_f000 + * + * Binding (compatible = nordic,nrf-timer): + * $ZEPHYR_BASE/dts/bindings/timer/nordic,nrf-timer.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_PATH "/soc/peripheral@50000000/timer@f000" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_FULL_NAME "timer@f000" + +/* Node parent (/soc/peripheral@50000000) identifier: */ +#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_PARENT DT_N_S_soc_S_peripheral_50000000 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_CHILD_IDX 37 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_CHILD_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_ORD 78 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_ORD_STR_SORTABLE 00078 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_REQUIRES_ORDS \ + 6, /* /soc/interrupt-controller@e000e100 */ \ + 8, /* /soc/peripheral@50000000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_EXISTS 1 +#define DT_N_INST_0_nordic_nrf_timer DT_N_S_soc_S_peripheral_50000000_S_timer_f000 +#define DT_N_NODELABEL_timer0 DT_N_S_soc_S_peripheral_50000000_S_timer_f000 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_REG_NUM 1 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_REG_IDX_0_VAL_ADDRESS 1342238720 /* 0x5000f000 */ +#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */ +#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_RANGES_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_IRQ_NUM 1 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_IRQ_IDX_0_VAL_irq 15 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_IRQ_IDX_0_VAL_priority 1 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_IRQ_LEVEL 1 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_COMPAT_MATCHES_nordic_nrf_timer 1 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor" +#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_COMPAT_MODEL_IDX_0 "nrf-timer" +#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_STATUS_disabled 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_wakeup_source 0 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_status "disabled" +#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_status_ENUM_IDX 2 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_status_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_status_ENUM_TOKEN disabled +#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_status_ENUM_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_timer_f000, status, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_timer_f000, status, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_timer_f000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_timer_f000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_status_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_status_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_compatible {"nordic,nrf-timer"} +#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_compatible_IDX_0 "nordic,nrf-timer" +#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-timer +#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_timer +#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_TIMER +#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_timer_f000, compatible, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_timer_f000, compatible, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_timer_f000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_timer_f000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_compatible_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_reg {61440 /* 0xf000 */, 4096 /* 0x1000 */} +#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_reg_IDX_0 61440 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_reg_IDX_1 4096 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_reg_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_interrupts {15 /* 0xf */, 1 /* 0x1 */} +#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_interrupts_IDX_0 15 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_interrupts_IDX_1 1 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_cc_num 6 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_cc_num_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_max_bit_width 32 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_max_bit_width_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_max_frequency 16000000 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_max_frequency_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_prescaler 0 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_prescaler_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_zli 0 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_zli_EXISTS 1 + +/* + * Devicetree node: /soc/peripheral@50000000/timer@11000 + * + * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_timer_11000 + * + * Binding (compatible = nordic,nrf-timer): + * $ZEPHYR_BASE/dts/bindings/timer/nordic,nrf-timer.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_PATH "/soc/peripheral@50000000/timer@11000" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_FULL_NAME "timer@11000" + +/* Node parent (/soc/peripheral@50000000) identifier: */ +#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_PARENT DT_N_S_soc_S_peripheral_50000000 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_CHILD_IDX 39 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_CHILD_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_ORD 79 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_ORD_STR_SORTABLE 00079 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_REQUIRES_ORDS \ + 6, /* /soc/interrupt-controller@e000e100 */ \ + 8, /* /soc/peripheral@50000000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_EXISTS 1 +#define DT_N_INST_2_nordic_nrf_timer DT_N_S_soc_S_peripheral_50000000_S_timer_11000 +#define DT_N_NODELABEL_timer2 DT_N_S_soc_S_peripheral_50000000_S_timer_11000 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_REG_NUM 1 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_REG_IDX_0_VAL_ADDRESS 1342246912 /* 0x50011000 */ +#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */ +#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_RANGES_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_IRQ_NUM 1 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_IRQ_IDX_0_VAL_irq 17 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_IRQ_IDX_0_VAL_priority 1 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_IRQ_LEVEL 1 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_COMPAT_MATCHES_nordic_nrf_timer 1 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor" +#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_COMPAT_MODEL_IDX_0 "nrf-timer" +#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_STATUS_disabled 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_wakeup_source 0 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_status "disabled" +#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_status_ENUM_IDX 2 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_status_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_status_ENUM_TOKEN disabled +#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_status_ENUM_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_timer_11000, status, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_timer_11000, status, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_timer_11000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_timer_11000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_status_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_status_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_compatible {"nordic,nrf-timer"} +#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_compatible_IDX_0 "nordic,nrf-timer" +#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-timer +#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_timer +#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_TIMER +#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_timer_11000, compatible, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_timer_11000, compatible, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_timer_11000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_timer_11000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_compatible_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_reg {69632 /* 0x11000 */, 4096 /* 0x1000 */} +#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_reg_IDX_0 69632 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_reg_IDX_1 4096 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_reg_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_interrupts {17 /* 0x11 */, 1 /* 0x1 */} +#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_interrupts_IDX_0 17 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_interrupts_IDX_1 1 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_cc_num 6 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_cc_num_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_max_bit_width 32 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_max_bit_width_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_max_frequency 16000000 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_max_frequency_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_prescaler 0 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_prescaler_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_zli 0 +#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_zli_EXISTS 1 + +/* + * Devicetree node: /soc/peripheral@50000000/uart@8000 + * + * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_uart_8000 + * + * Binding (compatible = nordic,nrf-uarte): + * $ZEPHYR_BASE/dts/bindings/serial/nordic,nrf-uarte.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_PATH "/soc/peripheral@50000000/uart@8000" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_FULL_NAME "uart@8000" + +/* Node parent (/soc/peripheral@50000000) identifier: */ +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_PARENT DT_N_S_soc_S_peripheral_50000000 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_CHILD_IDX 15 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_CHILD_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_ORD 80 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_ORD_STR_SORTABLE 00080 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_REQUIRES_ORDS \ + 6, /* /soc/interrupt-controller@e000e100 */ \ + 8, /* /soc/peripheral@50000000 */ \ + 33, /* /pin-controller/uart0_default */ \ + 35, /* /pin-controller/uart0_sleep */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_EXISTS 1 +#define DT_N_INST_0_nordic_nrf_uarte DT_N_S_soc_S_peripheral_50000000_S_uart_8000 +#define DT_N_NODELABEL_uart0 DT_N_S_soc_S_peripheral_50000000_S_uart_8000 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_REG_NUM 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_REG_IDX_0_VAL_ADDRESS 1342210048 /* 0x50008000 */ +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */ +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_RANGES_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_IRQ_NUM 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_IRQ_IDX_0_VAL_irq 8 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_IRQ_IDX_0_VAL_priority 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_IRQ_LEVEL 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_COMPAT_MATCHES_nordic_nrf_uarte 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor" +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_COMPAT_MODEL_IDX_0 "nrf-uarte" +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_STATUS_okay 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_PINCTRL_NUM 2 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_PINCTRL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_PINCTRL_IDX_0_TOKEN default +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_PINCTRL_IDX_0_UPPER_TOKEN DEFAULT +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_PINCTRL_NAME_default_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_PINCTRL_NAME_default_IDX 0 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_PINCTRL_NAME_default_IDX_0_PH DT_N_S_pin_controller_S_uart0_default +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_PINCTRL_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_PINCTRL_IDX_1_TOKEN sleep +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_PINCTRL_IDX_1_UPPER_TOKEN SLEEP +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_PINCTRL_NAME_sleep_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_PINCTRL_NAME_sleep_IDX 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_PINCTRL_NAME_sleep_IDX_0_PH DT_N_S_pin_controller_S_uart0_sleep + +/* Generic property macros: */ +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_wakeup_source 0 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_status "okay" +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_status_STRING_UNQUOTED okay +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_status_STRING_TOKEN okay +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_status_STRING_UPPER_TOKEN OKAY +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_status_IDX_0 "okay" +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_status_ENUM_IDX 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_status_ENUM_VAL_okay_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_status_ENUM_TOKEN okay +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_status_ENUM_UPPER_TOKEN OKAY +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_8000, status, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_8000, status, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_8000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_8000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_status_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_status_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_compatible {"nordic,nrf-uarte"} +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_compatible_IDX_0 "nordic,nrf-uarte" +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-uarte +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_uarte +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_UARTE +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_8000, compatible, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_8000, compatible, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_8000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_8000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_compatible_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_reg {32768 /* 0x8000 */, 4096 /* 0x1000 */} +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_reg_IDX_0 32768 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_reg_IDX_1 4096 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_reg_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_interrupts {8 /* 0x8 */, 1 /* 0x1 */} +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_interrupts_IDX_0 8 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_interrupts_IDX_1 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_current_speed 115200 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_current_speed_ENUM_IDX 12 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_current_speed_ENUM_VAL_115200_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_current_speed_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_hw_flow_control 0 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_hw_flow_control_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_pinctrl_0_IDX_0 DT_N_S_pin_controller_S_uart0_default +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_pinctrl_0_IDX_0_PH DT_N_S_pin_controller_S_uart0_default +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_pinctrl_0_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_pinctrl_0_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_8000, pinctrl_0, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_pinctrl_0_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_8000, pinctrl_0, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_pinctrl_0_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_8000, pinctrl_0, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_pinctrl_0_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_8000, pinctrl_0, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_pinctrl_0_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_pinctrl_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_pinctrl_1_IDX_0 DT_N_S_pin_controller_S_uart0_sleep +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_pinctrl_1_IDX_0_PH DT_N_S_pin_controller_S_uart0_sleep +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_pinctrl_1_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_pinctrl_1_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_8000, pinctrl_1, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_pinctrl_1_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_8000, pinctrl_1, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_pinctrl_1_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_8000, pinctrl_1, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_pinctrl_1_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_8000, pinctrl_1, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_pinctrl_1_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_pinctrl_1_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_pinctrl_names {"default", "sleep"} +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_pinctrl_names_IDX_0 "default" +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_pinctrl_names_IDX_0_STRING_UNQUOTED default +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_pinctrl_names_IDX_0_STRING_TOKEN default +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_pinctrl_names_IDX_0_STRING_UPPER_TOKEN DEFAULT +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_pinctrl_names_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_pinctrl_names_IDX_1 "sleep" +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_pinctrl_names_IDX_1_STRING_UNQUOTED sleep +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_pinctrl_names_IDX_1_STRING_TOKEN sleep +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_pinctrl_names_IDX_1_STRING_UPPER_TOKEN SLEEP +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_pinctrl_names_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_pinctrl_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_8000, pinctrl_names, 0) \ + fn(DT_N_S_soc_S_peripheral_50000000_S_uart_8000, pinctrl_names, 1) +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_pinctrl_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_8000, pinctrl_names, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_peripheral_50000000_S_uart_8000, pinctrl_names, 1) +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_pinctrl_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_8000, pinctrl_names, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_peripheral_50000000_S_uart_8000, pinctrl_names, 1, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_pinctrl_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_8000, pinctrl_names, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_peripheral_50000000_S_uart_8000, pinctrl_names, 1, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_pinctrl_names_LEN 2 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_pinctrl_names_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_disable_rx 0 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_disable_rx_EXISTS 1 + +/* + * Devicetree node: /soc/peripheral@50000000/uart@9000 + * + * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_uart_9000 + * + * Binding (compatible = nordic,nrf-uarte): + * $ZEPHYR_BASE/dts/bindings/serial/nordic,nrf-uarte.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_PATH "/soc/peripheral@50000000/uart@9000" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_FULL_NAME "uart@9000" + +/* Node parent (/soc/peripheral@50000000) identifier: */ +#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_PARENT DT_N_S_soc_S_peripheral_50000000 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_CHILD_IDX 16 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_CHILD_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_ORD 81 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_ORD_STR_SORTABLE 00081 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_REQUIRES_ORDS \ + 6, /* /soc/interrupt-controller@e000e100 */ \ + 8, /* /soc/peripheral@50000000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_EXISTS 1 +#define DT_N_INST_1_nordic_nrf_uarte DT_N_S_soc_S_peripheral_50000000_S_uart_9000 +#define DT_N_NODELABEL_uart1 DT_N_S_soc_S_peripheral_50000000_S_uart_9000 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_REG_NUM 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_REG_IDX_0_VAL_ADDRESS 1342214144 /* 0x50009000 */ +#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */ +#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_RANGES_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_IRQ_NUM 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_IRQ_IDX_0_VAL_irq 9 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_IRQ_IDX_0_VAL_priority 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_IRQ_LEVEL 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_COMPAT_MATCHES_nordic_nrf_uarte 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor" +#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_COMPAT_MODEL_IDX_0 "nrf-uarte" +#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_STATUS_disabled 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_wakeup_source 0 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_status "disabled" +#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_status_ENUM_IDX 2 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_status_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_status_ENUM_TOKEN disabled +#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_status_ENUM_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_9000, status, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_9000, status, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_9000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_9000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_status_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_status_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_compatible {"nordic,nrf-uarte"} +#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_compatible_IDX_0 "nordic,nrf-uarte" +#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-uarte +#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_uarte +#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_UARTE +#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_9000, compatible, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_9000, compatible, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_9000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_9000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_compatible_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_reg {36864 /* 0x9000 */, 4096 /* 0x1000 */} +#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_reg_IDX_0 36864 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_reg_IDX_1 4096 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_reg_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_interrupts {9 /* 0x9 */, 1 /* 0x1 */} +#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_interrupts_IDX_0 9 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_interrupts_IDX_1 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_hw_flow_control 0 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_hw_flow_control_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_disable_rx 0 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_disable_rx_EXISTS 1 + +/* + * Devicetree node: /soc/peripheral@50000000/uart@a000 + * + * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_uart_a000 + * + * Binding (compatible = nordic,nrf-uarte): + * $ZEPHYR_BASE/dts/bindings/serial/nordic,nrf-uarte.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_PATH "/soc/peripheral@50000000/uart@a000" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_FULL_NAME "uart@a000" + +/* Node parent (/soc/peripheral@50000000) identifier: */ +#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_PARENT DT_N_S_soc_S_peripheral_50000000 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_CHILD_IDX 17 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_CHILD_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_ORD 82 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_ORD_STR_SORTABLE 00082 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_REQUIRES_ORDS \ + 6, /* /soc/interrupt-controller@e000e100 */ \ + 8, /* /soc/peripheral@50000000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_EXISTS 1 +#define DT_N_INST_2_nordic_nrf_uarte DT_N_S_soc_S_peripheral_50000000_S_uart_a000 +#define DT_N_NODELABEL_uart2 DT_N_S_soc_S_peripheral_50000000_S_uart_a000 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_REG_NUM 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_REG_IDX_0_VAL_ADDRESS 1342218240 /* 0x5000a000 */ +#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */ +#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_RANGES_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_IRQ_NUM 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_IRQ_IDX_0_VAL_irq 10 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_IRQ_IDX_0_VAL_priority 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_IRQ_LEVEL 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_COMPAT_MATCHES_nordic_nrf_uarte 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor" +#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_COMPAT_MODEL_IDX_0 "nrf-uarte" +#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_STATUS_disabled 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_P_wakeup_source 0 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_P_status "disabled" +#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_P_status_ENUM_IDX 2 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_P_status_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_P_status_ENUM_TOKEN disabled +#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_P_status_ENUM_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_a000, status, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_a000, status, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_a000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_a000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_P_status_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_P_status_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_P_compatible {"nordic,nrf-uarte"} +#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_P_compatible_IDX_0 "nordic,nrf-uarte" +#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-uarte +#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_uarte +#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_UARTE +#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_a000, compatible, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_a000, compatible, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_a000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_a000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_P_compatible_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_P_reg {40960 /* 0xa000 */, 4096 /* 0x1000 */} +#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_P_reg_IDX_0 40960 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_P_reg_IDX_1 4096 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_P_reg_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_P_interrupts {10 /* 0xa */, 1 /* 0x1 */} +#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_P_interrupts_IDX_0 10 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_P_interrupts_IDX_1 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_P_hw_flow_control 0 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_P_hw_flow_control_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_P_disable_rx 0 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_P_disable_rx_EXISTS 1 + +/* + * Devicetree node: /soc/peripheral@50000000/uart@b000 + * + * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_uart_b000 + * + * Binding (compatible = nordic,nrf-uarte): + * $ZEPHYR_BASE/dts/bindings/serial/nordic,nrf-uarte.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_PATH "/soc/peripheral@50000000/uart@b000" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_FULL_NAME "uart@b000" + +/* Node parent (/soc/peripheral@50000000) identifier: */ +#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_PARENT DT_N_S_soc_S_peripheral_50000000 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_CHILD_IDX 18 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_CHILD_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_ORD 83 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_ORD_STR_SORTABLE 00083 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_REQUIRES_ORDS \ + 6, /* /soc/interrupt-controller@e000e100 */ \ + 8, /* /soc/peripheral@50000000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_EXISTS 1 +#define DT_N_INST_3_nordic_nrf_uarte DT_N_S_soc_S_peripheral_50000000_S_uart_b000 +#define DT_N_NODELABEL_uart3 DT_N_S_soc_S_peripheral_50000000_S_uart_b000 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_REG_NUM 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_REG_IDX_0_VAL_ADDRESS 1342222336 /* 0x5000b000 */ +#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */ +#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_RANGES_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_IRQ_NUM 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_IRQ_IDX_0_VAL_irq 11 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_IRQ_IDX_0_VAL_priority 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_IRQ_LEVEL 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_COMPAT_MATCHES_nordic_nrf_uarte 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor" +#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_COMPAT_MODEL_IDX_0 "nrf-uarte" +#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_STATUS_disabled 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_P_wakeup_source 0 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_P_status "disabled" +#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_P_status_ENUM_IDX 2 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_P_status_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_P_status_ENUM_TOKEN disabled +#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_P_status_ENUM_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_b000, status, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_b000, status, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_b000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_b000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_P_status_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_P_status_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_P_compatible {"nordic,nrf-uarte"} +#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_P_compatible_IDX_0 "nordic,nrf-uarte" +#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-uarte +#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_uarte +#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_UARTE +#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_b000, compatible, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_b000, compatible, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_b000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_b000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_P_compatible_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_P_reg {45056 /* 0xb000 */, 4096 /* 0x1000 */} +#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_P_reg_IDX_0 45056 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_P_reg_IDX_1 4096 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_P_reg_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_P_interrupts {11 /* 0xb */, 1 /* 0x1 */} +#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_P_interrupts_IDX_0 11 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_P_interrupts_IDX_1 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_P_hw_flow_control 0 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_P_hw_flow_control_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_P_disable_rx 0 +#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_P_disable_rx_EXISTS 1 + +/* + * Devicetree node: /soc/peripheral@50000000/vmc@3a000 + * + * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000 + * + * Binding (compatible = nordic,nrf-vmc): + * $ZEPHYR_BASE/dts/bindings/power/nordic,nrf-vmc.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_PATH "/soc/peripheral@50000000/vmc@3a000" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_FULL_NAME "vmc@3a000" + +/* Node parent (/soc/peripheral@50000000) identifier: */ +#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_PARENT DT_N_S_soc_S_peripheral_50000000 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_CHILD_IDX 14 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_CHILD_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_ORD 84 +#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_ORD_STR_SORTABLE 00084 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_REQUIRES_ORDS \ + 8, /* /soc/peripheral@50000000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_EXISTS 1 +#define DT_N_INST_0_nordic_nrf_vmc DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000 +#define DT_N_NODELABEL_vmc DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_REG_NUM 1 +#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_REG_IDX_0_VAL_ADDRESS 1342414848 /* 0x5003a000 */ +#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */ +#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_RANGES_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_IRQ_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_IRQ_LEVEL 0 +#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_COMPAT_MATCHES_nordic_nrf_vmc 1 +#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor" +#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_COMPAT_MODEL_IDX_0 "nrf-vmc" +#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_STATUS_okay 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_P_wakeup_source 0 +#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_P_status "okay" +#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_P_status_STRING_UNQUOTED okay +#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_P_status_STRING_TOKEN okay +#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_P_status_STRING_UPPER_TOKEN OKAY +#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_P_status_IDX_0 "okay" +#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_P_status_ENUM_IDX 1 +#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_P_status_ENUM_VAL_okay_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_P_status_ENUM_TOKEN okay +#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_P_status_ENUM_UPPER_TOKEN OKAY +#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000, status, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000, status, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_P_status_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_P_status_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_P_compatible {"nordic,nrf-vmc"} +#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_P_compatible_IDX_0 "nordic,nrf-vmc" +#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-vmc +#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_vmc +#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_VMC +#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000, compatible, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000, compatible, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_P_compatible_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_P_reg {237568 /* 0x3a000 */, 4096 /* 0x1000 */} +#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_P_reg_IDX_0 237568 +#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_P_reg_IDX_1 4096 +#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_P_reg_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_P_zephyr_deferred_init_EXISTS 1 + +/* + * Devicetree node: /soc/peripheral@50000000/watchdog@18000 + * + * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000 + * + * Binding (compatible = nordic,nrf-wdt): + * $ZEPHYR_BASE/dts/bindings/watchdog/nordic,nrf-wdt.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_PATH "/soc/peripheral@50000000/watchdog@18000" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_FULL_NAME "watchdog@18000" + +/* Node parent (/soc/peripheral@50000000) identifier: */ +#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_PARENT DT_N_S_soc_S_peripheral_50000000 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_CHILD_IDX 36 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_CHILD_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_ORD 85 +#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_ORD_STR_SORTABLE 00085 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_REQUIRES_ORDS \ + 6, /* /soc/interrupt-controller@e000e100 */ \ + 8, /* /soc/peripheral@50000000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_EXISTS 1 +#define DT_N_ALIAS_watchdog0 DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000 +#define DT_N_INST_0_nordic_nrf_wdt DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000 +#define DT_N_NODELABEL_wdt DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000 +#define DT_N_NODELABEL_wdt0 DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_REG_NUM 1 +#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_REG_IDX_0_VAL_ADDRESS 1342275584 /* 0x50018000 */ +#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */ +#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_RANGES_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_IRQ_NUM 1 +#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_IRQ_IDX_0_VAL_irq 24 +#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_IRQ_IDX_0_VAL_priority 1 +#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_IRQ_LEVEL 1 +#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_COMPAT_MATCHES_nordic_nrf_wdt 1 +#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor" +#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_COMPAT_MODEL_IDX_0 "nrf-wdt" +#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_STATUS_okay 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_P_wakeup_source 0 +#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_P_status "okay" +#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_P_status_STRING_UNQUOTED okay +#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_P_status_STRING_TOKEN okay +#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_P_status_STRING_UPPER_TOKEN OKAY +#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_P_status_IDX_0 "okay" +#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_P_status_ENUM_IDX 1 +#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_P_status_ENUM_VAL_okay_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_P_status_ENUM_TOKEN okay +#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_P_status_ENUM_UPPER_TOKEN OKAY +#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000, status, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000, status, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_P_status_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_P_status_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_P_compatible {"nordic,nrf-wdt"} +#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_P_compatible_IDX_0 "nordic,nrf-wdt" +#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-wdt +#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_wdt +#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_WDT +#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000, compatible, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000, compatible, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_P_compatible_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_P_reg {98304 /* 0x18000 */, 4096 /* 0x1000 */} +#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_P_reg_IDX_0 98304 +#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_P_reg_IDX_1 4096 +#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_P_reg_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_P_interrupts {24 /* 0x18 */, 1 /* 0x1 */} +#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_P_interrupts_IDX_0 24 +#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_P_interrupts_IDX_1 1 +#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_P_zephyr_deferred_init_EXISTS 1 + +/* + * Devicetree node: /soc/peripheral@50000000/flash-controller@39000 + * + * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000 + * + * Binding (compatible = nordic,nrf91-flash-controller): + * $ZEPHYR_BASE/dts/bindings/flash_controller/nordic,nrf91-flash-controller.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_PATH "/soc/peripheral@50000000/flash-controller@39000" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_FULL_NAME "flash-controller@39000" + +/* Node parent (/soc/peripheral@50000000) identifier: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_PARENT DT_N_S_soc_S_peripheral_50000000 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_CHILD_IDX 0 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_CHILD_NUM 1 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_CHILD_NUM_STATUS_OKAY 1 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_FOREACH_CHILD(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0, __VA_ARGS__) + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_ORD 86 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_ORD_STR_SORTABLE 00086 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_REQUIRES_ORDS \ + 8, /* /soc/peripheral@50000000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_SUPPORTS_ORDS \ + 87, /* /soc/peripheral@50000000/flash-controller@39000/flash@0 */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_EXISTS 1 +#define DT_N_INST_0_nordic_nrf91_flash_controller DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000 +#define DT_N_NODELABEL_flash_controller DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_REG_NUM 1 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_REG_IDX_0_VAL_ADDRESS 1342410752 /* 0x50039000 */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_RANGES_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_IRQ_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_IRQ_LEVEL 0 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_COMPAT_MATCHES_nordic_nrf91_flash_controller 1 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor" +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_COMPAT_MODEL_IDX_0 "nrf91-flash-controller" +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_STATUS_okay 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_P_wakeup_source 0 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_P_compatible {"nordic,nrf91-flash-controller"} +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_P_compatible_IDX_0 "nordic,nrf91-flash-controller" +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf91-flash-controller +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf91_flash_controller +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF91_FLASH_CONTROLLER +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000, compatible, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000, compatible, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_P_compatible_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_P_reg {233472 /* 0x39000 */, 4096 /* 0x1000 */} +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_P_reg_IDX_0 233472 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_P_reg_IDX_1 4096 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_P_reg_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_P_partial_erase 1 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_P_partial_erase_EXISTS 1 + +/* + * Devicetree node: /soc/peripheral@50000000/flash-controller@39000/flash@0 + * + * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0 + * + * Binding (compatible = soc-nv-flash): + * $ZEPHYR_BASE/dts/bindings/mtd/soc-nv-flash.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_PATH "/soc/peripheral@50000000/flash-controller@39000/flash@0" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_FULL_NAME "flash@0" + +/* Node parent (/soc/peripheral@50000000/flash-controller@39000) identifier: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_PARENT DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_CHILD_IDX 0 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_CHILD_NUM 1 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_CHILD_NUM_STATUS_OKAY 1 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_FOREACH_CHILD(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions, __VA_ARGS__) + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_ORD 87 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_ORD_STR_SORTABLE 00087 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_REQUIRES_ORDS \ + 86, /* /soc/peripheral@50000000/flash-controller@39000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_SUPPORTS_ORDS \ + 88, /* /soc/peripheral@50000000/flash-controller@39000/flash@0/partitions */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_EXISTS 1 +#define DT_N_INST_0_soc_nv_flash DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0 +#define DT_N_NODELABEL_flash0 DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_REG_NUM 1 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_REG_IDX_0_VAL_ADDRESS 0 /* 0x0 */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_REG_IDX_0_VAL_SIZE 1048576 /* 0x100000 */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_RANGES_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_IRQ_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_IRQ_LEVEL 0 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_COMPAT_MATCHES_soc_nv_flash 1 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_STATUS_okay 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_P_wakeup_source 0 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_P_compatible {"soc-nv-flash"} +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_P_compatible_IDX_0 "soc-nv-flash" +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_P_compatible_IDX_0_STRING_UNQUOTED soc-nv-flash +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_P_compatible_IDX_0_STRING_TOKEN soc_nv_flash +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_P_compatible_IDX_0_STRING_UPPER_TOKEN SOC_NV_FLASH +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0, compatible, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0, compatible, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_P_compatible_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_P_reg {0 /* 0x0 */, 1048576 /* 0x100000 */} +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_P_reg_IDX_0 0 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_P_reg_IDX_1 1048576 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_P_reg_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_P_erase_block_size 4096 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_P_erase_block_size_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_P_write_block_size 4 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_P_write_block_size_EXISTS 1 + +/* + * Devicetree node: /soc/peripheral@50000000/flash-controller@39000/flash@0/partitions + * + * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions + * + * Binding (compatible = fixed-partitions): + * $ZEPHYR_BASE/dts/bindings/mtd/fixed-partitions.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_PATH "/soc/peripheral@50000000/flash-controller@39000/flash@0/partitions" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_FULL_NAME "partitions" + +/* Node parent (/soc/peripheral@50000000/flash-controller@39000/flash@0) identifier: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_PARENT DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_CHILD_IDX 0 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_CHILD_NUM 7 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_CHILD_NUM_STATUS_OKAY 7 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_FOREACH_CHILD(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_80000) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c0000) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_f0000) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_80000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c0000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_f0000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_80000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c0000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_f0000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_80000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c0000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_f0000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_80000) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c0000) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_f0000) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_80000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c0000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_f0000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_80000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c0000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_f0000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_80000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c0000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_f0000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000, __VA_ARGS__) + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_ORD 88 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_ORD_STR_SORTABLE 00088 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_REQUIRES_ORDS \ + 87, /* /soc/peripheral@50000000/flash-controller@39000/flash@0 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_SUPPORTS_ORDS \ + 89, /* /soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@0 */ \ + 90, /* /soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@10000 */ \ + 91, /* /soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@50000 */ \ + 92, /* /soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@80000 */ \ + 93, /* /soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@c0000 */ \ + 94, /* /soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@f0000 */ \ + 95, /* /soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@fa000 */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_EXISTS 1 +#define DT_N_INST_0_fixed_partitions DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_REG_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_RANGES_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_IRQ_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_IRQ_LEVEL 0 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_COMPAT_MATCHES_fixed_partitions 1 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_STATUS_okay 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_PINCTRL_NUM 0 + +/* (No generic property macros) */ + +/* + * Devicetree node: /soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@0 + * + * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0 + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0_PATH "/soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@0" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0_FULL_NAME "partition@0" + +/* Node parent (/soc/peripheral@50000000/flash-controller@39000/flash@0/partitions) identifier: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0_PARENT DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0_CHILD_IDX 0 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0_CHILD_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0_ORD 89 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0_ORD_STR_SORTABLE 00089 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0_REQUIRES_ORDS \ + 88, /* /soc/peripheral@50000000/flash-controller@39000/flash@0/partitions */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0_EXISTS 1 +#define DT_N_NODELABEL_boot_partition DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0_REG_NUM 1 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0_REG_IDX_0_VAL_ADDRESS 0 /* 0x0 */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0_REG_IDX_0_VAL_SIZE 65536 /* 0x10000 */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0_RANGES_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0_IRQ_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0_IRQ_LEVEL 0 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0_STATUS_okay 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0_PINCTRL_NUM 0 + +/* fixed-partitions identifier: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0_PARTITION_ID 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0_P_label "mcuboot" +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0_P_label_STRING_UNQUOTED mcuboot +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0_P_label_STRING_TOKEN mcuboot +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0_P_label_STRING_UPPER_TOKEN MCUBOOT +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0_P_label_IDX_0 "mcuboot" +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0_P_label_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0, label, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0_P_label_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0, label, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0_P_label_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0, label, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0_P_label_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0, label, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0_P_label_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0_P_label_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0_P_read_only 0 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0_P_read_only_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0_P_reg {0 /* 0x0 */, 65536 /* 0x10000 */} +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0_P_reg_IDX_0 0 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0_P_reg_IDX_1 65536 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0_P_reg_EXISTS 1 + +/* + * Devicetree node: /soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@10000 + * + * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000 + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000_PATH "/soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@10000" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000_FULL_NAME "partition@10000" + +/* Node parent (/soc/peripheral@50000000/flash-controller@39000/flash@0/partitions) identifier: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000_PARENT DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000_CHILD_IDX 1 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000_CHILD_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000_ORD 90 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000_ORD_STR_SORTABLE 00090 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000_REQUIRES_ORDS \ + 88, /* /soc/peripheral@50000000/flash-controller@39000/flash@0/partitions */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000_EXISTS 1 +#define DT_N_NODELABEL_slot0_partition DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000_REG_NUM 1 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000_REG_IDX_0_VAL_ADDRESS 65536 /* 0x10000 */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000_REG_IDX_0_VAL_SIZE 262144 /* 0x40000 */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000_RANGES_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000_IRQ_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000_IRQ_LEVEL 0 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000_STATUS_okay 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000_PINCTRL_NUM 0 + +/* fixed-partitions identifier: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000_PARTITION_ID 1 + +/* Generic property macros: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000_P_label "image-0" +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000_P_label_STRING_UNQUOTED image-0 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000_P_label_STRING_TOKEN image_0 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000_P_label_STRING_UPPER_TOKEN IMAGE_0 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000_P_label_IDX_0 "image-0" +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000_P_label_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000, label, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000_P_label_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000, label, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000_P_label_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000, label, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000_P_label_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000, label, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000_P_label_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000_P_label_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000_P_read_only 0 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000_P_read_only_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000_P_reg {65536 /* 0x10000 */, 262144 /* 0x40000 */} +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000_P_reg_IDX_0 65536 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000_P_reg_IDX_1 262144 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000_P_reg_EXISTS 1 + +/* + * Devicetree node: /soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@50000 + * + * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000 + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000_PATH "/soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@50000" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000_FULL_NAME "partition@50000" + +/* Node parent (/soc/peripheral@50000000/flash-controller@39000/flash@0/partitions) identifier: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000_PARENT DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000_CHILD_IDX 2 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000_CHILD_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000_ORD 91 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000_ORD_STR_SORTABLE 00091 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000_REQUIRES_ORDS \ + 88, /* /soc/peripheral@50000000/flash-controller@39000/flash@0/partitions */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000_EXISTS 1 +#define DT_N_NODELABEL_slot0_ns_partition DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000_REG_NUM 1 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000_REG_IDX_0_VAL_ADDRESS 327680 /* 0x50000 */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000_REG_IDX_0_VAL_SIZE 196608 /* 0x30000 */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000_RANGES_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000_IRQ_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000_IRQ_LEVEL 0 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000_STATUS_okay 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000_PINCTRL_NUM 0 + +/* fixed-partitions identifier: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000_PARTITION_ID 2 + +/* Generic property macros: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000_P_label "image-0-nonsecure" +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000_P_label_STRING_UNQUOTED image-0-nonsecure +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000_P_label_STRING_TOKEN image_0_nonsecure +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000_P_label_STRING_UPPER_TOKEN IMAGE_0_NONSECURE +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000_P_label_IDX_0 "image-0-nonsecure" +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000_P_label_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000, label, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000_P_label_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000, label, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000_P_label_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000, label, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000_P_label_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000, label, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000_P_label_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000_P_label_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000_P_read_only 0 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000_P_read_only_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000_P_reg {327680 /* 0x50000 */, 196608 /* 0x30000 */} +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000_P_reg_IDX_0 327680 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000_P_reg_IDX_1 196608 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000_P_reg_EXISTS 1 + +/* + * Devicetree node: /soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@80000 + * + * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_80000 + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_80000_PATH "/soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@80000" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_80000_FULL_NAME "partition@80000" + +/* Node parent (/soc/peripheral@50000000/flash-controller@39000/flash@0/partitions) identifier: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_80000_PARENT DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_80000_CHILD_IDX 3 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_80000_CHILD_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_80000_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_80000_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_80000_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_80000_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_80000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_80000_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_80000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_80000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_80000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_80000_ORD 92 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_80000_ORD_STR_SORTABLE 00092 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_80000_REQUIRES_ORDS \ + 88, /* /soc/peripheral@50000000/flash-controller@39000/flash@0/partitions */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_80000_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_80000_EXISTS 1 +#define DT_N_NODELABEL_slot1_partition DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_80000 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_80000_REG_NUM 1 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_80000_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_80000_REG_IDX_0_VAL_ADDRESS 524288 /* 0x80000 */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_80000_REG_IDX_0_VAL_SIZE 262144 /* 0x40000 */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_80000_RANGES_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_80000_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_80000_IRQ_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_80000_IRQ_LEVEL 0 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_80000_STATUS_okay 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_80000_PINCTRL_NUM 0 + +/* fixed-partitions identifier: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_80000_PARTITION_ID 3 + +/* Generic property macros: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_80000_P_label "image-1" +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_80000_P_label_STRING_UNQUOTED image-1 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_80000_P_label_STRING_TOKEN image_1 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_80000_P_label_STRING_UPPER_TOKEN IMAGE_1 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_80000_P_label_IDX_0 "image-1" +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_80000_P_label_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_80000_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_80000, label, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_80000_P_label_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_80000, label, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_80000_P_label_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_80000, label, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_80000_P_label_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_80000, label, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_80000_P_label_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_80000_P_label_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_80000_P_read_only 0 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_80000_P_read_only_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_80000_P_reg {524288 /* 0x80000 */, 262144 /* 0x40000 */} +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_80000_P_reg_IDX_0 524288 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_80000_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_80000_P_reg_IDX_1 262144 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_80000_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_80000_P_reg_EXISTS 1 + +/* + * Devicetree node: /soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@c0000 + * + * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c0000 + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c0000_PATH "/soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@c0000" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c0000_FULL_NAME "partition@c0000" + +/* Node parent (/soc/peripheral@50000000/flash-controller@39000/flash@0/partitions) identifier: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c0000_PARENT DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c0000_CHILD_IDX 4 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c0000_CHILD_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c0000_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c0000_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c0000_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c0000_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c0000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c0000_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c0000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c0000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c0000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c0000_ORD 93 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c0000_ORD_STR_SORTABLE 00093 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c0000_REQUIRES_ORDS \ + 88, /* /soc/peripheral@50000000/flash-controller@39000/flash@0/partitions */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c0000_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c0000_EXISTS 1 +#define DT_N_NODELABEL_slot1_ns_partition DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c0000 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c0000_REG_NUM 1 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c0000_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c0000_REG_IDX_0_VAL_ADDRESS 786432 /* 0xc0000 */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c0000_REG_IDX_0_VAL_SIZE 196608 /* 0x30000 */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c0000_RANGES_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c0000_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c0000_IRQ_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c0000_IRQ_LEVEL 0 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c0000_STATUS_okay 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c0000_PINCTRL_NUM 0 + +/* fixed-partitions identifier: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c0000_PARTITION_ID 4 + +/* Generic property macros: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c0000_P_label "image-1-nonsecure" +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c0000_P_label_STRING_UNQUOTED image-1-nonsecure +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c0000_P_label_STRING_TOKEN image_1_nonsecure +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c0000_P_label_STRING_UPPER_TOKEN IMAGE_1_NONSECURE +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c0000_P_label_IDX_0 "image-1-nonsecure" +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c0000_P_label_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c0000_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c0000, label, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c0000_P_label_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c0000, label, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c0000_P_label_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c0000, label, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c0000_P_label_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c0000, label, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c0000_P_label_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c0000_P_label_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c0000_P_read_only 0 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c0000_P_read_only_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c0000_P_reg {786432 /* 0xc0000 */, 196608 /* 0x30000 */} +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c0000_P_reg_IDX_0 786432 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c0000_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c0000_P_reg_IDX_1 196608 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c0000_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c0000_P_reg_EXISTS 1 + +/* + * Devicetree node: /soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@f0000 + * + * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_f0000 + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_f0000_PATH "/soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@f0000" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_f0000_FULL_NAME "partition@f0000" + +/* Node parent (/soc/peripheral@50000000/flash-controller@39000/flash@0/partitions) identifier: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_f0000_PARENT DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_f0000_CHILD_IDX 5 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_f0000_CHILD_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_f0000_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_f0000_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_f0000_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_f0000_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_f0000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_f0000_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_f0000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_f0000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_f0000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_f0000_ORD 94 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_f0000_ORD_STR_SORTABLE 00094 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_f0000_REQUIRES_ORDS \ + 88, /* /soc/peripheral@50000000/flash-controller@39000/flash@0/partitions */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_f0000_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_f0000_EXISTS 1 +#define DT_N_NODELABEL_scratch_partition DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_f0000 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_f0000_REG_NUM 1 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_f0000_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_f0000_REG_IDX_0_VAL_ADDRESS 983040 /* 0xf0000 */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_f0000_REG_IDX_0_VAL_SIZE 40960 /* 0xa000 */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_f0000_RANGES_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_f0000_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_f0000_IRQ_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_f0000_IRQ_LEVEL 0 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_f0000_STATUS_okay 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_f0000_PINCTRL_NUM 0 + +/* fixed-partitions identifier: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_f0000_PARTITION_ID 5 + +/* Generic property macros: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_f0000_P_label "image-scratch" +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_f0000_P_label_STRING_UNQUOTED image-scratch +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_f0000_P_label_STRING_TOKEN image_scratch +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_f0000_P_label_STRING_UPPER_TOKEN IMAGE_SCRATCH +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_f0000_P_label_IDX_0 "image-scratch" +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_f0000_P_label_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_f0000_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_f0000, label, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_f0000_P_label_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_f0000, label, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_f0000_P_label_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_f0000, label, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_f0000_P_label_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_f0000, label, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_f0000_P_label_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_f0000_P_label_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_f0000_P_read_only 0 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_f0000_P_read_only_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_f0000_P_reg {983040 /* 0xf0000 */, 40960 /* 0xa000 */} +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_f0000_P_reg_IDX_0 983040 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_f0000_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_f0000_P_reg_IDX_1 40960 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_f0000_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_f0000_P_reg_EXISTS 1 + +/* + * Devicetree node: /soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@fa000 + * + * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000 + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000_PATH "/soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@fa000" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000_FULL_NAME "partition@fa000" + +/* Node parent (/soc/peripheral@50000000/flash-controller@39000/flash@0/partitions) identifier: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000_PARENT DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000_CHILD_IDX 6 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000_CHILD_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000_ORD 95 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000_ORD_STR_SORTABLE 00095 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000_REQUIRES_ORDS \ + 88, /* /soc/peripheral@50000000/flash-controller@39000/flash@0/partitions */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000_EXISTS 1 +#define DT_N_NODELABEL_storage_partition DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000_REG_NUM 1 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000_REG_IDX_0_VAL_ADDRESS 1024000 /* 0xfa000 */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000_REG_IDX_0_VAL_SIZE 24576 /* 0x6000 */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000_RANGES_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000_IRQ_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000_IRQ_LEVEL 0 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000_STATUS_okay 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000_PINCTRL_NUM 0 + +/* fixed-partitions identifier: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000_PARTITION_ID 6 + +/* Generic property macros: */ +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000_P_label "storage" +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000_P_label_STRING_UNQUOTED storage +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000_P_label_STRING_TOKEN storage +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000_P_label_STRING_UPPER_TOKEN STORAGE +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000_P_label_IDX_0 "storage" +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000_P_label_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000, label, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000_P_label_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000, label, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000_P_label_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000, label, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000_P_label_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000, label, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000_P_label_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000_P_label_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000_P_read_only 0 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000_P_read_only_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000_P_reg {1024000 /* 0xfa000 */, 24576 /* 0x6000 */} +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000_P_reg_IDX_0 1024000 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000_P_reg_IDX_1 24576 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000_P_reg_EXISTS 1 + +/* + * Devicetree node: /soc/peripheral@50000000/i2c@a000 + * + * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_i2c_a000 + * + * Binding (compatible = nordic,nrf-twim): + * $ZEPHYR_BASE/dts/bindings/i2c/nordic,nrf-twim.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_PATH "/soc/peripheral@50000000/i2c@a000" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_FULL_NAME "i2c@a000" + +/* Node parent (/soc/peripheral@50000000) identifier: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_PARENT DT_N_S_soc_S_peripheral_50000000 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_CHILD_IDX 21 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_CHILD_NUM 3 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_CHILD_NUM_STATUS_OKAY 3 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_FOREACH_CHILD(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_eeprom_50) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_eeprom_50) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_eeprom_50, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_eeprom_50, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_eeprom_50) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_eeprom_50) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_eeprom_50, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_eeprom_50, __VA_ARGS__) + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_ORD 96 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_ORD_STR_SORTABLE 00096 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_REQUIRES_ORDS \ + 6, /* /soc/interrupt-controller@e000e100 */ \ + 8, /* /soc/peripheral@50000000 */ \ + 21, /* /pin-controller/i2c2_default */ \ + 23, /* /pin-controller/i2c2_sleep */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_SUPPORTS_ORDS \ + 97, /* /soc/peripheral@50000000/i2c@a000/eeprom@50 */ \ + 98, /* /soc/peripheral@50000000/i2c@a000/lis2dh@18 */ \ + 99, /* /soc/peripheral@50000000/i2c@a000/npm1300@6b */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_EXISTS 1 +#define DT_N_INST_0_nordic_nrf_twim DT_N_S_soc_S_peripheral_50000000_S_i2c_a000 +#define DT_N_NODELABEL_i2c2 DT_N_S_soc_S_peripheral_50000000_S_i2c_a000 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_REG_NUM 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_REG_IDX_0_VAL_ADDRESS 1342218240 /* 0x5000a000 */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_RANGES_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_IRQ_NUM 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_IRQ_IDX_0_VAL_irq 10 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_IRQ_IDX_0_VAL_priority 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_IRQ_LEVEL 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_COMPAT_MATCHES_nordic_nrf_twim 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor" +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_COMPAT_MODEL_IDX_0 "nrf-twim" +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_STATUS_okay 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_PINCTRL_NUM 2 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_PINCTRL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_PINCTRL_IDX_0_TOKEN default +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_PINCTRL_IDX_0_UPPER_TOKEN DEFAULT +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_PINCTRL_NAME_default_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_PINCTRL_NAME_default_IDX 0 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_PINCTRL_NAME_default_IDX_0_PH DT_N_S_pin_controller_S_i2c2_default +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_PINCTRL_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_PINCTRL_IDX_1_TOKEN sleep +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_PINCTRL_IDX_1_UPPER_TOKEN SLEEP +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_PINCTRL_NAME_sleep_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_PINCTRL_NAME_sleep_IDX 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_PINCTRL_NAME_sleep_IDX_0_PH DT_N_S_pin_controller_S_i2c2_sleep + +/* Generic property macros: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_wakeup_source 0 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_status "okay" +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_status_STRING_UNQUOTED okay +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_status_STRING_TOKEN okay +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_status_STRING_UPPER_TOKEN OKAY +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_status_IDX_0 "okay" +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_status_ENUM_IDX 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_status_ENUM_VAL_okay_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_status_ENUM_TOKEN okay +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_status_ENUM_UPPER_TOKEN OKAY +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000, status, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000, status, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_status_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_status_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_compatible {"nordic,nrf-twim"} +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_compatible_IDX_0 "nordic,nrf-twim" +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-twim +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_twim +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_TWIM +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000, compatible, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000, compatible, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_compatible_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_reg {40960 /* 0xa000 */, 4096 /* 0x1000 */} +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_reg_IDX_0 40960 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_reg_IDX_1 4096 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_reg_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_interrupts {10 /* 0xa */, 1 /* 0x1 */} +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_interrupts_IDX_0 10 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_interrupts_IDX_1 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_clock_frequency 400000 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_clock_frequency_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_sq_size 4 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_sq_size_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_cq_size 4 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_cq_size_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_pinctrl_0_IDX_0 DT_N_S_pin_controller_S_i2c2_default +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_pinctrl_0_IDX_0_PH DT_N_S_pin_controller_S_i2c2_default +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_pinctrl_0_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_pinctrl_0_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000, pinctrl_0, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_pinctrl_0_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000, pinctrl_0, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_pinctrl_0_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000, pinctrl_0, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_pinctrl_0_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000, pinctrl_0, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_pinctrl_0_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_pinctrl_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_pinctrl_1_IDX_0 DT_N_S_pin_controller_S_i2c2_sleep +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_pinctrl_1_IDX_0_PH DT_N_S_pin_controller_S_i2c2_sleep +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_pinctrl_1_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_pinctrl_1_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000, pinctrl_1, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_pinctrl_1_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000, pinctrl_1, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_pinctrl_1_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000, pinctrl_1, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_pinctrl_1_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000, pinctrl_1, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_pinctrl_1_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_pinctrl_1_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_pinctrl_names {"default", "sleep"} +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_pinctrl_names_IDX_0 "default" +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_pinctrl_names_IDX_0_STRING_UNQUOTED default +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_pinctrl_names_IDX_0_STRING_TOKEN default +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_pinctrl_names_IDX_0_STRING_UPPER_TOKEN DEFAULT +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_pinctrl_names_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_pinctrl_names_IDX_1 "sleep" +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_pinctrl_names_IDX_1_STRING_UNQUOTED sleep +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_pinctrl_names_IDX_1_STRING_TOKEN sleep +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_pinctrl_names_IDX_1_STRING_UPPER_TOKEN SLEEP +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_pinctrl_names_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_pinctrl_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000, pinctrl_names, 0) \ + fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000, pinctrl_names, 1) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_pinctrl_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000, pinctrl_names, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000, pinctrl_names, 1) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_pinctrl_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000, pinctrl_names, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000, pinctrl_names, 1, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_pinctrl_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000, pinctrl_names, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000, pinctrl_names, 1, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_pinctrl_names_LEN 2 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_pinctrl_names_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_easydma_maxcnt_bits 13 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_easydma_maxcnt_bits_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_zephyr_concat_buf_size 16 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_zephyr_concat_buf_size_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_zephyr_flash_buf_max_size 16 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_zephyr_flash_buf_max_size_EXISTS 1 + +/* + * Devicetree node: /soc/peripheral@50000000/i2c@a000/eeprom@50 + * + * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_eeprom_50 + * + * Binding (compatible = atmel,at24): + * $ZEPHYR_BASE/dts/bindings/mtd/atmel,at24.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_eeprom_50_PATH "/soc/peripheral@50000000/i2c@a000/eeprom@50" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_eeprom_50_FULL_NAME "eeprom@50" + +/* Node parent (/soc/peripheral@50000000/i2c@a000) identifier: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_eeprom_50_PARENT DT_N_S_soc_S_peripheral_50000000_S_i2c_a000 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_eeprom_50_CHILD_IDX 2 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_eeprom_50_CHILD_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_eeprom_50_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_eeprom_50_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_eeprom_50_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_eeprom_50_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_eeprom_50_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_eeprom_50_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_eeprom_50_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_eeprom_50_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_eeprom_50_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_eeprom_50_ORD 97 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_eeprom_50_ORD_STR_SORTABLE 00097 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_eeprom_50_REQUIRES_ORDS \ + 96, /* /soc/peripheral@50000000/i2c@a000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_eeprom_50_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_eeprom_50_EXISTS 1 +#define DT_N_INST_0_atmel_at24 DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_eeprom_50 +#define DT_N_NODELABEL_eeprom0 DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_eeprom_50 + +/* Bus info (controller: '/soc/peripheral@50000000/i2c@a000', type: '['i2c']') */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_eeprom_50_BUS_i2c 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_eeprom_50_BUS DT_N_S_soc_S_peripheral_50000000_S_i2c_a000 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_eeprom_50_REG_NUM 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_eeprom_50_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_eeprom_50_REG_IDX_0_VAL_ADDRESS 80 /* 0x50 */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_eeprom_50_RANGES_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_eeprom_50_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_eeprom_50_IRQ_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_eeprom_50_IRQ_LEVEL 0 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_eeprom_50_COMPAT_MATCHES_atmel_at24 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_eeprom_50_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_eeprom_50_COMPAT_VENDOR_IDX_0 "Atmel Corporation" +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_eeprom_50_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_eeprom_50_COMPAT_MODEL_IDX_0 "at24" +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_eeprom_50_STATUS_okay 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_eeprom_50_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_eeprom_50_P_wakeup_source 0 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_eeprom_50_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_eeprom_50_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_eeprom_50_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_eeprom_50_P_compatible {"atmel,at24"} +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_eeprom_50_P_compatible_IDX_0 "atmel,at24" +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_eeprom_50_P_compatible_IDX_0_STRING_UNQUOTED atmel,at24 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_eeprom_50_P_compatible_IDX_0_STRING_TOKEN atmel_at24 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_eeprom_50_P_compatible_IDX_0_STRING_UPPER_TOKEN ATMEL_AT24 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_eeprom_50_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_eeprom_50_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_eeprom_50, compatible, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_eeprom_50_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_eeprom_50, compatible, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_eeprom_50_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_eeprom_50, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_eeprom_50_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_eeprom_50, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_eeprom_50_P_compatible_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_eeprom_50_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_eeprom_50_P_reg {80 /* 0x50 */} +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_eeprom_50_P_reg_IDX_0 80 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_eeprom_50_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_eeprom_50_P_reg_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_eeprom_50_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_eeprom_50_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_eeprom_50_P_size 2048 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_eeprom_50_P_size_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_eeprom_50_P_read_only 0 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_eeprom_50_P_read_only_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_eeprom_50_P_pagesize 32 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_eeprom_50_P_pagesize_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_eeprom_50_P_address_width 16 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_eeprom_50_P_address_width_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_eeprom_50_P_timeout 5 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_eeprom_50_P_timeout_EXISTS 1 + +/* + * Devicetree node: /soc/peripheral@50000000/i2c@a000/lis2dh@18 + * + * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18 + * + * Binding (compatible = st,lis2dh): + * $ZEPHYR_BASE/dts/bindings/sensor/st,lis2dh-i2c.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18_PATH "/soc/peripheral@50000000/i2c@a000/lis2dh@18" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18_FULL_NAME "lis2dh@18" + +/* Node parent (/soc/peripheral@50000000/i2c@a000) identifier: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18_PARENT DT_N_S_soc_S_peripheral_50000000_S_i2c_a000 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18_CHILD_IDX 1 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18_CHILD_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18_ORD 98 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18_ORD_STR_SORTABLE 00098 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18_REQUIRES_ORDS \ + 9, /* /soc/peripheral@50000000/gpio@842500 */ \ + 96, /* /soc/peripheral@50000000/i2c@a000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18_EXISTS 1 +#define DT_N_INST_0_st_lis2dh DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18 +#define DT_N_NODELABEL_lis2dh DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18 + +/* Bus info (controller: '/soc/peripheral@50000000/i2c@a000', type: '['i2c']') */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18_BUS_i2c 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18_BUS DT_N_S_soc_S_peripheral_50000000_S_i2c_a000 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18_REG_NUM 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18_REG_IDX_0_VAL_ADDRESS 24 /* 0x18 */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18_RANGES_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18_IRQ_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18_IRQ_LEVEL 0 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18_COMPAT_MATCHES_st_lis2dh 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18_COMPAT_MODEL_IDX_0 "lis2dh" +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18_STATUS_okay 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18_P_wakeup_source 0 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18_P_compatible {"st,lis2dh"} +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18_P_compatible_IDX_0 "st,lis2dh" +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18_P_compatible_IDX_0_STRING_UNQUOTED st,lis2dh +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18_P_compatible_IDX_0_STRING_TOKEN st_lis2dh +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_LIS2DH +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18, compatible, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18, compatible, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18_P_compatible_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18_P_reg {24 /* 0x18 */} +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18_P_reg_IDX_0 24 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18_P_reg_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18_P_irq_gpios_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18_P_irq_gpios_IDX_0_PH DT_N_S_soc_S_peripheral_50000000_S_gpio_842500 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18_P_irq_gpios_IDX_0_VAL_pin 29 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18_P_irq_gpios_IDX_0_VAL_pin_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18_P_irq_gpios_IDX_0_VAL_flags 0 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18_P_irq_gpios_IDX_0_VAL_flags_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18_P_irq_gpios_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18, irq_gpios, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18_P_irq_gpios_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18, irq_gpios, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18_P_irq_gpios_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18, irq_gpios, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18_P_irq_gpios_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18, irq_gpios, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18_P_irq_gpios_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18_P_irq_gpios_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18_P_int1_gpio_config 0 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18_P_int1_gpio_config_ENUM_IDX 0 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18_P_int1_gpio_config_ENUM_VAL_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18_P_int1_gpio_config_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18_P_int2_gpio_config 0 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18_P_int2_gpio_config_ENUM_IDX 0 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18_P_int2_gpio_config_ENUM_VAL_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18_P_int2_gpio_config_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18_P_disconnect_sdo_sa0_pull_up 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18_P_disconnect_sdo_sa0_pull_up_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18_P_anym_on_int1 0 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18_P_anym_on_int1_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18_P_anym_no_latch 0 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18_P_anym_no_latch_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18_P_anym_mode 0 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18_P_anym_mode_ENUM_IDX 0 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18_P_anym_mode_ENUM_VAL_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18_P_anym_mode_EXISTS 1 + +/* + * Devicetree node: /soc/peripheral@50000000/i2c@a000/npm1300@6b + * + * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b + * + * Binding (compatible = nordic,npm1300): + * $ZEPHYR_BASE/dts/bindings/mfd/nordic,npm1300.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_PATH "/soc/peripheral@50000000/i2c@a000/npm1300@6b" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_FULL_NAME "npm1300@6b" + +/* Node parent (/soc/peripheral@50000000/i2c@a000) identifier: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_PARENT DT_N_S_soc_S_peripheral_50000000_S_i2c_a000 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_CHILD_IDX 0 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_CHILD_NUM 2 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_CHILD_NUM_STATUS_OKAY 2 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_FOREACH_CHILD(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators, __VA_ARGS__) + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_ORD 99 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_ORD_STR_SORTABLE 00099 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_REQUIRES_ORDS \ + 96, /* /soc/peripheral@50000000/i2c@a000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_SUPPORTS_ORDS \ + 100, /* /soc/peripheral@50000000/i2c@a000/npm1300@6b/charger */ \ + 101, /* /soc/peripheral@50000000/i2c@a000/npm1300@6b/regulators */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_EXISTS 1 +#define DT_N_INST_0_nordic_npm1300 DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b +#define DT_N_NODELABEL_pmic_main DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b + +/* Bus info (controller: '/soc/peripheral@50000000/i2c@a000', type: '['i2c']') */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_BUS_i2c 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_BUS DT_N_S_soc_S_peripheral_50000000_S_i2c_a000 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_REG_NUM 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_REG_IDX_0_VAL_ADDRESS 107 /* 0x6b */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_RANGES_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_IRQ_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_IRQ_LEVEL 0 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_COMPAT_MATCHES_nordic_npm1300 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor" +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_COMPAT_MODEL_IDX_0 "npm1300" +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_STATUS_okay 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_P_wakeup_source 0 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_P_compatible {"nordic,npm1300"} +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_P_compatible_IDX_0 "nordic,npm1300" +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_P_compatible_IDX_0_STRING_UNQUOTED nordic,npm1300 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_P_compatible_IDX_0_STRING_TOKEN nordic_npm1300 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NPM1300 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b, compatible, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b, compatible, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_P_compatible_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_P_reg {107 /* 0x6b */} +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_P_reg_IDX_0 107 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_P_reg_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_P_ship_to_active_time_ms 96 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_P_ship_to_active_time_ms_ENUM_IDX 3 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_P_ship_to_active_time_ms_ENUM_VAL_96_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_P_ship_to_active_time_ms_EXISTS 1 + +/* + * Devicetree node: /soc/peripheral@50000000/i2c@a000/npm1300@6b/charger + * + * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger + * + * Binding (compatible = nordic,npm1300-charger): + * $ZEPHYR_BASE/dts/bindings/sensor/nordic,npm1300-charger.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger_PATH "/soc/peripheral@50000000/i2c@a000/npm1300@6b/charger" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger_FULL_NAME "charger" + +/* Node parent (/soc/peripheral@50000000/i2c@a000/npm1300@6b) identifier: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger_PARENT DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger_CHILD_IDX 0 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger_CHILD_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger_ORD 100 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger_ORD_STR_SORTABLE 00100 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger_REQUIRES_ORDS \ + 99, /* /soc/peripheral@50000000/i2c@a000/npm1300@6b */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger_EXISTS 1 +#define DT_N_INST_0_nordic_npm1300_charger DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger +#define DT_N_NODELABEL_pmic_charger DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger + +/* Bus info (controller: '/soc/peripheral@50000000/i2c@a000', type: '['i2c']') */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger_BUS_i2c 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger_BUS DT_N_S_soc_S_peripheral_50000000_S_i2c_a000 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger_REG_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger_RANGES_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger_IRQ_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger_IRQ_LEVEL 0 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger_COMPAT_MATCHES_nordic_npm1300_charger 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor" +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger_COMPAT_MODEL_IDX_0 "npm1300-charger" +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger_STATUS_okay 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger_P_wakeup_source 0 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger_P_compatible {"nordic,npm1300-charger"} +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger_P_compatible_IDX_0 "nordic,npm1300-charger" +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger_P_compatible_IDX_0_STRING_UNQUOTED nordic,npm1300-charger +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger_P_compatible_IDX_0_STRING_TOKEN nordic_npm1300_charger +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NPM1300_CHARGER +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger, compatible, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger, compatible, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger_P_compatible_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger_P_term_microvolt 4150000 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger_P_term_microvolt_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger_P_term_warm_microvolt 4000000 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger_P_term_warm_microvolt_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger_P_current_microamp 800000 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger_P_current_microamp_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger_P_dischg_limit_microamp 1000000 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger_P_dischg_limit_microamp_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger_P_vbus_limit_microamp 1000000 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger_P_vbus_limit_microamp_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger_P_thermistor_ohms 10000 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger_P_thermistor_ohms_ENUM_IDX 0 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger_P_thermistor_ohms_ENUM_VAL_10000_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger_P_thermistor_ohms_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger_P_thermistor_beta 3380 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger_P_thermistor_beta_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger_P_charging_enable 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger_P_charging_enable_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger_P_trickle_microvolt 2900000 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger_P_trickle_microvolt_ENUM_IDX 0 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger_P_trickle_microvolt_ENUM_VAL_2900000_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger_P_trickle_microvolt_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger_P_term_current_percent 10 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger_P_term_current_percent_ENUM_IDX 0 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger_P_term_current_percent_ENUM_VAL_10_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger_P_term_current_percent_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger_P_vbatlow_charge_enable 0 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger_P_vbatlow_charge_enable_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger_P_disable_recharge 0 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger_P_disable_recharge_EXISTS 1 + +/* + * Devicetree node: /soc/peripheral@50000000/i2c@a000/npm1300@6b/regulators + * + * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators + * + * Binding (compatible = nordic,npm1300-regulator): + * $ZEPHYR_BASE/dts/bindings/regulator/nordic,npm1300-regulator.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_PATH "/soc/peripheral@50000000/i2c@a000/npm1300@6b/regulators" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_FULL_NAME "regulators" + +/* Node parent (/soc/peripheral@50000000/i2c@a000/npm1300@6b) identifier: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_PARENT DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_CHILD_IDX 1 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_CHILD_NUM 2 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_CHILD_NUM_STATUS_OKAY 2 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_FOREACH_CHILD(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck1) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck2) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck1) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck2) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck1, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck2, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck2, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck1) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck2) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck1) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck2) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck1, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck2, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck2, __VA_ARGS__) + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_ORD 101 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_ORD_STR_SORTABLE 00101 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_REQUIRES_ORDS \ + 99, /* /soc/peripheral@50000000/i2c@a000/npm1300@6b */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_SUPPORTS_ORDS \ + 102, /* /soc/peripheral@50000000/i2c@a000/npm1300@6b/regulators/BUCK1 */ \ + 103, /* /soc/peripheral@50000000/i2c@a000/npm1300@6b/regulators/BUCK2 */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_EXISTS 1 +#define DT_N_INST_0_nordic_npm1300_regulator DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators + +/* Bus info (controller: '/soc/peripheral@50000000/i2c@a000', type: '['i2c']') */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_BUS_i2c 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_BUS DT_N_S_soc_S_peripheral_50000000_S_i2c_a000 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_REG_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_RANGES_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_IRQ_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_IRQ_LEVEL 0 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_COMPAT_MATCHES_nordic_npm1300_regulator 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor" +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_COMPAT_MODEL_IDX_0 "npm1300-regulator" +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_STATUS_okay 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_P_wakeup_source 0 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_P_compatible {"nordic,npm1300-regulator"} +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_P_compatible_IDX_0 "nordic,npm1300-regulator" +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_P_compatible_IDX_0_STRING_UNQUOTED nordic,npm1300-regulator +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_P_compatible_IDX_0_STRING_TOKEN nordic_npm1300_regulator +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NPM1300_REGULATOR +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators, compatible, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators, compatible, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_P_compatible_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_P_zephyr_deferred_init_EXISTS 1 + +/* + * Devicetree node: /soc/peripheral@50000000/i2c@a000/npm1300@6b/regulators/BUCK1 + * + * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck1 + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck1_PATH "/soc/peripheral@50000000/i2c@a000/npm1300@6b/regulators/BUCK1" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck1_FULL_NAME "BUCK1" + +/* Node parent (/soc/peripheral@50000000/i2c@a000/npm1300@6b/regulators) identifier: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck1_PARENT DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck1_CHILD_IDX 0 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck1_CHILD_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck1_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck1_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck1_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck1_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck1_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck1_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck1_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck1_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck1_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck1_ORD 102 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck1_ORD_STR_SORTABLE 00102 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck1_REQUIRES_ORDS \ + 101, /* /soc/peripheral@50000000/i2c@a000/npm1300@6b/regulators */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck1_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck1_EXISTS 1 +#define DT_N_NODELABEL_reg_1v8 DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck1 + +/* Bus info (controller: '/soc/peripheral@50000000/i2c@a000', type: '['i2c']') */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck1_BUS_i2c 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck1_BUS DT_N_S_soc_S_peripheral_50000000_S_i2c_a000 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck1_REG_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck1_RANGES_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck1_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck1_IRQ_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck1_IRQ_LEVEL 0 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck1_STATUS_okay 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck1_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck1_P_regulator_min_microvolt 1800000 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck1_P_regulator_min_microvolt_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck1_P_regulator_max_microvolt 1800000 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck1_P_regulator_max_microvolt_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck1_P_regulator_always_on 0 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck1_P_regulator_always_on_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck1_P_regulator_boot_on 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck1_P_regulator_boot_on_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck1_P_regulator_boot_off 0 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck1_P_regulator_boot_off_EXISTS 1 + +/* + * Devicetree node: /soc/peripheral@50000000/i2c@a000/npm1300@6b/regulators/BUCK2 + * + * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck2 + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck2_PATH "/soc/peripheral@50000000/i2c@a000/npm1300@6b/regulators/BUCK2" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck2_FULL_NAME "BUCK2" + +/* Node parent (/soc/peripheral@50000000/i2c@a000/npm1300@6b/regulators) identifier: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck2_PARENT DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck2_CHILD_IDX 1 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck2_CHILD_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck2_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck2_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck2_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck2_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck2_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck2_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck2_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck2_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck2_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck2_ORD 103 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck2_ORD_STR_SORTABLE 00103 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck2_REQUIRES_ORDS \ + 101, /* /soc/peripheral@50000000/i2c@a000/npm1300@6b/regulators */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck2_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck2_EXISTS 1 +#define DT_N_NODELABEL_reg_3v3 DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck2 + +/* Bus info (controller: '/soc/peripheral@50000000/i2c@a000', type: '['i2c']') */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck2_BUS_i2c 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck2_BUS DT_N_S_soc_S_peripheral_50000000_S_i2c_a000 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck2_REG_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck2_RANGES_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck2_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck2_IRQ_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck2_IRQ_LEVEL 0 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck2_STATUS_okay 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck2_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck2_P_regulator_min_microvolt 3300000 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck2_P_regulator_min_microvolt_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck2_P_regulator_max_microvolt 3300000 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck2_P_regulator_max_microvolt_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck2_P_regulator_always_on 0 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck2_P_regulator_always_on_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck2_P_regulator_boot_on 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck2_P_regulator_boot_on_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck2_P_regulator_boot_off 0 +#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck2_P_regulator_boot_off_EXISTS 1 + +/* + * Devicetree node: /soc/peripheral@50000000/power@5000 + * + * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_power_5000 + * + * Binding (compatible = nordic,nrf-power): + * $ZEPHYR_BASE/dts/bindings/power/nordic,nrf-power.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_PATH "/soc/peripheral@50000000/power@5000" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_FULL_NAME "power@5000" + +/* Node parent (/soc/peripheral@50000000) identifier: */ +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_PARENT DT_N_S_soc_S_peripheral_50000000 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_CHILD_IDX 35 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_CHILD_NUM 2 +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_CHILD_NUM_STATUS_OKAY 2 +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_FOREACH_CHILD(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520) +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520) +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520) +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520) +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520, __VA_ARGS__) + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_ORD 104 +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_ORD_STR_SORTABLE 00104 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_REQUIRES_ORDS \ + 6, /* /soc/interrupt-controller@e000e100 */ \ + 8, /* /soc/peripheral@50000000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_SUPPORTS_ORDS \ + 105, /* /soc/peripheral@50000000/power@5000/gpregret1@51c */ \ + 106, /* /soc/peripheral@50000000/power@5000/gpregret2@520 */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_EXISTS 1 +#define DT_N_INST_0_nordic_nrf_power DT_N_S_soc_S_peripheral_50000000_S_power_5000 +#define DT_N_NODELABEL_power DT_N_S_soc_S_peripheral_50000000_S_power_5000 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_REG_NUM 1 +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_REG_IDX_0_VAL_ADDRESS 1342197760 /* 0x50005000 */ +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */ +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_RANGES_NUM 1 +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_RANGES_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_RANGES_IDX_0_VAL_CHILD_BUS_ADDRESS 0 /* 0x0 */ +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_RANGES_IDX_0_VAL_PARENT_BUS_ADDRESS 20480 /* 0x5000 */ +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_RANGES_IDX_0_VAL_LENGTH 4096 /* 0x1000 */ +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_FOREACH_RANGE(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_IRQ_NUM 1 +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_IRQ_IDX_0_VAL_irq 5 +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_IRQ_IDX_0_VAL_priority 1 +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_IRQ_LEVEL 1 +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_COMPAT_MATCHES_nordic_nrf_power 1 +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor" +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_COMPAT_MODEL_IDX_0 "nrf-power" +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_STATUS_okay 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_P_wakeup_source 0 +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_P_status "okay" +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_P_status_STRING_UNQUOTED okay +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_P_status_STRING_TOKEN okay +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_P_status_STRING_UPPER_TOKEN OKAY +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_P_status_IDX_0 "okay" +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_P_status_ENUM_IDX 1 +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_P_status_ENUM_VAL_okay_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_P_status_ENUM_TOKEN okay +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_P_status_ENUM_UPPER_TOKEN OKAY +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000, status, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000, status, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_P_status_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_P_status_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_P_compatible {"nordic,nrf-power"} +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_P_compatible_IDX_0 "nordic,nrf-power" +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-power +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_power +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_POWER +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000, compatible, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000, compatible, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_P_compatible_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_P_reg {20480 /* 0x5000 */, 4096 /* 0x1000 */} +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_P_reg_IDX_0 20480 +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_P_reg_IDX_1 4096 +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_P_reg_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_P_interrupts {5 /* 0x5 */, 1 /* 0x1 */} +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_P_interrupts_IDX_0 5 +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_P_interrupts_IDX_1 1 +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_P_zephyr_deferred_init_EXISTS 1 + +/* + * Devicetree node: /soc/peripheral@50000000/power@5000/gpregret1@51c + * + * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c + * + * Binding (compatible = nordic,nrf-gpregret): + * $ZEPHYR_BASE/dts/bindings/retained_mem/nordic,nrf-gpreget.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_PATH "/soc/peripheral@50000000/power@5000/gpregret1@51c" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_FULL_NAME "gpregret1@51c" + +/* Node parent (/soc/peripheral@50000000/power@5000) identifier: */ +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_PARENT DT_N_S_soc_S_peripheral_50000000_S_power_5000 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_CHILD_IDX 0 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_CHILD_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_ORD 105 +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_ORD_STR_SORTABLE 00105 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_REQUIRES_ORDS \ + 104, /* /soc/peripheral@50000000/power@5000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_EXISTS 1 +#define DT_N_INST_0_nordic_nrf_gpregret DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c +#define DT_N_NODELABEL_gpregret1 DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_REG_NUM 1 +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_REG_IDX_0_VAL_ADDRESS 1342199068 /* 0x5000551c */ +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_REG_IDX_0_VAL_SIZE 1 /* 0x1 */ +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_RANGES_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_IRQ_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_IRQ_LEVEL 0 +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_COMPAT_MATCHES_nordic_nrf_gpregret 1 +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor" +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_COMPAT_MODEL_IDX_0 "nrf-gpregret" +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_STATUS_okay 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_P_wakeup_source 0 +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_P_status "okay" +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_P_status_STRING_UNQUOTED okay +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_P_status_STRING_TOKEN okay +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_P_status_STRING_UPPER_TOKEN OKAY +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_P_status_IDX_0 "okay" +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_P_status_ENUM_IDX 1 +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_P_status_ENUM_VAL_okay_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_P_status_ENUM_TOKEN okay +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_P_status_ENUM_UPPER_TOKEN OKAY +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c, status, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c, status, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_P_status_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_P_status_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_P_compatible {"nordic,nrf-gpregret"} +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_P_compatible_IDX_0 "nordic,nrf-gpregret" +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-gpregret +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_gpregret +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_GPREGRET +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c, compatible, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c, compatible, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_P_compatible_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_P_reg {1308 /* 0x51c */, 1 /* 0x1 */} +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_P_reg_IDX_0 1308 +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_P_reg_IDX_1 1 +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_P_reg_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_P_zephyr_deferred_init_EXISTS 1 + +/* + * Devicetree node: /soc/peripheral@50000000/power@5000/gpregret2@520 + * + * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520 + * + * Binding (compatible = nordic,nrf-gpregret): + * $ZEPHYR_BASE/dts/bindings/retained_mem/nordic,nrf-gpreget.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_PATH "/soc/peripheral@50000000/power@5000/gpregret2@520" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_FULL_NAME "gpregret2@520" + +/* Node parent (/soc/peripheral@50000000/power@5000) identifier: */ +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_PARENT DT_N_S_soc_S_peripheral_50000000_S_power_5000 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_CHILD_IDX 1 + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_CHILD_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_ORD 106 +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_ORD_STR_SORTABLE 00106 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_REQUIRES_ORDS \ + 104, /* /soc/peripheral@50000000/power@5000 */ + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_SUPPORTS_ORDS /* nothing */ + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_EXISTS 1 +#define DT_N_INST_1_nordic_nrf_gpregret DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520 +#define DT_N_NODELABEL_gpregret2 DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_REG_NUM 1 +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_REG_IDX_0_VAL_ADDRESS 1342199072 /* 0x50005520 */ +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_REG_IDX_0_VAL_SIZE 1 /* 0x1 */ +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_RANGES_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_IRQ_NUM 0 +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_IRQ_LEVEL 0 +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_COMPAT_MATCHES_nordic_nrf_gpregret 1 +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor" +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_COMPAT_MODEL_IDX_0 "nrf-gpregret" +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_STATUS_okay 1 + +/* Pin control (pinctrl-<i>, pinctrl-names) properties: */ +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_P_wakeup_source 0 +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_P_status "okay" +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_P_status_STRING_UNQUOTED okay +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_P_status_STRING_TOKEN okay +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_P_status_STRING_UPPER_TOKEN OKAY +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_P_status_IDX_0 "okay" +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_P_status_ENUM_IDX 1 +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_P_status_ENUM_VAL_okay_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_P_status_ENUM_TOKEN okay +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_P_status_ENUM_UPPER_TOKEN OKAY +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520, status, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520, status, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_P_status_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_P_status_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_P_compatible {"nordic,nrf-gpregret"} +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_P_compatible_IDX_0 "nordic,nrf-gpregret" +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-gpregret +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_gpregret +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_GPREGRET +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520, compatible, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520, compatible, 0) +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_P_compatible_LEN 1 +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_P_reg {1312 /* 0x520 */, 1 /* 0x1 */} +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_P_reg_IDX_0 1312 +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_P_reg_IDX_1 1 +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_P_reg_EXISTS 1 +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_P_zephyr_deferred_init_EXISTS 1 + +/* + * Chosen nodes + */ +#define DT_CHOSEN_zephyr_entropy DT_N_S_soc_S_crypto_50840000 +#define DT_CHOSEN_zephyr_entropy_EXISTS 1 +#define DT_CHOSEN_zephyr_flash_controller DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000 +#define DT_CHOSEN_zephyr_flash_controller_EXISTS 1 +#define DT_CHOSEN_zephyr_console DT_N_S_soc_S_peripheral_50000000_S_uart_8000 +#define DT_CHOSEN_zephyr_console_EXISTS 1 +#define DT_CHOSEN_zephyr_shell_uart DT_N_S_soc_S_peripheral_50000000_S_uart_8000 +#define DT_CHOSEN_zephyr_shell_uart_EXISTS 1 +#define DT_CHOSEN_zephyr_uart_mcumgr DT_N_S_soc_S_peripheral_50000000_S_uart_8000 +#define DT_CHOSEN_zephyr_uart_mcumgr_EXISTS 1 +#define DT_CHOSEN_zephyr_sram DT_N_S_reserved_memory_S_image_s_20000000 +#define DT_CHOSEN_zephyr_sram_EXISTS 1 +#define DT_CHOSEN_zephyr_flash DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0 +#define DT_CHOSEN_zephyr_flash_EXISTS 1 +#define DT_CHOSEN_zephyr_code_partition DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0 +#define DT_CHOSEN_zephyr_code_partition_EXISTS 1 +#define DT_CHOSEN_zephyr_sram_secure_partition DT_N_S_reserved_memory_S_image_s_20000000 +#define DT_CHOSEN_zephyr_sram_secure_partition_EXISTS 1 +#define DT_CHOSEN_zephyr_sram_non_secure_partition DT_N_S_reserved_memory_S_image_ns_20020000 +#define DT_CHOSEN_zephyr_sram_non_secure_partition_EXISTS 1 + +/* Macros for iterating over all nodes and enabled nodes */ +#define DT_FOREACH_HELPER(fn) fn(DT_N) fn(DT_N_S_chosen) fn(DT_N_S_aliases) fn(DT_N_S_soc) fn(DT_N_S_soc_S_interrupt_controller_e000e100) fn(DT_N_S_soc_S_timer_e000e010) fn(DT_N_S_soc_S_memory_20000000) fn(DT_N_S_soc_S_peripheral_50000000) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_80000) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c0000) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_f0000) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000) fn(DT_N_S_soc_S_peripheral_50000000_S_adc_e000) fn(DT_N_S_soc_S_peripheral_50000000_S_dppic_17000) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1b000) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1c000) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1d000) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1e000) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1f000) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_20000) fn(DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000) fn(DT_N_S_soc_S_peripheral_50000000_S_i2s_28000) fn(DT_N_S_soc_S_peripheral_50000000_S_kmu_39000) fn(DT_N_S_soc_S_peripheral_50000000_S_pdm_26000) fn(DT_N_S_soc_S_peripheral_50000000_S_regulator_4000) fn(DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_8000) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_9000) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_a000) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_b000) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_8000) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_9000) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck1) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck2) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_eeprom_50) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_b000) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_8000) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_9000) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_a000) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_21000) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_22000) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_23000) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_24000) fn(DT_N_S_soc_S_peripheral_50000000_S_gpio_842500) fn(DT_N_S_soc_S_peripheral_50000000_S_rtc_14000) fn(DT_N_S_soc_S_peripheral_50000000_S_rtc_15000) fn(DT_N_S_soc_S_peripheral_50000000_S_clock_5000) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520) fn(DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000) fn(DT_N_S_soc_S_peripheral_50000000_S_timer_f000) fn(DT_N_S_soc_S_peripheral_50000000_S_timer_10000) fn(DT_N_S_soc_S_peripheral_50000000_S_timer_11000) fn(DT_N_S_soc_S_crypto_50840000) fn(DT_N_S_soc_S_ctrlap_50006000) fn(DT_N_S_soc_S_gpiote_5000d000) fn(DT_N_S_soc_S_gpiote_40031000) fn(DT_N_S_soc_S_spu_50003000) fn(DT_N_S_soc_S_ficr_ff0000) fn(DT_N_S_soc_S_uicr_ff8000) fn(DT_N_S_pin_controller) fn(DT_N_S_pin_controller_S_uart0_default) fn(DT_N_S_pin_controller_S_uart0_default_S_group1) fn(DT_N_S_pin_controller_S_uart0_sleep) fn(DT_N_S_pin_controller_S_uart0_sleep_S_group1) fn(DT_N_S_pin_controller_S_i2c2_default) fn(DT_N_S_pin_controller_S_i2c2_default_S_group1) fn(DT_N_S_pin_controller_S_i2c2_sleep) fn(DT_N_S_pin_controller_S_i2c2_sleep_S_group1) fn(DT_N_S_pin_controller_S_pwm0_default) fn(DT_N_S_pin_controller_S_pwm0_default_S_group1) fn(DT_N_S_pin_controller_S_pwm0_sleep) fn(DT_N_S_pin_controller_S_pwm0_sleep_S_group1) fn(DT_N_S_pin_controller_S_spi3_default) fn(DT_N_S_pin_controller_S_spi3_default_S_group1) fn(DT_N_S_pin_controller_S_spi3_sleep) fn(DT_N_S_pin_controller_S_spi3_sleep_S_group1) fn(DT_N_S_entropy_bt_hci) fn(DT_N_S_sw_pwm) fn(DT_N_S_cpus) fn(DT_N_S_cpus_S_cpu_0) fn(DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90) fn(DT_N_S_leds) fn(DT_N_S_leds_S_led_0) fn(DT_N_S_pwmleds) fn(DT_N_S_pwmleds_S_pwm_led_0) fn(DT_N_S_buttons) fn(DT_N_S_buttons_S_button_0) fn(DT_N_S_connector) fn(DT_N_S_sensor_pwr_ctrl) fn(DT_N_S_reserved_memory) fn(DT_N_S_reserved_memory_S_image_s_20000000) fn(DT_N_S_reserved_memory_S_image_modem_20016000) fn(DT_N_S_reserved_memory_S_image_ns_20020000) +#define DT_FOREACH_OKAY_HELPER(fn) fn(DT_N) fn(DT_N_S_chosen) fn(DT_N_S_aliases) fn(DT_N_S_soc) fn(DT_N_S_soc_S_interrupt_controller_e000e100) fn(DT_N_S_soc_S_memory_20000000) fn(DT_N_S_soc_S_peripheral_50000000) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_80000) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c0000) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_f0000) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000) fn(DT_N_S_soc_S_peripheral_50000000_S_adc_e000) fn(DT_N_S_soc_S_peripheral_50000000_S_dppic_17000) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1b000) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1c000) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1d000) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1e000) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1f000) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_20000) fn(DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000) fn(DT_N_S_soc_S_peripheral_50000000_S_kmu_39000) fn(DT_N_S_soc_S_peripheral_50000000_S_regulator_4000) fn(DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_8000) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck1) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck2) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_eeprom_50) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_21000) fn(DT_N_S_soc_S_peripheral_50000000_S_gpio_842500) fn(DT_N_S_soc_S_peripheral_50000000_S_clock_5000) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520) fn(DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000) fn(DT_N_S_soc_S_crypto_50840000) fn(DT_N_S_soc_S_ctrlap_50006000) fn(DT_N_S_soc_S_gpiote_5000d000) fn(DT_N_S_soc_S_spu_50003000) fn(DT_N_S_soc_S_ficr_ff0000) fn(DT_N_S_soc_S_uicr_ff8000) fn(DT_N_S_pin_controller) fn(DT_N_S_pin_controller_S_uart0_default) fn(DT_N_S_pin_controller_S_uart0_default_S_group1) fn(DT_N_S_pin_controller_S_uart0_sleep) fn(DT_N_S_pin_controller_S_uart0_sleep_S_group1) fn(DT_N_S_pin_controller_S_i2c2_default) fn(DT_N_S_pin_controller_S_i2c2_default_S_group1) fn(DT_N_S_pin_controller_S_i2c2_sleep) fn(DT_N_S_pin_controller_S_i2c2_sleep_S_group1) fn(DT_N_S_pin_controller_S_pwm0_default) fn(DT_N_S_pin_controller_S_pwm0_default_S_group1) fn(DT_N_S_pin_controller_S_pwm0_sleep) fn(DT_N_S_pin_controller_S_pwm0_sleep_S_group1) fn(DT_N_S_pin_controller_S_spi3_default) fn(DT_N_S_pin_controller_S_spi3_default_S_group1) fn(DT_N_S_pin_controller_S_spi3_sleep) fn(DT_N_S_pin_controller_S_spi3_sleep_S_group1) fn(DT_N_S_entropy_bt_hci) fn(DT_N_S_cpus) fn(DT_N_S_cpus_S_cpu_0) fn(DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90) fn(DT_N_S_leds) fn(DT_N_S_leds_S_led_0) fn(DT_N_S_pwmleds) fn(DT_N_S_pwmleds_S_pwm_led_0) fn(DT_N_S_buttons) fn(DT_N_S_buttons_S_button_0) fn(DT_N_S_connector) fn(DT_N_S_sensor_pwr_ctrl) fn(DT_N_S_reserved_memory) fn(DT_N_S_reserved_memory_S_image_s_20000000) fn(DT_N_S_reserved_memory_S_image_modem_20016000) fn(DT_N_S_reserved_memory_S_image_ns_20020000) +#define DT_FOREACH_VARGS_HELPER(fn, ...) fn(DT_N, __VA_ARGS__) fn(DT_N_S_chosen, __VA_ARGS__) fn(DT_N_S_aliases, __VA_ARGS__) fn(DT_N_S_soc, __VA_ARGS__) fn(DT_N_S_soc_S_interrupt_controller_e000e100, __VA_ARGS__) fn(DT_N_S_soc_S_timer_e000e010, __VA_ARGS__) fn(DT_N_S_soc_S_memory_20000000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_80000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c0000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_f0000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_adc_e000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_dppic_17000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1b000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1c000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1d000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1e000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1f000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_20000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_i2s_28000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_kmu_39000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_pdm_26000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_regulator_4000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_8000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_9000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_a000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_b000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_8000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_9000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck1, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck2, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_eeprom_50, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_b000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_8000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_9000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_a000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_21000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_22000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_23000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_24000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_gpio_842500, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_rtc_14000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_rtc_15000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_clock_5000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_timer_f000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_timer_10000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_timer_11000, __VA_ARGS__) fn(DT_N_S_soc_S_crypto_50840000, __VA_ARGS__) fn(DT_N_S_soc_S_ctrlap_50006000, __VA_ARGS__) fn(DT_N_S_soc_S_gpiote_5000d000, __VA_ARGS__) fn(DT_N_S_soc_S_gpiote_40031000, __VA_ARGS__) fn(DT_N_S_soc_S_spu_50003000, __VA_ARGS__) fn(DT_N_S_soc_S_ficr_ff0000, __VA_ARGS__) fn(DT_N_S_soc_S_uicr_ff8000, __VA_ARGS__) fn(DT_N_S_pin_controller, __VA_ARGS__) fn(DT_N_S_pin_controller_S_uart0_default, __VA_ARGS__) fn(DT_N_S_pin_controller_S_uart0_default_S_group1, __VA_ARGS__) fn(DT_N_S_pin_controller_S_uart0_sleep, __VA_ARGS__) fn(DT_N_S_pin_controller_S_uart0_sleep_S_group1, __VA_ARGS__) fn(DT_N_S_pin_controller_S_i2c2_default, __VA_ARGS__) fn(DT_N_S_pin_controller_S_i2c2_default_S_group1, __VA_ARGS__) fn(DT_N_S_pin_controller_S_i2c2_sleep, __VA_ARGS__) fn(DT_N_S_pin_controller_S_i2c2_sleep_S_group1, __VA_ARGS__) fn(DT_N_S_pin_controller_S_pwm0_default, __VA_ARGS__) fn(DT_N_S_pin_controller_S_pwm0_default_S_group1, __VA_ARGS__) fn(DT_N_S_pin_controller_S_pwm0_sleep, __VA_ARGS__) fn(DT_N_S_pin_controller_S_pwm0_sleep_S_group1, __VA_ARGS__) fn(DT_N_S_pin_controller_S_spi3_default, __VA_ARGS__) fn(DT_N_S_pin_controller_S_spi3_default_S_group1, __VA_ARGS__) fn(DT_N_S_pin_controller_S_spi3_sleep, __VA_ARGS__) fn(DT_N_S_pin_controller_S_spi3_sleep_S_group1, __VA_ARGS__) fn(DT_N_S_entropy_bt_hci, __VA_ARGS__) fn(DT_N_S_sw_pwm, __VA_ARGS__) fn(DT_N_S_cpus, __VA_ARGS__) fn(DT_N_S_cpus_S_cpu_0, __VA_ARGS__) fn(DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90, __VA_ARGS__) fn(DT_N_S_leds, __VA_ARGS__) fn(DT_N_S_leds_S_led_0, __VA_ARGS__) fn(DT_N_S_pwmleds, __VA_ARGS__) fn(DT_N_S_pwmleds_S_pwm_led_0, __VA_ARGS__) fn(DT_N_S_buttons, __VA_ARGS__) fn(DT_N_S_buttons_S_button_0, __VA_ARGS__) fn(DT_N_S_connector, __VA_ARGS__) fn(DT_N_S_sensor_pwr_ctrl, __VA_ARGS__) fn(DT_N_S_reserved_memory, __VA_ARGS__) fn(DT_N_S_reserved_memory_S_image_s_20000000, __VA_ARGS__) fn(DT_N_S_reserved_memory_S_image_modem_20016000, __VA_ARGS__) fn(DT_N_S_reserved_memory_S_image_ns_20020000, __VA_ARGS__) +#define DT_FOREACH_OKAY_VARGS_HELPER(fn, ...) fn(DT_N, __VA_ARGS__) fn(DT_N_S_chosen, __VA_ARGS__) fn(DT_N_S_aliases, __VA_ARGS__) fn(DT_N_S_soc, __VA_ARGS__) fn(DT_N_S_soc_S_interrupt_controller_e000e100, __VA_ARGS__) fn(DT_N_S_soc_S_memory_20000000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_80000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c0000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_f0000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_adc_e000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_dppic_17000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1b000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1c000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1d000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1e000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1f000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_20000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_kmu_39000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_regulator_4000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_8000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck1, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators_S_buck2, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_eeprom_50, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_21000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_gpio_842500, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_clock_5000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000, __VA_ARGS__) fn(DT_N_S_soc_S_crypto_50840000, __VA_ARGS__) fn(DT_N_S_soc_S_ctrlap_50006000, __VA_ARGS__) fn(DT_N_S_soc_S_gpiote_5000d000, __VA_ARGS__) fn(DT_N_S_soc_S_spu_50003000, __VA_ARGS__) fn(DT_N_S_soc_S_ficr_ff0000, __VA_ARGS__) fn(DT_N_S_soc_S_uicr_ff8000, __VA_ARGS__) fn(DT_N_S_pin_controller, __VA_ARGS__) fn(DT_N_S_pin_controller_S_uart0_default, __VA_ARGS__) fn(DT_N_S_pin_controller_S_uart0_default_S_group1, __VA_ARGS__) fn(DT_N_S_pin_controller_S_uart0_sleep, __VA_ARGS__) fn(DT_N_S_pin_controller_S_uart0_sleep_S_group1, __VA_ARGS__) fn(DT_N_S_pin_controller_S_i2c2_default, __VA_ARGS__) fn(DT_N_S_pin_controller_S_i2c2_default_S_group1, __VA_ARGS__) fn(DT_N_S_pin_controller_S_i2c2_sleep, __VA_ARGS__) fn(DT_N_S_pin_controller_S_i2c2_sleep_S_group1, __VA_ARGS__) fn(DT_N_S_pin_controller_S_pwm0_default, __VA_ARGS__) fn(DT_N_S_pin_controller_S_pwm0_default_S_group1, __VA_ARGS__) fn(DT_N_S_pin_controller_S_pwm0_sleep, __VA_ARGS__) fn(DT_N_S_pin_controller_S_pwm0_sleep_S_group1, __VA_ARGS__) fn(DT_N_S_pin_controller_S_spi3_default, __VA_ARGS__) fn(DT_N_S_pin_controller_S_spi3_default_S_group1, __VA_ARGS__) fn(DT_N_S_pin_controller_S_spi3_sleep, __VA_ARGS__) fn(DT_N_S_pin_controller_S_spi3_sleep_S_group1, __VA_ARGS__) fn(DT_N_S_entropy_bt_hci, __VA_ARGS__) fn(DT_N_S_cpus, __VA_ARGS__) fn(DT_N_S_cpus_S_cpu_0, __VA_ARGS__) fn(DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90, __VA_ARGS__) fn(DT_N_S_leds, __VA_ARGS__) fn(DT_N_S_leds_S_led_0, __VA_ARGS__) fn(DT_N_S_pwmleds, __VA_ARGS__) fn(DT_N_S_pwmleds_S_pwm_led_0, __VA_ARGS__) fn(DT_N_S_buttons, __VA_ARGS__) fn(DT_N_S_buttons_S_button_0, __VA_ARGS__) fn(DT_N_S_connector, __VA_ARGS__) fn(DT_N_S_sensor_pwr_ctrl, __VA_ARGS__) fn(DT_N_S_reserved_memory, __VA_ARGS__) fn(DT_N_S_reserved_memory_S_image_s_20000000, __VA_ARGS__) fn(DT_N_S_reserved_memory_S_image_modem_20016000, __VA_ARGS__) fn(DT_N_S_reserved_memory_S_image_ns_20020000, __VA_ARGS__) +#define DT_COMPAT_fixed_partitions_LABEL_mcuboot DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0 +#define DT_COMPAT_fixed_partitions_LABEL_mcuboot_EXISTS 1 +#define DT_COMPAT_fixed_partitions_LABEL_image_0 DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000 +#define DT_COMPAT_fixed_partitions_LABEL_image_0_EXISTS 1 +#define DT_COMPAT_fixed_partitions_LABEL_image_0_nonsecure DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000 +#define DT_COMPAT_fixed_partitions_LABEL_image_0_nonsecure_EXISTS 1 +#define DT_COMPAT_fixed_partitions_LABEL_image_1 DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_80000 +#define DT_COMPAT_fixed_partitions_LABEL_image_1_EXISTS 1 +#define DT_COMPAT_fixed_partitions_LABEL_image_1_nonsecure DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c0000 +#define DT_COMPAT_fixed_partitions_LABEL_image_1_nonsecure_EXISTS 1 +#define DT_COMPAT_fixed_partitions_LABEL_image_scratch DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_f0000 +#define DT_COMPAT_fixed_partitions_LABEL_image_scratch_EXISTS 1 +#define DT_COMPAT_fixed_partitions_LABEL_storage DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000 +#define DT_COMPAT_fixed_partitions_LABEL_storage_EXISTS 1 + +/* + * Macros for compatibles with status "okay" nodes + */ +#define DT_COMPAT_HAS_OKAY_conexio_stratus_pro 1 +#define DT_COMPAT_HAS_OKAY_nordic_nrf9151_laca 1 +#define DT_COMPAT_HAS_OKAY_nordic_nrf9120 1 +#define DT_COMPAT_HAS_OKAY_nordic_nrf91 1 +#define DT_COMPAT_HAS_OKAY_simple_bus 1 +#define DT_COMPAT_HAS_OKAY_arm_v8m_nvic 1 +#define DT_COMPAT_HAS_OKAY_mmio_sram 1 +#define DT_COMPAT_HAS_OKAY_nordic_nrf91_flash_controller 1 +#define DT_COMPAT_HAS_OKAY_soc_nv_flash 1 +#define DT_COMPAT_HAS_OKAY_fixed_partitions 1 +#define DT_COMPAT_HAS_OKAY_nordic_nrf_saadc 1 +#define DT_COMPAT_HAS_OKAY_nordic_nrf_dppic 1 +#define DT_COMPAT_HAS_OKAY_nordic_nrf_egu 1 +#define DT_COMPAT_HAS_OKAY_nordic_nrf_ipc 1 +#define DT_COMPAT_HAS_OKAY_nordic_nrf_kmu 1 +#define DT_COMPAT_HAS_OKAY_nordic_nrf_regulators 1 +#define DT_COMPAT_HAS_OKAY_nordic_nrf_vmc 1 +#define DT_COMPAT_HAS_OKAY_nordic_nrf_uarte 1 +#define DT_COMPAT_HAS_OKAY_nordic_nrf_twim 1 +#define DT_COMPAT_HAS_OKAY_nordic_npm1300 1 +#define DT_COMPAT_HAS_OKAY_nordic_npm1300_charger 1 +#define DT_COMPAT_HAS_OKAY_nordic_npm1300_regulator 1 +#define DT_COMPAT_HAS_OKAY_st_lis2dh 1 +#define DT_COMPAT_HAS_OKAY_atmel_at24 1 +#define DT_COMPAT_HAS_OKAY_nordic_nrf_pwm 1 +#define DT_COMPAT_HAS_OKAY_nordic_nrf_gpio 1 +#define DT_COMPAT_HAS_OKAY_nordic_nrf_clock 1 +#define DT_COMPAT_HAS_OKAY_nordic_nrf_power 1 +#define DT_COMPAT_HAS_OKAY_nordic_nrf_gpregret 1 +#define DT_COMPAT_HAS_OKAY_nordic_nrf_wdt 1 +#define DT_COMPAT_HAS_OKAY_nordic_cryptocell 1 +#define DT_COMPAT_HAS_OKAY_arm_cryptocell_310 1 +#define DT_COMPAT_HAS_OKAY_nordic_nrf_ctrlapperi 1 +#define DT_COMPAT_HAS_OKAY_nordic_nrf_gpiote 1 +#define DT_COMPAT_HAS_OKAY_nordic_nrf_spu 1 +#define DT_COMPAT_HAS_OKAY_nordic_nrf_ficr 1 +#define DT_COMPAT_HAS_OKAY_nordic_nrf_uicr 1 +#define DT_COMPAT_HAS_OKAY_nordic_nrf_pinctrl 1 +#define DT_COMPAT_HAS_OKAY_zephyr_bt_hci_entropy 1 +#define DT_COMPAT_HAS_OKAY_arm_cortex_m33f 1 +#define DT_COMPAT_HAS_OKAY_arm_armv8m_mpu 1 +#define DT_COMPAT_HAS_OKAY_gpio_leds 1 +#define DT_COMPAT_HAS_OKAY_pwm_leds 1 +#define DT_COMPAT_HAS_OKAY_gpio_keys 1 +#define DT_COMPAT_HAS_OKAY_conexio_stratus_header 1 +#define DT_COMPAT_HAS_OKAY_regulator_fixed 1 + +/* + * Macros for status "okay" instances of each compatible + */ +#define DT_N_INST_conexio_stratus_pro_NUM_OKAY 1 +#define DT_N_INST_nordic_nrf9151_laca_NUM_OKAY 1 +#define DT_N_INST_nordic_nrf9120_NUM_OKAY 1 +#define DT_N_INST_nordic_nrf91_NUM_OKAY 1 +#define DT_N_INST_simple_bus_NUM_OKAY 1 +#define DT_N_INST_arm_v8m_nvic_NUM_OKAY 1 +#define DT_N_INST_mmio_sram_NUM_OKAY 1 +#define DT_N_INST_nordic_nrf91_flash_controller_NUM_OKAY 1 +#define DT_N_INST_soc_nv_flash_NUM_OKAY 1 +#define DT_N_INST_fixed_partitions_NUM_OKAY 1 +#define DT_N_INST_nordic_nrf_saadc_NUM_OKAY 1 +#define DT_N_INST_nordic_nrf_dppic_NUM_OKAY 1 +#define DT_N_INST_nordic_nrf_egu_NUM_OKAY 6 +#define DT_N_INST_nordic_nrf_ipc_NUM_OKAY 1 +#define DT_N_INST_nordic_nrf_kmu_NUM_OKAY 1 +#define DT_N_INST_nordic_nrf_regulators_NUM_OKAY 1 +#define DT_N_INST_nordic_nrf_vmc_NUM_OKAY 1 +#define DT_N_INST_nordic_nrf_uarte_NUM_OKAY 1 +#define DT_N_INST_nordic_nrf_twim_NUM_OKAY 1 +#define DT_N_INST_nordic_npm1300_NUM_OKAY 1 +#define DT_N_INST_nordic_npm1300_charger_NUM_OKAY 1 +#define DT_N_INST_nordic_npm1300_regulator_NUM_OKAY 1 +#define DT_N_INST_st_lis2dh_NUM_OKAY 1 +#define DT_N_INST_atmel_at24_NUM_OKAY 1 +#define DT_N_INST_nordic_nrf_pwm_NUM_OKAY 1 +#define DT_N_INST_nordic_nrf_gpio_NUM_OKAY 1 +#define DT_N_INST_nordic_nrf_clock_NUM_OKAY 1 +#define DT_N_INST_nordic_nrf_power_NUM_OKAY 1 +#define DT_N_INST_nordic_nrf_gpregret_NUM_OKAY 2 +#define DT_N_INST_nordic_nrf_wdt_NUM_OKAY 1 +#define DT_N_INST_nordic_cryptocell_NUM_OKAY 1 +#define DT_N_INST_arm_cryptocell_310_NUM_OKAY 1 +#define DT_N_INST_nordic_nrf_ctrlapperi_NUM_OKAY 1 +#define DT_N_INST_nordic_nrf_gpiote_NUM_OKAY 1 +#define DT_N_INST_nordic_nrf_spu_NUM_OKAY 1 +#define DT_N_INST_nordic_nrf_ficr_NUM_OKAY 1 +#define DT_N_INST_nordic_nrf_uicr_NUM_OKAY 1 +#define DT_N_INST_nordic_nrf_pinctrl_NUM_OKAY 1 +#define DT_N_INST_zephyr_bt_hci_entropy_NUM_OKAY 1 +#define DT_N_INST_arm_cortex_m33f_NUM_OKAY 1 +#define DT_N_INST_arm_armv8m_mpu_NUM_OKAY 1 +#define DT_N_INST_gpio_leds_NUM_OKAY 1 +#define DT_N_INST_pwm_leds_NUM_OKAY 1 +#define DT_N_INST_gpio_keys_NUM_OKAY 1 +#define DT_N_INST_conexio_stratus_header_NUM_OKAY 1 +#define DT_N_INST_regulator_fixed_NUM_OKAY 1 +#define DT_FOREACH_OKAY_conexio_stratus_pro(fn) fn(DT_N) +#define DT_FOREACH_OKAY_VARGS_conexio_stratus_pro(fn, ...) fn(DT_N, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_conexio_stratus_pro(fn) fn(0) +#define DT_FOREACH_OKAY_INST_VARGS_conexio_stratus_pro(fn, ...) fn(0, __VA_ARGS__) +#define DT_FOREACH_OKAY_nordic_nrf9151_laca(fn) fn(DT_N_S_soc) +#define DT_FOREACH_OKAY_VARGS_nordic_nrf9151_laca(fn, ...) fn(DT_N_S_soc, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_nordic_nrf9151_laca(fn) fn(0) +#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf9151_laca(fn, ...) fn(0, __VA_ARGS__) +#define DT_FOREACH_OKAY_nordic_nrf9120(fn) fn(DT_N_S_soc) +#define DT_FOREACH_OKAY_VARGS_nordic_nrf9120(fn, ...) fn(DT_N_S_soc, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_nordic_nrf9120(fn) fn(0) +#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf9120(fn, ...) fn(0, __VA_ARGS__) +#define DT_FOREACH_OKAY_nordic_nrf91(fn) fn(DT_N_S_soc) +#define DT_FOREACH_OKAY_VARGS_nordic_nrf91(fn, ...) fn(DT_N_S_soc, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_nordic_nrf91(fn) fn(0) +#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf91(fn, ...) fn(0, __VA_ARGS__) +#define DT_FOREACH_OKAY_simple_bus(fn) fn(DT_N_S_soc) +#define DT_FOREACH_OKAY_VARGS_simple_bus(fn, ...) fn(DT_N_S_soc, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_simple_bus(fn) fn(0) +#define DT_FOREACH_OKAY_INST_VARGS_simple_bus(fn, ...) fn(0, __VA_ARGS__) +#define DT_FOREACH_OKAY_arm_v8m_nvic(fn) fn(DT_N_S_soc_S_interrupt_controller_e000e100) +#define DT_FOREACH_OKAY_VARGS_arm_v8m_nvic(fn, ...) fn(DT_N_S_soc_S_interrupt_controller_e000e100, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_arm_v8m_nvic(fn) fn(0) +#define DT_FOREACH_OKAY_INST_VARGS_arm_v8m_nvic(fn, ...) fn(0, __VA_ARGS__) +#define DT_FOREACH_OKAY_mmio_sram(fn) fn(DT_N_S_soc_S_memory_20000000) +#define DT_FOREACH_OKAY_VARGS_mmio_sram(fn, ...) fn(DT_N_S_soc_S_memory_20000000, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_mmio_sram(fn) fn(0) +#define DT_FOREACH_OKAY_INST_VARGS_mmio_sram(fn, ...) fn(0, __VA_ARGS__) +#define DT_FOREACH_OKAY_nordic_nrf91_flash_controller(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000) +#define DT_FOREACH_OKAY_VARGS_nordic_nrf91_flash_controller(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_nordic_nrf91_flash_controller(fn) fn(0) +#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf91_flash_controller(fn, ...) fn(0, __VA_ARGS__) +#define DT_FOREACH_OKAY_soc_nv_flash(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0) +#define DT_FOREACH_OKAY_VARGS_soc_nv_flash(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_soc_nv_flash(fn) fn(0) +#define DT_FOREACH_OKAY_INST_VARGS_soc_nv_flash(fn, ...) fn(0, __VA_ARGS__) +#define DT_FOREACH_OKAY_fixed_partitions(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions) +#define DT_FOREACH_OKAY_VARGS_fixed_partitions(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_fixed_partitions(fn) fn(0) +#define DT_FOREACH_OKAY_INST_VARGS_fixed_partitions(fn, ...) fn(0, __VA_ARGS__) +#define DT_FOREACH_OKAY_nordic_nrf_saadc(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_adc_e000) +#define DT_FOREACH_OKAY_VARGS_nordic_nrf_saadc(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_adc_e000, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_nordic_nrf_saadc(fn) fn(0) +#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf_saadc(fn, ...) fn(0, __VA_ARGS__) +#define DT_FOREACH_OKAY_nordic_nrf_dppic(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_dppic_17000) +#define DT_FOREACH_OKAY_VARGS_nordic_nrf_dppic(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_dppic_17000, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_nordic_nrf_dppic(fn) fn(0) +#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf_dppic(fn, ...) fn(0, __VA_ARGS__) +#define DT_FOREACH_OKAY_nordic_nrf_egu(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1b000) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1c000) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1d000) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1e000) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1f000) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_20000) +#define DT_FOREACH_OKAY_VARGS_nordic_nrf_egu(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1b000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1c000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1d000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1e000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1f000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_20000, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_nordic_nrf_egu(fn) fn(0) fn(1) fn(2) fn(3) fn(4) fn(5) +#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf_egu(fn, ...) fn(0, __VA_ARGS__) fn(1, __VA_ARGS__) fn(2, __VA_ARGS__) fn(3, __VA_ARGS__) fn(4, __VA_ARGS__) fn(5, __VA_ARGS__) +#define DT_FOREACH_OKAY_nordic_nrf_ipc(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000) +#define DT_FOREACH_OKAY_VARGS_nordic_nrf_ipc(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_nordic_nrf_ipc(fn) fn(0) +#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf_ipc(fn, ...) fn(0, __VA_ARGS__) +#define DT_FOREACH_OKAY_nordic_nrf_kmu(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_kmu_39000) +#define DT_FOREACH_OKAY_VARGS_nordic_nrf_kmu(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_kmu_39000, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_nordic_nrf_kmu(fn) fn(0) +#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf_kmu(fn, ...) fn(0, __VA_ARGS__) +#define DT_FOREACH_OKAY_nordic_nrf_regulators(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_regulator_4000) +#define DT_FOREACH_OKAY_VARGS_nordic_nrf_regulators(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_regulator_4000, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_nordic_nrf_regulators(fn) fn(0) +#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf_regulators(fn, ...) fn(0, __VA_ARGS__) +#define DT_FOREACH_OKAY_nordic_nrf_vmc(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000) +#define DT_FOREACH_OKAY_VARGS_nordic_nrf_vmc(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_nordic_nrf_vmc(fn) fn(0) +#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf_vmc(fn, ...) fn(0, __VA_ARGS__) +#define DT_FOREACH_OKAY_nordic_nrf_uarte(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_8000) +#define DT_FOREACH_OKAY_VARGS_nordic_nrf_uarte(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_8000, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_nordic_nrf_uarte(fn) fn(0) +#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf_uarte(fn, ...) fn(0, __VA_ARGS__) +#define DT_FOREACH_OKAY_nordic_nrf_twim(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000) +#define DT_FOREACH_OKAY_VARGS_nordic_nrf_twim(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_nordic_nrf_twim(fn) fn(0) +#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf_twim(fn, ...) fn(0, __VA_ARGS__) +#define DT_FOREACH_OKAY_nordic_npm1300(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b) +#define DT_FOREACH_OKAY_VARGS_nordic_npm1300(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_nordic_npm1300(fn) fn(0) +#define DT_FOREACH_OKAY_INST_VARGS_nordic_npm1300(fn, ...) fn(0, __VA_ARGS__) +#define DT_FOREACH_OKAY_nordic_npm1300_charger(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger) +#define DT_FOREACH_OKAY_VARGS_nordic_npm1300_charger(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_charger, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_nordic_npm1300_charger(fn) fn(0) +#define DT_FOREACH_OKAY_INST_VARGS_nordic_npm1300_charger(fn, ...) fn(0, __VA_ARGS__) +#define DT_FOREACH_OKAY_nordic_npm1300_regulator(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators) +#define DT_FOREACH_OKAY_VARGS_nordic_npm1300_regulator(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_npm1300_6b_S_regulators, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_nordic_npm1300_regulator(fn) fn(0) +#define DT_FOREACH_OKAY_INST_VARGS_nordic_npm1300_regulator(fn, ...) fn(0, __VA_ARGS__) +#define DT_FOREACH_OKAY_st_lis2dh(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18) +#define DT_FOREACH_OKAY_VARGS_st_lis2dh(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_lis2dh_18, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_st_lis2dh(fn) fn(0) +#define DT_FOREACH_OKAY_INST_VARGS_st_lis2dh(fn, ...) fn(0, __VA_ARGS__) +#define DT_FOREACH_OKAY_atmel_at24(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_eeprom_50) +#define DT_FOREACH_OKAY_VARGS_atmel_at24(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_eeprom_50, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_atmel_at24(fn) fn(0) +#define DT_FOREACH_OKAY_INST_VARGS_atmel_at24(fn, ...) fn(0, __VA_ARGS__) +#define DT_FOREACH_OKAY_nordic_nrf_pwm(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_21000) +#define DT_FOREACH_OKAY_VARGS_nordic_nrf_pwm(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_21000, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_nordic_nrf_pwm(fn) fn(0) +#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf_pwm(fn, ...) fn(0, __VA_ARGS__) +#define DT_FOREACH_OKAY_nordic_nrf_gpio(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_gpio_842500) +#define DT_FOREACH_OKAY_VARGS_nordic_nrf_gpio(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_gpio_842500, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_nordic_nrf_gpio(fn) fn(0) +#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf_gpio(fn, ...) fn(0, __VA_ARGS__) +#define DT_FOREACH_OKAY_nordic_nrf_clock(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_clock_5000) +#define DT_FOREACH_OKAY_VARGS_nordic_nrf_clock(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_clock_5000, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_nordic_nrf_clock(fn) fn(0) +#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf_clock(fn, ...) fn(0, __VA_ARGS__) +#define DT_FOREACH_OKAY_nordic_nrf_power(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000) +#define DT_FOREACH_OKAY_VARGS_nordic_nrf_power(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_nordic_nrf_power(fn) fn(0) +#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf_power(fn, ...) fn(0, __VA_ARGS__) +#define DT_FOREACH_OKAY_nordic_nrf_gpregret(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520) +#define DT_FOREACH_OKAY_VARGS_nordic_nrf_gpregret(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_nordic_nrf_gpregret(fn) fn(0) fn(1) +#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf_gpregret(fn, ...) fn(0, __VA_ARGS__) fn(1, __VA_ARGS__) +#define DT_FOREACH_OKAY_nordic_nrf_wdt(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000) +#define DT_FOREACH_OKAY_VARGS_nordic_nrf_wdt(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_nordic_nrf_wdt(fn) fn(0) +#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf_wdt(fn, ...) fn(0, __VA_ARGS__) +#define DT_FOREACH_OKAY_nordic_cryptocell(fn) fn(DT_N_S_soc_S_crypto_50840000) +#define DT_FOREACH_OKAY_VARGS_nordic_cryptocell(fn, ...) fn(DT_N_S_soc_S_crypto_50840000, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_nordic_cryptocell(fn) fn(0) +#define DT_FOREACH_OKAY_INST_VARGS_nordic_cryptocell(fn, ...) fn(0, __VA_ARGS__) +#define DT_FOREACH_OKAY_arm_cryptocell_310(fn) fn(DT_N_S_soc_S_crypto_50840000) +#define DT_FOREACH_OKAY_VARGS_arm_cryptocell_310(fn, ...) fn(DT_N_S_soc_S_crypto_50840000, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_arm_cryptocell_310(fn) fn(0) +#define DT_FOREACH_OKAY_INST_VARGS_arm_cryptocell_310(fn, ...) fn(0, __VA_ARGS__) +#define DT_FOREACH_OKAY_nordic_nrf_ctrlapperi(fn) fn(DT_N_S_soc_S_ctrlap_50006000) +#define DT_FOREACH_OKAY_VARGS_nordic_nrf_ctrlapperi(fn, ...) fn(DT_N_S_soc_S_ctrlap_50006000, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_nordic_nrf_ctrlapperi(fn) fn(0) +#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf_ctrlapperi(fn, ...) fn(0, __VA_ARGS__) +#define DT_FOREACH_OKAY_nordic_nrf_gpiote(fn) fn(DT_N_S_soc_S_gpiote_5000d000) +#define DT_FOREACH_OKAY_VARGS_nordic_nrf_gpiote(fn, ...) fn(DT_N_S_soc_S_gpiote_5000d000, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_nordic_nrf_gpiote(fn) fn(0) +#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf_gpiote(fn, ...) fn(0, __VA_ARGS__) +#define DT_FOREACH_OKAY_nordic_nrf_spu(fn) fn(DT_N_S_soc_S_spu_50003000) +#define DT_FOREACH_OKAY_VARGS_nordic_nrf_spu(fn, ...) fn(DT_N_S_soc_S_spu_50003000, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_nordic_nrf_spu(fn) fn(0) +#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf_spu(fn, ...) fn(0, __VA_ARGS__) +#define DT_FOREACH_OKAY_nordic_nrf_ficr(fn) fn(DT_N_S_soc_S_ficr_ff0000) +#define DT_FOREACH_OKAY_VARGS_nordic_nrf_ficr(fn, ...) fn(DT_N_S_soc_S_ficr_ff0000, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_nordic_nrf_ficr(fn) fn(0) +#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf_ficr(fn, ...) fn(0, __VA_ARGS__) +#define DT_FOREACH_OKAY_nordic_nrf_uicr(fn) fn(DT_N_S_soc_S_uicr_ff8000) +#define DT_FOREACH_OKAY_VARGS_nordic_nrf_uicr(fn, ...) fn(DT_N_S_soc_S_uicr_ff8000, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_nordic_nrf_uicr(fn) fn(0) +#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf_uicr(fn, ...) fn(0, __VA_ARGS__) +#define DT_FOREACH_OKAY_nordic_nrf_pinctrl(fn) fn(DT_N_S_pin_controller) +#define DT_FOREACH_OKAY_VARGS_nordic_nrf_pinctrl(fn, ...) fn(DT_N_S_pin_controller, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_nordic_nrf_pinctrl(fn) fn(0) +#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf_pinctrl(fn, ...) fn(0, __VA_ARGS__) +#define DT_FOREACH_OKAY_zephyr_bt_hci_entropy(fn) fn(DT_N_S_entropy_bt_hci) +#define DT_FOREACH_OKAY_VARGS_zephyr_bt_hci_entropy(fn, ...) fn(DT_N_S_entropy_bt_hci, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_zephyr_bt_hci_entropy(fn) fn(0) +#define DT_FOREACH_OKAY_INST_VARGS_zephyr_bt_hci_entropy(fn, ...) fn(0, __VA_ARGS__) +#define DT_FOREACH_OKAY_arm_cortex_m33f(fn) fn(DT_N_S_cpus_S_cpu_0) +#define DT_FOREACH_OKAY_VARGS_arm_cortex_m33f(fn, ...) fn(DT_N_S_cpus_S_cpu_0, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_arm_cortex_m33f(fn) fn(0) +#define DT_FOREACH_OKAY_INST_VARGS_arm_cortex_m33f(fn, ...) fn(0, __VA_ARGS__) +#define DT_FOREACH_OKAY_arm_armv8m_mpu(fn) fn(DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90) +#define DT_FOREACH_OKAY_VARGS_arm_armv8m_mpu(fn, ...) fn(DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_arm_armv8m_mpu(fn) fn(0) +#define DT_FOREACH_OKAY_INST_VARGS_arm_armv8m_mpu(fn, ...) fn(0, __VA_ARGS__) +#define DT_FOREACH_OKAY_gpio_leds(fn) fn(DT_N_S_leds) +#define DT_FOREACH_OKAY_VARGS_gpio_leds(fn, ...) fn(DT_N_S_leds, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_gpio_leds(fn) fn(0) +#define DT_FOREACH_OKAY_INST_VARGS_gpio_leds(fn, ...) fn(0, __VA_ARGS__) +#define DT_FOREACH_OKAY_pwm_leds(fn) fn(DT_N_S_pwmleds) +#define DT_FOREACH_OKAY_VARGS_pwm_leds(fn, ...) fn(DT_N_S_pwmleds, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_pwm_leds(fn) fn(0) +#define DT_FOREACH_OKAY_INST_VARGS_pwm_leds(fn, ...) fn(0, __VA_ARGS__) +#define DT_FOREACH_OKAY_gpio_keys(fn) fn(DT_N_S_buttons) +#define DT_FOREACH_OKAY_VARGS_gpio_keys(fn, ...) fn(DT_N_S_buttons, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_gpio_keys(fn) fn(0) +#define DT_FOREACH_OKAY_INST_VARGS_gpio_keys(fn, ...) fn(0, __VA_ARGS__) +#define DT_FOREACH_OKAY_conexio_stratus_header(fn) fn(DT_N_S_connector) +#define DT_FOREACH_OKAY_VARGS_conexio_stratus_header(fn, ...) fn(DT_N_S_connector, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_conexio_stratus_header(fn) fn(0) +#define DT_FOREACH_OKAY_INST_VARGS_conexio_stratus_header(fn, ...) fn(0, __VA_ARGS__) +#define DT_FOREACH_OKAY_regulator_fixed(fn) fn(DT_N_S_sensor_pwr_ctrl) +#define DT_FOREACH_OKAY_VARGS_regulator_fixed(fn, ...) fn(DT_N_S_sensor_pwr_ctrl, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_regulator_fixed(fn) fn(0) +#define DT_FOREACH_OKAY_INST_VARGS_regulator_fixed(fn, ...) fn(0, __VA_ARGS__) + +/* + * Bus information for status "okay" nodes of each compatible + */ +#define DT_COMPAT_nordic_npm1300_BUS_i2c 1 +#define DT_COMPAT_nordic_npm1300_charger_BUS_i2c 1 +#define DT_COMPAT_nordic_npm1300_regulator_BUS_i2c 1 +#define DT_COMPAT_st_lis2dh_BUS_i2c 1 +#define DT_COMPAT_atmel_at24_BUS_i2c 1 diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/driver-validation.h b/nrfdemo/build/mcuboot/zephyr/include/generated/driver-validation.h new file mode 100644 index 0000000..8784a8c --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/driver-validation.h @@ -0,0 +1,158 @@ +#ifndef DRIVER_VALIDATION_GEN_H +#define DRIVER_VALIDATION_GEN_H +#define K_SYSCALL_DRIVER_GEN(ptr, op, driver_lower_case, driver_upper_case) \ + (K_SYSCALL_OBJ(ptr, K_OBJ_DRIVER_##driver_upper_case) || \ + K_SYSCALL_DRIVER_OP(ptr, driver_lower_case##_driver_api, op)) + +#define K_SYSCALL_DRIVER_FLASH(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, flash, FLASH) + +#define K_SYSCALL_DRIVER_GPIO(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, gpio, GPIO) + +#define K_SYSCALL_DRIVER_UART(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, uart, UART) + +#define K_SYSCALL_DRIVER_SHARED_IRQ(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, shared_irq, SHARED_IRQ) + +#define K_SYSCALL_DRIVER_CRYPTO(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, crypto, CRYPTO) + +#define K_SYSCALL_DRIVER_ADC(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, adc, ADC) + +#define K_SYSCALL_DRIVER_AUXDISPLAY(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, auxdisplay, AUXDISPLAY) + +#define K_SYSCALL_DRIVER_BBRAM(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, bbram, BBRAM) + +#define K_SYSCALL_DRIVER_CAN(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, can, CAN) + +#define K_SYSCALL_DRIVER_CELLULAR(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, cellular, CELLULAR) + +#define K_SYSCALL_DRIVER_CHARGER(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, charger, CHARGER) + +#define K_SYSCALL_DRIVER_CLOCK_CONTROL(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, clock_control, CLOCK_CONTROL) + +#define K_SYSCALL_DRIVER_COREDUMP(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, coredump, COREDUMP) + +#define K_SYSCALL_DRIVER_COUNTER(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, counter, COUNTER) + +#define K_SYSCALL_DRIVER_DAC(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, dac, DAC) + +#define K_SYSCALL_DRIVER_DAI(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, dai, DAI) + +#define K_SYSCALL_DRIVER_DISPLAY(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, display, DISPLAY) + +#define K_SYSCALL_DRIVER_DMA(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, dma, DMA) + +#define K_SYSCALL_DRIVER_EDAC(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, edac, EDAC) + +#define K_SYSCALL_DRIVER_EEPROM(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, eeprom, EEPROM) + +#define K_SYSCALL_DRIVER_EMUL_BBRAM(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, emul_bbram, EMUL_BBRAM) + +#define K_SYSCALL_DRIVER_FUEL_GAUGE_EMUL(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, fuel_gauge_emul, FUEL_GAUGE_EMUL) + +#define K_SYSCALL_DRIVER_EMUL_SENSOR(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, emul_sensor, EMUL_SENSOR) + +#define K_SYSCALL_DRIVER_ENTROPY(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, entropy, ENTROPY) + +#define K_SYSCALL_DRIVER_ESPI(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, espi, ESPI) + +#define K_SYSCALL_DRIVER_ESPI_SAF(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, espi_saf, ESPI_SAF) + +#define K_SYSCALL_DRIVER_FPGA(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, fpga, FPGA) + +#define K_SYSCALL_DRIVER_FUEL_GAUGE(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, fuel_gauge, FUEL_GAUGE) + +#define K_SYSCALL_DRIVER_GNSS(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, gnss, GNSS) + +#define K_SYSCALL_DRIVER_HWSPINLOCK(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, hwspinlock, HWSPINLOCK) + +#define K_SYSCALL_DRIVER_I2C(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, i2c, I2C) + +#define K_SYSCALL_DRIVER_I2C_TARGET(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, i2c_target, I2C_TARGET) + +#define K_SYSCALL_DRIVER_I2S(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, i2s, I2S) + +#define K_SYSCALL_DRIVER_I3C(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, i3c, I3C) + +#define K_SYSCALL_DRIVER_IPM(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, ipm, IPM) + +#define K_SYSCALL_DRIVER_KSCAN(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, kscan, KSCAN) + +#define K_SYSCALL_DRIVER_LED(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, led, LED) + +#define K_SYSCALL_DRIVER_LED_STRIP(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, led_strip, LED_STRIP) + +#define K_SYSCALL_DRIVER_LORA(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, lora, LORA) + +#define K_SYSCALL_DRIVER_MBOX(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, mbox, MBOX) + +#define K_SYSCALL_DRIVER_MDIO(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, mdio, MDIO) + +#define K_SYSCALL_DRIVER_MIPI_DBI(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, mipi_dbi, MIPI_DBI) + +#define K_SYSCALL_DRIVER_MIPI_DSI(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, mipi_dsi, MIPI_DSI) + +#define K_SYSCALL_DRIVER_PECI(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, peci, PECI) + +#define K_SYSCALL_DRIVER_PS2(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, ps2, PS2) + +#define K_SYSCALL_DRIVER_PTP_CLOCK(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, ptp_clock, PTP_CLOCK) + +#define K_SYSCALL_DRIVER_PWM(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, pwm, PWM) + +#define K_SYSCALL_DRIVER_REGULATOR_PARENT(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, regulator_parent, REGULATOR_PARENT) + +#define K_SYSCALL_DRIVER_REGULATOR(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, regulator, REGULATOR) + +#define K_SYSCALL_DRIVER_RESET(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, reset, RESET) + +#define K_SYSCALL_DRIVER_RETAINED_MEM(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, retained_mem, RETAINED_MEM) + +#define K_SYSCALL_DRIVER_RTC(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, rtc, RTC) + +#define K_SYSCALL_DRIVER_SDHC(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, sdhc, SDHC) + +#define K_SYSCALL_DRIVER_SENSOR(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, sensor, SENSOR) + +#define K_SYSCALL_DRIVER_SMBUS(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, smbus, SMBUS) + +#define K_SYSCALL_DRIVER_SPI(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, spi, SPI) + +#define K_SYSCALL_DRIVER_SYSCON(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, syscon, SYSCON) + +#define K_SYSCALL_DRIVER_VIDEO(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, video, VIDEO) + +#define K_SYSCALL_DRIVER_W1(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, w1, W1) + +#define K_SYSCALL_DRIVER_WDT(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, wdt, WDT) + +#define K_SYSCALL_DRIVER_CAN_TRANSCEIVER(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, can_transceiver, CAN_TRANSCEIVER) + +#define K_SYSCALL_DRIVER_UART_MUX(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, uart_mux, UART_MUX) + +#define K_SYSCALL_DRIVER_I3C_TARGET(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, i3c_target, I3C_TARGET) + +#define K_SYSCALL_DRIVER_ITS(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, its, ITS) + +#define K_SYSCALL_DRIVER_VTD(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, vtd, VTD) + +#define K_SYSCALL_DRIVER_TGPIO(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, tgpio, TGPIO) + +#define K_SYSCALL_DRIVER_PCIE_CTRL(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, pcie_ctrl, PCIE_CTRL) + +#define K_SYSCALL_DRIVER_PCIE_EP(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, pcie_ep, PCIE_EP) + +#define K_SYSCALL_DRIVER_SVC(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, svc, SVC) + +#define K_SYSCALL_DRIVER_BC12_EMUL(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, bc12_emul, BC12_EMUL) + +#define K_SYSCALL_DRIVER_BC12(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, bc12, BC12) + +#define K_SYSCALL_DRIVER_USBC_PPC(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, usbc_ppc, USBC_PPC) + +#define K_SYSCALL_DRIVER_TCPC(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, tcpc, TCPC) + +#define K_SYSCALL_DRIVER_USBC_VBUS(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, usbc_vbus, USBC_VBUS) + +#define K_SYSCALL_DRIVER_IVSHMEM(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, ivshmem, IVSHMEM) + +#define K_SYSCALL_DRIVER_ETHPHY(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, ethphy, ETHPHY) +#endif /* DRIVER_VALIDATION_GEN_H */ diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/kobj-types-enum.h b/nrfdemo/build/mcuboot/zephyr/include/generated/kobj-types-enum.h new file mode 100644 index 0000000..90debd4 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/kobj-types-enum.h @@ -0,0 +1,118 @@ +/* Core kernel objects */ +K_OBJ_MEM_SLAB, +K_OBJ_MSGQ, +K_OBJ_MUTEX, +K_OBJ_PIPE, +K_OBJ_QUEUE, +K_OBJ_POLL_SIGNAL, +K_OBJ_SEM, +K_OBJ_STACK, +K_OBJ_THREAD, +K_OBJ_TIMER, +K_OBJ_THREAD_STACK_ELEMENT, +K_OBJ_NET_SOCKET, +K_OBJ_NET_IF, +K_OBJ_SYS_MUTEX, +K_OBJ_FUTEX, +K_OBJ_CONDVAR, +#ifdef CONFIG_EVENTS +K_OBJ_EVENT, +#endif +#ifdef CONFIG_ZTEST +K_OBJ_ZTEST_SUITE_NODE, +#endif +#ifdef CONFIG_ZTEST +K_OBJ_ZTEST_SUITE_STATS, +#endif +#ifdef CONFIG_ZTEST +K_OBJ_ZTEST_UNIT_TEST, +#endif +#ifdef CONFIG_ZTEST +K_OBJ_ZTEST_TEST_RULE, +#endif +#ifdef CONFIG_RTIO +K_OBJ_RTIO, +#endif +#ifdef CONFIG_RTIO +K_OBJ_RTIO_IODEV, +#endif +#ifdef CONFIG_SENSOR_ASYNC_API +K_OBJ_SENSOR_DECODER_API, +#endif +/* Driver subsystems */ +K_OBJ_DRIVER_FLASH, +K_OBJ_DRIVER_GPIO, +K_OBJ_DRIVER_UART, +K_OBJ_DRIVER_SHARED_IRQ, +K_OBJ_DRIVER_CRYPTO, +K_OBJ_DRIVER_ADC, +K_OBJ_DRIVER_AUXDISPLAY, +K_OBJ_DRIVER_BBRAM, +K_OBJ_DRIVER_CAN, +K_OBJ_DRIVER_CELLULAR, +K_OBJ_DRIVER_CHARGER, +K_OBJ_DRIVER_CLOCK_CONTROL, +K_OBJ_DRIVER_COREDUMP, +K_OBJ_DRIVER_COUNTER, +K_OBJ_DRIVER_DAC, +K_OBJ_DRIVER_DAI, +K_OBJ_DRIVER_DISPLAY, +K_OBJ_DRIVER_DMA, +K_OBJ_DRIVER_EDAC, +K_OBJ_DRIVER_EEPROM, +K_OBJ_DRIVER_EMUL_BBRAM, +K_OBJ_DRIVER_FUEL_GAUGE_EMUL, +K_OBJ_DRIVER_EMUL_SENSOR, +K_OBJ_DRIVER_ENTROPY, +K_OBJ_DRIVER_ESPI, +K_OBJ_DRIVER_ESPI_SAF, +K_OBJ_DRIVER_FPGA, +K_OBJ_DRIVER_FUEL_GAUGE, +K_OBJ_DRIVER_GNSS, +K_OBJ_DRIVER_HWSPINLOCK, +K_OBJ_DRIVER_I2C, +K_OBJ_DRIVER_I2C_TARGET, +K_OBJ_DRIVER_I2S, +K_OBJ_DRIVER_I3C, +K_OBJ_DRIVER_IPM, +K_OBJ_DRIVER_KSCAN, +K_OBJ_DRIVER_LED, +K_OBJ_DRIVER_LED_STRIP, +K_OBJ_DRIVER_LORA, +K_OBJ_DRIVER_MBOX, +K_OBJ_DRIVER_MDIO, +K_OBJ_DRIVER_MIPI_DBI, +K_OBJ_DRIVER_MIPI_DSI, +K_OBJ_DRIVER_PECI, +K_OBJ_DRIVER_PS2, +K_OBJ_DRIVER_PTP_CLOCK, +K_OBJ_DRIVER_PWM, +K_OBJ_DRIVER_REGULATOR_PARENT, +K_OBJ_DRIVER_REGULATOR, +K_OBJ_DRIVER_RESET, +K_OBJ_DRIVER_RETAINED_MEM, +K_OBJ_DRIVER_RTC, +K_OBJ_DRIVER_SDHC, +K_OBJ_DRIVER_SENSOR, +K_OBJ_DRIVER_SMBUS, +K_OBJ_DRIVER_SPI, +K_OBJ_DRIVER_SYSCON, +K_OBJ_DRIVER_VIDEO, +K_OBJ_DRIVER_W1, +K_OBJ_DRIVER_WDT, +K_OBJ_DRIVER_CAN_TRANSCEIVER, +K_OBJ_DRIVER_UART_MUX, +K_OBJ_DRIVER_I3C_TARGET, +K_OBJ_DRIVER_ITS, +K_OBJ_DRIVER_VTD, +K_OBJ_DRIVER_TGPIO, +K_OBJ_DRIVER_PCIE_CTRL, +K_OBJ_DRIVER_PCIE_EP, +K_OBJ_DRIVER_SVC, +K_OBJ_DRIVER_BC12_EMUL, +K_OBJ_DRIVER_BC12, +K_OBJ_DRIVER_USBC_PPC, +K_OBJ_DRIVER_TCPC, +K_OBJ_DRIVER_USBC_VBUS, +K_OBJ_DRIVER_IVSHMEM, +K_OBJ_DRIVER_ETHPHY, diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/libc/minimal/strerror_table.h b/nrfdemo/build/mcuboot/zephyr/include/generated/libc/minimal/strerror_table.h new file mode 100644 index 0000000..cd64fb4 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/libc/minimal/strerror_table.h @@ -0,0 +1,174 @@ + +/* + * This file generated by /home/mike/Documents/ncs/v2.7.0/zephyr/scripts/build/gen_strerror_table.py + */ + +#include <errno.h> +#include <stdint.h> +#include <string.h> + +#include <zephyr/sys/util.h> + +#define sys_nerr 141 +static const char *const sys_errlist[sys_nerr] = { +[0] = "Success", +[EPERM] = "Not owner", +[ENOENT] = "No such file or directory", +[ESRCH] = "No such context", +[EINTR] = "Interrupted system call", +[EIO] = "I/O error", +[ENXIO] = "No such device or address", +[ENOEXEC] = "Exec format error", +[EBADF] = "Bad file number", +[ECHILD] = "No children", +[EAGAIN] = "No more contexts", +[ENOMEM] = "Not enough core", +[EACCES] = "Permission denied", +[EFAULT] = "Bad address", +[ENOTBLK] = "Block device required", +[EBUSY] = "Mount device busy", +[EEXIST] = "File exists", +[EXDEV] = "Cross-device link", +[ENODEV] = "No such device", +[ENOTDIR] = "Not a directory", +[EISDIR] = "Is a directory", +[EINVAL] = "Invalid argument", +[ENFILE] = "File table overflow", +[EMFILE] = "Too many open files", +[ENOTTY] = "Not a typewriter", +[ETXTBSY] = "Text file busy", +[EFBIG] = "File too large", +[ENOSPC] = "No space left on device", +[ESPIPE] = "Illegal seek", +[EROFS] = "Read-only file system", +[EMLINK] = "Too many links", +[EPIPE] = "Broken pipe", +[EDOM] = "Argument too large", +[ERANGE] = "Result too large", +[ENOMSG] = "Unexpected message type", +[EDEADLK] = "Resource deadlock avoided", +[ENOLCK] = "No locks available", +[ENOSTR] = "STREAMS device required", +[ENODATA] = "Missing expected message data", +[ETIME] = "STREAMS timeout occurred", +[ENOSR] = "Insufficient memory", +[EPROTO] = "Generic STREAMS error", +[EBADMSG] = "Invalid STREAMS message", +[ENOSYS] = "Function not implemented", +[ENOTEMPTY] = "Directory not empty", +[ENAMETOOLONG] = "File name too long", +[ELOOP] = "Too many levels of symbolic links", +[EOPNOTSUPP] = "Operation not supported on socket", +[EPFNOSUPPORT] = "Protocol family not supported", +[ECONNRESET] = "Connection reset by peer", +[ENOBUFS] = "No buffer space available", +[EAFNOSUPPORT] = "Addr family not supported", +[EPROTOTYPE] = "Protocol wrong type for socket", +[ENOTSOCK] = "Socket operation on non-socket", +[ENOPROTOOPT] = "Protocol not available", +[ESHUTDOWN] = "Can't send after socket shutdown", +[ECONNREFUSED] = "Connection refused", +[EADDRINUSE] = "Address already in use", +[ECONNABORTED] = "Software caused connection abort", +[ENETUNREACH] = "Network is unreachable", +[ENETDOWN] = "Network is down", +[ETIMEDOUT] = "Connection timed out", +[EHOSTDOWN] = "Host is down", +[EHOSTUNREACH] = "No route to host", +[EINPROGRESS] = "Operation now in progress", +[EALREADY] = "Operation already in progress", +[EDESTADDRREQ] = "Destination address required", +[EMSGSIZE] = "Message size", +[EPROTONOSUPPORT] = "Protocol not supported", +[ESOCKTNOSUPPORT] = "Socket type not supported", +[EADDRNOTAVAIL] = "Can't assign requested address", +[ENETRESET] = "Network dropped connection on reset", +[EISCONN] = "Socket is already connected", +[ENOTCONN] = "Socket is not connected", +[ETOOMANYREFS] = "Too many references: can't splice", +[ENOTSUP] = "Unsupported value", +[EILSEQ] = "Illegal byte sequence", +[EOVERFLOW] = "Value overflow", +[ECANCELED] = "Operation canceled", +}; +static const uint8_t sys_errlen[sys_nerr] = { +[0] = 8, +[EPERM] = 10, +[ENOENT] = 26, +[ESRCH] = 16, +[EINTR] = 24, +[EIO] = 10, +[ENXIO] = 26, +[ENOEXEC] = 18, +[EBADF] = 16, +[ECHILD] = 12, +[EAGAIN] = 17, +[ENOMEM] = 16, +[EACCES] = 18, +[EFAULT] = 12, +[ENOTBLK] = 22, +[EBUSY] = 18, +[EEXIST] = 12, +[EXDEV] = 18, +[ENODEV] = 15, +[ENOTDIR] = 16, +[EISDIR] = 15, +[EINVAL] = 17, +[ENFILE] = 20, +[EMFILE] = 20, +[ENOTTY] = 17, +[ETXTBSY] = 15, +[EFBIG] = 15, +[ENOSPC] = 24, +[ESPIPE] = 13, +[EROFS] = 22, +[EMLINK] = 15, +[EPIPE] = 12, +[EDOM] = 19, +[ERANGE] = 17, +[ENOMSG] = 24, +[EDEADLK] = 26, +[ENOLCK] = 19, +[ENOSTR] = 24, +[ENODATA] = 30, +[ETIME] = 25, +[ENOSR] = 20, +[EPROTO] = 22, +[EBADMSG] = 24, +[ENOSYS] = 25, +[ENOTEMPTY] = 20, +[ENAMETOOLONG] = 19, +[ELOOP] = 34, +[EOPNOTSUPP] = 34, +[EPFNOSUPPORT] = 30, +[ECONNRESET] = 25, +[ENOBUFS] = 26, +[EAFNOSUPPORT] = 26, +[EPROTOTYPE] = 31, +[ENOTSOCK] = 31, +[ENOPROTOOPT] = 23, +[ESHUTDOWN] = 33, +[ECONNREFUSED] = 19, +[EADDRINUSE] = 23, +[ECONNABORTED] = 33, +[ENETUNREACH] = 23, +[ENETDOWN] = 16, +[ETIMEDOUT] = 21, +[EHOSTDOWN] = 13, +[EHOSTUNREACH] = 17, +[EINPROGRESS] = 26, +[EALREADY] = 30, +[EDESTADDRREQ] = 29, +[EMSGSIZE] = 13, +[EPROTONOSUPPORT] = 23, +[ESOCKTNOSUPPORT] = 26, +[EADDRNOTAVAIL] = 31, +[ENETRESET] = 36, +[EISCONN] = 28, +[ENOTCONN] = 24, +[ETOOMANYREFS] = 34, +[ENOTSUP] = 18, +[EILSEQ] = 22, +[EOVERFLOW] = 15, +[ECANCELED] = 19, +}; diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/ncs_commit.h b/nrfdemo/build/mcuboot/zephyr/include/generated/ncs_commit.h new file mode 100644 index 0000000..475b51b --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/ncs_commit.h @@ -0,0 +1,12 @@ +#ifndef _NCS_COMMIT_H_ +#define _NCS_COMMIT_H_ + +/* values come from cmake/version.cmake + * BUILD_COMMIT related values will be 'git rev-parse', + * alternatively user defined BUILD_VERSION. + */ + +#define NCS_COMMIT 5cb85570ca43 +#define NCS_COMMIT_STRING "5cb85570ca43" + +#endif /* _NCS_COMMIT_H_ */ diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/ncs_version.h b/nrfdemo/build/mcuboot/zephyr/include/generated/ncs_version.h new file mode 100644 index 0000000..5470c0a --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/ncs_version.h @@ -0,0 +1,25 @@ +#ifndef _NCS_VERSION_H_ +#define _NCS_VERSION_H_ + +/* values come from cmake/version.cmake + * BUILD_VERSION related values will be 'git describe', + * alternatively user defined BUILD_VERSION. + */ + +/* #undef ZEPHYR_VERSION_CODE */ +/* #undef ZEPHYR_VERSION */ + +#define NCSVERSION +#define NCS_VERSION_NUMBER 0x20700 +#define NCS_VERSION_MAJOR 2 +#define NCS_VERSION_MINOR 7 +#define NCS_PATCHLEVEL 0 +#define NCS_TWEAK +#define NCS_VERSION_STRING "2.7.0" +#define NCS_VERSION_EXTENDED_STRING "" +#define NCS_VERSION_TWEAK_STRING "" + +#define NCS_BUILD_VERSION v2.7.0 + + +#endif /* _NCS_VERSION_H_ */ diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/offsets.h b/nrfdemo/build/mcuboot/zephyr/include/generated/offsets.h new file mode 100644 index 0000000..2b00b2b --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/offsets.h @@ -0,0 +1,33 @@ +/* THIS FILE IS AUTO GENERATED. PLEASE DO NOT EDIT. + * + * This header file provides macros for the offsets of various structure + * members. These offset macros are primarily intended to be used in + * assembly code. + */ + +#ifndef __GEN_OFFSETS_H__ +#define __GEN_OFFSETS_H__ + +#define ___cpu_t_current_OFFSET 0x8 +#define ___cpu_t_nested_OFFSET 0x0 +#define ___cpu_t_irq_stack_OFFSET 0x4 +#define ___cpu_t_arch_OFFSET 0x11 +#define ___kernel_t_cpus_OFFSET 0x0 +#define ___kernel_t_ready_q_OFFSET 0x14 +#define ___ready_q_t_cache_OFFSET 0x0 +#define ___thread_base_t_user_options_OFFSET 0xc +#define ___thread_t_base_OFFSET 0x0 +#define ___thread_t_callee_saved_OFFSET 0x30 +#define ___thread_t_arch_OFFSET 0x74 +#define ___thread_t_stack_info_OFFSET 0x64 +#define __z_interrupt_stack_SIZEOF 0x800 +#define _PM_DEVICE_STRUCT_FLAGS_OFFSET 0x0 +#define ___thread_arch_t_basepri_OFFSET 0x0 +#define ___thread_arch_t_swap_return_value_OFFSET 0x4 +#define ___basic_sf_t_pc_OFFSET 0x18 +#define ___basic_sf_t_xpsr_OFFSET 0x1c +#define ___esf_t_SIZEOF 0x20 +#define ___callee_saved_t_SIZEOF 0x24 +#define ___thread_stack_info_t_start_OFFSET 0x0 + +#endif /* __GEN_OFFSETS_H__ */ diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/otype-to-size.h b/nrfdemo/build/mcuboot/zephyr/include/generated/otype-to-size.h new file mode 100644 index 0000000..5ae6675 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/otype-to-size.h @@ -0,0 +1,15 @@ +/* Non device/stack objects */ +case K_OBJ_MEM_SLAB: ret = sizeof(struct k_mem_slab); break; +case K_OBJ_MSGQ: ret = sizeof(struct k_msgq); break; +case K_OBJ_MUTEX: ret = sizeof(struct k_mutex); break; +case K_OBJ_PIPE: ret = sizeof(struct k_pipe); break; +case K_OBJ_QUEUE: ret = sizeof(struct k_queue); break; +case K_OBJ_POLL_SIGNAL: ret = sizeof(struct k_poll_signal); break; +case K_OBJ_SEM: ret = sizeof(struct k_sem); break; +case K_OBJ_STACK: ret = sizeof(struct k_stack); break; +case K_OBJ_THREAD: ret = sizeof(struct k_thread); break; +case K_OBJ_TIMER: ret = sizeof(struct k_timer); break; +case K_OBJ_CONDVAR: ret = sizeof(struct k_condvar); break; +#ifdef CONFIG_EVENTS +case K_OBJ_EVENT: ret = sizeof(struct k_event); break; +#endif diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/otype-to-str.h b/nrfdemo/build/mcuboot/zephyr/include/generated/otype-to-str.h new file mode 100644 index 0000000..1c88c48 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/otype-to-str.h @@ -0,0 +1,118 @@ +/* Core kernel objects */ +case K_OBJ_MEM_SLAB: ret = "k_mem_slab"; break; +case K_OBJ_MSGQ: ret = "k_msgq"; break; +case K_OBJ_MUTEX: ret = "k_mutex"; break; +case K_OBJ_PIPE: ret = "k_pipe"; break; +case K_OBJ_QUEUE: ret = "k_queue"; break; +case K_OBJ_POLL_SIGNAL: ret = "k_poll_signal"; break; +case K_OBJ_SEM: ret = "k_sem"; break; +case K_OBJ_STACK: ret = "k_stack"; break; +case K_OBJ_THREAD: ret = "k_thread"; break; +case K_OBJ_TIMER: ret = "k_timer"; break; +case K_OBJ_THREAD_STACK_ELEMENT: ret = "z_thread_stack_element"; break; +case K_OBJ_NET_SOCKET: ret = "NET_SOCKET"; break; +case K_OBJ_NET_IF: ret = "net_if"; break; +case K_OBJ_SYS_MUTEX: ret = "sys_mutex"; break; +case K_OBJ_FUTEX: ret = "k_futex"; break; +case K_OBJ_CONDVAR: ret = "k_condvar"; break; +#ifdef CONFIG_EVENTS +case K_OBJ_EVENT: ret = "k_event"; break; +#endif +#ifdef CONFIG_ZTEST +case K_OBJ_ZTEST_SUITE_NODE: ret = "ztest_suite_node"; break; +#endif +#ifdef CONFIG_ZTEST +case K_OBJ_ZTEST_SUITE_STATS: ret = "ztest_suite_stats"; break; +#endif +#ifdef CONFIG_ZTEST +case K_OBJ_ZTEST_UNIT_TEST: ret = "ztest_unit_test"; break; +#endif +#ifdef CONFIG_ZTEST +case K_OBJ_ZTEST_TEST_RULE: ret = "ztest_test_rule"; break; +#endif +#ifdef CONFIG_RTIO +case K_OBJ_RTIO: ret = "rtio"; break; +#endif +#ifdef CONFIG_RTIO +case K_OBJ_RTIO_IODEV: ret = "rtio_iodev"; break; +#endif +#ifdef CONFIG_SENSOR_ASYNC_API +case K_OBJ_SENSOR_DECODER_API: ret = "sensor_decoder_api"; break; +#endif +/* Driver subsystems */ +case K_OBJ_DRIVER_FLASH: ret = "flash driver"; break; +case K_OBJ_DRIVER_GPIO: ret = "gpio driver"; break; +case K_OBJ_DRIVER_UART: ret = "uart driver"; break; +case K_OBJ_DRIVER_SHARED_IRQ: ret = "shared_irq driver"; break; +case K_OBJ_DRIVER_CRYPTO: ret = "crypto driver"; break; +case K_OBJ_DRIVER_ADC: ret = "adc driver"; break; +case K_OBJ_DRIVER_AUXDISPLAY: ret = "auxdisplay driver"; break; +case K_OBJ_DRIVER_BBRAM: ret = "bbram driver"; break; +case K_OBJ_DRIVER_CAN: ret = "can driver"; break; +case K_OBJ_DRIVER_CELLULAR: ret = "cellular driver"; break; +case K_OBJ_DRIVER_CHARGER: ret = "charger driver"; break; +case K_OBJ_DRIVER_CLOCK_CONTROL: ret = "clock_control driver"; break; +case K_OBJ_DRIVER_COREDUMP: ret = "coredump driver"; break; +case K_OBJ_DRIVER_COUNTER: ret = "counter driver"; break; +case K_OBJ_DRIVER_DAC: ret = "dac driver"; break; +case K_OBJ_DRIVER_DAI: ret = "dai driver"; break; +case K_OBJ_DRIVER_DISPLAY: ret = "display driver"; break; +case K_OBJ_DRIVER_DMA: ret = "dma driver"; break; +case K_OBJ_DRIVER_EDAC: ret = "edac driver"; break; +case K_OBJ_DRIVER_EEPROM: ret = "eeprom driver"; break; +case K_OBJ_DRIVER_EMUL_BBRAM: ret = "emul_bbram driver"; break; +case K_OBJ_DRIVER_FUEL_GAUGE_EMUL: ret = "fuel_gauge_emul driver"; break; +case K_OBJ_DRIVER_EMUL_SENSOR: ret = "emul_sensor driver"; break; +case K_OBJ_DRIVER_ENTROPY: ret = "entropy driver"; break; +case K_OBJ_DRIVER_ESPI: ret = "espi driver"; break; +case K_OBJ_DRIVER_ESPI_SAF: ret = "espi_saf driver"; break; +case K_OBJ_DRIVER_FPGA: ret = "fpga driver"; break; +case K_OBJ_DRIVER_FUEL_GAUGE: ret = "fuel_gauge driver"; break; +case K_OBJ_DRIVER_GNSS: ret = "gnss driver"; break; +case K_OBJ_DRIVER_HWSPINLOCK: ret = "hwspinlock driver"; break; +case K_OBJ_DRIVER_I2C: ret = "i2c driver"; break; +case K_OBJ_DRIVER_I2C_TARGET: ret = "i2c_target driver"; break; +case K_OBJ_DRIVER_I2S: ret = "i2s driver"; break; +case K_OBJ_DRIVER_I3C: ret = "i3c driver"; break; +case K_OBJ_DRIVER_IPM: ret = "ipm driver"; break; +case K_OBJ_DRIVER_KSCAN: ret = "kscan driver"; break; +case K_OBJ_DRIVER_LED: ret = "led driver"; break; +case K_OBJ_DRIVER_LED_STRIP: ret = "led_strip driver"; break; +case K_OBJ_DRIVER_LORA: ret = "lora driver"; break; +case K_OBJ_DRIVER_MBOX: ret = "mbox driver"; break; +case K_OBJ_DRIVER_MDIO: ret = "mdio driver"; break; +case K_OBJ_DRIVER_MIPI_DBI: ret = "mipi_dbi driver"; break; +case K_OBJ_DRIVER_MIPI_DSI: ret = "mipi_dsi driver"; break; +case K_OBJ_DRIVER_PECI: ret = "peci driver"; break; +case K_OBJ_DRIVER_PS2: ret = "ps2 driver"; break; +case K_OBJ_DRIVER_PTP_CLOCK: ret = "ptp_clock driver"; break; +case K_OBJ_DRIVER_PWM: ret = "pwm driver"; break; +case K_OBJ_DRIVER_REGULATOR_PARENT: ret = "regulator_parent driver"; break; +case K_OBJ_DRIVER_REGULATOR: ret = "regulator driver"; break; +case K_OBJ_DRIVER_RESET: ret = "reset driver"; break; +case K_OBJ_DRIVER_RETAINED_MEM: ret = "retained_mem driver"; break; +case K_OBJ_DRIVER_RTC: ret = "rtc driver"; break; +case K_OBJ_DRIVER_SDHC: ret = "sdhc driver"; break; +case K_OBJ_DRIVER_SENSOR: ret = "sensor driver"; break; +case K_OBJ_DRIVER_SMBUS: ret = "smbus driver"; break; +case K_OBJ_DRIVER_SPI: ret = "spi driver"; break; +case K_OBJ_DRIVER_SYSCON: ret = "syscon driver"; break; +case K_OBJ_DRIVER_VIDEO: ret = "video driver"; break; +case K_OBJ_DRIVER_W1: ret = "w1 driver"; break; +case K_OBJ_DRIVER_WDT: ret = "wdt driver"; break; +case K_OBJ_DRIVER_CAN_TRANSCEIVER: ret = "can_transceiver driver"; break; +case K_OBJ_DRIVER_UART_MUX: ret = "uart_mux driver"; break; +case K_OBJ_DRIVER_I3C_TARGET: ret = "i3c_target driver"; break; +case K_OBJ_DRIVER_ITS: ret = "its driver"; break; +case K_OBJ_DRIVER_VTD: ret = "vtd driver"; break; +case K_OBJ_DRIVER_TGPIO: ret = "tgpio driver"; break; +case K_OBJ_DRIVER_PCIE_CTRL: ret = "pcie_ctrl driver"; break; +case K_OBJ_DRIVER_PCIE_EP: ret = "pcie_ep driver"; break; +case K_OBJ_DRIVER_SVC: ret = "svc driver"; break; +case K_OBJ_DRIVER_BC12_EMUL: ret = "bc12_emul driver"; break; +case K_OBJ_DRIVER_BC12: ret = "bc12 driver"; break; +case K_OBJ_DRIVER_USBC_PPC: ret = "usbc_ppc driver"; break; +case K_OBJ_DRIVER_TCPC: ret = "tcpc driver"; break; +case K_OBJ_DRIVER_USBC_VBUS: ret = "usbc_vbus driver"; break; +case K_OBJ_DRIVER_IVSHMEM: ret = "ivshmem driver"; break; +case K_OBJ_DRIVER_ETHPHY: ret = "ethphy driver"; break; diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/pm.yml b/nrfdemo/build/mcuboot/zephyr/include/generated/pm.yml new file mode 100644 index 0000000..7d26fac --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/pm.yml @@ -0,0 +1,27 @@ +mcuboot: + size: 0xc000 + placement: + before: [mcuboot_primary] +mcuboot_primary_app: + # All images to be placed in MCUboot's slot 0 should be placed in this + # partition + span: [app] +mcuboot_primary: + span: [mcuboot_pad, mcuboot_primary_app] +# Partition for secondary slot is not created if building in single application +# slot configuration. +mcuboot_secondary: + share_size: [mcuboot_primary] + placement: + align: {start: 0x8000} + align_next: 0x8000 # Ensure that the next partition does not interfere with this image + after: mcuboot_primary +# Padding placed before image to boot. This reserves space for the MCUboot image header +# and it ensures that the boot image gets linked with the correct address offset in flash. +mcuboot_pad: + # MCUboot pad must be placed before the primary application partition. + # The primary application partition includes the secure firmware if present. + size: 0x200 + placement: + before: [mcuboot_primary_app] + align: {start: 0x8000} diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/pm_config.h b/nrfdemo/build/mcuboot/zephyr/include/generated/pm_config.h new file mode 100644 index 0000000..b1de502 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/pm_config.h @@ -0,0 +1,170 @@ +/* File generated by /home/mike/Documents/ncs/v2.7.0/nrf/scripts/partition_manager_output.py, do not modify */ +#ifndef PM_CONFIG_H__ +#define PM_CONFIG_H__ +#define PM_MCUBOOT_OFFSET 0x0 +#define PM_MCUBOOT_ADDRESS 0x0 +#define PM_MCUBOOT_END_ADDRESS 0xc000 +#define PM_MCUBOOT_SIZE 0xc000 +#define PM_MCUBOOT_NAME mcuboot +#define PM_MCUBOOT_ID 0 +#define PM_mcuboot_ID PM_MCUBOOT_ID +#define PM_mcuboot_IS_ENABLED 1 +#define PM_0_LABEL MCUBOOT +#define PM_MCUBOOT_DEV flash_controller +#define PM_MCUBOOT_DEFAULT_DRIVER_KCONFIG CONFIG_SOC_FLASH_NRF +#define PM_EMPTY_0_OFFSET 0xc000 +#define PM_EMPTY_0_ADDRESS 0xc000 +#define PM_EMPTY_0_END_ADDRESS 0x10000 +#define PM_EMPTY_0_SIZE 0x4000 +#define PM_EMPTY_0_NAME EMPTY_0 +#define PM_EMPTY_0_ID 1 +#define PM_empty_0_ID PM_EMPTY_0_ID +#define PM_empty_0_IS_ENABLED 1 +#define PM_1_LABEL EMPTY_0 +#define PM_EMPTY_0_DEV flash_controller +#define PM_EMPTY_0_DEFAULT_DRIVER_KCONFIG CONFIG_SOC_FLASH_NRF +#define PM_MCUBOOT_PAD_OFFSET 0x10000 +#define PM_MCUBOOT_PAD_ADDRESS 0x10000 +#define PM_MCUBOOT_PAD_END_ADDRESS 0x10200 +#define PM_MCUBOOT_PAD_SIZE 0x200 +#define PM_MCUBOOT_PAD_NAME mcuboot_pad +#define PM_MCUBOOT_PAD_ID 2 +#define PM_mcuboot_pad_ID PM_MCUBOOT_PAD_ID +#define PM_mcuboot_pad_IS_ENABLED 1 +#define PM_2_LABEL MCUBOOT_PAD +#define PM_MCUBOOT_PAD_DEV flash_controller +#define PM_MCUBOOT_PAD_DEFAULT_DRIVER_KCONFIG CONFIG_SOC_FLASH_NRF +#define PM_MCUBOOT_PRIMARY_OFFSET 0x10000 +#define PM_MCUBOOT_PRIMARY_ADDRESS 0x10000 +#define PM_MCUBOOT_PRIMARY_END_ADDRESS 0x88000 +#define PM_MCUBOOT_PRIMARY_SIZE 0x78000 +#define PM_MCUBOOT_PRIMARY_NAME mcuboot_primary +#define PM_MCUBOOT_PRIMARY_ID 3 +#define PM_mcuboot_primary_ID PM_MCUBOOT_PRIMARY_ID +#define PM_mcuboot_primary_IS_ENABLED 1 +#define PM_3_LABEL MCUBOOT_PRIMARY +#define PM_MCUBOOT_PRIMARY_DEV flash_controller +#define PM_MCUBOOT_PRIMARY_DEFAULT_DRIVER_KCONFIG CONFIG_SOC_FLASH_NRF +#define PM_TFM_SECURE_OFFSET 0x10000 +#define PM_TFM_SECURE_ADDRESS 0x10000 +#define PM_TFM_SECURE_END_ADDRESS 0x18000 +#define PM_TFM_SECURE_SIZE 0x8000 +#define PM_TFM_SECURE_NAME tfm_secure +#define PM_TFM_SECURE_ID 4 +#define PM_tfm_secure_ID PM_TFM_SECURE_ID +#define PM_tfm_secure_IS_ENABLED 1 +#define PM_4_LABEL TFM_SECURE +#define PM_TFM_SECURE_DEV flash_controller +#define PM_TFM_SECURE_DEFAULT_DRIVER_KCONFIG CONFIG_SOC_FLASH_NRF +#define PM_MCUBOOT_PRIMARY_APP_OFFSET 0x10200 +#define PM_MCUBOOT_PRIMARY_APP_ADDRESS 0x10200 +#define PM_MCUBOOT_PRIMARY_APP_END_ADDRESS 0x88000 +#define PM_MCUBOOT_PRIMARY_APP_SIZE 0x77e00 +#define PM_MCUBOOT_PRIMARY_APP_NAME mcuboot_primary_app +#define PM_MCUBOOT_PRIMARY_APP_ID 5 +#define PM_mcuboot_primary_app_ID PM_MCUBOOT_PRIMARY_APP_ID +#define PM_mcuboot_primary_app_IS_ENABLED 1 +#define PM_5_LABEL MCUBOOT_PRIMARY_APP +#define PM_MCUBOOT_PRIMARY_APP_DEV flash_controller +#define PM_MCUBOOT_PRIMARY_APP_DEFAULT_DRIVER_KCONFIG CONFIG_SOC_FLASH_NRF +#define PM_TFM_OFFSET 0x10200 +#define PM_TFM_ADDRESS 0x10200 +#define PM_TFM_END_ADDRESS 0x18000 +#define PM_TFM_SIZE 0x7e00 +#define PM_TFM_NAME tfm +#define PM_TFM_ID 6 +#define PM_tfm_ID PM_TFM_ID +#define PM_tfm_IS_ENABLED 1 +#define PM_6_LABEL TFM +#define PM_TFM_DEV flash_controller +#define PM_TFM_DEFAULT_DRIVER_KCONFIG CONFIG_SOC_FLASH_NRF +#define PM_APP_OFFSET 0x18000 +#define PM_APP_ADDRESS 0x18000 +#define PM_APP_END_ADDRESS 0x88000 +#define PM_APP_SIZE 0x70000 +#define PM_APP_NAME app +#define PM_APP_ID 7 +#define PM_app_ID PM_APP_ID +#define PM_app_IS_ENABLED 1 +#define PM_7_LABEL APP +#define PM_APP_DEV flash_controller +#define PM_APP_DEFAULT_DRIVER_KCONFIG CONFIG_SOC_FLASH_NRF +#define PM_TFM_NONSECURE_OFFSET 0x18000 +#define PM_TFM_NONSECURE_ADDRESS 0x18000 +#define PM_TFM_NONSECURE_END_ADDRESS 0x88000 +#define PM_TFM_NONSECURE_SIZE 0x70000 +#define PM_TFM_NONSECURE_NAME tfm_nonsecure +#define PM_TFM_NONSECURE_ID 8 +#define PM_tfm_nonsecure_ID PM_TFM_NONSECURE_ID +#define PM_tfm_nonsecure_IS_ENABLED 1 +#define PM_8_LABEL TFM_NONSECURE +#define PM_TFM_NONSECURE_DEV flash_controller +#define PM_TFM_NONSECURE_DEFAULT_DRIVER_KCONFIG CONFIG_SOC_FLASH_NRF +#define PM_MCUBOOT_SECONDARY_OFFSET 0x88000 +#define PM_MCUBOOT_SECONDARY_ADDRESS 0x88000 +#define PM_MCUBOOT_SECONDARY_END_ADDRESS 0x100000 +#define PM_MCUBOOT_SECONDARY_SIZE 0x78000 +#define PM_MCUBOOT_SECONDARY_NAME mcuboot_secondary +#define PM_MCUBOOT_SECONDARY_ID 9 +#define PM_mcuboot_secondary_ID PM_MCUBOOT_SECONDARY_ID +#define PM_mcuboot_secondary_IS_ENABLED 1 +#define PM_9_LABEL MCUBOOT_SECONDARY +#define PM_MCUBOOT_SECONDARY_DEV flash_controller +#define PM_MCUBOOT_SECONDARY_DEFAULT_DRIVER_KCONFIG CONFIG_SOC_FLASH_NRF +#define PM_OTP_OFFSET 0x0 +#define PM_OTP_ADDRESS 0xff8108 +#define PM_OTP_END_ADDRESS 0xff83fc +#define PM_OTP_SIZE 0x2f4 +#define PM_OTP_NAME otp +#define PM_MCUBOOT_SRAM_OFFSET 0x0 +#define PM_MCUBOOT_SRAM_ADDRESS 0x20000000 +#define PM_MCUBOOT_SRAM_END_ADDRESS 0x20008000 +#define PM_MCUBOOT_SRAM_SIZE 0x8000 +#define PM_MCUBOOT_SRAM_NAME mcuboot_sram +#define PM_SRAM_SECURE_OFFSET 0x0 +#define PM_SRAM_SECURE_ADDRESS 0x20000000 +#define PM_SRAM_SECURE_END_ADDRESS 0x20008000 +#define PM_SRAM_SECURE_SIZE 0x8000 +#define PM_SRAM_SECURE_NAME sram_secure +#define PM_TFM_SRAM_OFFSET 0x0 +#define PM_TFM_SRAM_ADDRESS 0x20000000 +#define PM_TFM_SRAM_END_ADDRESS 0x20008000 +#define PM_TFM_SRAM_SIZE 0x8000 +#define PM_TFM_SRAM_NAME tfm_sram +#define PM_NRF_MODEM_LIB_CTRL_OFFSET 0x8000 +#define PM_NRF_MODEM_LIB_CTRL_ADDRESS 0x20008000 +#define PM_NRF_MODEM_LIB_CTRL_END_ADDRESS 0x200084e8 +#define PM_NRF_MODEM_LIB_CTRL_SIZE 0x4e8 +#define PM_NRF_MODEM_LIB_CTRL_NAME nrf_modem_lib_ctrl +#define PM_NRF_MODEM_LIB_SRAM_OFFSET 0x8000 +#define PM_NRF_MODEM_LIB_SRAM_ADDRESS 0x20008000 +#define PM_NRF_MODEM_LIB_SRAM_END_ADDRESS 0x2000c568 +#define PM_NRF_MODEM_LIB_SRAM_SIZE 0x4568 +#define PM_NRF_MODEM_LIB_SRAM_NAME nrf_modem_lib_sram +#define PM_SRAM_NONSECURE_OFFSET 0x8000 +#define PM_SRAM_NONSECURE_ADDRESS 0x20008000 +#define PM_SRAM_NONSECURE_END_ADDRESS 0x20040000 +#define PM_SRAM_NONSECURE_SIZE 0x38000 +#define PM_SRAM_NONSECURE_NAME sram_nonsecure +#define PM_NRF_MODEM_LIB_TX_OFFSET 0x84e8 +#define PM_NRF_MODEM_LIB_TX_ADDRESS 0x200084e8 +#define PM_NRF_MODEM_LIB_TX_END_ADDRESS 0x2000a568 +#define PM_NRF_MODEM_LIB_TX_SIZE 0x2080 +#define PM_NRF_MODEM_LIB_TX_NAME nrf_modem_lib_tx +#define PM_NRF_MODEM_LIB_RX_OFFSET 0xa568 +#define PM_NRF_MODEM_LIB_RX_ADDRESS 0x2000a568 +#define PM_NRF_MODEM_LIB_RX_END_ADDRESS 0x2000c568 +#define PM_NRF_MODEM_LIB_RX_SIZE 0x2000 +#define PM_NRF_MODEM_LIB_RX_NAME nrf_modem_lib_rx +#define PM_SRAM_PRIMARY_OFFSET 0xc568 +#define PM_SRAM_PRIMARY_ADDRESS 0x2000c568 +#define PM_SRAM_PRIMARY_END_ADDRESS 0x20040000 +#define PM_SRAM_PRIMARY_SIZE 0x33a98 +#define PM_SRAM_PRIMARY_NAME sram_primary +#define PM_NUM 10 +#define PM_ALL_BY_SIZE "mcuboot_pad otp nrf_modem_lib_ctrl nrf_modem_lib_rx nrf_modem_lib_tx EMPTY_0 nrf_modem_lib_sram tfm tfm_sram mcuboot_sram sram_secure tfm_secure mcuboot sram_primary sram_nonsecure app tfm_nonsecure mcuboot_primary_app mcuboot_secondary mcuboot_primary" +#define PM_ADDRESS 0x0 +#define PM_SIZE 0xc000 +#define PM_SRAM_ADDRESS 0x20000000 +#define PM_SRAM_SIZE 0x8000 +#endif /* PM_CONFIG_H__ */
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/snippets-data-sections.ld b/nrfdemo/build/mcuboot/zephyr/include/generated/snippets-data-sections.ld new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/snippets-data-sections.ld diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/snippets-dtcm-section.ld b/nrfdemo/build/mcuboot/zephyr/include/generated/snippets-dtcm-section.ld new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/snippets-dtcm-section.ld diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/snippets-itcm-section.ld b/nrfdemo/build/mcuboot/zephyr/include/generated/snippets-itcm-section.ld new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/snippets-itcm-section.ld diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/snippets-nocache-section.ld b/nrfdemo/build/mcuboot/zephyr/include/generated/snippets-nocache-section.ld new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/snippets-nocache-section.ld diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/snippets-noinit.ld b/nrfdemo/build/mcuboot/zephyr/include/generated/snippets-noinit.ld new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/snippets-noinit.ld diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/snippets-pinned-data-sections.ld b/nrfdemo/build/mcuboot/zephyr/include/generated/snippets-pinned-data-sections.ld new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/snippets-pinned-data-sections.ld diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/snippets-pinned-ram-sections.ld b/nrfdemo/build/mcuboot/zephyr/include/generated/snippets-pinned-ram-sections.ld new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/snippets-pinned-ram-sections.ld diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/snippets-pinned-rodata.ld b/nrfdemo/build/mcuboot/zephyr/include/generated/snippets-pinned-rodata.ld new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/snippets-pinned-rodata.ld diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/snippets-ram-sections.ld b/nrfdemo/build/mcuboot/zephyr/include/generated/snippets-ram-sections.ld new file mode 100644 index 0000000..74bd87f --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/snippets-ram-sections.ld @@ -0,0 +1 @@ +/* Sort key: "default" */#include "../arch/common/ramfunc.ld" diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/snippets-ramfunc-section.ld b/nrfdemo/build/mcuboot/zephyr/include/generated/snippets-ramfunc-section.ld new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/snippets-ramfunc-section.ld diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/snippets-rodata.ld b/nrfdemo/build/mcuboot/zephyr/include/generated/snippets-rodata.ld new file mode 100644 index 0000000..27b783f --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/snippets-rodata.ld @@ -0,0 +1 @@ +/* Sort key: "default" */#include "../arch/arm/core/swi_tables.ld" diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/snippets-rom-start.ld b/nrfdemo/build/mcuboot/zephyr/include/generated/snippets-rom-start.ld new file mode 100644 index 0000000..4f6d2e6 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/snippets-rom-start.ld @@ -0,0 +1,6 @@ +/* Sort key: "!" */#include "../arch/common/rom_start_address.ld" +/* Sort key: "$" */#include "../arch/common/fill_with_zeros.ld" +/* Sort key: "0x0" */#include "../arch/common/rom_start_offset.ld" +/* Sort key: "0x0vectors" */#include "../arch/arm/core/vector_table.ld" +/* Sort key: "0x0vectors" */#include "zephyr/linker/irq-vector-table-section.ld" +/* Sort key: "0x1vectors" */#include "../arch/arm/core/cortex_m/vector_table_pad.ld" diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/snippets-rwdata.ld b/nrfdemo/build/mcuboot/zephyr/include/generated/snippets-rwdata.ld new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/snippets-rwdata.ld diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/snippets-sections.ld b/nrfdemo/build/mcuboot/zephyr/include/generated/snippets-sections.ld new file mode 100644 index 0000000..d66bc33 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/snippets-sections.ld @@ -0,0 +1,2 @@ +/* Sort key: "default" */#include "../soc/nordic/common/arm_platform_init.ld" +/* Sort key: "default" */#include "zephyr/linker/intlist.ld" diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/syscall_dispatch.c b/nrfdemo/build/mcuboot/zephyr/include/generated/syscall_dispatch.c new file mode 100644 index 0000000..3144bfe --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/syscall_dispatch.c @@ -0,0 +1,802 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#include <zephyr/llext/symbol.h> + +/* Weak handler functions that get replaced by the real ones unless a system + * call is not implemented due to kernel configuration. + */ + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_zephyr_read_stdin(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_zephyr_write_stdout(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_zephyr_fputc(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_zephyr_fwrite(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh___posix_clock_get_base(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_z_sys_mutex_kernel_lock(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_z_sys_mutex_kernel_unlock(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_z_log_msg_simple_create_0(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_z_log_msg_simple_create_1(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_z_log_msg_simple_create_2(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_z_log_msg_static_create(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_log_panic(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_log_process(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_log_buffered_cnt(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_log_filter_set(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_log_frontend_filter_set(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_flash_read(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_flash_write(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_flash_erase(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_flash_get_page_info_by_offs(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_flash_get_page_info_by_idx(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_flash_get_page_count(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_flash_sfdp_read(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_flash_read_jedec_id(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_flash_get_write_block_size(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_flash_get_parameters(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_flash_ex_op(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_gpio_pin_interrupt_configure(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_gpio_pin_configure(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_gpio_port_get_direction(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_gpio_pin_get_config(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_gpio_port_get_raw(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_gpio_port_set_masked_raw(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_gpio_port_set_bits_raw(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_gpio_port_clear_bits_raw(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_gpio_port_toggle_bits(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_gpio_get_pending_int(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_uart_err_check(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_uart_poll_in(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_uart_poll_in_u16(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_uart_poll_out(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_uart_poll_out_u16(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_uart_configure(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_uart_config_get(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_uart_irq_tx_enable(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_uart_irq_tx_disable(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_uart_irq_rx_enable(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_uart_irq_rx_disable(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_uart_irq_err_enable(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_uart_irq_err_disable(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_uart_irq_is_pending(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_uart_irq_update(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_uart_tx(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_uart_tx_u16(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_uart_tx_abort(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_uart_rx_enable(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_uart_rx_enable_u16(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_uart_rx_disable(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_uart_line_ctrl_set(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_uart_line_ctrl_get(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_uart_drv_cmd(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_device_get_binding(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_device_is_ready(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_device_init(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_thread_stack_alloc(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_thread_stack_free(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_thread_create(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_thread_stack_space_get(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_thread_join(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_sleep(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_usleep(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_busy_wait(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_yield(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_wakeup(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_sched_current_thread_query(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_thread_abort(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_thread_start(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_thread_timeout_expires_ticks(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_thread_timeout_remaining_ticks(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_thread_priority_get(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_thread_priority_set(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_thread_deadline_set(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_thread_suspend(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_thread_resume(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_is_preempt_thread(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_thread_custom_data_set(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_thread_custom_data_get(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_thread_name_set(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_thread_name_copy(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_timer_start(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_timer_stop(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_timer_status_get(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_timer_status_sync(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_timer_expires_ticks(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_timer_remaining_ticks(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_timer_user_data_set(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_timer_user_data_get(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_uptime_ticks(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_queue_init(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_queue_cancel_wait(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_queue_alloc_append(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_queue_alloc_prepend(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_queue_get(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_queue_is_empty(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_queue_peek_head(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_queue_peek_tail(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_futex_wait(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_futex_wake(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_event_init(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_event_post(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_event_set(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_event_set_masked(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_event_clear(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_event_wait(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_event_wait_all(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_stack_alloc_init(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_stack_push(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_stack_pop(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_mutex_init(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_mutex_lock(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_mutex_unlock(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_condvar_init(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_condvar_signal(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_condvar_broadcast(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_condvar_wait(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_sem_init(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_sem_take(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_sem_give(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_sem_reset(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_sem_count_get(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_msgq_alloc_init(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_msgq_put(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_msgq_get(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_msgq_peek(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_msgq_peek_at(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_msgq_purge(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_msgq_num_free_get(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_msgq_get_attrs(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_msgq_num_used_get(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_pipe_alloc_init(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_pipe_put(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_pipe_get(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_pipe_read_avail(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_pipe_write_avail(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_pipe_flush(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_pipe_buffer_flush(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_poll(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_poll_signal_init(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_poll_signal_reset(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_poll_signal_check(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_poll_signal_raise(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_str_out(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_float_disable(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_float_enable(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_k_object_alloc_size(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_sys_clock_hw_cycles_per_sec_runtime_get(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +__weak ALIAS_OF(handler_no_syscall) +uintptr_t z_mrsh_z_errno(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, + uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); +extern uintptr_t z_mrsh_k_object_release(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); +extern uintptr_t z_mrsh_k_object_access_grant(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); +extern uintptr_t z_mrsh_k_object_alloc(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf); + +const _k_syscall_handler_t _k_syscall_table[K_SYSCALL_LIMIT] = { + [K_SYSCALL_ZEPHYR_READ_STDIN] = z_mrsh_zephyr_read_stdin, + [K_SYSCALL_ZEPHYR_WRITE_STDOUT] = z_mrsh_zephyr_write_stdout, + [K_SYSCALL_ZEPHYR_FPUTC] = z_mrsh_zephyr_fputc, + [K_SYSCALL_ZEPHYR_FWRITE] = z_mrsh_zephyr_fwrite, + [K_SYSCALL___POSIX_CLOCK_GET_BASE] = z_mrsh___posix_clock_get_base, + [K_SYSCALL_Z_SYS_MUTEX_KERNEL_LOCK] = z_mrsh_z_sys_mutex_kernel_lock, + [K_SYSCALL_Z_SYS_MUTEX_KERNEL_UNLOCK] = z_mrsh_z_sys_mutex_kernel_unlock, + [K_SYSCALL_Z_LOG_MSG_SIMPLE_CREATE_0] = z_mrsh_z_log_msg_simple_create_0, + [K_SYSCALL_Z_LOG_MSG_SIMPLE_CREATE_1] = z_mrsh_z_log_msg_simple_create_1, + [K_SYSCALL_Z_LOG_MSG_SIMPLE_CREATE_2] = z_mrsh_z_log_msg_simple_create_2, + [K_SYSCALL_Z_LOG_MSG_STATIC_CREATE] = z_mrsh_z_log_msg_static_create, + [K_SYSCALL_LOG_PANIC] = z_mrsh_log_panic, + [K_SYSCALL_LOG_PROCESS] = z_mrsh_log_process, + [K_SYSCALL_LOG_BUFFERED_CNT] = z_mrsh_log_buffered_cnt, + [K_SYSCALL_LOG_FILTER_SET] = z_mrsh_log_filter_set, + [K_SYSCALL_LOG_FRONTEND_FILTER_SET] = z_mrsh_log_frontend_filter_set, + [K_SYSCALL_FLASH_READ] = z_mrsh_flash_read, + [K_SYSCALL_FLASH_WRITE] = z_mrsh_flash_write, + [K_SYSCALL_FLASH_ERASE] = z_mrsh_flash_erase, + [K_SYSCALL_FLASH_GET_PAGE_INFO_BY_OFFS] = z_mrsh_flash_get_page_info_by_offs, + [K_SYSCALL_FLASH_GET_PAGE_INFO_BY_IDX] = z_mrsh_flash_get_page_info_by_idx, + [K_SYSCALL_FLASH_GET_PAGE_COUNT] = z_mrsh_flash_get_page_count, + [K_SYSCALL_FLASH_SFDP_READ] = z_mrsh_flash_sfdp_read, + [K_SYSCALL_FLASH_READ_JEDEC_ID] = z_mrsh_flash_read_jedec_id, + [K_SYSCALL_FLASH_GET_WRITE_BLOCK_SIZE] = z_mrsh_flash_get_write_block_size, + [K_SYSCALL_FLASH_GET_PARAMETERS] = z_mrsh_flash_get_parameters, + [K_SYSCALL_FLASH_EX_OP] = z_mrsh_flash_ex_op, + [K_SYSCALL_GPIO_PIN_INTERRUPT_CONFIGURE] = z_mrsh_gpio_pin_interrupt_configure, + [K_SYSCALL_GPIO_PIN_CONFIGURE] = z_mrsh_gpio_pin_configure, + [K_SYSCALL_GPIO_PORT_GET_DIRECTION] = z_mrsh_gpio_port_get_direction, + [K_SYSCALL_GPIO_PIN_GET_CONFIG] = z_mrsh_gpio_pin_get_config, + [K_SYSCALL_GPIO_PORT_GET_RAW] = z_mrsh_gpio_port_get_raw, + [K_SYSCALL_GPIO_PORT_SET_MASKED_RAW] = z_mrsh_gpio_port_set_masked_raw, + [K_SYSCALL_GPIO_PORT_SET_BITS_RAW] = z_mrsh_gpio_port_set_bits_raw, + [K_SYSCALL_GPIO_PORT_CLEAR_BITS_RAW] = z_mrsh_gpio_port_clear_bits_raw, + [K_SYSCALL_GPIO_PORT_TOGGLE_BITS] = z_mrsh_gpio_port_toggle_bits, + [K_SYSCALL_GPIO_GET_PENDING_INT] = z_mrsh_gpio_get_pending_int, + [K_SYSCALL_UART_ERR_CHECK] = z_mrsh_uart_err_check, + [K_SYSCALL_UART_POLL_IN] = z_mrsh_uart_poll_in, + [K_SYSCALL_UART_POLL_IN_U16] = z_mrsh_uart_poll_in_u16, + [K_SYSCALL_UART_POLL_OUT] = z_mrsh_uart_poll_out, + [K_SYSCALL_UART_POLL_OUT_U16] = z_mrsh_uart_poll_out_u16, + [K_SYSCALL_UART_CONFIGURE] = z_mrsh_uart_configure, + [K_SYSCALL_UART_CONFIG_GET] = z_mrsh_uart_config_get, + [K_SYSCALL_UART_IRQ_TX_ENABLE] = z_mrsh_uart_irq_tx_enable, + [K_SYSCALL_UART_IRQ_TX_DISABLE] = z_mrsh_uart_irq_tx_disable, + [K_SYSCALL_UART_IRQ_RX_ENABLE] = z_mrsh_uart_irq_rx_enable, + [K_SYSCALL_UART_IRQ_RX_DISABLE] = z_mrsh_uart_irq_rx_disable, + [K_SYSCALL_UART_IRQ_ERR_ENABLE] = z_mrsh_uart_irq_err_enable, + [K_SYSCALL_UART_IRQ_ERR_DISABLE] = z_mrsh_uart_irq_err_disable, + [K_SYSCALL_UART_IRQ_IS_PENDING] = z_mrsh_uart_irq_is_pending, + [K_SYSCALL_UART_IRQ_UPDATE] = z_mrsh_uart_irq_update, + [K_SYSCALL_UART_TX] = z_mrsh_uart_tx, + [K_SYSCALL_UART_TX_U16] = z_mrsh_uart_tx_u16, + [K_SYSCALL_UART_TX_ABORT] = z_mrsh_uart_tx_abort, + [K_SYSCALL_UART_RX_ENABLE] = z_mrsh_uart_rx_enable, + [K_SYSCALL_UART_RX_ENABLE_U16] = z_mrsh_uart_rx_enable_u16, + [K_SYSCALL_UART_RX_DISABLE] = z_mrsh_uart_rx_disable, + [K_SYSCALL_UART_LINE_CTRL_SET] = z_mrsh_uart_line_ctrl_set, + [K_SYSCALL_UART_LINE_CTRL_GET] = z_mrsh_uart_line_ctrl_get, + [K_SYSCALL_UART_DRV_CMD] = z_mrsh_uart_drv_cmd, + [K_SYSCALL_DEVICE_GET_BINDING] = z_mrsh_device_get_binding, + [K_SYSCALL_DEVICE_IS_READY] = z_mrsh_device_is_ready, + [K_SYSCALL_DEVICE_INIT] = z_mrsh_device_init, + [K_SYSCALL_K_THREAD_STACK_ALLOC] = z_mrsh_k_thread_stack_alloc, + [K_SYSCALL_K_THREAD_STACK_FREE] = z_mrsh_k_thread_stack_free, + [K_SYSCALL_K_THREAD_CREATE] = z_mrsh_k_thread_create, + [K_SYSCALL_K_THREAD_STACK_SPACE_GET] = z_mrsh_k_thread_stack_space_get, + [K_SYSCALL_K_THREAD_JOIN] = z_mrsh_k_thread_join, + [K_SYSCALL_K_SLEEP] = z_mrsh_k_sleep, + [K_SYSCALL_K_USLEEP] = z_mrsh_k_usleep, + [K_SYSCALL_K_BUSY_WAIT] = z_mrsh_k_busy_wait, + [K_SYSCALL_K_YIELD] = z_mrsh_k_yield, + [K_SYSCALL_K_WAKEUP] = z_mrsh_k_wakeup, + [K_SYSCALL_K_SCHED_CURRENT_THREAD_QUERY] = z_mrsh_k_sched_current_thread_query, + [K_SYSCALL_K_THREAD_ABORT] = z_mrsh_k_thread_abort, + [K_SYSCALL_K_THREAD_START] = z_mrsh_k_thread_start, + [K_SYSCALL_K_THREAD_TIMEOUT_EXPIRES_TICKS] = z_mrsh_k_thread_timeout_expires_ticks, + [K_SYSCALL_K_THREAD_TIMEOUT_REMAINING_TICKS] = z_mrsh_k_thread_timeout_remaining_ticks, + [K_SYSCALL_K_THREAD_PRIORITY_GET] = z_mrsh_k_thread_priority_get, + [K_SYSCALL_K_THREAD_PRIORITY_SET] = z_mrsh_k_thread_priority_set, + [K_SYSCALL_K_THREAD_DEADLINE_SET] = z_mrsh_k_thread_deadline_set, + [K_SYSCALL_K_THREAD_SUSPEND] = z_mrsh_k_thread_suspend, + [K_SYSCALL_K_THREAD_RESUME] = z_mrsh_k_thread_resume, + [K_SYSCALL_K_IS_PREEMPT_THREAD] = z_mrsh_k_is_preempt_thread, + [K_SYSCALL_K_THREAD_CUSTOM_DATA_SET] = z_mrsh_k_thread_custom_data_set, + [K_SYSCALL_K_THREAD_CUSTOM_DATA_GET] = z_mrsh_k_thread_custom_data_get, + [K_SYSCALL_K_THREAD_NAME_SET] = z_mrsh_k_thread_name_set, + [K_SYSCALL_K_THREAD_NAME_COPY] = z_mrsh_k_thread_name_copy, + [K_SYSCALL_K_TIMER_START] = z_mrsh_k_timer_start, + [K_SYSCALL_K_TIMER_STOP] = z_mrsh_k_timer_stop, + [K_SYSCALL_K_TIMER_STATUS_GET] = z_mrsh_k_timer_status_get, + [K_SYSCALL_K_TIMER_STATUS_SYNC] = z_mrsh_k_timer_status_sync, + [K_SYSCALL_K_TIMER_EXPIRES_TICKS] = z_mrsh_k_timer_expires_ticks, + [K_SYSCALL_K_TIMER_REMAINING_TICKS] = z_mrsh_k_timer_remaining_ticks, + [K_SYSCALL_K_TIMER_USER_DATA_SET] = z_mrsh_k_timer_user_data_set, + [K_SYSCALL_K_TIMER_USER_DATA_GET] = z_mrsh_k_timer_user_data_get, + [K_SYSCALL_K_UPTIME_TICKS] = z_mrsh_k_uptime_ticks, + [K_SYSCALL_K_QUEUE_INIT] = z_mrsh_k_queue_init, + [K_SYSCALL_K_QUEUE_CANCEL_WAIT] = z_mrsh_k_queue_cancel_wait, + [K_SYSCALL_K_QUEUE_ALLOC_APPEND] = z_mrsh_k_queue_alloc_append, + [K_SYSCALL_K_QUEUE_ALLOC_PREPEND] = z_mrsh_k_queue_alloc_prepend, + [K_SYSCALL_K_QUEUE_GET] = z_mrsh_k_queue_get, + [K_SYSCALL_K_QUEUE_IS_EMPTY] = z_mrsh_k_queue_is_empty, + [K_SYSCALL_K_QUEUE_PEEK_HEAD] = z_mrsh_k_queue_peek_head, + [K_SYSCALL_K_QUEUE_PEEK_TAIL] = z_mrsh_k_queue_peek_tail, + [K_SYSCALL_K_FUTEX_WAIT] = z_mrsh_k_futex_wait, + [K_SYSCALL_K_FUTEX_WAKE] = z_mrsh_k_futex_wake, + [K_SYSCALL_K_EVENT_INIT] = z_mrsh_k_event_init, + [K_SYSCALL_K_EVENT_POST] = z_mrsh_k_event_post, + [K_SYSCALL_K_EVENT_SET] = z_mrsh_k_event_set, + [K_SYSCALL_K_EVENT_SET_MASKED] = z_mrsh_k_event_set_masked, + [K_SYSCALL_K_EVENT_CLEAR] = z_mrsh_k_event_clear, + [K_SYSCALL_K_EVENT_WAIT] = z_mrsh_k_event_wait, + [K_SYSCALL_K_EVENT_WAIT_ALL] = z_mrsh_k_event_wait_all, + [K_SYSCALL_K_STACK_ALLOC_INIT] = z_mrsh_k_stack_alloc_init, + [K_SYSCALL_K_STACK_PUSH] = z_mrsh_k_stack_push, + [K_SYSCALL_K_STACK_POP] = z_mrsh_k_stack_pop, + [K_SYSCALL_K_MUTEX_INIT] = z_mrsh_k_mutex_init, + [K_SYSCALL_K_MUTEX_LOCK] = z_mrsh_k_mutex_lock, + [K_SYSCALL_K_MUTEX_UNLOCK] = z_mrsh_k_mutex_unlock, + [K_SYSCALL_K_CONDVAR_INIT] = z_mrsh_k_condvar_init, + [K_SYSCALL_K_CONDVAR_SIGNAL] = z_mrsh_k_condvar_signal, + [K_SYSCALL_K_CONDVAR_BROADCAST] = z_mrsh_k_condvar_broadcast, + [K_SYSCALL_K_CONDVAR_WAIT] = z_mrsh_k_condvar_wait, + [K_SYSCALL_K_SEM_INIT] = z_mrsh_k_sem_init, + [K_SYSCALL_K_SEM_TAKE] = z_mrsh_k_sem_take, + [K_SYSCALL_K_SEM_GIVE] = z_mrsh_k_sem_give, + [K_SYSCALL_K_SEM_RESET] = z_mrsh_k_sem_reset, + [K_SYSCALL_K_SEM_COUNT_GET] = z_mrsh_k_sem_count_get, + [K_SYSCALL_K_MSGQ_ALLOC_INIT] = z_mrsh_k_msgq_alloc_init, + [K_SYSCALL_K_MSGQ_PUT] = z_mrsh_k_msgq_put, + [K_SYSCALL_K_MSGQ_GET] = z_mrsh_k_msgq_get, + [K_SYSCALL_K_MSGQ_PEEK] = z_mrsh_k_msgq_peek, + [K_SYSCALL_K_MSGQ_PEEK_AT] = z_mrsh_k_msgq_peek_at, + [K_SYSCALL_K_MSGQ_PURGE] = z_mrsh_k_msgq_purge, + [K_SYSCALL_K_MSGQ_NUM_FREE_GET] = z_mrsh_k_msgq_num_free_get, + [K_SYSCALL_K_MSGQ_GET_ATTRS] = z_mrsh_k_msgq_get_attrs, + [K_SYSCALL_K_MSGQ_NUM_USED_GET] = z_mrsh_k_msgq_num_used_get, + [K_SYSCALL_K_PIPE_ALLOC_INIT] = z_mrsh_k_pipe_alloc_init, + [K_SYSCALL_K_PIPE_PUT] = z_mrsh_k_pipe_put, + [K_SYSCALL_K_PIPE_GET] = z_mrsh_k_pipe_get, + [K_SYSCALL_K_PIPE_READ_AVAIL] = z_mrsh_k_pipe_read_avail, + [K_SYSCALL_K_PIPE_WRITE_AVAIL] = z_mrsh_k_pipe_write_avail, + [K_SYSCALL_K_PIPE_FLUSH] = z_mrsh_k_pipe_flush, + [K_SYSCALL_K_PIPE_BUFFER_FLUSH] = z_mrsh_k_pipe_buffer_flush, + [K_SYSCALL_K_POLL] = z_mrsh_k_poll, + [K_SYSCALL_K_POLL_SIGNAL_INIT] = z_mrsh_k_poll_signal_init, + [K_SYSCALL_K_POLL_SIGNAL_RESET] = z_mrsh_k_poll_signal_reset, + [K_SYSCALL_K_POLL_SIGNAL_CHECK] = z_mrsh_k_poll_signal_check, + [K_SYSCALL_K_POLL_SIGNAL_RAISE] = z_mrsh_k_poll_signal_raise, + [K_SYSCALL_K_STR_OUT] = z_mrsh_k_str_out, + [K_SYSCALL_K_FLOAT_DISABLE] = z_mrsh_k_float_disable, + [K_SYSCALL_K_FLOAT_ENABLE] = z_mrsh_k_float_enable, + [K_SYSCALL_K_OBJECT_ACCESS_GRANT] = z_mrsh_k_object_access_grant, + [K_SYSCALL_K_OBJECT_RELEASE] = z_mrsh_k_object_release, + [K_SYSCALL_K_OBJECT_ALLOC] = z_mrsh_k_object_alloc, + [K_SYSCALL_K_OBJECT_ALLOC_SIZE] = z_mrsh_k_object_alloc_size, + [K_SYSCALL_SYS_CLOCK_HW_CYCLES_PER_SEC_RUNTIME_GET] = z_mrsh_sys_clock_hw_cycles_per_sec_runtime_get, + [K_SYSCALL_Z_ERRNO] = z_mrsh_z_errno, + [K_SYSCALL_BAD] = handler_bad_syscall +}; diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/syscall_export_llext.c b/nrfdemo/build/mcuboot/zephyr/include/generated/syscall_export_llext.c new file mode 100644 index 0000000..df8d3fb --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/syscall_export_llext.c @@ -0,0 +1,329 @@ + +/* Export syscalls for extensions */ +static void * const no_handler = NULL; + +/* Weak references, if something is not found by the linker, it will be NULL + * and simply fail during extension load + */ +extern __weak ALIAS_OF(no_handler) void * const z_impl_zephyr_read_stdin; +extern __weak ALIAS_OF(no_handler) void * const z_impl_zephyr_write_stdout; +extern __weak ALIAS_OF(no_handler) void * const z_impl_zephyr_fputc; +extern __weak ALIAS_OF(no_handler) void * const z_impl_zephyr_fwrite; +extern __weak ALIAS_OF(no_handler) void * const z_impl___posix_clock_get_base; +extern __weak ALIAS_OF(no_handler) void * const z_impl_z_sys_mutex_kernel_lock; +extern __weak ALIAS_OF(no_handler) void * const z_impl_z_sys_mutex_kernel_unlock; +extern __weak ALIAS_OF(no_handler) void * const z_impl_z_log_msg_simple_create_0; +extern __weak ALIAS_OF(no_handler) void * const z_impl_z_log_msg_simple_create_1; +extern __weak ALIAS_OF(no_handler) void * const z_impl_z_log_msg_simple_create_2; +extern __weak ALIAS_OF(no_handler) void * const z_impl_z_log_msg_static_create; +extern __weak ALIAS_OF(no_handler) void * const z_impl_log_panic; +extern __weak ALIAS_OF(no_handler) void * const z_impl_log_process; +extern __weak ALIAS_OF(no_handler) void * const z_impl_log_buffered_cnt; +extern __weak ALIAS_OF(no_handler) void * const z_impl_log_filter_set; +extern __weak ALIAS_OF(no_handler) void * const z_impl_log_frontend_filter_set; +extern __weak ALIAS_OF(no_handler) void * const z_impl_flash_read; +extern __weak ALIAS_OF(no_handler) void * const z_impl_flash_write; +extern __weak ALIAS_OF(no_handler) void * const z_impl_flash_erase; +extern __weak ALIAS_OF(no_handler) void * const z_impl_flash_get_page_info_by_offs; +extern __weak ALIAS_OF(no_handler) void * const z_impl_flash_get_page_info_by_idx; +extern __weak ALIAS_OF(no_handler) void * const z_impl_flash_get_page_count; +extern __weak ALIAS_OF(no_handler) void * const z_impl_flash_sfdp_read; +extern __weak ALIAS_OF(no_handler) void * const z_impl_flash_read_jedec_id; +extern __weak ALIAS_OF(no_handler) void * const z_impl_flash_get_write_block_size; +extern __weak ALIAS_OF(no_handler) void * const z_impl_flash_get_parameters; +extern __weak ALIAS_OF(no_handler) void * const z_impl_flash_ex_op; +extern __weak ALIAS_OF(no_handler) void * const z_impl_gpio_pin_interrupt_configure; +extern __weak ALIAS_OF(no_handler) void * const z_impl_gpio_pin_configure; +extern __weak ALIAS_OF(no_handler) void * const z_impl_gpio_port_get_direction; +extern __weak ALIAS_OF(no_handler) void * const z_impl_gpio_pin_get_config; +extern __weak ALIAS_OF(no_handler) void * const z_impl_gpio_port_get_raw; +extern __weak ALIAS_OF(no_handler) void * const z_impl_gpio_port_set_masked_raw; +extern __weak ALIAS_OF(no_handler) void * const z_impl_gpio_port_set_bits_raw; +extern __weak ALIAS_OF(no_handler) void * const z_impl_gpio_port_clear_bits_raw; +extern __weak ALIAS_OF(no_handler) void * const z_impl_gpio_port_toggle_bits; +extern __weak ALIAS_OF(no_handler) void * const z_impl_gpio_get_pending_int; +extern __weak ALIAS_OF(no_handler) void * const z_impl_uart_err_check; +extern __weak ALIAS_OF(no_handler) void * const z_impl_uart_poll_in; +extern __weak ALIAS_OF(no_handler) void * const z_impl_uart_poll_in_u16; +extern __weak ALIAS_OF(no_handler) void * const z_impl_uart_poll_out; +extern __weak ALIAS_OF(no_handler) void * const z_impl_uart_poll_out_u16; +extern __weak ALIAS_OF(no_handler) void * const z_impl_uart_configure; +extern __weak ALIAS_OF(no_handler) void * const z_impl_uart_config_get; +extern __weak ALIAS_OF(no_handler) void * const z_impl_uart_irq_tx_enable; +extern __weak ALIAS_OF(no_handler) void * const z_impl_uart_irq_tx_disable; +extern __weak ALIAS_OF(no_handler) void * const z_impl_uart_irq_rx_enable; +extern __weak ALIAS_OF(no_handler) void * const z_impl_uart_irq_rx_disable; +extern __weak ALIAS_OF(no_handler) void * const z_impl_uart_irq_err_enable; +extern __weak ALIAS_OF(no_handler) void * const z_impl_uart_irq_err_disable; +extern __weak ALIAS_OF(no_handler) void * const z_impl_uart_irq_is_pending; +extern __weak ALIAS_OF(no_handler) void * const z_impl_uart_irq_update; +extern __weak ALIAS_OF(no_handler) void * const z_impl_uart_tx; +extern __weak ALIAS_OF(no_handler) void * const z_impl_uart_tx_u16; +extern __weak ALIAS_OF(no_handler) void * const z_impl_uart_tx_abort; +extern __weak ALIAS_OF(no_handler) void * const z_impl_uart_rx_enable; +extern __weak ALIAS_OF(no_handler) void * const z_impl_uart_rx_enable_u16; +extern __weak ALIAS_OF(no_handler) void * const z_impl_uart_rx_disable; +extern __weak ALIAS_OF(no_handler) void * const z_impl_uart_line_ctrl_set; +extern __weak ALIAS_OF(no_handler) void * const z_impl_uart_line_ctrl_get; +extern __weak ALIAS_OF(no_handler) void * const z_impl_uart_drv_cmd; +extern __weak ALIAS_OF(no_handler) void * const z_impl_device_get_binding; +extern __weak ALIAS_OF(no_handler) void * const z_impl_device_is_ready; +extern __weak ALIAS_OF(no_handler) void * const z_impl_device_init; +extern __weak ALIAS_OF(no_handler) void * const z_impl_k_thread_stack_alloc; +extern __weak ALIAS_OF(no_handler) void * const z_impl_k_thread_stack_free; +extern __weak ALIAS_OF(no_handler) void * const z_impl_k_thread_create; +extern __weak ALIAS_OF(no_handler) void * const z_impl_k_thread_stack_space_get; +extern __weak ALIAS_OF(no_handler) void * const z_impl_k_thread_join; +extern __weak ALIAS_OF(no_handler) void * const z_impl_k_sleep; +extern __weak ALIAS_OF(no_handler) void * const z_impl_k_usleep; +extern __weak ALIAS_OF(no_handler) void * const z_impl_k_busy_wait; +extern __weak ALIAS_OF(no_handler) void * const z_impl_k_yield; +extern __weak ALIAS_OF(no_handler) void * const z_impl_k_wakeup; +extern __weak ALIAS_OF(no_handler) void * const z_impl_k_sched_current_thread_query; +extern __weak ALIAS_OF(no_handler) void * const z_impl_k_thread_abort; +extern __weak ALIAS_OF(no_handler) void * const z_impl_k_thread_start; +extern __weak ALIAS_OF(no_handler) void * const z_impl_k_thread_timeout_expires_ticks; +extern __weak ALIAS_OF(no_handler) void * const z_impl_k_thread_timeout_remaining_ticks; +extern __weak ALIAS_OF(no_handler) void * const z_impl_k_thread_priority_get; +extern __weak ALIAS_OF(no_handler) void * const z_impl_k_thread_priority_set; +extern __weak ALIAS_OF(no_handler) void * const z_impl_k_thread_deadline_set; +extern __weak ALIAS_OF(no_handler) void * const z_impl_k_thread_suspend; +extern __weak ALIAS_OF(no_handler) void * const z_impl_k_thread_resume; +extern __weak ALIAS_OF(no_handler) void * const z_impl_k_is_preempt_thread; +extern __weak ALIAS_OF(no_handler) void * const z_impl_k_thread_custom_data_set; +extern __weak ALIAS_OF(no_handler) void * const z_impl_k_thread_custom_data_get; +extern __weak ALIAS_OF(no_handler) void * const z_impl_k_thread_name_set; +extern __weak ALIAS_OF(no_handler) void * const z_impl_k_thread_name_copy; +extern __weak ALIAS_OF(no_handler) void * const z_impl_k_timer_start; +extern __weak ALIAS_OF(no_handler) void * const z_impl_k_timer_stop; +extern __weak ALIAS_OF(no_handler) void * const z_impl_k_timer_status_get; +extern __weak ALIAS_OF(no_handler) void * const z_impl_k_timer_status_sync; +extern __weak ALIAS_OF(no_handler) void * const z_impl_k_timer_expires_ticks; +extern __weak ALIAS_OF(no_handler) void * const z_impl_k_timer_remaining_ticks; +extern __weak ALIAS_OF(no_handler) void * const z_impl_k_timer_user_data_set; +extern __weak ALIAS_OF(no_handler) void * const z_impl_k_timer_user_data_get; +extern __weak ALIAS_OF(no_handler) void * const z_impl_k_uptime_ticks; +extern __weak ALIAS_OF(no_handler) void * const z_impl_k_queue_init; +extern __weak ALIAS_OF(no_handler) void * const z_impl_k_queue_cancel_wait; +extern __weak ALIAS_OF(no_handler) void * const z_impl_k_queue_alloc_append; +extern __weak ALIAS_OF(no_handler) void * const z_impl_k_queue_alloc_prepend; +extern __weak ALIAS_OF(no_handler) void * const z_impl_k_queue_get; +extern __weak ALIAS_OF(no_handler) void * const z_impl_k_queue_is_empty; +extern __weak ALIAS_OF(no_handler) void * const z_impl_k_queue_peek_head; +extern __weak ALIAS_OF(no_handler) void * const z_impl_k_queue_peek_tail; +extern __weak ALIAS_OF(no_handler) void * const z_impl_k_futex_wait; +extern __weak ALIAS_OF(no_handler) void * const z_impl_k_futex_wake; +extern __weak ALIAS_OF(no_handler) void * const z_impl_k_event_init; +extern __weak ALIAS_OF(no_handler) void * const z_impl_k_event_post; +extern __weak ALIAS_OF(no_handler) void * const z_impl_k_event_set; +extern __weak ALIAS_OF(no_handler) void * const z_impl_k_event_set_masked; +extern __weak ALIAS_OF(no_handler) void * const z_impl_k_event_clear; +extern __weak ALIAS_OF(no_handler) void * const z_impl_k_event_wait; +extern __weak ALIAS_OF(no_handler) void * const z_impl_k_event_wait_all; +extern __weak ALIAS_OF(no_handler) void * const z_impl_k_stack_alloc_init; +extern __weak ALIAS_OF(no_handler) void * const z_impl_k_stack_push; +extern __weak ALIAS_OF(no_handler) void * const z_impl_k_stack_pop; +extern __weak ALIAS_OF(no_handler) void * const z_impl_k_mutex_init; +extern __weak ALIAS_OF(no_handler) void * const z_impl_k_mutex_lock; +extern __weak ALIAS_OF(no_handler) void * const z_impl_k_mutex_unlock; +extern __weak ALIAS_OF(no_handler) void * const z_impl_k_condvar_init; +extern __weak ALIAS_OF(no_handler) void * const z_impl_k_condvar_signal; +extern __weak ALIAS_OF(no_handler) void * const z_impl_k_condvar_broadcast; +extern __weak ALIAS_OF(no_handler) void * const z_impl_k_condvar_wait; +extern __weak ALIAS_OF(no_handler) void * const z_impl_k_sem_init; +extern __weak ALIAS_OF(no_handler) void * const z_impl_k_sem_take; +extern __weak ALIAS_OF(no_handler) void * const z_impl_k_sem_give; +extern __weak ALIAS_OF(no_handler) void * const z_impl_k_sem_reset; +extern __weak ALIAS_OF(no_handler) void * const z_impl_k_sem_count_get; +extern __weak ALIAS_OF(no_handler) void * const z_impl_k_msgq_alloc_init; +extern __weak ALIAS_OF(no_handler) void * const z_impl_k_msgq_put; +extern __weak ALIAS_OF(no_handler) void * const z_impl_k_msgq_get; +extern __weak ALIAS_OF(no_handler) void * const z_impl_k_msgq_peek; +extern __weak ALIAS_OF(no_handler) void * const z_impl_k_msgq_peek_at; +extern __weak ALIAS_OF(no_handler) void * const z_impl_k_msgq_purge; +extern __weak ALIAS_OF(no_handler) void * const z_impl_k_msgq_num_free_get; +extern __weak ALIAS_OF(no_handler) void * const z_impl_k_msgq_get_attrs; +extern __weak ALIAS_OF(no_handler) void * const z_impl_k_msgq_num_used_get; +extern __weak ALIAS_OF(no_handler) void * const z_impl_k_pipe_alloc_init; +extern __weak ALIAS_OF(no_handler) void * const z_impl_k_pipe_put; +extern __weak ALIAS_OF(no_handler) void * const z_impl_k_pipe_get; +extern __weak ALIAS_OF(no_handler) void * const z_impl_k_pipe_read_avail; +extern __weak ALIAS_OF(no_handler) void * const z_impl_k_pipe_write_avail; +extern __weak ALIAS_OF(no_handler) void * const z_impl_k_pipe_flush; +extern __weak ALIAS_OF(no_handler) void * const z_impl_k_pipe_buffer_flush; +extern __weak ALIAS_OF(no_handler) void * const z_impl_k_poll; +extern __weak ALIAS_OF(no_handler) void * const z_impl_k_poll_signal_init; +extern __weak ALIAS_OF(no_handler) void * const z_impl_k_poll_signal_reset; +extern __weak ALIAS_OF(no_handler) void * const z_impl_k_poll_signal_check; +extern __weak ALIAS_OF(no_handler) void * const z_impl_k_poll_signal_raise; +extern __weak ALIAS_OF(no_handler) void * const z_impl_k_str_out; +extern __weak ALIAS_OF(no_handler) void * const z_impl_k_float_disable; +extern __weak ALIAS_OF(no_handler) void * const z_impl_k_float_enable; +extern __weak ALIAS_OF(no_handler) void * const z_impl_k_object_access_grant; +extern __weak ALIAS_OF(no_handler) void * const z_impl_k_object_release; +extern __weak ALIAS_OF(no_handler) void * const z_impl_k_object_alloc; +extern __weak ALIAS_OF(no_handler) void * const z_impl_k_object_alloc_size; +extern __weak ALIAS_OF(no_handler) void * const z_impl_sys_clock_hw_cycles_per_sec_runtime_get; +extern __weak ALIAS_OF(no_handler) void * const z_impl_z_errno; + +/* Exported symbols */ +EXPORT_SYMBOL(z_impl_zephyr_read_stdin); +EXPORT_SYMBOL(z_impl_zephyr_write_stdout); +EXPORT_SYMBOL(z_impl_zephyr_fputc); +EXPORT_SYMBOL(z_impl_zephyr_fwrite); +EXPORT_SYMBOL(z_impl___posix_clock_get_base); +EXPORT_SYMBOL(z_impl_z_sys_mutex_kernel_lock); +EXPORT_SYMBOL(z_impl_z_sys_mutex_kernel_unlock); +EXPORT_SYMBOL(z_impl_z_log_msg_simple_create_0); +EXPORT_SYMBOL(z_impl_z_log_msg_simple_create_1); +EXPORT_SYMBOL(z_impl_z_log_msg_simple_create_2); +EXPORT_SYMBOL(z_impl_z_log_msg_static_create); +EXPORT_SYMBOL(z_impl_log_panic); +EXPORT_SYMBOL(z_impl_log_process); +EXPORT_SYMBOL(z_impl_log_buffered_cnt); +EXPORT_SYMBOL(z_impl_log_filter_set); +EXPORT_SYMBOL(z_impl_log_frontend_filter_set); +EXPORT_SYMBOL(z_impl_flash_read); +EXPORT_SYMBOL(z_impl_flash_write); +EXPORT_SYMBOL(z_impl_flash_erase); +EXPORT_SYMBOL(z_impl_flash_get_page_info_by_offs); +EXPORT_SYMBOL(z_impl_flash_get_page_info_by_idx); +EXPORT_SYMBOL(z_impl_flash_get_page_count); +EXPORT_SYMBOL(z_impl_flash_sfdp_read); +EXPORT_SYMBOL(z_impl_flash_read_jedec_id); +EXPORT_SYMBOL(z_impl_flash_get_write_block_size); +EXPORT_SYMBOL(z_impl_flash_get_parameters); +EXPORT_SYMBOL(z_impl_flash_ex_op); +EXPORT_SYMBOL(z_impl_gpio_pin_interrupt_configure); +EXPORT_SYMBOL(z_impl_gpio_pin_configure); +EXPORT_SYMBOL(z_impl_gpio_port_get_direction); +EXPORT_SYMBOL(z_impl_gpio_pin_get_config); +EXPORT_SYMBOL(z_impl_gpio_port_get_raw); +EXPORT_SYMBOL(z_impl_gpio_port_set_masked_raw); +EXPORT_SYMBOL(z_impl_gpio_port_set_bits_raw); +EXPORT_SYMBOL(z_impl_gpio_port_clear_bits_raw); +EXPORT_SYMBOL(z_impl_gpio_port_toggle_bits); +EXPORT_SYMBOL(z_impl_gpio_get_pending_int); +EXPORT_SYMBOL(z_impl_uart_err_check); +EXPORT_SYMBOL(z_impl_uart_poll_in); +EXPORT_SYMBOL(z_impl_uart_poll_in_u16); +EXPORT_SYMBOL(z_impl_uart_poll_out); +EXPORT_SYMBOL(z_impl_uart_poll_out_u16); +EXPORT_SYMBOL(z_impl_uart_configure); +EXPORT_SYMBOL(z_impl_uart_config_get); +EXPORT_SYMBOL(z_impl_uart_irq_tx_enable); +EXPORT_SYMBOL(z_impl_uart_irq_tx_disable); +EXPORT_SYMBOL(z_impl_uart_irq_rx_enable); +EXPORT_SYMBOL(z_impl_uart_irq_rx_disable); +EXPORT_SYMBOL(z_impl_uart_irq_err_enable); +EXPORT_SYMBOL(z_impl_uart_irq_err_disable); +EXPORT_SYMBOL(z_impl_uart_irq_is_pending); +EXPORT_SYMBOL(z_impl_uart_irq_update); +EXPORT_SYMBOL(z_impl_uart_tx); +EXPORT_SYMBOL(z_impl_uart_tx_u16); +EXPORT_SYMBOL(z_impl_uart_tx_abort); +EXPORT_SYMBOL(z_impl_uart_rx_enable); +EXPORT_SYMBOL(z_impl_uart_rx_enable_u16); +EXPORT_SYMBOL(z_impl_uart_rx_disable); +EXPORT_SYMBOL(z_impl_uart_line_ctrl_set); +EXPORT_SYMBOL(z_impl_uart_line_ctrl_get); +EXPORT_SYMBOL(z_impl_uart_drv_cmd); +EXPORT_SYMBOL(z_impl_device_get_binding); +EXPORT_SYMBOL(z_impl_device_is_ready); +EXPORT_SYMBOL(z_impl_device_init); +EXPORT_SYMBOL(z_impl_k_thread_stack_alloc); +EXPORT_SYMBOL(z_impl_k_thread_stack_free); +EXPORT_SYMBOL(z_impl_k_thread_create); +EXPORT_SYMBOL(z_impl_k_thread_stack_space_get); +EXPORT_SYMBOL(z_impl_k_thread_join); +EXPORT_SYMBOL(z_impl_k_sleep); +EXPORT_SYMBOL(z_impl_k_usleep); +EXPORT_SYMBOL(z_impl_k_busy_wait); +EXPORT_SYMBOL(z_impl_k_yield); +EXPORT_SYMBOL(z_impl_k_wakeup); +EXPORT_SYMBOL(z_impl_k_sched_current_thread_query); +EXPORT_SYMBOL(z_impl_k_thread_abort); +EXPORT_SYMBOL(z_impl_k_thread_start); +EXPORT_SYMBOL(z_impl_k_thread_timeout_expires_ticks); +EXPORT_SYMBOL(z_impl_k_thread_timeout_remaining_ticks); +EXPORT_SYMBOL(z_impl_k_thread_priority_get); +EXPORT_SYMBOL(z_impl_k_thread_priority_set); +EXPORT_SYMBOL(z_impl_k_thread_deadline_set); +EXPORT_SYMBOL(z_impl_k_thread_suspend); +EXPORT_SYMBOL(z_impl_k_thread_resume); +EXPORT_SYMBOL(z_impl_k_is_preempt_thread); +EXPORT_SYMBOL(z_impl_k_thread_custom_data_set); +EXPORT_SYMBOL(z_impl_k_thread_custom_data_get); +EXPORT_SYMBOL(z_impl_k_thread_name_set); +EXPORT_SYMBOL(z_impl_k_thread_name_copy); +EXPORT_SYMBOL(z_impl_k_timer_start); +EXPORT_SYMBOL(z_impl_k_timer_stop); +EXPORT_SYMBOL(z_impl_k_timer_status_get); +EXPORT_SYMBOL(z_impl_k_timer_status_sync); +EXPORT_SYMBOL(z_impl_k_timer_expires_ticks); +EXPORT_SYMBOL(z_impl_k_timer_remaining_ticks); +EXPORT_SYMBOL(z_impl_k_timer_user_data_set); +EXPORT_SYMBOL(z_impl_k_timer_user_data_get); +EXPORT_SYMBOL(z_impl_k_uptime_ticks); +EXPORT_SYMBOL(z_impl_k_queue_init); +EXPORT_SYMBOL(z_impl_k_queue_cancel_wait); +EXPORT_SYMBOL(z_impl_k_queue_alloc_append); +EXPORT_SYMBOL(z_impl_k_queue_alloc_prepend); +EXPORT_SYMBOL(z_impl_k_queue_get); +EXPORT_SYMBOL(z_impl_k_queue_is_empty); +EXPORT_SYMBOL(z_impl_k_queue_peek_head); +EXPORT_SYMBOL(z_impl_k_queue_peek_tail); +EXPORT_SYMBOL(z_impl_k_futex_wait); +EXPORT_SYMBOL(z_impl_k_futex_wake); +EXPORT_SYMBOL(z_impl_k_event_init); +EXPORT_SYMBOL(z_impl_k_event_post); +EXPORT_SYMBOL(z_impl_k_event_set); +EXPORT_SYMBOL(z_impl_k_event_set_masked); +EXPORT_SYMBOL(z_impl_k_event_clear); +EXPORT_SYMBOL(z_impl_k_event_wait); +EXPORT_SYMBOL(z_impl_k_event_wait_all); +EXPORT_SYMBOL(z_impl_k_stack_alloc_init); +EXPORT_SYMBOL(z_impl_k_stack_push); +EXPORT_SYMBOL(z_impl_k_stack_pop); +EXPORT_SYMBOL(z_impl_k_mutex_init); +EXPORT_SYMBOL(z_impl_k_mutex_lock); +EXPORT_SYMBOL(z_impl_k_mutex_unlock); +EXPORT_SYMBOL(z_impl_k_condvar_init); +EXPORT_SYMBOL(z_impl_k_condvar_signal); +EXPORT_SYMBOL(z_impl_k_condvar_broadcast); +EXPORT_SYMBOL(z_impl_k_condvar_wait); +EXPORT_SYMBOL(z_impl_k_sem_init); +EXPORT_SYMBOL(z_impl_k_sem_take); +EXPORT_SYMBOL(z_impl_k_sem_give); +EXPORT_SYMBOL(z_impl_k_sem_reset); +EXPORT_SYMBOL(z_impl_k_sem_count_get); +EXPORT_SYMBOL(z_impl_k_msgq_alloc_init); +EXPORT_SYMBOL(z_impl_k_msgq_put); +EXPORT_SYMBOL(z_impl_k_msgq_get); +EXPORT_SYMBOL(z_impl_k_msgq_peek); +EXPORT_SYMBOL(z_impl_k_msgq_peek_at); +EXPORT_SYMBOL(z_impl_k_msgq_purge); +EXPORT_SYMBOL(z_impl_k_msgq_num_free_get); +EXPORT_SYMBOL(z_impl_k_msgq_get_attrs); +EXPORT_SYMBOL(z_impl_k_msgq_num_used_get); +EXPORT_SYMBOL(z_impl_k_pipe_alloc_init); +EXPORT_SYMBOL(z_impl_k_pipe_put); +EXPORT_SYMBOL(z_impl_k_pipe_get); +EXPORT_SYMBOL(z_impl_k_pipe_read_avail); +EXPORT_SYMBOL(z_impl_k_pipe_write_avail); +EXPORT_SYMBOL(z_impl_k_pipe_flush); +EXPORT_SYMBOL(z_impl_k_pipe_buffer_flush); +EXPORT_SYMBOL(z_impl_k_poll); +EXPORT_SYMBOL(z_impl_k_poll_signal_init); +EXPORT_SYMBOL(z_impl_k_poll_signal_reset); +EXPORT_SYMBOL(z_impl_k_poll_signal_check); +EXPORT_SYMBOL(z_impl_k_poll_signal_raise); +EXPORT_SYMBOL(z_impl_k_str_out); +EXPORT_SYMBOL(z_impl_k_float_disable); +EXPORT_SYMBOL(z_impl_k_float_enable); +EXPORT_SYMBOL(z_impl_k_object_access_grant); +EXPORT_SYMBOL(z_impl_k_object_release); +EXPORT_SYMBOL(z_impl_k_object_alloc); +EXPORT_SYMBOL(z_impl_k_object_alloc_size); +EXPORT_SYMBOL(z_impl_sys_clock_hw_cycles_per_sec_runtime_get); +EXPORT_SYMBOL(z_impl_z_errno); diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/syscall_list.h b/nrfdemo/build/mcuboot/zephyr/include/generated/syscall_list.h new file mode 100644 index 0000000..6082a2d --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/syscall_list.h @@ -0,0 +1,550 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef ZEPHYR_SYSCALL_LIST_H +#define ZEPHYR_SYSCALL_LIST_H + +#define K_SYSCALL_DEVICE_GET_BINDING 0 +#define K_SYSCALL_DEVICE_INIT 1 +#define K_SYSCALL_DEVICE_IS_READY 2 +#define K_SYSCALL_FLASH_ERASE 3 +#define K_SYSCALL_FLASH_EX_OP 4 +#define K_SYSCALL_FLASH_GET_PAGE_COUNT 5 +#define K_SYSCALL_FLASH_GET_PAGE_INFO_BY_IDX 6 +#define K_SYSCALL_FLASH_GET_PAGE_INFO_BY_OFFS 7 +#define K_SYSCALL_FLASH_GET_PARAMETERS 8 +#define K_SYSCALL_FLASH_GET_WRITE_BLOCK_SIZE 9 +#define K_SYSCALL_FLASH_READ 10 +#define K_SYSCALL_FLASH_READ_JEDEC_ID 11 +#define K_SYSCALL_FLASH_SFDP_READ 12 +#define K_SYSCALL_FLASH_WRITE 13 +#define K_SYSCALL_GPIO_GET_PENDING_INT 14 +#define K_SYSCALL_GPIO_PIN_CONFIGURE 15 +#define K_SYSCALL_GPIO_PIN_GET_CONFIG 16 +#define K_SYSCALL_GPIO_PIN_INTERRUPT_CONFIGURE 17 +#define K_SYSCALL_GPIO_PORT_CLEAR_BITS_RAW 18 +#define K_SYSCALL_GPIO_PORT_GET_DIRECTION 19 +#define K_SYSCALL_GPIO_PORT_GET_RAW 20 +#define K_SYSCALL_GPIO_PORT_SET_BITS_RAW 21 +#define K_SYSCALL_GPIO_PORT_SET_MASKED_RAW 22 +#define K_SYSCALL_GPIO_PORT_TOGGLE_BITS 23 +#define K_SYSCALL_K_BUSY_WAIT 24 +#define K_SYSCALL_K_CONDVAR_BROADCAST 25 +#define K_SYSCALL_K_CONDVAR_INIT 26 +#define K_SYSCALL_K_CONDVAR_SIGNAL 27 +#define K_SYSCALL_K_CONDVAR_WAIT 28 +#define K_SYSCALL_K_EVENT_CLEAR 29 +#define K_SYSCALL_K_EVENT_INIT 30 +#define K_SYSCALL_K_EVENT_POST 31 +#define K_SYSCALL_K_EVENT_SET 32 +#define K_SYSCALL_K_EVENT_SET_MASKED 33 +#define K_SYSCALL_K_EVENT_WAIT 34 +#define K_SYSCALL_K_EVENT_WAIT_ALL 35 +#define K_SYSCALL_K_FLOAT_DISABLE 36 +#define K_SYSCALL_K_FLOAT_ENABLE 37 +#define K_SYSCALL_K_FUTEX_WAIT 38 +#define K_SYSCALL_K_FUTEX_WAKE 39 +#define K_SYSCALL_K_IS_PREEMPT_THREAD 40 +#define K_SYSCALL_K_MSGQ_ALLOC_INIT 41 +#define K_SYSCALL_K_MSGQ_GET 42 +#define K_SYSCALL_K_MSGQ_GET_ATTRS 43 +#define K_SYSCALL_K_MSGQ_NUM_FREE_GET 44 +#define K_SYSCALL_K_MSGQ_NUM_USED_GET 45 +#define K_SYSCALL_K_MSGQ_PEEK 46 +#define K_SYSCALL_K_MSGQ_PEEK_AT 47 +#define K_SYSCALL_K_MSGQ_PURGE 48 +#define K_SYSCALL_K_MSGQ_PUT 49 +#define K_SYSCALL_K_MUTEX_INIT 50 +#define K_SYSCALL_K_MUTEX_LOCK 51 +#define K_SYSCALL_K_MUTEX_UNLOCK 52 +#define K_SYSCALL_K_OBJECT_ACCESS_GRANT 53 +#define K_SYSCALL_K_OBJECT_ALLOC 54 +#define K_SYSCALL_K_OBJECT_ALLOC_SIZE 55 +#define K_SYSCALL_K_OBJECT_RELEASE 56 +#define K_SYSCALL_K_PIPE_ALLOC_INIT 57 +#define K_SYSCALL_K_PIPE_BUFFER_FLUSH 58 +#define K_SYSCALL_K_PIPE_FLUSH 59 +#define K_SYSCALL_K_PIPE_GET 60 +#define K_SYSCALL_K_PIPE_PUT 61 +#define K_SYSCALL_K_PIPE_READ_AVAIL 62 +#define K_SYSCALL_K_PIPE_WRITE_AVAIL 63 +#define K_SYSCALL_K_POLL 64 +#define K_SYSCALL_K_POLL_SIGNAL_CHECK 65 +#define K_SYSCALL_K_POLL_SIGNAL_INIT 66 +#define K_SYSCALL_K_POLL_SIGNAL_RAISE 67 +#define K_SYSCALL_K_POLL_SIGNAL_RESET 68 +#define K_SYSCALL_K_QUEUE_ALLOC_APPEND 69 +#define K_SYSCALL_K_QUEUE_ALLOC_PREPEND 70 +#define K_SYSCALL_K_QUEUE_CANCEL_WAIT 71 +#define K_SYSCALL_K_QUEUE_GET 72 +#define K_SYSCALL_K_QUEUE_INIT 73 +#define K_SYSCALL_K_QUEUE_IS_EMPTY 74 +#define K_SYSCALL_K_QUEUE_PEEK_HEAD 75 +#define K_SYSCALL_K_QUEUE_PEEK_TAIL 76 +#define K_SYSCALL_K_SCHED_CURRENT_THREAD_QUERY 77 +#define K_SYSCALL_K_SEM_COUNT_GET 78 +#define K_SYSCALL_K_SEM_GIVE 79 +#define K_SYSCALL_K_SEM_INIT 80 +#define K_SYSCALL_K_SEM_RESET 81 +#define K_SYSCALL_K_SEM_TAKE 82 +#define K_SYSCALL_K_SLEEP 83 +#define K_SYSCALL_K_STACK_ALLOC_INIT 84 +#define K_SYSCALL_K_STACK_POP 85 +#define K_SYSCALL_K_STACK_PUSH 86 +#define K_SYSCALL_K_STR_OUT 87 +#define K_SYSCALL_K_THREAD_ABORT 88 +#define K_SYSCALL_K_THREAD_CREATE 89 +#define K_SYSCALL_K_THREAD_CUSTOM_DATA_GET 90 +#define K_SYSCALL_K_THREAD_CUSTOM_DATA_SET 91 +#define K_SYSCALL_K_THREAD_DEADLINE_SET 92 +#define K_SYSCALL_K_THREAD_JOIN 93 +#define K_SYSCALL_K_THREAD_NAME_COPY 94 +#define K_SYSCALL_K_THREAD_NAME_SET 95 +#define K_SYSCALL_K_THREAD_PRIORITY_GET 96 +#define K_SYSCALL_K_THREAD_PRIORITY_SET 97 +#define K_SYSCALL_K_THREAD_RESUME 98 +#define K_SYSCALL_K_THREAD_STACK_ALLOC 99 +#define K_SYSCALL_K_THREAD_STACK_FREE 100 +#define K_SYSCALL_K_THREAD_STACK_SPACE_GET 101 +#define K_SYSCALL_K_THREAD_START 102 +#define K_SYSCALL_K_THREAD_SUSPEND 103 +#define K_SYSCALL_K_THREAD_TIMEOUT_EXPIRES_TICKS 104 +#define K_SYSCALL_K_THREAD_TIMEOUT_REMAINING_TICKS 105 +#define K_SYSCALL_K_TIMER_EXPIRES_TICKS 106 +#define K_SYSCALL_K_TIMER_REMAINING_TICKS 107 +#define K_SYSCALL_K_TIMER_START 108 +#define K_SYSCALL_K_TIMER_STATUS_GET 109 +#define K_SYSCALL_K_TIMER_STATUS_SYNC 110 +#define K_SYSCALL_K_TIMER_STOP 111 +#define K_SYSCALL_K_TIMER_USER_DATA_GET 112 +#define K_SYSCALL_K_TIMER_USER_DATA_SET 113 +#define K_SYSCALL_K_UPTIME_TICKS 114 +#define K_SYSCALL_K_USLEEP 115 +#define K_SYSCALL_K_WAKEUP 116 +#define K_SYSCALL_K_YIELD 117 +#define K_SYSCALL_LOG_BUFFERED_CNT 118 +#define K_SYSCALL_LOG_FILTER_SET 119 +#define K_SYSCALL_LOG_FRONTEND_FILTER_SET 120 +#define K_SYSCALL_LOG_PANIC 121 +#define K_SYSCALL_LOG_PROCESS 122 +#define K_SYSCALL_SYS_CLOCK_HW_CYCLES_PER_SEC_RUNTIME_GET 123 +#define K_SYSCALL_UART_CONFIGURE 124 +#define K_SYSCALL_UART_CONFIG_GET 125 +#define K_SYSCALL_UART_DRV_CMD 126 +#define K_SYSCALL_UART_ERR_CHECK 127 +#define K_SYSCALL_UART_IRQ_ERR_DISABLE 128 +#define K_SYSCALL_UART_IRQ_ERR_ENABLE 129 +#define K_SYSCALL_UART_IRQ_IS_PENDING 130 +#define K_SYSCALL_UART_IRQ_RX_DISABLE 131 +#define K_SYSCALL_UART_IRQ_RX_ENABLE 132 +#define K_SYSCALL_UART_IRQ_TX_DISABLE 133 +#define K_SYSCALL_UART_IRQ_TX_ENABLE 134 +#define K_SYSCALL_UART_IRQ_UPDATE 135 +#define K_SYSCALL_UART_LINE_CTRL_GET 136 +#define K_SYSCALL_UART_LINE_CTRL_SET 137 +#define K_SYSCALL_UART_POLL_IN 138 +#define K_SYSCALL_UART_POLL_IN_U16 139 +#define K_SYSCALL_UART_POLL_OUT 140 +#define K_SYSCALL_UART_POLL_OUT_U16 141 +#define K_SYSCALL_UART_RX_DISABLE 142 +#define K_SYSCALL_UART_RX_ENABLE 143 +#define K_SYSCALL_UART_RX_ENABLE_U16 144 +#define K_SYSCALL_UART_TX 145 +#define K_SYSCALL_UART_TX_ABORT 146 +#define K_SYSCALL_UART_TX_U16 147 +#define K_SYSCALL_ZEPHYR_FPUTC 148 +#define K_SYSCALL_ZEPHYR_FWRITE 149 +#define K_SYSCALL_ZEPHYR_READ_STDIN 150 +#define K_SYSCALL_ZEPHYR_WRITE_STDOUT 151 +#define K_SYSCALL_Z_ERRNO 152 +#define K_SYSCALL_Z_LOG_MSG_SIMPLE_CREATE_0 153 +#define K_SYSCALL_Z_LOG_MSG_SIMPLE_CREATE_1 154 +#define K_SYSCALL_Z_LOG_MSG_SIMPLE_CREATE_2 155 +#define K_SYSCALL_Z_LOG_MSG_STATIC_CREATE 156 +#define K_SYSCALL_Z_SYS_MUTEX_KERNEL_LOCK 157 +#define K_SYSCALL_Z_SYS_MUTEX_KERNEL_UNLOCK 158 +#define K_SYSCALL___POSIX_CLOCK_GET_BASE 159 +#define K_SYSCALL_BAD 160 +#define K_SYSCALL_LIMIT 161 + + +/* Following syscalls are not used in image */ +#define K_SYSCALL_ADC_CHANNEL_SETUP 162 +#define K_SYSCALL_ADC_READ 163 +#define K_SYSCALL_ADC_READ_ASYNC 164 +#define K_SYSCALL_ATOMIC_ADD 165 +#define K_SYSCALL_ATOMIC_AND 166 +#define K_SYSCALL_ATOMIC_CAS 167 +#define K_SYSCALL_ATOMIC_NAND 168 +#define K_SYSCALL_ATOMIC_OR 169 +#define K_SYSCALL_ATOMIC_PTR_CAS 170 +#define K_SYSCALL_ATOMIC_PTR_SET 171 +#define K_SYSCALL_ATOMIC_SET 172 +#define K_SYSCALL_ATOMIC_SUB 173 +#define K_SYSCALL_ATOMIC_XOR 174 +#define K_SYSCALL_AUXDISPLAY_BACKLIGHT_GET 175 +#define K_SYSCALL_AUXDISPLAY_BACKLIGHT_SET 176 +#define K_SYSCALL_AUXDISPLAY_BRIGHTNESS_GET 177 +#define K_SYSCALL_AUXDISPLAY_BRIGHTNESS_SET 178 +#define K_SYSCALL_AUXDISPLAY_CAPABILITIES_GET 179 +#define K_SYSCALL_AUXDISPLAY_CLEAR 180 +#define K_SYSCALL_AUXDISPLAY_CURSOR_POSITION_GET 181 +#define K_SYSCALL_AUXDISPLAY_CURSOR_POSITION_SET 182 +#define K_SYSCALL_AUXDISPLAY_CURSOR_SET_ENABLED 183 +#define K_SYSCALL_AUXDISPLAY_CURSOR_SHIFT_SET 184 +#define K_SYSCALL_AUXDISPLAY_CUSTOM_CHARACTER_SET 185 +#define K_SYSCALL_AUXDISPLAY_CUSTOM_COMMAND 186 +#define K_SYSCALL_AUXDISPLAY_DISPLAY_OFF 187 +#define K_SYSCALL_AUXDISPLAY_DISPLAY_ON 188 +#define K_SYSCALL_AUXDISPLAY_DISPLAY_POSITION_GET 189 +#define K_SYSCALL_AUXDISPLAY_DISPLAY_POSITION_SET 190 +#define K_SYSCALL_AUXDISPLAY_IS_BUSY 191 +#define K_SYSCALL_AUXDISPLAY_POSITION_BLINKING_SET_ENABLED 192 +#define K_SYSCALL_AUXDISPLAY_WRITE 193 +#define K_SYSCALL_BBRAM_CHECK_INVALID 194 +#define K_SYSCALL_BBRAM_CHECK_POWER 195 +#define K_SYSCALL_BBRAM_CHECK_STANDBY_POWER 196 +#define K_SYSCALL_BBRAM_GET_SIZE 197 +#define K_SYSCALL_BBRAM_READ 198 +#define K_SYSCALL_BBRAM_WRITE 199 +#define K_SYSCALL_BC12_SET_RESULT_CB 200 +#define K_SYSCALL_BC12_SET_ROLE 201 +#define K_SYSCALL_CAN_ADD_RX_FILTER_MSGQ 202 +#define K_SYSCALL_CAN_CALC_TIMING 203 +#define K_SYSCALL_CAN_CALC_TIMING_DATA 204 +#define K_SYSCALL_CAN_GET_BITRATE_MAX 205 +#define K_SYSCALL_CAN_GET_BITRATE_MIN 206 +#define K_SYSCALL_CAN_GET_CAPABILITIES 207 +#define K_SYSCALL_CAN_GET_CORE_CLOCK 208 +#define K_SYSCALL_CAN_GET_MAX_FILTERS 209 +#define K_SYSCALL_CAN_GET_MODE 210 +#define K_SYSCALL_CAN_GET_STATE 211 +#define K_SYSCALL_CAN_GET_TIMING_DATA_MAX 212 +#define K_SYSCALL_CAN_GET_TIMING_DATA_MIN 213 +#define K_SYSCALL_CAN_GET_TIMING_MAX 214 +#define K_SYSCALL_CAN_GET_TIMING_MIN 215 +#define K_SYSCALL_CAN_GET_TRANSCEIVER 216 +#define K_SYSCALL_CAN_RECOVER 217 +#define K_SYSCALL_CAN_REMOVE_RX_FILTER 218 +#define K_SYSCALL_CAN_SEND 219 +#define K_SYSCALL_CAN_SET_BITRATE 220 +#define K_SYSCALL_CAN_SET_BITRATE_DATA 221 +#define K_SYSCALL_CAN_SET_MODE 222 +#define K_SYSCALL_CAN_SET_TIMING 223 +#define K_SYSCALL_CAN_SET_TIMING_DATA 224 +#define K_SYSCALL_CAN_START 225 +#define K_SYSCALL_CAN_STATS_GET_ACK_ERRORS 226 +#define K_SYSCALL_CAN_STATS_GET_BIT0_ERRORS 227 +#define K_SYSCALL_CAN_STATS_GET_BIT1_ERRORS 228 +#define K_SYSCALL_CAN_STATS_GET_BIT_ERRORS 229 +#define K_SYSCALL_CAN_STATS_GET_CRC_ERRORS 230 +#define K_SYSCALL_CAN_STATS_GET_FORM_ERRORS 231 +#define K_SYSCALL_CAN_STATS_GET_RX_OVERRUNS 232 +#define K_SYSCALL_CAN_STATS_GET_STUFF_ERRORS 233 +#define K_SYSCALL_CAN_STOP 234 +#define K_SYSCALL_CHARGER_CHARGE_ENABLE 235 +#define K_SYSCALL_CHARGER_GET_PROP 236 +#define K_SYSCALL_CHARGER_SET_PROP 237 +#define K_SYSCALL_COUNTER_CANCEL_CHANNEL_ALARM 238 +#define K_SYSCALL_COUNTER_GET_FREQUENCY 239 +#define K_SYSCALL_COUNTER_GET_GUARD_PERIOD 240 +#define K_SYSCALL_COUNTER_GET_MAX_TOP_VALUE 241 +#define K_SYSCALL_COUNTER_GET_NUM_OF_CHANNELS 242 +#define K_SYSCALL_COUNTER_GET_PENDING_INT 243 +#define K_SYSCALL_COUNTER_GET_TOP_VALUE 244 +#define K_SYSCALL_COUNTER_GET_VALUE 245 +#define K_SYSCALL_COUNTER_GET_VALUE_64 246 +#define K_SYSCALL_COUNTER_IS_COUNTING_UP 247 +#define K_SYSCALL_COUNTER_SET_CHANNEL_ALARM 248 +#define K_SYSCALL_COUNTER_SET_GUARD_PERIOD 249 +#define K_SYSCALL_COUNTER_SET_TOP_VALUE 250 +#define K_SYSCALL_COUNTER_START 251 +#define K_SYSCALL_COUNTER_STOP 252 +#define K_SYSCALL_COUNTER_TICKS_TO_US 253 +#define K_SYSCALL_COUNTER_US_TO_TICKS 254 +#define K_SYSCALL_DAC_CHANNEL_SETUP 255 +#define K_SYSCALL_DAC_WRITE_VALUE 256 +#define K_SYSCALL_DEVMUX_SELECT_GET 257 +#define K_SYSCALL_DEVMUX_SELECT_SET 258 +#define K_SYSCALL_DMA_CHAN_FILTER 259 +#define K_SYSCALL_DMA_RELEASE_CHANNEL 260 +#define K_SYSCALL_DMA_REQUEST_CHANNEL 261 +#define K_SYSCALL_DMA_RESUME 262 +#define K_SYSCALL_DMA_START 263 +#define K_SYSCALL_DMA_STOP 264 +#define K_SYSCALL_DMA_SUSPEND 265 +#define K_SYSCALL_EEPROM_GET_SIZE 266 +#define K_SYSCALL_EEPROM_READ 267 +#define K_SYSCALL_EEPROM_WRITE 268 +#define K_SYSCALL_EMUL_FUEL_GAUGE_IS_BATTERY_CUTOFF 269 +#define K_SYSCALL_EMUL_FUEL_GAUGE_SET_BATTERY_CHARGING 270 +#define K_SYSCALL_ENTROPY_GET_ENTROPY 271 +#define K_SYSCALL_ESPI_CONFIG 272 +#define K_SYSCALL_ESPI_FLASH_ERASE 273 +#define K_SYSCALL_ESPI_GET_CHANNEL_STATUS 274 +#define K_SYSCALL_ESPI_READ_FLASH 275 +#define K_SYSCALL_ESPI_READ_LPC_REQUEST 276 +#define K_SYSCALL_ESPI_READ_REQUEST 277 +#define K_SYSCALL_ESPI_RECEIVE_OOB 278 +#define K_SYSCALL_ESPI_RECEIVE_VWIRE 279 +#define K_SYSCALL_ESPI_SAF_ACTIVATE 280 +#define K_SYSCALL_ESPI_SAF_CONFIG 281 +#define K_SYSCALL_ESPI_SAF_FLASH_ERASE 282 +#define K_SYSCALL_ESPI_SAF_FLASH_READ 283 +#define K_SYSCALL_ESPI_SAF_FLASH_UNSUCCESS 284 +#define K_SYSCALL_ESPI_SAF_FLASH_WRITE 285 +#define K_SYSCALL_ESPI_SAF_GET_CHANNEL_STATUS 286 +#define K_SYSCALL_ESPI_SAF_SET_PROTECTION_REGIONS 287 +#define K_SYSCALL_ESPI_SEND_OOB 288 +#define K_SYSCALL_ESPI_SEND_VWIRE 289 +#define K_SYSCALL_ESPI_WRITE_FLASH 290 +#define K_SYSCALL_ESPI_WRITE_LPC_REQUEST 291 +#define K_SYSCALL_ESPI_WRITE_REQUEST 292 +#define K_SYSCALL_FLASH_SIMULATOR_GET_MEMORY 293 +#define K_SYSCALL_FUEL_GAUGE_BATTERY_CUTOFF 294 +#define K_SYSCALL_FUEL_GAUGE_GET_BUFFER_PROP 295 +#define K_SYSCALL_FUEL_GAUGE_GET_PROP 296 +#define K_SYSCALL_FUEL_GAUGE_GET_PROPS 297 +#define K_SYSCALL_FUEL_GAUGE_SET_PROP 298 +#define K_SYSCALL_FUEL_GAUGE_SET_PROPS 299 +#define K_SYSCALL_GNSS_GET_ENABLED_SYSTEMS 300 +#define K_SYSCALL_GNSS_GET_FIX_RATE 301 +#define K_SYSCALL_GNSS_GET_NAVIGATION_MODE 302 +#define K_SYSCALL_GNSS_GET_PERIODIC_CONFIG 303 +#define K_SYSCALL_GNSS_GET_SUPPORTED_SYSTEMS 304 +#define K_SYSCALL_GNSS_SET_ENABLED_SYSTEMS 305 +#define K_SYSCALL_GNSS_SET_FIX_RATE 306 +#define K_SYSCALL_GNSS_SET_NAVIGATION_MODE 307 +#define K_SYSCALL_GNSS_SET_PERIODIC_CONFIG 308 +#define K_SYSCALL_HWINFO_CLEAR_RESET_CAUSE 309 +#define K_SYSCALL_HWINFO_GET_DEVICE_EUI64 310 +#define K_SYSCALL_HWINFO_GET_DEVICE_ID 311 +#define K_SYSCALL_HWINFO_GET_RESET_CAUSE 312 +#define K_SYSCALL_HWINFO_GET_SUPPORTED_RESET_CAUSE 313 +#define K_SYSCALL_HWSPINLOCK_GET_MAX_ID 314 +#define K_SYSCALL_HWSPINLOCK_LOCK 315 +#define K_SYSCALL_HWSPINLOCK_TRYLOCK 316 +#define K_SYSCALL_HWSPINLOCK_UNLOCK 317 +#define K_SYSCALL_I2C_CONFIGURE 318 +#define K_SYSCALL_I2C_GET_CONFIG 319 +#define K_SYSCALL_I2C_RECOVER_BUS 320 +#define K_SYSCALL_I2C_TARGET_DRIVER_REGISTER 321 +#define K_SYSCALL_I2C_TARGET_DRIVER_UNREGISTER 322 +#define K_SYSCALL_I2C_TRANSFER 323 +#define K_SYSCALL_I2S_BUF_READ 324 +#define K_SYSCALL_I2S_BUF_WRITE 325 +#define K_SYSCALL_I2S_CONFIGURE 326 +#define K_SYSCALL_I2S_TRIGGER 327 +#define K_SYSCALL_I3C_DO_CCC 328 +#define K_SYSCALL_I3C_TRANSFER 329 +#define K_SYSCALL_IPM_COMPLETE 330 +#define K_SYSCALL_IPM_MAX_DATA_SIZE_GET 331 +#define K_SYSCALL_IPM_MAX_ID_VAL_GET 332 +#define K_SYSCALL_IPM_SEND 333 +#define K_SYSCALL_IPM_SET_ENABLED 334 +#define K_SYSCALL_IVSHMEM_ENABLE_INTERRUPTS 335 +#define K_SYSCALL_IVSHMEM_GET_ID 336 +#define K_SYSCALL_IVSHMEM_GET_MAX_PEERS 337 +#define K_SYSCALL_IVSHMEM_GET_MEM 338 +#define K_SYSCALL_IVSHMEM_GET_OUTPUT_MEM_SECTION 339 +#define K_SYSCALL_IVSHMEM_GET_PROTOCOL 340 +#define K_SYSCALL_IVSHMEM_GET_RW_MEM_SECTION 341 +#define K_SYSCALL_IVSHMEM_GET_STATE 342 +#define K_SYSCALL_IVSHMEM_GET_VECTORS 343 +#define K_SYSCALL_IVSHMEM_INT_PEER 344 +#define K_SYSCALL_IVSHMEM_REGISTER_HANDLER 345 +#define K_SYSCALL_IVSHMEM_SET_STATE 346 +#define K_SYSCALL_KSCAN_CONFIG 347 +#define K_SYSCALL_KSCAN_DISABLE_CALLBACK 348 +#define K_SYSCALL_KSCAN_ENABLE_CALLBACK 349 +#define K_SYSCALL_K_MEM_PAGING_HISTOGRAM_BACKING_STORE_PAGE_IN_GET 350 +#define K_SYSCALL_K_MEM_PAGING_HISTOGRAM_BACKING_STORE_PAGE_OUT_GET 351 +#define K_SYSCALL_K_MEM_PAGING_HISTOGRAM_EVICTION_GET 352 +#define K_SYSCALL_K_MEM_PAGING_STATS_GET 353 +#define K_SYSCALL_K_MEM_PAGING_THREAD_STATS_GET 354 +#define K_SYSCALL_LED_BLINK 355 +#define K_SYSCALL_LED_GET_INFO 356 +#define K_SYSCALL_LED_OFF 357 +#define K_SYSCALL_LED_ON 358 +#define K_SYSCALL_LED_SET_BRIGHTNESS 359 +#define K_SYSCALL_LED_SET_CHANNEL 360 +#define K_SYSCALL_LED_SET_COLOR 361 +#define K_SYSCALL_LED_WRITE_CHANNELS 362 +#define K_SYSCALL_MAXIM_DS3231_GET_SYNCPOINT 363 +#define K_SYSCALL_MAXIM_DS3231_REQ_SYNCPOINT 364 +#define K_SYSCALL_MBOX_MAX_CHANNELS_GET 365 +#define K_SYSCALL_MBOX_MTU_GET 366 +#define K_SYSCALL_MBOX_SEND 367 +#define K_SYSCALL_MBOX_SET_ENABLED 368 +#define K_SYSCALL_MDIO_BUS_DISABLE 369 +#define K_SYSCALL_MDIO_BUS_ENABLE 370 +#define K_SYSCALL_MDIO_READ 371 +#define K_SYSCALL_MDIO_READ_C45 372 +#define K_SYSCALL_MDIO_WRITE 373 +#define K_SYSCALL_MDIO_WRITE_C45 374 +#define K_SYSCALL_NET_ADDR_NTOP 375 +#define K_SYSCALL_NET_ADDR_PTON 376 +#define K_SYSCALL_NET_ETH_GET_PTP_CLOCK_BY_INDEX 377 +#define K_SYSCALL_NET_IF_GET_BY_INDEX 378 +#define K_SYSCALL_NET_IF_IPV4_ADDR_ADD_BY_INDEX 379 +#define K_SYSCALL_NET_IF_IPV4_ADDR_LOOKUP_BY_INDEX 380 +#define K_SYSCALL_NET_IF_IPV4_ADDR_RM_BY_INDEX 381 +#define K_SYSCALL_NET_IF_IPV4_SET_GW_BY_INDEX 382 +#define K_SYSCALL_NET_IF_IPV4_SET_NETMASK_BY_ADDR_BY_INDEX 383 +#define K_SYSCALL_NET_IF_IPV4_SET_NETMASK_BY_INDEX 384 +#define K_SYSCALL_NET_IF_IPV6_ADDR_ADD_BY_INDEX 385 +#define K_SYSCALL_NET_IF_IPV6_ADDR_LOOKUP_BY_INDEX 386 +#define K_SYSCALL_NET_IF_IPV6_ADDR_RM_BY_INDEX 387 +#define K_SYSCALL_NET_SOCKET_SERVICE_REGISTER 388 +#define K_SYSCALL_NRF_QSPI_NOR_XIP_ENABLE 389 +#define K_SYSCALL_PECI_CONFIG 390 +#define K_SYSCALL_PECI_DISABLE 391 +#define K_SYSCALL_PECI_ENABLE 392 +#define K_SYSCALL_PECI_TRANSFER 393 +#define K_SYSCALL_PS2_CONFIG 394 +#define K_SYSCALL_PS2_DISABLE_CALLBACK 395 +#define K_SYSCALL_PS2_ENABLE_CALLBACK 396 +#define K_SYSCALL_PS2_READ 397 +#define K_SYSCALL_PS2_WRITE 398 +#define K_SYSCALL_PTP_CLOCK_GET 399 +#define K_SYSCALL_PWM_CAPTURE_CYCLES 400 +#define K_SYSCALL_PWM_DISABLE_CAPTURE 401 +#define K_SYSCALL_PWM_ENABLE_CAPTURE 402 +#define K_SYSCALL_PWM_GET_CYCLES_PER_SEC 403 +#define K_SYSCALL_PWM_SET_CYCLES 404 +#define K_SYSCALL_RESET_LINE_ASSERT 405 +#define K_SYSCALL_RESET_LINE_DEASSERT 406 +#define K_SYSCALL_RESET_LINE_TOGGLE 407 +#define K_SYSCALL_RESET_STATUS 408 +#define K_SYSCALL_RETAINED_MEM_CLEAR 409 +#define K_SYSCALL_RETAINED_MEM_READ 410 +#define K_SYSCALL_RETAINED_MEM_SIZE 411 +#define K_SYSCALL_RETAINED_MEM_WRITE 412 +#define K_SYSCALL_RTC_ALARM_GET_SUPPORTED_FIELDS 413 +#define K_SYSCALL_RTC_ALARM_GET_TIME 414 +#define K_SYSCALL_RTC_ALARM_IS_PENDING 415 +#define K_SYSCALL_RTC_ALARM_SET_CALLBACK 416 +#define K_SYSCALL_RTC_ALARM_SET_TIME 417 +#define K_SYSCALL_RTC_GET_CALIBRATION 418 +#define K_SYSCALL_RTC_GET_TIME 419 +#define K_SYSCALL_RTC_SET_CALIBRATION 420 +#define K_SYSCALL_RTC_SET_TIME 421 +#define K_SYSCALL_RTC_UPDATE_SET_CALLBACK 422 +#define K_SYSCALL_RTIO_CQE_COPY_OUT 423 +#define K_SYSCALL_RTIO_CQE_GET_MEMPOOL_BUFFER 424 +#define K_SYSCALL_RTIO_RELEASE_BUFFER 425 +#define K_SYSCALL_RTIO_SQE_CANCEL 426 +#define K_SYSCALL_RTIO_SQE_COPY_IN_GET_HANDLES 427 +#define K_SYSCALL_RTIO_SUBMIT 428 +#define K_SYSCALL_SDHC_CARD_BUSY 429 +#define K_SYSCALL_SDHC_CARD_PRESENT 430 +#define K_SYSCALL_SDHC_DISABLE_INTERRUPT 431 +#define K_SYSCALL_SDHC_ENABLE_INTERRUPT 432 +#define K_SYSCALL_SDHC_EXECUTE_TUNING 433 +#define K_SYSCALL_SDHC_GET_HOST_PROPS 434 +#define K_SYSCALL_SDHC_HW_RESET 435 +#define K_SYSCALL_SDHC_REQUEST 436 +#define K_SYSCALL_SDHC_SET_IO 437 +#define K_SYSCALL_SENSOR_ATTR_GET 438 +#define K_SYSCALL_SENSOR_ATTR_SET 439 +#define K_SYSCALL_SENSOR_CHANNEL_GET 440 +#define K_SYSCALL_SENSOR_GET_DECODER 441 +#define K_SYSCALL_SENSOR_RECONFIGURE_READ_IODEV 442 +#define K_SYSCALL_SENSOR_SAMPLE_FETCH 443 +#define K_SYSCALL_SENSOR_SAMPLE_FETCH_CHAN 444 +#define K_SYSCALL_SIP_SUPERVISORY_CALL 445 +#define K_SYSCALL_SIP_SVC_PLAT_ASYNC_RES_REQ 446 +#define K_SYSCALL_SIP_SVC_PLAT_ASYNC_RES_RES 447 +#define K_SYSCALL_SIP_SVC_PLAT_FORMAT_TRANS_ID 448 +#define K_SYSCALL_SIP_SVC_PLAT_FREE_ASYNC_MEMORY 449 +#define K_SYSCALL_SIP_SVC_PLAT_FUNC_ID_VALID 450 +#define K_SYSCALL_SIP_SVC_PLAT_GET_ERROR_CODE 451 +#define K_SYSCALL_SIP_SVC_PLAT_GET_TRANS_IDX 452 +#define K_SYSCALL_SIP_SVC_PLAT_UPDATE_TRANS_ID 453 +#define K_SYSCALL_SMBUS_BLOCK_PCALL 454 +#define K_SYSCALL_SMBUS_BLOCK_READ 455 +#define K_SYSCALL_SMBUS_BLOCK_WRITE 456 +#define K_SYSCALL_SMBUS_BYTE_DATA_READ 457 +#define K_SYSCALL_SMBUS_BYTE_DATA_WRITE 458 +#define K_SYSCALL_SMBUS_BYTE_READ 459 +#define K_SYSCALL_SMBUS_BYTE_WRITE 460 +#define K_SYSCALL_SMBUS_CONFIGURE 461 +#define K_SYSCALL_SMBUS_GET_CONFIG 462 +#define K_SYSCALL_SMBUS_HOST_NOTIFY_REMOVE_CB 463 +#define K_SYSCALL_SMBUS_PCALL 464 +#define K_SYSCALL_SMBUS_QUICK 465 +#define K_SYSCALL_SMBUS_SMBALERT_REMOVE_CB 466 +#define K_SYSCALL_SMBUS_WORD_DATA_READ 467 +#define K_SYSCALL_SMBUS_WORD_DATA_WRITE 468 +#define K_SYSCALL_SPI_RELEASE 469 +#define K_SYSCALL_SPI_TRANSCEIVE 470 +#define K_SYSCALL_SYSCON_GET_BASE 471 +#define K_SYSCALL_SYSCON_GET_SIZE 472 +#define K_SYSCALL_SYSCON_READ_REG 473 +#define K_SYSCALL_SYSCON_WRITE_REG 474 +#define K_SYSCALL_SYS_CACHE_DATA_FLUSH_AND_INVD_RANGE 475 +#define K_SYSCALL_SYS_CACHE_DATA_FLUSH_RANGE 476 +#define K_SYSCALL_SYS_CACHE_DATA_INVD_RANGE 477 +#define K_SYSCALL_SYS_CSRAND_GET 478 +#define K_SYSCALL_SYS_RAND_GET 479 +#define K_SYSCALL_TGPIO_PIN_CONFIG_EXT_TIMESTAMP 480 +#define K_SYSCALL_TGPIO_PIN_DISABLE 481 +#define K_SYSCALL_TGPIO_PIN_PERIODIC_OUTPUT 482 +#define K_SYSCALL_TGPIO_PIN_READ_TS_EC 483 +#define K_SYSCALL_TGPIO_PORT_GET_CYCLES_PER_SECOND 484 +#define K_SYSCALL_TGPIO_PORT_GET_TIME 485 +#define K_SYSCALL_UART_MUX_FIND 486 +#define K_SYSCALL_UPDATEHUB_AUTOHANDLER 487 +#define K_SYSCALL_UPDATEHUB_CONFIRM 488 +#define K_SYSCALL_UPDATEHUB_PROBE 489 +#define K_SYSCALL_UPDATEHUB_REBOOT 490 +#define K_SYSCALL_UPDATEHUB_UPDATE 491 +#define K_SYSCALL_USER_FAULT 492 +#define K_SYSCALL_W1_CHANGE_BUS_LOCK 493 +#define K_SYSCALL_W1_CONFIGURE 494 +#define K_SYSCALL_W1_GET_SLAVE_COUNT 495 +#define K_SYSCALL_W1_READ_BIT 496 +#define K_SYSCALL_W1_READ_BLOCK 497 +#define K_SYSCALL_W1_READ_BYTE 498 +#define K_SYSCALL_W1_RESET_BUS 499 +#define K_SYSCALL_W1_SEARCH_BUS 500 +#define K_SYSCALL_W1_WRITE_BIT 501 +#define K_SYSCALL_W1_WRITE_BLOCK 502 +#define K_SYSCALL_W1_WRITE_BYTE 503 +#define K_SYSCALL_WDT_DISABLE 504 +#define K_SYSCALL_WDT_FEED 505 +#define K_SYSCALL_WDT_SETUP 506 +#define K_SYSCALL_XTENSA_USER_FAULT 507 +#define K_SYSCALL_ZSOCK_ACCEPT 508 +#define K_SYSCALL_ZSOCK_BIND 509 +#define K_SYSCALL_ZSOCK_CLOSE 510 +#define K_SYSCALL_ZSOCK_CONNECT 511 +#define K_SYSCALL_ZSOCK_FCNTL_IMPL 512 +#define K_SYSCALL_ZSOCK_GETHOSTNAME 513 +#define K_SYSCALL_ZSOCK_GETPEERNAME 514 +#define K_SYSCALL_ZSOCK_GETSOCKNAME 515 +#define K_SYSCALL_ZSOCK_GETSOCKOPT 516 +#define K_SYSCALL_ZSOCK_GET_CONTEXT_OBJECT 517 +#define K_SYSCALL_ZSOCK_INET_PTON 518 +#define K_SYSCALL_ZSOCK_IOCTL_IMPL 519 +#define K_SYSCALL_ZSOCK_LISTEN 520 +#define K_SYSCALL_ZSOCK_POLL 521 +#define K_SYSCALL_ZSOCK_RECVFROM 522 +#define K_SYSCALL_ZSOCK_RECVMSG 523 +#define K_SYSCALL_ZSOCK_SELECT 524 +#define K_SYSCALL_ZSOCK_SENDMSG 525 +#define K_SYSCALL_ZSOCK_SENDTO 526 +#define K_SYSCALL_ZSOCK_SETSOCKOPT 527 +#define K_SYSCALL_ZSOCK_SHUTDOWN 528 +#define K_SYSCALL_ZSOCK_SOCKET 529 +#define K_SYSCALL_ZSOCK_SOCKETPAIR 530 +#define K_SYSCALL_Z_ZSOCK_GETADDRINFO_INTERNAL 531 + + +#ifndef _ASMLANGUAGE + +#include <stdarg.h> +#include <stdint.h> + +#endif /* _ASMLANGUAGE */ + +#endif /* ZEPHYR_SYSCALL_LIST_H */ diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/adc.h b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/adc.h new file mode 100644 index 0000000..8384742 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/adc.h @@ -0,0 +1,101 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_ADC_H +#define Z_INCLUDE_SYSCALLS_ADC_H + + +#include <zephyr/tracing/tracing_syscall.h> + +#ifndef _ASMLANGUAGE + +#include <stdarg.h> + +#include <syscall_list.h> +#include <zephyr/syscall.h> + +#include <zephyr/linker/sections.h> + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_adc_channel_setup(const struct device * dev, const struct adc_channel_cfg * channel_cfg); + +__pinned_func +static inline int adc_channel_setup(const struct device * dev, const struct adc_channel_cfg * channel_cfg) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; const struct adc_channel_cfg * val; } parm1 = { .val = channel_cfg }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_ADC_CHANNEL_SETUP); + } +#endif + compiler_barrier(); + return z_impl_adc_channel_setup(dev, channel_cfg); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define adc_channel_setup(dev, channel_cfg) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ADC_CHANNEL_SETUP, adc_channel_setup, dev, channel_cfg); syscall__retval = adc_channel_setup(dev, channel_cfg); sys_port_trace_syscall_exit(K_SYSCALL_ADC_CHANNEL_SETUP, adc_channel_setup, dev, channel_cfg, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_adc_read(const struct device * dev, const struct adc_sequence * sequence); + +__pinned_func +static inline int adc_read(const struct device * dev, const struct adc_sequence * sequence) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; const struct adc_sequence * val; } parm1 = { .val = sequence }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_ADC_READ); + } +#endif + compiler_barrier(); + return z_impl_adc_read(dev, sequence); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define adc_read(dev, sequence) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ADC_READ, adc_read, dev, sequence); syscall__retval = adc_read(dev, sequence); sys_port_trace_syscall_exit(K_SYSCALL_ADC_READ, adc_read, dev, sequence, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_adc_read_async(const struct device * dev, const struct adc_sequence * sequence, struct k_poll_signal * async); + +__pinned_func +static inline int adc_read_async(const struct device * dev, const struct adc_sequence * sequence, struct k_poll_signal * async) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; const struct adc_sequence * val; } parm1 = { .val = sequence }; + union { uintptr_t x; struct k_poll_signal * val; } parm2 = { .val = async }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_ADC_READ_ASYNC); + } +#endif + compiler_barrier(); + return z_impl_adc_read_async(dev, sequence, async); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define adc_read_async(dev, sequence, async) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ADC_READ_ASYNC, adc_read_async, dev, sequence, async); syscall__retval = adc_read_async(dev, sequence, async); sys_port_trace_syscall_exit(K_SYSCALL_ADC_READ_ASYNC, adc_read_async, dev, sequence, async, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/arch.h b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/arch.h new file mode 100644 index 0000000..2a0836d --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/arch.h @@ -0,0 +1,52 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_ARCH_H +#define Z_INCLUDE_SYSCALLS_ARCH_H + + +#include <zephyr/tracing/tracing_syscall.h> + +#ifndef _ASMLANGUAGE + +#include <stdarg.h> + +#include <syscall_list.h> +#include <zephyr/syscall.h> + +#include <zephyr/linker/sections.h> + + +#ifdef __cplusplus +extern "C" { +#endif + +extern void z_impl_xtensa_user_fault(unsigned int reason); + +__pinned_func +static inline void xtensa_user_fault(unsigned int reason) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; unsigned int val; } parm0 = { .val = reason }; + (void) arch_syscall_invoke1(parm0.x, K_SYSCALL_XTENSA_USER_FAULT); + return; + } +#endif + compiler_barrier(); + z_impl_xtensa_user_fault(reason); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define xtensa_user_fault(reason) do { sys_port_trace_syscall_enter(K_SYSCALL_XTENSA_USER_FAULT, xtensa_user_fault, reason); xtensa_user_fault(reason); sys_port_trace_syscall_exit(K_SYSCALL_XTENSA_USER_FAULT, xtensa_user_fault, reason); } while(false) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/atomic_c.h b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/atomic_c.h new file mode 100644 index 0000000..9ddb691 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/atomic_c.h @@ -0,0 +1,270 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_ATOMIC_C_H +#define Z_INCLUDE_SYSCALLS_ATOMIC_C_H + + +#include <zephyr/tracing/tracing_syscall.h> + +#ifndef _ASMLANGUAGE + +#include <stdarg.h> + +#include <syscall_list.h> +#include <zephyr/syscall.h> + +#include <zephyr/linker/sections.h> + + +#ifdef __cplusplus +extern "C" { +#endif + +extern bool z_impl_atomic_cas(atomic_t * target, atomic_val_t old_value, atomic_val_t new_value); + +__pinned_func +static inline bool atomic_cas(atomic_t * target, atomic_val_t old_value, atomic_val_t new_value) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; atomic_t * val; } parm0 = { .val = target }; + union { uintptr_t x; atomic_val_t val; } parm1 = { .val = old_value }; + union { uintptr_t x; atomic_val_t val; } parm2 = { .val = new_value }; + return (bool) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_ATOMIC_CAS); + } +#endif + compiler_barrier(); + return z_impl_atomic_cas(target, old_value, new_value); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define atomic_cas(target, old_value, new_value) ({ bool syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ATOMIC_CAS, atomic_cas, target, old_value, new_value); syscall__retval = atomic_cas(target, old_value, new_value); sys_port_trace_syscall_exit(K_SYSCALL_ATOMIC_CAS, atomic_cas, target, old_value, new_value, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern bool z_impl_atomic_ptr_cas(atomic_ptr_t * target, atomic_ptr_val_t old_value, atomic_ptr_val_t new_value); + +__pinned_func +static inline bool atomic_ptr_cas(atomic_ptr_t * target, atomic_ptr_val_t old_value, atomic_ptr_val_t new_value) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; atomic_ptr_t * val; } parm0 = { .val = target }; + union { uintptr_t x; atomic_ptr_val_t val; } parm1 = { .val = old_value }; + union { uintptr_t x; atomic_ptr_val_t val; } parm2 = { .val = new_value }; + return (bool) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_ATOMIC_PTR_CAS); + } +#endif + compiler_barrier(); + return z_impl_atomic_ptr_cas(target, old_value, new_value); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define atomic_ptr_cas(target, old_value, new_value) ({ bool syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ATOMIC_PTR_CAS, atomic_ptr_cas, target, old_value, new_value); syscall__retval = atomic_ptr_cas(target, old_value, new_value); sys_port_trace_syscall_exit(K_SYSCALL_ATOMIC_PTR_CAS, atomic_ptr_cas, target, old_value, new_value, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern atomic_val_t z_impl_atomic_add(atomic_t * target, atomic_val_t value); + +__pinned_func +static inline atomic_val_t atomic_add(atomic_t * target, atomic_val_t value) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; atomic_t * val; } parm0 = { .val = target }; + union { uintptr_t x; atomic_val_t val; } parm1 = { .val = value }; + return (atomic_val_t) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_ATOMIC_ADD); + } +#endif + compiler_barrier(); + return z_impl_atomic_add(target, value); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define atomic_add(target, value) ({ atomic_val_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ATOMIC_ADD, atomic_add, target, value); syscall__retval = atomic_add(target, value); sys_port_trace_syscall_exit(K_SYSCALL_ATOMIC_ADD, atomic_add, target, value, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern atomic_val_t z_impl_atomic_sub(atomic_t * target, atomic_val_t value); + +__pinned_func +static inline atomic_val_t atomic_sub(atomic_t * target, atomic_val_t value) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; atomic_t * val; } parm0 = { .val = target }; + union { uintptr_t x; atomic_val_t val; } parm1 = { .val = value }; + return (atomic_val_t) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_ATOMIC_SUB); + } +#endif + compiler_barrier(); + return z_impl_atomic_sub(target, value); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define atomic_sub(target, value) ({ atomic_val_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ATOMIC_SUB, atomic_sub, target, value); syscall__retval = atomic_sub(target, value); sys_port_trace_syscall_exit(K_SYSCALL_ATOMIC_SUB, atomic_sub, target, value, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern atomic_val_t z_impl_atomic_set(atomic_t * target, atomic_val_t value); + +__pinned_func +static inline atomic_val_t atomic_set(atomic_t * target, atomic_val_t value) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; atomic_t * val; } parm0 = { .val = target }; + union { uintptr_t x; atomic_val_t val; } parm1 = { .val = value }; + return (atomic_val_t) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_ATOMIC_SET); + } +#endif + compiler_barrier(); + return z_impl_atomic_set(target, value); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define atomic_set(target, value) ({ atomic_val_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ATOMIC_SET, atomic_set, target, value); syscall__retval = atomic_set(target, value); sys_port_trace_syscall_exit(K_SYSCALL_ATOMIC_SET, atomic_set, target, value, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern atomic_ptr_val_t z_impl_atomic_ptr_set(atomic_ptr_t * target, atomic_ptr_val_t value); + +__pinned_func +static inline atomic_ptr_val_t atomic_ptr_set(atomic_ptr_t * target, atomic_ptr_val_t value) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; atomic_ptr_t * val; } parm0 = { .val = target }; + union { uintptr_t x; atomic_ptr_val_t val; } parm1 = { .val = value }; + return (atomic_ptr_val_t) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_ATOMIC_PTR_SET); + } +#endif + compiler_barrier(); + return z_impl_atomic_ptr_set(target, value); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define atomic_ptr_set(target, value) ({ atomic_ptr_val_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ATOMIC_PTR_SET, atomic_ptr_set, target, value); syscall__retval = atomic_ptr_set(target, value); sys_port_trace_syscall_exit(K_SYSCALL_ATOMIC_PTR_SET, atomic_ptr_set, target, value, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern atomic_val_t z_impl_atomic_or(atomic_t * target, atomic_val_t value); + +__pinned_func +static inline atomic_val_t atomic_or(atomic_t * target, atomic_val_t value) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; atomic_t * val; } parm0 = { .val = target }; + union { uintptr_t x; atomic_val_t val; } parm1 = { .val = value }; + return (atomic_val_t) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_ATOMIC_OR); + } +#endif + compiler_barrier(); + return z_impl_atomic_or(target, value); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define atomic_or(target, value) ({ atomic_val_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ATOMIC_OR, atomic_or, target, value); syscall__retval = atomic_or(target, value); sys_port_trace_syscall_exit(K_SYSCALL_ATOMIC_OR, atomic_or, target, value, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern atomic_val_t z_impl_atomic_xor(atomic_t * target, atomic_val_t value); + +__pinned_func +static inline atomic_val_t atomic_xor(atomic_t * target, atomic_val_t value) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; atomic_t * val; } parm0 = { .val = target }; + union { uintptr_t x; atomic_val_t val; } parm1 = { .val = value }; + return (atomic_val_t) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_ATOMIC_XOR); + } +#endif + compiler_barrier(); + return z_impl_atomic_xor(target, value); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define atomic_xor(target, value) ({ atomic_val_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ATOMIC_XOR, atomic_xor, target, value); syscall__retval = atomic_xor(target, value); sys_port_trace_syscall_exit(K_SYSCALL_ATOMIC_XOR, atomic_xor, target, value, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern atomic_val_t z_impl_atomic_and(atomic_t * target, atomic_val_t value); + +__pinned_func +static inline atomic_val_t atomic_and(atomic_t * target, atomic_val_t value) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; atomic_t * val; } parm0 = { .val = target }; + union { uintptr_t x; atomic_val_t val; } parm1 = { .val = value }; + return (atomic_val_t) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_ATOMIC_AND); + } +#endif + compiler_barrier(); + return z_impl_atomic_and(target, value); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define atomic_and(target, value) ({ atomic_val_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ATOMIC_AND, atomic_and, target, value); syscall__retval = atomic_and(target, value); sys_port_trace_syscall_exit(K_SYSCALL_ATOMIC_AND, atomic_and, target, value, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern atomic_val_t z_impl_atomic_nand(atomic_t * target, atomic_val_t value); + +__pinned_func +static inline atomic_val_t atomic_nand(atomic_t * target, atomic_val_t value) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; atomic_t * val; } parm0 = { .val = target }; + union { uintptr_t x; atomic_val_t val; } parm1 = { .val = value }; + return (atomic_val_t) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_ATOMIC_NAND); + } +#endif + compiler_barrier(); + return z_impl_atomic_nand(target, value); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define atomic_nand(target, value) ({ atomic_val_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ATOMIC_NAND, atomic_nand, target, value); syscall__retval = atomic_nand(target, value); sys_port_trace_syscall_exit(K_SYSCALL_ATOMIC_NAND, atomic_nand, target, value, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/auxdisplay.h b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/auxdisplay.h new file mode 100644 index 0000000..1cdfadf --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/auxdisplay.h @@ -0,0 +1,488 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_AUXDISPLAY_H +#define Z_INCLUDE_SYSCALLS_AUXDISPLAY_H + + +#include <zephyr/tracing/tracing_syscall.h> + +#ifndef _ASMLANGUAGE + +#include <stdarg.h> + +#include <syscall_list.h> +#include <zephyr/syscall.h> + +#include <zephyr/linker/sections.h> + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_auxdisplay_display_on(const struct device * dev); + +__pinned_func +static inline int auxdisplay_display_on(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_AUXDISPLAY_DISPLAY_ON); + } +#endif + compiler_barrier(); + return z_impl_auxdisplay_display_on(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define auxdisplay_display_on(dev) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_AUXDISPLAY_DISPLAY_ON, auxdisplay_display_on, dev); syscall__retval = auxdisplay_display_on(dev); sys_port_trace_syscall_exit(K_SYSCALL_AUXDISPLAY_DISPLAY_ON, auxdisplay_display_on, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_auxdisplay_display_off(const struct device * dev); + +__pinned_func +static inline int auxdisplay_display_off(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_AUXDISPLAY_DISPLAY_OFF); + } +#endif + compiler_barrier(); + return z_impl_auxdisplay_display_off(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define auxdisplay_display_off(dev) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_AUXDISPLAY_DISPLAY_OFF, auxdisplay_display_off, dev); syscall__retval = auxdisplay_display_off(dev); sys_port_trace_syscall_exit(K_SYSCALL_AUXDISPLAY_DISPLAY_OFF, auxdisplay_display_off, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_auxdisplay_cursor_set_enabled(const struct device * dev, bool enabled); + +__pinned_func +static inline int auxdisplay_cursor_set_enabled(const struct device * dev, bool enabled) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; bool val; } parm1 = { .val = enabled }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_AUXDISPLAY_CURSOR_SET_ENABLED); + } +#endif + compiler_barrier(); + return z_impl_auxdisplay_cursor_set_enabled(dev, enabled); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define auxdisplay_cursor_set_enabled(dev, enabled) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_AUXDISPLAY_CURSOR_SET_ENABLED, auxdisplay_cursor_set_enabled, dev, enabled); syscall__retval = auxdisplay_cursor_set_enabled(dev, enabled); sys_port_trace_syscall_exit(K_SYSCALL_AUXDISPLAY_CURSOR_SET_ENABLED, auxdisplay_cursor_set_enabled, dev, enabled, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_auxdisplay_position_blinking_set_enabled(const struct device * dev, bool enabled); + +__pinned_func +static inline int auxdisplay_position_blinking_set_enabled(const struct device * dev, bool enabled) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; bool val; } parm1 = { .val = enabled }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_AUXDISPLAY_POSITION_BLINKING_SET_ENABLED); + } +#endif + compiler_barrier(); + return z_impl_auxdisplay_position_blinking_set_enabled(dev, enabled); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define auxdisplay_position_blinking_set_enabled(dev, enabled) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_AUXDISPLAY_POSITION_BLINKING_SET_ENABLED, auxdisplay_position_blinking_set_enabled, dev, enabled); syscall__retval = auxdisplay_position_blinking_set_enabled(dev, enabled); sys_port_trace_syscall_exit(K_SYSCALL_AUXDISPLAY_POSITION_BLINKING_SET_ENABLED, auxdisplay_position_blinking_set_enabled, dev, enabled, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_auxdisplay_cursor_shift_set(const struct device * dev, uint8_t direction, bool display_shift); + +__pinned_func +static inline int auxdisplay_cursor_shift_set(const struct device * dev, uint8_t direction, bool display_shift) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint8_t val; } parm1 = { .val = direction }; + union { uintptr_t x; bool val; } parm2 = { .val = display_shift }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_AUXDISPLAY_CURSOR_SHIFT_SET); + } +#endif + compiler_barrier(); + return z_impl_auxdisplay_cursor_shift_set(dev, direction, display_shift); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define auxdisplay_cursor_shift_set(dev, direction, display_shift) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_AUXDISPLAY_CURSOR_SHIFT_SET, auxdisplay_cursor_shift_set, dev, direction, display_shift); syscall__retval = auxdisplay_cursor_shift_set(dev, direction, display_shift); sys_port_trace_syscall_exit(K_SYSCALL_AUXDISPLAY_CURSOR_SHIFT_SET, auxdisplay_cursor_shift_set, dev, direction, display_shift, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_auxdisplay_cursor_position_set(const struct device * dev, enum auxdisplay_position type, int16_t x, int16_t y); + +__pinned_func +static inline int auxdisplay_cursor_position_set(const struct device * dev, enum auxdisplay_position type, int16_t x, int16_t y) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; enum auxdisplay_position val; } parm1 = { .val = type }; + union { uintptr_t x; int16_t val; } parm2 = { .val = x }; + union { uintptr_t x; int16_t val; } parm3 = { .val = y }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_AUXDISPLAY_CURSOR_POSITION_SET); + } +#endif + compiler_barrier(); + return z_impl_auxdisplay_cursor_position_set(dev, type, x, y); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define auxdisplay_cursor_position_set(dev, type, x, y) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_AUXDISPLAY_CURSOR_POSITION_SET, auxdisplay_cursor_position_set, dev, type, x, y); syscall__retval = auxdisplay_cursor_position_set(dev, type, x, y); sys_port_trace_syscall_exit(K_SYSCALL_AUXDISPLAY_CURSOR_POSITION_SET, auxdisplay_cursor_position_set, dev, type, x, y, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_auxdisplay_cursor_position_get(const struct device * dev, int16_t * x, int16_t * y); + +__pinned_func +static inline int auxdisplay_cursor_position_get(const struct device * dev, int16_t * x, int16_t * y) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; int16_t * val; } parm1 = { .val = x }; + union { uintptr_t x; int16_t * val; } parm2 = { .val = y }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_AUXDISPLAY_CURSOR_POSITION_GET); + } +#endif + compiler_barrier(); + return z_impl_auxdisplay_cursor_position_get(dev, x, y); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define auxdisplay_cursor_position_get(dev, x, y) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_AUXDISPLAY_CURSOR_POSITION_GET, auxdisplay_cursor_position_get, dev, x, y); syscall__retval = auxdisplay_cursor_position_get(dev, x, y); sys_port_trace_syscall_exit(K_SYSCALL_AUXDISPLAY_CURSOR_POSITION_GET, auxdisplay_cursor_position_get, dev, x, y, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_auxdisplay_display_position_set(const struct device * dev, enum auxdisplay_position type, int16_t x, int16_t y); + +__pinned_func +static inline int auxdisplay_display_position_set(const struct device * dev, enum auxdisplay_position type, int16_t x, int16_t y) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; enum auxdisplay_position val; } parm1 = { .val = type }; + union { uintptr_t x; int16_t val; } parm2 = { .val = x }; + union { uintptr_t x; int16_t val; } parm3 = { .val = y }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_AUXDISPLAY_DISPLAY_POSITION_SET); + } +#endif + compiler_barrier(); + return z_impl_auxdisplay_display_position_set(dev, type, x, y); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define auxdisplay_display_position_set(dev, type, x, y) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_AUXDISPLAY_DISPLAY_POSITION_SET, auxdisplay_display_position_set, dev, type, x, y); syscall__retval = auxdisplay_display_position_set(dev, type, x, y); sys_port_trace_syscall_exit(K_SYSCALL_AUXDISPLAY_DISPLAY_POSITION_SET, auxdisplay_display_position_set, dev, type, x, y, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_auxdisplay_display_position_get(const struct device * dev, int16_t * x, int16_t * y); + +__pinned_func +static inline int auxdisplay_display_position_get(const struct device * dev, int16_t * x, int16_t * y) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; int16_t * val; } parm1 = { .val = x }; + union { uintptr_t x; int16_t * val; } parm2 = { .val = y }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_AUXDISPLAY_DISPLAY_POSITION_GET); + } +#endif + compiler_barrier(); + return z_impl_auxdisplay_display_position_get(dev, x, y); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define auxdisplay_display_position_get(dev, x, y) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_AUXDISPLAY_DISPLAY_POSITION_GET, auxdisplay_display_position_get, dev, x, y); syscall__retval = auxdisplay_display_position_get(dev, x, y); sys_port_trace_syscall_exit(K_SYSCALL_AUXDISPLAY_DISPLAY_POSITION_GET, auxdisplay_display_position_get, dev, x, y, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_auxdisplay_capabilities_get(const struct device * dev, struct auxdisplay_capabilities * capabilities); + +__pinned_func +static inline int auxdisplay_capabilities_get(const struct device * dev, struct auxdisplay_capabilities * capabilities) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; struct auxdisplay_capabilities * val; } parm1 = { .val = capabilities }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_AUXDISPLAY_CAPABILITIES_GET); + } +#endif + compiler_barrier(); + return z_impl_auxdisplay_capabilities_get(dev, capabilities); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define auxdisplay_capabilities_get(dev, capabilities) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_AUXDISPLAY_CAPABILITIES_GET, auxdisplay_capabilities_get, dev, capabilities); syscall__retval = auxdisplay_capabilities_get(dev, capabilities); sys_port_trace_syscall_exit(K_SYSCALL_AUXDISPLAY_CAPABILITIES_GET, auxdisplay_capabilities_get, dev, capabilities, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_auxdisplay_clear(const struct device * dev); + +__pinned_func +static inline int auxdisplay_clear(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_AUXDISPLAY_CLEAR); + } +#endif + compiler_barrier(); + return z_impl_auxdisplay_clear(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define auxdisplay_clear(dev) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_AUXDISPLAY_CLEAR, auxdisplay_clear, dev); syscall__retval = auxdisplay_clear(dev); sys_port_trace_syscall_exit(K_SYSCALL_AUXDISPLAY_CLEAR, auxdisplay_clear, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_auxdisplay_brightness_get(const struct device * dev, uint8_t * brightness); + +__pinned_func +static inline int auxdisplay_brightness_get(const struct device * dev, uint8_t * brightness) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint8_t * val; } parm1 = { .val = brightness }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_AUXDISPLAY_BRIGHTNESS_GET); + } +#endif + compiler_barrier(); + return z_impl_auxdisplay_brightness_get(dev, brightness); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define auxdisplay_brightness_get(dev, brightness) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_AUXDISPLAY_BRIGHTNESS_GET, auxdisplay_brightness_get, dev, brightness); syscall__retval = auxdisplay_brightness_get(dev, brightness); sys_port_trace_syscall_exit(K_SYSCALL_AUXDISPLAY_BRIGHTNESS_GET, auxdisplay_brightness_get, dev, brightness, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_auxdisplay_brightness_set(const struct device * dev, uint8_t brightness); + +__pinned_func +static inline int auxdisplay_brightness_set(const struct device * dev, uint8_t brightness) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint8_t val; } parm1 = { .val = brightness }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_AUXDISPLAY_BRIGHTNESS_SET); + } +#endif + compiler_barrier(); + return z_impl_auxdisplay_brightness_set(dev, brightness); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define auxdisplay_brightness_set(dev, brightness) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_AUXDISPLAY_BRIGHTNESS_SET, auxdisplay_brightness_set, dev, brightness); syscall__retval = auxdisplay_brightness_set(dev, brightness); sys_port_trace_syscall_exit(K_SYSCALL_AUXDISPLAY_BRIGHTNESS_SET, auxdisplay_brightness_set, dev, brightness, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_auxdisplay_backlight_get(const struct device * dev, uint8_t * backlight); + +__pinned_func +static inline int auxdisplay_backlight_get(const struct device * dev, uint8_t * backlight) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint8_t * val; } parm1 = { .val = backlight }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_AUXDISPLAY_BACKLIGHT_GET); + } +#endif + compiler_barrier(); + return z_impl_auxdisplay_backlight_get(dev, backlight); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define auxdisplay_backlight_get(dev, backlight) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_AUXDISPLAY_BACKLIGHT_GET, auxdisplay_backlight_get, dev, backlight); syscall__retval = auxdisplay_backlight_get(dev, backlight); sys_port_trace_syscall_exit(K_SYSCALL_AUXDISPLAY_BACKLIGHT_GET, auxdisplay_backlight_get, dev, backlight, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_auxdisplay_backlight_set(const struct device * dev, uint8_t backlight); + +__pinned_func +static inline int auxdisplay_backlight_set(const struct device * dev, uint8_t backlight) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint8_t val; } parm1 = { .val = backlight }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_AUXDISPLAY_BACKLIGHT_SET); + } +#endif + compiler_barrier(); + return z_impl_auxdisplay_backlight_set(dev, backlight); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define auxdisplay_backlight_set(dev, backlight) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_AUXDISPLAY_BACKLIGHT_SET, auxdisplay_backlight_set, dev, backlight); syscall__retval = auxdisplay_backlight_set(dev, backlight); sys_port_trace_syscall_exit(K_SYSCALL_AUXDISPLAY_BACKLIGHT_SET, auxdisplay_backlight_set, dev, backlight, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_auxdisplay_is_busy(const struct device * dev); + +__pinned_func +static inline int auxdisplay_is_busy(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_AUXDISPLAY_IS_BUSY); + } +#endif + compiler_barrier(); + return z_impl_auxdisplay_is_busy(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define auxdisplay_is_busy(dev) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_AUXDISPLAY_IS_BUSY, auxdisplay_is_busy, dev); syscall__retval = auxdisplay_is_busy(dev); sys_port_trace_syscall_exit(K_SYSCALL_AUXDISPLAY_IS_BUSY, auxdisplay_is_busy, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_auxdisplay_custom_character_set(const struct device * dev, struct auxdisplay_character * character); + +__pinned_func +static inline int auxdisplay_custom_character_set(const struct device * dev, struct auxdisplay_character * character) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; struct auxdisplay_character * val; } parm1 = { .val = character }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_AUXDISPLAY_CUSTOM_CHARACTER_SET); + } +#endif + compiler_barrier(); + return z_impl_auxdisplay_custom_character_set(dev, character); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define auxdisplay_custom_character_set(dev, character) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_AUXDISPLAY_CUSTOM_CHARACTER_SET, auxdisplay_custom_character_set, dev, character); syscall__retval = auxdisplay_custom_character_set(dev, character); sys_port_trace_syscall_exit(K_SYSCALL_AUXDISPLAY_CUSTOM_CHARACTER_SET, auxdisplay_custom_character_set, dev, character, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_auxdisplay_write(const struct device * dev, const uint8_t * data, uint16_t len); + +__pinned_func +static inline int auxdisplay_write(const struct device * dev, const uint8_t * data, uint16_t len) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; const uint8_t * val; } parm1 = { .val = data }; + union { uintptr_t x; uint16_t val; } parm2 = { .val = len }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_AUXDISPLAY_WRITE); + } +#endif + compiler_barrier(); + return z_impl_auxdisplay_write(dev, data, len); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define auxdisplay_write(dev, data, len) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_AUXDISPLAY_WRITE, auxdisplay_write, dev, data, len); syscall__retval = auxdisplay_write(dev, data, len); sys_port_trace_syscall_exit(K_SYSCALL_AUXDISPLAY_WRITE, auxdisplay_write, dev, data, len, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_auxdisplay_custom_command(const struct device * dev, struct auxdisplay_custom_data * data); + +__pinned_func +static inline int auxdisplay_custom_command(const struct device * dev, struct auxdisplay_custom_data * data) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; struct auxdisplay_custom_data * val; } parm1 = { .val = data }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_AUXDISPLAY_CUSTOM_COMMAND); + } +#endif + compiler_barrier(); + return z_impl_auxdisplay_custom_command(dev, data); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define auxdisplay_custom_command(dev, data) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_AUXDISPLAY_CUSTOM_COMMAND, auxdisplay_custom_command, dev, data); syscall__retval = auxdisplay_custom_command(dev, data); sys_port_trace_syscall_exit(K_SYSCALL_AUXDISPLAY_CUSTOM_COMMAND, auxdisplay_custom_command, dev, data, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/bbram.h b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/bbram.h new file mode 100644 index 0000000..2dc492d --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/bbram.h @@ -0,0 +1,173 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_BBRAM_H +#define Z_INCLUDE_SYSCALLS_BBRAM_H + + +#include <zephyr/tracing/tracing_syscall.h> + +#ifndef _ASMLANGUAGE + +#include <stdarg.h> + +#include <syscall_list.h> +#include <zephyr/syscall.h> + +#include <zephyr/linker/sections.h> + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_bbram_check_invalid(const struct device * dev); + +__pinned_func +static inline int bbram_check_invalid(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_BBRAM_CHECK_INVALID); + } +#endif + compiler_barrier(); + return z_impl_bbram_check_invalid(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define bbram_check_invalid(dev) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_BBRAM_CHECK_INVALID, bbram_check_invalid, dev); syscall__retval = bbram_check_invalid(dev); sys_port_trace_syscall_exit(K_SYSCALL_BBRAM_CHECK_INVALID, bbram_check_invalid, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_bbram_check_standby_power(const struct device * dev); + +__pinned_func +static inline int bbram_check_standby_power(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_BBRAM_CHECK_STANDBY_POWER); + } +#endif + compiler_barrier(); + return z_impl_bbram_check_standby_power(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define bbram_check_standby_power(dev) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_BBRAM_CHECK_STANDBY_POWER, bbram_check_standby_power, dev); syscall__retval = bbram_check_standby_power(dev); sys_port_trace_syscall_exit(K_SYSCALL_BBRAM_CHECK_STANDBY_POWER, bbram_check_standby_power, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_bbram_check_power(const struct device * dev); + +__pinned_func +static inline int bbram_check_power(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_BBRAM_CHECK_POWER); + } +#endif + compiler_barrier(); + return z_impl_bbram_check_power(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define bbram_check_power(dev) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_BBRAM_CHECK_POWER, bbram_check_power, dev); syscall__retval = bbram_check_power(dev); sys_port_trace_syscall_exit(K_SYSCALL_BBRAM_CHECK_POWER, bbram_check_power, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_bbram_get_size(const struct device * dev, size_t * size); + +__pinned_func +static inline int bbram_get_size(const struct device * dev, size_t * size) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; size_t * val; } parm1 = { .val = size }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_BBRAM_GET_SIZE); + } +#endif + compiler_barrier(); + return z_impl_bbram_get_size(dev, size); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define bbram_get_size(dev, size) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_BBRAM_GET_SIZE, bbram_get_size, dev, size); syscall__retval = bbram_get_size(dev, size); sys_port_trace_syscall_exit(K_SYSCALL_BBRAM_GET_SIZE, bbram_get_size, dev, size, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_bbram_read(const struct device * dev, size_t offset, size_t size, uint8_t * data); + +__pinned_func +static inline int bbram_read(const struct device * dev, size_t offset, size_t size, uint8_t * data) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; size_t val; } parm1 = { .val = offset }; + union { uintptr_t x; size_t val; } parm2 = { .val = size }; + union { uintptr_t x; uint8_t * val; } parm3 = { .val = data }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_BBRAM_READ); + } +#endif + compiler_barrier(); + return z_impl_bbram_read(dev, offset, size, data); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define bbram_read(dev, offset, size, data) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_BBRAM_READ, bbram_read, dev, offset, size, data); syscall__retval = bbram_read(dev, offset, size, data); sys_port_trace_syscall_exit(K_SYSCALL_BBRAM_READ, bbram_read, dev, offset, size, data, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_bbram_write(const struct device * dev, size_t offset, size_t size, const uint8_t * data); + +__pinned_func +static inline int bbram_write(const struct device * dev, size_t offset, size_t size, const uint8_t * data) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; size_t val; } parm1 = { .val = offset }; + union { uintptr_t x; size_t val; } parm2 = { .val = size }; + union { uintptr_t x; const uint8_t * val; } parm3 = { .val = data }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_BBRAM_WRITE); + } +#endif + compiler_barrier(); + return z_impl_bbram_write(dev, offset, size, data); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define bbram_write(dev, offset, size, data) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_BBRAM_WRITE, bbram_write, dev, offset, size, data); syscall__retval = bbram_write(dev, offset, size, data); sys_port_trace_syscall_exit(K_SYSCALL_BBRAM_WRITE, bbram_write, dev, offset, size, data, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/cache.h b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/cache.h new file mode 100644 index 0000000..a942cfc --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/cache.h @@ -0,0 +1,100 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_CACHE_H +#define Z_INCLUDE_SYSCALLS_CACHE_H + + +#include <zephyr/tracing/tracing_syscall.h> + +#ifndef _ASMLANGUAGE + +#include <stdarg.h> + +#include <syscall_list.h> +#include <zephyr/syscall.h> + +#include <zephyr/linker/sections.h> + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_sys_cache_data_flush_range(void * addr, size_t size); + +__pinned_func +static inline int sys_cache_data_flush_range(void * addr, size_t size) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; void * val; } parm0 = { .val = addr }; + union { uintptr_t x; size_t val; } parm1 = { .val = size }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_SYS_CACHE_DATA_FLUSH_RANGE); + } +#endif + compiler_barrier(); + return z_impl_sys_cache_data_flush_range(addr, size); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define sys_cache_data_flush_range(addr, size) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SYS_CACHE_DATA_FLUSH_RANGE, sys_cache_data_flush_range, addr, size); syscall__retval = sys_cache_data_flush_range(addr, size); sys_port_trace_syscall_exit(K_SYSCALL_SYS_CACHE_DATA_FLUSH_RANGE, sys_cache_data_flush_range, addr, size, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_sys_cache_data_invd_range(void * addr, size_t size); + +__pinned_func +static inline int sys_cache_data_invd_range(void * addr, size_t size) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; void * val; } parm0 = { .val = addr }; + union { uintptr_t x; size_t val; } parm1 = { .val = size }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_SYS_CACHE_DATA_INVD_RANGE); + } +#endif + compiler_barrier(); + return z_impl_sys_cache_data_invd_range(addr, size); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define sys_cache_data_invd_range(addr, size) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SYS_CACHE_DATA_INVD_RANGE, sys_cache_data_invd_range, addr, size); syscall__retval = sys_cache_data_invd_range(addr, size); sys_port_trace_syscall_exit(K_SYSCALL_SYS_CACHE_DATA_INVD_RANGE, sys_cache_data_invd_range, addr, size, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_sys_cache_data_flush_and_invd_range(void * addr, size_t size); + +__pinned_func +static inline int sys_cache_data_flush_and_invd_range(void * addr, size_t size) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; void * val; } parm0 = { .val = addr }; + union { uintptr_t x; size_t val; } parm1 = { .val = size }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_SYS_CACHE_DATA_FLUSH_AND_INVD_RANGE); + } +#endif + compiler_barrier(); + return z_impl_sys_cache_data_flush_and_invd_range(addr, size); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define sys_cache_data_flush_and_invd_range(addr, size) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SYS_CACHE_DATA_FLUSH_AND_INVD_RANGE, sys_cache_data_flush_and_invd_range, addr, size); syscall__retval = sys_cache_data_flush_and_invd_range(addr, size); sys_port_trace_syscall_exit(K_SYSCALL_SYS_CACHE_DATA_FLUSH_AND_INVD_RANGE, sys_cache_data_flush_and_invd_range, addr, size, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/can.h b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/can.h new file mode 100644 index 0000000..ad0c301 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/can.h @@ -0,0 +1,812 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_CAN_H +#define Z_INCLUDE_SYSCALLS_CAN_H + + +#include <zephyr/tracing/tracing_syscall.h> + +#ifndef _ASMLANGUAGE + +#include <stdarg.h> + +#include <syscall_list.h> +#include <zephyr/syscall.h> + +#include <zephyr/linker/sections.h> + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_can_get_core_clock(const struct device * dev, uint32_t * rate); + +__pinned_func +static inline int can_get_core_clock(const struct device * dev, uint32_t * rate) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t * val; } parm1 = { .val = rate }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_CAN_GET_CORE_CLOCK); + } +#endif + compiler_barrier(); + return z_impl_can_get_core_clock(dev, rate); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define can_get_core_clock(dev, rate) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_CAN_GET_CORE_CLOCK, can_get_core_clock, dev, rate); syscall__retval = can_get_core_clock(dev, rate); sys_port_trace_syscall_exit(K_SYSCALL_CAN_GET_CORE_CLOCK, can_get_core_clock, dev, rate, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern uint32_t z_impl_can_get_bitrate_min(const struct device * dev); + +__pinned_func +static inline uint32_t can_get_bitrate_min(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (uint32_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_CAN_GET_BITRATE_MIN); + } +#endif + compiler_barrier(); + return z_impl_can_get_bitrate_min(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define can_get_bitrate_min(dev) ({ uint32_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_CAN_GET_BITRATE_MIN, can_get_bitrate_min, dev); syscall__retval = can_get_bitrate_min(dev); sys_port_trace_syscall_exit(K_SYSCALL_CAN_GET_BITRATE_MIN, can_get_bitrate_min, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern uint32_t z_impl_can_get_bitrate_max(const struct device * dev); + +__pinned_func +static inline uint32_t can_get_bitrate_max(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (uint32_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_CAN_GET_BITRATE_MAX); + } +#endif + compiler_barrier(); + return z_impl_can_get_bitrate_max(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define can_get_bitrate_max(dev) ({ uint32_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_CAN_GET_BITRATE_MAX, can_get_bitrate_max, dev); syscall__retval = can_get_bitrate_max(dev); sys_port_trace_syscall_exit(K_SYSCALL_CAN_GET_BITRATE_MAX, can_get_bitrate_max, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern const struct can_timing * z_impl_can_get_timing_min(const struct device * dev); + +__pinned_func +static inline const struct can_timing * can_get_timing_min(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (const struct can_timing *) arch_syscall_invoke1(parm0.x, K_SYSCALL_CAN_GET_TIMING_MIN); + } +#endif + compiler_barrier(); + return z_impl_can_get_timing_min(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define can_get_timing_min(dev) ({ const struct can_timing * syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_CAN_GET_TIMING_MIN, can_get_timing_min, dev); syscall__retval = can_get_timing_min(dev); sys_port_trace_syscall_exit(K_SYSCALL_CAN_GET_TIMING_MIN, can_get_timing_min, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern const struct can_timing * z_impl_can_get_timing_max(const struct device * dev); + +__pinned_func +static inline const struct can_timing * can_get_timing_max(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (const struct can_timing *) arch_syscall_invoke1(parm0.x, K_SYSCALL_CAN_GET_TIMING_MAX); + } +#endif + compiler_barrier(); + return z_impl_can_get_timing_max(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define can_get_timing_max(dev) ({ const struct can_timing * syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_CAN_GET_TIMING_MAX, can_get_timing_max, dev); syscall__retval = can_get_timing_max(dev); sys_port_trace_syscall_exit(K_SYSCALL_CAN_GET_TIMING_MAX, can_get_timing_max, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_can_calc_timing(const struct device * dev, struct can_timing * res, uint32_t bitrate, uint16_t sample_pnt); + +__pinned_func +static inline int can_calc_timing(const struct device * dev, struct can_timing * res, uint32_t bitrate, uint16_t sample_pnt) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; struct can_timing * val; } parm1 = { .val = res }; + union { uintptr_t x; uint32_t val; } parm2 = { .val = bitrate }; + union { uintptr_t x; uint16_t val; } parm3 = { .val = sample_pnt }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_CAN_CALC_TIMING); + } +#endif + compiler_barrier(); + return z_impl_can_calc_timing(dev, res, bitrate, sample_pnt); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define can_calc_timing(dev, res, bitrate, sample_pnt) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_CAN_CALC_TIMING, can_calc_timing, dev, res, bitrate, sample_pnt); syscall__retval = can_calc_timing(dev, res, bitrate, sample_pnt); sys_port_trace_syscall_exit(K_SYSCALL_CAN_CALC_TIMING, can_calc_timing, dev, res, bitrate, sample_pnt, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern const struct can_timing * z_impl_can_get_timing_data_min(const struct device * dev); + +__pinned_func +static inline const struct can_timing * can_get_timing_data_min(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (const struct can_timing *) arch_syscall_invoke1(parm0.x, K_SYSCALL_CAN_GET_TIMING_DATA_MIN); + } +#endif + compiler_barrier(); + return z_impl_can_get_timing_data_min(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define can_get_timing_data_min(dev) ({ const struct can_timing * syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_CAN_GET_TIMING_DATA_MIN, can_get_timing_data_min, dev); syscall__retval = can_get_timing_data_min(dev); sys_port_trace_syscall_exit(K_SYSCALL_CAN_GET_TIMING_DATA_MIN, can_get_timing_data_min, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern const struct can_timing * z_impl_can_get_timing_data_max(const struct device * dev); + +__pinned_func +static inline const struct can_timing * can_get_timing_data_max(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (const struct can_timing *) arch_syscall_invoke1(parm0.x, K_SYSCALL_CAN_GET_TIMING_DATA_MAX); + } +#endif + compiler_barrier(); + return z_impl_can_get_timing_data_max(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define can_get_timing_data_max(dev) ({ const struct can_timing * syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_CAN_GET_TIMING_DATA_MAX, can_get_timing_data_max, dev); syscall__retval = can_get_timing_data_max(dev); sys_port_trace_syscall_exit(K_SYSCALL_CAN_GET_TIMING_DATA_MAX, can_get_timing_data_max, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_can_calc_timing_data(const struct device * dev, struct can_timing * res, uint32_t bitrate, uint16_t sample_pnt); + +__pinned_func +static inline int can_calc_timing_data(const struct device * dev, struct can_timing * res, uint32_t bitrate, uint16_t sample_pnt) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; struct can_timing * val; } parm1 = { .val = res }; + union { uintptr_t x; uint32_t val; } parm2 = { .val = bitrate }; + union { uintptr_t x; uint16_t val; } parm3 = { .val = sample_pnt }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_CAN_CALC_TIMING_DATA); + } +#endif + compiler_barrier(); + return z_impl_can_calc_timing_data(dev, res, bitrate, sample_pnt); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define can_calc_timing_data(dev, res, bitrate, sample_pnt) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_CAN_CALC_TIMING_DATA, can_calc_timing_data, dev, res, bitrate, sample_pnt); syscall__retval = can_calc_timing_data(dev, res, bitrate, sample_pnt); sys_port_trace_syscall_exit(K_SYSCALL_CAN_CALC_TIMING_DATA, can_calc_timing_data, dev, res, bitrate, sample_pnt, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_can_set_timing_data(const struct device * dev, const struct can_timing * timing_data); + +__pinned_func +static inline int can_set_timing_data(const struct device * dev, const struct can_timing * timing_data) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; const struct can_timing * val; } parm1 = { .val = timing_data }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_CAN_SET_TIMING_DATA); + } +#endif + compiler_barrier(); + return z_impl_can_set_timing_data(dev, timing_data); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define can_set_timing_data(dev, timing_data) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_CAN_SET_TIMING_DATA, can_set_timing_data, dev, timing_data); syscall__retval = can_set_timing_data(dev, timing_data); sys_port_trace_syscall_exit(K_SYSCALL_CAN_SET_TIMING_DATA, can_set_timing_data, dev, timing_data, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_can_set_bitrate_data(const struct device * dev, uint32_t bitrate_data); + +__pinned_func +static inline int can_set_bitrate_data(const struct device * dev, uint32_t bitrate_data) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = bitrate_data }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_CAN_SET_BITRATE_DATA); + } +#endif + compiler_barrier(); + return z_impl_can_set_bitrate_data(dev, bitrate_data); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define can_set_bitrate_data(dev, bitrate_data) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_CAN_SET_BITRATE_DATA, can_set_bitrate_data, dev, bitrate_data); syscall__retval = can_set_bitrate_data(dev, bitrate_data); sys_port_trace_syscall_exit(K_SYSCALL_CAN_SET_BITRATE_DATA, can_set_bitrate_data, dev, bitrate_data, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_can_set_timing(const struct device * dev, const struct can_timing * timing); + +__pinned_func +static inline int can_set_timing(const struct device * dev, const struct can_timing * timing) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; const struct can_timing * val; } parm1 = { .val = timing }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_CAN_SET_TIMING); + } +#endif + compiler_barrier(); + return z_impl_can_set_timing(dev, timing); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define can_set_timing(dev, timing) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_CAN_SET_TIMING, can_set_timing, dev, timing); syscall__retval = can_set_timing(dev, timing); sys_port_trace_syscall_exit(K_SYSCALL_CAN_SET_TIMING, can_set_timing, dev, timing, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_can_get_capabilities(const struct device * dev, can_mode_t * cap); + +__pinned_func +static inline int can_get_capabilities(const struct device * dev, can_mode_t * cap) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; can_mode_t * val; } parm1 = { .val = cap }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_CAN_GET_CAPABILITIES); + } +#endif + compiler_barrier(); + return z_impl_can_get_capabilities(dev, cap); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define can_get_capabilities(dev, cap) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_CAN_GET_CAPABILITIES, can_get_capabilities, dev, cap); syscall__retval = can_get_capabilities(dev, cap); sys_port_trace_syscall_exit(K_SYSCALL_CAN_GET_CAPABILITIES, can_get_capabilities, dev, cap, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern const struct device * z_impl_can_get_transceiver(const struct device * dev); + +__pinned_func +static inline const struct device * can_get_transceiver(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (const struct device *) arch_syscall_invoke1(parm0.x, K_SYSCALL_CAN_GET_TRANSCEIVER); + } +#endif + compiler_barrier(); + return z_impl_can_get_transceiver(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define can_get_transceiver(dev) ({ const struct device * syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_CAN_GET_TRANSCEIVER, can_get_transceiver, dev); syscall__retval = can_get_transceiver(dev); sys_port_trace_syscall_exit(K_SYSCALL_CAN_GET_TRANSCEIVER, can_get_transceiver, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_can_start(const struct device * dev); + +__pinned_func +static inline int can_start(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_CAN_START); + } +#endif + compiler_barrier(); + return z_impl_can_start(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define can_start(dev) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_CAN_START, can_start, dev); syscall__retval = can_start(dev); sys_port_trace_syscall_exit(K_SYSCALL_CAN_START, can_start, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_can_stop(const struct device * dev); + +__pinned_func +static inline int can_stop(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_CAN_STOP); + } +#endif + compiler_barrier(); + return z_impl_can_stop(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define can_stop(dev) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_CAN_STOP, can_stop, dev); syscall__retval = can_stop(dev); sys_port_trace_syscall_exit(K_SYSCALL_CAN_STOP, can_stop, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_can_set_mode(const struct device * dev, can_mode_t mode); + +__pinned_func +static inline int can_set_mode(const struct device * dev, can_mode_t mode) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; can_mode_t val; } parm1 = { .val = mode }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_CAN_SET_MODE); + } +#endif + compiler_barrier(); + return z_impl_can_set_mode(dev, mode); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define can_set_mode(dev, mode) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_CAN_SET_MODE, can_set_mode, dev, mode); syscall__retval = can_set_mode(dev, mode); sys_port_trace_syscall_exit(K_SYSCALL_CAN_SET_MODE, can_set_mode, dev, mode, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern can_mode_t z_impl_can_get_mode(const struct device * dev); + +__pinned_func +static inline can_mode_t can_get_mode(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (can_mode_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_CAN_GET_MODE); + } +#endif + compiler_barrier(); + return z_impl_can_get_mode(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define can_get_mode(dev) ({ can_mode_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_CAN_GET_MODE, can_get_mode, dev); syscall__retval = can_get_mode(dev); sys_port_trace_syscall_exit(K_SYSCALL_CAN_GET_MODE, can_get_mode, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_can_set_bitrate(const struct device * dev, uint32_t bitrate); + +__pinned_func +static inline int can_set_bitrate(const struct device * dev, uint32_t bitrate) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = bitrate }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_CAN_SET_BITRATE); + } +#endif + compiler_barrier(); + return z_impl_can_set_bitrate(dev, bitrate); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define can_set_bitrate(dev, bitrate) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_CAN_SET_BITRATE, can_set_bitrate, dev, bitrate); syscall__retval = can_set_bitrate(dev, bitrate); sys_port_trace_syscall_exit(K_SYSCALL_CAN_SET_BITRATE, can_set_bitrate, dev, bitrate, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_can_send(const struct device * dev, const struct can_frame * frame, k_timeout_t timeout, can_tx_callback_t callback, void * user_data); + +__pinned_func +static inline int can_send(const struct device * dev, const struct can_frame * frame, k_timeout_t timeout, can_tx_callback_t callback, void * user_data) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; const struct can_frame * val; } parm1 = { .val = frame }; + union { struct { uintptr_t lo, hi; } split; k_timeout_t val; } parm2 = { .val = timeout }; + union { uintptr_t x; can_tx_callback_t val; } parm3 = { .val = callback }; + union { uintptr_t x; void * val; } parm4 = { .val = user_data }; + return (int) arch_syscall_invoke6(parm0.x, parm1.x, parm2.split.lo, parm2.split.hi, parm3.x, parm4.x, K_SYSCALL_CAN_SEND); + } +#endif + compiler_barrier(); + return z_impl_can_send(dev, frame, timeout, callback, user_data); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define can_send(dev, frame, timeout, callback, user_data) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_CAN_SEND, can_send, dev, frame, timeout, callback, user_data); syscall__retval = can_send(dev, frame, timeout, callback, user_data); sys_port_trace_syscall_exit(K_SYSCALL_CAN_SEND, can_send, dev, frame, timeout, callback, user_data, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_can_add_rx_filter_msgq(const struct device * dev, struct k_msgq * msgq, const struct can_filter * filter); + +__pinned_func +static inline int can_add_rx_filter_msgq(const struct device * dev, struct k_msgq * msgq, const struct can_filter * filter) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; struct k_msgq * val; } parm1 = { .val = msgq }; + union { uintptr_t x; const struct can_filter * val; } parm2 = { .val = filter }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_CAN_ADD_RX_FILTER_MSGQ); + } +#endif + compiler_barrier(); + return z_impl_can_add_rx_filter_msgq(dev, msgq, filter); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define can_add_rx_filter_msgq(dev, msgq, filter) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_CAN_ADD_RX_FILTER_MSGQ, can_add_rx_filter_msgq, dev, msgq, filter); syscall__retval = can_add_rx_filter_msgq(dev, msgq, filter); sys_port_trace_syscall_exit(K_SYSCALL_CAN_ADD_RX_FILTER_MSGQ, can_add_rx_filter_msgq, dev, msgq, filter, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern void z_impl_can_remove_rx_filter(const struct device * dev, int filter_id); + +__pinned_func +static inline void can_remove_rx_filter(const struct device * dev, int filter_id) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; int val; } parm1 = { .val = filter_id }; + (void) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_CAN_REMOVE_RX_FILTER); + return; + } +#endif + compiler_barrier(); + z_impl_can_remove_rx_filter(dev, filter_id); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define can_remove_rx_filter(dev, filter_id) do { sys_port_trace_syscall_enter(K_SYSCALL_CAN_REMOVE_RX_FILTER, can_remove_rx_filter, dev, filter_id); can_remove_rx_filter(dev, filter_id); sys_port_trace_syscall_exit(K_SYSCALL_CAN_REMOVE_RX_FILTER, can_remove_rx_filter, dev, filter_id); } while(false) +#endif +#endif + + +extern int z_impl_can_get_max_filters(const struct device * dev, bool ide); + +__pinned_func +static inline int can_get_max_filters(const struct device * dev, bool ide) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; bool val; } parm1 = { .val = ide }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_CAN_GET_MAX_FILTERS); + } +#endif + compiler_barrier(); + return z_impl_can_get_max_filters(dev, ide); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define can_get_max_filters(dev, ide) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_CAN_GET_MAX_FILTERS, can_get_max_filters, dev, ide); syscall__retval = can_get_max_filters(dev, ide); sys_port_trace_syscall_exit(K_SYSCALL_CAN_GET_MAX_FILTERS, can_get_max_filters, dev, ide, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_can_get_state(const struct device * dev, enum can_state * state, struct can_bus_err_cnt * err_cnt); + +__pinned_func +static inline int can_get_state(const struct device * dev, enum can_state * state, struct can_bus_err_cnt * err_cnt) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; enum can_state * val; } parm1 = { .val = state }; + union { uintptr_t x; struct can_bus_err_cnt * val; } parm2 = { .val = err_cnt }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_CAN_GET_STATE); + } +#endif + compiler_barrier(); + return z_impl_can_get_state(dev, state, err_cnt); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define can_get_state(dev, state, err_cnt) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_CAN_GET_STATE, can_get_state, dev, state, err_cnt); syscall__retval = can_get_state(dev, state, err_cnt); sys_port_trace_syscall_exit(K_SYSCALL_CAN_GET_STATE, can_get_state, dev, state, err_cnt, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_can_recover(const struct device * dev, k_timeout_t timeout); + +__pinned_func +static inline int can_recover(const struct device * dev, k_timeout_t timeout) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { struct { uintptr_t lo, hi; } split; k_timeout_t val; } parm1 = { .val = timeout }; + return (int) arch_syscall_invoke3(parm0.x, parm1.split.lo, parm1.split.hi, K_SYSCALL_CAN_RECOVER); + } +#endif + compiler_barrier(); + return z_impl_can_recover(dev, timeout); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define can_recover(dev, timeout) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_CAN_RECOVER, can_recover, dev, timeout); syscall__retval = can_recover(dev, timeout); sys_port_trace_syscall_exit(K_SYSCALL_CAN_RECOVER, can_recover, dev, timeout, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern uint32_t z_impl_can_stats_get_bit_errors(const struct device * dev); + +__pinned_func +static inline uint32_t can_stats_get_bit_errors(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (uint32_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_CAN_STATS_GET_BIT_ERRORS); + } +#endif + compiler_barrier(); + return z_impl_can_stats_get_bit_errors(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define can_stats_get_bit_errors(dev) ({ uint32_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_CAN_STATS_GET_BIT_ERRORS, can_stats_get_bit_errors, dev); syscall__retval = can_stats_get_bit_errors(dev); sys_port_trace_syscall_exit(K_SYSCALL_CAN_STATS_GET_BIT_ERRORS, can_stats_get_bit_errors, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern uint32_t z_impl_can_stats_get_bit0_errors(const struct device * dev); + +__pinned_func +static inline uint32_t can_stats_get_bit0_errors(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (uint32_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_CAN_STATS_GET_BIT0_ERRORS); + } +#endif + compiler_barrier(); + return z_impl_can_stats_get_bit0_errors(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define can_stats_get_bit0_errors(dev) ({ uint32_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_CAN_STATS_GET_BIT0_ERRORS, can_stats_get_bit0_errors, dev); syscall__retval = can_stats_get_bit0_errors(dev); sys_port_trace_syscall_exit(K_SYSCALL_CAN_STATS_GET_BIT0_ERRORS, can_stats_get_bit0_errors, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern uint32_t z_impl_can_stats_get_bit1_errors(const struct device * dev); + +__pinned_func +static inline uint32_t can_stats_get_bit1_errors(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (uint32_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_CAN_STATS_GET_BIT1_ERRORS); + } +#endif + compiler_barrier(); + return z_impl_can_stats_get_bit1_errors(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define can_stats_get_bit1_errors(dev) ({ uint32_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_CAN_STATS_GET_BIT1_ERRORS, can_stats_get_bit1_errors, dev); syscall__retval = can_stats_get_bit1_errors(dev); sys_port_trace_syscall_exit(K_SYSCALL_CAN_STATS_GET_BIT1_ERRORS, can_stats_get_bit1_errors, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern uint32_t z_impl_can_stats_get_stuff_errors(const struct device * dev); + +__pinned_func +static inline uint32_t can_stats_get_stuff_errors(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (uint32_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_CAN_STATS_GET_STUFF_ERRORS); + } +#endif + compiler_barrier(); + return z_impl_can_stats_get_stuff_errors(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define can_stats_get_stuff_errors(dev) ({ uint32_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_CAN_STATS_GET_STUFF_ERRORS, can_stats_get_stuff_errors, dev); syscall__retval = can_stats_get_stuff_errors(dev); sys_port_trace_syscall_exit(K_SYSCALL_CAN_STATS_GET_STUFF_ERRORS, can_stats_get_stuff_errors, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern uint32_t z_impl_can_stats_get_crc_errors(const struct device * dev); + +__pinned_func +static inline uint32_t can_stats_get_crc_errors(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (uint32_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_CAN_STATS_GET_CRC_ERRORS); + } +#endif + compiler_barrier(); + return z_impl_can_stats_get_crc_errors(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define can_stats_get_crc_errors(dev) ({ uint32_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_CAN_STATS_GET_CRC_ERRORS, can_stats_get_crc_errors, dev); syscall__retval = can_stats_get_crc_errors(dev); sys_port_trace_syscall_exit(K_SYSCALL_CAN_STATS_GET_CRC_ERRORS, can_stats_get_crc_errors, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern uint32_t z_impl_can_stats_get_form_errors(const struct device * dev); + +__pinned_func +static inline uint32_t can_stats_get_form_errors(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (uint32_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_CAN_STATS_GET_FORM_ERRORS); + } +#endif + compiler_barrier(); + return z_impl_can_stats_get_form_errors(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define can_stats_get_form_errors(dev) ({ uint32_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_CAN_STATS_GET_FORM_ERRORS, can_stats_get_form_errors, dev); syscall__retval = can_stats_get_form_errors(dev); sys_port_trace_syscall_exit(K_SYSCALL_CAN_STATS_GET_FORM_ERRORS, can_stats_get_form_errors, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern uint32_t z_impl_can_stats_get_ack_errors(const struct device * dev); + +__pinned_func +static inline uint32_t can_stats_get_ack_errors(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (uint32_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_CAN_STATS_GET_ACK_ERRORS); + } +#endif + compiler_barrier(); + return z_impl_can_stats_get_ack_errors(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define can_stats_get_ack_errors(dev) ({ uint32_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_CAN_STATS_GET_ACK_ERRORS, can_stats_get_ack_errors, dev); syscall__retval = can_stats_get_ack_errors(dev); sys_port_trace_syscall_exit(K_SYSCALL_CAN_STATS_GET_ACK_ERRORS, can_stats_get_ack_errors, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern uint32_t z_impl_can_stats_get_rx_overruns(const struct device * dev); + +__pinned_func +static inline uint32_t can_stats_get_rx_overruns(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (uint32_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_CAN_STATS_GET_RX_OVERRUNS); + } +#endif + compiler_barrier(); + return z_impl_can_stats_get_rx_overruns(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define can_stats_get_rx_overruns(dev) ({ uint32_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_CAN_STATS_GET_RX_OVERRUNS, can_stats_get_rx_overruns, dev); syscall__retval = can_stats_get_rx_overruns(dev); sys_port_trace_syscall_exit(K_SYSCALL_CAN_STATS_GET_RX_OVERRUNS, can_stats_get_rx_overruns, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/charger.h b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/charger.h new file mode 100644 index 0000000..c61582f --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/charger.h @@ -0,0 +1,102 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_CHARGER_H +#define Z_INCLUDE_SYSCALLS_CHARGER_H + + +#include <zephyr/tracing/tracing_syscall.h> + +#ifndef _ASMLANGUAGE + +#include <stdarg.h> + +#include <syscall_list.h> +#include <zephyr/syscall.h> + +#include <zephyr/linker/sections.h> + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_charger_get_prop(const struct device * dev, const charger_prop_t prop, union charger_propval * val); + +__pinned_func +static inline int charger_get_prop(const struct device * dev, const charger_prop_t prop, union charger_propval * val) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; const charger_prop_t val; } parm1 = { .val = prop }; + union { uintptr_t x; union charger_propval * val; } parm2 = { .val = val }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_CHARGER_GET_PROP); + } +#endif + compiler_barrier(); + return z_impl_charger_get_prop(dev, prop, val); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define charger_get_prop(dev, prop, val) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_CHARGER_GET_PROP, charger_get_prop, dev, prop, val); syscall__retval = charger_get_prop(dev, prop, val); sys_port_trace_syscall_exit(K_SYSCALL_CHARGER_GET_PROP, charger_get_prop, dev, prop, val, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_charger_set_prop(const struct device * dev, const charger_prop_t prop, const union charger_propval * val); + +__pinned_func +static inline int charger_set_prop(const struct device * dev, const charger_prop_t prop, const union charger_propval * val) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; const charger_prop_t val; } parm1 = { .val = prop }; + union { uintptr_t x; const union charger_propval * val; } parm2 = { .val = val }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_CHARGER_SET_PROP); + } +#endif + compiler_barrier(); + return z_impl_charger_set_prop(dev, prop, val); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define charger_set_prop(dev, prop, val) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_CHARGER_SET_PROP, charger_set_prop, dev, prop, val); syscall__retval = charger_set_prop(dev, prop, val); sys_port_trace_syscall_exit(K_SYSCALL_CHARGER_SET_PROP, charger_set_prop, dev, prop, val, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_charger_charge_enable(const struct device * dev, const bool enable); + +__pinned_func +static inline int charger_charge_enable(const struct device * dev, const bool enable) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; const bool val; } parm1 = { .val = enable }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_CHARGER_CHARGE_ENABLE); + } +#endif + compiler_barrier(); + return z_impl_charger_charge_enable(dev, enable); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define charger_charge_enable(dev, enable) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_CHARGER_CHARGE_ENABLE, charger_charge_enable, dev, enable); syscall__retval = charger_charge_enable(dev, enable); sys_port_trace_syscall_exit(K_SYSCALL_CHARGER_CHARGE_ENABLE, charger_charge_enable, dev, enable, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/counter.h b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/counter.h new file mode 100644 index 0000000..6fe95d7 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/counter.h @@ -0,0 +1,432 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_COUNTER_H +#define Z_INCLUDE_SYSCALLS_COUNTER_H + + +#include <zephyr/tracing/tracing_syscall.h> + +#ifndef _ASMLANGUAGE + +#include <stdarg.h> + +#include <syscall_list.h> +#include <zephyr/syscall.h> + +#include <zephyr/linker/sections.h> + + +#ifdef __cplusplus +extern "C" { +#endif + +extern bool z_impl_counter_is_counting_up(const struct device * dev); + +__pinned_func +static inline bool counter_is_counting_up(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (bool) arch_syscall_invoke1(parm0.x, K_SYSCALL_COUNTER_IS_COUNTING_UP); + } +#endif + compiler_barrier(); + return z_impl_counter_is_counting_up(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define counter_is_counting_up(dev) ({ bool syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_COUNTER_IS_COUNTING_UP, counter_is_counting_up, dev); syscall__retval = counter_is_counting_up(dev); sys_port_trace_syscall_exit(K_SYSCALL_COUNTER_IS_COUNTING_UP, counter_is_counting_up, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern uint8_t z_impl_counter_get_num_of_channels(const struct device * dev); + +__pinned_func +static inline uint8_t counter_get_num_of_channels(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (uint8_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_COUNTER_GET_NUM_OF_CHANNELS); + } +#endif + compiler_barrier(); + return z_impl_counter_get_num_of_channels(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define counter_get_num_of_channels(dev) ({ uint8_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_COUNTER_GET_NUM_OF_CHANNELS, counter_get_num_of_channels, dev); syscall__retval = counter_get_num_of_channels(dev); sys_port_trace_syscall_exit(K_SYSCALL_COUNTER_GET_NUM_OF_CHANNELS, counter_get_num_of_channels, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern uint32_t z_impl_counter_get_frequency(const struct device * dev); + +__pinned_func +static inline uint32_t counter_get_frequency(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (uint32_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_COUNTER_GET_FREQUENCY); + } +#endif + compiler_barrier(); + return z_impl_counter_get_frequency(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define counter_get_frequency(dev) ({ uint32_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_COUNTER_GET_FREQUENCY, counter_get_frequency, dev); syscall__retval = counter_get_frequency(dev); sys_port_trace_syscall_exit(K_SYSCALL_COUNTER_GET_FREQUENCY, counter_get_frequency, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern uint32_t z_impl_counter_us_to_ticks(const struct device * dev, uint64_t us); + +__pinned_func +static inline uint32_t counter_us_to_ticks(const struct device * dev, uint64_t us) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { struct { uintptr_t lo, hi; } split; uint64_t val; } parm1 = { .val = us }; + return (uint32_t) arch_syscall_invoke3(parm0.x, parm1.split.lo, parm1.split.hi, K_SYSCALL_COUNTER_US_TO_TICKS); + } +#endif + compiler_barrier(); + return z_impl_counter_us_to_ticks(dev, us); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define counter_us_to_ticks(dev, us) ({ uint32_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_COUNTER_US_TO_TICKS, counter_us_to_ticks, dev, us); syscall__retval = counter_us_to_ticks(dev, us); sys_port_trace_syscall_exit(K_SYSCALL_COUNTER_US_TO_TICKS, counter_us_to_ticks, dev, us, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern uint64_t z_impl_counter_ticks_to_us(const struct device * dev, uint32_t ticks); + +__pinned_func +static inline uint64_t counter_ticks_to_us(const struct device * dev, uint32_t ticks) +{ +#ifdef CONFIG_USERSPACE + uint64_t ret64; + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = ticks }; + (void) arch_syscall_invoke3(parm0.x, parm1.x, (uintptr_t)&ret64, K_SYSCALL_COUNTER_TICKS_TO_US); + return (uint64_t) ret64; + } +#endif + compiler_barrier(); + return z_impl_counter_ticks_to_us(dev, ticks); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define counter_ticks_to_us(dev, ticks) ({ uint64_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_COUNTER_TICKS_TO_US, counter_ticks_to_us, dev, ticks); syscall__retval = counter_ticks_to_us(dev, ticks); sys_port_trace_syscall_exit(K_SYSCALL_COUNTER_TICKS_TO_US, counter_ticks_to_us, dev, ticks, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern uint32_t z_impl_counter_get_max_top_value(const struct device * dev); + +__pinned_func +static inline uint32_t counter_get_max_top_value(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (uint32_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_COUNTER_GET_MAX_TOP_VALUE); + } +#endif + compiler_barrier(); + return z_impl_counter_get_max_top_value(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define counter_get_max_top_value(dev) ({ uint32_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_COUNTER_GET_MAX_TOP_VALUE, counter_get_max_top_value, dev); syscall__retval = counter_get_max_top_value(dev); sys_port_trace_syscall_exit(K_SYSCALL_COUNTER_GET_MAX_TOP_VALUE, counter_get_max_top_value, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_counter_start(const struct device * dev); + +__pinned_func +static inline int counter_start(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_COUNTER_START); + } +#endif + compiler_barrier(); + return z_impl_counter_start(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define counter_start(dev) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_COUNTER_START, counter_start, dev); syscall__retval = counter_start(dev); sys_port_trace_syscall_exit(K_SYSCALL_COUNTER_START, counter_start, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_counter_stop(const struct device * dev); + +__pinned_func +static inline int counter_stop(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_COUNTER_STOP); + } +#endif + compiler_barrier(); + return z_impl_counter_stop(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define counter_stop(dev) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_COUNTER_STOP, counter_stop, dev); syscall__retval = counter_stop(dev); sys_port_trace_syscall_exit(K_SYSCALL_COUNTER_STOP, counter_stop, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_counter_get_value(const struct device * dev, uint32_t * ticks); + +__pinned_func +static inline int counter_get_value(const struct device * dev, uint32_t * ticks) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t * val; } parm1 = { .val = ticks }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_COUNTER_GET_VALUE); + } +#endif + compiler_barrier(); + return z_impl_counter_get_value(dev, ticks); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define counter_get_value(dev, ticks) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_COUNTER_GET_VALUE, counter_get_value, dev, ticks); syscall__retval = counter_get_value(dev, ticks); sys_port_trace_syscall_exit(K_SYSCALL_COUNTER_GET_VALUE, counter_get_value, dev, ticks, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_counter_get_value_64(const struct device * dev, uint64_t * ticks); + +__pinned_func +static inline int counter_get_value_64(const struct device * dev, uint64_t * ticks) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint64_t * val; } parm1 = { .val = ticks }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_COUNTER_GET_VALUE_64); + } +#endif + compiler_barrier(); + return z_impl_counter_get_value_64(dev, ticks); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define counter_get_value_64(dev, ticks) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_COUNTER_GET_VALUE_64, counter_get_value_64, dev, ticks); syscall__retval = counter_get_value_64(dev, ticks); sys_port_trace_syscall_exit(K_SYSCALL_COUNTER_GET_VALUE_64, counter_get_value_64, dev, ticks, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_counter_set_channel_alarm(const struct device * dev, uint8_t chan_id, const struct counter_alarm_cfg * alarm_cfg); + +__pinned_func +static inline int counter_set_channel_alarm(const struct device * dev, uint8_t chan_id, const struct counter_alarm_cfg * alarm_cfg) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint8_t val; } parm1 = { .val = chan_id }; + union { uintptr_t x; const struct counter_alarm_cfg * val; } parm2 = { .val = alarm_cfg }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_COUNTER_SET_CHANNEL_ALARM); + } +#endif + compiler_barrier(); + return z_impl_counter_set_channel_alarm(dev, chan_id, alarm_cfg); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define counter_set_channel_alarm(dev, chan_id, alarm_cfg) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_COUNTER_SET_CHANNEL_ALARM, counter_set_channel_alarm, dev, chan_id, alarm_cfg); syscall__retval = counter_set_channel_alarm(dev, chan_id, alarm_cfg); sys_port_trace_syscall_exit(K_SYSCALL_COUNTER_SET_CHANNEL_ALARM, counter_set_channel_alarm, dev, chan_id, alarm_cfg, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_counter_cancel_channel_alarm(const struct device * dev, uint8_t chan_id); + +__pinned_func +static inline int counter_cancel_channel_alarm(const struct device * dev, uint8_t chan_id) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint8_t val; } parm1 = { .val = chan_id }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_COUNTER_CANCEL_CHANNEL_ALARM); + } +#endif + compiler_barrier(); + return z_impl_counter_cancel_channel_alarm(dev, chan_id); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define counter_cancel_channel_alarm(dev, chan_id) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_COUNTER_CANCEL_CHANNEL_ALARM, counter_cancel_channel_alarm, dev, chan_id); syscall__retval = counter_cancel_channel_alarm(dev, chan_id); sys_port_trace_syscall_exit(K_SYSCALL_COUNTER_CANCEL_CHANNEL_ALARM, counter_cancel_channel_alarm, dev, chan_id, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_counter_set_top_value(const struct device * dev, const struct counter_top_cfg * cfg); + +__pinned_func +static inline int counter_set_top_value(const struct device * dev, const struct counter_top_cfg * cfg) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; const struct counter_top_cfg * val; } parm1 = { .val = cfg }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_COUNTER_SET_TOP_VALUE); + } +#endif + compiler_barrier(); + return z_impl_counter_set_top_value(dev, cfg); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define counter_set_top_value(dev, cfg) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_COUNTER_SET_TOP_VALUE, counter_set_top_value, dev, cfg); syscall__retval = counter_set_top_value(dev, cfg); sys_port_trace_syscall_exit(K_SYSCALL_COUNTER_SET_TOP_VALUE, counter_set_top_value, dev, cfg, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_counter_get_pending_int(const struct device * dev); + +__pinned_func +static inline int counter_get_pending_int(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_COUNTER_GET_PENDING_INT); + } +#endif + compiler_barrier(); + return z_impl_counter_get_pending_int(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define counter_get_pending_int(dev) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_COUNTER_GET_PENDING_INT, counter_get_pending_int, dev); syscall__retval = counter_get_pending_int(dev); sys_port_trace_syscall_exit(K_SYSCALL_COUNTER_GET_PENDING_INT, counter_get_pending_int, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern uint32_t z_impl_counter_get_top_value(const struct device * dev); + +__pinned_func +static inline uint32_t counter_get_top_value(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (uint32_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_COUNTER_GET_TOP_VALUE); + } +#endif + compiler_barrier(); + return z_impl_counter_get_top_value(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define counter_get_top_value(dev) ({ uint32_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_COUNTER_GET_TOP_VALUE, counter_get_top_value, dev); syscall__retval = counter_get_top_value(dev); sys_port_trace_syscall_exit(K_SYSCALL_COUNTER_GET_TOP_VALUE, counter_get_top_value, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_counter_set_guard_period(const struct device * dev, uint32_t ticks, uint32_t flags); + +__pinned_func +static inline int counter_set_guard_period(const struct device * dev, uint32_t ticks, uint32_t flags) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = ticks }; + union { uintptr_t x; uint32_t val; } parm2 = { .val = flags }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_COUNTER_SET_GUARD_PERIOD); + } +#endif + compiler_barrier(); + return z_impl_counter_set_guard_period(dev, ticks, flags); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define counter_set_guard_period(dev, ticks, flags) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_COUNTER_SET_GUARD_PERIOD, counter_set_guard_period, dev, ticks, flags); syscall__retval = counter_set_guard_period(dev, ticks, flags); sys_port_trace_syscall_exit(K_SYSCALL_COUNTER_SET_GUARD_PERIOD, counter_set_guard_period, dev, ticks, flags, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern uint32_t z_impl_counter_get_guard_period(const struct device * dev, uint32_t flags); + +__pinned_func +static inline uint32_t counter_get_guard_period(const struct device * dev, uint32_t flags) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = flags }; + return (uint32_t) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_COUNTER_GET_GUARD_PERIOD); + } +#endif + compiler_barrier(); + return z_impl_counter_get_guard_period(dev, flags); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define counter_get_guard_period(dev, flags) ({ uint32_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_COUNTER_GET_GUARD_PERIOD, counter_get_guard_period, dev, flags); syscall__retval = counter_get_guard_period(dev, flags); sys_port_trace_syscall_exit(K_SYSCALL_COUNTER_GET_GUARD_PERIOD, counter_get_guard_period, dev, flags, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/dac.h b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/dac.h new file mode 100644 index 0000000..9a23aae --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/dac.h @@ -0,0 +1,77 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_DAC_H +#define Z_INCLUDE_SYSCALLS_DAC_H + + +#include <zephyr/tracing/tracing_syscall.h> + +#ifndef _ASMLANGUAGE + +#include <stdarg.h> + +#include <syscall_list.h> +#include <zephyr/syscall.h> + +#include <zephyr/linker/sections.h> + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_dac_channel_setup(const struct device * dev, const struct dac_channel_cfg * channel_cfg); + +__pinned_func +static inline int dac_channel_setup(const struct device * dev, const struct dac_channel_cfg * channel_cfg) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; const struct dac_channel_cfg * val; } parm1 = { .val = channel_cfg }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_DAC_CHANNEL_SETUP); + } +#endif + compiler_barrier(); + return z_impl_dac_channel_setup(dev, channel_cfg); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define dac_channel_setup(dev, channel_cfg) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_DAC_CHANNEL_SETUP, dac_channel_setup, dev, channel_cfg); syscall__retval = dac_channel_setup(dev, channel_cfg); sys_port_trace_syscall_exit(K_SYSCALL_DAC_CHANNEL_SETUP, dac_channel_setup, dev, channel_cfg, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_dac_write_value(const struct device * dev, uint8_t channel, uint32_t value); + +__pinned_func +static inline int dac_write_value(const struct device * dev, uint8_t channel, uint32_t value) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint8_t val; } parm1 = { .val = channel }; + union { uintptr_t x; uint32_t val; } parm2 = { .val = value }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_DAC_WRITE_VALUE); + } +#endif + compiler_barrier(); + return z_impl_dac_write_value(dev, channel, value); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define dac_write_value(dev, channel, value) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_DAC_WRITE_VALUE, dac_write_value, dev, channel, value); syscall__retval = dac_write_value(dev, channel, value); sys_port_trace_syscall_exit(K_SYSCALL_DAC_WRITE_VALUE, dac_write_value, dev, channel, value, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/demand_paging.h b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/demand_paging.h new file mode 100644 index 0000000..15eb89c --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/demand_paging.h @@ -0,0 +1,149 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_DEMAND_PAGING_H +#define Z_INCLUDE_SYSCALLS_DEMAND_PAGING_H + + +#include <zephyr/tracing/tracing_syscall.h> + +#ifndef _ASMLANGUAGE + +#include <stdarg.h> + +#include <syscall_list.h> +#include <zephyr/syscall.h> + +#include <zephyr/linker/sections.h> + + +#ifdef __cplusplus +extern "C" { +#endif + +extern void z_impl_k_mem_paging_stats_get(struct k_mem_paging_stats_t * stats); + +__pinned_func +static inline void k_mem_paging_stats_get(struct k_mem_paging_stats_t * stats) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_mem_paging_stats_t * val; } parm0 = { .val = stats }; + (void) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_MEM_PAGING_STATS_GET); + return; + } +#endif + compiler_barrier(); + z_impl_k_mem_paging_stats_get(stats); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define k_mem_paging_stats_get(stats) do { sys_port_trace_syscall_enter(K_SYSCALL_K_MEM_PAGING_STATS_GET, k_mem_paging_stats_get, stats); k_mem_paging_stats_get(stats); sys_port_trace_syscall_exit(K_SYSCALL_K_MEM_PAGING_STATS_GET, k_mem_paging_stats_get, stats); } while(false) +#endif +#endif + + +extern void z_impl_k_mem_paging_thread_stats_get(struct k_thread * thread, struct k_mem_paging_stats_t * stats); + +__pinned_func +static inline void k_mem_paging_thread_stats_get(struct k_thread * thread, struct k_mem_paging_stats_t * stats) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_thread * val; } parm0 = { .val = thread }; + union { uintptr_t x; struct k_mem_paging_stats_t * val; } parm1 = { .val = stats }; + (void) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_K_MEM_PAGING_THREAD_STATS_GET); + return; + } +#endif + compiler_barrier(); + z_impl_k_mem_paging_thread_stats_get(thread, stats); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define k_mem_paging_thread_stats_get(thread, stats) do { sys_port_trace_syscall_enter(K_SYSCALL_K_MEM_PAGING_THREAD_STATS_GET, k_mem_paging_thread_stats_get, thread, stats); k_mem_paging_thread_stats_get(thread, stats); sys_port_trace_syscall_exit(K_SYSCALL_K_MEM_PAGING_THREAD_STATS_GET, k_mem_paging_thread_stats_get, thread, stats); } while(false) +#endif +#endif + + +extern void z_impl_k_mem_paging_histogram_eviction_get(struct k_mem_paging_histogram_t * hist); + +__pinned_func +static inline void k_mem_paging_histogram_eviction_get(struct k_mem_paging_histogram_t * hist) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_mem_paging_histogram_t * val; } parm0 = { .val = hist }; + (void) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_MEM_PAGING_HISTOGRAM_EVICTION_GET); + return; + } +#endif + compiler_barrier(); + z_impl_k_mem_paging_histogram_eviction_get(hist); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define k_mem_paging_histogram_eviction_get(hist) do { sys_port_trace_syscall_enter(K_SYSCALL_K_MEM_PAGING_HISTOGRAM_EVICTION_GET, k_mem_paging_histogram_eviction_get, hist); k_mem_paging_histogram_eviction_get(hist); sys_port_trace_syscall_exit(K_SYSCALL_K_MEM_PAGING_HISTOGRAM_EVICTION_GET, k_mem_paging_histogram_eviction_get, hist); } while(false) +#endif +#endif + + +extern void z_impl_k_mem_paging_histogram_backing_store_page_in_get(struct k_mem_paging_histogram_t * hist); + +__pinned_func +static inline void k_mem_paging_histogram_backing_store_page_in_get(struct k_mem_paging_histogram_t * hist) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_mem_paging_histogram_t * val; } parm0 = { .val = hist }; + (void) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_MEM_PAGING_HISTOGRAM_BACKING_STORE_PAGE_IN_GET); + return; + } +#endif + compiler_barrier(); + z_impl_k_mem_paging_histogram_backing_store_page_in_get(hist); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define k_mem_paging_histogram_backing_store_page_in_get(hist) do { sys_port_trace_syscall_enter(K_SYSCALL_K_MEM_PAGING_HISTOGRAM_BACKING_STORE_PAGE_IN_GET, k_mem_paging_histogram_backing_store_page_in_get, hist); k_mem_paging_histogram_backing_store_page_in_get(hist); sys_port_trace_syscall_exit(K_SYSCALL_K_MEM_PAGING_HISTOGRAM_BACKING_STORE_PAGE_IN_GET, k_mem_paging_histogram_backing_store_page_in_get, hist); } while(false) +#endif +#endif + + +extern void z_impl_k_mem_paging_histogram_backing_store_page_out_get(struct k_mem_paging_histogram_t * hist); + +__pinned_func +static inline void k_mem_paging_histogram_backing_store_page_out_get(struct k_mem_paging_histogram_t * hist) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_mem_paging_histogram_t * val; } parm0 = { .val = hist }; + (void) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_MEM_PAGING_HISTOGRAM_BACKING_STORE_PAGE_OUT_GET); + return; + } +#endif + compiler_barrier(); + z_impl_k_mem_paging_histogram_backing_store_page_out_get(hist); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define k_mem_paging_histogram_backing_store_page_out_get(hist) do { sys_port_trace_syscall_enter(K_SYSCALL_K_MEM_PAGING_HISTOGRAM_BACKING_STORE_PAGE_OUT_GET, k_mem_paging_histogram_backing_store_page_out_get, hist); k_mem_paging_histogram_backing_store_page_out_get(hist); sys_port_trace_syscall_exit(K_SYSCALL_K_MEM_PAGING_HISTOGRAM_BACKING_STORE_PAGE_OUT_GET, k_mem_paging_histogram_backing_store_page_out_get, hist); } while(false) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/device.h b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/device.h new file mode 100644 index 0000000..9912bd3 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/device.h @@ -0,0 +1,97 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_DEVICE_H +#define Z_INCLUDE_SYSCALLS_DEVICE_H + + +#include <zephyr/tracing/tracing_syscall.h> + +#ifndef _ASMLANGUAGE + +#include <stdarg.h> + +#include <syscall_list.h> +#include <zephyr/syscall.h> + +#include <zephyr/linker/sections.h> + + +#ifdef __cplusplus +extern "C" { +#endif + +extern const struct device * z_impl_device_get_binding(const char * name); + +__pinned_func +static inline const struct device * device_get_binding(const char * name) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const char * val; } parm0 = { .val = name }; + return (const struct device *) arch_syscall_invoke1(parm0.x, K_SYSCALL_DEVICE_GET_BINDING); + } +#endif + compiler_barrier(); + return z_impl_device_get_binding(name); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define device_get_binding(name) ({ const struct device * syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_DEVICE_GET_BINDING, device_get_binding, name); syscall__retval = device_get_binding(name); sys_port_trace_syscall_exit(K_SYSCALL_DEVICE_GET_BINDING, device_get_binding, name, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern bool z_impl_device_is_ready(const struct device * dev); + +__pinned_func +static inline bool device_is_ready(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (bool) arch_syscall_invoke1(parm0.x, K_SYSCALL_DEVICE_IS_READY); + } +#endif + compiler_barrier(); + return z_impl_device_is_ready(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define device_is_ready(dev) ({ bool syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_DEVICE_IS_READY, device_is_ready, dev); syscall__retval = device_is_ready(dev); sys_port_trace_syscall_exit(K_SYSCALL_DEVICE_IS_READY, device_is_ready, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_device_init(const struct device * dev); + +__pinned_func +static inline int device_init(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_DEVICE_INIT); + } +#endif + compiler_barrier(); + return z_impl_device_init(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define device_init(dev) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_DEVICE_INIT, device_init, dev); syscall__retval = device_init(dev); sys_port_trace_syscall_exit(K_SYSCALL_DEVICE_INIT, device_init, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/devmux.h b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/devmux.h new file mode 100644 index 0000000..0b14ab2 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/devmux.h @@ -0,0 +1,75 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_DEVMUX_H +#define Z_INCLUDE_SYSCALLS_DEVMUX_H + + +#include <zephyr/tracing/tracing_syscall.h> + +#ifndef _ASMLANGUAGE + +#include <stdarg.h> + +#include <syscall_list.h> +#include <zephyr/syscall.h> + +#include <zephyr/linker/sections.h> + + +#ifdef __cplusplus +extern "C" { +#endif + +extern ssize_t z_impl_devmux_select_get(const struct device * dev); + +__pinned_func +static inline ssize_t devmux_select_get(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (ssize_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_DEVMUX_SELECT_GET); + } +#endif + compiler_barrier(); + return z_impl_devmux_select_get(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define devmux_select_get(dev) ({ ssize_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_DEVMUX_SELECT_GET, devmux_select_get, dev); syscall__retval = devmux_select_get(dev); sys_port_trace_syscall_exit(K_SYSCALL_DEVMUX_SELECT_GET, devmux_select_get, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_devmux_select_set(struct device * dev, size_t index); + +__pinned_func +static inline int devmux_select_set(struct device * dev, size_t index) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; size_t val; } parm1 = { .val = index }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_DEVMUX_SELECT_SET); + } +#endif + compiler_barrier(); + return z_impl_devmux_select_set(dev, index); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define devmux_select_set(dev, index) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_DEVMUX_SELECT_SET, devmux_select_set, dev, index); syscall__retval = devmux_select_set(dev, index); sys_port_trace_syscall_exit(K_SYSCALL_DEVMUX_SELECT_SET, devmux_select_set, dev, index, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/dma.h b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/dma.h new file mode 100644 index 0000000..7bb093f --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/dma.h @@ -0,0 +1,198 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_DMA_H +#define Z_INCLUDE_SYSCALLS_DMA_H + + +#include <zephyr/tracing/tracing_syscall.h> + +#ifndef _ASMLANGUAGE + +#include <stdarg.h> + +#include <syscall_list.h> +#include <zephyr/syscall.h> + +#include <zephyr/linker/sections.h> + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_dma_start(const struct device * dev, uint32_t channel); + +__pinned_func +static inline int dma_start(const struct device * dev, uint32_t channel) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = channel }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_DMA_START); + } +#endif + compiler_barrier(); + return z_impl_dma_start(dev, channel); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define dma_start(dev, channel) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_DMA_START, dma_start, dev, channel); syscall__retval = dma_start(dev, channel); sys_port_trace_syscall_exit(K_SYSCALL_DMA_START, dma_start, dev, channel, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_dma_stop(const struct device * dev, uint32_t channel); + +__pinned_func +static inline int dma_stop(const struct device * dev, uint32_t channel) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = channel }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_DMA_STOP); + } +#endif + compiler_barrier(); + return z_impl_dma_stop(dev, channel); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define dma_stop(dev, channel) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_DMA_STOP, dma_stop, dev, channel); syscall__retval = dma_stop(dev, channel); sys_port_trace_syscall_exit(K_SYSCALL_DMA_STOP, dma_stop, dev, channel, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_dma_suspend(const struct device * dev, uint32_t channel); + +__pinned_func +static inline int dma_suspend(const struct device * dev, uint32_t channel) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = channel }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_DMA_SUSPEND); + } +#endif + compiler_barrier(); + return z_impl_dma_suspend(dev, channel); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define dma_suspend(dev, channel) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_DMA_SUSPEND, dma_suspend, dev, channel); syscall__retval = dma_suspend(dev, channel); sys_port_trace_syscall_exit(K_SYSCALL_DMA_SUSPEND, dma_suspend, dev, channel, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_dma_resume(const struct device * dev, uint32_t channel); + +__pinned_func +static inline int dma_resume(const struct device * dev, uint32_t channel) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = channel }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_DMA_RESUME); + } +#endif + compiler_barrier(); + return z_impl_dma_resume(dev, channel); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define dma_resume(dev, channel) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_DMA_RESUME, dma_resume, dev, channel); syscall__retval = dma_resume(dev, channel); sys_port_trace_syscall_exit(K_SYSCALL_DMA_RESUME, dma_resume, dev, channel, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_dma_request_channel(const struct device * dev, void * filter_param); + +__pinned_func +static inline int dma_request_channel(const struct device * dev, void * filter_param) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; void * val; } parm1 = { .val = filter_param }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_DMA_REQUEST_CHANNEL); + } +#endif + compiler_barrier(); + return z_impl_dma_request_channel(dev, filter_param); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define dma_request_channel(dev, filter_param) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_DMA_REQUEST_CHANNEL, dma_request_channel, dev, filter_param); syscall__retval = dma_request_channel(dev, filter_param); sys_port_trace_syscall_exit(K_SYSCALL_DMA_REQUEST_CHANNEL, dma_request_channel, dev, filter_param, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern void z_impl_dma_release_channel(const struct device * dev, uint32_t channel); + +__pinned_func +static inline void dma_release_channel(const struct device * dev, uint32_t channel) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = channel }; + (void) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_DMA_RELEASE_CHANNEL); + return; + } +#endif + compiler_barrier(); + z_impl_dma_release_channel(dev, channel); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define dma_release_channel(dev, channel) do { sys_port_trace_syscall_enter(K_SYSCALL_DMA_RELEASE_CHANNEL, dma_release_channel, dev, channel); dma_release_channel(dev, channel); sys_port_trace_syscall_exit(K_SYSCALL_DMA_RELEASE_CHANNEL, dma_release_channel, dev, channel); } while(false) +#endif +#endif + + +extern int z_impl_dma_chan_filter(const struct device * dev, int channel, void * filter_param); + +__pinned_func +static inline int dma_chan_filter(const struct device * dev, int channel, void * filter_param) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; int val; } parm1 = { .val = channel }; + union { uintptr_t x; void * val; } parm2 = { .val = filter_param }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_DMA_CHAN_FILTER); + } +#endif + compiler_barrier(); + return z_impl_dma_chan_filter(dev, channel, filter_param); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define dma_chan_filter(dev, channel, filter_param) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_DMA_CHAN_FILTER, dma_chan_filter, dev, channel, filter_param); syscall__retval = dma_chan_filter(dev, channel, filter_param); sys_port_trace_syscall_exit(K_SYSCALL_DMA_CHAN_FILTER, dma_chan_filter, dev, channel, filter_param, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/eeprom.h b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/eeprom.h new file mode 100644 index 0000000..70ea3e0 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/eeprom.h @@ -0,0 +1,103 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_EEPROM_H +#define Z_INCLUDE_SYSCALLS_EEPROM_H + + +#include <zephyr/tracing/tracing_syscall.h> + +#ifndef _ASMLANGUAGE + +#include <stdarg.h> + +#include <syscall_list.h> +#include <zephyr/syscall.h> + +#include <zephyr/linker/sections.h> + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_eeprom_read(const struct device * dev, off_t offset, void * data, size_t len); + +__pinned_func +static inline int eeprom_read(const struct device * dev, off_t offset, void * data, size_t len) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; off_t val; } parm1 = { .val = offset }; + union { uintptr_t x; void * val; } parm2 = { .val = data }; + union { uintptr_t x; size_t val; } parm3 = { .val = len }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_EEPROM_READ); + } +#endif + compiler_barrier(); + return z_impl_eeprom_read(dev, offset, data, len); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define eeprom_read(dev, offset, data, len) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_EEPROM_READ, eeprom_read, dev, offset, data, len); syscall__retval = eeprom_read(dev, offset, data, len); sys_port_trace_syscall_exit(K_SYSCALL_EEPROM_READ, eeprom_read, dev, offset, data, len, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_eeprom_write(const struct device * dev, off_t offset, const void * data, size_t len); + +__pinned_func +static inline int eeprom_write(const struct device * dev, off_t offset, const void * data, size_t len) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; off_t val; } parm1 = { .val = offset }; + union { uintptr_t x; const void * val; } parm2 = { .val = data }; + union { uintptr_t x; size_t val; } parm3 = { .val = len }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_EEPROM_WRITE); + } +#endif + compiler_barrier(); + return z_impl_eeprom_write(dev, offset, data, len); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define eeprom_write(dev, offset, data, len) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_EEPROM_WRITE, eeprom_write, dev, offset, data, len); syscall__retval = eeprom_write(dev, offset, data, len); sys_port_trace_syscall_exit(K_SYSCALL_EEPROM_WRITE, eeprom_write, dev, offset, data, len, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern size_t z_impl_eeprom_get_size(const struct device * dev); + +__pinned_func +static inline size_t eeprom_get_size(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (size_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_EEPROM_GET_SIZE); + } +#endif + compiler_barrier(); + return z_impl_eeprom_get_size(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define eeprom_get_size(dev) ({ size_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_EEPROM_GET_SIZE, eeprom_get_size, dev); syscall__retval = eeprom_get_size(dev); sys_port_trace_syscall_exit(K_SYSCALL_EEPROM_GET_SIZE, eeprom_get_size, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/emul_fuel_gauge.h b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/emul_fuel_gauge.h new file mode 100644 index 0000000..54b754c --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/emul_fuel_gauge.h @@ -0,0 +1,77 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_EMUL_FUEL_GAUGE_H +#define Z_INCLUDE_SYSCALLS_EMUL_FUEL_GAUGE_H + + +#include <zephyr/tracing/tracing_syscall.h> + +#ifndef _ASMLANGUAGE + +#include <stdarg.h> + +#include <syscall_list.h> +#include <zephyr/syscall.h> + +#include <zephyr/linker/sections.h> + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_emul_fuel_gauge_set_battery_charging(const struct emul * target, uint32_t uV, int uA); + +__pinned_func +static inline int emul_fuel_gauge_set_battery_charging(const struct emul * target, uint32_t uV, int uA) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct emul * val; } parm0 = { .val = target }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = uV }; + union { uintptr_t x; int val; } parm2 = { .val = uA }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_EMUL_FUEL_GAUGE_SET_BATTERY_CHARGING); + } +#endif + compiler_barrier(); + return z_impl_emul_fuel_gauge_set_battery_charging(target, uV, uA); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define emul_fuel_gauge_set_battery_charging(target, uV, uA) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_EMUL_FUEL_GAUGE_SET_BATTERY_CHARGING, emul_fuel_gauge_set_battery_charging, target, uV, uA); syscall__retval = emul_fuel_gauge_set_battery_charging(target, uV, uA); sys_port_trace_syscall_exit(K_SYSCALL_EMUL_FUEL_GAUGE_SET_BATTERY_CHARGING, emul_fuel_gauge_set_battery_charging, target, uV, uA, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_emul_fuel_gauge_is_battery_cutoff(const struct emul * target, bool * cutoff); + +__pinned_func +static inline int emul_fuel_gauge_is_battery_cutoff(const struct emul * target, bool * cutoff) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct emul * val; } parm0 = { .val = target }; + union { uintptr_t x; bool * val; } parm1 = { .val = cutoff }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_EMUL_FUEL_GAUGE_IS_BATTERY_CUTOFF); + } +#endif + compiler_barrier(); + return z_impl_emul_fuel_gauge_is_battery_cutoff(target, cutoff); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define emul_fuel_gauge_is_battery_cutoff(target, cutoff) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_EMUL_FUEL_GAUGE_IS_BATTERY_CUTOFF, emul_fuel_gauge_is_battery_cutoff, target, cutoff); syscall__retval = emul_fuel_gauge_is_battery_cutoff(target, cutoff); sys_port_trace_syscall_exit(K_SYSCALL_EMUL_FUEL_GAUGE_IS_BATTERY_CUTOFF, emul_fuel_gauge_is_battery_cutoff, target, cutoff, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/entropy.h b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/entropy.h new file mode 100644 index 0000000..e44cf95 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/entropy.h @@ -0,0 +1,53 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_ENTROPY_H +#define Z_INCLUDE_SYSCALLS_ENTROPY_H + + +#include <zephyr/tracing/tracing_syscall.h> + +#ifndef _ASMLANGUAGE + +#include <stdarg.h> + +#include <syscall_list.h> +#include <zephyr/syscall.h> + +#include <zephyr/linker/sections.h> + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_entropy_get_entropy(const struct device * dev, uint8_t * buffer, uint16_t length); + +__pinned_func +static inline int entropy_get_entropy(const struct device * dev, uint8_t * buffer, uint16_t length) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint8_t * val; } parm1 = { .val = buffer }; + union { uintptr_t x; uint16_t val; } parm2 = { .val = length }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_ENTROPY_GET_ENTROPY); + } +#endif + compiler_barrier(); + return z_impl_entropy_get_entropy(dev, buffer, length); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define entropy_get_entropy(dev, buffer, length) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ENTROPY_GET_ENTROPY, entropy_get_entropy, dev, buffer, length); syscall__retval = entropy_get_entropy(dev, buffer, length); sys_port_trace_syscall_exit(K_SYSCALL_ENTROPY_GET_ENTROPY, entropy_get_entropy, dev, buffer, length, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/errno_private.h b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/errno_private.h new file mode 100644 index 0000000..28a8029 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/errno_private.h @@ -0,0 +1,43 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_ERRNO_PRIVATE_H +#define Z_INCLUDE_SYSCALLS_ERRNO_PRIVATE_H + + + + +#ifndef _ASMLANGUAGE + +#include <stdarg.h> + +#include <syscall_list.h> +#include <zephyr/syscall.h> + +#include <zephyr/linker/sections.h> + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int * z_impl_z_errno(void); + +__pinned_func +static inline int * z_errno(void) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + return (int *) arch_syscall_invoke0(K_SYSCALL_Z_ERRNO); + } +#endif + compiler_barrier(); + return z_impl_z_errno(); +} + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/error.h b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/error.h new file mode 100644 index 0000000..2a1cc57 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/error.h @@ -0,0 +1,52 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_ERROR_H +#define Z_INCLUDE_SYSCALLS_ERROR_H + + +#include <zephyr/tracing/tracing_syscall.h> + +#ifndef _ASMLANGUAGE + +#include <stdarg.h> + +#include <syscall_list.h> +#include <zephyr/syscall.h> + +#include <zephyr/linker/sections.h> + + +#ifdef __cplusplus +extern "C" { +#endif + +extern void z_impl_user_fault(unsigned int reason); + +__pinned_func +static inline void user_fault(unsigned int reason) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; unsigned int val; } parm0 = { .val = reason }; + (void) arch_syscall_invoke1(parm0.x, K_SYSCALL_USER_FAULT); + return; + } +#endif + compiler_barrier(); + z_impl_user_fault(reason); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define user_fault(reason) do { sys_port_trace_syscall_enter(K_SYSCALL_USER_FAULT, user_fault, reason); user_fault(reason); sys_port_trace_syscall_exit(K_SYSCALL_USER_FAULT, user_fault, reason); } while(false) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/espi.h b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/espi.h new file mode 100644 index 0000000..f1db415 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/espi.h @@ -0,0 +1,344 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_ESPI_H +#define Z_INCLUDE_SYSCALLS_ESPI_H + + +#include <zephyr/tracing/tracing_syscall.h> + +#ifndef _ASMLANGUAGE + +#include <stdarg.h> + +#include <syscall_list.h> +#include <zephyr/syscall.h> + +#include <zephyr/linker/sections.h> + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_espi_config(const struct device * dev, struct espi_cfg * cfg); + +__pinned_func +static inline int espi_config(const struct device * dev, struct espi_cfg * cfg) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; struct espi_cfg * val; } parm1 = { .val = cfg }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_ESPI_CONFIG); + } +#endif + compiler_barrier(); + return z_impl_espi_config(dev, cfg); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define espi_config(dev, cfg) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ESPI_CONFIG, espi_config, dev, cfg); syscall__retval = espi_config(dev, cfg); sys_port_trace_syscall_exit(K_SYSCALL_ESPI_CONFIG, espi_config, dev, cfg, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern bool z_impl_espi_get_channel_status(const struct device * dev, enum espi_channel ch); + +__pinned_func +static inline bool espi_get_channel_status(const struct device * dev, enum espi_channel ch) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; enum espi_channel val; } parm1 = { .val = ch }; + return (bool) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_ESPI_GET_CHANNEL_STATUS); + } +#endif + compiler_barrier(); + return z_impl_espi_get_channel_status(dev, ch); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define espi_get_channel_status(dev, ch) ({ bool syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ESPI_GET_CHANNEL_STATUS, espi_get_channel_status, dev, ch); syscall__retval = espi_get_channel_status(dev, ch); sys_port_trace_syscall_exit(K_SYSCALL_ESPI_GET_CHANNEL_STATUS, espi_get_channel_status, dev, ch, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_espi_read_request(const struct device * dev, struct espi_request_packet * req); + +__pinned_func +static inline int espi_read_request(const struct device * dev, struct espi_request_packet * req) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; struct espi_request_packet * val; } parm1 = { .val = req }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_ESPI_READ_REQUEST); + } +#endif + compiler_barrier(); + return z_impl_espi_read_request(dev, req); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define espi_read_request(dev, req) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ESPI_READ_REQUEST, espi_read_request, dev, req); syscall__retval = espi_read_request(dev, req); sys_port_trace_syscall_exit(K_SYSCALL_ESPI_READ_REQUEST, espi_read_request, dev, req, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_espi_write_request(const struct device * dev, struct espi_request_packet * req); + +__pinned_func +static inline int espi_write_request(const struct device * dev, struct espi_request_packet * req) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; struct espi_request_packet * val; } parm1 = { .val = req }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_ESPI_WRITE_REQUEST); + } +#endif + compiler_barrier(); + return z_impl_espi_write_request(dev, req); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define espi_write_request(dev, req) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ESPI_WRITE_REQUEST, espi_write_request, dev, req); syscall__retval = espi_write_request(dev, req); sys_port_trace_syscall_exit(K_SYSCALL_ESPI_WRITE_REQUEST, espi_write_request, dev, req, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_espi_read_lpc_request(const struct device * dev, enum lpc_peripheral_opcode op, uint32_t * data); + +__pinned_func +static inline int espi_read_lpc_request(const struct device * dev, enum lpc_peripheral_opcode op, uint32_t * data) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; enum lpc_peripheral_opcode val; } parm1 = { .val = op }; + union { uintptr_t x; uint32_t * val; } parm2 = { .val = data }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_ESPI_READ_LPC_REQUEST); + } +#endif + compiler_barrier(); + return z_impl_espi_read_lpc_request(dev, op, data); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define espi_read_lpc_request(dev, op, data) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ESPI_READ_LPC_REQUEST, espi_read_lpc_request, dev, op, data); syscall__retval = espi_read_lpc_request(dev, op, data); sys_port_trace_syscall_exit(K_SYSCALL_ESPI_READ_LPC_REQUEST, espi_read_lpc_request, dev, op, data, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_espi_write_lpc_request(const struct device * dev, enum lpc_peripheral_opcode op, uint32_t * data); + +__pinned_func +static inline int espi_write_lpc_request(const struct device * dev, enum lpc_peripheral_opcode op, uint32_t * data) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; enum lpc_peripheral_opcode val; } parm1 = { .val = op }; + union { uintptr_t x; uint32_t * val; } parm2 = { .val = data }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_ESPI_WRITE_LPC_REQUEST); + } +#endif + compiler_barrier(); + return z_impl_espi_write_lpc_request(dev, op, data); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define espi_write_lpc_request(dev, op, data) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ESPI_WRITE_LPC_REQUEST, espi_write_lpc_request, dev, op, data); syscall__retval = espi_write_lpc_request(dev, op, data); sys_port_trace_syscall_exit(K_SYSCALL_ESPI_WRITE_LPC_REQUEST, espi_write_lpc_request, dev, op, data, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_espi_send_vwire(const struct device * dev, enum espi_vwire_signal signal, uint8_t level); + +__pinned_func +static inline int espi_send_vwire(const struct device * dev, enum espi_vwire_signal signal, uint8_t level) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; enum espi_vwire_signal val; } parm1 = { .val = signal }; + union { uintptr_t x; uint8_t val; } parm2 = { .val = level }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_ESPI_SEND_VWIRE); + } +#endif + compiler_barrier(); + return z_impl_espi_send_vwire(dev, signal, level); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define espi_send_vwire(dev, signal, level) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ESPI_SEND_VWIRE, espi_send_vwire, dev, signal, level); syscall__retval = espi_send_vwire(dev, signal, level); sys_port_trace_syscall_exit(K_SYSCALL_ESPI_SEND_VWIRE, espi_send_vwire, dev, signal, level, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_espi_receive_vwire(const struct device * dev, enum espi_vwire_signal signal, uint8_t * level); + +__pinned_func +static inline int espi_receive_vwire(const struct device * dev, enum espi_vwire_signal signal, uint8_t * level) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; enum espi_vwire_signal val; } parm1 = { .val = signal }; + union { uintptr_t x; uint8_t * val; } parm2 = { .val = level }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_ESPI_RECEIVE_VWIRE); + } +#endif + compiler_barrier(); + return z_impl_espi_receive_vwire(dev, signal, level); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define espi_receive_vwire(dev, signal, level) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ESPI_RECEIVE_VWIRE, espi_receive_vwire, dev, signal, level); syscall__retval = espi_receive_vwire(dev, signal, level); sys_port_trace_syscall_exit(K_SYSCALL_ESPI_RECEIVE_VWIRE, espi_receive_vwire, dev, signal, level, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_espi_send_oob(const struct device * dev, struct espi_oob_packet * pckt); + +__pinned_func +static inline int espi_send_oob(const struct device * dev, struct espi_oob_packet * pckt) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; struct espi_oob_packet * val; } parm1 = { .val = pckt }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_ESPI_SEND_OOB); + } +#endif + compiler_barrier(); + return z_impl_espi_send_oob(dev, pckt); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define espi_send_oob(dev, pckt) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ESPI_SEND_OOB, espi_send_oob, dev, pckt); syscall__retval = espi_send_oob(dev, pckt); sys_port_trace_syscall_exit(K_SYSCALL_ESPI_SEND_OOB, espi_send_oob, dev, pckt, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_espi_receive_oob(const struct device * dev, struct espi_oob_packet * pckt); + +__pinned_func +static inline int espi_receive_oob(const struct device * dev, struct espi_oob_packet * pckt) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; struct espi_oob_packet * val; } parm1 = { .val = pckt }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_ESPI_RECEIVE_OOB); + } +#endif + compiler_barrier(); + return z_impl_espi_receive_oob(dev, pckt); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define espi_receive_oob(dev, pckt) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ESPI_RECEIVE_OOB, espi_receive_oob, dev, pckt); syscall__retval = espi_receive_oob(dev, pckt); sys_port_trace_syscall_exit(K_SYSCALL_ESPI_RECEIVE_OOB, espi_receive_oob, dev, pckt, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_espi_read_flash(const struct device * dev, struct espi_flash_packet * pckt); + +__pinned_func +static inline int espi_read_flash(const struct device * dev, struct espi_flash_packet * pckt) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; struct espi_flash_packet * val; } parm1 = { .val = pckt }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_ESPI_READ_FLASH); + } +#endif + compiler_barrier(); + return z_impl_espi_read_flash(dev, pckt); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define espi_read_flash(dev, pckt) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ESPI_READ_FLASH, espi_read_flash, dev, pckt); syscall__retval = espi_read_flash(dev, pckt); sys_port_trace_syscall_exit(K_SYSCALL_ESPI_READ_FLASH, espi_read_flash, dev, pckt, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_espi_write_flash(const struct device * dev, struct espi_flash_packet * pckt); + +__pinned_func +static inline int espi_write_flash(const struct device * dev, struct espi_flash_packet * pckt) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; struct espi_flash_packet * val; } parm1 = { .val = pckt }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_ESPI_WRITE_FLASH); + } +#endif + compiler_barrier(); + return z_impl_espi_write_flash(dev, pckt); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define espi_write_flash(dev, pckt) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ESPI_WRITE_FLASH, espi_write_flash, dev, pckt); syscall__retval = espi_write_flash(dev, pckt); sys_port_trace_syscall_exit(K_SYSCALL_ESPI_WRITE_FLASH, espi_write_flash, dev, pckt, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_espi_flash_erase(const struct device * dev, struct espi_flash_packet * pckt); + +__pinned_func +static inline int espi_flash_erase(const struct device * dev, struct espi_flash_packet * pckt) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; struct espi_flash_packet * val; } parm1 = { .val = pckt }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_ESPI_FLASH_ERASE); + } +#endif + compiler_barrier(); + return z_impl_espi_flash_erase(dev, pckt); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define espi_flash_erase(dev, pckt) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ESPI_FLASH_ERASE, espi_flash_erase, dev, pckt); syscall__retval = espi_flash_erase(dev, pckt); sys_port_trace_syscall_exit(K_SYSCALL_ESPI_FLASH_ERASE, espi_flash_erase, dev, pckt, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/espi_saf.h b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/espi_saf.h new file mode 100644 index 0000000..40bb004 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/espi_saf.h @@ -0,0 +1,218 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_ESPI_SAF_H +#define Z_INCLUDE_SYSCALLS_ESPI_SAF_H + + +#include <zephyr/tracing/tracing_syscall.h> + +#ifndef _ASMLANGUAGE + +#include <stdarg.h> + +#include <syscall_list.h> +#include <zephyr/syscall.h> + +#include <zephyr/linker/sections.h> + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_espi_saf_config(const struct device * dev, const struct espi_saf_cfg * cfg); + +__pinned_func +static inline int espi_saf_config(const struct device * dev, const struct espi_saf_cfg * cfg) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; const struct espi_saf_cfg * val; } parm1 = { .val = cfg }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_ESPI_SAF_CONFIG); + } +#endif + compiler_barrier(); + return z_impl_espi_saf_config(dev, cfg); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define espi_saf_config(dev, cfg) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ESPI_SAF_CONFIG, espi_saf_config, dev, cfg); syscall__retval = espi_saf_config(dev, cfg); sys_port_trace_syscall_exit(K_SYSCALL_ESPI_SAF_CONFIG, espi_saf_config, dev, cfg, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_espi_saf_set_protection_regions(const struct device * dev, const struct espi_saf_protection * pr); + +__pinned_func +static inline int espi_saf_set_protection_regions(const struct device * dev, const struct espi_saf_protection * pr) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; const struct espi_saf_protection * val; } parm1 = { .val = pr }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_ESPI_SAF_SET_PROTECTION_REGIONS); + } +#endif + compiler_barrier(); + return z_impl_espi_saf_set_protection_regions(dev, pr); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define espi_saf_set_protection_regions(dev, pr) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ESPI_SAF_SET_PROTECTION_REGIONS, espi_saf_set_protection_regions, dev, pr); syscall__retval = espi_saf_set_protection_regions(dev, pr); sys_port_trace_syscall_exit(K_SYSCALL_ESPI_SAF_SET_PROTECTION_REGIONS, espi_saf_set_protection_regions, dev, pr, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_espi_saf_activate(const struct device * dev); + +__pinned_func +static inline int espi_saf_activate(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_ESPI_SAF_ACTIVATE); + } +#endif + compiler_barrier(); + return z_impl_espi_saf_activate(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define espi_saf_activate(dev) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ESPI_SAF_ACTIVATE, espi_saf_activate, dev); syscall__retval = espi_saf_activate(dev); sys_port_trace_syscall_exit(K_SYSCALL_ESPI_SAF_ACTIVATE, espi_saf_activate, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern bool z_impl_espi_saf_get_channel_status(const struct device * dev); + +__pinned_func +static inline bool espi_saf_get_channel_status(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (bool) arch_syscall_invoke1(parm0.x, K_SYSCALL_ESPI_SAF_GET_CHANNEL_STATUS); + } +#endif + compiler_barrier(); + return z_impl_espi_saf_get_channel_status(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define espi_saf_get_channel_status(dev) ({ bool syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ESPI_SAF_GET_CHANNEL_STATUS, espi_saf_get_channel_status, dev); syscall__retval = espi_saf_get_channel_status(dev); sys_port_trace_syscall_exit(K_SYSCALL_ESPI_SAF_GET_CHANNEL_STATUS, espi_saf_get_channel_status, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_espi_saf_flash_read(const struct device * dev, struct espi_saf_packet * pckt); + +__pinned_func +static inline int espi_saf_flash_read(const struct device * dev, struct espi_saf_packet * pckt) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; struct espi_saf_packet * val; } parm1 = { .val = pckt }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_ESPI_SAF_FLASH_READ); + } +#endif + compiler_barrier(); + return z_impl_espi_saf_flash_read(dev, pckt); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define espi_saf_flash_read(dev, pckt) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ESPI_SAF_FLASH_READ, espi_saf_flash_read, dev, pckt); syscall__retval = espi_saf_flash_read(dev, pckt); sys_port_trace_syscall_exit(K_SYSCALL_ESPI_SAF_FLASH_READ, espi_saf_flash_read, dev, pckt, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_espi_saf_flash_write(const struct device * dev, struct espi_saf_packet * pckt); + +__pinned_func +static inline int espi_saf_flash_write(const struct device * dev, struct espi_saf_packet * pckt) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; struct espi_saf_packet * val; } parm1 = { .val = pckt }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_ESPI_SAF_FLASH_WRITE); + } +#endif + compiler_barrier(); + return z_impl_espi_saf_flash_write(dev, pckt); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define espi_saf_flash_write(dev, pckt) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ESPI_SAF_FLASH_WRITE, espi_saf_flash_write, dev, pckt); syscall__retval = espi_saf_flash_write(dev, pckt); sys_port_trace_syscall_exit(K_SYSCALL_ESPI_SAF_FLASH_WRITE, espi_saf_flash_write, dev, pckt, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_espi_saf_flash_erase(const struct device * dev, struct espi_saf_packet * pckt); + +__pinned_func +static inline int espi_saf_flash_erase(const struct device * dev, struct espi_saf_packet * pckt) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; struct espi_saf_packet * val; } parm1 = { .val = pckt }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_ESPI_SAF_FLASH_ERASE); + } +#endif + compiler_barrier(); + return z_impl_espi_saf_flash_erase(dev, pckt); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define espi_saf_flash_erase(dev, pckt) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ESPI_SAF_FLASH_ERASE, espi_saf_flash_erase, dev, pckt); syscall__retval = espi_saf_flash_erase(dev, pckt); sys_port_trace_syscall_exit(K_SYSCALL_ESPI_SAF_FLASH_ERASE, espi_saf_flash_erase, dev, pckt, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_espi_saf_flash_unsuccess(const struct device * dev, struct espi_saf_packet * pckt); + +__pinned_func +static inline int espi_saf_flash_unsuccess(const struct device * dev, struct espi_saf_packet * pckt) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; struct espi_saf_packet * val; } parm1 = { .val = pckt }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_ESPI_SAF_FLASH_UNSUCCESS); + } +#endif + compiler_barrier(); + return z_impl_espi_saf_flash_unsuccess(dev, pckt); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define espi_saf_flash_unsuccess(dev, pckt) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ESPI_SAF_FLASH_UNSUCCESS, espi_saf_flash_unsuccess, dev, pckt); syscall__retval = espi_saf_flash_unsuccess(dev, pckt); sys_port_trace_syscall_exit(K_SYSCALL_ESPI_SAF_FLASH_UNSUCCESS, espi_saf_flash_unsuccess, dev, pckt, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/ethernet.h b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/ethernet.h new file mode 100644 index 0000000..33b6431 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/ethernet.h @@ -0,0 +1,51 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_ETHERNET_H +#define Z_INCLUDE_SYSCALLS_ETHERNET_H + + +#include <zephyr/tracing/tracing_syscall.h> + +#ifndef _ASMLANGUAGE + +#include <stdarg.h> + +#include <syscall_list.h> +#include <zephyr/syscall.h> + +#include <zephyr/linker/sections.h> + + +#ifdef __cplusplus +extern "C" { +#endif + +extern const struct device * z_impl_net_eth_get_ptp_clock_by_index(int index); + +__pinned_func +static inline const struct device * net_eth_get_ptp_clock_by_index(int index) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; int val; } parm0 = { .val = index }; + return (const struct device *) arch_syscall_invoke1(parm0.x, K_SYSCALL_NET_ETH_GET_PTP_CLOCK_BY_INDEX); + } +#endif + compiler_barrier(); + return z_impl_net_eth_get_ptp_clock_by_index(index); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define net_eth_get_ptp_clock_by_index(index) ({ const struct device * syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_NET_ETH_GET_PTP_CLOCK_BY_INDEX, net_eth_get_ptp_clock_by_index, index); syscall__retval = net_eth_get_ptp_clock_by_index(index); sys_port_trace_syscall_exit(K_SYSCALL_NET_ETH_GET_PTP_CLOCK_BY_INDEX, net_eth_get_ptp_clock_by_index, index, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/flash.h b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/flash.h new file mode 100644 index 0000000..4536ec2 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/flash.h @@ -0,0 +1,300 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_FLASH_H +#define Z_INCLUDE_SYSCALLS_FLASH_H + + +#include <zephyr/tracing/tracing_syscall.h> + +#ifndef _ASMLANGUAGE + +#include <stdarg.h> + +#include <syscall_list.h> +#include <zephyr/syscall.h> + +#include <zephyr/linker/sections.h> + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_flash_read(const struct device * dev, off_t offset, void * data, size_t len); + +__pinned_func +static inline int flash_read(const struct device * dev, off_t offset, void * data, size_t len) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; off_t val; } parm1 = { .val = offset }; + union { uintptr_t x; void * val; } parm2 = { .val = data }; + union { uintptr_t x; size_t val; } parm3 = { .val = len }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_FLASH_READ); + } +#endif + compiler_barrier(); + return z_impl_flash_read(dev, offset, data, len); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define flash_read(dev, offset, data, len) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_FLASH_READ, flash_read, dev, offset, data, len); syscall__retval = flash_read(dev, offset, data, len); sys_port_trace_syscall_exit(K_SYSCALL_FLASH_READ, flash_read, dev, offset, data, len, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_flash_write(const struct device * dev, off_t offset, const void * data, size_t len); + +__pinned_func +static inline int flash_write(const struct device * dev, off_t offset, const void * data, size_t len) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; off_t val; } parm1 = { .val = offset }; + union { uintptr_t x; const void * val; } parm2 = { .val = data }; + union { uintptr_t x; size_t val; } parm3 = { .val = len }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_FLASH_WRITE); + } +#endif + compiler_barrier(); + return z_impl_flash_write(dev, offset, data, len); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define flash_write(dev, offset, data, len) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_FLASH_WRITE, flash_write, dev, offset, data, len); syscall__retval = flash_write(dev, offset, data, len); sys_port_trace_syscall_exit(K_SYSCALL_FLASH_WRITE, flash_write, dev, offset, data, len, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_flash_erase(const struct device * dev, off_t offset, size_t size); + +__pinned_func +static inline int flash_erase(const struct device * dev, off_t offset, size_t size) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; off_t val; } parm1 = { .val = offset }; + union { uintptr_t x; size_t val; } parm2 = { .val = size }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_FLASH_ERASE); + } +#endif + compiler_barrier(); + return z_impl_flash_erase(dev, offset, size); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define flash_erase(dev, offset, size) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_FLASH_ERASE, flash_erase, dev, offset, size); syscall__retval = flash_erase(dev, offset, size); sys_port_trace_syscall_exit(K_SYSCALL_FLASH_ERASE, flash_erase, dev, offset, size, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_flash_get_page_info_by_offs(const struct device * dev, off_t offset, struct flash_pages_info * info); + +__pinned_func +static inline int flash_get_page_info_by_offs(const struct device * dev, off_t offset, struct flash_pages_info * info) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; off_t val; } parm1 = { .val = offset }; + union { uintptr_t x; struct flash_pages_info * val; } parm2 = { .val = info }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_FLASH_GET_PAGE_INFO_BY_OFFS); + } +#endif + compiler_barrier(); + return z_impl_flash_get_page_info_by_offs(dev, offset, info); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define flash_get_page_info_by_offs(dev, offset, info) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_FLASH_GET_PAGE_INFO_BY_OFFS, flash_get_page_info_by_offs, dev, offset, info); syscall__retval = flash_get_page_info_by_offs(dev, offset, info); sys_port_trace_syscall_exit(K_SYSCALL_FLASH_GET_PAGE_INFO_BY_OFFS, flash_get_page_info_by_offs, dev, offset, info, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_flash_get_page_info_by_idx(const struct device * dev, uint32_t page_index, struct flash_pages_info * info); + +__pinned_func +static inline int flash_get_page_info_by_idx(const struct device * dev, uint32_t page_index, struct flash_pages_info * info) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = page_index }; + union { uintptr_t x; struct flash_pages_info * val; } parm2 = { .val = info }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_FLASH_GET_PAGE_INFO_BY_IDX); + } +#endif + compiler_barrier(); + return z_impl_flash_get_page_info_by_idx(dev, page_index, info); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define flash_get_page_info_by_idx(dev, page_index, info) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_FLASH_GET_PAGE_INFO_BY_IDX, flash_get_page_info_by_idx, dev, page_index, info); syscall__retval = flash_get_page_info_by_idx(dev, page_index, info); sys_port_trace_syscall_exit(K_SYSCALL_FLASH_GET_PAGE_INFO_BY_IDX, flash_get_page_info_by_idx, dev, page_index, info, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern size_t z_impl_flash_get_page_count(const struct device * dev); + +__pinned_func +static inline size_t flash_get_page_count(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (size_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_FLASH_GET_PAGE_COUNT); + } +#endif + compiler_barrier(); + return z_impl_flash_get_page_count(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define flash_get_page_count(dev) ({ size_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_FLASH_GET_PAGE_COUNT, flash_get_page_count, dev); syscall__retval = flash_get_page_count(dev); sys_port_trace_syscall_exit(K_SYSCALL_FLASH_GET_PAGE_COUNT, flash_get_page_count, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_flash_sfdp_read(const struct device * dev, off_t offset, void * data, size_t len); + +__pinned_func +static inline int flash_sfdp_read(const struct device * dev, off_t offset, void * data, size_t len) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; off_t val; } parm1 = { .val = offset }; + union { uintptr_t x; void * val; } parm2 = { .val = data }; + union { uintptr_t x; size_t val; } parm3 = { .val = len }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_FLASH_SFDP_READ); + } +#endif + compiler_barrier(); + return z_impl_flash_sfdp_read(dev, offset, data, len); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define flash_sfdp_read(dev, offset, data, len) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_FLASH_SFDP_READ, flash_sfdp_read, dev, offset, data, len); syscall__retval = flash_sfdp_read(dev, offset, data, len); sys_port_trace_syscall_exit(K_SYSCALL_FLASH_SFDP_READ, flash_sfdp_read, dev, offset, data, len, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_flash_read_jedec_id(const struct device * dev, uint8_t * id); + +__pinned_func +static inline int flash_read_jedec_id(const struct device * dev, uint8_t * id) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint8_t * val; } parm1 = { .val = id }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_FLASH_READ_JEDEC_ID); + } +#endif + compiler_barrier(); + return z_impl_flash_read_jedec_id(dev, id); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define flash_read_jedec_id(dev, id) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_FLASH_READ_JEDEC_ID, flash_read_jedec_id, dev, id); syscall__retval = flash_read_jedec_id(dev, id); sys_port_trace_syscall_exit(K_SYSCALL_FLASH_READ_JEDEC_ID, flash_read_jedec_id, dev, id, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern size_t z_impl_flash_get_write_block_size(const struct device * dev); + +__pinned_func +static inline size_t flash_get_write_block_size(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (size_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_FLASH_GET_WRITE_BLOCK_SIZE); + } +#endif + compiler_barrier(); + return z_impl_flash_get_write_block_size(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define flash_get_write_block_size(dev) ({ size_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_FLASH_GET_WRITE_BLOCK_SIZE, flash_get_write_block_size, dev); syscall__retval = flash_get_write_block_size(dev); sys_port_trace_syscall_exit(K_SYSCALL_FLASH_GET_WRITE_BLOCK_SIZE, flash_get_write_block_size, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern const struct flash_parameters * z_impl_flash_get_parameters(const struct device * dev); + +__pinned_func +static inline const struct flash_parameters * flash_get_parameters(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (const struct flash_parameters *) arch_syscall_invoke1(parm0.x, K_SYSCALL_FLASH_GET_PARAMETERS); + } +#endif + compiler_barrier(); + return z_impl_flash_get_parameters(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define flash_get_parameters(dev) ({ const struct flash_parameters * syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_FLASH_GET_PARAMETERS, flash_get_parameters, dev); syscall__retval = flash_get_parameters(dev); sys_port_trace_syscall_exit(K_SYSCALL_FLASH_GET_PARAMETERS, flash_get_parameters, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_flash_ex_op(const struct device * dev, uint16_t code, const uintptr_t in, void * out); + +__pinned_func +static inline int flash_ex_op(const struct device * dev, uint16_t code, const uintptr_t in, void * out) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint16_t val; } parm1 = { .val = code }; + union { uintptr_t x; const uintptr_t val; } parm2 = { .val = in }; + union { uintptr_t x; void * val; } parm3 = { .val = out }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_FLASH_EX_OP); + } +#endif + compiler_barrier(); + return z_impl_flash_ex_op(dev, code, in, out); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define flash_ex_op(dev, code, in, out) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_FLASH_EX_OP, flash_ex_op, dev, code, in, out); syscall__retval = flash_ex_op(dev, code, in, out); sys_port_trace_syscall_exit(K_SYSCALL_FLASH_EX_OP, flash_ex_op, dev, code, in, out, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/flash_simulator.h b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/flash_simulator.h new file mode 100644 index 0000000..d1f1fa6 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/flash_simulator.h @@ -0,0 +1,52 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_FLASH_SIMULATOR_H +#define Z_INCLUDE_SYSCALLS_FLASH_SIMULATOR_H + + +#include <zephyr/tracing/tracing_syscall.h> + +#ifndef _ASMLANGUAGE + +#include <stdarg.h> + +#include <syscall_list.h> +#include <zephyr/syscall.h> + +#include <zephyr/linker/sections.h> + + +#ifdef __cplusplus +extern "C" { +#endif + +extern void * z_impl_flash_simulator_get_memory(const struct device * dev, size_t * mock_size); + +__pinned_func +static inline void * flash_simulator_get_memory(const struct device * dev, size_t * mock_size) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; size_t * val; } parm1 = { .val = mock_size }; + return (void *) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_FLASH_SIMULATOR_GET_MEMORY); + } +#endif + compiler_barrier(); + return z_impl_flash_simulator_get_memory(dev, mock_size); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define flash_simulator_get_memory(dev, mock_size) ({ void * syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_FLASH_SIMULATOR_GET_MEMORY, flash_simulator_get_memory, dev, mock_size); syscall__retval = flash_simulator_get_memory(dev, mock_size); sys_port_trace_syscall_exit(K_SYSCALL_FLASH_SIMULATOR_GET_MEMORY, flash_simulator_get_memory, dev, mock_size, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/fuel_gauge.h b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/fuel_gauge.h new file mode 100644 index 0000000..d2567a5 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/fuel_gauge.h @@ -0,0 +1,179 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_FUEL_GAUGE_H +#define Z_INCLUDE_SYSCALLS_FUEL_GAUGE_H + + +#include <zephyr/tracing/tracing_syscall.h> + +#ifndef _ASMLANGUAGE + +#include <stdarg.h> + +#include <syscall_list.h> +#include <zephyr/syscall.h> + +#include <zephyr/linker/sections.h> + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_fuel_gauge_get_prop(const struct device * dev, fuel_gauge_prop_t prop, union fuel_gauge_prop_val * val); + +__pinned_func +static inline int fuel_gauge_get_prop(const struct device * dev, fuel_gauge_prop_t prop, union fuel_gauge_prop_val * val) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; fuel_gauge_prop_t val; } parm1 = { .val = prop }; + union { uintptr_t x; union fuel_gauge_prop_val * val; } parm2 = { .val = val }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_FUEL_GAUGE_GET_PROP); + } +#endif + compiler_barrier(); + return z_impl_fuel_gauge_get_prop(dev, prop, val); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define fuel_gauge_get_prop(dev, prop, val) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_FUEL_GAUGE_GET_PROP, fuel_gauge_get_prop, dev, prop, val); syscall__retval = fuel_gauge_get_prop(dev, prop, val); sys_port_trace_syscall_exit(K_SYSCALL_FUEL_GAUGE_GET_PROP, fuel_gauge_get_prop, dev, prop, val, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_fuel_gauge_get_props(const struct device * dev, fuel_gauge_prop_t * props, union fuel_gauge_prop_val * vals, size_t len); + +__pinned_func +static inline int fuel_gauge_get_props(const struct device * dev, fuel_gauge_prop_t * props, union fuel_gauge_prop_val * vals, size_t len) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; fuel_gauge_prop_t * val; } parm1 = { .val = props }; + union { uintptr_t x; union fuel_gauge_prop_val * val; } parm2 = { .val = vals }; + union { uintptr_t x; size_t val; } parm3 = { .val = len }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_FUEL_GAUGE_GET_PROPS); + } +#endif + compiler_barrier(); + return z_impl_fuel_gauge_get_props(dev, props, vals, len); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define fuel_gauge_get_props(dev, props, vals, len) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_FUEL_GAUGE_GET_PROPS, fuel_gauge_get_props, dev, props, vals, len); syscall__retval = fuel_gauge_get_props(dev, props, vals, len); sys_port_trace_syscall_exit(K_SYSCALL_FUEL_GAUGE_GET_PROPS, fuel_gauge_get_props, dev, props, vals, len, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_fuel_gauge_set_prop(const struct device * dev, fuel_gauge_prop_t prop, union fuel_gauge_prop_val val); + +__pinned_func +static inline int fuel_gauge_set_prop(const struct device * dev, fuel_gauge_prop_t prop, union fuel_gauge_prop_val val) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; fuel_gauge_prop_t val; } parm1 = { .val = prop }; + union { uintptr_t x; union fuel_gauge_prop_val val; } parm2 = { .val = val }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_FUEL_GAUGE_SET_PROP); + } +#endif + compiler_barrier(); + return z_impl_fuel_gauge_set_prop(dev, prop, val); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define fuel_gauge_set_prop(dev, prop, val) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_FUEL_GAUGE_SET_PROP, fuel_gauge_set_prop, dev, prop, val); syscall__retval = fuel_gauge_set_prop(dev, prop, val); sys_port_trace_syscall_exit(K_SYSCALL_FUEL_GAUGE_SET_PROP, fuel_gauge_set_prop, dev, prop, val, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_fuel_gauge_set_props(const struct device * dev, fuel_gauge_prop_t * props, union fuel_gauge_prop_val * vals, size_t len); + +__pinned_func +static inline int fuel_gauge_set_props(const struct device * dev, fuel_gauge_prop_t * props, union fuel_gauge_prop_val * vals, size_t len) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; fuel_gauge_prop_t * val; } parm1 = { .val = props }; + union { uintptr_t x; union fuel_gauge_prop_val * val; } parm2 = { .val = vals }; + union { uintptr_t x; size_t val; } parm3 = { .val = len }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_FUEL_GAUGE_SET_PROPS); + } +#endif + compiler_barrier(); + return z_impl_fuel_gauge_set_props(dev, props, vals, len); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define fuel_gauge_set_props(dev, props, vals, len) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_FUEL_GAUGE_SET_PROPS, fuel_gauge_set_props, dev, props, vals, len); syscall__retval = fuel_gauge_set_props(dev, props, vals, len); sys_port_trace_syscall_exit(K_SYSCALL_FUEL_GAUGE_SET_PROPS, fuel_gauge_set_props, dev, props, vals, len, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_fuel_gauge_get_buffer_prop(const struct device * dev, fuel_gauge_prop_t prop_type, void * dst, size_t dst_len); + +__pinned_func +static inline int fuel_gauge_get_buffer_prop(const struct device * dev, fuel_gauge_prop_t prop_type, void * dst, size_t dst_len) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; fuel_gauge_prop_t val; } parm1 = { .val = prop_type }; + union { uintptr_t x; void * val; } parm2 = { .val = dst }; + union { uintptr_t x; size_t val; } parm3 = { .val = dst_len }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_FUEL_GAUGE_GET_BUFFER_PROP); + } +#endif + compiler_barrier(); + return z_impl_fuel_gauge_get_buffer_prop(dev, prop_type, dst, dst_len); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define fuel_gauge_get_buffer_prop(dev, prop_type, dst, dst_len) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_FUEL_GAUGE_GET_BUFFER_PROP, fuel_gauge_get_buffer_prop, dev, prop_type, dst, dst_len); syscall__retval = fuel_gauge_get_buffer_prop(dev, prop_type, dst, dst_len); sys_port_trace_syscall_exit(K_SYSCALL_FUEL_GAUGE_GET_BUFFER_PROP, fuel_gauge_get_buffer_prop, dev, prop_type, dst, dst_len, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_fuel_gauge_battery_cutoff(const struct device * dev); + +__pinned_func +static inline int fuel_gauge_battery_cutoff(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_FUEL_GAUGE_BATTERY_CUTOFF); + } +#endif + compiler_barrier(); + return z_impl_fuel_gauge_battery_cutoff(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define fuel_gauge_battery_cutoff(dev) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_FUEL_GAUGE_BATTERY_CUTOFF, fuel_gauge_battery_cutoff, dev); syscall__retval = fuel_gauge_battery_cutoff(dev); sys_port_trace_syscall_exit(K_SYSCALL_FUEL_GAUGE_BATTERY_CUTOFF, fuel_gauge_battery_cutoff, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/gnss.h b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/gnss.h new file mode 100644 index 0000000..e7cc7e9 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/gnss.h @@ -0,0 +1,244 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_GNSS_H +#define Z_INCLUDE_SYSCALLS_GNSS_H + + +#include <zephyr/tracing/tracing_syscall.h> + +#ifndef _ASMLANGUAGE + +#include <stdarg.h> + +#include <syscall_list.h> +#include <zephyr/syscall.h> + +#include <zephyr/linker/sections.h> + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_gnss_set_fix_rate(const struct device * dev, uint32_t fix_interval_ms); + +__pinned_func +static inline int gnss_set_fix_rate(const struct device * dev, uint32_t fix_interval_ms) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = fix_interval_ms }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_GNSS_SET_FIX_RATE); + } +#endif + compiler_barrier(); + return z_impl_gnss_set_fix_rate(dev, fix_interval_ms); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define gnss_set_fix_rate(dev, fix_interval_ms) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_GNSS_SET_FIX_RATE, gnss_set_fix_rate, dev, fix_interval_ms); syscall__retval = gnss_set_fix_rate(dev, fix_interval_ms); sys_port_trace_syscall_exit(K_SYSCALL_GNSS_SET_FIX_RATE, gnss_set_fix_rate, dev, fix_interval_ms, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_gnss_get_fix_rate(const struct device * dev, uint32_t * fix_interval_ms); + +__pinned_func +static inline int gnss_get_fix_rate(const struct device * dev, uint32_t * fix_interval_ms) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t * val; } parm1 = { .val = fix_interval_ms }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_GNSS_GET_FIX_RATE); + } +#endif + compiler_barrier(); + return z_impl_gnss_get_fix_rate(dev, fix_interval_ms); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define gnss_get_fix_rate(dev, fix_interval_ms) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_GNSS_GET_FIX_RATE, gnss_get_fix_rate, dev, fix_interval_ms); syscall__retval = gnss_get_fix_rate(dev, fix_interval_ms); sys_port_trace_syscall_exit(K_SYSCALL_GNSS_GET_FIX_RATE, gnss_get_fix_rate, dev, fix_interval_ms, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_gnss_set_periodic_config(const struct device * dev, const struct gnss_periodic_config * config); + +__pinned_func +static inline int gnss_set_periodic_config(const struct device * dev, const struct gnss_periodic_config * config) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; const struct gnss_periodic_config * val; } parm1 = { .val = config }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_GNSS_SET_PERIODIC_CONFIG); + } +#endif + compiler_barrier(); + return z_impl_gnss_set_periodic_config(dev, config); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define gnss_set_periodic_config(dev, config) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_GNSS_SET_PERIODIC_CONFIG, gnss_set_periodic_config, dev, config); syscall__retval = gnss_set_periodic_config(dev, config); sys_port_trace_syscall_exit(K_SYSCALL_GNSS_SET_PERIODIC_CONFIG, gnss_set_periodic_config, dev, config, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_gnss_get_periodic_config(const struct device * dev, struct gnss_periodic_config * config); + +__pinned_func +static inline int gnss_get_periodic_config(const struct device * dev, struct gnss_periodic_config * config) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; struct gnss_periodic_config * val; } parm1 = { .val = config }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_GNSS_GET_PERIODIC_CONFIG); + } +#endif + compiler_barrier(); + return z_impl_gnss_get_periodic_config(dev, config); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define gnss_get_periodic_config(dev, config) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_GNSS_GET_PERIODIC_CONFIG, gnss_get_periodic_config, dev, config); syscall__retval = gnss_get_periodic_config(dev, config); sys_port_trace_syscall_exit(K_SYSCALL_GNSS_GET_PERIODIC_CONFIG, gnss_get_periodic_config, dev, config, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_gnss_set_navigation_mode(const struct device * dev, enum gnss_navigation_mode mode); + +__pinned_func +static inline int gnss_set_navigation_mode(const struct device * dev, enum gnss_navigation_mode mode) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; enum gnss_navigation_mode val; } parm1 = { .val = mode }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_GNSS_SET_NAVIGATION_MODE); + } +#endif + compiler_barrier(); + return z_impl_gnss_set_navigation_mode(dev, mode); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define gnss_set_navigation_mode(dev, mode) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_GNSS_SET_NAVIGATION_MODE, gnss_set_navigation_mode, dev, mode); syscall__retval = gnss_set_navigation_mode(dev, mode); sys_port_trace_syscall_exit(K_SYSCALL_GNSS_SET_NAVIGATION_MODE, gnss_set_navigation_mode, dev, mode, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_gnss_get_navigation_mode(const struct device * dev, enum gnss_navigation_mode * mode); + +__pinned_func +static inline int gnss_get_navigation_mode(const struct device * dev, enum gnss_navigation_mode * mode) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; enum gnss_navigation_mode * val; } parm1 = { .val = mode }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_GNSS_GET_NAVIGATION_MODE); + } +#endif + compiler_barrier(); + return z_impl_gnss_get_navigation_mode(dev, mode); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define gnss_get_navigation_mode(dev, mode) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_GNSS_GET_NAVIGATION_MODE, gnss_get_navigation_mode, dev, mode); syscall__retval = gnss_get_navigation_mode(dev, mode); sys_port_trace_syscall_exit(K_SYSCALL_GNSS_GET_NAVIGATION_MODE, gnss_get_navigation_mode, dev, mode, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_gnss_set_enabled_systems(const struct device * dev, gnss_systems_t systems); + +__pinned_func +static inline int gnss_set_enabled_systems(const struct device * dev, gnss_systems_t systems) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; gnss_systems_t val; } parm1 = { .val = systems }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_GNSS_SET_ENABLED_SYSTEMS); + } +#endif + compiler_barrier(); + return z_impl_gnss_set_enabled_systems(dev, systems); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define gnss_set_enabled_systems(dev, systems) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_GNSS_SET_ENABLED_SYSTEMS, gnss_set_enabled_systems, dev, systems); syscall__retval = gnss_set_enabled_systems(dev, systems); sys_port_trace_syscall_exit(K_SYSCALL_GNSS_SET_ENABLED_SYSTEMS, gnss_set_enabled_systems, dev, systems, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_gnss_get_enabled_systems(const struct device * dev, gnss_systems_t * systems); + +__pinned_func +static inline int gnss_get_enabled_systems(const struct device * dev, gnss_systems_t * systems) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; gnss_systems_t * val; } parm1 = { .val = systems }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_GNSS_GET_ENABLED_SYSTEMS); + } +#endif + compiler_barrier(); + return z_impl_gnss_get_enabled_systems(dev, systems); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define gnss_get_enabled_systems(dev, systems) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_GNSS_GET_ENABLED_SYSTEMS, gnss_get_enabled_systems, dev, systems); syscall__retval = gnss_get_enabled_systems(dev, systems); sys_port_trace_syscall_exit(K_SYSCALL_GNSS_GET_ENABLED_SYSTEMS, gnss_get_enabled_systems, dev, systems, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_gnss_get_supported_systems(const struct device * dev, gnss_systems_t * systems); + +__pinned_func +static inline int gnss_get_supported_systems(const struct device * dev, gnss_systems_t * systems) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; gnss_systems_t * val; } parm1 = { .val = systems }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_GNSS_GET_SUPPORTED_SYSTEMS); + } +#endif + compiler_barrier(); + return z_impl_gnss_get_supported_systems(dev, systems); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define gnss_get_supported_systems(dev, systems) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_GNSS_GET_SUPPORTED_SYSTEMS, gnss_get_supported_systems, dev, systems); syscall__retval = gnss_get_supported_systems(dev, systems); sys_port_trace_syscall_exit(K_SYSCALL_GNSS_GET_SUPPORTED_SYSTEMS, gnss_get_supported_systems, dev, systems, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/gpio.h b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/gpio.h new file mode 100644 index 0000000..4f0f4a4 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/gpio.h @@ -0,0 +1,273 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_GPIO_H +#define Z_INCLUDE_SYSCALLS_GPIO_H + + +#include <zephyr/tracing/tracing_syscall.h> + +#ifndef _ASMLANGUAGE + +#include <stdarg.h> + +#include <syscall_list.h> +#include <zephyr/syscall.h> + +#include <zephyr/linker/sections.h> + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_gpio_pin_interrupt_configure(const struct device * port, gpio_pin_t pin, gpio_flags_t flags); + +__pinned_func +static inline int gpio_pin_interrupt_configure(const struct device * port, gpio_pin_t pin, gpio_flags_t flags) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = port }; + union { uintptr_t x; gpio_pin_t val; } parm1 = { .val = pin }; + union { uintptr_t x; gpio_flags_t val; } parm2 = { .val = flags }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_GPIO_PIN_INTERRUPT_CONFIGURE); + } +#endif + compiler_barrier(); + return z_impl_gpio_pin_interrupt_configure(port, pin, flags); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define gpio_pin_interrupt_configure(port, pin, flags) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_GPIO_PIN_INTERRUPT_CONFIGURE, gpio_pin_interrupt_configure, port, pin, flags); syscall__retval = gpio_pin_interrupt_configure(port, pin, flags); sys_port_trace_syscall_exit(K_SYSCALL_GPIO_PIN_INTERRUPT_CONFIGURE, gpio_pin_interrupt_configure, port, pin, flags, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_gpio_pin_configure(const struct device * port, gpio_pin_t pin, gpio_flags_t flags); + +__pinned_func +static inline int gpio_pin_configure(const struct device * port, gpio_pin_t pin, gpio_flags_t flags) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = port }; + union { uintptr_t x; gpio_pin_t val; } parm1 = { .val = pin }; + union { uintptr_t x; gpio_flags_t val; } parm2 = { .val = flags }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_GPIO_PIN_CONFIGURE); + } +#endif + compiler_barrier(); + return z_impl_gpio_pin_configure(port, pin, flags); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define gpio_pin_configure(port, pin, flags) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_GPIO_PIN_CONFIGURE, gpio_pin_configure, port, pin, flags); syscall__retval = gpio_pin_configure(port, pin, flags); sys_port_trace_syscall_exit(K_SYSCALL_GPIO_PIN_CONFIGURE, gpio_pin_configure, port, pin, flags, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_gpio_port_get_direction(const struct device * port, gpio_port_pins_t map, gpio_port_pins_t * inputs, gpio_port_pins_t * outputs); + +__pinned_func +static inline int gpio_port_get_direction(const struct device * port, gpio_port_pins_t map, gpio_port_pins_t * inputs, gpio_port_pins_t * outputs) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = port }; + union { uintptr_t x; gpio_port_pins_t val; } parm1 = { .val = map }; + union { uintptr_t x; gpio_port_pins_t * val; } parm2 = { .val = inputs }; + union { uintptr_t x; gpio_port_pins_t * val; } parm3 = { .val = outputs }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_GPIO_PORT_GET_DIRECTION); + } +#endif + compiler_barrier(); + return z_impl_gpio_port_get_direction(port, map, inputs, outputs); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define gpio_port_get_direction(port, map, inputs, outputs) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_GPIO_PORT_GET_DIRECTION, gpio_port_get_direction, port, map, inputs, outputs); syscall__retval = gpio_port_get_direction(port, map, inputs, outputs); sys_port_trace_syscall_exit(K_SYSCALL_GPIO_PORT_GET_DIRECTION, gpio_port_get_direction, port, map, inputs, outputs, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_gpio_pin_get_config(const struct device * port, gpio_pin_t pin, gpio_flags_t * flags); + +__pinned_func +static inline int gpio_pin_get_config(const struct device * port, gpio_pin_t pin, gpio_flags_t * flags) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = port }; + union { uintptr_t x; gpio_pin_t val; } parm1 = { .val = pin }; + union { uintptr_t x; gpio_flags_t * val; } parm2 = { .val = flags }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_GPIO_PIN_GET_CONFIG); + } +#endif + compiler_barrier(); + return z_impl_gpio_pin_get_config(port, pin, flags); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define gpio_pin_get_config(port, pin, flags) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_GPIO_PIN_GET_CONFIG, gpio_pin_get_config, port, pin, flags); syscall__retval = gpio_pin_get_config(port, pin, flags); sys_port_trace_syscall_exit(K_SYSCALL_GPIO_PIN_GET_CONFIG, gpio_pin_get_config, port, pin, flags, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_gpio_port_get_raw(const struct device * port, gpio_port_value_t * value); + +__pinned_func +static inline int gpio_port_get_raw(const struct device * port, gpio_port_value_t * value) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = port }; + union { uintptr_t x; gpio_port_value_t * val; } parm1 = { .val = value }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_GPIO_PORT_GET_RAW); + } +#endif + compiler_barrier(); + return z_impl_gpio_port_get_raw(port, value); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define gpio_port_get_raw(port, value) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_GPIO_PORT_GET_RAW, gpio_port_get_raw, port, value); syscall__retval = gpio_port_get_raw(port, value); sys_port_trace_syscall_exit(K_SYSCALL_GPIO_PORT_GET_RAW, gpio_port_get_raw, port, value, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_gpio_port_set_masked_raw(const struct device * port, gpio_port_pins_t mask, gpio_port_value_t value); + +__pinned_func +static inline int gpio_port_set_masked_raw(const struct device * port, gpio_port_pins_t mask, gpio_port_value_t value) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = port }; + union { uintptr_t x; gpio_port_pins_t val; } parm1 = { .val = mask }; + union { uintptr_t x; gpio_port_value_t val; } parm2 = { .val = value }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_GPIO_PORT_SET_MASKED_RAW); + } +#endif + compiler_barrier(); + return z_impl_gpio_port_set_masked_raw(port, mask, value); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define gpio_port_set_masked_raw(port, mask, value) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_GPIO_PORT_SET_MASKED_RAW, gpio_port_set_masked_raw, port, mask, value); syscall__retval = gpio_port_set_masked_raw(port, mask, value); sys_port_trace_syscall_exit(K_SYSCALL_GPIO_PORT_SET_MASKED_RAW, gpio_port_set_masked_raw, port, mask, value, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_gpio_port_set_bits_raw(const struct device * port, gpio_port_pins_t pins); + +__pinned_func +static inline int gpio_port_set_bits_raw(const struct device * port, gpio_port_pins_t pins) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = port }; + union { uintptr_t x; gpio_port_pins_t val; } parm1 = { .val = pins }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_GPIO_PORT_SET_BITS_RAW); + } +#endif + compiler_barrier(); + return z_impl_gpio_port_set_bits_raw(port, pins); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define gpio_port_set_bits_raw(port, pins) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_GPIO_PORT_SET_BITS_RAW, gpio_port_set_bits_raw, port, pins); syscall__retval = gpio_port_set_bits_raw(port, pins); sys_port_trace_syscall_exit(K_SYSCALL_GPIO_PORT_SET_BITS_RAW, gpio_port_set_bits_raw, port, pins, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_gpio_port_clear_bits_raw(const struct device * port, gpio_port_pins_t pins); + +__pinned_func +static inline int gpio_port_clear_bits_raw(const struct device * port, gpio_port_pins_t pins) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = port }; + union { uintptr_t x; gpio_port_pins_t val; } parm1 = { .val = pins }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_GPIO_PORT_CLEAR_BITS_RAW); + } +#endif + compiler_barrier(); + return z_impl_gpio_port_clear_bits_raw(port, pins); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define gpio_port_clear_bits_raw(port, pins) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_GPIO_PORT_CLEAR_BITS_RAW, gpio_port_clear_bits_raw, port, pins); syscall__retval = gpio_port_clear_bits_raw(port, pins); sys_port_trace_syscall_exit(K_SYSCALL_GPIO_PORT_CLEAR_BITS_RAW, gpio_port_clear_bits_raw, port, pins, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_gpio_port_toggle_bits(const struct device * port, gpio_port_pins_t pins); + +__pinned_func +static inline int gpio_port_toggle_bits(const struct device * port, gpio_port_pins_t pins) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = port }; + union { uintptr_t x; gpio_port_pins_t val; } parm1 = { .val = pins }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_GPIO_PORT_TOGGLE_BITS); + } +#endif + compiler_barrier(); + return z_impl_gpio_port_toggle_bits(port, pins); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define gpio_port_toggle_bits(port, pins) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_GPIO_PORT_TOGGLE_BITS, gpio_port_toggle_bits, port, pins); syscall__retval = gpio_port_toggle_bits(port, pins); sys_port_trace_syscall_exit(K_SYSCALL_GPIO_PORT_TOGGLE_BITS, gpio_port_toggle_bits, port, pins, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_gpio_get_pending_int(const struct device * dev); + +__pinned_func +static inline int gpio_get_pending_int(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_GPIO_GET_PENDING_INT); + } +#endif + compiler_barrier(); + return z_impl_gpio_get_pending_int(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define gpio_get_pending_int(dev) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_GPIO_GET_PENDING_INT, gpio_get_pending_int, dev); syscall__retval = gpio_get_pending_int(dev); sys_port_trace_syscall_exit(K_SYSCALL_GPIO_GET_PENDING_INT, gpio_get_pending_int, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/hwinfo.h b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/hwinfo.h new file mode 100644 index 0000000..e6fd1a0 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/hwinfo.h @@ -0,0 +1,143 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_HWINFO_H +#define Z_INCLUDE_SYSCALLS_HWINFO_H + + +#include <zephyr/tracing/tracing_syscall.h> + +#ifndef _ASMLANGUAGE + +#include <stdarg.h> + +#include <syscall_list.h> +#include <zephyr/syscall.h> + +#include <zephyr/linker/sections.h> + + +#ifdef __cplusplus +extern "C" { +#endif + +extern ssize_t z_impl_hwinfo_get_device_id(uint8_t * buffer, size_t length); + +__pinned_func +static inline ssize_t hwinfo_get_device_id(uint8_t * buffer, size_t length) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; uint8_t * val; } parm0 = { .val = buffer }; + union { uintptr_t x; size_t val; } parm1 = { .val = length }; + return (ssize_t) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_HWINFO_GET_DEVICE_ID); + } +#endif + compiler_barrier(); + return z_impl_hwinfo_get_device_id(buffer, length); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define hwinfo_get_device_id(buffer, length) ({ ssize_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_HWINFO_GET_DEVICE_ID, hwinfo_get_device_id, buffer, length); syscall__retval = hwinfo_get_device_id(buffer, length); sys_port_trace_syscall_exit(K_SYSCALL_HWINFO_GET_DEVICE_ID, hwinfo_get_device_id, buffer, length, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_hwinfo_get_device_eui64(uint8_t * buffer); + +__pinned_func +static inline int hwinfo_get_device_eui64(uint8_t * buffer) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; uint8_t * val; } parm0 = { .val = buffer }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_HWINFO_GET_DEVICE_EUI64); + } +#endif + compiler_barrier(); + return z_impl_hwinfo_get_device_eui64(buffer); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define hwinfo_get_device_eui64(buffer) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_HWINFO_GET_DEVICE_EUI64, hwinfo_get_device_eui64, buffer); syscall__retval = hwinfo_get_device_eui64(buffer); sys_port_trace_syscall_exit(K_SYSCALL_HWINFO_GET_DEVICE_EUI64, hwinfo_get_device_eui64, buffer, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_hwinfo_get_reset_cause(uint32_t * cause); + +__pinned_func +static inline int hwinfo_get_reset_cause(uint32_t * cause) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; uint32_t * val; } parm0 = { .val = cause }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_HWINFO_GET_RESET_CAUSE); + } +#endif + compiler_barrier(); + return z_impl_hwinfo_get_reset_cause(cause); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define hwinfo_get_reset_cause(cause) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_HWINFO_GET_RESET_CAUSE, hwinfo_get_reset_cause, cause); syscall__retval = hwinfo_get_reset_cause(cause); sys_port_trace_syscall_exit(K_SYSCALL_HWINFO_GET_RESET_CAUSE, hwinfo_get_reset_cause, cause, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_hwinfo_clear_reset_cause(void); + +__pinned_func +static inline int hwinfo_clear_reset_cause(void) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + return (int) arch_syscall_invoke0(K_SYSCALL_HWINFO_CLEAR_RESET_CAUSE); + } +#endif + compiler_barrier(); + return z_impl_hwinfo_clear_reset_cause(); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define hwinfo_clear_reset_cause() ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_HWINFO_CLEAR_RESET_CAUSE, hwinfo_clear_reset_cause); syscall__retval = hwinfo_clear_reset_cause(); sys_port_trace_syscall_exit(K_SYSCALL_HWINFO_CLEAR_RESET_CAUSE, hwinfo_clear_reset_cause, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_hwinfo_get_supported_reset_cause(uint32_t * supported); + +__pinned_func +static inline int hwinfo_get_supported_reset_cause(uint32_t * supported) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; uint32_t * val; } parm0 = { .val = supported }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_HWINFO_GET_SUPPORTED_RESET_CAUSE); + } +#endif + compiler_barrier(); + return z_impl_hwinfo_get_supported_reset_cause(supported); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define hwinfo_get_supported_reset_cause(supported) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_HWINFO_GET_SUPPORTED_RESET_CAUSE, hwinfo_get_supported_reset_cause, supported); syscall__retval = hwinfo_get_supported_reset_cause(supported); sys_port_trace_syscall_exit(K_SYSCALL_HWINFO_GET_SUPPORTED_RESET_CAUSE, hwinfo_get_supported_reset_cause, supported, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/hwspinlock.h b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/hwspinlock.h new file mode 100644 index 0000000..283fc5e --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/hwspinlock.h @@ -0,0 +1,125 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_HWSPINLOCK_H +#define Z_INCLUDE_SYSCALLS_HWSPINLOCK_H + + +#include <zephyr/tracing/tracing_syscall.h> + +#ifndef _ASMLANGUAGE + +#include <stdarg.h> + +#include <syscall_list.h> +#include <zephyr/syscall.h> + +#include <zephyr/linker/sections.h> + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_hwspinlock_trylock(const struct device * dev, uint32_t id); + +__pinned_func +static inline int hwspinlock_trylock(const struct device * dev, uint32_t id) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = id }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_HWSPINLOCK_TRYLOCK); + } +#endif + compiler_barrier(); + return z_impl_hwspinlock_trylock(dev, id); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define hwspinlock_trylock(dev, id) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_HWSPINLOCK_TRYLOCK, hwspinlock_trylock, dev, id); syscall__retval = hwspinlock_trylock(dev, id); sys_port_trace_syscall_exit(K_SYSCALL_HWSPINLOCK_TRYLOCK, hwspinlock_trylock, dev, id, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern void z_impl_hwspinlock_lock(const struct device * dev, uint32_t id); + +__pinned_func +static inline void hwspinlock_lock(const struct device * dev, uint32_t id) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = id }; + (void) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_HWSPINLOCK_LOCK); + return; + } +#endif + compiler_barrier(); + z_impl_hwspinlock_lock(dev, id); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define hwspinlock_lock(dev, id) do { sys_port_trace_syscall_enter(K_SYSCALL_HWSPINLOCK_LOCK, hwspinlock_lock, dev, id); hwspinlock_lock(dev, id); sys_port_trace_syscall_exit(K_SYSCALL_HWSPINLOCK_LOCK, hwspinlock_lock, dev, id); } while(false) +#endif +#endif + + +extern void z_impl_hwspinlock_unlock(const struct device * dev, uint32_t id); + +__pinned_func +static inline void hwspinlock_unlock(const struct device * dev, uint32_t id) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = id }; + (void) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_HWSPINLOCK_UNLOCK); + return; + } +#endif + compiler_barrier(); + z_impl_hwspinlock_unlock(dev, id); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define hwspinlock_unlock(dev, id) do { sys_port_trace_syscall_enter(K_SYSCALL_HWSPINLOCK_UNLOCK, hwspinlock_unlock, dev, id); hwspinlock_unlock(dev, id); sys_port_trace_syscall_exit(K_SYSCALL_HWSPINLOCK_UNLOCK, hwspinlock_unlock, dev, id); } while(false) +#endif +#endif + + +extern uint32_t z_impl_hwspinlock_get_max_id(const struct device * dev); + +__pinned_func +static inline uint32_t hwspinlock_get_max_id(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (uint32_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_HWSPINLOCK_GET_MAX_ID); + } +#endif + compiler_barrier(); + return z_impl_hwspinlock_get_max_id(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define hwspinlock_get_max_id(dev) ({ uint32_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_HWSPINLOCK_GET_MAX_ID, hwspinlock_get_max_id, dev); syscall__retval = hwspinlock_get_max_id(dev); sys_port_trace_syscall_exit(K_SYSCALL_HWSPINLOCK_GET_MAX_ID, hwspinlock_get_max_id, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/i2c.h b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/i2c.h new file mode 100644 index 0000000..494e68e --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/i2c.h @@ -0,0 +1,171 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_I2C_H +#define Z_INCLUDE_SYSCALLS_I2C_H + + +#include <zephyr/tracing/tracing_syscall.h> + +#ifndef _ASMLANGUAGE + +#include <stdarg.h> + +#include <syscall_list.h> +#include <zephyr/syscall.h> + +#include <zephyr/linker/sections.h> + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_i2c_configure(const struct device * dev, uint32_t dev_config); + +__pinned_func +static inline int i2c_configure(const struct device * dev, uint32_t dev_config) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = dev_config }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_I2C_CONFIGURE); + } +#endif + compiler_barrier(); + return z_impl_i2c_configure(dev, dev_config); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define i2c_configure(dev, dev_config) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_I2C_CONFIGURE, i2c_configure, dev, dev_config); syscall__retval = i2c_configure(dev, dev_config); sys_port_trace_syscall_exit(K_SYSCALL_I2C_CONFIGURE, i2c_configure, dev, dev_config, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_i2c_get_config(const struct device * dev, uint32_t * dev_config); + +__pinned_func +static inline int i2c_get_config(const struct device * dev, uint32_t * dev_config) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t * val; } parm1 = { .val = dev_config }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_I2C_GET_CONFIG); + } +#endif + compiler_barrier(); + return z_impl_i2c_get_config(dev, dev_config); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define i2c_get_config(dev, dev_config) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_I2C_GET_CONFIG, i2c_get_config, dev, dev_config); syscall__retval = i2c_get_config(dev, dev_config); sys_port_trace_syscall_exit(K_SYSCALL_I2C_GET_CONFIG, i2c_get_config, dev, dev_config, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_i2c_transfer(const struct device * dev, struct i2c_msg * msgs, uint8_t num_msgs, uint16_t addr); + +__pinned_func +static inline int i2c_transfer(const struct device * dev, struct i2c_msg * msgs, uint8_t num_msgs, uint16_t addr) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; struct i2c_msg * val; } parm1 = { .val = msgs }; + union { uintptr_t x; uint8_t val; } parm2 = { .val = num_msgs }; + union { uintptr_t x; uint16_t val; } parm3 = { .val = addr }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_I2C_TRANSFER); + } +#endif + compiler_barrier(); + return z_impl_i2c_transfer(dev, msgs, num_msgs, addr); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define i2c_transfer(dev, msgs, num_msgs, addr) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_I2C_TRANSFER, i2c_transfer, dev, msgs, num_msgs, addr); syscall__retval = i2c_transfer(dev, msgs, num_msgs, addr); sys_port_trace_syscall_exit(K_SYSCALL_I2C_TRANSFER, i2c_transfer, dev, msgs, num_msgs, addr, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_i2c_recover_bus(const struct device * dev); + +__pinned_func +static inline int i2c_recover_bus(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_I2C_RECOVER_BUS); + } +#endif + compiler_barrier(); + return z_impl_i2c_recover_bus(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define i2c_recover_bus(dev) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_I2C_RECOVER_BUS, i2c_recover_bus, dev); syscall__retval = i2c_recover_bus(dev); sys_port_trace_syscall_exit(K_SYSCALL_I2C_RECOVER_BUS, i2c_recover_bus, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_i2c_target_driver_register(const struct device * dev); + +__pinned_func +static inline int i2c_target_driver_register(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_I2C_TARGET_DRIVER_REGISTER); + } +#endif + compiler_barrier(); + return z_impl_i2c_target_driver_register(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define i2c_target_driver_register(dev) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_I2C_TARGET_DRIVER_REGISTER, i2c_target_driver_register, dev); syscall__retval = i2c_target_driver_register(dev); sys_port_trace_syscall_exit(K_SYSCALL_I2C_TARGET_DRIVER_REGISTER, i2c_target_driver_register, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_i2c_target_driver_unregister(const struct device * dev); + +__pinned_func +static inline int i2c_target_driver_unregister(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_I2C_TARGET_DRIVER_UNREGISTER); + } +#endif + compiler_barrier(); + return z_impl_i2c_target_driver_unregister(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define i2c_target_driver_unregister(dev) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_I2C_TARGET_DRIVER_UNREGISTER, i2c_target_driver_unregister, dev); syscall__retval = i2c_target_driver_unregister(dev); sys_port_trace_syscall_exit(K_SYSCALL_I2C_TARGET_DRIVER_UNREGISTER, i2c_target_driver_unregister, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/i2s.h b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/i2s.h new file mode 100644 index 0000000..28460ba --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/i2s.h @@ -0,0 +1,128 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_I2S_H +#define Z_INCLUDE_SYSCALLS_I2S_H + + +#include <zephyr/tracing/tracing_syscall.h> + +#ifndef _ASMLANGUAGE + +#include <stdarg.h> + +#include <syscall_list.h> +#include <zephyr/syscall.h> + +#include <zephyr/linker/sections.h> + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_i2s_configure(const struct device * dev, enum i2s_dir dir, const struct i2s_config * cfg); + +__pinned_func +static inline int i2s_configure(const struct device * dev, enum i2s_dir dir, const struct i2s_config * cfg) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; enum i2s_dir val; } parm1 = { .val = dir }; + union { uintptr_t x; const struct i2s_config * val; } parm2 = { .val = cfg }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_I2S_CONFIGURE); + } +#endif + compiler_barrier(); + return z_impl_i2s_configure(dev, dir, cfg); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define i2s_configure(dev, dir, cfg) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_I2S_CONFIGURE, i2s_configure, dev, dir, cfg); syscall__retval = i2s_configure(dev, dir, cfg); sys_port_trace_syscall_exit(K_SYSCALL_I2S_CONFIGURE, i2s_configure, dev, dir, cfg, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_i2s_buf_read(const struct device * dev, void * buf, size_t * size); + +__pinned_func +static inline int i2s_buf_read(const struct device * dev, void * buf, size_t * size) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; void * val; } parm1 = { .val = buf }; + union { uintptr_t x; size_t * val; } parm2 = { .val = size }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_I2S_BUF_READ); + } +#endif + compiler_barrier(); + return z_impl_i2s_buf_read(dev, buf, size); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define i2s_buf_read(dev, buf, size) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_I2S_BUF_READ, i2s_buf_read, dev, buf, size); syscall__retval = i2s_buf_read(dev, buf, size); sys_port_trace_syscall_exit(K_SYSCALL_I2S_BUF_READ, i2s_buf_read, dev, buf, size, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_i2s_buf_write(const struct device * dev, void * buf, size_t size); + +__pinned_func +static inline int i2s_buf_write(const struct device * dev, void * buf, size_t size) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; void * val; } parm1 = { .val = buf }; + union { uintptr_t x; size_t val; } parm2 = { .val = size }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_I2S_BUF_WRITE); + } +#endif + compiler_barrier(); + return z_impl_i2s_buf_write(dev, buf, size); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define i2s_buf_write(dev, buf, size) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_I2S_BUF_WRITE, i2s_buf_write, dev, buf, size); syscall__retval = i2s_buf_write(dev, buf, size); sys_port_trace_syscall_exit(K_SYSCALL_I2S_BUF_WRITE, i2s_buf_write, dev, buf, size, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_i2s_trigger(const struct device * dev, enum i2s_dir dir, enum i2s_trigger_cmd cmd); + +__pinned_func +static inline int i2s_trigger(const struct device * dev, enum i2s_dir dir, enum i2s_trigger_cmd cmd) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; enum i2s_dir val; } parm1 = { .val = dir }; + union { uintptr_t x; enum i2s_trigger_cmd val; } parm2 = { .val = cmd }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_I2S_TRIGGER); + } +#endif + compiler_barrier(); + return z_impl_i2s_trigger(dev, dir, cmd); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define i2s_trigger(dev, dir, cmd) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_I2S_TRIGGER, i2s_trigger, dev, dir, cmd); syscall__retval = i2s_trigger(dev, dir, cmd); sys_port_trace_syscall_exit(K_SYSCALL_I2S_TRIGGER, i2s_trigger, dev, dir, cmd, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/i3c.h b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/i3c.h new file mode 100644 index 0000000..ef9430b --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/i3c.h @@ -0,0 +1,77 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_I3C_H +#define Z_INCLUDE_SYSCALLS_I3C_H + + +#include <zephyr/tracing/tracing_syscall.h> + +#ifndef _ASMLANGUAGE + +#include <stdarg.h> + +#include <syscall_list.h> +#include <zephyr/syscall.h> + +#include <zephyr/linker/sections.h> + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_i3c_do_ccc(const struct device * dev, struct i3c_ccc_payload * payload); + +__pinned_func +static inline int i3c_do_ccc(const struct device * dev, struct i3c_ccc_payload * payload) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; struct i3c_ccc_payload * val; } parm1 = { .val = payload }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_I3C_DO_CCC); + } +#endif + compiler_barrier(); + return z_impl_i3c_do_ccc(dev, payload); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define i3c_do_ccc(dev, payload) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_I3C_DO_CCC, i3c_do_ccc, dev, payload); syscall__retval = i3c_do_ccc(dev, payload); sys_port_trace_syscall_exit(K_SYSCALL_I3C_DO_CCC, i3c_do_ccc, dev, payload, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_i3c_transfer(struct i3c_device_desc * target, struct i3c_msg * msgs, uint8_t num_msgs); + +__pinned_func +static inline int i3c_transfer(struct i3c_device_desc * target, struct i3c_msg * msgs, uint8_t num_msgs) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct i3c_device_desc * val; } parm0 = { .val = target }; + union { uintptr_t x; struct i3c_msg * val; } parm1 = { .val = msgs }; + union { uintptr_t x; uint8_t val; } parm2 = { .val = num_msgs }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_I3C_TRANSFER); + } +#endif + compiler_barrier(); + return z_impl_i3c_transfer(target, msgs, num_msgs); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define i3c_transfer(target, msgs, num_msgs) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_I3C_TRANSFER, i3c_transfer, target, msgs, num_msgs); syscall__retval = i3c_transfer(target, msgs, num_msgs); sys_port_trace_syscall_exit(K_SYSCALL_I3C_TRANSFER, i3c_transfer, target, msgs, num_msgs, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/ipm.h b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/ipm.h new file mode 100644 index 0000000..ff340ea --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/ipm.h @@ -0,0 +1,149 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_IPM_H +#define Z_INCLUDE_SYSCALLS_IPM_H + + +#include <zephyr/tracing/tracing_syscall.h> + +#ifndef _ASMLANGUAGE + +#include <stdarg.h> + +#include <syscall_list.h> +#include <zephyr/syscall.h> + +#include <zephyr/linker/sections.h> + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_ipm_send(const struct device * ipmdev, int wait, uint32_t id, const void * data, int size); + +__pinned_func +static inline int ipm_send(const struct device * ipmdev, int wait, uint32_t id, const void * data, int size) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = ipmdev }; + union { uintptr_t x; int val; } parm1 = { .val = wait }; + union { uintptr_t x; uint32_t val; } parm2 = { .val = id }; + union { uintptr_t x; const void * val; } parm3 = { .val = data }; + union { uintptr_t x; int val; } parm4 = { .val = size }; + return (int) arch_syscall_invoke5(parm0.x, parm1.x, parm2.x, parm3.x, parm4.x, K_SYSCALL_IPM_SEND); + } +#endif + compiler_barrier(); + return z_impl_ipm_send(ipmdev, wait, id, data, size); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define ipm_send(ipmdev, wait, id, data, size) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_IPM_SEND, ipm_send, ipmdev, wait, id, data, size); syscall__retval = ipm_send(ipmdev, wait, id, data, size); sys_port_trace_syscall_exit(K_SYSCALL_IPM_SEND, ipm_send, ipmdev, wait, id, data, size, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_ipm_max_data_size_get(const struct device * ipmdev); + +__pinned_func +static inline int ipm_max_data_size_get(const struct device * ipmdev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = ipmdev }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_IPM_MAX_DATA_SIZE_GET); + } +#endif + compiler_barrier(); + return z_impl_ipm_max_data_size_get(ipmdev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define ipm_max_data_size_get(ipmdev) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_IPM_MAX_DATA_SIZE_GET, ipm_max_data_size_get, ipmdev); syscall__retval = ipm_max_data_size_get(ipmdev); sys_port_trace_syscall_exit(K_SYSCALL_IPM_MAX_DATA_SIZE_GET, ipm_max_data_size_get, ipmdev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern uint32_t z_impl_ipm_max_id_val_get(const struct device * ipmdev); + +__pinned_func +static inline uint32_t ipm_max_id_val_get(const struct device * ipmdev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = ipmdev }; + return (uint32_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_IPM_MAX_ID_VAL_GET); + } +#endif + compiler_barrier(); + return z_impl_ipm_max_id_val_get(ipmdev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define ipm_max_id_val_get(ipmdev) ({ uint32_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_IPM_MAX_ID_VAL_GET, ipm_max_id_val_get, ipmdev); syscall__retval = ipm_max_id_val_get(ipmdev); sys_port_trace_syscall_exit(K_SYSCALL_IPM_MAX_ID_VAL_GET, ipm_max_id_val_get, ipmdev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_ipm_set_enabled(const struct device * ipmdev, int enable); + +__pinned_func +static inline int ipm_set_enabled(const struct device * ipmdev, int enable) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = ipmdev }; + union { uintptr_t x; int val; } parm1 = { .val = enable }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_IPM_SET_ENABLED); + } +#endif + compiler_barrier(); + return z_impl_ipm_set_enabled(ipmdev, enable); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define ipm_set_enabled(ipmdev, enable) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_IPM_SET_ENABLED, ipm_set_enabled, ipmdev, enable); syscall__retval = ipm_set_enabled(ipmdev, enable); sys_port_trace_syscall_exit(K_SYSCALL_IPM_SET_ENABLED, ipm_set_enabled, ipmdev, enable, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern void z_impl_ipm_complete(const struct device * ipmdev); + +__pinned_func +static inline void ipm_complete(const struct device * ipmdev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = ipmdev }; + (void) arch_syscall_invoke1(parm0.x, K_SYSCALL_IPM_COMPLETE); + return; + } +#endif + compiler_barrier(); + z_impl_ipm_complete(ipmdev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define ipm_complete(ipmdev) do { sys_port_trace_syscall_enter(K_SYSCALL_IPM_COMPLETE, ipm_complete, ipmdev); ipm_complete(ipmdev); sys_port_trace_syscall_exit(K_SYSCALL_IPM_COMPLETE, ipm_complete, ipmdev); } while(false) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/ivshmem.h b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/ivshmem.h new file mode 100644 index 0000000..8f51cb3 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/ivshmem.h @@ -0,0 +1,315 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_IVSHMEM_H +#define Z_INCLUDE_SYSCALLS_IVSHMEM_H + + +#include <zephyr/tracing/tracing_syscall.h> + +#ifndef _ASMLANGUAGE + +#include <stdarg.h> + +#include <syscall_list.h> +#include <zephyr/syscall.h> + +#include <zephyr/linker/sections.h> + + +#ifdef __cplusplus +extern "C" { +#endif + +extern size_t z_impl_ivshmem_get_mem(const struct device * dev, uintptr_t * memmap); + +__pinned_func +static inline size_t ivshmem_get_mem(const struct device * dev, uintptr_t * memmap) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uintptr_t * val; } parm1 = { .val = memmap }; + return (size_t) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_IVSHMEM_GET_MEM); + } +#endif + compiler_barrier(); + return z_impl_ivshmem_get_mem(dev, memmap); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define ivshmem_get_mem(dev, memmap) ({ size_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_IVSHMEM_GET_MEM, ivshmem_get_mem, dev, memmap); syscall__retval = ivshmem_get_mem(dev, memmap); sys_port_trace_syscall_exit(K_SYSCALL_IVSHMEM_GET_MEM, ivshmem_get_mem, dev, memmap, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern uint32_t z_impl_ivshmem_get_id(const struct device * dev); + +__pinned_func +static inline uint32_t ivshmem_get_id(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (uint32_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_IVSHMEM_GET_ID); + } +#endif + compiler_barrier(); + return z_impl_ivshmem_get_id(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define ivshmem_get_id(dev) ({ uint32_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_IVSHMEM_GET_ID, ivshmem_get_id, dev); syscall__retval = ivshmem_get_id(dev); sys_port_trace_syscall_exit(K_SYSCALL_IVSHMEM_GET_ID, ivshmem_get_id, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern uint16_t z_impl_ivshmem_get_vectors(const struct device * dev); + +__pinned_func +static inline uint16_t ivshmem_get_vectors(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (uint16_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_IVSHMEM_GET_VECTORS); + } +#endif + compiler_barrier(); + return z_impl_ivshmem_get_vectors(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define ivshmem_get_vectors(dev) ({ uint16_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_IVSHMEM_GET_VECTORS, ivshmem_get_vectors, dev); syscall__retval = ivshmem_get_vectors(dev); sys_port_trace_syscall_exit(K_SYSCALL_IVSHMEM_GET_VECTORS, ivshmem_get_vectors, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_ivshmem_int_peer(const struct device * dev, uint32_t peer_id, uint16_t vector); + +__pinned_func +static inline int ivshmem_int_peer(const struct device * dev, uint32_t peer_id, uint16_t vector) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = peer_id }; + union { uintptr_t x; uint16_t val; } parm2 = { .val = vector }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_IVSHMEM_INT_PEER); + } +#endif + compiler_barrier(); + return z_impl_ivshmem_int_peer(dev, peer_id, vector); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define ivshmem_int_peer(dev, peer_id, vector) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_IVSHMEM_INT_PEER, ivshmem_int_peer, dev, peer_id, vector); syscall__retval = ivshmem_int_peer(dev, peer_id, vector); sys_port_trace_syscall_exit(K_SYSCALL_IVSHMEM_INT_PEER, ivshmem_int_peer, dev, peer_id, vector, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_ivshmem_register_handler(const struct device * dev, struct k_poll_signal * signal, uint16_t vector); + +__pinned_func +static inline int ivshmem_register_handler(const struct device * dev, struct k_poll_signal * signal, uint16_t vector) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; struct k_poll_signal * val; } parm1 = { .val = signal }; + union { uintptr_t x; uint16_t val; } parm2 = { .val = vector }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_IVSHMEM_REGISTER_HANDLER); + } +#endif + compiler_barrier(); + return z_impl_ivshmem_register_handler(dev, signal, vector); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define ivshmem_register_handler(dev, signal, vector) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_IVSHMEM_REGISTER_HANDLER, ivshmem_register_handler, dev, signal, vector); syscall__retval = ivshmem_register_handler(dev, signal, vector); sys_port_trace_syscall_exit(K_SYSCALL_IVSHMEM_REGISTER_HANDLER, ivshmem_register_handler, dev, signal, vector, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern size_t z_impl_ivshmem_get_rw_mem_section(const struct device * dev, uintptr_t * memmap); + +__pinned_func +static inline size_t ivshmem_get_rw_mem_section(const struct device * dev, uintptr_t * memmap) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uintptr_t * val; } parm1 = { .val = memmap }; + return (size_t) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_IVSHMEM_GET_RW_MEM_SECTION); + } +#endif + compiler_barrier(); + return z_impl_ivshmem_get_rw_mem_section(dev, memmap); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define ivshmem_get_rw_mem_section(dev, memmap) ({ size_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_IVSHMEM_GET_RW_MEM_SECTION, ivshmem_get_rw_mem_section, dev, memmap); syscall__retval = ivshmem_get_rw_mem_section(dev, memmap); sys_port_trace_syscall_exit(K_SYSCALL_IVSHMEM_GET_RW_MEM_SECTION, ivshmem_get_rw_mem_section, dev, memmap, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern size_t z_impl_ivshmem_get_output_mem_section(const struct device * dev, uint32_t peer_id, uintptr_t * memmap); + +__pinned_func +static inline size_t ivshmem_get_output_mem_section(const struct device * dev, uint32_t peer_id, uintptr_t * memmap) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = peer_id }; + union { uintptr_t x; uintptr_t * val; } parm2 = { .val = memmap }; + return (size_t) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_IVSHMEM_GET_OUTPUT_MEM_SECTION); + } +#endif + compiler_barrier(); + return z_impl_ivshmem_get_output_mem_section(dev, peer_id, memmap); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define ivshmem_get_output_mem_section(dev, peer_id, memmap) ({ size_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_IVSHMEM_GET_OUTPUT_MEM_SECTION, ivshmem_get_output_mem_section, dev, peer_id, memmap); syscall__retval = ivshmem_get_output_mem_section(dev, peer_id, memmap); sys_port_trace_syscall_exit(K_SYSCALL_IVSHMEM_GET_OUTPUT_MEM_SECTION, ivshmem_get_output_mem_section, dev, peer_id, memmap, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern uint32_t z_impl_ivshmem_get_state(const struct device * dev, uint32_t peer_id); + +__pinned_func +static inline uint32_t ivshmem_get_state(const struct device * dev, uint32_t peer_id) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = peer_id }; + return (uint32_t) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_IVSHMEM_GET_STATE); + } +#endif + compiler_barrier(); + return z_impl_ivshmem_get_state(dev, peer_id); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define ivshmem_get_state(dev, peer_id) ({ uint32_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_IVSHMEM_GET_STATE, ivshmem_get_state, dev, peer_id); syscall__retval = ivshmem_get_state(dev, peer_id); sys_port_trace_syscall_exit(K_SYSCALL_IVSHMEM_GET_STATE, ivshmem_get_state, dev, peer_id, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_ivshmem_set_state(const struct device * dev, uint32_t state); + +__pinned_func +static inline int ivshmem_set_state(const struct device * dev, uint32_t state) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = state }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_IVSHMEM_SET_STATE); + } +#endif + compiler_barrier(); + return z_impl_ivshmem_set_state(dev, state); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define ivshmem_set_state(dev, state) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_IVSHMEM_SET_STATE, ivshmem_set_state, dev, state); syscall__retval = ivshmem_set_state(dev, state); sys_port_trace_syscall_exit(K_SYSCALL_IVSHMEM_SET_STATE, ivshmem_set_state, dev, state, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern uint32_t z_impl_ivshmem_get_max_peers(const struct device * dev); + +__pinned_func +static inline uint32_t ivshmem_get_max_peers(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (uint32_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_IVSHMEM_GET_MAX_PEERS); + } +#endif + compiler_barrier(); + return z_impl_ivshmem_get_max_peers(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define ivshmem_get_max_peers(dev) ({ uint32_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_IVSHMEM_GET_MAX_PEERS, ivshmem_get_max_peers, dev); syscall__retval = ivshmem_get_max_peers(dev); sys_port_trace_syscall_exit(K_SYSCALL_IVSHMEM_GET_MAX_PEERS, ivshmem_get_max_peers, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern uint16_t z_impl_ivshmem_get_protocol(const struct device * dev); + +__pinned_func +static inline uint16_t ivshmem_get_protocol(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (uint16_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_IVSHMEM_GET_PROTOCOL); + } +#endif + compiler_barrier(); + return z_impl_ivshmem_get_protocol(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define ivshmem_get_protocol(dev) ({ uint16_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_IVSHMEM_GET_PROTOCOL, ivshmem_get_protocol, dev); syscall__retval = ivshmem_get_protocol(dev); sys_port_trace_syscall_exit(K_SYSCALL_IVSHMEM_GET_PROTOCOL, ivshmem_get_protocol, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_ivshmem_enable_interrupts(const struct device * dev, bool enable); + +__pinned_func +static inline int ivshmem_enable_interrupts(const struct device * dev, bool enable) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; bool val; } parm1 = { .val = enable }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_IVSHMEM_ENABLE_INTERRUPTS); + } +#endif + compiler_barrier(); + return z_impl_ivshmem_enable_interrupts(dev, enable); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define ivshmem_enable_interrupts(dev, enable) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_IVSHMEM_ENABLE_INTERRUPTS, ivshmem_enable_interrupts, dev, enable); syscall__retval = ivshmem_enable_interrupts(dev, enable); sys_port_trace_syscall_exit(K_SYSCALL_IVSHMEM_ENABLE_INTERRUPTS, ivshmem_enable_interrupts, dev, enable, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/kernel.h b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/kernel.h new file mode 100644 index 0000000..3c5e56b --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/kernel.h @@ -0,0 +1,1590 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_KERNEL_H +#define Z_INCLUDE_SYSCALLS_KERNEL_H + + + + +#ifndef _ASMLANGUAGE + +#include <stdarg.h> + +#include <syscall_list.h> +#include <zephyr/syscall.h> + +#include <zephyr/linker/sections.h> + + +#ifdef __cplusplus +extern "C" { +#endif + +extern k_thread_stack_t * z_impl_k_thread_stack_alloc(size_t size, int flags); + +__pinned_func +static inline k_thread_stack_t * k_thread_stack_alloc(size_t size, int flags) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; size_t val; } parm0 = { .val = size }; + union { uintptr_t x; int val; } parm1 = { .val = flags }; + return (k_thread_stack_t *) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_K_THREAD_STACK_ALLOC); + } +#endif + compiler_barrier(); + return z_impl_k_thread_stack_alloc(size, flags); +} + + +extern int z_impl_k_thread_stack_free(k_thread_stack_t * stack); + +__pinned_func +static inline int k_thread_stack_free(k_thread_stack_t * stack) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; k_thread_stack_t * val; } parm0 = { .val = stack }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_THREAD_STACK_FREE); + } +#endif + compiler_barrier(); + return z_impl_k_thread_stack_free(stack); +} + + +extern k_tid_t z_impl_k_thread_create(struct k_thread * new_thread, k_thread_stack_t * stack, size_t stack_size, k_thread_entry_t entry, void * p1, void * p2, void * p3, int prio, uint32_t options, k_timeout_t delay); + +__pinned_func +static inline k_tid_t k_thread_create(struct k_thread * new_thread, k_thread_stack_t * stack, size_t stack_size, k_thread_entry_t entry, void * p1, void * p2, void * p3, int prio, uint32_t options, k_timeout_t delay) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_thread * val; } parm0 = { .val = new_thread }; + union { uintptr_t x; k_thread_stack_t * val; } parm1 = { .val = stack }; + union { uintptr_t x; size_t val; } parm2 = { .val = stack_size }; + union { uintptr_t x; k_thread_entry_t val; } parm3 = { .val = entry }; + union { uintptr_t x; void * val; } parm4 = { .val = p1 }; + union { uintptr_t x; void * val; } parm5 = { .val = p2 }; + union { uintptr_t x; void * val; } parm6 = { .val = p3 }; + union { uintptr_t x; int val; } parm7 = { .val = prio }; + union { uintptr_t x; uint32_t val; } parm8 = { .val = options }; + union { struct { uintptr_t lo, hi; } split; k_timeout_t val; } parm9 = { .val = delay }; + uintptr_t more[] = { + parm5.x, + parm6.x, + parm7.x, + parm8.x, + parm9.split.lo, + parm9.split.hi + }; + return (k_tid_t) arch_syscall_invoke6(parm0.x, parm1.x, parm2.x, parm3.x, parm4.x, (uintptr_t) &more, K_SYSCALL_K_THREAD_CREATE); + } +#endif + compiler_barrier(); + return z_impl_k_thread_create(new_thread, stack, stack_size, entry, p1, p2, p3, prio, options, delay); +} + + +extern int z_impl_k_thread_stack_space_get(const struct k_thread * thread, size_t * unused_ptr); + +__pinned_func +static inline int k_thread_stack_space_get(const struct k_thread * thread, size_t * unused_ptr) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct k_thread * val; } parm0 = { .val = thread }; + union { uintptr_t x; size_t * val; } parm1 = { .val = unused_ptr }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_K_THREAD_STACK_SPACE_GET); + } +#endif + compiler_barrier(); + return z_impl_k_thread_stack_space_get(thread, unused_ptr); +} + + +extern int z_impl_k_thread_join(struct k_thread * thread, k_timeout_t timeout); + +__pinned_func +static inline int k_thread_join(struct k_thread * thread, k_timeout_t timeout) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_thread * val; } parm0 = { .val = thread }; + union { struct { uintptr_t lo, hi; } split; k_timeout_t val; } parm1 = { .val = timeout }; + return (int) arch_syscall_invoke3(parm0.x, parm1.split.lo, parm1.split.hi, K_SYSCALL_K_THREAD_JOIN); + } +#endif + compiler_barrier(); + return z_impl_k_thread_join(thread, timeout); +} + + +extern int32_t z_impl_k_sleep(k_timeout_t timeout); + +__pinned_func +static inline int32_t k_sleep(k_timeout_t timeout) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { struct { uintptr_t lo, hi; } split; k_timeout_t val; } parm0 = { .val = timeout }; + return (int32_t) arch_syscall_invoke2(parm0.split.lo, parm0.split.hi, K_SYSCALL_K_SLEEP); + } +#endif + compiler_barrier(); + return z_impl_k_sleep(timeout); +} + + +extern int32_t z_impl_k_usleep(int32_t us); + +__pinned_func +static inline int32_t k_usleep(int32_t us) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; int32_t val; } parm0 = { .val = us }; + return (int32_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_USLEEP); + } +#endif + compiler_barrier(); + return z_impl_k_usleep(us); +} + + +extern void z_impl_k_busy_wait(uint32_t usec_to_wait); + +__pinned_func +static inline void k_busy_wait(uint32_t usec_to_wait) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; uint32_t val; } parm0 = { .val = usec_to_wait }; + (void) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_BUSY_WAIT); + return; + } +#endif + compiler_barrier(); + z_impl_k_busy_wait(usec_to_wait); +} + + +extern void z_impl_k_yield(void); + +__pinned_func +static inline void k_yield(void) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + (void) arch_syscall_invoke0(K_SYSCALL_K_YIELD); + return; + } +#endif + compiler_barrier(); + z_impl_k_yield(); +} + + +extern void z_impl_k_wakeup(k_tid_t thread); + +__pinned_func +static inline void k_wakeup(k_tid_t thread) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; k_tid_t val; } parm0 = { .val = thread }; + (void) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_WAKEUP); + return; + } +#endif + compiler_barrier(); + z_impl_k_wakeup(thread); +} + + +extern k_tid_t z_impl_k_sched_current_thread_query(void); + +__pinned_func +static inline k_tid_t k_sched_current_thread_query(void) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + return (k_tid_t) arch_syscall_invoke0(K_SYSCALL_K_SCHED_CURRENT_THREAD_QUERY); + } +#endif + compiler_barrier(); + return z_impl_k_sched_current_thread_query(); +} + + +extern void z_impl_k_thread_abort(k_tid_t thread); + +__pinned_func +static inline void k_thread_abort(k_tid_t thread) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; k_tid_t val; } parm0 = { .val = thread }; + (void) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_THREAD_ABORT); + return; + } +#endif + compiler_barrier(); + z_impl_k_thread_abort(thread); +} + + +extern void z_impl_k_thread_start(k_tid_t thread); + +__pinned_func +static inline void k_thread_start(k_tid_t thread) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; k_tid_t val; } parm0 = { .val = thread }; + (void) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_THREAD_START); + return; + } +#endif + compiler_barrier(); + z_impl_k_thread_start(thread); +} + + +extern k_ticks_t z_impl_k_thread_timeout_expires_ticks(const struct k_thread * thread); + +__pinned_func +static inline k_ticks_t k_thread_timeout_expires_ticks(const struct k_thread * thread) +{ +#ifdef CONFIG_USERSPACE + uint64_t ret64; + if (z_syscall_trap()) { + union { uintptr_t x; const struct k_thread * val; } parm0 = { .val = thread }; + (void) arch_syscall_invoke2(parm0.x, (uintptr_t)&ret64, K_SYSCALL_K_THREAD_TIMEOUT_EXPIRES_TICKS); + return (k_ticks_t) ret64; + } +#endif + compiler_barrier(); + return z_impl_k_thread_timeout_expires_ticks(thread); +} + + +extern k_ticks_t z_impl_k_thread_timeout_remaining_ticks(const struct k_thread * thread); + +__pinned_func +static inline k_ticks_t k_thread_timeout_remaining_ticks(const struct k_thread * thread) +{ +#ifdef CONFIG_USERSPACE + uint64_t ret64; + if (z_syscall_trap()) { + union { uintptr_t x; const struct k_thread * val; } parm0 = { .val = thread }; + (void) arch_syscall_invoke2(parm0.x, (uintptr_t)&ret64, K_SYSCALL_K_THREAD_TIMEOUT_REMAINING_TICKS); + return (k_ticks_t) ret64; + } +#endif + compiler_barrier(); + return z_impl_k_thread_timeout_remaining_ticks(thread); +} + + +extern int z_impl_k_thread_priority_get(k_tid_t thread); + +__pinned_func +static inline int k_thread_priority_get(k_tid_t thread) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; k_tid_t val; } parm0 = { .val = thread }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_THREAD_PRIORITY_GET); + } +#endif + compiler_barrier(); + return z_impl_k_thread_priority_get(thread); +} + + +extern void z_impl_k_thread_priority_set(k_tid_t thread, int prio); + +__pinned_func +static inline void k_thread_priority_set(k_tid_t thread, int prio) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; k_tid_t val; } parm0 = { .val = thread }; + union { uintptr_t x; int val; } parm1 = { .val = prio }; + (void) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_K_THREAD_PRIORITY_SET); + return; + } +#endif + compiler_barrier(); + z_impl_k_thread_priority_set(thread, prio); +} + + +extern void z_impl_k_thread_deadline_set(k_tid_t thread, int deadline); + +__pinned_func +static inline void k_thread_deadline_set(k_tid_t thread, int deadline) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; k_tid_t val; } parm0 = { .val = thread }; + union { uintptr_t x; int val; } parm1 = { .val = deadline }; + (void) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_K_THREAD_DEADLINE_SET); + return; + } +#endif + compiler_barrier(); + z_impl_k_thread_deadline_set(thread, deadline); +} + + +extern void z_impl_k_thread_suspend(k_tid_t thread); + +__pinned_func +static inline void k_thread_suspend(k_tid_t thread) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; k_tid_t val; } parm0 = { .val = thread }; + (void) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_THREAD_SUSPEND); + return; + } +#endif + compiler_barrier(); + z_impl_k_thread_suspend(thread); +} + + +extern void z_impl_k_thread_resume(k_tid_t thread); + +__pinned_func +static inline void k_thread_resume(k_tid_t thread) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; k_tid_t val; } parm0 = { .val = thread }; + (void) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_THREAD_RESUME); + return; + } +#endif + compiler_barrier(); + z_impl_k_thread_resume(thread); +} + + +extern int z_impl_k_is_preempt_thread(void); + +__pinned_func +static inline int k_is_preempt_thread(void) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + return (int) arch_syscall_invoke0(K_SYSCALL_K_IS_PREEMPT_THREAD); + } +#endif + compiler_barrier(); + return z_impl_k_is_preempt_thread(); +} + + +extern void z_impl_k_thread_custom_data_set(void * value); + +__pinned_func +static inline void k_thread_custom_data_set(void * value) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; void * val; } parm0 = { .val = value }; + (void) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_THREAD_CUSTOM_DATA_SET); + return; + } +#endif + compiler_barrier(); + z_impl_k_thread_custom_data_set(value); +} + + +extern void * z_impl_k_thread_custom_data_get(void); + +__pinned_func +static inline void * k_thread_custom_data_get(void) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + return (void *) arch_syscall_invoke0(K_SYSCALL_K_THREAD_CUSTOM_DATA_GET); + } +#endif + compiler_barrier(); + return z_impl_k_thread_custom_data_get(); +} + + +extern int z_impl_k_thread_name_set(k_tid_t thread, const char * str); + +__pinned_func +static inline int k_thread_name_set(k_tid_t thread, const char * str) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; k_tid_t val; } parm0 = { .val = thread }; + union { uintptr_t x; const char * val; } parm1 = { .val = str }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_K_THREAD_NAME_SET); + } +#endif + compiler_barrier(); + return z_impl_k_thread_name_set(thread, str); +} + + +extern int z_impl_k_thread_name_copy(k_tid_t thread, char * buf, size_t size); + +__pinned_func +static inline int k_thread_name_copy(k_tid_t thread, char * buf, size_t size) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; k_tid_t val; } parm0 = { .val = thread }; + union { uintptr_t x; char * val; } parm1 = { .val = buf }; + union { uintptr_t x; size_t val; } parm2 = { .val = size }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_K_THREAD_NAME_COPY); + } +#endif + compiler_barrier(); + return z_impl_k_thread_name_copy(thread, buf, size); +} + + +extern void z_impl_k_timer_start(struct k_timer * timer, k_timeout_t duration, k_timeout_t period); + +__pinned_func +static inline void k_timer_start(struct k_timer * timer, k_timeout_t duration, k_timeout_t period) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_timer * val; } parm0 = { .val = timer }; + union { struct { uintptr_t lo, hi; } split; k_timeout_t val; } parm1 = { .val = duration }; + union { struct { uintptr_t lo, hi; } split; k_timeout_t val; } parm2 = { .val = period }; + (void) arch_syscall_invoke5(parm0.x, parm1.split.lo, parm1.split.hi, parm2.split.lo, parm2.split.hi, K_SYSCALL_K_TIMER_START); + return; + } +#endif + compiler_barrier(); + z_impl_k_timer_start(timer, duration, period); +} + + +extern void z_impl_k_timer_stop(struct k_timer * timer); + +__pinned_func +static inline void k_timer_stop(struct k_timer * timer) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_timer * val; } parm0 = { .val = timer }; + (void) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_TIMER_STOP); + return; + } +#endif + compiler_barrier(); + z_impl_k_timer_stop(timer); +} + + +extern uint32_t z_impl_k_timer_status_get(struct k_timer * timer); + +__pinned_func +static inline uint32_t k_timer_status_get(struct k_timer * timer) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_timer * val; } parm0 = { .val = timer }; + return (uint32_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_TIMER_STATUS_GET); + } +#endif + compiler_barrier(); + return z_impl_k_timer_status_get(timer); +} + + +extern uint32_t z_impl_k_timer_status_sync(struct k_timer * timer); + +__pinned_func +static inline uint32_t k_timer_status_sync(struct k_timer * timer) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_timer * val; } parm0 = { .val = timer }; + return (uint32_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_TIMER_STATUS_SYNC); + } +#endif + compiler_barrier(); + return z_impl_k_timer_status_sync(timer); +} + + +extern k_ticks_t z_impl_k_timer_expires_ticks(const struct k_timer * timer); + +__pinned_func +static inline k_ticks_t k_timer_expires_ticks(const struct k_timer * timer) +{ +#ifdef CONFIG_USERSPACE + uint64_t ret64; + if (z_syscall_trap()) { + union { uintptr_t x; const struct k_timer * val; } parm0 = { .val = timer }; + (void) arch_syscall_invoke2(parm0.x, (uintptr_t)&ret64, K_SYSCALL_K_TIMER_EXPIRES_TICKS); + return (k_ticks_t) ret64; + } +#endif + compiler_barrier(); + return z_impl_k_timer_expires_ticks(timer); +} + + +extern k_ticks_t z_impl_k_timer_remaining_ticks(const struct k_timer * timer); + +__pinned_func +static inline k_ticks_t k_timer_remaining_ticks(const struct k_timer * timer) +{ +#ifdef CONFIG_USERSPACE + uint64_t ret64; + if (z_syscall_trap()) { + union { uintptr_t x; const struct k_timer * val; } parm0 = { .val = timer }; + (void) arch_syscall_invoke2(parm0.x, (uintptr_t)&ret64, K_SYSCALL_K_TIMER_REMAINING_TICKS); + return (k_ticks_t) ret64; + } +#endif + compiler_barrier(); + return z_impl_k_timer_remaining_ticks(timer); +} + + +extern void z_impl_k_timer_user_data_set(struct k_timer * timer, void * user_data); + +__pinned_func +static inline void k_timer_user_data_set(struct k_timer * timer, void * user_data) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_timer * val; } parm0 = { .val = timer }; + union { uintptr_t x; void * val; } parm1 = { .val = user_data }; + (void) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_K_TIMER_USER_DATA_SET); + return; + } +#endif + compiler_barrier(); + z_impl_k_timer_user_data_set(timer, user_data); +} + + +extern void * z_impl_k_timer_user_data_get(const struct k_timer * timer); + +__pinned_func +static inline void * k_timer_user_data_get(const struct k_timer * timer) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct k_timer * val; } parm0 = { .val = timer }; + return (void *) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_TIMER_USER_DATA_GET); + } +#endif + compiler_barrier(); + return z_impl_k_timer_user_data_get(timer); +} + + +extern int64_t z_impl_k_uptime_ticks(void); + +__pinned_func +static inline int64_t k_uptime_ticks(void) +{ +#ifdef CONFIG_USERSPACE + uint64_t ret64; + if (z_syscall_trap()) { + (void) arch_syscall_invoke1((uintptr_t)&ret64, K_SYSCALL_K_UPTIME_TICKS); + return (int64_t) ret64; + } +#endif + compiler_barrier(); + return z_impl_k_uptime_ticks(); +} + + +extern void z_impl_k_queue_init(struct k_queue * queue); + +__pinned_func +static inline void k_queue_init(struct k_queue * queue) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_queue * val; } parm0 = { .val = queue }; + (void) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_QUEUE_INIT); + return; + } +#endif + compiler_barrier(); + z_impl_k_queue_init(queue); +} + + +extern void z_impl_k_queue_cancel_wait(struct k_queue * queue); + +__pinned_func +static inline void k_queue_cancel_wait(struct k_queue * queue) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_queue * val; } parm0 = { .val = queue }; + (void) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_QUEUE_CANCEL_WAIT); + return; + } +#endif + compiler_barrier(); + z_impl_k_queue_cancel_wait(queue); +} + + +extern int32_t z_impl_k_queue_alloc_append(struct k_queue * queue, void * data); + +__pinned_func +static inline int32_t k_queue_alloc_append(struct k_queue * queue, void * data) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_queue * val; } parm0 = { .val = queue }; + union { uintptr_t x; void * val; } parm1 = { .val = data }; + return (int32_t) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_K_QUEUE_ALLOC_APPEND); + } +#endif + compiler_barrier(); + return z_impl_k_queue_alloc_append(queue, data); +} + + +extern int32_t z_impl_k_queue_alloc_prepend(struct k_queue * queue, void * data); + +__pinned_func +static inline int32_t k_queue_alloc_prepend(struct k_queue * queue, void * data) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_queue * val; } parm0 = { .val = queue }; + union { uintptr_t x; void * val; } parm1 = { .val = data }; + return (int32_t) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_K_QUEUE_ALLOC_PREPEND); + } +#endif + compiler_barrier(); + return z_impl_k_queue_alloc_prepend(queue, data); +} + + +extern void * z_impl_k_queue_get(struct k_queue * queue, k_timeout_t timeout); + +__pinned_func +static inline void * k_queue_get(struct k_queue * queue, k_timeout_t timeout) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_queue * val; } parm0 = { .val = queue }; + union { struct { uintptr_t lo, hi; } split; k_timeout_t val; } parm1 = { .val = timeout }; + return (void *) arch_syscall_invoke3(parm0.x, parm1.split.lo, parm1.split.hi, K_SYSCALL_K_QUEUE_GET); + } +#endif + compiler_barrier(); + return z_impl_k_queue_get(queue, timeout); +} + + +extern int z_impl_k_queue_is_empty(struct k_queue * queue); + +__pinned_func +static inline int k_queue_is_empty(struct k_queue * queue) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_queue * val; } parm0 = { .val = queue }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_QUEUE_IS_EMPTY); + } +#endif + compiler_barrier(); + return z_impl_k_queue_is_empty(queue); +} + + +extern void * z_impl_k_queue_peek_head(struct k_queue * queue); + +__pinned_func +static inline void * k_queue_peek_head(struct k_queue * queue) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_queue * val; } parm0 = { .val = queue }; + return (void *) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_QUEUE_PEEK_HEAD); + } +#endif + compiler_barrier(); + return z_impl_k_queue_peek_head(queue); +} + + +extern void * z_impl_k_queue_peek_tail(struct k_queue * queue); + +__pinned_func +static inline void * k_queue_peek_tail(struct k_queue * queue) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_queue * val; } parm0 = { .val = queue }; + return (void *) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_QUEUE_PEEK_TAIL); + } +#endif + compiler_barrier(); + return z_impl_k_queue_peek_tail(queue); +} + + +extern int z_impl_k_futex_wait(struct k_futex * futex, int expected, k_timeout_t timeout); + +__pinned_func +static inline int k_futex_wait(struct k_futex * futex, int expected, k_timeout_t timeout) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_futex * val; } parm0 = { .val = futex }; + union { uintptr_t x; int val; } parm1 = { .val = expected }; + union { struct { uintptr_t lo, hi; } split; k_timeout_t val; } parm2 = { .val = timeout }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.split.lo, parm2.split.hi, K_SYSCALL_K_FUTEX_WAIT); + } +#endif + compiler_barrier(); + return z_impl_k_futex_wait(futex, expected, timeout); +} + + +extern int z_impl_k_futex_wake(struct k_futex * futex, bool wake_all); + +__pinned_func +static inline int k_futex_wake(struct k_futex * futex, bool wake_all) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_futex * val; } parm0 = { .val = futex }; + union { uintptr_t x; bool val; } parm1 = { .val = wake_all }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_K_FUTEX_WAKE); + } +#endif + compiler_barrier(); + return z_impl_k_futex_wake(futex, wake_all); +} + + +extern void z_impl_k_event_init(struct k_event * event); + +__pinned_func +static inline void k_event_init(struct k_event * event) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_event * val; } parm0 = { .val = event }; + (void) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_EVENT_INIT); + return; + } +#endif + compiler_barrier(); + z_impl_k_event_init(event); +} + + +extern uint32_t z_impl_k_event_post(struct k_event * event, uint32_t events); + +__pinned_func +static inline uint32_t k_event_post(struct k_event * event, uint32_t events) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_event * val; } parm0 = { .val = event }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = events }; + return (uint32_t) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_K_EVENT_POST); + } +#endif + compiler_barrier(); + return z_impl_k_event_post(event, events); +} + + +extern uint32_t z_impl_k_event_set(struct k_event * event, uint32_t events); + +__pinned_func +static inline uint32_t k_event_set(struct k_event * event, uint32_t events) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_event * val; } parm0 = { .val = event }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = events }; + return (uint32_t) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_K_EVENT_SET); + } +#endif + compiler_barrier(); + return z_impl_k_event_set(event, events); +} + + +extern uint32_t z_impl_k_event_set_masked(struct k_event * event, uint32_t events, uint32_t events_mask); + +__pinned_func +static inline uint32_t k_event_set_masked(struct k_event * event, uint32_t events, uint32_t events_mask) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_event * val; } parm0 = { .val = event }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = events }; + union { uintptr_t x; uint32_t val; } parm2 = { .val = events_mask }; + return (uint32_t) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_K_EVENT_SET_MASKED); + } +#endif + compiler_barrier(); + return z_impl_k_event_set_masked(event, events, events_mask); +} + + +extern uint32_t z_impl_k_event_clear(struct k_event * event, uint32_t events); + +__pinned_func +static inline uint32_t k_event_clear(struct k_event * event, uint32_t events) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_event * val; } parm0 = { .val = event }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = events }; + return (uint32_t) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_K_EVENT_CLEAR); + } +#endif + compiler_barrier(); + return z_impl_k_event_clear(event, events); +} + + +extern uint32_t z_impl_k_event_wait(struct k_event * event, uint32_t events, bool reset, k_timeout_t timeout); + +__pinned_func +static inline uint32_t k_event_wait(struct k_event * event, uint32_t events, bool reset, k_timeout_t timeout) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_event * val; } parm0 = { .val = event }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = events }; + union { uintptr_t x; bool val; } parm2 = { .val = reset }; + union { struct { uintptr_t lo, hi; } split; k_timeout_t val; } parm3 = { .val = timeout }; + return (uint32_t) arch_syscall_invoke5(parm0.x, parm1.x, parm2.x, parm3.split.lo, parm3.split.hi, K_SYSCALL_K_EVENT_WAIT); + } +#endif + compiler_barrier(); + return z_impl_k_event_wait(event, events, reset, timeout); +} + + +extern uint32_t z_impl_k_event_wait_all(struct k_event * event, uint32_t events, bool reset, k_timeout_t timeout); + +__pinned_func +static inline uint32_t k_event_wait_all(struct k_event * event, uint32_t events, bool reset, k_timeout_t timeout) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_event * val; } parm0 = { .val = event }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = events }; + union { uintptr_t x; bool val; } parm2 = { .val = reset }; + union { struct { uintptr_t lo, hi; } split; k_timeout_t val; } parm3 = { .val = timeout }; + return (uint32_t) arch_syscall_invoke5(parm0.x, parm1.x, parm2.x, parm3.split.lo, parm3.split.hi, K_SYSCALL_K_EVENT_WAIT_ALL); + } +#endif + compiler_barrier(); + return z_impl_k_event_wait_all(event, events, reset, timeout); +} + + +extern int32_t z_impl_k_stack_alloc_init(struct k_stack * stack, uint32_t num_entries); + +__pinned_func +static inline int32_t k_stack_alloc_init(struct k_stack * stack, uint32_t num_entries) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_stack * val; } parm0 = { .val = stack }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = num_entries }; + return (int32_t) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_K_STACK_ALLOC_INIT); + } +#endif + compiler_barrier(); + return z_impl_k_stack_alloc_init(stack, num_entries); +} + + +extern int z_impl_k_stack_push(struct k_stack * stack, stack_data_t data); + +__pinned_func +static inline int k_stack_push(struct k_stack * stack, stack_data_t data) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_stack * val; } parm0 = { .val = stack }; + union { uintptr_t x; stack_data_t val; } parm1 = { .val = data }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_K_STACK_PUSH); + } +#endif + compiler_barrier(); + return z_impl_k_stack_push(stack, data); +} + + +extern int z_impl_k_stack_pop(struct k_stack * stack, stack_data_t * data, k_timeout_t timeout); + +__pinned_func +static inline int k_stack_pop(struct k_stack * stack, stack_data_t * data, k_timeout_t timeout) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_stack * val; } parm0 = { .val = stack }; + union { uintptr_t x; stack_data_t * val; } parm1 = { .val = data }; + union { struct { uintptr_t lo, hi; } split; k_timeout_t val; } parm2 = { .val = timeout }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.split.lo, parm2.split.hi, K_SYSCALL_K_STACK_POP); + } +#endif + compiler_barrier(); + return z_impl_k_stack_pop(stack, data, timeout); +} + + +extern int z_impl_k_mutex_init(struct k_mutex * mutex); + +__pinned_func +static inline int k_mutex_init(struct k_mutex * mutex) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_mutex * val; } parm0 = { .val = mutex }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_MUTEX_INIT); + } +#endif + compiler_barrier(); + return z_impl_k_mutex_init(mutex); +} + + +extern int z_impl_k_mutex_lock(struct k_mutex * mutex, k_timeout_t timeout); + +__pinned_func +static inline int k_mutex_lock(struct k_mutex * mutex, k_timeout_t timeout) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_mutex * val; } parm0 = { .val = mutex }; + union { struct { uintptr_t lo, hi; } split; k_timeout_t val; } parm1 = { .val = timeout }; + return (int) arch_syscall_invoke3(parm0.x, parm1.split.lo, parm1.split.hi, K_SYSCALL_K_MUTEX_LOCK); + } +#endif + compiler_barrier(); + return z_impl_k_mutex_lock(mutex, timeout); +} + + +extern int z_impl_k_mutex_unlock(struct k_mutex * mutex); + +__pinned_func +static inline int k_mutex_unlock(struct k_mutex * mutex) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_mutex * val; } parm0 = { .val = mutex }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_MUTEX_UNLOCK); + } +#endif + compiler_barrier(); + return z_impl_k_mutex_unlock(mutex); +} + + +extern int z_impl_k_condvar_init(struct k_condvar * condvar); + +__pinned_func +static inline int k_condvar_init(struct k_condvar * condvar) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_condvar * val; } parm0 = { .val = condvar }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_CONDVAR_INIT); + } +#endif + compiler_barrier(); + return z_impl_k_condvar_init(condvar); +} + + +extern int z_impl_k_condvar_signal(struct k_condvar * condvar); + +__pinned_func +static inline int k_condvar_signal(struct k_condvar * condvar) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_condvar * val; } parm0 = { .val = condvar }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_CONDVAR_SIGNAL); + } +#endif + compiler_barrier(); + return z_impl_k_condvar_signal(condvar); +} + + +extern int z_impl_k_condvar_broadcast(struct k_condvar * condvar); + +__pinned_func +static inline int k_condvar_broadcast(struct k_condvar * condvar) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_condvar * val; } parm0 = { .val = condvar }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_CONDVAR_BROADCAST); + } +#endif + compiler_barrier(); + return z_impl_k_condvar_broadcast(condvar); +} + + +extern int z_impl_k_condvar_wait(struct k_condvar * condvar, struct k_mutex * mutex, k_timeout_t timeout); + +__pinned_func +static inline int k_condvar_wait(struct k_condvar * condvar, struct k_mutex * mutex, k_timeout_t timeout) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_condvar * val; } parm0 = { .val = condvar }; + union { uintptr_t x; struct k_mutex * val; } parm1 = { .val = mutex }; + union { struct { uintptr_t lo, hi; } split; k_timeout_t val; } parm2 = { .val = timeout }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.split.lo, parm2.split.hi, K_SYSCALL_K_CONDVAR_WAIT); + } +#endif + compiler_barrier(); + return z_impl_k_condvar_wait(condvar, mutex, timeout); +} + + +extern int z_impl_k_sem_init(struct k_sem * sem, unsigned int initial_count, unsigned int limit); + +__pinned_func +static inline int k_sem_init(struct k_sem * sem, unsigned int initial_count, unsigned int limit) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_sem * val; } parm0 = { .val = sem }; + union { uintptr_t x; unsigned int val; } parm1 = { .val = initial_count }; + union { uintptr_t x; unsigned int val; } parm2 = { .val = limit }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_K_SEM_INIT); + } +#endif + compiler_barrier(); + return z_impl_k_sem_init(sem, initial_count, limit); +} + + +extern int z_impl_k_sem_take(struct k_sem * sem, k_timeout_t timeout); + +__pinned_func +static inline int k_sem_take(struct k_sem * sem, k_timeout_t timeout) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_sem * val; } parm0 = { .val = sem }; + union { struct { uintptr_t lo, hi; } split; k_timeout_t val; } parm1 = { .val = timeout }; + return (int) arch_syscall_invoke3(parm0.x, parm1.split.lo, parm1.split.hi, K_SYSCALL_K_SEM_TAKE); + } +#endif + compiler_barrier(); + return z_impl_k_sem_take(sem, timeout); +} + + +extern void z_impl_k_sem_give(struct k_sem * sem); + +__pinned_func +static inline void k_sem_give(struct k_sem * sem) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_sem * val; } parm0 = { .val = sem }; + (void) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_SEM_GIVE); + return; + } +#endif + compiler_barrier(); + z_impl_k_sem_give(sem); +} + + +extern void z_impl_k_sem_reset(struct k_sem * sem); + +__pinned_func +static inline void k_sem_reset(struct k_sem * sem) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_sem * val; } parm0 = { .val = sem }; + (void) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_SEM_RESET); + return; + } +#endif + compiler_barrier(); + z_impl_k_sem_reset(sem); +} + + +extern unsigned int z_impl_k_sem_count_get(struct k_sem * sem); + +__pinned_func +static inline unsigned int k_sem_count_get(struct k_sem * sem) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_sem * val; } parm0 = { .val = sem }; + return (unsigned int) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_SEM_COUNT_GET); + } +#endif + compiler_barrier(); + return z_impl_k_sem_count_get(sem); +} + + +extern int z_impl_k_msgq_alloc_init(struct k_msgq * msgq, size_t msg_size, uint32_t max_msgs); + +__pinned_func +static inline int k_msgq_alloc_init(struct k_msgq * msgq, size_t msg_size, uint32_t max_msgs) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_msgq * val; } parm0 = { .val = msgq }; + union { uintptr_t x; size_t val; } parm1 = { .val = msg_size }; + union { uintptr_t x; uint32_t val; } parm2 = { .val = max_msgs }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_K_MSGQ_ALLOC_INIT); + } +#endif + compiler_barrier(); + return z_impl_k_msgq_alloc_init(msgq, msg_size, max_msgs); +} + + +extern int z_impl_k_msgq_put(struct k_msgq * msgq, const void * data, k_timeout_t timeout); + +__pinned_func +static inline int k_msgq_put(struct k_msgq * msgq, const void * data, k_timeout_t timeout) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_msgq * val; } parm0 = { .val = msgq }; + union { uintptr_t x; const void * val; } parm1 = { .val = data }; + union { struct { uintptr_t lo, hi; } split; k_timeout_t val; } parm2 = { .val = timeout }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.split.lo, parm2.split.hi, K_SYSCALL_K_MSGQ_PUT); + } +#endif + compiler_barrier(); + return z_impl_k_msgq_put(msgq, data, timeout); +} + + +extern int z_impl_k_msgq_get(struct k_msgq * msgq, void * data, k_timeout_t timeout); + +__pinned_func +static inline int k_msgq_get(struct k_msgq * msgq, void * data, k_timeout_t timeout) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_msgq * val; } parm0 = { .val = msgq }; + union { uintptr_t x; void * val; } parm1 = { .val = data }; + union { struct { uintptr_t lo, hi; } split; k_timeout_t val; } parm2 = { .val = timeout }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.split.lo, parm2.split.hi, K_SYSCALL_K_MSGQ_GET); + } +#endif + compiler_barrier(); + return z_impl_k_msgq_get(msgq, data, timeout); +} + + +extern int z_impl_k_msgq_peek(struct k_msgq * msgq, void * data); + +__pinned_func +static inline int k_msgq_peek(struct k_msgq * msgq, void * data) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_msgq * val; } parm0 = { .val = msgq }; + union { uintptr_t x; void * val; } parm1 = { .val = data }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_K_MSGQ_PEEK); + } +#endif + compiler_barrier(); + return z_impl_k_msgq_peek(msgq, data); +} + + +extern int z_impl_k_msgq_peek_at(struct k_msgq * msgq, void * data, uint32_t idx); + +__pinned_func +static inline int k_msgq_peek_at(struct k_msgq * msgq, void * data, uint32_t idx) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_msgq * val; } parm0 = { .val = msgq }; + union { uintptr_t x; void * val; } parm1 = { .val = data }; + union { uintptr_t x; uint32_t val; } parm2 = { .val = idx }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_K_MSGQ_PEEK_AT); + } +#endif + compiler_barrier(); + return z_impl_k_msgq_peek_at(msgq, data, idx); +} + + +extern void z_impl_k_msgq_purge(struct k_msgq * msgq); + +__pinned_func +static inline void k_msgq_purge(struct k_msgq * msgq) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_msgq * val; } parm0 = { .val = msgq }; + (void) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_MSGQ_PURGE); + return; + } +#endif + compiler_barrier(); + z_impl_k_msgq_purge(msgq); +} + + +extern uint32_t z_impl_k_msgq_num_free_get(struct k_msgq * msgq); + +__pinned_func +static inline uint32_t k_msgq_num_free_get(struct k_msgq * msgq) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_msgq * val; } parm0 = { .val = msgq }; + return (uint32_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_MSGQ_NUM_FREE_GET); + } +#endif + compiler_barrier(); + return z_impl_k_msgq_num_free_get(msgq); +} + + +extern void z_impl_k_msgq_get_attrs(struct k_msgq * msgq, struct k_msgq_attrs * attrs); + +__pinned_func +static inline void k_msgq_get_attrs(struct k_msgq * msgq, struct k_msgq_attrs * attrs) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_msgq * val; } parm0 = { .val = msgq }; + union { uintptr_t x; struct k_msgq_attrs * val; } parm1 = { .val = attrs }; + (void) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_K_MSGQ_GET_ATTRS); + return; + } +#endif + compiler_barrier(); + z_impl_k_msgq_get_attrs(msgq, attrs); +} + + +extern uint32_t z_impl_k_msgq_num_used_get(struct k_msgq * msgq); + +__pinned_func +static inline uint32_t k_msgq_num_used_get(struct k_msgq * msgq) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_msgq * val; } parm0 = { .val = msgq }; + return (uint32_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_MSGQ_NUM_USED_GET); + } +#endif + compiler_barrier(); + return z_impl_k_msgq_num_used_get(msgq); +} + + +extern int z_impl_k_pipe_alloc_init(struct k_pipe * pipe, size_t size); + +__pinned_func +static inline int k_pipe_alloc_init(struct k_pipe * pipe, size_t size) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_pipe * val; } parm0 = { .val = pipe }; + union { uintptr_t x; size_t val; } parm1 = { .val = size }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_K_PIPE_ALLOC_INIT); + } +#endif + compiler_barrier(); + return z_impl_k_pipe_alloc_init(pipe, size); +} + + +extern int z_impl_k_pipe_put(struct k_pipe * pipe, const void * data, size_t bytes_to_write, size_t * bytes_written, size_t min_xfer, k_timeout_t timeout); + +__pinned_func +static inline int k_pipe_put(struct k_pipe * pipe, const void * data, size_t bytes_to_write, size_t * bytes_written, size_t min_xfer, k_timeout_t timeout) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_pipe * val; } parm0 = { .val = pipe }; + union { uintptr_t x; const void * val; } parm1 = { .val = data }; + union { uintptr_t x; size_t val; } parm2 = { .val = bytes_to_write }; + union { uintptr_t x; size_t * val; } parm3 = { .val = bytes_written }; + union { uintptr_t x; size_t val; } parm4 = { .val = min_xfer }; + union { struct { uintptr_t lo, hi; } split; k_timeout_t val; } parm5 = { .val = timeout }; + uintptr_t more[] = { + parm5.split.lo, + parm5.split.hi + }; + return (int) arch_syscall_invoke6(parm0.x, parm1.x, parm2.x, parm3.x, parm4.x, (uintptr_t) &more, K_SYSCALL_K_PIPE_PUT); + } +#endif + compiler_barrier(); + return z_impl_k_pipe_put(pipe, data, bytes_to_write, bytes_written, min_xfer, timeout); +} + + +extern int z_impl_k_pipe_get(struct k_pipe * pipe, void * data, size_t bytes_to_read, size_t * bytes_read, size_t min_xfer, k_timeout_t timeout); + +__pinned_func +static inline int k_pipe_get(struct k_pipe * pipe, void * data, size_t bytes_to_read, size_t * bytes_read, size_t min_xfer, k_timeout_t timeout) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_pipe * val; } parm0 = { .val = pipe }; + union { uintptr_t x; void * val; } parm1 = { .val = data }; + union { uintptr_t x; size_t val; } parm2 = { .val = bytes_to_read }; + union { uintptr_t x; size_t * val; } parm3 = { .val = bytes_read }; + union { uintptr_t x; size_t val; } parm4 = { .val = min_xfer }; + union { struct { uintptr_t lo, hi; } split; k_timeout_t val; } parm5 = { .val = timeout }; + uintptr_t more[] = { + parm5.split.lo, + parm5.split.hi + }; + return (int) arch_syscall_invoke6(parm0.x, parm1.x, parm2.x, parm3.x, parm4.x, (uintptr_t) &more, K_SYSCALL_K_PIPE_GET); + } +#endif + compiler_barrier(); + return z_impl_k_pipe_get(pipe, data, bytes_to_read, bytes_read, min_xfer, timeout); +} + + +extern size_t z_impl_k_pipe_read_avail(struct k_pipe * pipe); + +__pinned_func +static inline size_t k_pipe_read_avail(struct k_pipe * pipe) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_pipe * val; } parm0 = { .val = pipe }; + return (size_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_PIPE_READ_AVAIL); + } +#endif + compiler_barrier(); + return z_impl_k_pipe_read_avail(pipe); +} + + +extern size_t z_impl_k_pipe_write_avail(struct k_pipe * pipe); + +__pinned_func +static inline size_t k_pipe_write_avail(struct k_pipe * pipe) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_pipe * val; } parm0 = { .val = pipe }; + return (size_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_PIPE_WRITE_AVAIL); + } +#endif + compiler_barrier(); + return z_impl_k_pipe_write_avail(pipe); +} + + +extern void z_impl_k_pipe_flush(struct k_pipe * pipe); + +__pinned_func +static inline void k_pipe_flush(struct k_pipe * pipe) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_pipe * val; } parm0 = { .val = pipe }; + (void) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_PIPE_FLUSH); + return; + } +#endif + compiler_barrier(); + z_impl_k_pipe_flush(pipe); +} + + +extern void z_impl_k_pipe_buffer_flush(struct k_pipe * pipe); + +__pinned_func +static inline void k_pipe_buffer_flush(struct k_pipe * pipe) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_pipe * val; } parm0 = { .val = pipe }; + (void) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_PIPE_BUFFER_FLUSH); + return; + } +#endif + compiler_barrier(); + z_impl_k_pipe_buffer_flush(pipe); +} + + +extern int z_impl_k_poll(struct k_poll_event * events, int num_events, k_timeout_t timeout); + +__pinned_func +static inline int k_poll(struct k_poll_event * events, int num_events, k_timeout_t timeout) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_poll_event * val; } parm0 = { .val = events }; + union { uintptr_t x; int val; } parm1 = { .val = num_events }; + union { struct { uintptr_t lo, hi; } split; k_timeout_t val; } parm2 = { .val = timeout }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.split.lo, parm2.split.hi, K_SYSCALL_K_POLL); + } +#endif + compiler_barrier(); + return z_impl_k_poll(events, num_events, timeout); +} + + +extern void z_impl_k_poll_signal_init(struct k_poll_signal * sig); + +__pinned_func +static inline void k_poll_signal_init(struct k_poll_signal * sig) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_poll_signal * val; } parm0 = { .val = sig }; + (void) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_POLL_SIGNAL_INIT); + return; + } +#endif + compiler_barrier(); + z_impl_k_poll_signal_init(sig); +} + + +extern void z_impl_k_poll_signal_reset(struct k_poll_signal * sig); + +__pinned_func +static inline void k_poll_signal_reset(struct k_poll_signal * sig) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_poll_signal * val; } parm0 = { .val = sig }; + (void) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_POLL_SIGNAL_RESET); + return; + } +#endif + compiler_barrier(); + z_impl_k_poll_signal_reset(sig); +} + + +extern void z_impl_k_poll_signal_check(struct k_poll_signal * sig, unsigned int * signaled, int * result); + +__pinned_func +static inline void k_poll_signal_check(struct k_poll_signal * sig, unsigned int * signaled, int * result) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_poll_signal * val; } parm0 = { .val = sig }; + union { uintptr_t x; unsigned int * val; } parm1 = { .val = signaled }; + union { uintptr_t x; int * val; } parm2 = { .val = result }; + (void) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_K_POLL_SIGNAL_CHECK); + return; + } +#endif + compiler_barrier(); + z_impl_k_poll_signal_check(sig, signaled, result); +} + + +extern int z_impl_k_poll_signal_raise(struct k_poll_signal * sig, int result); + +__pinned_func +static inline int k_poll_signal_raise(struct k_poll_signal * sig, int result) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_poll_signal * val; } parm0 = { .val = sig }; + union { uintptr_t x; int val; } parm1 = { .val = result }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_K_POLL_SIGNAL_RAISE); + } +#endif + compiler_barrier(); + return z_impl_k_poll_signal_raise(sig, result); +} + + +extern void z_impl_k_str_out(char * c, size_t n); + +__pinned_func +static inline void k_str_out(char * c, size_t n) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; char * val; } parm0 = { .val = c }; + union { uintptr_t x; size_t val; } parm1 = { .val = n }; + (void) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_K_STR_OUT); + return; + } +#endif + compiler_barrier(); + z_impl_k_str_out(c, n); +} + + +extern int z_impl_k_float_disable(struct k_thread * thread); + +__pinned_func +static inline int k_float_disable(struct k_thread * thread) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_thread * val; } parm0 = { .val = thread }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_FLOAT_DISABLE); + } +#endif + compiler_barrier(); + return z_impl_k_float_disable(thread); +} + + +extern int z_impl_k_float_enable(struct k_thread * thread, unsigned int options); + +__pinned_func +static inline int k_float_enable(struct k_thread * thread, unsigned int options) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct k_thread * val; } parm0 = { .val = thread }; + union { uintptr_t x; unsigned int val; } parm1 = { .val = options }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_K_FLOAT_ENABLE); + } +#endif + compiler_barrier(); + return z_impl_k_float_enable(thread, options); +} + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/kobject.h b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/kobject.h new file mode 100644 index 0000000..6de4eac --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/kobject.h @@ -0,0 +1,124 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_KOBJECT_H +#define Z_INCLUDE_SYSCALLS_KOBJECT_H + + +#include <zephyr/tracing/tracing_syscall.h> + +#ifndef _ASMLANGUAGE + +#include <stdarg.h> + +#include <syscall_list.h> +#include <zephyr/syscall.h> + +#include <zephyr/linker/sections.h> + + +#ifdef __cplusplus +extern "C" { +#endif + +extern void z_impl_k_object_access_grant(const void * object, struct k_thread * thread); + +__pinned_func +static inline void k_object_access_grant(const void * object, struct k_thread * thread) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const void * val; } parm0 = { .val = object }; + union { uintptr_t x; struct k_thread * val; } parm1 = { .val = thread }; + (void) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_K_OBJECT_ACCESS_GRANT); + return; + } +#endif + compiler_barrier(); + z_impl_k_object_access_grant(object, thread); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define k_object_access_grant(object, thread) do { sys_port_trace_syscall_enter(K_SYSCALL_K_OBJECT_ACCESS_GRANT, k_object_access_grant, object, thread); k_object_access_grant(object, thread); sys_port_trace_syscall_exit(K_SYSCALL_K_OBJECT_ACCESS_GRANT, k_object_access_grant, object, thread); } while(false) +#endif +#endif + + +extern void z_impl_k_object_release(const void * object); + +__pinned_func +static inline void k_object_release(const void * object) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const void * val; } parm0 = { .val = object }; + (void) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_OBJECT_RELEASE); + return; + } +#endif + compiler_barrier(); + z_impl_k_object_release(object); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define k_object_release(object) do { sys_port_trace_syscall_enter(K_SYSCALL_K_OBJECT_RELEASE, k_object_release, object); k_object_release(object); sys_port_trace_syscall_exit(K_SYSCALL_K_OBJECT_RELEASE, k_object_release, object); } while(false) +#endif +#endif + + +extern void * z_impl_k_object_alloc(enum k_objects otype); + +__pinned_func +static inline void * k_object_alloc(enum k_objects otype) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; enum k_objects val; } parm0 = { .val = otype }; + return (void *) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_OBJECT_ALLOC); + } +#endif + compiler_barrier(); + return z_impl_k_object_alloc(otype); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define k_object_alloc(otype) ({ void * syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_K_OBJECT_ALLOC, k_object_alloc, otype); syscall__retval = k_object_alloc(otype); sys_port_trace_syscall_exit(K_SYSCALL_K_OBJECT_ALLOC, k_object_alloc, otype, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern void * z_impl_k_object_alloc_size(enum k_objects otype, size_t size); + +__pinned_func +static inline void * k_object_alloc_size(enum k_objects otype, size_t size) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; enum k_objects val; } parm0 = { .val = otype }; + union { uintptr_t x; size_t val; } parm1 = { .val = size }; + return (void *) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_K_OBJECT_ALLOC_SIZE); + } +#endif + compiler_barrier(); + return z_impl_k_object_alloc_size(otype, size); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define k_object_alloc_size(otype, size) ({ void * syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_K_OBJECT_ALLOC_SIZE, k_object_alloc_size, otype, size); syscall__retval = k_object_alloc_size(otype, size); sys_port_trace_syscall_exit(K_SYSCALL_K_OBJECT_ALLOC_SIZE, k_object_alloc_size, otype, size, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/kscan.h b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/kscan.h new file mode 100644 index 0000000..4077382 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/kscan.h @@ -0,0 +1,98 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_KSCAN_H +#define Z_INCLUDE_SYSCALLS_KSCAN_H + + +#include <zephyr/tracing/tracing_syscall.h> + +#ifndef _ASMLANGUAGE + +#include <stdarg.h> + +#include <syscall_list.h> +#include <zephyr/syscall.h> + +#include <zephyr/linker/sections.h> + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_kscan_config(const struct device * dev, kscan_callback_t callback); + +__pinned_func +static inline int kscan_config(const struct device * dev, kscan_callback_t callback) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; kscan_callback_t val; } parm1 = { .val = callback }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_KSCAN_CONFIG); + } +#endif + compiler_barrier(); + return z_impl_kscan_config(dev, callback); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define kscan_config(dev, callback) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_KSCAN_CONFIG, kscan_config, dev, callback); syscall__retval = kscan_config(dev, callback); sys_port_trace_syscall_exit(K_SYSCALL_KSCAN_CONFIG, kscan_config, dev, callback, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_kscan_enable_callback(const struct device * dev); + +__pinned_func +static inline int kscan_enable_callback(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_KSCAN_ENABLE_CALLBACK); + } +#endif + compiler_barrier(); + return z_impl_kscan_enable_callback(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define kscan_enable_callback(dev) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_KSCAN_ENABLE_CALLBACK, kscan_enable_callback, dev); syscall__retval = kscan_enable_callback(dev); sys_port_trace_syscall_exit(K_SYSCALL_KSCAN_ENABLE_CALLBACK, kscan_enable_callback, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_kscan_disable_callback(const struct device * dev); + +__pinned_func +static inline int kscan_disable_callback(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_KSCAN_DISABLE_CALLBACK); + } +#endif + compiler_barrier(); + return z_impl_kscan_disable_callback(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define kscan_disable_callback(dev) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_KSCAN_DISABLE_CALLBACK, kscan_disable_callback, dev); syscall__retval = kscan_disable_callback(dev); sys_port_trace_syscall_exit(K_SYSCALL_KSCAN_DISABLE_CALLBACK, kscan_disable_callback, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/led.h b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/led.h new file mode 100644 index 0000000..4eef880 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/led.h @@ -0,0 +1,229 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_LED_H +#define Z_INCLUDE_SYSCALLS_LED_H + + +#include <zephyr/tracing/tracing_syscall.h> + +#ifndef _ASMLANGUAGE + +#include <stdarg.h> + +#include <syscall_list.h> +#include <zephyr/syscall.h> + +#include <zephyr/linker/sections.h> + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_led_blink(const struct device * dev, uint32_t led, uint32_t delay_on, uint32_t delay_off); + +__pinned_func +static inline int led_blink(const struct device * dev, uint32_t led, uint32_t delay_on, uint32_t delay_off) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = led }; + union { uintptr_t x; uint32_t val; } parm2 = { .val = delay_on }; + union { uintptr_t x; uint32_t val; } parm3 = { .val = delay_off }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_LED_BLINK); + } +#endif + compiler_barrier(); + return z_impl_led_blink(dev, led, delay_on, delay_off); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define led_blink(dev, led, delay_on, delay_off) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_LED_BLINK, led_blink, dev, led, delay_on, delay_off); syscall__retval = led_blink(dev, led, delay_on, delay_off); sys_port_trace_syscall_exit(K_SYSCALL_LED_BLINK, led_blink, dev, led, delay_on, delay_off, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_led_get_info(const struct device * dev, uint32_t led, const struct led_info ** info); + +__pinned_func +static inline int led_get_info(const struct device * dev, uint32_t led, const struct led_info ** info) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = led }; + union { uintptr_t x; const struct led_info ** val; } parm2 = { .val = info }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_LED_GET_INFO); + } +#endif + compiler_barrier(); + return z_impl_led_get_info(dev, led, info); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define led_get_info(dev, led, info) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_LED_GET_INFO, led_get_info, dev, led, info); syscall__retval = led_get_info(dev, led, info); sys_port_trace_syscall_exit(K_SYSCALL_LED_GET_INFO, led_get_info, dev, led, info, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_led_set_brightness(const struct device * dev, uint32_t led, uint8_t value); + +__pinned_func +static inline int led_set_brightness(const struct device * dev, uint32_t led, uint8_t value) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = led }; + union { uintptr_t x; uint8_t val; } parm2 = { .val = value }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_LED_SET_BRIGHTNESS); + } +#endif + compiler_barrier(); + return z_impl_led_set_brightness(dev, led, value); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define led_set_brightness(dev, led, value) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_LED_SET_BRIGHTNESS, led_set_brightness, dev, led, value); syscall__retval = led_set_brightness(dev, led, value); sys_port_trace_syscall_exit(K_SYSCALL_LED_SET_BRIGHTNESS, led_set_brightness, dev, led, value, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_led_write_channels(const struct device * dev, uint32_t start_channel, uint32_t num_channels, const uint8_t * buf); + +__pinned_func +static inline int led_write_channels(const struct device * dev, uint32_t start_channel, uint32_t num_channels, const uint8_t * buf) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = start_channel }; + union { uintptr_t x; uint32_t val; } parm2 = { .val = num_channels }; + union { uintptr_t x; const uint8_t * val; } parm3 = { .val = buf }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_LED_WRITE_CHANNELS); + } +#endif + compiler_barrier(); + return z_impl_led_write_channels(dev, start_channel, num_channels, buf); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define led_write_channels(dev, start_channel, num_channels, buf) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_LED_WRITE_CHANNELS, led_write_channels, dev, start_channel, num_channels, buf); syscall__retval = led_write_channels(dev, start_channel, num_channels, buf); sys_port_trace_syscall_exit(K_SYSCALL_LED_WRITE_CHANNELS, led_write_channels, dev, start_channel, num_channels, buf, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_led_set_channel(const struct device * dev, uint32_t channel, uint8_t value); + +__pinned_func +static inline int led_set_channel(const struct device * dev, uint32_t channel, uint8_t value) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = channel }; + union { uintptr_t x; uint8_t val; } parm2 = { .val = value }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_LED_SET_CHANNEL); + } +#endif + compiler_barrier(); + return z_impl_led_set_channel(dev, channel, value); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define led_set_channel(dev, channel, value) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_LED_SET_CHANNEL, led_set_channel, dev, channel, value); syscall__retval = led_set_channel(dev, channel, value); sys_port_trace_syscall_exit(K_SYSCALL_LED_SET_CHANNEL, led_set_channel, dev, channel, value, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_led_set_color(const struct device * dev, uint32_t led, uint8_t num_colors, const uint8_t * color); + +__pinned_func +static inline int led_set_color(const struct device * dev, uint32_t led, uint8_t num_colors, const uint8_t * color) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = led }; + union { uintptr_t x; uint8_t val; } parm2 = { .val = num_colors }; + union { uintptr_t x; const uint8_t * val; } parm3 = { .val = color }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_LED_SET_COLOR); + } +#endif + compiler_barrier(); + return z_impl_led_set_color(dev, led, num_colors, color); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define led_set_color(dev, led, num_colors, color) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_LED_SET_COLOR, led_set_color, dev, led, num_colors, color); syscall__retval = led_set_color(dev, led, num_colors, color); sys_port_trace_syscall_exit(K_SYSCALL_LED_SET_COLOR, led_set_color, dev, led, num_colors, color, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_led_on(const struct device * dev, uint32_t led); + +__pinned_func +static inline int led_on(const struct device * dev, uint32_t led) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = led }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_LED_ON); + } +#endif + compiler_barrier(); + return z_impl_led_on(dev, led); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define led_on(dev, led) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_LED_ON, led_on, dev, led); syscall__retval = led_on(dev, led); sys_port_trace_syscall_exit(K_SYSCALL_LED_ON, led_on, dev, led, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_led_off(const struct device * dev, uint32_t led); + +__pinned_func +static inline int led_off(const struct device * dev, uint32_t led) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = led }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_LED_OFF); + } +#endif + compiler_barrier(); + return z_impl_led_off(dev, led); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define led_off(dev, led) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_LED_OFF, led_off, dev, led); syscall__retval = led_off(dev, led); sys_port_trace_syscall_exit(K_SYSCALL_LED_OFF, led_off, dev, led, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/libc-hooks.h b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/libc-hooks.h new file mode 100644 index 0000000..c90ad63 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/libc-hooks.h @@ -0,0 +1,126 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_LIBC_HOOKS_H +#define Z_INCLUDE_SYSCALLS_LIBC_HOOKS_H + + +#include <zephyr/tracing/tracing_syscall.h> + +#ifndef _ASMLANGUAGE + +#include <stdarg.h> + +#include <syscall_list.h> +#include <zephyr/syscall.h> + +#include <zephyr/linker/sections.h> + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_zephyr_read_stdin(char * buf, int nbytes); + +__pinned_func +static inline int zephyr_read_stdin(char * buf, int nbytes) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; char * val; } parm0 = { .val = buf }; + union { uintptr_t x; int val; } parm1 = { .val = nbytes }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_ZEPHYR_READ_STDIN); + } +#endif + compiler_barrier(); + return z_impl_zephyr_read_stdin(buf, nbytes); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define zephyr_read_stdin(buf, nbytes) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ZEPHYR_READ_STDIN, zephyr_read_stdin, buf, nbytes); syscall__retval = zephyr_read_stdin(buf, nbytes); sys_port_trace_syscall_exit(K_SYSCALL_ZEPHYR_READ_STDIN, zephyr_read_stdin, buf, nbytes, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_zephyr_write_stdout(const void * buf, int nbytes); + +__pinned_func +static inline int zephyr_write_stdout(const void * buf, int nbytes) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const void * val; } parm0 = { .val = buf }; + union { uintptr_t x; int val; } parm1 = { .val = nbytes }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_ZEPHYR_WRITE_STDOUT); + } +#endif + compiler_barrier(); + return z_impl_zephyr_write_stdout(buf, nbytes); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define zephyr_write_stdout(buf, nbytes) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ZEPHYR_WRITE_STDOUT, zephyr_write_stdout, buf, nbytes); syscall__retval = zephyr_write_stdout(buf, nbytes); sys_port_trace_syscall_exit(K_SYSCALL_ZEPHYR_WRITE_STDOUT, zephyr_write_stdout, buf, nbytes, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_zephyr_fputc(int c, FILE * stream); + +__pinned_func +static inline int zephyr_fputc(int c, FILE * stream) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; int val; } parm0 = { .val = c }; + union { uintptr_t x; FILE * val; } parm1 = { .val = stream }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_ZEPHYR_FPUTC); + } +#endif + compiler_barrier(); + return z_impl_zephyr_fputc(c, stream); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define zephyr_fputc(c, stream) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ZEPHYR_FPUTC, zephyr_fputc, c, stream); syscall__retval = zephyr_fputc(c, stream); sys_port_trace_syscall_exit(K_SYSCALL_ZEPHYR_FPUTC, zephyr_fputc, c, stream, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern size_t z_impl_zephyr_fwrite(const void *ZRESTRICT ptr, size_t size, size_t nitems, FILE *ZRESTRICT stream); + +__pinned_func +static inline size_t zephyr_fwrite(const void *ZRESTRICT ptr, size_t size, size_t nitems, FILE *ZRESTRICT stream) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const void *ZRESTRICT val; } parm0 = { .val = ptr }; + union { uintptr_t x; size_t val; } parm1 = { .val = size }; + union { uintptr_t x; size_t val; } parm2 = { .val = nitems }; + union { uintptr_t x; FILE *ZRESTRICT val; } parm3 = { .val = stream }; + return (size_t) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_ZEPHYR_FWRITE); + } +#endif + compiler_barrier(); + return z_impl_zephyr_fwrite(ptr, size, nitems, stream); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define zephyr_fwrite(ptr, size, nitems, stream) ({ size_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ZEPHYR_FWRITE, zephyr_fwrite, ptr, size, nitems, stream); syscall__retval = zephyr_fwrite(ptr, size, nitems, stream); sys_port_trace_syscall_exit(K_SYSCALL_ZEPHYR_FWRITE, zephyr_fwrite, ptr, size, nitems, stream, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/log_ctrl.h b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/log_ctrl.h new file mode 100644 index 0000000..f4df429 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/log_ctrl.h @@ -0,0 +1,145 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_LOG_CTRL_H +#define Z_INCLUDE_SYSCALLS_LOG_CTRL_H + + +#include <zephyr/tracing/tracing_syscall.h> + +#ifndef _ASMLANGUAGE + +#include <stdarg.h> + +#include <syscall_list.h> +#include <zephyr/syscall.h> + +#include <zephyr/linker/sections.h> + + +#ifdef __cplusplus +extern "C" { +#endif + +extern void z_impl_log_panic(void); + +__pinned_func +static inline void log_panic(void) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + (void) arch_syscall_invoke0(K_SYSCALL_LOG_PANIC); + return; + } +#endif + compiler_barrier(); + z_impl_log_panic(); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define log_panic() do { sys_port_trace_syscall_enter(K_SYSCALL_LOG_PANIC, log_panic); log_panic(); sys_port_trace_syscall_exit(K_SYSCALL_LOG_PANIC, log_panic); } while(false) +#endif +#endif + + +extern bool z_impl_log_process(void); + +__pinned_func +static inline bool log_process(void) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + return (bool) arch_syscall_invoke0(K_SYSCALL_LOG_PROCESS); + } +#endif + compiler_barrier(); + return z_impl_log_process(); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define log_process() ({ bool syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_LOG_PROCESS, log_process); syscall__retval = log_process(); sys_port_trace_syscall_exit(K_SYSCALL_LOG_PROCESS, log_process, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern uint32_t z_impl_log_buffered_cnt(void); + +__pinned_func +static inline uint32_t log_buffered_cnt(void) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + return (uint32_t) arch_syscall_invoke0(K_SYSCALL_LOG_BUFFERED_CNT); + } +#endif + compiler_barrier(); + return z_impl_log_buffered_cnt(); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define log_buffered_cnt() ({ uint32_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_LOG_BUFFERED_CNT, log_buffered_cnt); syscall__retval = log_buffered_cnt(); sys_port_trace_syscall_exit(K_SYSCALL_LOG_BUFFERED_CNT, log_buffered_cnt, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern uint32_t z_impl_log_filter_set(struct log_backend const *const backend, uint32_t domain_id, int16_t source_id, uint32_t level); + +__pinned_func +static inline uint32_t log_filter_set(struct log_backend const *const backend, uint32_t domain_id, int16_t source_id, uint32_t level) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct log_backend const *const val; } parm0 = { .val = backend }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = domain_id }; + union { uintptr_t x; int16_t val; } parm2 = { .val = source_id }; + union { uintptr_t x; uint32_t val; } parm3 = { .val = level }; + return (uint32_t) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_LOG_FILTER_SET); + } +#endif + compiler_barrier(); + return z_impl_log_filter_set(backend, domain_id, source_id, level); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define log_filter_set(backend, domain_id, source_id, level) ({ uint32_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_LOG_FILTER_SET, log_filter_set, backend, domain_id, source_id, level); syscall__retval = log_filter_set(backend, domain_id, source_id, level); sys_port_trace_syscall_exit(K_SYSCALL_LOG_FILTER_SET, log_filter_set, backend, domain_id, source_id, level, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern uint32_t z_impl_log_frontend_filter_set(int16_t source_id, uint32_t level); + +__pinned_func +static inline uint32_t log_frontend_filter_set(int16_t source_id, uint32_t level) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; int16_t val; } parm0 = { .val = source_id }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = level }; + return (uint32_t) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_LOG_FRONTEND_FILTER_SET); + } +#endif + compiler_barrier(); + return z_impl_log_frontend_filter_set(source_id, level); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define log_frontend_filter_set(source_id, level) ({ uint32_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_LOG_FRONTEND_FILTER_SET, log_frontend_filter_set, source_id, level); syscall__retval = log_frontend_filter_set(source_id, level); sys_port_trace_syscall_exit(K_SYSCALL_LOG_FRONTEND_FILTER_SET, log_frontend_filter_set, source_id, level, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/log_msg.h b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/log_msg.h new file mode 100644 index 0000000..24e13c8 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/log_msg.h @@ -0,0 +1,136 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_LOG_MSG_H +#define Z_INCLUDE_SYSCALLS_LOG_MSG_H + + +#include <zephyr/tracing/tracing_syscall.h> + +#ifndef _ASMLANGUAGE + +#include <stdarg.h> + +#include <syscall_list.h> +#include <zephyr/syscall.h> + +#include <zephyr/linker/sections.h> + + +#ifdef __cplusplus +extern "C" { +#endif + +extern void z_impl_z_log_msg_simple_create_0(const void * source, uint32_t level, const char * fmt); + +__pinned_func +static inline void z_log_msg_simple_create_0(const void * source, uint32_t level, const char * fmt) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const void * val; } parm0 = { .val = source }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = level }; + union { uintptr_t x; const char * val; } parm2 = { .val = fmt }; + (void) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_Z_LOG_MSG_SIMPLE_CREATE_0); + return; + } +#endif + compiler_barrier(); + z_impl_z_log_msg_simple_create_0(source, level, fmt); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define z_log_msg_simple_create_0(source, level, fmt) do { sys_port_trace_syscall_enter(K_SYSCALL_Z_LOG_MSG_SIMPLE_CREATE_0, z_log_msg_simple_create_0, source, level, fmt); z_log_msg_simple_create_0(source, level, fmt); sys_port_trace_syscall_exit(K_SYSCALL_Z_LOG_MSG_SIMPLE_CREATE_0, z_log_msg_simple_create_0, source, level, fmt); } while(false) +#endif +#endif + + +extern void z_impl_z_log_msg_simple_create_1(const void * source, uint32_t level, const char * fmt, uint32_t arg); + +__pinned_func +static inline void z_log_msg_simple_create_1(const void * source, uint32_t level, const char * fmt, uint32_t arg) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const void * val; } parm0 = { .val = source }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = level }; + union { uintptr_t x; const char * val; } parm2 = { .val = fmt }; + union { uintptr_t x; uint32_t val; } parm3 = { .val = arg }; + (void) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_Z_LOG_MSG_SIMPLE_CREATE_1); + return; + } +#endif + compiler_barrier(); + z_impl_z_log_msg_simple_create_1(source, level, fmt, arg); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define z_log_msg_simple_create_1(source, level, fmt, arg) do { sys_port_trace_syscall_enter(K_SYSCALL_Z_LOG_MSG_SIMPLE_CREATE_1, z_log_msg_simple_create_1, source, level, fmt, arg); z_log_msg_simple_create_1(source, level, fmt, arg); sys_port_trace_syscall_exit(K_SYSCALL_Z_LOG_MSG_SIMPLE_CREATE_1, z_log_msg_simple_create_1, source, level, fmt, arg); } while(false) +#endif +#endif + + +extern void z_impl_z_log_msg_simple_create_2(const void * source, uint32_t level, const char * fmt, uint32_t arg0, uint32_t arg1); + +__pinned_func +static inline void z_log_msg_simple_create_2(const void * source, uint32_t level, const char * fmt, uint32_t arg0, uint32_t arg1) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const void * val; } parm0 = { .val = source }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = level }; + union { uintptr_t x; const char * val; } parm2 = { .val = fmt }; + union { uintptr_t x; uint32_t val; } parm3 = { .val = arg0 }; + union { uintptr_t x; uint32_t val; } parm4 = { .val = arg1 }; + (void) arch_syscall_invoke5(parm0.x, parm1.x, parm2.x, parm3.x, parm4.x, K_SYSCALL_Z_LOG_MSG_SIMPLE_CREATE_2); + return; + } +#endif + compiler_barrier(); + z_impl_z_log_msg_simple_create_2(source, level, fmt, arg0, arg1); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define z_log_msg_simple_create_2(source, level, fmt, arg0, arg1) do { sys_port_trace_syscall_enter(K_SYSCALL_Z_LOG_MSG_SIMPLE_CREATE_2, z_log_msg_simple_create_2, source, level, fmt, arg0, arg1); z_log_msg_simple_create_2(source, level, fmt, arg0, arg1); sys_port_trace_syscall_exit(K_SYSCALL_Z_LOG_MSG_SIMPLE_CREATE_2, z_log_msg_simple_create_2, source, level, fmt, arg0, arg1); } while(false) +#endif +#endif + + +extern void z_impl_z_log_msg_static_create(const void * source, const struct log_msg_desc desc, uint8_t * package, const void * data); + +__pinned_func +static inline void z_log_msg_static_create(const void * source, const struct log_msg_desc desc, uint8_t * package, const void * data) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const void * val; } parm0 = { .val = source }; + union { uintptr_t x; const struct log_msg_desc val; } parm1 = { .val = desc }; + union { uintptr_t x; uint8_t * val; } parm2 = { .val = package }; + union { uintptr_t x; const void * val; } parm3 = { .val = data }; + (void) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_Z_LOG_MSG_STATIC_CREATE); + return; + } +#endif + compiler_barrier(); + z_impl_z_log_msg_static_create(source, desc, package, data); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define z_log_msg_static_create(source, desc, package, data) do { sys_port_trace_syscall_enter(K_SYSCALL_Z_LOG_MSG_STATIC_CREATE, z_log_msg_static_create, source, desc, package, data); z_log_msg_static_create(source, desc, package, data); sys_port_trace_syscall_exit(K_SYSCALL_Z_LOG_MSG_STATIC_CREATE, z_log_msg_static_create, source, desc, package, data); } while(false) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/maxim_ds3231.h b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/maxim_ds3231.h new file mode 100644 index 0000000..7a656a4 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/maxim_ds3231.h @@ -0,0 +1,76 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_MAXIM_DS3231_H +#define Z_INCLUDE_SYSCALLS_MAXIM_DS3231_H + + +#include <zephyr/tracing/tracing_syscall.h> + +#ifndef _ASMLANGUAGE + +#include <stdarg.h> + +#include <syscall_list.h> +#include <zephyr/syscall.h> + +#include <zephyr/linker/sections.h> + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_maxim_ds3231_req_syncpoint(const struct device * dev, struct k_poll_signal * signal); + +__pinned_func +static inline int maxim_ds3231_req_syncpoint(const struct device * dev, struct k_poll_signal * signal) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; struct k_poll_signal * val; } parm1 = { .val = signal }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_MAXIM_DS3231_REQ_SYNCPOINT); + } +#endif + compiler_barrier(); + return z_impl_maxim_ds3231_req_syncpoint(dev, signal); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define maxim_ds3231_req_syncpoint(dev, signal) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_MAXIM_DS3231_REQ_SYNCPOINT, maxim_ds3231_req_syncpoint, dev, signal); syscall__retval = maxim_ds3231_req_syncpoint(dev, signal); sys_port_trace_syscall_exit(K_SYSCALL_MAXIM_DS3231_REQ_SYNCPOINT, maxim_ds3231_req_syncpoint, dev, signal, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_maxim_ds3231_get_syncpoint(const struct device * dev, struct maxim_ds3231_syncpoint * syncpoint); + +__pinned_func +static inline int maxim_ds3231_get_syncpoint(const struct device * dev, struct maxim_ds3231_syncpoint * syncpoint) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; struct maxim_ds3231_syncpoint * val; } parm1 = { .val = syncpoint }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_MAXIM_DS3231_GET_SYNCPOINT); + } +#endif + compiler_barrier(); + return z_impl_maxim_ds3231_get_syncpoint(dev, syncpoint); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define maxim_ds3231_get_syncpoint(dev, syncpoint) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_MAXIM_DS3231_GET_SYNCPOINT, maxim_ds3231_get_syncpoint, dev, syncpoint); syscall__retval = maxim_ds3231_get_syncpoint(dev, syncpoint); sys_port_trace_syscall_exit(K_SYSCALL_MAXIM_DS3231_GET_SYNCPOINT, maxim_ds3231_get_syncpoint, dev, syncpoint, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/mbox.h b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/mbox.h new file mode 100644 index 0000000..c8b4ae5 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/mbox.h @@ -0,0 +1,124 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_MBOX_H +#define Z_INCLUDE_SYSCALLS_MBOX_H + + +#include <zephyr/tracing/tracing_syscall.h> + +#ifndef _ASMLANGUAGE + +#include <stdarg.h> + +#include <syscall_list.h> +#include <zephyr/syscall.h> + +#include <zephyr/linker/sections.h> + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_mbox_send(const struct device * dev, mbox_channel_id_t channel_id, const struct mbox_msg * msg); + +__pinned_func +static inline int mbox_send(const struct device * dev, mbox_channel_id_t channel_id, const struct mbox_msg * msg) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; mbox_channel_id_t val; } parm1 = { .val = channel_id }; + union { uintptr_t x; const struct mbox_msg * val; } parm2 = { .val = msg }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_MBOX_SEND); + } +#endif + compiler_barrier(); + return z_impl_mbox_send(dev, channel_id, msg); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define mbox_send(dev, channel_id, msg) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_MBOX_SEND, mbox_send, dev, channel_id, msg); syscall__retval = mbox_send(dev, channel_id, msg); sys_port_trace_syscall_exit(K_SYSCALL_MBOX_SEND, mbox_send, dev, channel_id, msg, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_mbox_mtu_get(const struct device * dev); + +__pinned_func +static inline int mbox_mtu_get(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_MBOX_MTU_GET); + } +#endif + compiler_barrier(); + return z_impl_mbox_mtu_get(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define mbox_mtu_get(dev) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_MBOX_MTU_GET, mbox_mtu_get, dev); syscall__retval = mbox_mtu_get(dev); sys_port_trace_syscall_exit(K_SYSCALL_MBOX_MTU_GET, mbox_mtu_get, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_mbox_set_enabled(const struct device * dev, mbox_channel_id_t channel_id, bool enabled); + +__pinned_func +static inline int mbox_set_enabled(const struct device * dev, mbox_channel_id_t channel_id, bool enabled) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; mbox_channel_id_t val; } parm1 = { .val = channel_id }; + union { uintptr_t x; bool val; } parm2 = { .val = enabled }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_MBOX_SET_ENABLED); + } +#endif + compiler_barrier(); + return z_impl_mbox_set_enabled(dev, channel_id, enabled); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define mbox_set_enabled(dev, channel_id, enabled) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_MBOX_SET_ENABLED, mbox_set_enabled, dev, channel_id, enabled); syscall__retval = mbox_set_enabled(dev, channel_id, enabled); sys_port_trace_syscall_exit(K_SYSCALL_MBOX_SET_ENABLED, mbox_set_enabled, dev, channel_id, enabled, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern uint32_t z_impl_mbox_max_channels_get(const struct device * dev); + +__pinned_func +static inline uint32_t mbox_max_channels_get(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (uint32_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_MBOX_MAX_CHANNELS_GET); + } +#endif + compiler_barrier(); + return z_impl_mbox_max_channels_get(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define mbox_max_channels_get(dev) ({ uint32_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_MBOX_MAX_CHANNELS_GET, mbox_max_channels_get, dev); syscall__retval = mbox_max_channels_get(dev); sys_port_trace_syscall_exit(K_SYSCALL_MBOX_MAX_CHANNELS_GET, mbox_max_channels_get, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/mdio.h b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/mdio.h new file mode 100644 index 0000000..0e96369 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/mdio.h @@ -0,0 +1,182 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_MDIO_H +#define Z_INCLUDE_SYSCALLS_MDIO_H + + +#include <zephyr/tracing/tracing_syscall.h> + +#ifndef _ASMLANGUAGE + +#include <stdarg.h> + +#include <syscall_list.h> +#include <zephyr/syscall.h> + +#include <zephyr/linker/sections.h> + + +#ifdef __cplusplus +extern "C" { +#endif + +extern void z_impl_mdio_bus_enable(const struct device * dev); + +__pinned_func +static inline void mdio_bus_enable(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + (void) arch_syscall_invoke1(parm0.x, K_SYSCALL_MDIO_BUS_ENABLE); + return; + } +#endif + compiler_barrier(); + z_impl_mdio_bus_enable(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define mdio_bus_enable(dev) do { sys_port_trace_syscall_enter(K_SYSCALL_MDIO_BUS_ENABLE, mdio_bus_enable, dev); mdio_bus_enable(dev); sys_port_trace_syscall_exit(K_SYSCALL_MDIO_BUS_ENABLE, mdio_bus_enable, dev); } while(false) +#endif +#endif + + +extern void z_impl_mdio_bus_disable(const struct device * dev); + +__pinned_func +static inline void mdio_bus_disable(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + (void) arch_syscall_invoke1(parm0.x, K_SYSCALL_MDIO_BUS_DISABLE); + return; + } +#endif + compiler_barrier(); + z_impl_mdio_bus_disable(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define mdio_bus_disable(dev) do { sys_port_trace_syscall_enter(K_SYSCALL_MDIO_BUS_DISABLE, mdio_bus_disable, dev); mdio_bus_disable(dev); sys_port_trace_syscall_exit(K_SYSCALL_MDIO_BUS_DISABLE, mdio_bus_disable, dev); } while(false) +#endif +#endif + + +extern int z_impl_mdio_read(const struct device * dev, uint8_t prtad, uint8_t regad, uint16_t * data); + +__pinned_func +static inline int mdio_read(const struct device * dev, uint8_t prtad, uint8_t regad, uint16_t * data) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint8_t val; } parm1 = { .val = prtad }; + union { uintptr_t x; uint8_t val; } parm2 = { .val = regad }; + union { uintptr_t x; uint16_t * val; } parm3 = { .val = data }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_MDIO_READ); + } +#endif + compiler_barrier(); + return z_impl_mdio_read(dev, prtad, regad, data); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define mdio_read(dev, prtad, regad, data) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_MDIO_READ, mdio_read, dev, prtad, regad, data); syscall__retval = mdio_read(dev, prtad, regad, data); sys_port_trace_syscall_exit(K_SYSCALL_MDIO_READ, mdio_read, dev, prtad, regad, data, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_mdio_write(const struct device * dev, uint8_t prtad, uint8_t regad, uint16_t data); + +__pinned_func +static inline int mdio_write(const struct device * dev, uint8_t prtad, uint8_t regad, uint16_t data) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint8_t val; } parm1 = { .val = prtad }; + union { uintptr_t x; uint8_t val; } parm2 = { .val = regad }; + union { uintptr_t x; uint16_t val; } parm3 = { .val = data }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_MDIO_WRITE); + } +#endif + compiler_barrier(); + return z_impl_mdio_write(dev, prtad, regad, data); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define mdio_write(dev, prtad, regad, data) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_MDIO_WRITE, mdio_write, dev, prtad, regad, data); syscall__retval = mdio_write(dev, prtad, regad, data); sys_port_trace_syscall_exit(K_SYSCALL_MDIO_WRITE, mdio_write, dev, prtad, regad, data, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_mdio_read_c45(const struct device * dev, uint8_t prtad, uint8_t devad, uint16_t regad, uint16_t * data); + +__pinned_func +static inline int mdio_read_c45(const struct device * dev, uint8_t prtad, uint8_t devad, uint16_t regad, uint16_t * data) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint8_t val; } parm1 = { .val = prtad }; + union { uintptr_t x; uint8_t val; } parm2 = { .val = devad }; + union { uintptr_t x; uint16_t val; } parm3 = { .val = regad }; + union { uintptr_t x; uint16_t * val; } parm4 = { .val = data }; + return (int) arch_syscall_invoke5(parm0.x, parm1.x, parm2.x, parm3.x, parm4.x, K_SYSCALL_MDIO_READ_C45); + } +#endif + compiler_barrier(); + return z_impl_mdio_read_c45(dev, prtad, devad, regad, data); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define mdio_read_c45(dev, prtad, devad, regad, data) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_MDIO_READ_C45, mdio_read_c45, dev, prtad, devad, regad, data); syscall__retval = mdio_read_c45(dev, prtad, devad, regad, data); sys_port_trace_syscall_exit(K_SYSCALL_MDIO_READ_C45, mdio_read_c45, dev, prtad, devad, regad, data, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_mdio_write_c45(const struct device * dev, uint8_t prtad, uint8_t devad, uint16_t regad, uint16_t data); + +__pinned_func +static inline int mdio_write_c45(const struct device * dev, uint8_t prtad, uint8_t devad, uint16_t regad, uint16_t data) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint8_t val; } parm1 = { .val = prtad }; + union { uintptr_t x; uint8_t val; } parm2 = { .val = devad }; + union { uintptr_t x; uint16_t val; } parm3 = { .val = regad }; + union { uintptr_t x; uint16_t val; } parm4 = { .val = data }; + return (int) arch_syscall_invoke5(parm0.x, parm1.x, parm2.x, parm3.x, parm4.x, K_SYSCALL_MDIO_WRITE_C45); + } +#endif + compiler_barrier(); + return z_impl_mdio_write_c45(dev, prtad, devad, regad, data); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define mdio_write_c45(dev, prtad, devad, regad, data) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_MDIO_WRITE_C45, mdio_write_c45, dev, prtad, devad, regad, data); syscall__retval = mdio_write_c45(dev, prtad, devad, regad, data); sys_port_trace_syscall_exit(K_SYSCALL_MDIO_WRITE_C45, mdio_write_c45, dev, prtad, devad, regad, data, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/mutex.h b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/mutex.h new file mode 100644 index 0000000..c529133 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/mutex.h @@ -0,0 +1,75 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_MUTEX_H +#define Z_INCLUDE_SYSCALLS_MUTEX_H + + +#include <zephyr/tracing/tracing_syscall.h> + +#ifndef _ASMLANGUAGE + +#include <stdarg.h> + +#include <syscall_list.h> +#include <zephyr/syscall.h> + +#include <zephyr/linker/sections.h> + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_z_sys_mutex_kernel_lock(struct sys_mutex * mutex, k_timeout_t timeout); + +__pinned_func +static inline int z_sys_mutex_kernel_lock(struct sys_mutex * mutex, k_timeout_t timeout) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct sys_mutex * val; } parm0 = { .val = mutex }; + union { struct { uintptr_t lo, hi; } split; k_timeout_t val; } parm1 = { .val = timeout }; + return (int) arch_syscall_invoke3(parm0.x, parm1.split.lo, parm1.split.hi, K_SYSCALL_Z_SYS_MUTEX_KERNEL_LOCK); + } +#endif + compiler_barrier(); + return z_impl_z_sys_mutex_kernel_lock(mutex, timeout); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define z_sys_mutex_kernel_lock(mutex, timeout) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_Z_SYS_MUTEX_KERNEL_LOCK, z_sys_mutex_kernel_lock, mutex, timeout); syscall__retval = z_sys_mutex_kernel_lock(mutex, timeout); sys_port_trace_syscall_exit(K_SYSCALL_Z_SYS_MUTEX_KERNEL_LOCK, z_sys_mutex_kernel_lock, mutex, timeout, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_z_sys_mutex_kernel_unlock(struct sys_mutex * mutex); + +__pinned_func +static inline int z_sys_mutex_kernel_unlock(struct sys_mutex * mutex) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct sys_mutex * val; } parm0 = { .val = mutex }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_Z_SYS_MUTEX_KERNEL_UNLOCK); + } +#endif + compiler_barrier(); + return z_impl_z_sys_mutex_kernel_unlock(mutex); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define z_sys_mutex_kernel_unlock(mutex) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_Z_SYS_MUTEX_KERNEL_UNLOCK, z_sys_mutex_kernel_unlock, mutex); syscall__retval = z_sys_mutex_kernel_unlock(mutex); sys_port_trace_syscall_exit(K_SYSCALL_Z_SYS_MUTEX_KERNEL_UNLOCK, z_sys_mutex_kernel_unlock, mutex, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/net_if.h b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/net_if.h new file mode 100644 index 0000000..74fe947 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/net_if.h @@ -0,0 +1,270 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_NET_IF_H +#define Z_INCLUDE_SYSCALLS_NET_IF_H + + +#include <zephyr/tracing/tracing_syscall.h> + +#ifndef _ASMLANGUAGE + +#include <stdarg.h> + +#include <syscall_list.h> +#include <zephyr/syscall.h> + +#include <zephyr/linker/sections.h> + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_net_if_ipv6_addr_lookup_by_index(const struct in6_addr * addr); + +__pinned_func +static inline int net_if_ipv6_addr_lookup_by_index(const struct in6_addr * addr) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct in6_addr * val; } parm0 = { .val = addr }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_NET_IF_IPV6_ADDR_LOOKUP_BY_INDEX); + } +#endif + compiler_barrier(); + return z_impl_net_if_ipv6_addr_lookup_by_index(addr); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define net_if_ipv6_addr_lookup_by_index(addr) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_NET_IF_IPV6_ADDR_LOOKUP_BY_INDEX, net_if_ipv6_addr_lookup_by_index, addr); syscall__retval = net_if_ipv6_addr_lookup_by_index(addr); sys_port_trace_syscall_exit(K_SYSCALL_NET_IF_IPV6_ADDR_LOOKUP_BY_INDEX, net_if_ipv6_addr_lookup_by_index, addr, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern bool z_impl_net_if_ipv6_addr_add_by_index(int index, struct in6_addr * addr, enum net_addr_type addr_type, uint32_t vlifetime); + +__pinned_func +static inline bool net_if_ipv6_addr_add_by_index(int index, struct in6_addr * addr, enum net_addr_type addr_type, uint32_t vlifetime) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; int val; } parm0 = { .val = index }; + union { uintptr_t x; struct in6_addr * val; } parm1 = { .val = addr }; + union { uintptr_t x; enum net_addr_type val; } parm2 = { .val = addr_type }; + union { uintptr_t x; uint32_t val; } parm3 = { .val = vlifetime }; + return (bool) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_NET_IF_IPV6_ADDR_ADD_BY_INDEX); + } +#endif + compiler_barrier(); + return z_impl_net_if_ipv6_addr_add_by_index(index, addr, addr_type, vlifetime); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define net_if_ipv6_addr_add_by_index(index, addr, addr_type, vlifetime) ({ bool syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_NET_IF_IPV6_ADDR_ADD_BY_INDEX, net_if_ipv6_addr_add_by_index, index, addr, addr_type, vlifetime); syscall__retval = net_if_ipv6_addr_add_by_index(index, addr, addr_type, vlifetime); sys_port_trace_syscall_exit(K_SYSCALL_NET_IF_IPV6_ADDR_ADD_BY_INDEX, net_if_ipv6_addr_add_by_index, index, addr, addr_type, vlifetime, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern bool z_impl_net_if_ipv6_addr_rm_by_index(int index, const struct in6_addr * addr); + +__pinned_func +static inline bool net_if_ipv6_addr_rm_by_index(int index, const struct in6_addr * addr) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; int val; } parm0 = { .val = index }; + union { uintptr_t x; const struct in6_addr * val; } parm1 = { .val = addr }; + return (bool) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_NET_IF_IPV6_ADDR_RM_BY_INDEX); + } +#endif + compiler_barrier(); + return z_impl_net_if_ipv6_addr_rm_by_index(index, addr); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define net_if_ipv6_addr_rm_by_index(index, addr) ({ bool syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_NET_IF_IPV6_ADDR_RM_BY_INDEX, net_if_ipv6_addr_rm_by_index, index, addr); syscall__retval = net_if_ipv6_addr_rm_by_index(index, addr); sys_port_trace_syscall_exit(K_SYSCALL_NET_IF_IPV6_ADDR_RM_BY_INDEX, net_if_ipv6_addr_rm_by_index, index, addr, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_net_if_ipv4_addr_lookup_by_index(const struct in_addr * addr); + +__pinned_func +static inline int net_if_ipv4_addr_lookup_by_index(const struct in_addr * addr) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct in_addr * val; } parm0 = { .val = addr }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_NET_IF_IPV4_ADDR_LOOKUP_BY_INDEX); + } +#endif + compiler_barrier(); + return z_impl_net_if_ipv4_addr_lookup_by_index(addr); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define net_if_ipv4_addr_lookup_by_index(addr) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_NET_IF_IPV4_ADDR_LOOKUP_BY_INDEX, net_if_ipv4_addr_lookup_by_index, addr); syscall__retval = net_if_ipv4_addr_lookup_by_index(addr); sys_port_trace_syscall_exit(K_SYSCALL_NET_IF_IPV4_ADDR_LOOKUP_BY_INDEX, net_if_ipv4_addr_lookup_by_index, addr, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern bool z_impl_net_if_ipv4_addr_add_by_index(int index, struct in_addr * addr, enum net_addr_type addr_type, uint32_t vlifetime); + +__pinned_func +static inline bool net_if_ipv4_addr_add_by_index(int index, struct in_addr * addr, enum net_addr_type addr_type, uint32_t vlifetime) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; int val; } parm0 = { .val = index }; + union { uintptr_t x; struct in_addr * val; } parm1 = { .val = addr }; + union { uintptr_t x; enum net_addr_type val; } parm2 = { .val = addr_type }; + union { uintptr_t x; uint32_t val; } parm3 = { .val = vlifetime }; + return (bool) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_NET_IF_IPV4_ADDR_ADD_BY_INDEX); + } +#endif + compiler_barrier(); + return z_impl_net_if_ipv4_addr_add_by_index(index, addr, addr_type, vlifetime); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define net_if_ipv4_addr_add_by_index(index, addr, addr_type, vlifetime) ({ bool syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_NET_IF_IPV4_ADDR_ADD_BY_INDEX, net_if_ipv4_addr_add_by_index, index, addr, addr_type, vlifetime); syscall__retval = net_if_ipv4_addr_add_by_index(index, addr, addr_type, vlifetime); sys_port_trace_syscall_exit(K_SYSCALL_NET_IF_IPV4_ADDR_ADD_BY_INDEX, net_if_ipv4_addr_add_by_index, index, addr, addr_type, vlifetime, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern bool z_impl_net_if_ipv4_addr_rm_by_index(int index, const struct in_addr * addr); + +__pinned_func +static inline bool net_if_ipv4_addr_rm_by_index(int index, const struct in_addr * addr) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; int val; } parm0 = { .val = index }; + union { uintptr_t x; const struct in_addr * val; } parm1 = { .val = addr }; + return (bool) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_NET_IF_IPV4_ADDR_RM_BY_INDEX); + } +#endif + compiler_barrier(); + return z_impl_net_if_ipv4_addr_rm_by_index(index, addr); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define net_if_ipv4_addr_rm_by_index(index, addr) ({ bool syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_NET_IF_IPV4_ADDR_RM_BY_INDEX, net_if_ipv4_addr_rm_by_index, index, addr); syscall__retval = net_if_ipv4_addr_rm_by_index(index, addr); sys_port_trace_syscall_exit(K_SYSCALL_NET_IF_IPV4_ADDR_RM_BY_INDEX, net_if_ipv4_addr_rm_by_index, index, addr, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern bool z_impl_net_if_ipv4_set_netmask_by_index(int index, const struct in_addr * netmask); + +__pinned_func +static inline bool net_if_ipv4_set_netmask_by_index(int index, const struct in_addr * netmask) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; int val; } parm0 = { .val = index }; + union { uintptr_t x; const struct in_addr * val; } parm1 = { .val = netmask }; + return (bool) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_NET_IF_IPV4_SET_NETMASK_BY_INDEX); + } +#endif + compiler_barrier(); + return z_impl_net_if_ipv4_set_netmask_by_index(index, netmask); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define net_if_ipv4_set_netmask_by_index(index, netmask) ({ bool syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_NET_IF_IPV4_SET_NETMASK_BY_INDEX, net_if_ipv4_set_netmask_by_index, index, netmask); syscall__retval = net_if_ipv4_set_netmask_by_index(index, netmask); sys_port_trace_syscall_exit(K_SYSCALL_NET_IF_IPV4_SET_NETMASK_BY_INDEX, net_if_ipv4_set_netmask_by_index, index, netmask, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern bool z_impl_net_if_ipv4_set_netmask_by_addr_by_index(int index, const struct in_addr * addr, const struct in_addr * netmask); + +__pinned_func +static inline bool net_if_ipv4_set_netmask_by_addr_by_index(int index, const struct in_addr * addr, const struct in_addr * netmask) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; int val; } parm0 = { .val = index }; + union { uintptr_t x; const struct in_addr * val; } parm1 = { .val = addr }; + union { uintptr_t x; const struct in_addr * val; } parm2 = { .val = netmask }; + return (bool) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_NET_IF_IPV4_SET_NETMASK_BY_ADDR_BY_INDEX); + } +#endif + compiler_barrier(); + return z_impl_net_if_ipv4_set_netmask_by_addr_by_index(index, addr, netmask); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define net_if_ipv4_set_netmask_by_addr_by_index(index, addr, netmask) ({ bool syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_NET_IF_IPV4_SET_NETMASK_BY_ADDR_BY_INDEX, net_if_ipv4_set_netmask_by_addr_by_index, index, addr, netmask); syscall__retval = net_if_ipv4_set_netmask_by_addr_by_index(index, addr, netmask); sys_port_trace_syscall_exit(K_SYSCALL_NET_IF_IPV4_SET_NETMASK_BY_ADDR_BY_INDEX, net_if_ipv4_set_netmask_by_addr_by_index, index, addr, netmask, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern bool z_impl_net_if_ipv4_set_gw_by_index(int index, const struct in_addr * gw); + +__pinned_func +static inline bool net_if_ipv4_set_gw_by_index(int index, const struct in_addr * gw) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; int val; } parm0 = { .val = index }; + union { uintptr_t x; const struct in_addr * val; } parm1 = { .val = gw }; + return (bool) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_NET_IF_IPV4_SET_GW_BY_INDEX); + } +#endif + compiler_barrier(); + return z_impl_net_if_ipv4_set_gw_by_index(index, gw); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define net_if_ipv4_set_gw_by_index(index, gw) ({ bool syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_NET_IF_IPV4_SET_GW_BY_INDEX, net_if_ipv4_set_gw_by_index, index, gw); syscall__retval = net_if_ipv4_set_gw_by_index(index, gw); sys_port_trace_syscall_exit(K_SYSCALL_NET_IF_IPV4_SET_GW_BY_INDEX, net_if_ipv4_set_gw_by_index, index, gw, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern struct net_if * z_impl_net_if_get_by_index(int index); + +__pinned_func +static inline struct net_if * net_if_get_by_index(int index) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; int val; } parm0 = { .val = index }; + return (struct net_if *) arch_syscall_invoke1(parm0.x, K_SYSCALL_NET_IF_GET_BY_INDEX); + } +#endif + compiler_barrier(); + return z_impl_net_if_get_by_index(index); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define net_if_get_by_index(index) ({ struct net_if * syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_NET_IF_GET_BY_INDEX, net_if_get_by_index, index); syscall__retval = net_if_get_by_index(index); sys_port_trace_syscall_exit(K_SYSCALL_NET_IF_GET_BY_INDEX, net_if_get_by_index, index, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/net_ip.h b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/net_ip.h new file mode 100644 index 0000000..6659cd4 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/net_ip.h @@ -0,0 +1,79 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_NET_IP_H +#define Z_INCLUDE_SYSCALLS_NET_IP_H + + +#include <zephyr/tracing/tracing_syscall.h> + +#ifndef _ASMLANGUAGE + +#include <stdarg.h> + +#include <syscall_list.h> +#include <zephyr/syscall.h> + +#include <zephyr/linker/sections.h> + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_net_addr_pton(sa_family_t family, const char * src, void * dst); + +__pinned_func +static inline int net_addr_pton(sa_family_t family, const char * src, void * dst) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; sa_family_t val; } parm0 = { .val = family }; + union { uintptr_t x; const char * val; } parm1 = { .val = src }; + union { uintptr_t x; void * val; } parm2 = { .val = dst }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_NET_ADDR_PTON); + } +#endif + compiler_barrier(); + return z_impl_net_addr_pton(family, src, dst); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define net_addr_pton(family, src, dst) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_NET_ADDR_PTON, net_addr_pton, family, src, dst); syscall__retval = net_addr_pton(family, src, dst); sys_port_trace_syscall_exit(K_SYSCALL_NET_ADDR_PTON, net_addr_pton, family, src, dst, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern char * z_impl_net_addr_ntop(sa_family_t family, const void * src, char * dst, size_t size); + +__pinned_func +static inline char * net_addr_ntop(sa_family_t family, const void * src, char * dst, size_t size) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; sa_family_t val; } parm0 = { .val = family }; + union { uintptr_t x; const void * val; } parm1 = { .val = src }; + union { uintptr_t x; char * val; } parm2 = { .val = dst }; + union { uintptr_t x; size_t val; } parm3 = { .val = size }; + return (char *) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_NET_ADDR_NTOP); + } +#endif + compiler_barrier(); + return z_impl_net_addr_ntop(family, src, dst, size); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define net_addr_ntop(family, src, dst, size) ({ char * syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_NET_ADDR_NTOP, net_addr_ntop, family, src, dst, size); syscall__retval = net_addr_ntop(family, src, dst, size); sys_port_trace_syscall_exit(K_SYSCALL_NET_ADDR_NTOP, net_addr_ntop, family, src, dst, size, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/nrf_qspi_nor.h b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/nrf_qspi_nor.h new file mode 100644 index 0000000..0caf244 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/nrf_qspi_nor.h @@ -0,0 +1,53 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_NRF_QSPI_NOR_H +#define Z_INCLUDE_SYSCALLS_NRF_QSPI_NOR_H + + +#include <zephyr/tracing/tracing_syscall.h> + +#ifndef _ASMLANGUAGE + +#include <stdarg.h> + +#include <syscall_list.h> +#include <zephyr/syscall.h> + +#include <zephyr/linker/sections.h> + + +#ifdef __cplusplus +extern "C" { +#endif + +extern void z_impl_nrf_qspi_nor_xip_enable(const struct device * dev, bool enable); + +__pinned_func +static inline void nrf_qspi_nor_xip_enable(const struct device * dev, bool enable) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; bool val; } parm1 = { .val = enable }; + (void) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_NRF_QSPI_NOR_XIP_ENABLE); + return; + } +#endif + compiler_barrier(); + z_impl_nrf_qspi_nor_xip_enable(dev, enable); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define nrf_qspi_nor_xip_enable(dev, enable) do { sys_port_trace_syscall_enter(K_SYSCALL_NRF_QSPI_NOR_XIP_ENABLE, nrf_qspi_nor_xip_enable, dev, enable); nrf_qspi_nor_xip_enable(dev, enable); sys_port_trace_syscall_exit(K_SYSCALL_NRF_QSPI_NOR_XIP_ENABLE, nrf_qspi_nor_xip_enable, dev, enable); } while(false) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/peci.h b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/peci.h new file mode 100644 index 0000000..6d3a15a --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/peci.h @@ -0,0 +1,122 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_PECI_H +#define Z_INCLUDE_SYSCALLS_PECI_H + + +#include <zephyr/tracing/tracing_syscall.h> + +#ifndef _ASMLANGUAGE + +#include <stdarg.h> + +#include <syscall_list.h> +#include <zephyr/syscall.h> + +#include <zephyr/linker/sections.h> + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_peci_config(const struct device * dev, uint32_t bitrate); + +__pinned_func +static inline int peci_config(const struct device * dev, uint32_t bitrate) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = bitrate }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_PECI_CONFIG); + } +#endif + compiler_barrier(); + return z_impl_peci_config(dev, bitrate); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define peci_config(dev, bitrate) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_PECI_CONFIG, peci_config, dev, bitrate); syscall__retval = peci_config(dev, bitrate); sys_port_trace_syscall_exit(K_SYSCALL_PECI_CONFIG, peci_config, dev, bitrate, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_peci_enable(const struct device * dev); + +__pinned_func +static inline int peci_enable(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_PECI_ENABLE); + } +#endif + compiler_barrier(); + return z_impl_peci_enable(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define peci_enable(dev) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_PECI_ENABLE, peci_enable, dev); syscall__retval = peci_enable(dev); sys_port_trace_syscall_exit(K_SYSCALL_PECI_ENABLE, peci_enable, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_peci_disable(const struct device * dev); + +__pinned_func +static inline int peci_disable(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_PECI_DISABLE); + } +#endif + compiler_barrier(); + return z_impl_peci_disable(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define peci_disable(dev) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_PECI_DISABLE, peci_disable, dev); syscall__retval = peci_disable(dev); sys_port_trace_syscall_exit(K_SYSCALL_PECI_DISABLE, peci_disable, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_peci_transfer(const struct device * dev, struct peci_msg * msg); + +__pinned_func +static inline int peci_transfer(const struct device * dev, struct peci_msg * msg) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; struct peci_msg * val; } parm1 = { .val = msg }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_PECI_TRANSFER); + } +#endif + compiler_barrier(); + return z_impl_peci_transfer(dev, msg); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define peci_transfer(dev, msg) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_PECI_TRANSFER, peci_transfer, dev, msg); syscall__retval = peci_transfer(dev, msg); sys_port_trace_syscall_exit(K_SYSCALL_PECI_TRANSFER, peci_transfer, dev, msg, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/posix_clock.h b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/posix_clock.h new file mode 100644 index 0000000..0227397 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/posix_clock.h @@ -0,0 +1,52 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_POSIX_CLOCK_H +#define Z_INCLUDE_SYSCALLS_POSIX_CLOCK_H + + +#include <zephyr/tracing/tracing_syscall.h> + +#ifndef _ASMLANGUAGE + +#include <stdarg.h> + +#include <syscall_list.h> +#include <zephyr/syscall.h> + +#include <zephyr/linker/sections.h> + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl___posix_clock_get_base(clockid_t clock_id, struct timespec * ts); + +__pinned_func +static inline int __posix_clock_get_base(clockid_t clock_id, struct timespec * ts) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; clockid_t val; } parm0 = { .val = clock_id }; + union { uintptr_t x; struct timespec * val; } parm1 = { .val = ts }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL___POSIX_CLOCK_GET_BASE); + } +#endif + compiler_barrier(); + return z_impl___posix_clock_get_base(clock_id, ts); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define __posix_clock_get_base(clock_id, ts) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL___POSIX_CLOCK_GET_BASE, __posix_clock_get_base, clock_id, ts); syscall__retval = __posix_clock_get_base(clock_id, ts); sys_port_trace_syscall_exit(K_SYSCALL___POSIX_CLOCK_GET_BASE, __posix_clock_get_base, clock_id, ts, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/ps2.h b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/ps2.h new file mode 100644 index 0000000..53ee99b --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/ps2.h @@ -0,0 +1,146 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_PS2_H +#define Z_INCLUDE_SYSCALLS_PS2_H + + +#include <zephyr/tracing/tracing_syscall.h> + +#ifndef _ASMLANGUAGE + +#include <stdarg.h> + +#include <syscall_list.h> +#include <zephyr/syscall.h> + +#include <zephyr/linker/sections.h> + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_ps2_config(const struct device * dev, ps2_callback_t callback_isr); + +__pinned_func +static inline int ps2_config(const struct device * dev, ps2_callback_t callback_isr) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; ps2_callback_t val; } parm1 = { .val = callback_isr }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_PS2_CONFIG); + } +#endif + compiler_barrier(); + return z_impl_ps2_config(dev, callback_isr); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define ps2_config(dev, callback_isr) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_PS2_CONFIG, ps2_config, dev, callback_isr); syscall__retval = ps2_config(dev, callback_isr); sys_port_trace_syscall_exit(K_SYSCALL_PS2_CONFIG, ps2_config, dev, callback_isr, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_ps2_write(const struct device * dev, uint8_t value); + +__pinned_func +static inline int ps2_write(const struct device * dev, uint8_t value) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint8_t val; } parm1 = { .val = value }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_PS2_WRITE); + } +#endif + compiler_barrier(); + return z_impl_ps2_write(dev, value); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define ps2_write(dev, value) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_PS2_WRITE, ps2_write, dev, value); syscall__retval = ps2_write(dev, value); sys_port_trace_syscall_exit(K_SYSCALL_PS2_WRITE, ps2_write, dev, value, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_ps2_read(const struct device * dev, uint8_t * value); + +__pinned_func +static inline int ps2_read(const struct device * dev, uint8_t * value) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint8_t * val; } parm1 = { .val = value }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_PS2_READ); + } +#endif + compiler_barrier(); + return z_impl_ps2_read(dev, value); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define ps2_read(dev, value) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_PS2_READ, ps2_read, dev, value); syscall__retval = ps2_read(dev, value); sys_port_trace_syscall_exit(K_SYSCALL_PS2_READ, ps2_read, dev, value, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_ps2_enable_callback(const struct device * dev); + +__pinned_func +static inline int ps2_enable_callback(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_PS2_ENABLE_CALLBACK); + } +#endif + compiler_barrier(); + return z_impl_ps2_enable_callback(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define ps2_enable_callback(dev) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_PS2_ENABLE_CALLBACK, ps2_enable_callback, dev); syscall__retval = ps2_enable_callback(dev); sys_port_trace_syscall_exit(K_SYSCALL_PS2_ENABLE_CALLBACK, ps2_enable_callback, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_ps2_disable_callback(const struct device * dev); + +__pinned_func +static inline int ps2_disable_callback(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_PS2_DISABLE_CALLBACK); + } +#endif + compiler_barrier(); + return z_impl_ps2_disable_callback(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define ps2_disable_callback(dev) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_PS2_DISABLE_CALLBACK, ps2_disable_callback, dev); syscall__retval = ps2_disable_callback(dev); sys_port_trace_syscall_exit(K_SYSCALL_PS2_DISABLE_CALLBACK, ps2_disable_callback, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/ptp_clock.h b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/ptp_clock.h new file mode 100644 index 0000000..c852ef2 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/ptp_clock.h @@ -0,0 +1,52 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_PTP_CLOCK_H +#define Z_INCLUDE_SYSCALLS_PTP_CLOCK_H + + +#include <zephyr/tracing/tracing_syscall.h> + +#ifndef _ASMLANGUAGE + +#include <stdarg.h> + +#include <syscall_list.h> +#include <zephyr/syscall.h> + +#include <zephyr/linker/sections.h> + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_ptp_clock_get(const struct device * dev, struct net_ptp_time * tm); + +__pinned_func +static inline int ptp_clock_get(const struct device * dev, struct net_ptp_time * tm) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; struct net_ptp_time * val; } parm1 = { .val = tm }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_PTP_CLOCK_GET); + } +#endif + compiler_barrier(); + return z_impl_ptp_clock_get(dev, tm); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define ptp_clock_get(dev, tm) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_PTP_CLOCK_GET, ptp_clock_get, dev, tm); syscall__retval = ptp_clock_get(dev, tm); sys_port_trace_syscall_exit(K_SYSCALL_PTP_CLOCK_GET, ptp_clock_get, dev, tm, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/pwm.h b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/pwm.h new file mode 100644 index 0000000..5c27060 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/pwm.h @@ -0,0 +1,160 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_PWM_H +#define Z_INCLUDE_SYSCALLS_PWM_H + + +#include <zephyr/tracing/tracing_syscall.h> + +#ifndef _ASMLANGUAGE + +#include <stdarg.h> + +#include <syscall_list.h> +#include <zephyr/syscall.h> + +#include <zephyr/linker/sections.h> + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_pwm_set_cycles(const struct device * dev, uint32_t channel, uint32_t period, uint32_t pulse, pwm_flags_t flags); + +__pinned_func +static inline int pwm_set_cycles(const struct device * dev, uint32_t channel, uint32_t period, uint32_t pulse, pwm_flags_t flags) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = channel }; + union { uintptr_t x; uint32_t val; } parm2 = { .val = period }; + union { uintptr_t x; uint32_t val; } parm3 = { .val = pulse }; + union { uintptr_t x; pwm_flags_t val; } parm4 = { .val = flags }; + return (int) arch_syscall_invoke5(parm0.x, parm1.x, parm2.x, parm3.x, parm4.x, K_SYSCALL_PWM_SET_CYCLES); + } +#endif + compiler_barrier(); + return z_impl_pwm_set_cycles(dev, channel, period, pulse, flags); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define pwm_set_cycles(dev, channel, period, pulse, flags) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_PWM_SET_CYCLES, pwm_set_cycles, dev, channel, period, pulse, flags); syscall__retval = pwm_set_cycles(dev, channel, period, pulse, flags); sys_port_trace_syscall_exit(K_SYSCALL_PWM_SET_CYCLES, pwm_set_cycles, dev, channel, period, pulse, flags, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_pwm_get_cycles_per_sec(const struct device * dev, uint32_t channel, uint64_t * cycles); + +__pinned_func +static inline int pwm_get_cycles_per_sec(const struct device * dev, uint32_t channel, uint64_t * cycles) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = channel }; + union { uintptr_t x; uint64_t * val; } parm2 = { .val = cycles }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_PWM_GET_CYCLES_PER_SEC); + } +#endif + compiler_barrier(); + return z_impl_pwm_get_cycles_per_sec(dev, channel, cycles); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define pwm_get_cycles_per_sec(dev, channel, cycles) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_PWM_GET_CYCLES_PER_SEC, pwm_get_cycles_per_sec, dev, channel, cycles); syscall__retval = pwm_get_cycles_per_sec(dev, channel, cycles); sys_port_trace_syscall_exit(K_SYSCALL_PWM_GET_CYCLES_PER_SEC, pwm_get_cycles_per_sec, dev, channel, cycles, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_pwm_enable_capture(const struct device * dev, uint32_t channel); + +__pinned_func +static inline int pwm_enable_capture(const struct device * dev, uint32_t channel) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = channel }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_PWM_ENABLE_CAPTURE); + } +#endif + compiler_barrier(); + return z_impl_pwm_enable_capture(dev, channel); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define pwm_enable_capture(dev, channel) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_PWM_ENABLE_CAPTURE, pwm_enable_capture, dev, channel); syscall__retval = pwm_enable_capture(dev, channel); sys_port_trace_syscall_exit(K_SYSCALL_PWM_ENABLE_CAPTURE, pwm_enable_capture, dev, channel, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_pwm_disable_capture(const struct device * dev, uint32_t channel); + +__pinned_func +static inline int pwm_disable_capture(const struct device * dev, uint32_t channel) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = channel }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_PWM_DISABLE_CAPTURE); + } +#endif + compiler_barrier(); + return z_impl_pwm_disable_capture(dev, channel); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define pwm_disable_capture(dev, channel) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_PWM_DISABLE_CAPTURE, pwm_disable_capture, dev, channel); syscall__retval = pwm_disable_capture(dev, channel); sys_port_trace_syscall_exit(K_SYSCALL_PWM_DISABLE_CAPTURE, pwm_disable_capture, dev, channel, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_pwm_capture_cycles(const struct device * dev, uint32_t channel, pwm_flags_t flags, uint32_t * period, uint32_t * pulse, k_timeout_t timeout); + +__pinned_func +static inline int pwm_capture_cycles(const struct device * dev, uint32_t channel, pwm_flags_t flags, uint32_t * period, uint32_t * pulse, k_timeout_t timeout) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = channel }; + union { uintptr_t x; pwm_flags_t val; } parm2 = { .val = flags }; + union { uintptr_t x; uint32_t * val; } parm3 = { .val = period }; + union { uintptr_t x; uint32_t * val; } parm4 = { .val = pulse }; + union { struct { uintptr_t lo, hi; } split; k_timeout_t val; } parm5 = { .val = timeout }; + uintptr_t more[] = { + parm5.split.lo, + parm5.split.hi + }; + return (int) arch_syscall_invoke6(parm0.x, parm1.x, parm2.x, parm3.x, parm4.x, (uintptr_t) &more, K_SYSCALL_PWM_CAPTURE_CYCLES); + } +#endif + compiler_barrier(); + return z_impl_pwm_capture_cycles(dev, channel, flags, period, pulse, timeout); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define pwm_capture_cycles(dev, channel, flags, period, pulse, timeout) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_PWM_CAPTURE_CYCLES, pwm_capture_cycles, dev, channel, flags, period, pulse, timeout); syscall__retval = pwm_capture_cycles(dev, channel, flags, period, pulse, timeout); sys_port_trace_syscall_exit(K_SYSCALL_PWM_CAPTURE_CYCLES, pwm_capture_cycles, dev, channel, flags, period, pulse, timeout, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/random.h b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/random.h new file mode 100644 index 0000000..839bd2f --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/random.h @@ -0,0 +1,77 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_RANDOM_H +#define Z_INCLUDE_SYSCALLS_RANDOM_H + + +#include <zephyr/tracing/tracing_syscall.h> + +#ifndef _ASMLANGUAGE + +#include <stdarg.h> + +#include <syscall_list.h> +#include <zephyr/syscall.h> + +#include <zephyr/linker/sections.h> + + +#ifdef __cplusplus +extern "C" { +#endif + +extern void z_impl_sys_rand_get(void * dst, size_t len); + +__pinned_func +static inline void sys_rand_get(void * dst, size_t len) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; void * val; } parm0 = { .val = dst }; + union { uintptr_t x; size_t val; } parm1 = { .val = len }; + (void) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_SYS_RAND_GET); + return; + } +#endif + compiler_barrier(); + z_impl_sys_rand_get(dst, len); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define sys_rand_get(dst, len) do { sys_port_trace_syscall_enter(K_SYSCALL_SYS_RAND_GET, sys_rand_get, dst, len); sys_rand_get(dst, len); sys_port_trace_syscall_exit(K_SYSCALL_SYS_RAND_GET, sys_rand_get, dst, len); } while(false) +#endif +#endif + + +extern int z_impl_sys_csrand_get(void * dst, size_t len); + +__pinned_func +static inline int sys_csrand_get(void * dst, size_t len) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; void * val; } parm0 = { .val = dst }; + union { uintptr_t x; size_t val; } parm1 = { .val = len }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_SYS_CSRAND_GET); + } +#endif + compiler_barrier(); + return z_impl_sys_csrand_get(dst, len); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define sys_csrand_get(dst, len) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SYS_CSRAND_GET, sys_csrand_get, dst, len); syscall__retval = sys_csrand_get(dst, len); sys_port_trace_syscall_exit(K_SYSCALL_SYS_CSRAND_GET, sys_csrand_get, dst, len, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/reset.h b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/reset.h new file mode 100644 index 0000000..4da372c --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/reset.h @@ -0,0 +1,125 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_RESET_H +#define Z_INCLUDE_SYSCALLS_RESET_H + + +#include <zephyr/tracing/tracing_syscall.h> + +#ifndef _ASMLANGUAGE + +#include <stdarg.h> + +#include <syscall_list.h> +#include <zephyr/syscall.h> + +#include <zephyr/linker/sections.h> + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_reset_status(const struct device * dev, uint32_t id, uint8_t * status); + +__pinned_func +static inline int reset_status(const struct device * dev, uint32_t id, uint8_t * status) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = id }; + union { uintptr_t x; uint8_t * val; } parm2 = { .val = status }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_RESET_STATUS); + } +#endif + compiler_barrier(); + return z_impl_reset_status(dev, id, status); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define reset_status(dev, id, status) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_RESET_STATUS, reset_status, dev, id, status); syscall__retval = reset_status(dev, id, status); sys_port_trace_syscall_exit(K_SYSCALL_RESET_STATUS, reset_status, dev, id, status, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_reset_line_assert(const struct device * dev, uint32_t id); + +__pinned_func +static inline int reset_line_assert(const struct device * dev, uint32_t id) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = id }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_RESET_LINE_ASSERT); + } +#endif + compiler_barrier(); + return z_impl_reset_line_assert(dev, id); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define reset_line_assert(dev, id) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_RESET_LINE_ASSERT, reset_line_assert, dev, id); syscall__retval = reset_line_assert(dev, id); sys_port_trace_syscall_exit(K_SYSCALL_RESET_LINE_ASSERT, reset_line_assert, dev, id, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_reset_line_deassert(const struct device * dev, uint32_t id); + +__pinned_func +static inline int reset_line_deassert(const struct device * dev, uint32_t id) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = id }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_RESET_LINE_DEASSERT); + } +#endif + compiler_barrier(); + return z_impl_reset_line_deassert(dev, id); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define reset_line_deassert(dev, id) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_RESET_LINE_DEASSERT, reset_line_deassert, dev, id); syscall__retval = reset_line_deassert(dev, id); sys_port_trace_syscall_exit(K_SYSCALL_RESET_LINE_DEASSERT, reset_line_deassert, dev, id, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_reset_line_toggle(const struct device * dev, uint32_t id); + +__pinned_func +static inline int reset_line_toggle(const struct device * dev, uint32_t id) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = id }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_RESET_LINE_TOGGLE); + } +#endif + compiler_barrier(); + return z_impl_reset_line_toggle(dev, id); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define reset_line_toggle(dev, id) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_RESET_LINE_TOGGLE, reset_line_toggle, dev, id); syscall__retval = reset_line_toggle(dev, id); sys_port_trace_syscall_exit(K_SYSCALL_RESET_LINE_TOGGLE, reset_line_toggle, dev, id, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/retained_mem.h b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/retained_mem.h new file mode 100644 index 0000000..5495846 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/retained_mem.h @@ -0,0 +1,126 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_RETAINED_MEM_H +#define Z_INCLUDE_SYSCALLS_RETAINED_MEM_H + + +#include <zephyr/tracing/tracing_syscall.h> + +#ifndef _ASMLANGUAGE + +#include <stdarg.h> + +#include <syscall_list.h> +#include <zephyr/syscall.h> + +#include <zephyr/linker/sections.h> + + +#ifdef __cplusplus +extern "C" { +#endif + +extern ssize_t z_impl_retained_mem_size(const struct device * dev); + +__pinned_func +static inline ssize_t retained_mem_size(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (ssize_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_RETAINED_MEM_SIZE); + } +#endif + compiler_barrier(); + return z_impl_retained_mem_size(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define retained_mem_size(dev) ({ ssize_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_RETAINED_MEM_SIZE, retained_mem_size, dev); syscall__retval = retained_mem_size(dev); sys_port_trace_syscall_exit(K_SYSCALL_RETAINED_MEM_SIZE, retained_mem_size, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_retained_mem_read(const struct device * dev, off_t offset, uint8_t * buffer, size_t size); + +__pinned_func +static inline int retained_mem_read(const struct device * dev, off_t offset, uint8_t * buffer, size_t size) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; off_t val; } parm1 = { .val = offset }; + union { uintptr_t x; uint8_t * val; } parm2 = { .val = buffer }; + union { uintptr_t x; size_t val; } parm3 = { .val = size }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_RETAINED_MEM_READ); + } +#endif + compiler_barrier(); + return z_impl_retained_mem_read(dev, offset, buffer, size); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define retained_mem_read(dev, offset, buffer, size) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_RETAINED_MEM_READ, retained_mem_read, dev, offset, buffer, size); syscall__retval = retained_mem_read(dev, offset, buffer, size); sys_port_trace_syscall_exit(K_SYSCALL_RETAINED_MEM_READ, retained_mem_read, dev, offset, buffer, size, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_retained_mem_write(const struct device * dev, off_t offset, const uint8_t * buffer, size_t size); + +__pinned_func +static inline int retained_mem_write(const struct device * dev, off_t offset, const uint8_t * buffer, size_t size) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; off_t val; } parm1 = { .val = offset }; + union { uintptr_t x; const uint8_t * val; } parm2 = { .val = buffer }; + union { uintptr_t x; size_t val; } parm3 = { .val = size }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_RETAINED_MEM_WRITE); + } +#endif + compiler_barrier(); + return z_impl_retained_mem_write(dev, offset, buffer, size); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define retained_mem_write(dev, offset, buffer, size) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_RETAINED_MEM_WRITE, retained_mem_write, dev, offset, buffer, size); syscall__retval = retained_mem_write(dev, offset, buffer, size); sys_port_trace_syscall_exit(K_SYSCALL_RETAINED_MEM_WRITE, retained_mem_write, dev, offset, buffer, size, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_retained_mem_clear(const struct device * dev); + +__pinned_func +static inline int retained_mem_clear(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_RETAINED_MEM_CLEAR); + } +#endif + compiler_barrier(); + return z_impl_retained_mem_clear(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define retained_mem_clear(dev) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_RETAINED_MEM_CLEAR, retained_mem_clear, dev); syscall__retval = retained_mem_clear(dev); sys_port_trace_syscall_exit(K_SYSCALL_RETAINED_MEM_CLEAR, retained_mem_clear, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/rtc.h b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/rtc.h new file mode 100644 index 0000000..038f1b7 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/rtc.h @@ -0,0 +1,276 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_RTC_H +#define Z_INCLUDE_SYSCALLS_RTC_H + + +#include <zephyr/tracing/tracing_syscall.h> + +#ifndef _ASMLANGUAGE + +#include <stdarg.h> + +#include <syscall_list.h> +#include <zephyr/syscall.h> + +#include <zephyr/linker/sections.h> + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_rtc_set_time(const struct device * dev, const struct rtc_time * timeptr); + +__pinned_func +static inline int rtc_set_time(const struct device * dev, const struct rtc_time * timeptr) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; const struct rtc_time * val; } parm1 = { .val = timeptr }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_RTC_SET_TIME); + } +#endif + compiler_barrier(); + return z_impl_rtc_set_time(dev, timeptr); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define rtc_set_time(dev, timeptr) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_RTC_SET_TIME, rtc_set_time, dev, timeptr); syscall__retval = rtc_set_time(dev, timeptr); sys_port_trace_syscall_exit(K_SYSCALL_RTC_SET_TIME, rtc_set_time, dev, timeptr, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_rtc_get_time(const struct device * dev, struct rtc_time * timeptr); + +__pinned_func +static inline int rtc_get_time(const struct device * dev, struct rtc_time * timeptr) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; struct rtc_time * val; } parm1 = { .val = timeptr }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_RTC_GET_TIME); + } +#endif + compiler_barrier(); + return z_impl_rtc_get_time(dev, timeptr); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define rtc_get_time(dev, timeptr) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_RTC_GET_TIME, rtc_get_time, dev, timeptr); syscall__retval = rtc_get_time(dev, timeptr); sys_port_trace_syscall_exit(K_SYSCALL_RTC_GET_TIME, rtc_get_time, dev, timeptr, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_rtc_alarm_get_supported_fields(const struct device * dev, uint16_t id, uint16_t * mask); + +__pinned_func +static inline int rtc_alarm_get_supported_fields(const struct device * dev, uint16_t id, uint16_t * mask) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint16_t val; } parm1 = { .val = id }; + union { uintptr_t x; uint16_t * val; } parm2 = { .val = mask }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_RTC_ALARM_GET_SUPPORTED_FIELDS); + } +#endif + compiler_barrier(); + return z_impl_rtc_alarm_get_supported_fields(dev, id, mask); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define rtc_alarm_get_supported_fields(dev, id, mask) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_RTC_ALARM_GET_SUPPORTED_FIELDS, rtc_alarm_get_supported_fields, dev, id, mask); syscall__retval = rtc_alarm_get_supported_fields(dev, id, mask); sys_port_trace_syscall_exit(K_SYSCALL_RTC_ALARM_GET_SUPPORTED_FIELDS, rtc_alarm_get_supported_fields, dev, id, mask, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_rtc_alarm_set_time(const struct device * dev, uint16_t id, uint16_t mask, const struct rtc_time * timeptr); + +__pinned_func +static inline int rtc_alarm_set_time(const struct device * dev, uint16_t id, uint16_t mask, const struct rtc_time * timeptr) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint16_t val; } parm1 = { .val = id }; + union { uintptr_t x; uint16_t val; } parm2 = { .val = mask }; + union { uintptr_t x; const struct rtc_time * val; } parm3 = { .val = timeptr }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_RTC_ALARM_SET_TIME); + } +#endif + compiler_barrier(); + return z_impl_rtc_alarm_set_time(dev, id, mask, timeptr); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define rtc_alarm_set_time(dev, id, mask, timeptr) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_RTC_ALARM_SET_TIME, rtc_alarm_set_time, dev, id, mask, timeptr); syscall__retval = rtc_alarm_set_time(dev, id, mask, timeptr); sys_port_trace_syscall_exit(K_SYSCALL_RTC_ALARM_SET_TIME, rtc_alarm_set_time, dev, id, mask, timeptr, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_rtc_alarm_get_time(const struct device * dev, uint16_t id, uint16_t * mask, struct rtc_time * timeptr); + +__pinned_func +static inline int rtc_alarm_get_time(const struct device * dev, uint16_t id, uint16_t * mask, struct rtc_time * timeptr) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint16_t val; } parm1 = { .val = id }; + union { uintptr_t x; uint16_t * val; } parm2 = { .val = mask }; + union { uintptr_t x; struct rtc_time * val; } parm3 = { .val = timeptr }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_RTC_ALARM_GET_TIME); + } +#endif + compiler_barrier(); + return z_impl_rtc_alarm_get_time(dev, id, mask, timeptr); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define rtc_alarm_get_time(dev, id, mask, timeptr) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_RTC_ALARM_GET_TIME, rtc_alarm_get_time, dev, id, mask, timeptr); syscall__retval = rtc_alarm_get_time(dev, id, mask, timeptr); sys_port_trace_syscall_exit(K_SYSCALL_RTC_ALARM_GET_TIME, rtc_alarm_get_time, dev, id, mask, timeptr, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_rtc_alarm_is_pending(const struct device * dev, uint16_t id); + +__pinned_func +static inline int rtc_alarm_is_pending(const struct device * dev, uint16_t id) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint16_t val; } parm1 = { .val = id }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_RTC_ALARM_IS_PENDING); + } +#endif + compiler_barrier(); + return z_impl_rtc_alarm_is_pending(dev, id); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define rtc_alarm_is_pending(dev, id) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_RTC_ALARM_IS_PENDING, rtc_alarm_is_pending, dev, id); syscall__retval = rtc_alarm_is_pending(dev, id); sys_port_trace_syscall_exit(K_SYSCALL_RTC_ALARM_IS_PENDING, rtc_alarm_is_pending, dev, id, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_rtc_alarm_set_callback(const struct device * dev, uint16_t id, rtc_alarm_callback callback, void * user_data); + +__pinned_func +static inline int rtc_alarm_set_callback(const struct device * dev, uint16_t id, rtc_alarm_callback callback, void * user_data) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint16_t val; } parm1 = { .val = id }; + union { uintptr_t x; rtc_alarm_callback val; } parm2 = { .val = callback }; + union { uintptr_t x; void * val; } parm3 = { .val = user_data }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_RTC_ALARM_SET_CALLBACK); + } +#endif + compiler_barrier(); + return z_impl_rtc_alarm_set_callback(dev, id, callback, user_data); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define rtc_alarm_set_callback(dev, id, callback, user_data) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_RTC_ALARM_SET_CALLBACK, rtc_alarm_set_callback, dev, id, callback, user_data); syscall__retval = rtc_alarm_set_callback(dev, id, callback, user_data); sys_port_trace_syscall_exit(K_SYSCALL_RTC_ALARM_SET_CALLBACK, rtc_alarm_set_callback, dev, id, callback, user_data, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_rtc_update_set_callback(const struct device * dev, rtc_update_callback callback, void * user_data); + +__pinned_func +static inline int rtc_update_set_callback(const struct device * dev, rtc_update_callback callback, void * user_data) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; rtc_update_callback val; } parm1 = { .val = callback }; + union { uintptr_t x; void * val; } parm2 = { .val = user_data }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_RTC_UPDATE_SET_CALLBACK); + } +#endif + compiler_barrier(); + return z_impl_rtc_update_set_callback(dev, callback, user_data); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define rtc_update_set_callback(dev, callback, user_data) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_RTC_UPDATE_SET_CALLBACK, rtc_update_set_callback, dev, callback, user_data); syscall__retval = rtc_update_set_callback(dev, callback, user_data); sys_port_trace_syscall_exit(K_SYSCALL_RTC_UPDATE_SET_CALLBACK, rtc_update_set_callback, dev, callback, user_data, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_rtc_set_calibration(const struct device * dev, int32_t calibration); + +__pinned_func +static inline int rtc_set_calibration(const struct device * dev, int32_t calibration) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; int32_t val; } parm1 = { .val = calibration }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_RTC_SET_CALIBRATION); + } +#endif + compiler_barrier(); + return z_impl_rtc_set_calibration(dev, calibration); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define rtc_set_calibration(dev, calibration) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_RTC_SET_CALIBRATION, rtc_set_calibration, dev, calibration); syscall__retval = rtc_set_calibration(dev, calibration); sys_port_trace_syscall_exit(K_SYSCALL_RTC_SET_CALIBRATION, rtc_set_calibration, dev, calibration, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_rtc_get_calibration(const struct device * dev, int32_t * calibration); + +__pinned_func +static inline int rtc_get_calibration(const struct device * dev, int32_t * calibration) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; int32_t * val; } parm1 = { .val = calibration }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_RTC_GET_CALIBRATION); + } +#endif + compiler_barrier(); + return z_impl_rtc_get_calibration(dev, calibration); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define rtc_get_calibration(dev, calibration) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_RTC_GET_CALIBRATION, rtc_get_calibration, dev, calibration); syscall__retval = rtc_get_calibration(dev, calibration); sys_port_trace_syscall_exit(K_SYSCALL_RTC_GET_CALIBRATION, rtc_get_calibration, dev, calibration, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/rtio.h b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/rtio.h new file mode 100644 index 0000000..2f53a5f --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/rtio.h @@ -0,0 +1,179 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_RTIO_H +#define Z_INCLUDE_SYSCALLS_RTIO_H + + +#include <zephyr/tracing/tracing_syscall.h> + +#ifndef _ASMLANGUAGE + +#include <stdarg.h> + +#include <syscall_list.h> +#include <zephyr/syscall.h> + +#include <zephyr/linker/sections.h> + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_rtio_cqe_get_mempool_buffer(const struct rtio * r, struct rtio_cqe * cqe, uint8_t ** buff, uint32_t * buff_len); + +__pinned_func +static inline int rtio_cqe_get_mempool_buffer(const struct rtio * r, struct rtio_cqe * cqe, uint8_t ** buff, uint32_t * buff_len) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct rtio * val; } parm0 = { .val = r }; + union { uintptr_t x; struct rtio_cqe * val; } parm1 = { .val = cqe }; + union { uintptr_t x; uint8_t ** val; } parm2 = { .val = buff }; + union { uintptr_t x; uint32_t * val; } parm3 = { .val = buff_len }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_RTIO_CQE_GET_MEMPOOL_BUFFER); + } +#endif + compiler_barrier(); + return z_impl_rtio_cqe_get_mempool_buffer(r, cqe, buff, buff_len); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define rtio_cqe_get_mempool_buffer(r, cqe, buff, buff_len) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_RTIO_CQE_GET_MEMPOOL_BUFFER, rtio_cqe_get_mempool_buffer, r, cqe, buff, buff_len); syscall__retval = rtio_cqe_get_mempool_buffer(r, cqe, buff, buff_len); sys_port_trace_syscall_exit(K_SYSCALL_RTIO_CQE_GET_MEMPOOL_BUFFER, rtio_cqe_get_mempool_buffer, r, cqe, buff, buff_len, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern void z_impl_rtio_release_buffer(struct rtio * r, void * buff, uint32_t buff_len); + +__pinned_func +static inline void rtio_release_buffer(struct rtio * r, void * buff, uint32_t buff_len) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct rtio * val; } parm0 = { .val = r }; + union { uintptr_t x; void * val; } parm1 = { .val = buff }; + union { uintptr_t x; uint32_t val; } parm2 = { .val = buff_len }; + (void) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_RTIO_RELEASE_BUFFER); + return; + } +#endif + compiler_barrier(); + z_impl_rtio_release_buffer(r, buff, buff_len); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define rtio_release_buffer(r, buff, buff_len) do { sys_port_trace_syscall_enter(K_SYSCALL_RTIO_RELEASE_BUFFER, rtio_release_buffer, r, buff, buff_len); rtio_release_buffer(r, buff, buff_len); sys_port_trace_syscall_exit(K_SYSCALL_RTIO_RELEASE_BUFFER, rtio_release_buffer, r, buff, buff_len); } while(false) +#endif +#endif + + +extern int z_impl_rtio_sqe_cancel(struct rtio_sqe * sqe); + +__pinned_func +static inline int rtio_sqe_cancel(struct rtio_sqe * sqe) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct rtio_sqe * val; } parm0 = { .val = sqe }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_RTIO_SQE_CANCEL); + } +#endif + compiler_barrier(); + return z_impl_rtio_sqe_cancel(sqe); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define rtio_sqe_cancel(sqe) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_RTIO_SQE_CANCEL, rtio_sqe_cancel, sqe); syscall__retval = rtio_sqe_cancel(sqe); sys_port_trace_syscall_exit(K_SYSCALL_RTIO_SQE_CANCEL, rtio_sqe_cancel, sqe, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_rtio_sqe_copy_in_get_handles(struct rtio * r, const struct rtio_sqe * sqes, struct rtio_sqe ** handle, size_t sqe_count); + +__pinned_func +static inline int rtio_sqe_copy_in_get_handles(struct rtio * r, const struct rtio_sqe * sqes, struct rtio_sqe ** handle, size_t sqe_count) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct rtio * val; } parm0 = { .val = r }; + union { uintptr_t x; const struct rtio_sqe * val; } parm1 = { .val = sqes }; + union { uintptr_t x; struct rtio_sqe ** val; } parm2 = { .val = handle }; + union { uintptr_t x; size_t val; } parm3 = { .val = sqe_count }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_RTIO_SQE_COPY_IN_GET_HANDLES); + } +#endif + compiler_barrier(); + return z_impl_rtio_sqe_copy_in_get_handles(r, sqes, handle, sqe_count); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define rtio_sqe_copy_in_get_handles(r, sqes, handle, sqe_count) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_RTIO_SQE_COPY_IN_GET_HANDLES, rtio_sqe_copy_in_get_handles, r, sqes, handle, sqe_count); syscall__retval = rtio_sqe_copy_in_get_handles(r, sqes, handle, sqe_count); sys_port_trace_syscall_exit(K_SYSCALL_RTIO_SQE_COPY_IN_GET_HANDLES, rtio_sqe_copy_in_get_handles, r, sqes, handle, sqe_count, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_rtio_cqe_copy_out(struct rtio * r, struct rtio_cqe * cqes, size_t cqe_count, k_timeout_t timeout); + +__pinned_func +static inline int rtio_cqe_copy_out(struct rtio * r, struct rtio_cqe * cqes, size_t cqe_count, k_timeout_t timeout) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct rtio * val; } parm0 = { .val = r }; + union { uintptr_t x; struct rtio_cqe * val; } parm1 = { .val = cqes }; + union { uintptr_t x; size_t val; } parm2 = { .val = cqe_count }; + union { struct { uintptr_t lo, hi; } split; k_timeout_t val; } parm3 = { .val = timeout }; + return (int) arch_syscall_invoke5(parm0.x, parm1.x, parm2.x, parm3.split.lo, parm3.split.hi, K_SYSCALL_RTIO_CQE_COPY_OUT); + } +#endif + compiler_barrier(); + return z_impl_rtio_cqe_copy_out(r, cqes, cqe_count, timeout); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define rtio_cqe_copy_out(r, cqes, cqe_count, timeout) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_RTIO_CQE_COPY_OUT, rtio_cqe_copy_out, r, cqes, cqe_count, timeout); syscall__retval = rtio_cqe_copy_out(r, cqes, cqe_count, timeout); sys_port_trace_syscall_exit(K_SYSCALL_RTIO_CQE_COPY_OUT, rtio_cqe_copy_out, r, cqes, cqe_count, timeout, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_rtio_submit(struct rtio * r, uint32_t wait_count); + +__pinned_func +static inline int rtio_submit(struct rtio * r, uint32_t wait_count) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct rtio * val; } parm0 = { .val = r }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = wait_count }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_RTIO_SUBMIT); + } +#endif + compiler_barrier(); + return z_impl_rtio_submit(r, wait_count); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define rtio_submit(r, wait_count) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_RTIO_SUBMIT, rtio_submit, r, wait_count); syscall__retval = rtio_submit(r, wait_count); sys_port_trace_syscall_exit(K_SYSCALL_RTIO_SUBMIT, rtio_submit, r, wait_count, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/sdhc.h b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/sdhc.h new file mode 100644 index 0000000..fe27319 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/sdhc.h @@ -0,0 +1,243 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_SDHC_H +#define Z_INCLUDE_SYSCALLS_SDHC_H + + +#include <zephyr/tracing/tracing_syscall.h> + +#ifndef _ASMLANGUAGE + +#include <stdarg.h> + +#include <syscall_list.h> +#include <zephyr/syscall.h> + +#include <zephyr/linker/sections.h> + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_sdhc_hw_reset(const struct device * dev); + +__pinned_func +static inline int sdhc_hw_reset(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_SDHC_HW_RESET); + } +#endif + compiler_barrier(); + return z_impl_sdhc_hw_reset(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define sdhc_hw_reset(dev) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SDHC_HW_RESET, sdhc_hw_reset, dev); syscall__retval = sdhc_hw_reset(dev); sys_port_trace_syscall_exit(K_SYSCALL_SDHC_HW_RESET, sdhc_hw_reset, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_sdhc_request(const struct device * dev, struct sdhc_command * cmd, struct sdhc_data * data); + +__pinned_func +static inline int sdhc_request(const struct device * dev, struct sdhc_command * cmd, struct sdhc_data * data) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; struct sdhc_command * val; } parm1 = { .val = cmd }; + union { uintptr_t x; struct sdhc_data * val; } parm2 = { .val = data }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_SDHC_REQUEST); + } +#endif + compiler_barrier(); + return z_impl_sdhc_request(dev, cmd, data); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define sdhc_request(dev, cmd, data) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SDHC_REQUEST, sdhc_request, dev, cmd, data); syscall__retval = sdhc_request(dev, cmd, data); sys_port_trace_syscall_exit(K_SYSCALL_SDHC_REQUEST, sdhc_request, dev, cmd, data, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_sdhc_set_io(const struct device * dev, struct sdhc_io * io); + +__pinned_func +static inline int sdhc_set_io(const struct device * dev, struct sdhc_io * io) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; struct sdhc_io * val; } parm1 = { .val = io }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_SDHC_SET_IO); + } +#endif + compiler_barrier(); + return z_impl_sdhc_set_io(dev, io); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define sdhc_set_io(dev, io) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SDHC_SET_IO, sdhc_set_io, dev, io); syscall__retval = sdhc_set_io(dev, io); sys_port_trace_syscall_exit(K_SYSCALL_SDHC_SET_IO, sdhc_set_io, dev, io, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_sdhc_card_present(const struct device * dev); + +__pinned_func +static inline int sdhc_card_present(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_SDHC_CARD_PRESENT); + } +#endif + compiler_barrier(); + return z_impl_sdhc_card_present(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define sdhc_card_present(dev) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SDHC_CARD_PRESENT, sdhc_card_present, dev); syscall__retval = sdhc_card_present(dev); sys_port_trace_syscall_exit(K_SYSCALL_SDHC_CARD_PRESENT, sdhc_card_present, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_sdhc_execute_tuning(const struct device * dev); + +__pinned_func +static inline int sdhc_execute_tuning(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_SDHC_EXECUTE_TUNING); + } +#endif + compiler_barrier(); + return z_impl_sdhc_execute_tuning(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define sdhc_execute_tuning(dev) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SDHC_EXECUTE_TUNING, sdhc_execute_tuning, dev); syscall__retval = sdhc_execute_tuning(dev); sys_port_trace_syscall_exit(K_SYSCALL_SDHC_EXECUTE_TUNING, sdhc_execute_tuning, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_sdhc_card_busy(const struct device * dev); + +__pinned_func +static inline int sdhc_card_busy(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_SDHC_CARD_BUSY); + } +#endif + compiler_barrier(); + return z_impl_sdhc_card_busy(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define sdhc_card_busy(dev) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SDHC_CARD_BUSY, sdhc_card_busy, dev); syscall__retval = sdhc_card_busy(dev); sys_port_trace_syscall_exit(K_SYSCALL_SDHC_CARD_BUSY, sdhc_card_busy, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_sdhc_get_host_props(const struct device * dev, struct sdhc_host_props * props); + +__pinned_func +static inline int sdhc_get_host_props(const struct device * dev, struct sdhc_host_props * props) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; struct sdhc_host_props * val; } parm1 = { .val = props }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_SDHC_GET_HOST_PROPS); + } +#endif + compiler_barrier(); + return z_impl_sdhc_get_host_props(dev, props); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define sdhc_get_host_props(dev, props) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SDHC_GET_HOST_PROPS, sdhc_get_host_props, dev, props); syscall__retval = sdhc_get_host_props(dev, props); sys_port_trace_syscall_exit(K_SYSCALL_SDHC_GET_HOST_PROPS, sdhc_get_host_props, dev, props, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_sdhc_enable_interrupt(const struct device * dev, sdhc_interrupt_cb_t callback, int sources, void * user_data); + +__pinned_func +static inline int sdhc_enable_interrupt(const struct device * dev, sdhc_interrupt_cb_t callback, int sources, void * user_data) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; sdhc_interrupt_cb_t val; } parm1 = { .val = callback }; + union { uintptr_t x; int val; } parm2 = { .val = sources }; + union { uintptr_t x; void * val; } parm3 = { .val = user_data }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_SDHC_ENABLE_INTERRUPT); + } +#endif + compiler_barrier(); + return z_impl_sdhc_enable_interrupt(dev, callback, sources, user_data); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define sdhc_enable_interrupt(dev, callback, sources, user_data) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SDHC_ENABLE_INTERRUPT, sdhc_enable_interrupt, dev, callback, sources, user_data); syscall__retval = sdhc_enable_interrupt(dev, callback, sources, user_data); sys_port_trace_syscall_exit(K_SYSCALL_SDHC_ENABLE_INTERRUPT, sdhc_enable_interrupt, dev, callback, sources, user_data, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_sdhc_disable_interrupt(const struct device * dev, int sources); + +__pinned_func +static inline int sdhc_disable_interrupt(const struct device * dev, int sources) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; int val; } parm1 = { .val = sources }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_SDHC_DISABLE_INTERRUPT); + } +#endif + compiler_barrier(); + return z_impl_sdhc_disable_interrupt(dev, sources); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define sdhc_disable_interrupt(dev, sources) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SDHC_DISABLE_INTERRUPT, sdhc_disable_interrupt, dev, sources); syscall__retval = sdhc_disable_interrupt(dev, sources); sys_port_trace_syscall_exit(K_SYSCALL_SDHC_DISABLE_INTERRUPT, sdhc_disable_interrupt, dev, sources, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/sensor.h b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/sensor.h new file mode 100644 index 0000000..0837868 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/sensor.h @@ -0,0 +1,202 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_SENSOR_H +#define Z_INCLUDE_SYSCALLS_SENSOR_H + + +#include <zephyr/tracing/tracing_syscall.h> + +#ifndef _ASMLANGUAGE + +#include <stdarg.h> + +#include <syscall_list.h> +#include <zephyr/syscall.h> + +#include <zephyr/linker/sections.h> + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_sensor_attr_set(const struct device * dev, enum sensor_channel chan, enum sensor_attribute attr, const struct sensor_value * val); + +__pinned_func +static inline int sensor_attr_set(const struct device * dev, enum sensor_channel chan, enum sensor_attribute attr, const struct sensor_value * val) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; enum sensor_channel val; } parm1 = { .val = chan }; + union { uintptr_t x; enum sensor_attribute val; } parm2 = { .val = attr }; + union { uintptr_t x; const struct sensor_value * val; } parm3 = { .val = val }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_SENSOR_ATTR_SET); + } +#endif + compiler_barrier(); + return z_impl_sensor_attr_set(dev, chan, attr, val); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define sensor_attr_set(dev, chan, attr, val) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SENSOR_ATTR_SET, sensor_attr_set, dev, chan, attr, val); syscall__retval = sensor_attr_set(dev, chan, attr, val); sys_port_trace_syscall_exit(K_SYSCALL_SENSOR_ATTR_SET, sensor_attr_set, dev, chan, attr, val, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_sensor_attr_get(const struct device * dev, enum sensor_channel chan, enum sensor_attribute attr, struct sensor_value * val); + +__pinned_func +static inline int sensor_attr_get(const struct device * dev, enum sensor_channel chan, enum sensor_attribute attr, struct sensor_value * val) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; enum sensor_channel val; } parm1 = { .val = chan }; + union { uintptr_t x; enum sensor_attribute val; } parm2 = { .val = attr }; + union { uintptr_t x; struct sensor_value * val; } parm3 = { .val = val }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_SENSOR_ATTR_GET); + } +#endif + compiler_barrier(); + return z_impl_sensor_attr_get(dev, chan, attr, val); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define sensor_attr_get(dev, chan, attr, val) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SENSOR_ATTR_GET, sensor_attr_get, dev, chan, attr, val); syscall__retval = sensor_attr_get(dev, chan, attr, val); sys_port_trace_syscall_exit(K_SYSCALL_SENSOR_ATTR_GET, sensor_attr_get, dev, chan, attr, val, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_sensor_sample_fetch(const struct device * dev); + +__pinned_func +static inline int sensor_sample_fetch(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_SENSOR_SAMPLE_FETCH); + } +#endif + compiler_barrier(); + return z_impl_sensor_sample_fetch(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define sensor_sample_fetch(dev) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SENSOR_SAMPLE_FETCH, sensor_sample_fetch, dev); syscall__retval = sensor_sample_fetch(dev); sys_port_trace_syscall_exit(K_SYSCALL_SENSOR_SAMPLE_FETCH, sensor_sample_fetch, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_sensor_sample_fetch_chan(const struct device * dev, enum sensor_channel type); + +__pinned_func +static inline int sensor_sample_fetch_chan(const struct device * dev, enum sensor_channel type) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; enum sensor_channel val; } parm1 = { .val = type }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_SENSOR_SAMPLE_FETCH_CHAN); + } +#endif + compiler_barrier(); + return z_impl_sensor_sample_fetch_chan(dev, type); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define sensor_sample_fetch_chan(dev, type) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SENSOR_SAMPLE_FETCH_CHAN, sensor_sample_fetch_chan, dev, type); syscall__retval = sensor_sample_fetch_chan(dev, type); sys_port_trace_syscall_exit(K_SYSCALL_SENSOR_SAMPLE_FETCH_CHAN, sensor_sample_fetch_chan, dev, type, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_sensor_channel_get(const struct device * dev, enum sensor_channel chan, struct sensor_value * val); + +__pinned_func +static inline int sensor_channel_get(const struct device * dev, enum sensor_channel chan, struct sensor_value * val) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; enum sensor_channel val; } parm1 = { .val = chan }; + union { uintptr_t x; struct sensor_value * val; } parm2 = { .val = val }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_SENSOR_CHANNEL_GET); + } +#endif + compiler_barrier(); + return z_impl_sensor_channel_get(dev, chan, val); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define sensor_channel_get(dev, chan, val) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SENSOR_CHANNEL_GET, sensor_channel_get, dev, chan, val); syscall__retval = sensor_channel_get(dev, chan, val); sys_port_trace_syscall_exit(K_SYSCALL_SENSOR_CHANNEL_GET, sensor_channel_get, dev, chan, val, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_sensor_get_decoder(const struct device * dev, const struct sensor_decoder_api ** decoder); + +__pinned_func +static inline int sensor_get_decoder(const struct device * dev, const struct sensor_decoder_api ** decoder) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; const struct sensor_decoder_api ** val; } parm1 = { .val = decoder }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_SENSOR_GET_DECODER); + } +#endif + compiler_barrier(); + return z_impl_sensor_get_decoder(dev, decoder); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define sensor_get_decoder(dev, decoder) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SENSOR_GET_DECODER, sensor_get_decoder, dev, decoder); syscall__retval = sensor_get_decoder(dev, decoder); sys_port_trace_syscall_exit(K_SYSCALL_SENSOR_GET_DECODER, sensor_get_decoder, dev, decoder, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_sensor_reconfigure_read_iodev(struct rtio_iodev * iodev, const struct device * sensor, const struct sensor_chan_spec * channels, size_t num_channels); + +__pinned_func +static inline int sensor_reconfigure_read_iodev(struct rtio_iodev * iodev, const struct device * sensor, const struct sensor_chan_spec * channels, size_t num_channels) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct rtio_iodev * val; } parm0 = { .val = iodev }; + union { uintptr_t x; const struct device * val; } parm1 = { .val = sensor }; + union { uintptr_t x; const struct sensor_chan_spec * val; } parm2 = { .val = channels }; + union { uintptr_t x; size_t val; } parm3 = { .val = num_channels }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_SENSOR_RECONFIGURE_READ_IODEV); + } +#endif + compiler_barrier(); + return z_impl_sensor_reconfigure_read_iodev(iodev, sensor, channels, num_channels); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define sensor_reconfigure_read_iodev(iodev, sensor, channels, num_channels) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SENSOR_RECONFIGURE_READ_IODEV, sensor_reconfigure_read_iodev, iodev, sensor, channels, num_channels); syscall__retval = sensor_reconfigure_read_iodev(iodev, sensor, channels, num_channels); sys_port_trace_syscall_exit(K_SYSCALL_SENSOR_RECONFIGURE_READ_IODEV, sensor_reconfigure_read_iodev, iodev, sensor, channels, num_channels, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/sip_svc_driver.h b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/sip_svc_driver.h new file mode 100644 index 0000000..e4004ed --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/sip_svc_driver.h @@ -0,0 +1,285 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_SIP_SVC_DRIVER_H +#define Z_INCLUDE_SYSCALLS_SIP_SVC_DRIVER_H + + +#include <zephyr/tracing/tracing_syscall.h> + +#ifndef _ASMLANGUAGE + +#include <stdarg.h> + +#include <syscall_list.h> +#include <zephyr/syscall.h> + +#include <zephyr/linker/sections.h> + + +#ifdef __cplusplus +extern "C" { +#endif + +extern void z_impl_sip_supervisory_call(const struct device * dev, unsigned long function_id, unsigned long arg0, unsigned long arg1, unsigned long arg2, unsigned long arg3, unsigned long arg4, unsigned long arg5, unsigned long arg6, struct arm_smccc_res * res); + +__pinned_func +static inline void sip_supervisory_call(const struct device * dev, unsigned long function_id, unsigned long arg0, unsigned long arg1, unsigned long arg2, unsigned long arg3, unsigned long arg4, unsigned long arg5, unsigned long arg6, struct arm_smccc_res * res) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; unsigned long val; } parm1 = { .val = function_id }; + union { uintptr_t x; unsigned long val; } parm2 = { .val = arg0 }; + union { uintptr_t x; unsigned long val; } parm3 = { .val = arg1 }; + union { uintptr_t x; unsigned long val; } parm4 = { .val = arg2 }; + union { uintptr_t x; unsigned long val; } parm5 = { .val = arg3 }; + union { uintptr_t x; unsigned long val; } parm6 = { .val = arg4 }; + union { uintptr_t x; unsigned long val; } parm7 = { .val = arg5 }; + union { uintptr_t x; unsigned long val; } parm8 = { .val = arg6 }; + union { uintptr_t x; struct arm_smccc_res * val; } parm9 = { .val = res }; + uintptr_t more[] = { + parm5.x, + parm6.x, + parm7.x, + parm8.x, + parm9.x + }; + (void) arch_syscall_invoke6(parm0.x, parm1.x, parm2.x, parm3.x, parm4.x, (uintptr_t) &more, K_SYSCALL_SIP_SUPERVISORY_CALL); + return; + } +#endif + compiler_barrier(); + z_impl_sip_supervisory_call(dev, function_id, arg0, arg1, arg2, arg3, arg4, arg5, arg6, res); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define sip_supervisory_call(dev, function_id, arg0, arg1, arg2, arg3, arg4, arg5, arg6, res) do { sys_port_trace_syscall_enter(K_SYSCALL_SIP_SUPERVISORY_CALL, sip_supervisory_call, dev, function_id, arg0, arg1, arg2, arg3, arg4, arg5, arg6, res); sip_supervisory_call(dev, function_id, arg0, arg1, arg2, arg3, arg4, arg5, arg6, res); sys_port_trace_syscall_exit(K_SYSCALL_SIP_SUPERVISORY_CALL, sip_supervisory_call, dev, function_id, arg0, arg1, arg2, arg3, arg4, arg5, arg6, res); } while(false) +#endif +#endif + + +extern bool z_impl_sip_svc_plat_func_id_valid(const struct device * dev, uint32_t command, uint32_t func_id); + +__pinned_func +static inline bool sip_svc_plat_func_id_valid(const struct device * dev, uint32_t command, uint32_t func_id) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = command }; + union { uintptr_t x; uint32_t val; } parm2 = { .val = func_id }; + return (bool) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_SIP_SVC_PLAT_FUNC_ID_VALID); + } +#endif + compiler_barrier(); + return z_impl_sip_svc_plat_func_id_valid(dev, command, func_id); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define sip_svc_plat_func_id_valid(dev, command, func_id) ({ bool syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SIP_SVC_PLAT_FUNC_ID_VALID, sip_svc_plat_func_id_valid, dev, command, func_id); syscall__retval = sip_svc_plat_func_id_valid(dev, command, func_id); sys_port_trace_syscall_exit(K_SYSCALL_SIP_SVC_PLAT_FUNC_ID_VALID, sip_svc_plat_func_id_valid, dev, command, func_id, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern uint32_t z_impl_sip_svc_plat_format_trans_id(const struct device * dev, uint32_t client_idx, uint32_t trans_idx); + +__pinned_func +static inline uint32_t sip_svc_plat_format_trans_id(const struct device * dev, uint32_t client_idx, uint32_t trans_idx) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = client_idx }; + union { uintptr_t x; uint32_t val; } parm2 = { .val = trans_idx }; + return (uint32_t) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_SIP_SVC_PLAT_FORMAT_TRANS_ID); + } +#endif + compiler_barrier(); + return z_impl_sip_svc_plat_format_trans_id(dev, client_idx, trans_idx); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define sip_svc_plat_format_trans_id(dev, client_idx, trans_idx) ({ uint32_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SIP_SVC_PLAT_FORMAT_TRANS_ID, sip_svc_plat_format_trans_id, dev, client_idx, trans_idx); syscall__retval = sip_svc_plat_format_trans_id(dev, client_idx, trans_idx); sys_port_trace_syscall_exit(K_SYSCALL_SIP_SVC_PLAT_FORMAT_TRANS_ID, sip_svc_plat_format_trans_id, dev, client_idx, trans_idx, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern uint32_t z_impl_sip_svc_plat_get_trans_idx(const struct device * dev, uint32_t trans_id); + +__pinned_func +static inline uint32_t sip_svc_plat_get_trans_idx(const struct device * dev, uint32_t trans_id) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = trans_id }; + return (uint32_t) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_SIP_SVC_PLAT_GET_TRANS_IDX); + } +#endif + compiler_barrier(); + return z_impl_sip_svc_plat_get_trans_idx(dev, trans_id); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define sip_svc_plat_get_trans_idx(dev, trans_id) ({ uint32_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SIP_SVC_PLAT_GET_TRANS_IDX, sip_svc_plat_get_trans_idx, dev, trans_id); syscall__retval = sip_svc_plat_get_trans_idx(dev, trans_id); sys_port_trace_syscall_exit(K_SYSCALL_SIP_SVC_PLAT_GET_TRANS_IDX, sip_svc_plat_get_trans_idx, dev, trans_id, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern void z_impl_sip_svc_plat_update_trans_id(const struct device * dev, struct sip_svc_request * request, uint32_t trans_id); + +__pinned_func +static inline void sip_svc_plat_update_trans_id(const struct device * dev, struct sip_svc_request * request, uint32_t trans_id) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; struct sip_svc_request * val; } parm1 = { .val = request }; + union { uintptr_t x; uint32_t val; } parm2 = { .val = trans_id }; + (void) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_SIP_SVC_PLAT_UPDATE_TRANS_ID); + return; + } +#endif + compiler_barrier(); + z_impl_sip_svc_plat_update_trans_id(dev, request, trans_id); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define sip_svc_plat_update_trans_id(dev, request, trans_id) do { sys_port_trace_syscall_enter(K_SYSCALL_SIP_SVC_PLAT_UPDATE_TRANS_ID, sip_svc_plat_update_trans_id, dev, request, trans_id); sip_svc_plat_update_trans_id(dev, request, trans_id); sys_port_trace_syscall_exit(K_SYSCALL_SIP_SVC_PLAT_UPDATE_TRANS_ID, sip_svc_plat_update_trans_id, dev, request, trans_id); } while(false) +#endif +#endif + + +extern uint32_t z_impl_sip_svc_plat_get_error_code(const struct device * dev, struct arm_smccc_res * res); + +__pinned_func +static inline uint32_t sip_svc_plat_get_error_code(const struct device * dev, struct arm_smccc_res * res) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; struct arm_smccc_res * val; } parm1 = { .val = res }; + return (uint32_t) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_SIP_SVC_PLAT_GET_ERROR_CODE); + } +#endif + compiler_barrier(); + return z_impl_sip_svc_plat_get_error_code(dev, res); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define sip_svc_plat_get_error_code(dev, res) ({ uint32_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SIP_SVC_PLAT_GET_ERROR_CODE, sip_svc_plat_get_error_code, dev, res); syscall__retval = sip_svc_plat_get_error_code(dev, res); sys_port_trace_syscall_exit(K_SYSCALL_SIP_SVC_PLAT_GET_ERROR_CODE, sip_svc_plat_get_error_code, dev, res, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_sip_svc_plat_async_res_req(const struct device * dev, unsigned long * a0, unsigned long * a1, unsigned long * a2, unsigned long * a3, unsigned long * a4, unsigned long * a5, unsigned long * a6, unsigned long * a7, char * buf, size_t size); + +__pinned_func +static inline int sip_svc_plat_async_res_req(const struct device * dev, unsigned long * a0, unsigned long * a1, unsigned long * a2, unsigned long * a3, unsigned long * a4, unsigned long * a5, unsigned long * a6, unsigned long * a7, char * buf, size_t size) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; unsigned long * val; } parm1 = { .val = a0 }; + union { uintptr_t x; unsigned long * val; } parm2 = { .val = a1 }; + union { uintptr_t x; unsigned long * val; } parm3 = { .val = a2 }; + union { uintptr_t x; unsigned long * val; } parm4 = { .val = a3 }; + union { uintptr_t x; unsigned long * val; } parm5 = { .val = a4 }; + union { uintptr_t x; unsigned long * val; } parm6 = { .val = a5 }; + union { uintptr_t x; unsigned long * val; } parm7 = { .val = a6 }; + union { uintptr_t x; unsigned long * val; } parm8 = { .val = a7 }; + union { uintptr_t x; char * val; } parm9 = { .val = buf }; + union { uintptr_t x; size_t val; } parm10 = { .val = size }; + uintptr_t more[] = { + parm5.x, + parm6.x, + parm7.x, + parm8.x, + parm9.x, + parm10.x + }; + return (int) arch_syscall_invoke6(parm0.x, parm1.x, parm2.x, parm3.x, parm4.x, (uintptr_t) &more, K_SYSCALL_SIP_SVC_PLAT_ASYNC_RES_REQ); + } +#endif + compiler_barrier(); + return z_impl_sip_svc_plat_async_res_req(dev, a0, a1, a2, a3, a4, a5, a6, a7, buf, size); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define sip_svc_plat_async_res_req(dev, a0, a1, a2, a3, a4, a5, a6, a7, buf, size) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SIP_SVC_PLAT_ASYNC_RES_REQ, sip_svc_plat_async_res_req, dev, a0, a1, a2, a3, a4, a5, a6, a7, buf, size); syscall__retval = sip_svc_plat_async_res_req(dev, a0, a1, a2, a3, a4, a5, a6, a7, buf, size); sys_port_trace_syscall_exit(K_SYSCALL_SIP_SVC_PLAT_ASYNC_RES_REQ, sip_svc_plat_async_res_req, dev, a0, a1, a2, a3, a4, a5, a6, a7, buf, size, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_sip_svc_plat_async_res_res(const struct device * dev, struct arm_smccc_res * res, char * buf, size_t * size, uint32_t * trans_id); + +__pinned_func +static inline int sip_svc_plat_async_res_res(const struct device * dev, struct arm_smccc_res * res, char * buf, size_t * size, uint32_t * trans_id) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; struct arm_smccc_res * val; } parm1 = { .val = res }; + union { uintptr_t x; char * val; } parm2 = { .val = buf }; + union { uintptr_t x; size_t * val; } parm3 = { .val = size }; + union { uintptr_t x; uint32_t * val; } parm4 = { .val = trans_id }; + return (int) arch_syscall_invoke5(parm0.x, parm1.x, parm2.x, parm3.x, parm4.x, K_SYSCALL_SIP_SVC_PLAT_ASYNC_RES_RES); + } +#endif + compiler_barrier(); + return z_impl_sip_svc_plat_async_res_res(dev, res, buf, size, trans_id); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define sip_svc_plat_async_res_res(dev, res, buf, size, trans_id) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SIP_SVC_PLAT_ASYNC_RES_RES, sip_svc_plat_async_res_res, dev, res, buf, size, trans_id); syscall__retval = sip_svc_plat_async_res_res(dev, res, buf, size, trans_id); sys_port_trace_syscall_exit(K_SYSCALL_SIP_SVC_PLAT_ASYNC_RES_RES, sip_svc_plat_async_res_res, dev, res, buf, size, trans_id, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern void z_impl_sip_svc_plat_free_async_memory(const struct device * dev, struct sip_svc_request * request); + +__pinned_func +static inline void sip_svc_plat_free_async_memory(const struct device * dev, struct sip_svc_request * request) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; struct sip_svc_request * val; } parm1 = { .val = request }; + (void) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_SIP_SVC_PLAT_FREE_ASYNC_MEMORY); + return; + } +#endif + compiler_barrier(); + z_impl_sip_svc_plat_free_async_memory(dev, request); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define sip_svc_plat_free_async_memory(dev, request) do { sys_port_trace_syscall_enter(K_SYSCALL_SIP_SVC_PLAT_FREE_ASYNC_MEMORY, sip_svc_plat_free_async_memory, dev, request); sip_svc_plat_free_async_memory(dev, request); sys_port_trace_syscall_exit(K_SYSCALL_SIP_SVC_PLAT_FREE_ASYNC_MEMORY, sip_svc_plat_free_async_memory, dev, request); } while(false) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/smbus.h b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/smbus.h new file mode 100644 index 0000000..9fbabbd --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/smbus.h @@ -0,0 +1,417 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_SMBUS_H +#define Z_INCLUDE_SYSCALLS_SMBUS_H + + +#include <zephyr/tracing/tracing_syscall.h> + +#ifndef _ASMLANGUAGE + +#include <stdarg.h> + +#include <syscall_list.h> +#include <zephyr/syscall.h> + +#include <zephyr/linker/sections.h> + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_smbus_configure(const struct device * dev, uint32_t dev_config); + +__pinned_func +static inline int smbus_configure(const struct device * dev, uint32_t dev_config) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = dev_config }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_SMBUS_CONFIGURE); + } +#endif + compiler_barrier(); + return z_impl_smbus_configure(dev, dev_config); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define smbus_configure(dev, dev_config) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SMBUS_CONFIGURE, smbus_configure, dev, dev_config); syscall__retval = smbus_configure(dev, dev_config); sys_port_trace_syscall_exit(K_SYSCALL_SMBUS_CONFIGURE, smbus_configure, dev, dev_config, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_smbus_get_config(const struct device * dev, uint32_t * dev_config); + +__pinned_func +static inline int smbus_get_config(const struct device * dev, uint32_t * dev_config) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t * val; } parm1 = { .val = dev_config }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_SMBUS_GET_CONFIG); + } +#endif + compiler_barrier(); + return z_impl_smbus_get_config(dev, dev_config); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define smbus_get_config(dev, dev_config) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SMBUS_GET_CONFIG, smbus_get_config, dev, dev_config); syscall__retval = smbus_get_config(dev, dev_config); sys_port_trace_syscall_exit(K_SYSCALL_SMBUS_GET_CONFIG, smbus_get_config, dev, dev_config, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_smbus_smbalert_remove_cb(const struct device * dev, struct smbus_callback * cb); + +__pinned_func +static inline int smbus_smbalert_remove_cb(const struct device * dev, struct smbus_callback * cb) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; struct smbus_callback * val; } parm1 = { .val = cb }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_SMBUS_SMBALERT_REMOVE_CB); + } +#endif + compiler_barrier(); + return z_impl_smbus_smbalert_remove_cb(dev, cb); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define smbus_smbalert_remove_cb(dev, cb) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SMBUS_SMBALERT_REMOVE_CB, smbus_smbalert_remove_cb, dev, cb); syscall__retval = smbus_smbalert_remove_cb(dev, cb); sys_port_trace_syscall_exit(K_SYSCALL_SMBUS_SMBALERT_REMOVE_CB, smbus_smbalert_remove_cb, dev, cb, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_smbus_host_notify_remove_cb(const struct device * dev, struct smbus_callback * cb); + +__pinned_func +static inline int smbus_host_notify_remove_cb(const struct device * dev, struct smbus_callback * cb) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; struct smbus_callback * val; } parm1 = { .val = cb }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_SMBUS_HOST_NOTIFY_REMOVE_CB); + } +#endif + compiler_barrier(); + return z_impl_smbus_host_notify_remove_cb(dev, cb); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define smbus_host_notify_remove_cb(dev, cb) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SMBUS_HOST_NOTIFY_REMOVE_CB, smbus_host_notify_remove_cb, dev, cb); syscall__retval = smbus_host_notify_remove_cb(dev, cb); sys_port_trace_syscall_exit(K_SYSCALL_SMBUS_HOST_NOTIFY_REMOVE_CB, smbus_host_notify_remove_cb, dev, cb, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_smbus_quick(const struct device * dev, uint16_t addr, enum smbus_direction direction); + +__pinned_func +static inline int smbus_quick(const struct device * dev, uint16_t addr, enum smbus_direction direction) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint16_t val; } parm1 = { .val = addr }; + union { uintptr_t x; enum smbus_direction val; } parm2 = { .val = direction }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_SMBUS_QUICK); + } +#endif + compiler_barrier(); + return z_impl_smbus_quick(dev, addr, direction); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define smbus_quick(dev, addr, direction) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SMBUS_QUICK, smbus_quick, dev, addr, direction); syscall__retval = smbus_quick(dev, addr, direction); sys_port_trace_syscall_exit(K_SYSCALL_SMBUS_QUICK, smbus_quick, dev, addr, direction, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_smbus_byte_write(const struct device * dev, uint16_t addr, uint8_t byte); + +__pinned_func +static inline int smbus_byte_write(const struct device * dev, uint16_t addr, uint8_t byte) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint16_t val; } parm1 = { .val = addr }; + union { uintptr_t x; uint8_t val; } parm2 = { .val = byte }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_SMBUS_BYTE_WRITE); + } +#endif + compiler_barrier(); + return z_impl_smbus_byte_write(dev, addr, byte); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define smbus_byte_write(dev, addr, byte) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SMBUS_BYTE_WRITE, smbus_byte_write, dev, addr, byte); syscall__retval = smbus_byte_write(dev, addr, byte); sys_port_trace_syscall_exit(K_SYSCALL_SMBUS_BYTE_WRITE, smbus_byte_write, dev, addr, byte, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_smbus_byte_read(const struct device * dev, uint16_t addr, uint8_t * byte); + +__pinned_func +static inline int smbus_byte_read(const struct device * dev, uint16_t addr, uint8_t * byte) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint16_t val; } parm1 = { .val = addr }; + union { uintptr_t x; uint8_t * val; } parm2 = { .val = byte }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_SMBUS_BYTE_READ); + } +#endif + compiler_barrier(); + return z_impl_smbus_byte_read(dev, addr, byte); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define smbus_byte_read(dev, addr, byte) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SMBUS_BYTE_READ, smbus_byte_read, dev, addr, byte); syscall__retval = smbus_byte_read(dev, addr, byte); sys_port_trace_syscall_exit(K_SYSCALL_SMBUS_BYTE_READ, smbus_byte_read, dev, addr, byte, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_smbus_byte_data_write(const struct device * dev, uint16_t addr, uint8_t cmd, uint8_t byte); + +__pinned_func +static inline int smbus_byte_data_write(const struct device * dev, uint16_t addr, uint8_t cmd, uint8_t byte) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint16_t val; } parm1 = { .val = addr }; + union { uintptr_t x; uint8_t val; } parm2 = { .val = cmd }; + union { uintptr_t x; uint8_t val; } parm3 = { .val = byte }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_SMBUS_BYTE_DATA_WRITE); + } +#endif + compiler_barrier(); + return z_impl_smbus_byte_data_write(dev, addr, cmd, byte); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define smbus_byte_data_write(dev, addr, cmd, byte) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SMBUS_BYTE_DATA_WRITE, smbus_byte_data_write, dev, addr, cmd, byte); syscall__retval = smbus_byte_data_write(dev, addr, cmd, byte); sys_port_trace_syscall_exit(K_SYSCALL_SMBUS_BYTE_DATA_WRITE, smbus_byte_data_write, dev, addr, cmd, byte, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_smbus_byte_data_read(const struct device * dev, uint16_t addr, uint8_t cmd, uint8_t * byte); + +__pinned_func +static inline int smbus_byte_data_read(const struct device * dev, uint16_t addr, uint8_t cmd, uint8_t * byte) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint16_t val; } parm1 = { .val = addr }; + union { uintptr_t x; uint8_t val; } parm2 = { .val = cmd }; + union { uintptr_t x; uint8_t * val; } parm3 = { .val = byte }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_SMBUS_BYTE_DATA_READ); + } +#endif + compiler_barrier(); + return z_impl_smbus_byte_data_read(dev, addr, cmd, byte); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define smbus_byte_data_read(dev, addr, cmd, byte) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SMBUS_BYTE_DATA_READ, smbus_byte_data_read, dev, addr, cmd, byte); syscall__retval = smbus_byte_data_read(dev, addr, cmd, byte); sys_port_trace_syscall_exit(K_SYSCALL_SMBUS_BYTE_DATA_READ, smbus_byte_data_read, dev, addr, cmd, byte, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_smbus_word_data_write(const struct device * dev, uint16_t addr, uint8_t cmd, uint16_t word); + +__pinned_func +static inline int smbus_word_data_write(const struct device * dev, uint16_t addr, uint8_t cmd, uint16_t word) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint16_t val; } parm1 = { .val = addr }; + union { uintptr_t x; uint8_t val; } parm2 = { .val = cmd }; + union { uintptr_t x; uint16_t val; } parm3 = { .val = word }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_SMBUS_WORD_DATA_WRITE); + } +#endif + compiler_barrier(); + return z_impl_smbus_word_data_write(dev, addr, cmd, word); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define smbus_word_data_write(dev, addr, cmd, word) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SMBUS_WORD_DATA_WRITE, smbus_word_data_write, dev, addr, cmd, word); syscall__retval = smbus_word_data_write(dev, addr, cmd, word); sys_port_trace_syscall_exit(K_SYSCALL_SMBUS_WORD_DATA_WRITE, smbus_word_data_write, dev, addr, cmd, word, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_smbus_word_data_read(const struct device * dev, uint16_t addr, uint8_t cmd, uint16_t * word); + +__pinned_func +static inline int smbus_word_data_read(const struct device * dev, uint16_t addr, uint8_t cmd, uint16_t * word) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint16_t val; } parm1 = { .val = addr }; + union { uintptr_t x; uint8_t val; } parm2 = { .val = cmd }; + union { uintptr_t x; uint16_t * val; } parm3 = { .val = word }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_SMBUS_WORD_DATA_READ); + } +#endif + compiler_barrier(); + return z_impl_smbus_word_data_read(dev, addr, cmd, word); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define smbus_word_data_read(dev, addr, cmd, word) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SMBUS_WORD_DATA_READ, smbus_word_data_read, dev, addr, cmd, word); syscall__retval = smbus_word_data_read(dev, addr, cmd, word); sys_port_trace_syscall_exit(K_SYSCALL_SMBUS_WORD_DATA_READ, smbus_word_data_read, dev, addr, cmd, word, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_smbus_pcall(const struct device * dev, uint16_t addr, uint8_t cmd, uint16_t send_word, uint16_t * recv_word); + +__pinned_func +static inline int smbus_pcall(const struct device * dev, uint16_t addr, uint8_t cmd, uint16_t send_word, uint16_t * recv_word) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint16_t val; } parm1 = { .val = addr }; + union { uintptr_t x; uint8_t val; } parm2 = { .val = cmd }; + union { uintptr_t x; uint16_t val; } parm3 = { .val = send_word }; + union { uintptr_t x; uint16_t * val; } parm4 = { .val = recv_word }; + return (int) arch_syscall_invoke5(parm0.x, parm1.x, parm2.x, parm3.x, parm4.x, K_SYSCALL_SMBUS_PCALL); + } +#endif + compiler_barrier(); + return z_impl_smbus_pcall(dev, addr, cmd, send_word, recv_word); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define smbus_pcall(dev, addr, cmd, send_word, recv_word) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SMBUS_PCALL, smbus_pcall, dev, addr, cmd, send_word, recv_word); syscall__retval = smbus_pcall(dev, addr, cmd, send_word, recv_word); sys_port_trace_syscall_exit(K_SYSCALL_SMBUS_PCALL, smbus_pcall, dev, addr, cmd, send_word, recv_word, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_smbus_block_write(const struct device * dev, uint16_t addr, uint8_t cmd, uint8_t count, uint8_t * buf); + +__pinned_func +static inline int smbus_block_write(const struct device * dev, uint16_t addr, uint8_t cmd, uint8_t count, uint8_t * buf) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint16_t val; } parm1 = { .val = addr }; + union { uintptr_t x; uint8_t val; } parm2 = { .val = cmd }; + union { uintptr_t x; uint8_t val; } parm3 = { .val = count }; + union { uintptr_t x; uint8_t * val; } parm4 = { .val = buf }; + return (int) arch_syscall_invoke5(parm0.x, parm1.x, parm2.x, parm3.x, parm4.x, K_SYSCALL_SMBUS_BLOCK_WRITE); + } +#endif + compiler_barrier(); + return z_impl_smbus_block_write(dev, addr, cmd, count, buf); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define smbus_block_write(dev, addr, cmd, count, buf) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SMBUS_BLOCK_WRITE, smbus_block_write, dev, addr, cmd, count, buf); syscall__retval = smbus_block_write(dev, addr, cmd, count, buf); sys_port_trace_syscall_exit(K_SYSCALL_SMBUS_BLOCK_WRITE, smbus_block_write, dev, addr, cmd, count, buf, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_smbus_block_read(const struct device * dev, uint16_t addr, uint8_t cmd, uint8_t * count, uint8_t * buf); + +__pinned_func +static inline int smbus_block_read(const struct device * dev, uint16_t addr, uint8_t cmd, uint8_t * count, uint8_t * buf) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint16_t val; } parm1 = { .val = addr }; + union { uintptr_t x; uint8_t val; } parm2 = { .val = cmd }; + union { uintptr_t x; uint8_t * val; } parm3 = { .val = count }; + union { uintptr_t x; uint8_t * val; } parm4 = { .val = buf }; + return (int) arch_syscall_invoke5(parm0.x, parm1.x, parm2.x, parm3.x, parm4.x, K_SYSCALL_SMBUS_BLOCK_READ); + } +#endif + compiler_barrier(); + return z_impl_smbus_block_read(dev, addr, cmd, count, buf); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define smbus_block_read(dev, addr, cmd, count, buf) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SMBUS_BLOCK_READ, smbus_block_read, dev, addr, cmd, count, buf); syscall__retval = smbus_block_read(dev, addr, cmd, count, buf); sys_port_trace_syscall_exit(K_SYSCALL_SMBUS_BLOCK_READ, smbus_block_read, dev, addr, cmd, count, buf, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_smbus_block_pcall(const struct device * dev, uint16_t addr, uint8_t cmd, uint8_t snd_count, uint8_t * snd_buf, uint8_t * rcv_count, uint8_t * rcv_buf); + +__pinned_func +static inline int smbus_block_pcall(const struct device * dev, uint16_t addr, uint8_t cmd, uint8_t snd_count, uint8_t * snd_buf, uint8_t * rcv_count, uint8_t * rcv_buf) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint16_t val; } parm1 = { .val = addr }; + union { uintptr_t x; uint8_t val; } parm2 = { .val = cmd }; + union { uintptr_t x; uint8_t val; } parm3 = { .val = snd_count }; + union { uintptr_t x; uint8_t * val; } parm4 = { .val = snd_buf }; + union { uintptr_t x; uint8_t * val; } parm5 = { .val = rcv_count }; + union { uintptr_t x; uint8_t * val; } parm6 = { .val = rcv_buf }; + uintptr_t more[] = { + parm5.x, + parm6.x + }; + return (int) arch_syscall_invoke6(parm0.x, parm1.x, parm2.x, parm3.x, parm4.x, (uintptr_t) &more, K_SYSCALL_SMBUS_BLOCK_PCALL); + } +#endif + compiler_barrier(); + return z_impl_smbus_block_pcall(dev, addr, cmd, snd_count, snd_buf, rcv_count, rcv_buf); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define smbus_block_pcall(dev, addr, cmd, snd_count, snd_buf, rcv_count, rcv_buf) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SMBUS_BLOCK_PCALL, smbus_block_pcall, dev, addr, cmd, snd_count, snd_buf, rcv_count, rcv_buf); syscall__retval = smbus_block_pcall(dev, addr, cmd, snd_count, snd_buf, rcv_count, rcv_buf); sys_port_trace_syscall_exit(K_SYSCALL_SMBUS_BLOCK_PCALL, smbus_block_pcall, dev, addr, cmd, snd_count, snd_buf, rcv_count, rcv_buf, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/socket.h b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/socket.h new file mode 100644 index 0000000..3623d3c --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/socket.h @@ -0,0 +1,611 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_SOCKET_H +#define Z_INCLUDE_SYSCALLS_SOCKET_H + + +#include <zephyr/tracing/tracing_syscall.h> + +#ifndef _ASMLANGUAGE + +#include <stdarg.h> + +#include <syscall_list.h> +#include <zephyr/syscall.h> + +#include <zephyr/linker/sections.h> + + +#ifdef __cplusplus +extern "C" { +#endif + +extern void * z_impl_zsock_get_context_object(int sock); + +__pinned_func +static inline void * zsock_get_context_object(int sock) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; int val; } parm0 = { .val = sock }; + return (void *) arch_syscall_invoke1(parm0.x, K_SYSCALL_ZSOCK_GET_CONTEXT_OBJECT); + } +#endif + compiler_barrier(); + return z_impl_zsock_get_context_object(sock); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define zsock_get_context_object(sock) ({ void * syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ZSOCK_GET_CONTEXT_OBJECT, zsock_get_context_object, sock); syscall__retval = zsock_get_context_object(sock); sys_port_trace_syscall_exit(K_SYSCALL_ZSOCK_GET_CONTEXT_OBJECT, zsock_get_context_object, sock, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_zsock_socket(int family, int type, int proto); + +__pinned_func +static inline int zsock_socket(int family, int type, int proto) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; int val; } parm0 = { .val = family }; + union { uintptr_t x; int val; } parm1 = { .val = type }; + union { uintptr_t x; int val; } parm2 = { .val = proto }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_ZSOCK_SOCKET); + } +#endif + compiler_barrier(); + return z_impl_zsock_socket(family, type, proto); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define zsock_socket(family, type, proto) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ZSOCK_SOCKET, zsock_socket, family, type, proto); syscall__retval = zsock_socket(family, type, proto); sys_port_trace_syscall_exit(K_SYSCALL_ZSOCK_SOCKET, zsock_socket, family, type, proto, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_zsock_socketpair(int family, int type, int proto, int * sv); + +__pinned_func +static inline int zsock_socketpair(int family, int type, int proto, int * sv) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; int val; } parm0 = { .val = family }; + union { uintptr_t x; int val; } parm1 = { .val = type }; + union { uintptr_t x; int val; } parm2 = { .val = proto }; + union { uintptr_t x; int * val; } parm3 = { .val = sv }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_ZSOCK_SOCKETPAIR); + } +#endif + compiler_barrier(); + return z_impl_zsock_socketpair(family, type, proto, sv); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define zsock_socketpair(family, type, proto, sv) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ZSOCK_SOCKETPAIR, zsock_socketpair, family, type, proto, sv); syscall__retval = zsock_socketpair(family, type, proto, sv); sys_port_trace_syscall_exit(K_SYSCALL_ZSOCK_SOCKETPAIR, zsock_socketpair, family, type, proto, sv, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_zsock_close(int sock); + +__pinned_func +static inline int zsock_close(int sock) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; int val; } parm0 = { .val = sock }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_ZSOCK_CLOSE); + } +#endif + compiler_barrier(); + return z_impl_zsock_close(sock); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define zsock_close(sock) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ZSOCK_CLOSE, zsock_close, sock); syscall__retval = zsock_close(sock); sys_port_trace_syscall_exit(K_SYSCALL_ZSOCK_CLOSE, zsock_close, sock, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_zsock_shutdown(int sock, int how); + +__pinned_func +static inline int zsock_shutdown(int sock, int how) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; int val; } parm0 = { .val = sock }; + union { uintptr_t x; int val; } parm1 = { .val = how }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_ZSOCK_SHUTDOWN); + } +#endif + compiler_barrier(); + return z_impl_zsock_shutdown(sock, how); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define zsock_shutdown(sock, how) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ZSOCK_SHUTDOWN, zsock_shutdown, sock, how); syscall__retval = zsock_shutdown(sock, how); sys_port_trace_syscall_exit(K_SYSCALL_ZSOCK_SHUTDOWN, zsock_shutdown, sock, how, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_zsock_bind(int sock, const struct sockaddr * addr, socklen_t addrlen); + +__pinned_func +static inline int zsock_bind(int sock, const struct sockaddr * addr, socklen_t addrlen) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; int val; } parm0 = { .val = sock }; + union { uintptr_t x; const struct sockaddr * val; } parm1 = { .val = addr }; + union { uintptr_t x; socklen_t val; } parm2 = { .val = addrlen }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_ZSOCK_BIND); + } +#endif + compiler_barrier(); + return z_impl_zsock_bind(sock, addr, addrlen); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define zsock_bind(sock, addr, addrlen) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ZSOCK_BIND, zsock_bind, sock, addr, addrlen); syscall__retval = zsock_bind(sock, addr, addrlen); sys_port_trace_syscall_exit(K_SYSCALL_ZSOCK_BIND, zsock_bind, sock, addr, addrlen, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_zsock_connect(int sock, const struct sockaddr * addr, socklen_t addrlen); + +__pinned_func +static inline int zsock_connect(int sock, const struct sockaddr * addr, socklen_t addrlen) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; int val; } parm0 = { .val = sock }; + union { uintptr_t x; const struct sockaddr * val; } parm1 = { .val = addr }; + union { uintptr_t x; socklen_t val; } parm2 = { .val = addrlen }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_ZSOCK_CONNECT); + } +#endif + compiler_barrier(); + return z_impl_zsock_connect(sock, addr, addrlen); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define zsock_connect(sock, addr, addrlen) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ZSOCK_CONNECT, zsock_connect, sock, addr, addrlen); syscall__retval = zsock_connect(sock, addr, addrlen); sys_port_trace_syscall_exit(K_SYSCALL_ZSOCK_CONNECT, zsock_connect, sock, addr, addrlen, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_zsock_listen(int sock, int backlog); + +__pinned_func +static inline int zsock_listen(int sock, int backlog) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; int val; } parm0 = { .val = sock }; + union { uintptr_t x; int val; } parm1 = { .val = backlog }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_ZSOCK_LISTEN); + } +#endif + compiler_barrier(); + return z_impl_zsock_listen(sock, backlog); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define zsock_listen(sock, backlog) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ZSOCK_LISTEN, zsock_listen, sock, backlog); syscall__retval = zsock_listen(sock, backlog); sys_port_trace_syscall_exit(K_SYSCALL_ZSOCK_LISTEN, zsock_listen, sock, backlog, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_zsock_accept(int sock, struct sockaddr * addr, socklen_t * addrlen); + +__pinned_func +static inline int zsock_accept(int sock, struct sockaddr * addr, socklen_t * addrlen) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; int val; } parm0 = { .val = sock }; + union { uintptr_t x; struct sockaddr * val; } parm1 = { .val = addr }; + union { uintptr_t x; socklen_t * val; } parm2 = { .val = addrlen }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_ZSOCK_ACCEPT); + } +#endif + compiler_barrier(); + return z_impl_zsock_accept(sock, addr, addrlen); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define zsock_accept(sock, addr, addrlen) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ZSOCK_ACCEPT, zsock_accept, sock, addr, addrlen); syscall__retval = zsock_accept(sock, addr, addrlen); sys_port_trace_syscall_exit(K_SYSCALL_ZSOCK_ACCEPT, zsock_accept, sock, addr, addrlen, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern ssize_t z_impl_zsock_sendto(int sock, const void * buf, size_t len, int flags, const struct sockaddr * dest_addr, socklen_t addrlen); + +__pinned_func +static inline ssize_t zsock_sendto(int sock, const void * buf, size_t len, int flags, const struct sockaddr * dest_addr, socklen_t addrlen) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; int val; } parm0 = { .val = sock }; + union { uintptr_t x; const void * val; } parm1 = { .val = buf }; + union { uintptr_t x; size_t val; } parm2 = { .val = len }; + union { uintptr_t x; int val; } parm3 = { .val = flags }; + union { uintptr_t x; const struct sockaddr * val; } parm4 = { .val = dest_addr }; + union { uintptr_t x; socklen_t val; } parm5 = { .val = addrlen }; + return (ssize_t) arch_syscall_invoke6(parm0.x, parm1.x, parm2.x, parm3.x, parm4.x, parm5.x, K_SYSCALL_ZSOCK_SENDTO); + } +#endif + compiler_barrier(); + return z_impl_zsock_sendto(sock, buf, len, flags, dest_addr, addrlen); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define zsock_sendto(sock, buf, len, flags, dest_addr, addrlen) ({ ssize_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ZSOCK_SENDTO, zsock_sendto, sock, buf, len, flags, dest_addr, addrlen); syscall__retval = zsock_sendto(sock, buf, len, flags, dest_addr, addrlen); sys_port_trace_syscall_exit(K_SYSCALL_ZSOCK_SENDTO, zsock_sendto, sock, buf, len, flags, dest_addr, addrlen, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern ssize_t z_impl_zsock_sendmsg(int sock, const struct msghdr * msg, int flags); + +__pinned_func +static inline ssize_t zsock_sendmsg(int sock, const struct msghdr * msg, int flags) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; int val; } parm0 = { .val = sock }; + union { uintptr_t x; const struct msghdr * val; } parm1 = { .val = msg }; + union { uintptr_t x; int val; } parm2 = { .val = flags }; + return (ssize_t) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_ZSOCK_SENDMSG); + } +#endif + compiler_barrier(); + return z_impl_zsock_sendmsg(sock, msg, flags); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define zsock_sendmsg(sock, msg, flags) ({ ssize_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ZSOCK_SENDMSG, zsock_sendmsg, sock, msg, flags); syscall__retval = zsock_sendmsg(sock, msg, flags); sys_port_trace_syscall_exit(K_SYSCALL_ZSOCK_SENDMSG, zsock_sendmsg, sock, msg, flags, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern ssize_t z_impl_zsock_recvfrom(int sock, void * buf, size_t max_len, int flags, struct sockaddr * src_addr, socklen_t * addrlen); + +__pinned_func +static inline ssize_t zsock_recvfrom(int sock, void * buf, size_t max_len, int flags, struct sockaddr * src_addr, socklen_t * addrlen) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; int val; } parm0 = { .val = sock }; + union { uintptr_t x; void * val; } parm1 = { .val = buf }; + union { uintptr_t x; size_t val; } parm2 = { .val = max_len }; + union { uintptr_t x; int val; } parm3 = { .val = flags }; + union { uintptr_t x; struct sockaddr * val; } parm4 = { .val = src_addr }; + union { uintptr_t x; socklen_t * val; } parm5 = { .val = addrlen }; + return (ssize_t) arch_syscall_invoke6(parm0.x, parm1.x, parm2.x, parm3.x, parm4.x, parm5.x, K_SYSCALL_ZSOCK_RECVFROM); + } +#endif + compiler_barrier(); + return z_impl_zsock_recvfrom(sock, buf, max_len, flags, src_addr, addrlen); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define zsock_recvfrom(sock, buf, max_len, flags, src_addr, addrlen) ({ ssize_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ZSOCK_RECVFROM, zsock_recvfrom, sock, buf, max_len, flags, src_addr, addrlen); syscall__retval = zsock_recvfrom(sock, buf, max_len, flags, src_addr, addrlen); sys_port_trace_syscall_exit(K_SYSCALL_ZSOCK_RECVFROM, zsock_recvfrom, sock, buf, max_len, flags, src_addr, addrlen, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern ssize_t z_impl_zsock_recvmsg(int sock, struct msghdr * msg, int flags); + +__pinned_func +static inline ssize_t zsock_recvmsg(int sock, struct msghdr * msg, int flags) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; int val; } parm0 = { .val = sock }; + union { uintptr_t x; struct msghdr * val; } parm1 = { .val = msg }; + union { uintptr_t x; int val; } parm2 = { .val = flags }; + return (ssize_t) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_ZSOCK_RECVMSG); + } +#endif + compiler_barrier(); + return z_impl_zsock_recvmsg(sock, msg, flags); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define zsock_recvmsg(sock, msg, flags) ({ ssize_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ZSOCK_RECVMSG, zsock_recvmsg, sock, msg, flags); syscall__retval = zsock_recvmsg(sock, msg, flags); sys_port_trace_syscall_exit(K_SYSCALL_ZSOCK_RECVMSG, zsock_recvmsg, sock, msg, flags, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_zsock_fcntl_impl(int sock, int cmd, int flags); + +__pinned_func +static inline int zsock_fcntl_impl(int sock, int cmd, int flags) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; int val; } parm0 = { .val = sock }; + union { uintptr_t x; int val; } parm1 = { .val = cmd }; + union { uintptr_t x; int val; } parm2 = { .val = flags }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_ZSOCK_FCNTL_IMPL); + } +#endif + compiler_barrier(); + return z_impl_zsock_fcntl_impl(sock, cmd, flags); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define zsock_fcntl_impl(sock, cmd, flags) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ZSOCK_FCNTL_IMPL, zsock_fcntl_impl, sock, cmd, flags); syscall__retval = zsock_fcntl_impl(sock, cmd, flags); sys_port_trace_syscall_exit(K_SYSCALL_ZSOCK_FCNTL_IMPL, zsock_fcntl_impl, sock, cmd, flags, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_zsock_ioctl_impl(int sock, unsigned long request, va_list ap); + +__pinned_func +static inline int zsock_ioctl_impl(int sock, unsigned long request, va_list ap) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; int val; } parm0 = { .val = sock }; + union { uintptr_t x; unsigned long val; } parm1 = { .val = request }; + union { uintptr_t x; va_list val; } parm2; + va_copy(parm2.val, ap); + int invoke__retval = arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_ZSOCK_IOCTL_IMPL); + va_end(parm2.val); + return invoke__retval; + } +#endif + compiler_barrier(); + return z_impl_zsock_ioctl_impl(sock, request, ap); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define zsock_ioctl_impl(sock, request, ap) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ZSOCK_IOCTL_IMPL, zsock_ioctl_impl, sock, request, ap); syscall__retval = zsock_ioctl_impl(sock, request, ap); sys_port_trace_syscall_exit(K_SYSCALL_ZSOCK_IOCTL_IMPL, zsock_ioctl_impl, sock, request, ap, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_zsock_poll(struct zsock_pollfd * fds, int nfds, int timeout); + +__pinned_func +static inline int zsock_poll(struct zsock_pollfd * fds, int nfds, int timeout) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; struct zsock_pollfd * val; } parm0 = { .val = fds }; + union { uintptr_t x; int val; } parm1 = { .val = nfds }; + union { uintptr_t x; int val; } parm2 = { .val = timeout }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_ZSOCK_POLL); + } +#endif + compiler_barrier(); + return z_impl_zsock_poll(fds, nfds, timeout); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define zsock_poll(fds, nfds, timeout) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ZSOCK_POLL, zsock_poll, fds, nfds, timeout); syscall__retval = zsock_poll(fds, nfds, timeout); sys_port_trace_syscall_exit(K_SYSCALL_ZSOCK_POLL, zsock_poll, fds, nfds, timeout, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_zsock_getsockopt(int sock, int level, int optname, void * optval, socklen_t * optlen); + +__pinned_func +static inline int zsock_getsockopt(int sock, int level, int optname, void * optval, socklen_t * optlen) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; int val; } parm0 = { .val = sock }; + union { uintptr_t x; int val; } parm1 = { .val = level }; + union { uintptr_t x; int val; } parm2 = { .val = optname }; + union { uintptr_t x; void * val; } parm3 = { .val = optval }; + union { uintptr_t x; socklen_t * val; } parm4 = { .val = optlen }; + return (int) arch_syscall_invoke5(parm0.x, parm1.x, parm2.x, parm3.x, parm4.x, K_SYSCALL_ZSOCK_GETSOCKOPT); + } +#endif + compiler_barrier(); + return z_impl_zsock_getsockopt(sock, level, optname, optval, optlen); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define zsock_getsockopt(sock, level, optname, optval, optlen) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ZSOCK_GETSOCKOPT, zsock_getsockopt, sock, level, optname, optval, optlen); syscall__retval = zsock_getsockopt(sock, level, optname, optval, optlen); sys_port_trace_syscall_exit(K_SYSCALL_ZSOCK_GETSOCKOPT, zsock_getsockopt, sock, level, optname, optval, optlen, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_zsock_setsockopt(int sock, int level, int optname, const void * optval, socklen_t optlen); + +__pinned_func +static inline int zsock_setsockopt(int sock, int level, int optname, const void * optval, socklen_t optlen) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; int val; } parm0 = { .val = sock }; + union { uintptr_t x; int val; } parm1 = { .val = level }; + union { uintptr_t x; int val; } parm2 = { .val = optname }; + union { uintptr_t x; const void * val; } parm3 = { .val = optval }; + union { uintptr_t x; socklen_t val; } parm4 = { .val = optlen }; + return (int) arch_syscall_invoke5(parm0.x, parm1.x, parm2.x, parm3.x, parm4.x, K_SYSCALL_ZSOCK_SETSOCKOPT); + } +#endif + compiler_barrier(); + return z_impl_zsock_setsockopt(sock, level, optname, optval, optlen); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define zsock_setsockopt(sock, level, optname, optval, optlen) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ZSOCK_SETSOCKOPT, zsock_setsockopt, sock, level, optname, optval, optlen); syscall__retval = zsock_setsockopt(sock, level, optname, optval, optlen); sys_port_trace_syscall_exit(K_SYSCALL_ZSOCK_SETSOCKOPT, zsock_setsockopt, sock, level, optname, optval, optlen, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_zsock_getpeername(int sock, struct sockaddr * addr, socklen_t * addrlen); + +__pinned_func +static inline int zsock_getpeername(int sock, struct sockaddr * addr, socklen_t * addrlen) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; int val; } parm0 = { .val = sock }; + union { uintptr_t x; struct sockaddr * val; } parm1 = { .val = addr }; + union { uintptr_t x; socklen_t * val; } parm2 = { .val = addrlen }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_ZSOCK_GETPEERNAME); + } +#endif + compiler_barrier(); + return z_impl_zsock_getpeername(sock, addr, addrlen); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define zsock_getpeername(sock, addr, addrlen) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ZSOCK_GETPEERNAME, zsock_getpeername, sock, addr, addrlen); syscall__retval = zsock_getpeername(sock, addr, addrlen); sys_port_trace_syscall_exit(K_SYSCALL_ZSOCK_GETPEERNAME, zsock_getpeername, sock, addr, addrlen, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_zsock_getsockname(int sock, struct sockaddr * addr, socklen_t * addrlen); + +__pinned_func +static inline int zsock_getsockname(int sock, struct sockaddr * addr, socklen_t * addrlen) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; int val; } parm0 = { .val = sock }; + union { uintptr_t x; struct sockaddr * val; } parm1 = { .val = addr }; + union { uintptr_t x; socklen_t * val; } parm2 = { .val = addrlen }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_ZSOCK_GETSOCKNAME); + } +#endif + compiler_barrier(); + return z_impl_zsock_getsockname(sock, addr, addrlen); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define zsock_getsockname(sock, addr, addrlen) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ZSOCK_GETSOCKNAME, zsock_getsockname, sock, addr, addrlen); syscall__retval = zsock_getsockname(sock, addr, addrlen); sys_port_trace_syscall_exit(K_SYSCALL_ZSOCK_GETSOCKNAME, zsock_getsockname, sock, addr, addrlen, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_zsock_gethostname(char * buf, size_t len); + +__pinned_func +static inline int zsock_gethostname(char * buf, size_t len) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; char * val; } parm0 = { .val = buf }; + union { uintptr_t x; size_t val; } parm1 = { .val = len }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_ZSOCK_GETHOSTNAME); + } +#endif + compiler_barrier(); + return z_impl_zsock_gethostname(buf, len); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define zsock_gethostname(buf, len) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ZSOCK_GETHOSTNAME, zsock_gethostname, buf, len); syscall__retval = zsock_gethostname(buf, len); sys_port_trace_syscall_exit(K_SYSCALL_ZSOCK_GETHOSTNAME, zsock_gethostname, buf, len, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_zsock_inet_pton(sa_family_t family, const char * src, void * dst); + +__pinned_func +static inline int zsock_inet_pton(sa_family_t family, const char * src, void * dst) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; sa_family_t val; } parm0 = { .val = family }; + union { uintptr_t x; const char * val; } parm1 = { .val = src }; + union { uintptr_t x; void * val; } parm2 = { .val = dst }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_ZSOCK_INET_PTON); + } +#endif + compiler_barrier(); + return z_impl_zsock_inet_pton(family, src, dst); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define zsock_inet_pton(family, src, dst) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ZSOCK_INET_PTON, zsock_inet_pton, family, src, dst); syscall__retval = zsock_inet_pton(family, src, dst); sys_port_trace_syscall_exit(K_SYSCALL_ZSOCK_INET_PTON, zsock_inet_pton, family, src, dst, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_z_zsock_getaddrinfo_internal(const char * host, const char * service, const struct zsock_addrinfo * hints, struct zsock_addrinfo * res); + +__pinned_func +static inline int z_zsock_getaddrinfo_internal(const char * host, const char * service, const struct zsock_addrinfo * hints, struct zsock_addrinfo * res) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const char * val; } parm0 = { .val = host }; + union { uintptr_t x; const char * val; } parm1 = { .val = service }; + union { uintptr_t x; const struct zsock_addrinfo * val; } parm2 = { .val = hints }; + union { uintptr_t x; struct zsock_addrinfo * val; } parm3 = { .val = res }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_Z_ZSOCK_GETADDRINFO_INTERNAL); + } +#endif + compiler_barrier(); + return z_impl_z_zsock_getaddrinfo_internal(host, service, hints, res); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define z_zsock_getaddrinfo_internal(host, service, hints, res) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_Z_ZSOCK_GETADDRINFO_INTERNAL, z_zsock_getaddrinfo_internal, host, service, hints, res); syscall__retval = z_zsock_getaddrinfo_internal(host, service, hints, res); sys_port_trace_syscall_exit(K_SYSCALL_Z_ZSOCK_GETADDRINFO_INTERNAL, z_zsock_getaddrinfo_internal, host, service, hints, res, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/socket_select.h b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/socket_select.h new file mode 100644 index 0000000..1ebe088 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/socket_select.h @@ -0,0 +1,55 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_SOCKET_SELECT_H +#define Z_INCLUDE_SYSCALLS_SOCKET_SELECT_H + + +#include <zephyr/tracing/tracing_syscall.h> + +#ifndef _ASMLANGUAGE + +#include <stdarg.h> + +#include <syscall_list.h> +#include <zephyr/syscall.h> + +#include <zephyr/linker/sections.h> + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_zsock_select(int nfds, zsock_fd_set * readfds, zsock_fd_set * writefds, zsock_fd_set * exceptfds, struct zsock_timeval * timeout); + +__pinned_func +static inline int zsock_select(int nfds, zsock_fd_set * readfds, zsock_fd_set * writefds, zsock_fd_set * exceptfds, struct zsock_timeval * timeout) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; int val; } parm0 = { .val = nfds }; + union { uintptr_t x; zsock_fd_set * val; } parm1 = { .val = readfds }; + union { uintptr_t x; zsock_fd_set * val; } parm2 = { .val = writefds }; + union { uintptr_t x; zsock_fd_set * val; } parm3 = { .val = exceptfds }; + union { uintptr_t x; struct zsock_timeval * val; } parm4 = { .val = timeout }; + return (int) arch_syscall_invoke5(parm0.x, parm1.x, parm2.x, parm3.x, parm4.x, K_SYSCALL_ZSOCK_SELECT); + } +#endif + compiler_barrier(); + return z_impl_zsock_select(nfds, readfds, writefds, exceptfds, timeout); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define zsock_select(nfds, readfds, writefds, exceptfds, timeout) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_ZSOCK_SELECT, zsock_select, nfds, readfds, writefds, exceptfds, timeout); syscall__retval = zsock_select(nfds, readfds, writefds, exceptfds, timeout); sys_port_trace_syscall_exit(K_SYSCALL_ZSOCK_SELECT, zsock_select, nfds, readfds, writefds, exceptfds, timeout, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/socket_service.h b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/socket_service.h new file mode 100644 index 0000000..55fb3a6 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/socket_service.h @@ -0,0 +1,54 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_SOCKET_SERVICE_H +#define Z_INCLUDE_SYSCALLS_SOCKET_SERVICE_H + + +#include <zephyr/tracing/tracing_syscall.h> + +#ifndef _ASMLANGUAGE + +#include <stdarg.h> + +#include <syscall_list.h> +#include <zephyr/syscall.h> + +#include <zephyr/linker/sections.h> + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_net_socket_service_register(const struct net_socket_service_desc * service, struct zsock_pollfd * fds, int len, void * user_data); + +__pinned_func +static inline int net_socket_service_register(const struct net_socket_service_desc * service, struct zsock_pollfd * fds, int len, void * user_data) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct net_socket_service_desc * val; } parm0 = { .val = service }; + union { uintptr_t x; struct zsock_pollfd * val; } parm1 = { .val = fds }; + union { uintptr_t x; int val; } parm2 = { .val = len }; + union { uintptr_t x; void * val; } parm3 = { .val = user_data }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_NET_SOCKET_SERVICE_REGISTER); + } +#endif + compiler_barrier(); + return z_impl_net_socket_service_register(service, fds, len, user_data); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define net_socket_service_register(service, fds, len, user_data) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_NET_SOCKET_SERVICE_REGISTER, net_socket_service_register, service, fds, len, user_data); syscall__retval = net_socket_service_register(service, fds, len, user_data); sys_port_trace_syscall_exit(K_SYSCALL_NET_SOCKET_SERVICE_REGISTER, net_socket_service_register, service, fds, len, user_data, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/spi.h b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/spi.h new file mode 100644 index 0000000..3771ebc --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/spi.h @@ -0,0 +1,78 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_SPI_H +#define Z_INCLUDE_SYSCALLS_SPI_H + + +#include <zephyr/tracing/tracing_syscall.h> + +#ifndef _ASMLANGUAGE + +#include <stdarg.h> + +#include <syscall_list.h> +#include <zephyr/syscall.h> + +#include <zephyr/linker/sections.h> + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_spi_transceive(const struct device * dev, const struct spi_config * config, const struct spi_buf_set * tx_bufs, const struct spi_buf_set * rx_bufs); + +__pinned_func +static inline int spi_transceive(const struct device * dev, const struct spi_config * config, const struct spi_buf_set * tx_bufs, const struct spi_buf_set * rx_bufs) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; const struct spi_config * val; } parm1 = { .val = config }; + union { uintptr_t x; const struct spi_buf_set * val; } parm2 = { .val = tx_bufs }; + union { uintptr_t x; const struct spi_buf_set * val; } parm3 = { .val = rx_bufs }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_SPI_TRANSCEIVE); + } +#endif + compiler_barrier(); + return z_impl_spi_transceive(dev, config, tx_bufs, rx_bufs); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define spi_transceive(dev, config, tx_bufs, rx_bufs) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SPI_TRANSCEIVE, spi_transceive, dev, config, tx_bufs, rx_bufs); syscall__retval = spi_transceive(dev, config, tx_bufs, rx_bufs); sys_port_trace_syscall_exit(K_SYSCALL_SPI_TRANSCEIVE, spi_transceive, dev, config, tx_bufs, rx_bufs, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_spi_release(const struct device * dev, const struct spi_config * config); + +__pinned_func +static inline int spi_release(const struct device * dev, const struct spi_config * config) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; const struct spi_config * val; } parm1 = { .val = config }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_SPI_RELEASE); + } +#endif + compiler_barrier(); + return z_impl_spi_release(dev, config); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define spi_release(dev, config) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SPI_RELEASE, spi_release, dev, config); syscall__retval = spi_release(dev, config); sys_port_trace_syscall_exit(K_SYSCALL_SPI_RELEASE, spi_release, dev, config, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/syscon.h b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/syscon.h new file mode 100644 index 0000000..7d13d74 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/syscon.h @@ -0,0 +1,126 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_SYSCON_H +#define Z_INCLUDE_SYSCALLS_SYSCON_H + + +#include <zephyr/tracing/tracing_syscall.h> + +#ifndef _ASMLANGUAGE + +#include <stdarg.h> + +#include <syscall_list.h> +#include <zephyr/syscall.h> + +#include <zephyr/linker/sections.h> + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_syscon_get_base(const struct device * dev, uintptr_t * addr); + +__pinned_func +static inline int syscon_get_base(const struct device * dev, uintptr_t * addr) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uintptr_t * val; } parm1 = { .val = addr }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_SYSCON_GET_BASE); + } +#endif + compiler_barrier(); + return z_impl_syscon_get_base(dev, addr); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define syscon_get_base(dev, addr) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SYSCON_GET_BASE, syscon_get_base, dev, addr); syscall__retval = syscon_get_base(dev, addr); sys_port_trace_syscall_exit(K_SYSCALL_SYSCON_GET_BASE, syscon_get_base, dev, addr, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_syscon_read_reg(const struct device * dev, uint16_t reg, uint32_t * val); + +__pinned_func +static inline int syscon_read_reg(const struct device * dev, uint16_t reg, uint32_t * val) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint16_t val; } parm1 = { .val = reg }; + union { uintptr_t x; uint32_t * val; } parm2 = { .val = val }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_SYSCON_READ_REG); + } +#endif + compiler_barrier(); + return z_impl_syscon_read_reg(dev, reg, val); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define syscon_read_reg(dev, reg, val) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SYSCON_READ_REG, syscon_read_reg, dev, reg, val); syscall__retval = syscon_read_reg(dev, reg, val); sys_port_trace_syscall_exit(K_SYSCALL_SYSCON_READ_REG, syscon_read_reg, dev, reg, val, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_syscon_write_reg(const struct device * dev, uint16_t reg, uint32_t val); + +__pinned_func +static inline int syscon_write_reg(const struct device * dev, uint16_t reg, uint32_t val) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint16_t val; } parm1 = { .val = reg }; + union { uintptr_t x; uint32_t val; } parm2 = { .val = val }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_SYSCON_WRITE_REG); + } +#endif + compiler_barrier(); + return z_impl_syscon_write_reg(dev, reg, val); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define syscon_write_reg(dev, reg, val) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SYSCON_WRITE_REG, syscon_write_reg, dev, reg, val); syscall__retval = syscon_write_reg(dev, reg, val); sys_port_trace_syscall_exit(K_SYSCALL_SYSCON_WRITE_REG, syscon_write_reg, dev, reg, val, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_syscon_get_size(const struct device * dev, size_t * size); + +__pinned_func +static inline int syscon_get_size(const struct device * dev, size_t * size) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; size_t * val; } parm1 = { .val = size }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_SYSCON_GET_SIZE); + } +#endif + compiler_barrier(); + return z_impl_syscon_get_size(dev, size); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define syscon_get_size(dev, size) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SYSCON_GET_SIZE, syscon_get_size, dev, size); syscall__retval = syscon_get_size(dev, size); sys_port_trace_syscall_exit(K_SYSCALL_SYSCON_GET_SIZE, syscon_get_size, dev, size, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/time_units.h b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/time_units.h new file mode 100644 index 0000000..1d94e62 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/time_units.h @@ -0,0 +1,50 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_TIME_UNITS_H +#define Z_INCLUDE_SYSCALLS_TIME_UNITS_H + + +#include <zephyr/tracing/tracing_syscall.h> + +#ifndef _ASMLANGUAGE + +#include <stdarg.h> + +#include <syscall_list.h> +#include <zephyr/syscall.h> + +#include <zephyr/linker/sections.h> + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_sys_clock_hw_cycles_per_sec_runtime_get(void); + +__pinned_func +static inline int sys_clock_hw_cycles_per_sec_runtime_get(void) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + return (int) arch_syscall_invoke0(K_SYSCALL_SYS_CLOCK_HW_CYCLES_PER_SEC_RUNTIME_GET); + } +#endif + compiler_barrier(); + return z_impl_sys_clock_hw_cycles_per_sec_runtime_get(); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define sys_clock_hw_cycles_per_sec_runtime_get() ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_SYS_CLOCK_HW_CYCLES_PER_SEC_RUNTIME_GET, sys_clock_hw_cycles_per_sec_runtime_get); syscall__retval = sys_clock_hw_cycles_per_sec_runtime_get(); sys_port_trace_syscall_exit(K_SYSCALL_SYS_CLOCK_HW_CYCLES_PER_SEC_RUNTIME_GET, sys_clock_hw_cycles_per_sec_runtime_get, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/timeaware_gpio.h b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/timeaware_gpio.h new file mode 100644 index 0000000..db67411 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/timeaware_gpio.h @@ -0,0 +1,182 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_TIMEAWARE_GPIO_H +#define Z_INCLUDE_SYSCALLS_TIMEAWARE_GPIO_H + + +#include <zephyr/tracing/tracing_syscall.h> + +#ifndef _ASMLANGUAGE + +#include <stdarg.h> + +#include <syscall_list.h> +#include <zephyr/syscall.h> + +#include <zephyr/linker/sections.h> + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_tgpio_port_get_time(const struct device * dev, uint64_t * current_time); + +__pinned_func +static inline int tgpio_port_get_time(const struct device * dev, uint64_t * current_time) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint64_t * val; } parm1 = { .val = current_time }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_TGPIO_PORT_GET_TIME); + } +#endif + compiler_barrier(); + return z_impl_tgpio_port_get_time(dev, current_time); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define tgpio_port_get_time(dev, current_time) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_TGPIO_PORT_GET_TIME, tgpio_port_get_time, dev, current_time); syscall__retval = tgpio_port_get_time(dev, current_time); sys_port_trace_syscall_exit(K_SYSCALL_TGPIO_PORT_GET_TIME, tgpio_port_get_time, dev, current_time, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_tgpio_port_get_cycles_per_second(const struct device * dev, uint32_t * cycles); + +__pinned_func +static inline int tgpio_port_get_cycles_per_second(const struct device * dev, uint32_t * cycles) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t * val; } parm1 = { .val = cycles }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_TGPIO_PORT_GET_CYCLES_PER_SECOND); + } +#endif + compiler_barrier(); + return z_impl_tgpio_port_get_cycles_per_second(dev, cycles); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define tgpio_port_get_cycles_per_second(dev, cycles) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_TGPIO_PORT_GET_CYCLES_PER_SECOND, tgpio_port_get_cycles_per_second, dev, cycles); syscall__retval = tgpio_port_get_cycles_per_second(dev, cycles); sys_port_trace_syscall_exit(K_SYSCALL_TGPIO_PORT_GET_CYCLES_PER_SECOND, tgpio_port_get_cycles_per_second, dev, cycles, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_tgpio_pin_disable(const struct device * dev, uint32_t pin); + +__pinned_func +static inline int tgpio_pin_disable(const struct device * dev, uint32_t pin) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = pin }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_TGPIO_PIN_DISABLE); + } +#endif + compiler_barrier(); + return z_impl_tgpio_pin_disable(dev, pin); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define tgpio_pin_disable(dev, pin) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_TGPIO_PIN_DISABLE, tgpio_pin_disable, dev, pin); syscall__retval = tgpio_pin_disable(dev, pin); sys_port_trace_syscall_exit(K_SYSCALL_TGPIO_PIN_DISABLE, tgpio_pin_disable, dev, pin, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_tgpio_pin_config_ext_timestamp(const struct device * dev, uint32_t pin, uint32_t event_polarity); + +__pinned_func +static inline int tgpio_pin_config_ext_timestamp(const struct device * dev, uint32_t pin, uint32_t event_polarity) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = pin }; + union { uintptr_t x; uint32_t val; } parm2 = { .val = event_polarity }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_TGPIO_PIN_CONFIG_EXT_TIMESTAMP); + } +#endif + compiler_barrier(); + return z_impl_tgpio_pin_config_ext_timestamp(dev, pin, event_polarity); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define tgpio_pin_config_ext_timestamp(dev, pin, event_polarity) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_TGPIO_PIN_CONFIG_EXT_TIMESTAMP, tgpio_pin_config_ext_timestamp, dev, pin, event_polarity); syscall__retval = tgpio_pin_config_ext_timestamp(dev, pin, event_polarity); sys_port_trace_syscall_exit(K_SYSCALL_TGPIO_PIN_CONFIG_EXT_TIMESTAMP, tgpio_pin_config_ext_timestamp, dev, pin, event_polarity, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_tgpio_pin_periodic_output(const struct device * dev, uint32_t pin, uint64_t start_time, uint64_t repeat_interval, bool periodic_enable); + +__pinned_func +static inline int tgpio_pin_periodic_output(const struct device * dev, uint32_t pin, uint64_t start_time, uint64_t repeat_interval, bool periodic_enable) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = pin }; + union { struct { uintptr_t lo, hi; } split; uint64_t val; } parm2 = { .val = start_time }; + union { struct { uintptr_t lo, hi; } split; uint64_t val; } parm3 = { .val = repeat_interval }; + union { uintptr_t x; bool val; } parm4 = { .val = periodic_enable }; + uintptr_t more[] = { + parm3.split.hi, + parm4.x + }; + return (int) arch_syscall_invoke6(parm0.x, parm1.x, parm2.split.lo, parm2.split.hi, parm3.split.lo, (uintptr_t) &more, K_SYSCALL_TGPIO_PIN_PERIODIC_OUTPUT); + } +#endif + compiler_barrier(); + return z_impl_tgpio_pin_periodic_output(dev, pin, start_time, repeat_interval, periodic_enable); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define tgpio_pin_periodic_output(dev, pin, start_time, repeat_interval, periodic_enable) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_TGPIO_PIN_PERIODIC_OUTPUT, tgpio_pin_periodic_output, dev, pin, start_time, repeat_interval, periodic_enable); syscall__retval = tgpio_pin_periodic_output(dev, pin, start_time, repeat_interval, periodic_enable); sys_port_trace_syscall_exit(K_SYSCALL_TGPIO_PIN_PERIODIC_OUTPUT, tgpio_pin_periodic_output, dev, pin, start_time, repeat_interval, periodic_enable, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_tgpio_pin_read_ts_ec(const struct device * dev, uint32_t pin, uint64_t * timestamp, uint64_t * event_count); + +__pinned_func +static inline int tgpio_pin_read_ts_ec(const struct device * dev, uint32_t pin, uint64_t * timestamp, uint64_t * event_count) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = pin }; + union { uintptr_t x; uint64_t * val; } parm2 = { .val = timestamp }; + union { uintptr_t x; uint64_t * val; } parm3 = { .val = event_count }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_TGPIO_PIN_READ_TS_EC); + } +#endif + compiler_barrier(); + return z_impl_tgpio_pin_read_ts_ec(dev, pin, timestamp, event_count); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define tgpio_pin_read_ts_ec(dev, pin, timestamp, event_count) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_TGPIO_PIN_READ_TS_EC, tgpio_pin_read_ts_ec, dev, pin, timestamp, event_count); syscall__retval = tgpio_pin_read_ts_ec(dev, pin, timestamp, event_count); sys_port_trace_syscall_exit(K_SYSCALL_TGPIO_PIN_READ_TS_EC, tgpio_pin_read_ts_ec, dev, pin, timestamp, event_count, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/uart.h b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/uart.h new file mode 100644 index 0000000..b3b9b91 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/uart.h @@ -0,0 +1,612 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_UART_H +#define Z_INCLUDE_SYSCALLS_UART_H + + +#include <zephyr/tracing/tracing_syscall.h> + +#ifndef _ASMLANGUAGE + +#include <stdarg.h> + +#include <syscall_list.h> +#include <zephyr/syscall.h> + +#include <zephyr/linker/sections.h> + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_uart_err_check(const struct device * dev); + +__pinned_func +static inline int uart_err_check(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_UART_ERR_CHECK); + } +#endif + compiler_barrier(); + return z_impl_uart_err_check(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define uart_err_check(dev) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_UART_ERR_CHECK, uart_err_check, dev); syscall__retval = uart_err_check(dev); sys_port_trace_syscall_exit(K_SYSCALL_UART_ERR_CHECK, uart_err_check, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_uart_poll_in(const struct device * dev, unsigned char * p_char); + +__pinned_func +static inline int uart_poll_in(const struct device * dev, unsigned char * p_char) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; unsigned char * val; } parm1 = { .val = p_char }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_UART_POLL_IN); + } +#endif + compiler_barrier(); + return z_impl_uart_poll_in(dev, p_char); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define uart_poll_in(dev, p_char) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_UART_POLL_IN, uart_poll_in, dev, p_char); syscall__retval = uart_poll_in(dev, p_char); sys_port_trace_syscall_exit(K_SYSCALL_UART_POLL_IN, uart_poll_in, dev, p_char, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_uart_poll_in_u16(const struct device * dev, uint16_t * p_u16); + +__pinned_func +static inline int uart_poll_in_u16(const struct device * dev, uint16_t * p_u16) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint16_t * val; } parm1 = { .val = p_u16 }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_UART_POLL_IN_U16); + } +#endif + compiler_barrier(); + return z_impl_uart_poll_in_u16(dev, p_u16); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define uart_poll_in_u16(dev, p_u16) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_UART_POLL_IN_U16, uart_poll_in_u16, dev, p_u16); syscall__retval = uart_poll_in_u16(dev, p_u16); sys_port_trace_syscall_exit(K_SYSCALL_UART_POLL_IN_U16, uart_poll_in_u16, dev, p_u16, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern void z_impl_uart_poll_out(const struct device * dev, unsigned char out_char); + +__pinned_func +static inline void uart_poll_out(const struct device * dev, unsigned char out_char) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; unsigned char val; } parm1 = { .val = out_char }; + (void) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_UART_POLL_OUT); + return; + } +#endif + compiler_barrier(); + z_impl_uart_poll_out(dev, out_char); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define uart_poll_out(dev, out_char) do { sys_port_trace_syscall_enter(K_SYSCALL_UART_POLL_OUT, uart_poll_out, dev, out_char); uart_poll_out(dev, out_char); sys_port_trace_syscall_exit(K_SYSCALL_UART_POLL_OUT, uart_poll_out, dev, out_char); } while(false) +#endif +#endif + + +extern void z_impl_uart_poll_out_u16(const struct device * dev, uint16_t out_u16); + +__pinned_func +static inline void uart_poll_out_u16(const struct device * dev, uint16_t out_u16) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint16_t val; } parm1 = { .val = out_u16 }; + (void) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_UART_POLL_OUT_U16); + return; + } +#endif + compiler_barrier(); + z_impl_uart_poll_out_u16(dev, out_u16); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define uart_poll_out_u16(dev, out_u16) do { sys_port_trace_syscall_enter(K_SYSCALL_UART_POLL_OUT_U16, uart_poll_out_u16, dev, out_u16); uart_poll_out_u16(dev, out_u16); sys_port_trace_syscall_exit(K_SYSCALL_UART_POLL_OUT_U16, uart_poll_out_u16, dev, out_u16); } while(false) +#endif +#endif + + +extern int z_impl_uart_configure(const struct device * dev, const struct uart_config * cfg); + +__pinned_func +static inline int uart_configure(const struct device * dev, const struct uart_config * cfg) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; const struct uart_config * val; } parm1 = { .val = cfg }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_UART_CONFIGURE); + } +#endif + compiler_barrier(); + return z_impl_uart_configure(dev, cfg); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define uart_configure(dev, cfg) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_UART_CONFIGURE, uart_configure, dev, cfg); syscall__retval = uart_configure(dev, cfg); sys_port_trace_syscall_exit(K_SYSCALL_UART_CONFIGURE, uart_configure, dev, cfg, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_uart_config_get(const struct device * dev, struct uart_config * cfg); + +__pinned_func +static inline int uart_config_get(const struct device * dev, struct uart_config * cfg) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; struct uart_config * val; } parm1 = { .val = cfg }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_UART_CONFIG_GET); + } +#endif + compiler_barrier(); + return z_impl_uart_config_get(dev, cfg); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define uart_config_get(dev, cfg) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_UART_CONFIG_GET, uart_config_get, dev, cfg); syscall__retval = uart_config_get(dev, cfg); sys_port_trace_syscall_exit(K_SYSCALL_UART_CONFIG_GET, uart_config_get, dev, cfg, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern void z_impl_uart_irq_tx_enable(const struct device * dev); + +__pinned_func +static inline void uart_irq_tx_enable(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + (void) arch_syscall_invoke1(parm0.x, K_SYSCALL_UART_IRQ_TX_ENABLE); + return; + } +#endif + compiler_barrier(); + z_impl_uart_irq_tx_enable(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define uart_irq_tx_enable(dev) do { sys_port_trace_syscall_enter(K_SYSCALL_UART_IRQ_TX_ENABLE, uart_irq_tx_enable, dev); uart_irq_tx_enable(dev); sys_port_trace_syscall_exit(K_SYSCALL_UART_IRQ_TX_ENABLE, uart_irq_tx_enable, dev); } while(false) +#endif +#endif + + +extern void z_impl_uart_irq_tx_disable(const struct device * dev); + +__pinned_func +static inline void uart_irq_tx_disable(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + (void) arch_syscall_invoke1(parm0.x, K_SYSCALL_UART_IRQ_TX_DISABLE); + return; + } +#endif + compiler_barrier(); + z_impl_uart_irq_tx_disable(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define uart_irq_tx_disable(dev) do { sys_port_trace_syscall_enter(K_SYSCALL_UART_IRQ_TX_DISABLE, uart_irq_tx_disable, dev); uart_irq_tx_disable(dev); sys_port_trace_syscall_exit(K_SYSCALL_UART_IRQ_TX_DISABLE, uart_irq_tx_disable, dev); } while(false) +#endif +#endif + + +extern void z_impl_uart_irq_rx_enable(const struct device * dev); + +__pinned_func +static inline void uart_irq_rx_enable(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + (void) arch_syscall_invoke1(parm0.x, K_SYSCALL_UART_IRQ_RX_ENABLE); + return; + } +#endif + compiler_barrier(); + z_impl_uart_irq_rx_enable(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define uart_irq_rx_enable(dev) do { sys_port_trace_syscall_enter(K_SYSCALL_UART_IRQ_RX_ENABLE, uart_irq_rx_enable, dev); uart_irq_rx_enable(dev); sys_port_trace_syscall_exit(K_SYSCALL_UART_IRQ_RX_ENABLE, uart_irq_rx_enable, dev); } while(false) +#endif +#endif + + +extern void z_impl_uart_irq_rx_disable(const struct device * dev); + +__pinned_func +static inline void uart_irq_rx_disable(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + (void) arch_syscall_invoke1(parm0.x, K_SYSCALL_UART_IRQ_RX_DISABLE); + return; + } +#endif + compiler_barrier(); + z_impl_uart_irq_rx_disable(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define uart_irq_rx_disable(dev) do { sys_port_trace_syscall_enter(K_SYSCALL_UART_IRQ_RX_DISABLE, uart_irq_rx_disable, dev); uart_irq_rx_disable(dev); sys_port_trace_syscall_exit(K_SYSCALL_UART_IRQ_RX_DISABLE, uart_irq_rx_disable, dev); } while(false) +#endif +#endif + + +extern void z_impl_uart_irq_err_enable(const struct device * dev); + +__pinned_func +static inline void uart_irq_err_enable(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + (void) arch_syscall_invoke1(parm0.x, K_SYSCALL_UART_IRQ_ERR_ENABLE); + return; + } +#endif + compiler_barrier(); + z_impl_uart_irq_err_enable(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define uart_irq_err_enable(dev) do { sys_port_trace_syscall_enter(K_SYSCALL_UART_IRQ_ERR_ENABLE, uart_irq_err_enable, dev); uart_irq_err_enable(dev); sys_port_trace_syscall_exit(K_SYSCALL_UART_IRQ_ERR_ENABLE, uart_irq_err_enable, dev); } while(false) +#endif +#endif + + +extern void z_impl_uart_irq_err_disable(const struct device * dev); + +__pinned_func +static inline void uart_irq_err_disable(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + (void) arch_syscall_invoke1(parm0.x, K_SYSCALL_UART_IRQ_ERR_DISABLE); + return; + } +#endif + compiler_barrier(); + z_impl_uart_irq_err_disable(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define uart_irq_err_disable(dev) do { sys_port_trace_syscall_enter(K_SYSCALL_UART_IRQ_ERR_DISABLE, uart_irq_err_disable, dev); uart_irq_err_disable(dev); sys_port_trace_syscall_exit(K_SYSCALL_UART_IRQ_ERR_DISABLE, uart_irq_err_disable, dev); } while(false) +#endif +#endif + + +extern int z_impl_uart_irq_is_pending(const struct device * dev); + +__pinned_func +static inline int uart_irq_is_pending(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_UART_IRQ_IS_PENDING); + } +#endif + compiler_barrier(); + return z_impl_uart_irq_is_pending(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define uart_irq_is_pending(dev) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_UART_IRQ_IS_PENDING, uart_irq_is_pending, dev); syscall__retval = uart_irq_is_pending(dev); sys_port_trace_syscall_exit(K_SYSCALL_UART_IRQ_IS_PENDING, uart_irq_is_pending, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_uart_irq_update(const struct device * dev); + +__pinned_func +static inline int uart_irq_update(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_UART_IRQ_UPDATE); + } +#endif + compiler_barrier(); + return z_impl_uart_irq_update(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define uart_irq_update(dev) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_UART_IRQ_UPDATE, uart_irq_update, dev); syscall__retval = uart_irq_update(dev); sys_port_trace_syscall_exit(K_SYSCALL_UART_IRQ_UPDATE, uart_irq_update, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_uart_tx(const struct device * dev, const uint8_t * buf, size_t len, int32_t timeout); + +__pinned_func +static inline int uart_tx(const struct device * dev, const uint8_t * buf, size_t len, int32_t timeout) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; const uint8_t * val; } parm1 = { .val = buf }; + union { uintptr_t x; size_t val; } parm2 = { .val = len }; + union { uintptr_t x; int32_t val; } parm3 = { .val = timeout }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_UART_TX); + } +#endif + compiler_barrier(); + return z_impl_uart_tx(dev, buf, len, timeout); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define uart_tx(dev, buf, len, timeout) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_UART_TX, uart_tx, dev, buf, len, timeout); syscall__retval = uart_tx(dev, buf, len, timeout); sys_port_trace_syscall_exit(K_SYSCALL_UART_TX, uart_tx, dev, buf, len, timeout, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_uart_tx_u16(const struct device * dev, const uint16_t * buf, size_t len, int32_t timeout); + +__pinned_func +static inline int uart_tx_u16(const struct device * dev, const uint16_t * buf, size_t len, int32_t timeout) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; const uint16_t * val; } parm1 = { .val = buf }; + union { uintptr_t x; size_t val; } parm2 = { .val = len }; + union { uintptr_t x; int32_t val; } parm3 = { .val = timeout }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_UART_TX_U16); + } +#endif + compiler_barrier(); + return z_impl_uart_tx_u16(dev, buf, len, timeout); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define uart_tx_u16(dev, buf, len, timeout) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_UART_TX_U16, uart_tx_u16, dev, buf, len, timeout); syscall__retval = uart_tx_u16(dev, buf, len, timeout); sys_port_trace_syscall_exit(K_SYSCALL_UART_TX_U16, uart_tx_u16, dev, buf, len, timeout, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_uart_tx_abort(const struct device * dev); + +__pinned_func +static inline int uart_tx_abort(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_UART_TX_ABORT); + } +#endif + compiler_barrier(); + return z_impl_uart_tx_abort(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define uart_tx_abort(dev) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_UART_TX_ABORT, uart_tx_abort, dev); syscall__retval = uart_tx_abort(dev); sys_port_trace_syscall_exit(K_SYSCALL_UART_TX_ABORT, uart_tx_abort, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_uart_rx_enable(const struct device * dev, uint8_t * buf, size_t len, int32_t timeout); + +__pinned_func +static inline int uart_rx_enable(const struct device * dev, uint8_t * buf, size_t len, int32_t timeout) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint8_t * val; } parm1 = { .val = buf }; + union { uintptr_t x; size_t val; } parm2 = { .val = len }; + union { uintptr_t x; int32_t val; } parm3 = { .val = timeout }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_UART_RX_ENABLE); + } +#endif + compiler_barrier(); + return z_impl_uart_rx_enable(dev, buf, len, timeout); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define uart_rx_enable(dev, buf, len, timeout) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_UART_RX_ENABLE, uart_rx_enable, dev, buf, len, timeout); syscall__retval = uart_rx_enable(dev, buf, len, timeout); sys_port_trace_syscall_exit(K_SYSCALL_UART_RX_ENABLE, uart_rx_enable, dev, buf, len, timeout, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_uart_rx_enable_u16(const struct device * dev, uint16_t * buf, size_t len, int32_t timeout); + +__pinned_func +static inline int uart_rx_enable_u16(const struct device * dev, uint16_t * buf, size_t len, int32_t timeout) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint16_t * val; } parm1 = { .val = buf }; + union { uintptr_t x; size_t val; } parm2 = { .val = len }; + union { uintptr_t x; int32_t val; } parm3 = { .val = timeout }; + return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_UART_RX_ENABLE_U16); + } +#endif + compiler_barrier(); + return z_impl_uart_rx_enable_u16(dev, buf, len, timeout); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define uart_rx_enable_u16(dev, buf, len, timeout) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_UART_RX_ENABLE_U16, uart_rx_enable_u16, dev, buf, len, timeout); syscall__retval = uart_rx_enable_u16(dev, buf, len, timeout); sys_port_trace_syscall_exit(K_SYSCALL_UART_RX_ENABLE_U16, uart_rx_enable_u16, dev, buf, len, timeout, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_uart_rx_disable(const struct device * dev); + +__pinned_func +static inline int uart_rx_disable(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_UART_RX_DISABLE); + } +#endif + compiler_barrier(); + return z_impl_uart_rx_disable(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define uart_rx_disable(dev) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_UART_RX_DISABLE, uart_rx_disable, dev); syscall__retval = uart_rx_disable(dev); sys_port_trace_syscall_exit(K_SYSCALL_UART_RX_DISABLE, uart_rx_disable, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_uart_line_ctrl_set(const struct device * dev, uint32_t ctrl, uint32_t val); + +__pinned_func +static inline int uart_line_ctrl_set(const struct device * dev, uint32_t ctrl, uint32_t val) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = ctrl }; + union { uintptr_t x; uint32_t val; } parm2 = { .val = val }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_UART_LINE_CTRL_SET); + } +#endif + compiler_barrier(); + return z_impl_uart_line_ctrl_set(dev, ctrl, val); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define uart_line_ctrl_set(dev, ctrl, val) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_UART_LINE_CTRL_SET, uart_line_ctrl_set, dev, ctrl, val); syscall__retval = uart_line_ctrl_set(dev, ctrl, val); sys_port_trace_syscall_exit(K_SYSCALL_UART_LINE_CTRL_SET, uart_line_ctrl_set, dev, ctrl, val, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_uart_line_ctrl_get(const struct device * dev, uint32_t ctrl, uint32_t * val); + +__pinned_func +static inline int uart_line_ctrl_get(const struct device * dev, uint32_t ctrl, uint32_t * val) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = ctrl }; + union { uintptr_t x; uint32_t * val; } parm2 = { .val = val }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_UART_LINE_CTRL_GET); + } +#endif + compiler_barrier(); + return z_impl_uart_line_ctrl_get(dev, ctrl, val); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define uart_line_ctrl_get(dev, ctrl, val) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_UART_LINE_CTRL_GET, uart_line_ctrl_get, dev, ctrl, val); syscall__retval = uart_line_ctrl_get(dev, ctrl, val); sys_port_trace_syscall_exit(K_SYSCALL_UART_LINE_CTRL_GET, uart_line_ctrl_get, dev, ctrl, val, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_uart_drv_cmd(const struct device * dev, uint32_t cmd, uint32_t p); + +__pinned_func +static inline int uart_drv_cmd(const struct device * dev, uint32_t cmd, uint32_t p) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint32_t val; } parm1 = { .val = cmd }; + union { uintptr_t x; uint32_t val; } parm2 = { .val = p }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_UART_DRV_CMD); + } +#endif + compiler_barrier(); + return z_impl_uart_drv_cmd(dev, cmd, p); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define uart_drv_cmd(dev, cmd, p) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_UART_DRV_CMD, uart_drv_cmd, dev, cmd, p); syscall__retval = uart_drv_cmd(dev, cmd, p); sys_port_trace_syscall_exit(K_SYSCALL_UART_DRV_CMD, uart_drv_cmd, dev, cmd, p, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/uart_mux.h b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/uart_mux.h new file mode 100644 index 0000000..57a5939 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/uart_mux.h @@ -0,0 +1,51 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_UART_MUX_H +#define Z_INCLUDE_SYSCALLS_UART_MUX_H + + +#include <zephyr/tracing/tracing_syscall.h> + +#ifndef _ASMLANGUAGE + +#include <stdarg.h> + +#include <syscall_list.h> +#include <zephyr/syscall.h> + +#include <zephyr/linker/sections.h> + + +#ifdef __cplusplus +extern "C" { +#endif + +extern const struct device * z_impl_uart_mux_find(int dlci_address); + +__pinned_func +static inline const struct device * uart_mux_find(int dlci_address) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; int val; } parm0 = { .val = dlci_address }; + return (const struct device *) arch_syscall_invoke1(parm0.x, K_SYSCALL_UART_MUX_FIND); + } +#endif + compiler_barrier(); + return z_impl_uart_mux_find(dlci_address); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define uart_mux_find(dlci_address) ({ const struct device * syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_UART_MUX_FIND, uart_mux_find, dlci_address); syscall__retval = uart_mux_find(dlci_address); sys_port_trace_syscall_exit(K_SYSCALL_UART_MUX_FIND, uart_mux_find, dlci_address, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/updatehub.h b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/updatehub.h new file mode 100644 index 0000000..4a99d6f --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/updatehub.h @@ -0,0 +1,139 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_UPDATEHUB_H +#define Z_INCLUDE_SYSCALLS_UPDATEHUB_H + + +#include <zephyr/tracing/tracing_syscall.h> + +#ifndef _ASMLANGUAGE + +#include <stdarg.h> + +#include <syscall_list.h> +#include <zephyr/syscall.h> + +#include <zephyr/linker/sections.h> + + +#ifdef __cplusplus +extern "C" { +#endif + +extern void z_impl_updatehub_autohandler(void); + +__pinned_func +static inline void updatehub_autohandler(void) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + (void) arch_syscall_invoke0(K_SYSCALL_UPDATEHUB_AUTOHANDLER); + return; + } +#endif + compiler_barrier(); + z_impl_updatehub_autohandler(); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define updatehub_autohandler() do { sys_port_trace_syscall_enter(K_SYSCALL_UPDATEHUB_AUTOHANDLER, updatehub_autohandler); updatehub_autohandler(); sys_port_trace_syscall_exit(K_SYSCALL_UPDATEHUB_AUTOHANDLER, updatehub_autohandler); } while(false) +#endif +#endif + + +extern enum updatehub_response z_impl_updatehub_probe(void); + +__pinned_func +static inline enum updatehub_response updatehub_probe(void) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + return (enum updatehub_response) arch_syscall_invoke0(K_SYSCALL_UPDATEHUB_PROBE); + } +#endif + compiler_barrier(); + return z_impl_updatehub_probe(); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define updatehub_probe() ({ enum updatehub_response syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_UPDATEHUB_PROBE, updatehub_probe); syscall__retval = updatehub_probe(); sys_port_trace_syscall_exit(K_SYSCALL_UPDATEHUB_PROBE, updatehub_probe, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern enum updatehub_response z_impl_updatehub_update(void); + +__pinned_func +static inline enum updatehub_response updatehub_update(void) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + return (enum updatehub_response) arch_syscall_invoke0(K_SYSCALL_UPDATEHUB_UPDATE); + } +#endif + compiler_barrier(); + return z_impl_updatehub_update(); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define updatehub_update() ({ enum updatehub_response syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_UPDATEHUB_UPDATE, updatehub_update); syscall__retval = updatehub_update(); sys_port_trace_syscall_exit(K_SYSCALL_UPDATEHUB_UPDATE, updatehub_update, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_updatehub_confirm(void); + +__pinned_func +static inline int updatehub_confirm(void) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + return (int) arch_syscall_invoke0(K_SYSCALL_UPDATEHUB_CONFIRM); + } +#endif + compiler_barrier(); + return z_impl_updatehub_confirm(); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define updatehub_confirm() ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_UPDATEHUB_CONFIRM, updatehub_confirm); syscall__retval = updatehub_confirm(); sys_port_trace_syscall_exit(K_SYSCALL_UPDATEHUB_CONFIRM, updatehub_confirm, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_updatehub_reboot(void); + +__pinned_func +static inline int updatehub_reboot(void) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + return (int) arch_syscall_invoke0(K_SYSCALL_UPDATEHUB_REBOOT); + } +#endif + compiler_barrier(); + return z_impl_updatehub_reboot(); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define updatehub_reboot() ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_UPDATEHUB_REBOOT, updatehub_reboot); syscall__retval = updatehub_reboot(); sys_port_trace_syscall_exit(K_SYSCALL_UPDATEHUB_REBOOT, updatehub_reboot, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/usb_bc12.h b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/usb_bc12.h new file mode 100644 index 0000000..3b93c9f --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/usb_bc12.h @@ -0,0 +1,77 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_USB_BC12_H +#define Z_INCLUDE_SYSCALLS_USB_BC12_H + + +#include <zephyr/tracing/tracing_syscall.h> + +#ifndef _ASMLANGUAGE + +#include <stdarg.h> + +#include <syscall_list.h> +#include <zephyr/syscall.h> + +#include <zephyr/linker/sections.h> + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_bc12_set_role(const struct device * dev, enum bc12_role role); + +__pinned_func +static inline int bc12_set_role(const struct device * dev, enum bc12_role role) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; enum bc12_role val; } parm1 = { .val = role }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_BC12_SET_ROLE); + } +#endif + compiler_barrier(); + return z_impl_bc12_set_role(dev, role); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define bc12_set_role(dev, role) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_BC12_SET_ROLE, bc12_set_role, dev, role); syscall__retval = bc12_set_role(dev, role); sys_port_trace_syscall_exit(K_SYSCALL_BC12_SET_ROLE, bc12_set_role, dev, role, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_bc12_set_result_cb(const struct device * dev, bc12_callback_t cb, void * user_data); + +__pinned_func +static inline int bc12_set_result_cb(const struct device * dev, bc12_callback_t cb, void * user_data) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; bc12_callback_t val; } parm1 = { .val = cb }; + union { uintptr_t x; void * val; } parm2 = { .val = user_data }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_BC12_SET_RESULT_CB); + } +#endif + compiler_barrier(); + return z_impl_bc12_set_result_cb(dev, cb, user_data); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define bc12_set_result_cb(dev, cb, user_data) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_BC12_SET_RESULT_CB, bc12_set_result_cb, dev, cb, user_data); syscall__retval = bc12_set_result_cb(dev, cb, user_data); sys_port_trace_syscall_exit(K_SYSCALL_BC12_SET_RESULT_CB, bc12_set_result_cb, dev, cb, user_data, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/w1.h b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/w1.h new file mode 100644 index 0000000..6e913b4 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/w1.h @@ -0,0 +1,294 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_W1_H +#define Z_INCLUDE_SYSCALLS_W1_H + + +#include <zephyr/tracing/tracing_syscall.h> + +#ifndef _ASMLANGUAGE + +#include <stdarg.h> + +#include <syscall_list.h> +#include <zephyr/syscall.h> + +#include <zephyr/linker/sections.h> + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_w1_change_bus_lock(const struct device * dev, bool lock); + +__pinned_func +static inline int w1_change_bus_lock(const struct device * dev, bool lock) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; bool val; } parm1 = { .val = lock }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_W1_CHANGE_BUS_LOCK); + } +#endif + compiler_barrier(); + return z_impl_w1_change_bus_lock(dev, lock); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define w1_change_bus_lock(dev, lock) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_W1_CHANGE_BUS_LOCK, w1_change_bus_lock, dev, lock); syscall__retval = w1_change_bus_lock(dev, lock); sys_port_trace_syscall_exit(K_SYSCALL_W1_CHANGE_BUS_LOCK, w1_change_bus_lock, dev, lock, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_w1_reset_bus(const struct device * dev); + +__pinned_func +static inline int w1_reset_bus(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_W1_RESET_BUS); + } +#endif + compiler_barrier(); + return z_impl_w1_reset_bus(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define w1_reset_bus(dev) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_W1_RESET_BUS, w1_reset_bus, dev); syscall__retval = w1_reset_bus(dev); sys_port_trace_syscall_exit(K_SYSCALL_W1_RESET_BUS, w1_reset_bus, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_w1_read_bit(const struct device * dev); + +__pinned_func +static inline int w1_read_bit(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_W1_READ_BIT); + } +#endif + compiler_barrier(); + return z_impl_w1_read_bit(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define w1_read_bit(dev) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_W1_READ_BIT, w1_read_bit, dev); syscall__retval = w1_read_bit(dev); sys_port_trace_syscall_exit(K_SYSCALL_W1_READ_BIT, w1_read_bit, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_w1_write_bit(const struct device * dev, const bool bit); + +__pinned_func +static inline int w1_write_bit(const struct device * dev, const bool bit) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; const bool val; } parm1 = { .val = bit }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_W1_WRITE_BIT); + } +#endif + compiler_barrier(); + return z_impl_w1_write_bit(dev, bit); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define w1_write_bit(dev, bit) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_W1_WRITE_BIT, w1_write_bit, dev, bit); syscall__retval = w1_write_bit(dev, bit); sys_port_trace_syscall_exit(K_SYSCALL_W1_WRITE_BIT, w1_write_bit, dev, bit, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_w1_read_byte(const struct device * dev); + +__pinned_func +static inline int w1_read_byte(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_W1_READ_BYTE); + } +#endif + compiler_barrier(); + return z_impl_w1_read_byte(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define w1_read_byte(dev) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_W1_READ_BYTE, w1_read_byte, dev); syscall__retval = w1_read_byte(dev); sys_port_trace_syscall_exit(K_SYSCALL_W1_READ_BYTE, w1_read_byte, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_w1_write_byte(const struct device * dev, uint8_t byte); + +__pinned_func +static inline int w1_write_byte(const struct device * dev, uint8_t byte) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint8_t val; } parm1 = { .val = byte }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_W1_WRITE_BYTE); + } +#endif + compiler_barrier(); + return z_impl_w1_write_byte(dev, byte); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define w1_write_byte(dev, byte) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_W1_WRITE_BYTE, w1_write_byte, dev, byte); syscall__retval = w1_write_byte(dev, byte); sys_port_trace_syscall_exit(K_SYSCALL_W1_WRITE_BYTE, w1_write_byte, dev, byte, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_w1_read_block(const struct device * dev, uint8_t * buffer, size_t len); + +__pinned_func +static inline int w1_read_block(const struct device * dev, uint8_t * buffer, size_t len) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint8_t * val; } parm1 = { .val = buffer }; + union { uintptr_t x; size_t val; } parm2 = { .val = len }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_W1_READ_BLOCK); + } +#endif + compiler_barrier(); + return z_impl_w1_read_block(dev, buffer, len); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define w1_read_block(dev, buffer, len) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_W1_READ_BLOCK, w1_read_block, dev, buffer, len); syscall__retval = w1_read_block(dev, buffer, len); sys_port_trace_syscall_exit(K_SYSCALL_W1_READ_BLOCK, w1_read_block, dev, buffer, len, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_w1_write_block(const struct device * dev, const uint8_t * buffer, size_t len); + +__pinned_func +static inline int w1_write_block(const struct device * dev, const uint8_t * buffer, size_t len) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; const uint8_t * val; } parm1 = { .val = buffer }; + union { uintptr_t x; size_t val; } parm2 = { .val = len }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_W1_WRITE_BLOCK); + } +#endif + compiler_barrier(); + return z_impl_w1_write_block(dev, buffer, len); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define w1_write_block(dev, buffer, len) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_W1_WRITE_BLOCK, w1_write_block, dev, buffer, len); syscall__retval = w1_write_block(dev, buffer, len); sys_port_trace_syscall_exit(K_SYSCALL_W1_WRITE_BLOCK, w1_write_block, dev, buffer, len, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern size_t z_impl_w1_get_slave_count(const struct device * dev); + +__pinned_func +static inline size_t w1_get_slave_count(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (size_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_W1_GET_SLAVE_COUNT); + } +#endif + compiler_barrier(); + return z_impl_w1_get_slave_count(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define w1_get_slave_count(dev) ({ size_t syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_W1_GET_SLAVE_COUNT, w1_get_slave_count, dev); syscall__retval = w1_get_slave_count(dev); sys_port_trace_syscall_exit(K_SYSCALL_W1_GET_SLAVE_COUNT, w1_get_slave_count, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_w1_configure(const struct device * dev, enum w1_settings_type type, uint32_t value); + +__pinned_func +static inline int w1_configure(const struct device * dev, enum w1_settings_type type, uint32_t value) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; enum w1_settings_type val; } parm1 = { .val = type }; + union { uintptr_t x; uint32_t val; } parm2 = { .val = value }; + return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_W1_CONFIGURE); + } +#endif + compiler_barrier(); + return z_impl_w1_configure(dev, type, value); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define w1_configure(dev, type, value) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_W1_CONFIGURE, w1_configure, dev, type, value); syscall__retval = w1_configure(dev, type, value); sys_port_trace_syscall_exit(K_SYSCALL_W1_CONFIGURE, w1_configure, dev, type, value, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_w1_search_bus(const struct device * dev, uint8_t command, uint8_t family, w1_search_callback_t callback, void * user_data); + +__pinned_func +static inline int w1_search_bus(const struct device * dev, uint8_t command, uint8_t family, w1_search_callback_t callback, void * user_data) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint8_t val; } parm1 = { .val = command }; + union { uintptr_t x; uint8_t val; } parm2 = { .val = family }; + union { uintptr_t x; w1_search_callback_t val; } parm3 = { .val = callback }; + union { uintptr_t x; void * val; } parm4 = { .val = user_data }; + return (int) arch_syscall_invoke5(parm0.x, parm1.x, parm2.x, parm3.x, parm4.x, K_SYSCALL_W1_SEARCH_BUS); + } +#endif + compiler_barrier(); + return z_impl_w1_search_bus(dev, command, family, callback, user_data); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define w1_search_bus(dev, command, family, callback, user_data) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_W1_SEARCH_BUS, w1_search_bus, dev, command, family, callback, user_data); syscall__retval = w1_search_bus(dev, command, family, callback, user_data); sys_port_trace_syscall_exit(K_SYSCALL_W1_SEARCH_BUS, w1_search_bus, dev, command, family, callback, user_data, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/watchdog.h b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/watchdog.h new file mode 100644 index 0000000..c066ee5 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/syscalls/watchdog.h @@ -0,0 +1,99 @@ +/* auto-generated by gen_syscalls.py, don't edit */ + +#ifndef Z_INCLUDE_SYSCALLS_WATCHDOG_H +#define Z_INCLUDE_SYSCALLS_WATCHDOG_H + + +#include <zephyr/tracing/tracing_syscall.h> + +#ifndef _ASMLANGUAGE + +#include <stdarg.h> + +#include <syscall_list.h> +#include <zephyr/syscall.h> + +#include <zephyr/linker/sections.h> + + +#ifdef __cplusplus +extern "C" { +#endif + +extern int z_impl_wdt_setup(const struct device * dev, uint8_t options); + +__pinned_func +static inline int wdt_setup(const struct device * dev, uint8_t options) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; uint8_t val; } parm1 = { .val = options }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_WDT_SETUP); + } +#endif + compiler_barrier(); + return z_impl_wdt_setup(dev, options); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define wdt_setup(dev, options) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_WDT_SETUP, wdt_setup, dev, options); syscall__retval = wdt_setup(dev, options); sys_port_trace_syscall_exit(K_SYSCALL_WDT_SETUP, wdt_setup, dev, options, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_wdt_disable(const struct device * dev); + +__pinned_func +static inline int wdt_disable(const struct device * dev) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_WDT_DISABLE); + } +#endif + compiler_barrier(); + return z_impl_wdt_disable(dev); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define wdt_disable(dev) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_WDT_DISABLE, wdt_disable, dev); syscall__retval = wdt_disable(dev); sys_port_trace_syscall_exit(K_SYSCALL_WDT_DISABLE, wdt_disable, dev, syscall__retval); syscall__retval; }) +#endif +#endif + + +extern int z_impl_wdt_feed(const struct device * dev, int channel_id); + +__pinned_func +static inline int wdt_feed(const struct device * dev, int channel_id) +{ +#ifdef CONFIG_USERSPACE + if (z_syscall_trap()) { + union { uintptr_t x; const struct device * val; } parm0 = { .val = dev }; + union { uintptr_t x; int val; } parm1 = { .val = channel_id }; + return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_WDT_FEED); + } +#endif + compiler_barrier(); + return z_impl_wdt_feed(dev, channel_id); +} + +#if defined(CONFIG_TRACING_SYSCALL) +#ifndef DISABLE_SYSCALL_TRACING + +#define wdt_feed(dev, channel_id) ({ int syscall__retval; sys_port_trace_syscall_enter(K_SYSCALL_WDT_FEED, wdt_feed, dev, channel_id); syscall__retval = wdt_feed(dev, channel_id); sys_port_trace_syscall_exit(K_SYSCALL_WDT_FEED, wdt_feed, dev, channel_id, syscall__retval); syscall__retval; }) +#endif +#endif + + +#ifdef __cplusplus +} +#endif + +#endif +#endif /* include guard */ diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/version.h b/nrfdemo/build/mcuboot/zephyr/include/generated/version.h new file mode 100644 index 0000000..e117e35 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/version.h @@ -0,0 +1,25 @@ +#ifndef _KERNEL_VERSION_H_ +#define _KERNEL_VERSION_H_ + +/* values come from cmake/version.cmake + * BUILD_VERSION related values will be 'git describe', + * alternatively user defined BUILD_VERSION. + */ + +#define ZEPHYR_VERSION_CODE 198243 +#define ZEPHYR_VERSION(a,b,c) (((a) << 16) + ((b) << 8) + (c)) + +#define KERNELVERSION 0x3066300 +#define KERNEL_VERSION_NUMBER 0x30663 +#define KERNEL_VERSION_MAJOR 3 +#define KERNEL_VERSION_MINOR 6 +#define KERNEL_PATCHLEVEL 99 +#define KERNEL_TWEAK 0 +#define KERNEL_VERSION_STRING "3.6.99" +#define KERNEL_VERSION_EXTENDED_STRING "3.6.99+0" +#define KERNEL_VERSION_TWEAK_STRING "3.6.99+0" + +#define BUILD_VERSION v3.6.99-ncs2 + + +#endif /* _KERNEL_VERSION_H_ */ diff --git a/nrfdemo/build/mcuboot/zephyr/include/generated/zephyr_commit.h b/nrfdemo/build/mcuboot/zephyr/include/generated/zephyr_commit.h new file mode 100644 index 0000000..6b04bef --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/include/generated/zephyr_commit.h @@ -0,0 +1,12 @@ +#ifndef _ZEPHYR_COMMIT_H_ +#define _ZEPHYR_COMMIT_H_ + +/* values come from cmake/version.cmake + * BUILD_COMMIT related values will be 'git rev-parse', + * alternatively user defined BUILD_VERSION. + */ + +#define ZEPHYR_COMMIT 100befc70c74 +#define ZEPHYR_COMMIT_STRING "100befc70c74" + +#endif /* _ZEPHYR_COMMIT_H_ */ diff --git a/nrfdemo/build/mcuboot/zephyr/isr_tables.c b/nrfdemo/build/mcuboot/zephyr/isr_tables.c new file mode 100644 index 0000000..aabb816 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/isr_tables.c @@ -0,0 +1,143 @@ + +/* AUTO-GENERATED by gen_isr_tables.py, do not edit! */ + +#include <zephyr/toolchain.h> +#include <zephyr/linker/sections.h> +#include <zephyr/sw_isr_table.h> +#include <zephyr/arch/cpu.h> + +typedef void (* ISR)(const void *); +uintptr_t __irq_vector_table _irq_vector_table[65] = { + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), + ((uintptr_t)&_isr_wrapper), +}; +struct _isr_table_entry __sw_isr_table _sw_isr_table[65] = { + {(const void *)0x0, (ISR)z_irq_spurious}, /* 0 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 1 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 2 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 3 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 4 */ + {(const void *)0x37f1, (ISR)0x6a01}, /* 5 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 6 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 7 */ + {(const void *)0x6cfc, (ISR)0x67bd}, /* 8 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 9 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 10 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 11 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 12 */ + {(const void *)0x3ddd, (ISR)0x6a01}, /* 13 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 14 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 15 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 16 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 17 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 18 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 19 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 20 */ + {(const void *)0x0, (ISR)0x3091}, /* 21 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 22 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 23 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 24 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 25 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 26 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 27 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 28 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 29 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 30 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 31 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 32 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 33 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 34 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 35 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 36 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 37 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 38 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 39 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 40 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 41 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 42 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 43 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 44 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 45 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 46 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 47 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 48 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 49 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 50 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 51 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 52 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 53 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 54 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 55 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 56 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 57 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 58 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 59 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 60 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 61 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 62 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 63 */ + {(const void *)0x0, (ISR)z_irq_spurious}, /* 64 */ +}; diff --git a/nrfdemo/build/mcuboot/zephyr/isr_tables_swi.ld b/nrfdemo/build/mcuboot/zephyr/isr_tables_swi.ld new file mode 100644 index 0000000..710cecc --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/isr_tables_swi.ld @@ -0,0 +1 @@ +/* Empty */ diff --git a/nrfdemo/build/mcuboot/zephyr/isr_tables_vt.ld b/nrfdemo/build/mcuboot/zephyr/isr_tables_vt.ld new file mode 100644 index 0000000..710cecc --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/isr_tables_vt.ld @@ -0,0 +1 @@ +/* Empty */ diff --git a/nrfdemo/build/mcuboot/zephyr/kconfig/sources.txt b/nrfdemo/build/mcuboot/zephyr/kconfig/sources.txt new file mode 100644 index 0000000..113f4d3 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/kconfig/sources.txt @@ -0,0 +1,3143 @@ +/home/mike/Documents/ncs/v2.7.0/bootloader/mcuboot/boot/zephyr/Kconfig +/home/mike/Documents/ncs/v2.7.0/bootloader/mcuboot/boot/zephyr/Kconfig.firmware_loader +/home/mike/Documents/ncs/v2.7.0/bootloader/mcuboot/boot/zephyr/Kconfig.serial_recovery +/home/mike/Documents/ncs/v2.7.0/bootloader/mcuboot/boot/zephyr/VERSION +/home/mike/Documents/ncs/v2.7.0/conexio-firmware-sdk/boards/conexio/stratus_pro/Kconfig.conexio_stratus_pro +/home/mike/Documents/ncs/v2.7.0/conexio-firmware-sdk/boards/conexio/stratus_pro/Kconfig.defconfig +/home/mike/Documents/ncs/v2.7.0/conexio-firmware-sdk/boards/conexio/stratus_pro/Kconfig.defconfig.nrf9151 +/home/mike/Documents/ncs/v2.7.0/conexio-firmware-sdk/boards/conexio/stratus_pro/Kconfig.defconfig.nrf9161 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"/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}") + +# Set the install configuration name. +if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME) + if(BUILD_TYPE) + string(REGEX REPLACE "^[^A-Za-z0-9_]+" "" + CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}") + else() + set(CMAKE_INSTALL_CONFIG_NAME "") + endif() + message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"") +endif() + +# Set the component getting installed. +if(NOT CMAKE_INSTALL_COMPONENT) + if(COMPONENT) + message(STATUS "Install component: \"${COMPONENT}\"") + set(CMAKE_INSTALL_COMPONENT "${COMPONENT}") + else() + set(CMAKE_INSTALL_COMPONENT) + endif() +endif() + +# Is this installation the result of a crosscompile? +if(NOT DEFINED CMAKE_CROSSCOMPILING) + set(CMAKE_CROSSCOMPILING "TRUE") +endif() + +# Set default install directory permissions. +if(NOT DEFINED CMAKE_OBJDUMP) + set(CMAKE_OBJDUMP "/home/mike/ncs/toolchains/e9dba88316/opt/zephyr-sdk/arm-zephyr-eabi/bin/arm-zephyr-eabi-objdump") +endif() + diff --git a/nrfdemo/build/mcuboot/zephyr/libzephyr.a b/nrfdemo/build/mcuboot/zephyr/libzephyr.a Binary files differnew file mode 100644 index 0000000..14faa29 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/libzephyr.a diff --git a/nrfdemo/build/mcuboot/zephyr/linker.cmd b/nrfdemo/build/mcuboot/zephyr/linker.cmd new file mode 100644 index 0000000..e507e6c --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/linker.cmd @@ -0,0 +1,300 @@ + OUTPUT_FORMAT("elf32-littlearm") +_region_min_align = 4; +MEMORY + { + FLASH (rx) : ORIGIN = 0x0, LENGTH = 0xc000 + RAM (wx) : ORIGIN = 0x20000000, LENGTH = 0x8000 + + IDT_LIST (wx) : ORIGIN = 0xFFFF7FFF, LENGTH = 32K + } +ENTRY("__start") +SECTIONS + { + .rel.plt : + { + *(.rel.plt) + PROVIDE_HIDDEN (__rel_iplt_start = .); + *(.rel.iplt) + PROVIDE_HIDDEN (__rel_iplt_end = .); + } + .rela.plt : + { + *(.rela.plt) + PROVIDE_HIDDEN (__rela_iplt_start = .); + *(.rela.iplt) + PROVIDE_HIDDEN (__rela_iplt_end = .); + } + .rel.dyn : + { + *(.rel.*) + } + .rela.dyn : + { + *(.rela.*) + } + /DISCARD/ : + { + *(.plt) + } + /DISCARD/ : + { + *(.iplt) + } + + __rom_region_start = 0x0; + rom_start : + { +HIDDEN(__rom_start_address = .); +FILL(0x00); +. += 0x0 - (. - __rom_start_address); +. = ALIGN(4); +. = ALIGN( 1 << LOG2CEIL(4 * 32) ); +. = ALIGN( 1 << LOG2CEIL(4 * (16 + 65)) ); +_vector_start = .; +KEEP(*(.exc_vector_table)) +KEEP(*(".exc_vector_table.*")) +KEEP(*(.vectors)) +_vector_end = .; +. = ALIGN(4); +KEEP(*(.gnu.linkonce.irq_vector_table*)) + _vector_end = .; + } > FLASH + text : + { + __text_region_start = .; + *(.text) + *(".text.*") + *(".TEXT.*") + *(.gnu.linkonce.t.*) + *(.glue_7t) *(.glue_7) *(.vfp11_veneer) *(.v4_bx) + . = ALIGN(4); + } > FLASH + __text_region_end = .; + .ARM.exidx : + { + __exidx_start = .; + *(.ARM.exidx* gnu.linkonce.armexidx.*) + __exidx_end = .; + } > FLASH + __rodata_region_start = .; + initlevel : + { + __init_start = .; + __init_EARLY_start = .; KEEP(*(SORT(.z_init_EARLY?_*))); KEEP(*(SORT(.z_init_EARLY??_*))); + __init_PRE_KERNEL_1_start = .; KEEP(*(SORT(.z_init_PRE_KERNEL_1?_*))); KEEP(*(SORT(.z_init_PRE_KERNEL_1??_*))); + __init_PRE_KERNEL_2_start = .; KEEP(*(SORT(.z_init_PRE_KERNEL_2?_*))); KEEP(*(SORT(.z_init_PRE_KERNEL_2??_*))); + __init_POST_KERNEL_start = .; KEEP(*(SORT(.z_init_POST_KERNEL?_*))); KEEP(*(SORT(.z_init_POST_KERNEL??_*))); + __init_APPLICATION_start = .; KEEP(*(SORT(.z_init_APPLICATION?_*))); KEEP(*(SORT(.z_init_APPLICATION??_*))); + __init_SMP_start = .; KEEP(*(SORT(.z_init_SMP?_*))); KEEP(*(SORT(.z_init_SMP??_*))); + __init_end = .; + __deferred_init_list_start = .; + KEEP(*(.z_deferred_init)) + __deferred_init_list_end = .; + } > FLASH + device_area : SUBALIGN(4) { _device_list_start = .; KEEP(*(SORT(._device.static.*_?_*))); KEEP(*(SORT(._device.static.*_??_*))); _device_list_end = .; } > FLASH + sw_isr_table : + { + . = ALIGN(4); + *(.gnu.linkonce.sw_isr_table*) + } > FLASH + initlevel_error : + { + KEEP(*(SORT(.z_init_[_A-Z0-9]*))) + } + ASSERT(SIZEOF(initlevel_error) == 0, "Undefined initialization levels used.") + app_shmem_regions : ALIGN_WITH_INPUT + { + __app_shmem_regions_start = .; + KEEP(*(SORT(.app_regions.*))); + __app_shmem_regions_end = .; + } > FLASH + k_p4wq_initparam_area : SUBALIGN(4) { _k_p4wq_initparam_list_start = .; KEEP(*(SORT_BY_NAME(._k_p4wq_initparam.static.*))); _k_p4wq_initparam_list_end = .; } > FLASH + _static_thread_data_area : SUBALIGN(4) { __static_thread_data_list_start = .; KEEP(*(SORT_BY_NAME(.__static_thread_data.static.*))); __static_thread_data_list_end = .; } > FLASH + device_deps : ALIGN_WITH_INPUT + { +__device_deps_start = .; +KEEP(*(SORT(.__device_deps_pass2*))); +__device_deps_end = .; + } > FLASH +ztest : +{ + _ztest_expected_result_entry_list_start = .; KEEP(*(SORT_BY_NAME(._ztest_expected_result_entry.static.*))); _ztest_expected_result_entry_list_end = .; + _ztest_suite_node_list_start = .; KEEP(*(SORT_BY_NAME(._ztest_suite_node.static.*))); _ztest_suite_node_list_end = .; + _ztest_unit_test_list_start = .; KEEP(*(SORT_BY_NAME(._ztest_unit_test.static.*))); _ztest_unit_test_list_end = .; + _ztest_test_rule_list_start = .; KEEP(*(SORT_BY_NAME(._ztest_test_rule.static.*))); _ztest_test_rule_list_end = .; +} > FLASH + bt_l2cap_fixed_chan_area : SUBALIGN(4) { _bt_l2cap_fixed_chan_list_start = .; KEEP(*(SORT_BY_NAME(._bt_l2cap_fixed_chan.static.*))); _bt_l2cap_fixed_chan_list_end = .; } > FLASH + bt_gatt_service_static_area : SUBALIGN(4) { _bt_gatt_service_static_list_start = .; KEEP(*(SORT_BY_NAME(._bt_gatt_service_static.static.*))); _bt_gatt_service_static_list_end = .; } > FLASH + log_strings_area : SUBALIGN(4) { _log_strings_list_start = .; KEEP(*(SORT_BY_NAME(._log_strings.static.*))); _log_strings_list_end = .; } > FLASH + log_const_area : SUBALIGN(4) { _log_const_list_start = .; KEEP(*(SORT_BY_NAME(._log_const.static.*))); _log_const_list_end = .; } > FLASH + log_backend_area : SUBALIGN(4) { _log_backend_list_start = .; KEEP(*(SORT_BY_NAME(._log_backend.static.*))); _log_backend_list_end = .; } > FLASH + log_link_area : SUBALIGN(4) { _log_link_list_start = .; KEEP(*(SORT_BY_NAME(._log_link.static.*))); _log_link_list_end = .; } > FLASH + tracing_backend_area : SUBALIGN(4) { _tracing_backend_list_start = .; KEEP(*(SORT_BY_NAME(._tracing_backend.static.*))); _tracing_backend_list_end = .; } > FLASH + zephyr_dbg_info : ALIGN_WITH_INPUT + { + KEEP(*(".dbg_thread_info")); + } > FLASH + symbol_to_keep : ALIGN_WITH_INPUT + { + __symbol_to_keep_start = .; + KEEP(*(SORT(.symbol_to_keep*))); + __symbol_to_keep_end = .; + } > FLASH + shell_area : SUBALIGN(4) { _shell_list_start = .; KEEP(*(SORT_BY_NAME(._shell.static.*))); _shell_list_end = .; } > FLASH + shell_root_cmds_area : SUBALIGN(4) { _shell_root_cmds_list_start = .; KEEP(*(SORT_BY_NAME(._shell_root_cmds.static.*))); _shell_root_cmds_list_end = .; } > FLASH + shell_subcmds_area : SUBALIGN(4) { _shell_subcmds_list_start = .; KEEP(*(SORT_BY_NAME(._shell_subcmds.static.*))); _shell_subcmds_list_end = .; } > FLASH + shell_dynamic_subcmds_area : SUBALIGN(4) { _shell_dynamic_subcmds_list_start = .; KEEP(*(SORT_BY_NAME(._shell_dynamic_subcmds.static.*))); _shell_dynamic_subcmds_list_end = .; } > FLASH + cfb_font_area : SUBALIGN(4) { _cfb_font_list_start = .; KEEP(*(SORT_BY_NAME(._cfb_font.static.*))); _cfb_font_list_end = .; } > FLASH + rodata : + { + *(.rodata) + *(".rodata.*") + *(.gnu.linkonce.r.*) + . = ALIGN(4); + } > FLASH + __rodata_region_end = .; + . = ALIGN(_region_min_align); + __rom_region_end = __rom_region_start + . - ADDR(rom_start); + + /DISCARD/ : { + *(.got.plt) + *(.igot.plt) + *(.got) + *(.igot) + } + + . = 0x20000000; + . = ALIGN(_region_min_align); + _image_ram_start = .; +.ramfunc : ALIGN_WITH_INPUT +{ + . = ALIGN(_region_min_align); + __ramfunc_start = .; + *(.ramfunc) + *(".ramfunc.*") + . = ALIGN(_region_min_align); + __ramfunc_end = .; +} > RAM AT > FLASH +__ramfunc_size = __ramfunc_end - __ramfunc_start; +__ramfunc_load_start = LOADADDR(.ramfunc); + + datas : ALIGN_WITH_INPUT + { + __data_region_start = .; + __data_start = .; + *(.data) + *(".data.*") + *(".kernel.*") + __data_end = .; + } > RAM AT > FLASH + __data_size = __data_end - __data_start; + __data_load_start = LOADADDR(datas); + __data_region_load_start = LOADADDR(datas); + device_states : ALIGN_WITH_INPUT + { + __device_states_start = .; + KEEP(*(".z_devstate")); + KEEP(*(".z_devstate.*")); + __device_states_end = .; + } > RAM AT > FLASH + log_mpsc_pbuf_area : ALIGN_WITH_INPUT SUBALIGN(4) { _log_mpsc_pbuf_list_start = .; *(SORT_BY_NAME(._log_mpsc_pbuf.static.*)); _log_mpsc_pbuf_list_end = .; } > RAM AT > FLASH + log_msg_ptr_area : ALIGN_WITH_INPUT SUBALIGN(4) { _log_msg_ptr_list_start = .; KEEP(*(SORT_BY_NAME(._log_msg_ptr.static.*))); _log_msg_ptr_list_end = .; } > RAM AT > FLASH + log_dynamic_area : ALIGN_WITH_INPUT SUBALIGN(4) { _log_dynamic_list_start = .; KEEP(*(SORT_BY_NAME(._log_dynamic.static.*))); _log_dynamic_list_end = .; } > RAM AT > FLASH + k_timer_area : ALIGN_WITH_INPUT SUBALIGN(4) { _k_timer_list_start = .; *(SORT_BY_NAME(._k_timer.static.*)); _k_timer_list_end = .; } > RAM AT > FLASH + k_mem_slab_area : ALIGN_WITH_INPUT SUBALIGN(4) { _k_mem_slab_list_start = .; *(SORT_BY_NAME(._k_mem_slab.static.*)); _k_mem_slab_list_end = .; } > RAM AT > FLASH + k_heap_area : ALIGN_WITH_INPUT SUBALIGN(4) { _k_heap_list_start = .; *(SORT_BY_NAME(._k_heap.static.*)); _k_heap_list_end = .; } > RAM AT > FLASH + k_mutex_area : ALIGN_WITH_INPUT SUBALIGN(4) { _k_mutex_list_start = .; *(SORT_BY_NAME(._k_mutex.static.*)); _k_mutex_list_end = .; } > RAM AT > FLASH + k_stack_area : ALIGN_WITH_INPUT SUBALIGN(4) { _k_stack_list_start = .; *(SORT_BY_NAME(._k_stack.static.*)); _k_stack_list_end = .; } > RAM AT > FLASH + k_msgq_area : ALIGN_WITH_INPUT SUBALIGN(4) { _k_msgq_list_start = .; *(SORT_BY_NAME(._k_msgq.static.*)); _k_msgq_list_end = .; } > RAM AT > FLASH + k_mbox_area : ALIGN_WITH_INPUT SUBALIGN(4) { _k_mbox_list_start = .; *(SORT_BY_NAME(._k_mbox.static.*)); _k_mbox_list_end = .; } > RAM AT > FLASH + k_pipe_area : ALIGN_WITH_INPUT SUBALIGN(4) { _k_pipe_list_start = .; *(SORT_BY_NAME(._k_pipe.static.*)); _k_pipe_list_end = .; } > RAM AT > FLASH + k_sem_area : ALIGN_WITH_INPUT SUBALIGN(4) { _k_sem_list_start = .; *(SORT_BY_NAME(._k_sem.static.*)); _k_sem_list_end = .; } > RAM AT > FLASH + k_event_area : ALIGN_WITH_INPUT SUBALIGN(4) { _k_event_list_start = .; *(SORT_BY_NAME(._k_event.static.*)); _k_event_list_end = .; } > RAM AT > FLASH + k_queue_area : ALIGN_WITH_INPUT SUBALIGN(4) { _k_queue_list_start = .; *(SORT_BY_NAME(._k_queue.static.*)); _k_queue_list_end = .; } > RAM AT > FLASH + k_fifo_area : ALIGN_WITH_INPUT SUBALIGN(4) { _k_fifo_list_start = .; *(SORT_BY_NAME(._k_fifo.static.*)); _k_fifo_list_end = .; } > RAM AT > FLASH + k_lifo_area : ALIGN_WITH_INPUT SUBALIGN(4) { _k_lifo_list_start = .; *(SORT_BY_NAME(._k_lifo.static.*)); _k_lifo_list_end = .; } > RAM AT > FLASH + k_condvar_area : ALIGN_WITH_INPUT SUBALIGN(4) { _k_condvar_list_start = .; *(SORT_BY_NAME(._k_condvar.static.*)); _k_condvar_list_end = .; } > RAM AT > FLASH + sys_mem_blocks_ptr_area : ALIGN_WITH_INPUT SUBALIGN(4) { _sys_mem_blocks_ptr_list_start = .; *(SORT_BY_NAME(._sys_mem_blocks_ptr.static.*)); _sys_mem_blocks_ptr_list_end = .; } > RAM AT > FLASH + net_buf_pool_area : ALIGN_WITH_INPUT SUBALIGN(4) { _net_buf_pool_list_start = .; KEEP(*(SORT_BY_NAME(._net_buf_pool.static.*))); _net_buf_pool_list_end = .; } > RAM AT > FLASH + __data_region_end = .; + bss (NOLOAD) : ALIGN_WITH_INPUT + { + . = ALIGN(4); + __bss_start = .; + __kernel_ram_start = .; + *(.bss) + *(".bss.*") + *(COMMON) + *(".kernel_bss.*") + __bss_end = ALIGN(4); + } > RAM AT > RAM + noinit (NOLOAD) : + { + *(.noinit) + *(".noinit.*") + *(".kernel_noinit.*") + } > RAM AT > RAM + __kernel_ram_end = 0x20000000 + 0x8000; + __kernel_ram_size = __kernel_ram_end - __kernel_ram_start; +PROVIDE(z_arm_platform_init = SystemInit); +/DISCARD/ : +{ + KEEP(*(.irq_info*)) + KEEP(*(.intList*)) +} + .last_ram_section (NOLOAD) : + { + _image_ram_end = .; + _image_ram_size = _image_ram_end - _image_ram_start; + _end = .; + z_mapped_end = .; + } > RAM AT > RAM + + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .gnu.build.attributes 0 : { *(.gnu.build.attributes .gnu.build.attributes.*) } + .comment 0 : { *(.comment) } + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line .debug_line.* .debug_line_end ) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } + .debug_pubtypes 0 : { *(.debug_pubtypes) } + .debug_ranges 0 : { *(.debug_ranges) } + .debug_addr 0 : { *(.debug_addr) } + .debug_line_str 0 : { *(.debug_line_str) } + .debug_loclists 0 : { *(.debug_loclists) } + .debug_macro 0 : { *(.debug_macro) } + .debug_names 0 : { *(.debug_names) } + .debug_rnglists 0 : { *(.debug_rnglists) } + .debug_str_offsets 0 : { *(.debug_str_offsets) } + .debug_sup 0 : { *(.debug_sup) } + /DISCARD/ : { *(.note.GNU-stack) } + .ARM.attributes 0 : + { + KEEP(*(.ARM.attributes)) + KEEP(*(.gnu.attributes)) + } + +.last_section : +{ + LONG(0xE015E015) +} > FLASH +_flash_used = LOADADDR(.last_section) + SIZEOF(.last_section) - __rom_region_start; + } diff --git a/nrfdemo/build/mcuboot/zephyr/linker.cmd.dep b/nrfdemo/build/mcuboot/zephyr/linker.cmd.dep new file mode 100644 index 0000000..411ccd3 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/linker.cmd.dep @@ -0,0 +1,81 @@ +linker.cmd: \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/arch/arm/cortex_m/scripts/linker.ld \ + /home/mike/Documents/ncs/v2.7.0/conexio-firmware-sdk/samples/conexio_stratus/mqtt_control/build/mcuboot/zephyr/include/generated/autoconf.h \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/linker/sections.h \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/linker/section_tags.h \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/toolchain.h \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/toolchain/gcc.h \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/devicetree.h \ + /home/mike/Documents/ncs/v2.7.0/conexio-firmware-sdk/samples/conexio_stratus/mqtt_control/build/mcuboot/zephyr/include/generated/devicetree_generated.h \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/irq_multilevel.h \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/sys/util.h \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/sys/util_macro.h \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/sys/util_internal.h \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/sys/util_loops.h \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/sys/util_listify.h \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/sys/util_internal_is_eq.h \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/sys/util_internal_util_inc.h \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/sys/util_internal_util_dec.h \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/sys/util_internal_util_x2.h \ + /home/mike/Documents/ncs/v2.7.0/zephyr/lib/libc/minimal/include/stdbool.h \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/devicetree/io-channels.h \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/devicetree/clocks.h \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/devicetree/gpio.h \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/devicetree/spi.h \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/devicetree/dma.h \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/devicetree/pwms.h \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/devicetree/fixed-partitions.h \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/devicetree/ordinals.h \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/devicetree/pinctrl.h \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/devicetree/can.h \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/devicetree/reset.h \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/devicetree/mbox.h \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/linker/devicetree_regions.h \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/linker/linker-defs.h \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/toolchain/common.h \ + /home/mike/Documents/ncs/v2.7.0/conexio-firmware-sdk/samples/conexio_stratus/mqtt_control/build/mcuboot/zephyr/include/generated/offsets.h \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/linker/linker-tool.h \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/linker/linker-tool-gcc.h \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/kernel/mm.h \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/kernel/internal/mm.h \ + /home/mike/Documents/ncs/v2.7.0/conexio-firmware-sdk/samples/conexio_stratus/mqtt_control/build/mcuboot/zephyr/include/generated/pm_config.h \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/linker/linker-devnull.h \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/linker/rel-sections.ld \ + /home/mike/Documents/ncs/v2.7.0/conexio-firmware-sdk/samples/conexio_stratus/mqtt_control/build/mcuboot/zephyr/include/generated/snippets-rom-start.ld \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/../arch/common/rom_start_address.ld \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/../arch/common/fill_with_zeros.ld \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/../arch/common/rom_start_offset.ld \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/../arch/arm/core/vector_table.ld \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/linker/irq-vector-table-section.ld \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/../arch/arm/core/cortex_m/vector_table_pad.ld \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/linker/kobject-text.ld \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/linker/common-rom.ld \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/linker/common-rom/common-rom-kernel-devices.ld \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/linker/iterable_sections.h \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/linker/device-deps.ld \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/linker/common-rom/common-rom-ztest.ld \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/linker/common-rom/common-rom-cpp.ld \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/linker/common-rom/common-rom-net.ld \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/linker/common-rom/common-rom-bt.ld \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/linker/common-rom/common-rom-logging.ld \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/linker/common-rom/common-rom-debug.ld \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/linker/common-rom/common-rom-misc.ld \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/linker/thread-local-storage.ld \ + /home/mike/Documents/ncs/v2.7.0/conexio-firmware-sdk/samples/conexio_stratus/mqtt_control/build/mcuboot/zephyr/include/generated/snippets-rodata.ld \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/../arch/arm/core/swi_tables.ld \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/linker/kobject-rom.ld \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/linker/cplusplus-rom.ld \ + /home/mike/Documents/ncs/v2.7.0/conexio-firmware-sdk/samples/conexio_stratus/mqtt_control/build/mcuboot/zephyr/include/generated/snippets-ram-sections.ld \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/../arch/common/ramfunc.ld \ + /home/mike/Documents/ncs/v2.7.0/conexio-firmware-sdk/samples/conexio_stratus/mqtt_control/build/mcuboot/zephyr/include/generated/snippets-ramfunc-section.ld \ + /home/mike/Documents/ncs/v2.7.0/conexio-firmware-sdk/samples/conexio_stratus/mqtt_control/build/mcuboot/zephyr/include/generated/snippets-rwdata.ld \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/linker/common-ram.ld \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/linker/kobject-data.ld \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/linker/cplusplus-ram.ld \ + /home/mike/Documents/ncs/v2.7.0/conexio-firmware-sdk/samples/conexio_stratus/mqtt_control/build/mcuboot/zephyr/include/generated/snippets-data-sections.ld \ + /home/mike/Documents/ncs/v2.7.0/conexio-firmware-sdk/samples/conexio_stratus/mqtt_control/build/mcuboot/zephyr/include/generated/snippets-noinit.ld \ + /home/mike/Documents/ncs/v2.7.0/conexio-firmware-sdk/samples/conexio_stratus/mqtt_control/build/mcuboot/zephyr/include/generated/snippets-sections.ld \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/../soc/nordic/common/arm_platform_init.ld \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/linker/intlist.ld \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/linker/ram-end.ld \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/linker/debug-sections.ld diff --git a/nrfdemo/build/mcuboot/zephyr/linker_zephyr_pre0.cmd b/nrfdemo/build/mcuboot/zephyr/linker_zephyr_pre0.cmd new file mode 100644 index 0000000..defa477 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/linker_zephyr_pre0.cmd @@ -0,0 +1,300 @@ + OUTPUT_FORMAT("elf32-littlearm") +_region_min_align = 4; +MEMORY + { + FLASH (rx) : ORIGIN = 0x0, LENGTH = 0xc000 + RAM (wx) : ORIGIN = 0x20000000, LENGTH = 0x8000 + + IDT_LIST (wx) : ORIGIN = 0xFFFF7FFF, LENGTH = 32K + } +ENTRY("__start") +SECTIONS + { + .rel.plt : + { + *(.rel.plt) + PROVIDE_HIDDEN (__rel_iplt_start = .); + *(.rel.iplt) + PROVIDE_HIDDEN (__rel_iplt_end = .); + } + .rela.plt : + { + *(.rela.plt) + PROVIDE_HIDDEN (__rela_iplt_start = .); + *(.rela.iplt) + PROVIDE_HIDDEN (__rela_iplt_end = .); + } + .rel.dyn : + { + *(.rel.*) + } + .rela.dyn : + { + *(.rela.*) + } + /DISCARD/ : + { + *(.plt) + } + /DISCARD/ : + { + *(.iplt) + } + + __rom_region_start = 0x0; + rom_start : + { +HIDDEN(__rom_start_address = .); +FILL(0x00); +. += 0x0 - (. - __rom_start_address); +. = ALIGN(4); +. = ALIGN( 1 << LOG2CEIL(4 * 32) ); +. = ALIGN( 1 << LOG2CEIL(4 * (16 + 65)) ); +_vector_start = .; +KEEP(*(.exc_vector_table)) +KEEP(*(".exc_vector_table.*")) +KEEP(*(.vectors)) +_vector_end = .; +. = ALIGN(4); +KEEP(*(.gnu.linkonce.irq_vector_table*)) + _vector_end = .; + } > FLASH + text : + { + __text_region_start = .; + *(.text) + *(".text.*") + *(".TEXT.*") + *(.gnu.linkonce.t.*) + *(.glue_7t) *(.glue_7) *(.vfp11_veneer) *(.v4_bx) + . = ALIGN(4); + } > FLASH + __text_region_end = .; + .ARM.exidx : + { + __exidx_start = .; + *(.ARM.exidx* gnu.linkonce.armexidx.*) + __exidx_end = .; + } > FLASH + __rodata_region_start = .; + initlevel : + { + __init_start = .; + __init_EARLY_start = .; KEEP(*(SORT(.z_init_EARLY?_*))); KEEP(*(SORT(.z_init_EARLY??_*))); + __init_PRE_KERNEL_1_start = .; KEEP(*(SORT(.z_init_PRE_KERNEL_1?_*))); KEEP(*(SORT(.z_init_PRE_KERNEL_1??_*))); + __init_PRE_KERNEL_2_start = .; KEEP(*(SORT(.z_init_PRE_KERNEL_2?_*))); KEEP(*(SORT(.z_init_PRE_KERNEL_2??_*))); + __init_POST_KERNEL_start = .; KEEP(*(SORT(.z_init_POST_KERNEL?_*))); KEEP(*(SORT(.z_init_POST_KERNEL??_*))); + __init_APPLICATION_start = .; KEEP(*(SORT(.z_init_APPLICATION?_*))); KEEP(*(SORT(.z_init_APPLICATION??_*))); + __init_SMP_start = .; KEEP(*(SORT(.z_init_SMP?_*))); KEEP(*(SORT(.z_init_SMP??_*))); + __init_end = .; + __deferred_init_list_start = .; + KEEP(*(.z_deferred_init)) + __deferred_init_list_end = .; + } > FLASH + device_area : SUBALIGN(4) { _device_list_start = .; KEEP(*(SORT(._device.static.*_?_*))); KEEP(*(SORT(._device.static.*_??_*))); _device_list_end = .; } > FLASH + sw_isr_table : + { + . = ALIGN(4); + *(.gnu.linkonce.sw_isr_table*) + } > FLASH + initlevel_error : + { + KEEP(*(SORT(.z_init_[_A-Z0-9]*))) + } + ASSERT(SIZEOF(initlevel_error) == 0, "Undefined initialization levels used.") + app_shmem_regions : ALIGN_WITH_INPUT + { + __app_shmem_regions_start = .; + KEEP(*(SORT(.app_regions.*))); + __app_shmem_regions_end = .; + } > FLASH + k_p4wq_initparam_area : SUBALIGN(4) { _k_p4wq_initparam_list_start = .; KEEP(*(SORT_BY_NAME(._k_p4wq_initparam.static.*))); _k_p4wq_initparam_list_end = .; } > FLASH + _static_thread_data_area : SUBALIGN(4) { __static_thread_data_list_start = .; KEEP(*(SORT_BY_NAME(.__static_thread_data.static.*))); __static_thread_data_list_end = .; } > FLASH + device_deps : ALIGN_WITH_INPUT + { +__device_deps_start = .; +KEEP(*(SORT(.__device_deps_pass2*))); +__device_deps_end = .; + } > FLASH +ztest : +{ + _ztest_expected_result_entry_list_start = .; KEEP(*(SORT_BY_NAME(._ztest_expected_result_entry.static.*))); _ztest_expected_result_entry_list_end = .; + _ztest_suite_node_list_start = .; KEEP(*(SORT_BY_NAME(._ztest_suite_node.static.*))); _ztest_suite_node_list_end = .; + _ztest_unit_test_list_start = .; KEEP(*(SORT_BY_NAME(._ztest_unit_test.static.*))); _ztest_unit_test_list_end = .; + _ztest_test_rule_list_start = .; KEEP(*(SORT_BY_NAME(._ztest_test_rule.static.*))); _ztest_test_rule_list_end = .; +} > FLASH + bt_l2cap_fixed_chan_area : SUBALIGN(4) { _bt_l2cap_fixed_chan_list_start = .; KEEP(*(SORT_BY_NAME(._bt_l2cap_fixed_chan.static.*))); _bt_l2cap_fixed_chan_list_end = .; } > FLASH + bt_gatt_service_static_area : SUBALIGN(4) { _bt_gatt_service_static_list_start = .; KEEP(*(SORT_BY_NAME(._bt_gatt_service_static.static.*))); _bt_gatt_service_static_list_end = .; } > FLASH + log_strings_area : SUBALIGN(4) { _log_strings_list_start = .; KEEP(*(SORT_BY_NAME(._log_strings.static.*))); _log_strings_list_end = .; } > FLASH + log_const_area : SUBALIGN(4) { _log_const_list_start = .; KEEP(*(SORT_BY_NAME(._log_const.static.*))); _log_const_list_end = .; } > FLASH + log_backend_area : SUBALIGN(4) { _log_backend_list_start = .; KEEP(*(SORT_BY_NAME(._log_backend.static.*))); _log_backend_list_end = .; } > FLASH + log_link_area : SUBALIGN(4) { _log_link_list_start = .; KEEP(*(SORT_BY_NAME(._log_link.static.*))); _log_link_list_end = .; } > FLASH + tracing_backend_area : SUBALIGN(4) { _tracing_backend_list_start = .; KEEP(*(SORT_BY_NAME(._tracing_backend.static.*))); _tracing_backend_list_end = .; } > FLASH + zephyr_dbg_info : ALIGN_WITH_INPUT + { + KEEP(*(".dbg_thread_info")); + } > FLASH + symbol_to_keep : ALIGN_WITH_INPUT + { + __symbol_to_keep_start = .; + KEEP(*(SORT(.symbol_to_keep*))); + __symbol_to_keep_end = .; + } > FLASH + shell_area : SUBALIGN(4) { _shell_list_start = .; KEEP(*(SORT_BY_NAME(._shell.static.*))); _shell_list_end = .; } > FLASH + shell_root_cmds_area : SUBALIGN(4) { _shell_root_cmds_list_start = .; KEEP(*(SORT_BY_NAME(._shell_root_cmds.static.*))); _shell_root_cmds_list_end = .; } > FLASH + shell_subcmds_area : SUBALIGN(4) { _shell_subcmds_list_start = .; KEEP(*(SORT_BY_NAME(._shell_subcmds.static.*))); _shell_subcmds_list_end = .; } > FLASH + shell_dynamic_subcmds_area : SUBALIGN(4) { _shell_dynamic_subcmds_list_start = .; KEEP(*(SORT_BY_NAME(._shell_dynamic_subcmds.static.*))); _shell_dynamic_subcmds_list_end = .; } > FLASH + cfb_font_area : SUBALIGN(4) { _cfb_font_list_start = .; KEEP(*(SORT_BY_NAME(._cfb_font.static.*))); _cfb_font_list_end = .; } > FLASH + rodata : + { + *(.rodata) + *(".rodata.*") + *(.gnu.linkonce.r.*) + . = ALIGN(4); + } > FLASH + __rodata_region_end = .; + . = ALIGN(_region_min_align); + __rom_region_end = __rom_region_start + . - ADDR(rom_start); + + /DISCARD/ : { + *(.got.plt) + *(.igot.plt) + *(.got) + *(.igot) + } + + . = 0x20000000; + . = ALIGN(_region_min_align); + _image_ram_start = .; +.ramfunc : ALIGN_WITH_INPUT +{ + . = ALIGN(_region_min_align); + __ramfunc_start = .; + *(.ramfunc) + *(".ramfunc.*") + . = ALIGN(_region_min_align); + __ramfunc_end = .; +} > RAM AT > FLASH +__ramfunc_size = __ramfunc_end - __ramfunc_start; +__ramfunc_load_start = LOADADDR(.ramfunc); + + datas : ALIGN_WITH_INPUT + { + __data_region_start = .; + __data_start = .; + *(.data) + *(".data.*") + *(".kernel.*") + __data_end = .; + } > RAM AT > FLASH + __data_size = __data_end - __data_start; + __data_load_start = LOADADDR(datas); + __data_region_load_start = LOADADDR(datas); + device_states : ALIGN_WITH_INPUT + { + __device_states_start = .; + KEEP(*(".z_devstate")); + KEEP(*(".z_devstate.*")); + __device_states_end = .; + } > RAM AT > FLASH + log_mpsc_pbuf_area : ALIGN_WITH_INPUT SUBALIGN(4) { _log_mpsc_pbuf_list_start = .; *(SORT_BY_NAME(._log_mpsc_pbuf.static.*)); _log_mpsc_pbuf_list_end = .; } > RAM AT > FLASH + log_msg_ptr_area : ALIGN_WITH_INPUT SUBALIGN(4) { _log_msg_ptr_list_start = .; KEEP(*(SORT_BY_NAME(._log_msg_ptr.static.*))); _log_msg_ptr_list_end = .; } > RAM AT > FLASH + log_dynamic_area : ALIGN_WITH_INPUT SUBALIGN(4) { _log_dynamic_list_start = .; KEEP(*(SORT_BY_NAME(._log_dynamic.static.*))); _log_dynamic_list_end = .; } > RAM AT > FLASH + k_timer_area : ALIGN_WITH_INPUT SUBALIGN(4) { _k_timer_list_start = .; *(SORT_BY_NAME(._k_timer.static.*)); _k_timer_list_end = .; } > RAM AT > FLASH + k_mem_slab_area : ALIGN_WITH_INPUT SUBALIGN(4) { _k_mem_slab_list_start = .; *(SORT_BY_NAME(._k_mem_slab.static.*)); _k_mem_slab_list_end = .; } > RAM AT > FLASH + k_heap_area : ALIGN_WITH_INPUT SUBALIGN(4) { _k_heap_list_start = .; *(SORT_BY_NAME(._k_heap.static.*)); _k_heap_list_end = .; } > RAM AT > FLASH + k_mutex_area : ALIGN_WITH_INPUT SUBALIGN(4) { _k_mutex_list_start = .; *(SORT_BY_NAME(._k_mutex.static.*)); _k_mutex_list_end = .; } > RAM AT > FLASH + k_stack_area : ALIGN_WITH_INPUT SUBALIGN(4) { _k_stack_list_start = .; *(SORT_BY_NAME(._k_stack.static.*)); _k_stack_list_end = .; } > RAM AT > FLASH + k_msgq_area : ALIGN_WITH_INPUT SUBALIGN(4) { _k_msgq_list_start = .; *(SORT_BY_NAME(._k_msgq.static.*)); _k_msgq_list_end = .; } > RAM AT > FLASH + k_mbox_area : ALIGN_WITH_INPUT SUBALIGN(4) { _k_mbox_list_start = .; *(SORT_BY_NAME(._k_mbox.static.*)); _k_mbox_list_end = .; } > RAM AT > FLASH + k_pipe_area : ALIGN_WITH_INPUT SUBALIGN(4) { _k_pipe_list_start = .; *(SORT_BY_NAME(._k_pipe.static.*)); _k_pipe_list_end = .; } > RAM AT > FLASH + k_sem_area : ALIGN_WITH_INPUT SUBALIGN(4) { _k_sem_list_start = .; *(SORT_BY_NAME(._k_sem.static.*)); _k_sem_list_end = .; } > RAM AT > FLASH + k_event_area : ALIGN_WITH_INPUT SUBALIGN(4) { _k_event_list_start = .; *(SORT_BY_NAME(._k_event.static.*)); _k_event_list_end = .; } > RAM AT > FLASH + k_queue_area : ALIGN_WITH_INPUT SUBALIGN(4) { _k_queue_list_start = .; *(SORT_BY_NAME(._k_queue.static.*)); _k_queue_list_end = .; } > RAM AT > FLASH + k_fifo_area : ALIGN_WITH_INPUT SUBALIGN(4) { _k_fifo_list_start = .; *(SORT_BY_NAME(._k_fifo.static.*)); _k_fifo_list_end = .; } > RAM AT > FLASH + k_lifo_area : ALIGN_WITH_INPUT SUBALIGN(4) { _k_lifo_list_start = .; *(SORT_BY_NAME(._k_lifo.static.*)); _k_lifo_list_end = .; } > RAM AT > FLASH + k_condvar_area : ALIGN_WITH_INPUT SUBALIGN(4) { _k_condvar_list_start = .; *(SORT_BY_NAME(._k_condvar.static.*)); _k_condvar_list_end = .; } > RAM AT > FLASH + sys_mem_blocks_ptr_area : ALIGN_WITH_INPUT SUBALIGN(4) { _sys_mem_blocks_ptr_list_start = .; *(SORT_BY_NAME(._sys_mem_blocks_ptr.static.*)); _sys_mem_blocks_ptr_list_end = .; } > RAM AT > FLASH + net_buf_pool_area : ALIGN_WITH_INPUT SUBALIGN(4) { _net_buf_pool_list_start = .; KEEP(*(SORT_BY_NAME(._net_buf_pool.static.*))); _net_buf_pool_list_end = .; } > RAM AT > FLASH + __data_region_end = .; + bss (NOLOAD) : ALIGN_WITH_INPUT + { + . = ALIGN(4); + __bss_start = .; + __kernel_ram_start = .; + *(.bss) + *(".bss.*") + *(COMMON) + *(".kernel_bss.*") + __bss_end = ALIGN(4); + } > RAM AT > RAM + noinit (NOLOAD) : + { + *(.noinit) + *(".noinit.*") + *(".kernel_noinit.*") + } > RAM AT > RAM + __kernel_ram_end = 0x20000000 + 0x8000; + __kernel_ram_size = __kernel_ram_end - __kernel_ram_start; +PROVIDE(z_arm_platform_init = SystemInit); +.intList : +{ + KEEP(*(.irq_info*)) + KEEP(*(.intList*)) +} > IDT_LIST + .last_ram_section (NOLOAD) : + { + _image_ram_end = .; + _image_ram_size = _image_ram_end - _image_ram_start; + _end = .; + z_mapped_end = .; + } > RAM AT > RAM + + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .gnu.build.attributes 0 : { *(.gnu.build.attributes .gnu.build.attributes.*) } + .comment 0 : { *(.comment) } + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line .debug_line.* .debug_line_end ) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } + .debug_pubtypes 0 : { *(.debug_pubtypes) } + .debug_ranges 0 : { *(.debug_ranges) } + .debug_addr 0 : { *(.debug_addr) } + .debug_line_str 0 : { *(.debug_line_str) } + .debug_loclists 0 : { *(.debug_loclists) } + .debug_macro 0 : { *(.debug_macro) } + .debug_names 0 : { *(.debug_names) } + .debug_rnglists 0 : { *(.debug_rnglists) } + .debug_str_offsets 0 : { *(.debug_str_offsets) } + .debug_sup 0 : { *(.debug_sup) } + /DISCARD/ : { *(.note.GNU-stack) } + .ARM.attributes 0 : + { + KEEP(*(.ARM.attributes)) + KEEP(*(.gnu.attributes)) + } + +.last_section : +{ + LONG(0xE015E015) +} > FLASH +_flash_used = LOADADDR(.last_section) + SIZEOF(.last_section) - __rom_region_start; + } diff --git a/nrfdemo/build/mcuboot/zephyr/linker_zephyr_pre0.cmd.dep b/nrfdemo/build/mcuboot/zephyr/linker_zephyr_pre0.cmd.dep new file mode 100644 index 0000000..78dc24d --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/linker_zephyr_pre0.cmd.dep @@ -0,0 +1,81 @@ +linker_zephyr_pre0.cmd: \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/arch/arm/cortex_m/scripts/linker.ld \ + /home/mike/Documents/ncs/v2.7.0/conexio-firmware-sdk/samples/conexio_stratus/mqtt_control/build/mcuboot/zephyr/include/generated/autoconf.h \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/linker/sections.h \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/linker/section_tags.h \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/toolchain.h \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/toolchain/gcc.h \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/devicetree.h \ + /home/mike/Documents/ncs/v2.7.0/conexio-firmware-sdk/samples/conexio_stratus/mqtt_control/build/mcuboot/zephyr/include/generated/devicetree_generated.h \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/irq_multilevel.h \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/sys/util.h \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/sys/util_macro.h \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/sys/util_internal.h \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/sys/util_loops.h \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/sys/util_listify.h \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/sys/util_internal_is_eq.h \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/sys/util_internal_util_inc.h \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/sys/util_internal_util_dec.h \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/sys/util_internal_util_x2.h \ + /home/mike/Documents/ncs/v2.7.0/zephyr/lib/libc/minimal/include/stdbool.h \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/devicetree/io-channels.h \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/devicetree/clocks.h \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/devicetree/gpio.h \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/devicetree/spi.h \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/devicetree/dma.h \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/devicetree/pwms.h \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/devicetree/fixed-partitions.h \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/devicetree/ordinals.h \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/devicetree/pinctrl.h \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/devicetree/can.h \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/devicetree/reset.h \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/devicetree/mbox.h \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/linker/devicetree_regions.h \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/linker/linker-defs.h \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/toolchain/common.h \ + /home/mike/Documents/ncs/v2.7.0/conexio-firmware-sdk/samples/conexio_stratus/mqtt_control/build/mcuboot/zephyr/include/generated/offsets.h \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/linker/linker-tool.h \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/linker/linker-tool-gcc.h \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/kernel/mm.h \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/kernel/internal/mm.h \ + /home/mike/Documents/ncs/v2.7.0/conexio-firmware-sdk/samples/conexio_stratus/mqtt_control/build/mcuboot/zephyr/include/generated/pm_config.h \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/linker/linker-devnull.h \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/linker/rel-sections.ld \ + /home/mike/Documents/ncs/v2.7.0/conexio-firmware-sdk/samples/conexio_stratus/mqtt_control/build/mcuboot/zephyr/include/generated/snippets-rom-start.ld \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/../arch/common/rom_start_address.ld \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/../arch/common/fill_with_zeros.ld \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/../arch/common/rom_start_offset.ld \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/../arch/arm/core/vector_table.ld \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/linker/irq-vector-table-section.ld \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/../arch/arm/core/cortex_m/vector_table_pad.ld \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/linker/kobject-text.ld \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/linker/common-rom.ld \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/linker/common-rom/common-rom-kernel-devices.ld \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/linker/iterable_sections.h \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/linker/device-deps.ld \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/linker/common-rom/common-rom-ztest.ld \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/linker/common-rom/common-rom-cpp.ld \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/linker/common-rom/common-rom-net.ld \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/linker/common-rom/common-rom-bt.ld \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/linker/common-rom/common-rom-logging.ld \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/linker/common-rom/common-rom-debug.ld \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/linker/common-rom/common-rom-misc.ld \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/linker/thread-local-storage.ld \ + /home/mike/Documents/ncs/v2.7.0/conexio-firmware-sdk/samples/conexio_stratus/mqtt_control/build/mcuboot/zephyr/include/generated/snippets-rodata.ld \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/../arch/arm/core/swi_tables.ld \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/linker/kobject-rom.ld \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/linker/cplusplus-rom.ld \ + /home/mike/Documents/ncs/v2.7.0/conexio-firmware-sdk/samples/conexio_stratus/mqtt_control/build/mcuboot/zephyr/include/generated/snippets-ram-sections.ld \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/../arch/common/ramfunc.ld \ + /home/mike/Documents/ncs/v2.7.0/conexio-firmware-sdk/samples/conexio_stratus/mqtt_control/build/mcuboot/zephyr/include/generated/snippets-ramfunc-section.ld \ + /home/mike/Documents/ncs/v2.7.0/conexio-firmware-sdk/samples/conexio_stratus/mqtt_control/build/mcuboot/zephyr/include/generated/snippets-rwdata.ld \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/linker/common-ram.ld \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/linker/kobject-data.ld \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/linker/cplusplus-ram.ld \ + /home/mike/Documents/ncs/v2.7.0/conexio-firmware-sdk/samples/conexio_stratus/mqtt_control/build/mcuboot/zephyr/include/generated/snippets-data-sections.ld \ + /home/mike/Documents/ncs/v2.7.0/conexio-firmware-sdk/samples/conexio_stratus/mqtt_control/build/mcuboot/zephyr/include/generated/snippets-noinit.ld \ + /home/mike/Documents/ncs/v2.7.0/conexio-firmware-sdk/samples/conexio_stratus/mqtt_control/build/mcuboot/zephyr/include/generated/snippets-sections.ld \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/../soc/nordic/common/arm_platform_init.ld \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/linker/intlist.ld \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/linker/ram-end.ld \ + /home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/linker/debug-sections.ld diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/configs.c b/nrfdemo/build/mcuboot/zephyr/misc/generated/configs.c new file mode 100644 index 0000000..6b20733 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/configs.c @@ -0,0 +1,535 @@ +/* + * SPDX-License-Identifier: Apache-2.0 + */ + +/* file is auto-generated, do not modify ! */ + +#include <zephyr/toolchain.h> + +GEN_ABS_SYM_BEGIN (_ConfigAbsSyms) + +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_PM_PARTITION_SIZE_MCUBOOT_SCRATCH, 0x1e000); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_PM_PARTITION_SIZE_MCUBOOT_PAD, 0x200); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_PM_PARTITION_SIZE_MCUBOOT, 0xc000); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_BOOT_USE_NRF_CC310_BL, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_MCUBOOT_NRF_CLEANUP_PERIPHERAL, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_BOOT_SIGNATURE_KEY_FILE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_BOOT_ERASE_PROGRESSIVELY, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_MCUBOOT, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_BOOT_USE_CC310, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_NRFXLIB_CRYPTO, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_NRF_CC310_BL, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_BOOT_SIGNATURE_TYPE_ECDSA_P256, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_BOOT_ECDSA_CC310, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_MCUBOOT_CLEANUP_ARM_CORE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_MBEDTLS_CFG_FILE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_BOOT_VALIDATE_SLOT0, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_BOOT_PREFER_SWAP_MOVE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_BOOT_SWAP_USING_MOVE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_BOOT_ENCRYPTION_SUPPORT, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_BOOT_MAX_IMG_SECTORS, 128); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_BOOT_SHARE_BACKEND_DISABLED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_BOOT_FIH_PROFILE_LOW, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_BOOT_USB_DFU_NO, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_MCUBOOT_LOG_LEVEL_INF, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_MCUBOOT_LOG_LEVEL, 3); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_MCUBOOT_LOG_THREAD_STACK_SIZE, 768); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_UPDATEABLE_IMAGE_NUMBER, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_BOOT_WATCHDOG_FEED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_MCUBOOT_DEVICE_SETTINGS, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_USB_DEVICE_PRODUCT, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_FLASH_LOAD_SIZE, 0x10000); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_FLASH_LOAD_OFFSET, 0x0); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_NUM_IRQS, 65); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC, 32768); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_FLASH_SIZE, 1024); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_FLASH_BASE_ADDRESS, 0x0); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_MP_MAX_NUM_CPUS, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_PLATFORM_SPECIFIC_INIT, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_SYS_CLOCK_TICKS_PER_SEC, 32768); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ROM_START_OFFSET, 0x0); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_PINCTRL, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_BUILD_OUTPUT_BIN, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_XIP, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_MAIN_STACK_SIZE, 10240); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_IDLE_STACK_SIZE, 320); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_HAS_FLASH_LOAD_OFFSET, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_CPU_HAS_ARM_MPU, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_TICKLESS_KERNEL, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_CLOCK_CONTROL_INIT_PRIORITY, 30); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_USE_DT_CODE_PARTITION, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_FPU, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_HW_STACK_PROTECTION, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_SERIAL_INIT_PRIORITY, 50); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_GPIO, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_SERIAL, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_KERNEL_ENTRY, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_LOG, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_SYSTEM_WORKQUEUE_STACK_SIZE, 1024); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_DCACHE_LINE_SIZE, 32); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_GEN_IRQ_VECTOR_TABLE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_SOC, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ARCH_SW_ISR_TABLE_ALIGN, 4); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_NRF_RTC_TIMER, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_LOG_DOMAIN_NAME, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_BUILD_OUTPUT_HEX, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_CLOCK_CONTROL, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ARCH_HAS_CUSTOM_BUSY_WAIT, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_SOC_HAS_TIMING_FUNCTIONS, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_FLASH_INIT_PRIORITY, 50); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_GEN_ISR_TABLES, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_GEN_IRQ_START_VECTOR, 0); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_GEN_SW_ISR_TABLE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_SRAM_OFFSET, 0x0); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_CONSOLE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_SOC_SERIES, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ARCH_IRQ_VECTOR_TABLE_ALIGN, 4); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ISR_STACK_SIZE, 2048); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_MINIMAL_LIBC_OPTIMIZE_STRING_FOR_SIZE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ICACHE_LINE_SIZE, 32); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_DT_HAS_ARM_ARMV8M_MPU_ENABLED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_DT_HAS_ARM_CORTEX_M33F_ENABLED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_DT_HAS_ARM_CRYPTOCELL_310_ENABLED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_DT_HAS_ARM_V8M_NVIC_ENABLED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_DT_HAS_ATMEL_AT24_ENABLED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_DT_HAS_FIXED_PARTITIONS_ENABLED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_DT_HAS_GPIO_KEYS_ENABLED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_DT_HAS_GPIO_LEDS_ENABLED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_DT_HAS_MMIO_SRAM_ENABLED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_DT_HAS_NORDIC_NPM1300_ENABLED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_DT_HAS_NORDIC_NPM1300_CHARGER_ENABLED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_DT_HAS_NORDIC_NPM1300_REGULATOR_ENABLED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_DT_HAS_NORDIC_NRF_CLOCK_ENABLED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_DT_HAS_NORDIC_NRF_CTRLAPPERI_ENABLED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_DT_HAS_NORDIC_NRF_DPPIC_ENABLED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_DT_HAS_NORDIC_NRF_EGU_ENABLED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_DT_HAS_NORDIC_NRF_FICR_ENABLED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_DT_HAS_NORDIC_NRF_GPIO_ENABLED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_DT_HAS_NORDIC_NRF_GPIOTE_ENABLED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_DT_HAS_NORDIC_NRF_GPREGRET_ENABLED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_DT_HAS_NORDIC_NRF_IPC_ENABLED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_DT_HAS_NORDIC_NRF_KMU_ENABLED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_DT_HAS_NORDIC_NRF_PINCTRL_ENABLED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_DT_HAS_NORDIC_NRF_POWER_ENABLED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_DT_HAS_NORDIC_NRF_PWM_ENABLED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_DT_HAS_NORDIC_NRF_REGULATORS_ENABLED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_DT_HAS_NORDIC_NRF_SAADC_ENABLED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_DT_HAS_NORDIC_NRF_SPU_ENABLED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_DT_HAS_NORDIC_NRF_TWIM_ENABLED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_DT_HAS_NORDIC_NRF_UARTE_ENABLED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_DT_HAS_NORDIC_NRF_UICR_ENABLED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_DT_HAS_NORDIC_NRF_VMC_ENABLED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_DT_HAS_NORDIC_NRF_WDT_ENABLED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_DT_HAS_NORDIC_NRF91_FLASH_CONTROLLER_ENABLED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_DT_HAS_PWM_LEDS_ENABLED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_DT_HAS_REGULATOR_FIXED_ENABLED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_DT_HAS_SOC_NV_FLASH_ENABLED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_DT_HAS_ST_LIS2DH_ENABLED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_DT_HAS_ZEPHYR_BT_HCI_ENTROPY_ENABLED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_NUM_METAIRQ_PRIORITIES, 0); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_MPSL_WORK_STACK_SIZE, 1024); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_WARN_EXPERIMENTAL, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_INIT_ARCH_HW_AT_BOOT, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_NORDIC_QSPI_NOR_FLASH_LAYOUT_PAGE_SIZE, 4096); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_NCS_MCUBOOT_IN_BUILD, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_PM_PARTITION_SIZE_PROVISION, 0x280); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_PM_PARTITION_SIZE_B0_IMAGE, 0x8000); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_IS_BOOTLOADER_IMG, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_SB_VALIDATION_INFO_MAGIC, 0x86518483); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_SB_VALIDATION_POINTER_MAGIC, 0x6919b47e); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_SB_VALIDATION_INFO_CRYPTO_ID, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_SB_VALIDATION_INFO_VERSION, 2); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_SB_VALIDATION_METADATA_OFFSET, 0); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_SB_VALIDATE_FW_SIGNATURE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_SYSTEM_WORKQUEUE_PRIORITY, -2); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_HEAP_MEM_POOL_SIZE, 0); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_PCD_VERSION_PAGE_BUF_SIZE, 2046); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_NRF_CLOUD_CLIENT_ID_SRC_COMPILE_TIME, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_NRF_CLOUD_CLIENT_ID, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_FOTA_USE_NRF_CLOUD_SETTINGS_AREA, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_FOTA_DL_TIMEOUT_MIN, 15); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_NRF_CLOUD_ALERT_LOG_LEVEL_DEFAULT, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_NRF_CLOUD_ALERT_LOG_LEVEL, 0); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_NRF_CLOUD_LOG_OUTPUT_LEVEL, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_NRF_CLOUD_LOG_BUF_SIZE, 256); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_NRF_CLOUD_LOG_LOG_LEVEL_DEFAULT, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_NRF_CLOUD_LOG_LOG_LEVEL, 0); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_NRF_CLOUD_LOG_LEVEL_DEFAULT, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_NRF_CLOUD_LOG_LEVEL, 0); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_MPSL_FEM_LOG_LEVEL_DEFAULT, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_MPSL_FEM_LOG_LEVEL, 0); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_MPSL_THREAD_COOP_PRIO, 8); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_MPSL_TIMESLOT_SESSION_COUNT, 0); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_MPSL_LOG_LEVEL_DEFAULT, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_MPSL_LOG_LEVEL, 0); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_PARTITION_MANAGER_ENABLED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_FLASH_MAP_CUSTOM, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_SRAM_SIZE, 88); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_SRAM_BASE_ADDRESS, 0x20000000); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_PM_EXTERNAL_FLASH_BASE, 0x0); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_PM_EXTERNAL_FLASH_PATH, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_PM_EXTERNAL_FLASH_SIZE_BITS, 0); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_PM_SRAM_BASE, 0x20000000); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_PM_SRAM_SIZE, 0x40000); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_MGMT_FMFU_LOG_LEVEL_DEFAULT, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_MGMT_FMFU_LOG_LEVEL, 0); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_MGMT_SUITFU_TRIGGER_UPDATE_RESET_DELAY_MS, 100); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_MGMT_SUITFU_AUTO_REGISTER_HANDLERS, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_MGMT_SUITFU_GRP_IMG, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_MGMT_SUITFU_IMAGE_NUMBER, 0); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_MGMT_SUITFU_LOG_LEVEL_DEFAULT, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_MGMT_SUITFU_LOG_LEVEL, 0); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_AUDIO_MODULE_NAME_SIZE, 20); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_AUDIO_MODULE_LOG_LEVEL_DEFAULT, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_AUDIO_MODULE_LOG_LEVEL, 0); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_COMMON_LIBC_MALLOC_ARENA_SIZE, 0); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_POSIX_MAX_FDS, 4); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_WFA_QT_LOG_LEVEL_DEFAULT, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_WFA_QT_LOG_LEVEL, 0); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_WFA_QT_THREAD_STACK_SIZE, 4096); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_WFA_QT_REBOOT_TIMEOUT_MS, 1000); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_WFA_QT_DEFAULT_INTERFACE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_WPAS_READY_TIMEOUT_MS, 10000); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_NRF_SPU_FLASH_REGION_SIZE, 0x8000); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_FPROTECT_BLOCK_SIZE, 0x8000); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_FPROTECT, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_HW_UNIQUE_KEY_SUPPORTED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_HW_UNIQUE_KEY_PARTITION_SIZE, 0x0); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_NCS_BOOT_BANNER, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_NCS_APPLICATION_BOOT_BANNER_STRING, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_NCS_NCS_BOOT_BANNER_STRING, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_NCS_ZEPHYR_BOOT_BANNER_STRING, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_HW_CC3XX, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_NRFX_GPIOTE_NUM_OF_EVT_HANDLERS, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZTEST_MULTICORE_DEFAULT_SETTINGS, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_NRF_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_SIGN_IMAGES, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_DT_FLASH_WRITE_BLOCK_SIZE, 4); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_MCUBOOT_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_MBEDTLS_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_OBERON_PSA_CRYPTO_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_TFM_BOARD, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_TRUSTED_FIRMWARE_M_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_PSA_ARCH_TESTS_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_SOC_HWMV1_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_CJSON_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_AZURE_SDK_FOR_C_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_CIRRUS_LOGIC_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_OPENTHREAD_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_SUIT_ENVELOPE_TEMPLATE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_SUIT_ENVELOPE_TARGET, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_SUIT_ENVELOPE_OUTPUT_ARTIFACT, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_SUIT_ENVELOPE_OUTPUT_MPI_MERGE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_SUIT_GENERATOR_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_SUIT_PLATFORM_DRY_RUN_SUPPORT, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_SUIT_PROCESSOR_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_MEMFAULT_FIRMWARE_SDK_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_COREMARK_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_CANOPENNODE_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_CHRE_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_LZ4_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_NANOPB_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_TF_M_TESTS_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_ZSCILIB_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_CMSIS_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_HAS_CMSIS_CORE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_HAS_CMSIS_CORE_M, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_CMSIS_DSP_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_CMSIS_NN_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_FATFS_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_HAL_NORDIC_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_HAS_NRFX, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_NRFX_CLOCK, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_NRFX_CLOCK_LFXO_TWO_STAGE_ENABLED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_NRFX_DPPI, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_NRFX_GPIOTE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_NRFX_GPIOTE0, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_NRFX_NVMC, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_NRFX_WDT, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_NRFX_WDT0, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_HAL_ST_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_HAL_WURTHELEKTRONIK_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_LIBMETAL_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_LIBLC3_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_LITTLEFS_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_LORAMAC_NODE_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_LVGL_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_MIPI_SYS_T_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_NRF_HW_MODELS_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_OPEN_AMP_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_PICOLIBC_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_SEGGER_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_HAS_SEGGER_RTT, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_TINYCRYPT_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_UOSCORE_UEDHOC_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_ZCBOR_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_NRF_MODEM_SHMEM_CTRL_SIZE, 0x4e8); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_HAS_HW_NRF_CC3XX, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_NRF_CC3XX_PLATFORM, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_CC3XX_MUTEX_LOCK, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_NRF_802154_SOURCE_NRFXLIB, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_NRFXLIB_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ZEPHYR_CONNECTEDHOMEIP_MODULE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_MCUBOOT_BOOTUTIL_LIB, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_BOARD, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_BOARD_REVISION, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_BOARD_TARGET, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_BOARD_CONEXIO_STRATUS_PRO, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_BOARD_CONEXIO_STRATUS_PRO_NRF9151, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_BOARD_QUALIFIERS, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_SOC_FAMILY, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_SOC_FAMILY_NORDIC_NRF, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_SOC_SERIES_NRF91X, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_SOC_NRF9120, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_SOC_NRF9151_LACA, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_HAS_HW_NRF_CC310, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_HAS_HW_NRF_CLOCK, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_HAS_HW_NRF_CTRLAP, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_HAS_HW_NRF_DPPIC, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_HAS_HW_NRF_EGU0, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_HAS_HW_NRF_EGU1, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_HAS_HW_NRF_EGU2, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_HAS_HW_NRF_EGU3, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_HAS_HW_NRF_EGU4, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_HAS_HW_NRF_EGU5, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_HAS_HW_NRF_GPIO0, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_HAS_HW_NRF_GPIOTE0, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_HAS_HW_NRF_IPC, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_HAS_HW_NRF_KMU, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_HAS_HW_NRF_NVMC_PE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_HAS_HW_NRF_POWER, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_HAS_HW_NRF_PWM0, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_HAS_HW_NRF_REGULATORS, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_HAS_HW_NRF_SAADC, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_HAS_HW_NRF_SPU, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_HAS_HW_NRF_TWIM2, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_HAS_HW_NRF_UARTE0, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_HAS_HW_NRF_VMC, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_HAS_HW_NRF_WDT0, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_NRF_ENABLE_ICACHE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_NRF_SPU_FLASH_REGION_ALIGNMENT, 0x8000); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_NRF_SPU_RAM_REGION_SIZE, 0x2000); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_NRF_SPU_RAM_REGION_ALIGNMENT, 0x2000); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_NRF_RTC_TIMER_USER_CHAN_COUNT, 0); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_NRF_SOC_SECURE_SUPPORTED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_NRF_APPROTECT_USE_UICR, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_GPIO_INIT_PRIORITY, 40); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_SOC_LOG_LEVEL_DEFAULT, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_SOC_LOG_LEVEL, 0); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_SOC_COMPATIBLE_NRF, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ARCH, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ARCH_HAS_SINGLE_THREAD_SUPPORT, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_CPU_CORTEX, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ARM_MPU_REGION_MIN_ALIGN_AND_SIZE, 4); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_CPU_CORTEX_M, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ISA_THUMB2, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ASSEMBLER_ISA_THUMB2, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_COMPILER_ISA_THUMB2, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_STACK_ALIGN_DOUBLE_WORD, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_FAULT_DUMP, 2); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_BUILTIN_STACK_GUARD, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ARM_STACK_PROTECTION, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_FP_HARDABI, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_FP16, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_FP16_IEEE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_CPU_CORTEX_M33, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_CPU_CORTEX_M_HAS_SYSTICK, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_CPU_CORTEX_M_HAS_DWT, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_CPU_CORTEX_M_HAS_BASEPRI, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_CPU_CORTEX_M_HAS_VTOR, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_CPU_CORTEX_M_HAS_SPLIM, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_CPU_CORTEX_M_HAS_PROGRAMMABLE_FAULT_PRIOS, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_CPU_CORTEX_M_HAS_CMSE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ARMV7_M_ARMV8_M_MAINLINE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ARMV8_M_MAINLINE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ARMV8_M_SE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ARMV7_M_ARMV8_M_FP, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ARMV8_M_DSP, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_NULL_POINTER_EXCEPTION_DETECTION_NONE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ARM_TRUSTZONE_M, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_CPU_HAS_NRF_IDAU, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ARM, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ARCH_IS_SET, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ARCH_LOG_LEVEL_DEFAULT, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ARCH_LOG_LEVEL, 0); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_LITTLE_ENDIAN, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_GEN_PRIV_STACKS, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ISR_TABLES_LOCAL_DECLARATION_SUPPORTED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_IRQ_VECTOR_TABLE_JUMP_BY_ADDRESS, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_EXCEPTION_DEBUG, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ARCH_HAS_TIMING_FUNCTIONS, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ARCH_HAS_TRUSTED_EXECUTION, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ARCH_HAS_STACK_PROTECTION, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ARCH_HAS_RAMFUNC_SUPPORT, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ARCH_HAS_NESTED_EXCEPTION_DETECTION, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ARCH_SUPPORTS_COREDUMP, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ARCH_SUPPORTS_ARCH_HW_INIT, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ARCH_SUPPORTS_ROM_START, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ARCH_HAS_EXTRA_EXCEPTION_INFO, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ARCH_HAS_THREAD_LOCAL_STORAGE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ARCH_HAS_SUSPEND_TO_RAM, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ARCH_HAS_THREAD_ABORT, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ARCH_HAS_CODE_DATA_RELOCATION, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_CPU_HAS_TEE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_CPU_HAS_FPU, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_CPU_HAS_MPU, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_TOOLCHAIN_HAS_BUILTIN_FFS, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_KERNEL_LOG_LEVEL_DEFAULT, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_KERNEL_LOG_LEVEL, 0); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_NUM_COOP_PRIORITIES, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_NUM_PREEMPT_PRIORITIES, 0); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_MAIN_THREAD_PRIORITY, -2); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_COOP_ENABLED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_PRIORITY_CEILING, -127); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_THREAD_STACK_INFO, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_SCHED_DUMB, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_WAITQ_DUMB, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ERRNO, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_BARRIER_OPERATIONS_ARCH, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ATOMIC_OPERATIONS_BUILTIN, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_NUM_MBOX_ASYNC_MSGS, 10); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_KERNEL_MEM_POOL, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ARCH_HAS_CUSTOM_SWAP_TO_MAIN, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_SWAP_NONATOMIC, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_SYS_CLOCK_EXISTS, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_TIMEOUT_64BIT, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_SYS_CLOCK_MAX_TIMEOUT_DAYS, 365); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_MP_NUM_CPUS, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_TOOLCHAIN_SUPPORTS_THREAD_LOCAL_STORAGE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_KERNEL_INIT_PRIORITY_OBJECTS, 30); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_KERNEL_INIT_PRIORITY_DEFAULT, 40); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_KERNEL_INIT_PRIORITY_DEVICE, 50); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_APPLICATION_INIT_PRIORITY, 90); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_CLOCK_CONTROL_LOG_LEVEL_DEFAULT, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_CLOCK_CONTROL_LOG_LEVEL, 0); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_CLOCK_CONTROL_NRF, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_CLOCK_CONTROL_NRF_K32SRC_XTAL, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_CLOCK_CONTROL_NRF_K32SRC_50PPM, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_CLOCK_CONTROL_NRF_ACCURACY, 50); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_CONSOLE_INPUT_MAX_LINE_LEN, 128); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_CONSOLE_HAS_DRIVER, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_CONSOLE_INIT_PRIORITY, 60); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_UART_CONSOLE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_UART_CONSOLE_LOG_LEVEL_DEFAULT, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_UART_CONSOLE_LOG_LEVEL, 0); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_FLASH_HAS_DRIVER_ENABLED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_FLASH_HAS_PAGE_LAYOUT, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_FLASH, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_FLASH_LOG_LEVEL_DEFAULT, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_FLASH_LOG_LEVEL, 0); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_FLASH_PAGE_LAYOUT, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_SOC_FLASH_NRF, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_SOC_FLASH_NRF_RADIO_SYNC_NONE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_GPIO_LOG_LEVEL_DEFAULT, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_GPIO_LOG_LEVEL, 0); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_GPIO_NRFX, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_GPIO_NRFX_INTERRUPT, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_INTC_INIT_PRIORITY, 40); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_INTC_LOG_LEVEL_DEFAULT, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_INTC_LOG_LEVEL, 0); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_PINCTRL_LOG_LEVEL_DEFAULT, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_PINCTRL_LOG_LEVEL, 0); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_PINCTRL_STORE_REG, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_PINCTRL_NRF, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_SERIAL_HAS_DRIVER, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_SERIAL_SUPPORT_ASYNC, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_SERIAL_SUPPORT_INTERRUPT, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_UART_LOG_LEVEL_DEFAULT, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_UART_LOG_LEVEL, 0); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_UART_NRFX, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_UART_NRFX_UARTE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_UART_NRFX_UARTE_LEGACY_SHIM, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_UART_0_ENHANCED_POLL_OUT, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_UART_0_NRF_TX_BUFFER_SIZE, 32); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_SYSTEM_CLOCK_INIT_PRIORITY, 0); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_TICKLESS_CAPABLE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_SYSTEM_TIMER_HAS_DISABLE_SUPPORT, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_SYSTEM_CLOCK_WAIT_FOR_STABILITY, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_NRF_USBD_COMMON_LOG_LEVEL_DEFAULT, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_NRF_USBD_COMMON_LOG_LEVEL, 0); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_USBC_LOG_LEVEL_DEFAULT, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_USBC_LOG_LEVEL, 0); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_FULL_LIBC_SUPPORTED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_MINIMAL_LIBC_SUPPORTED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_NEWLIB_LIBC_SUPPORTED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_PICOLIBC_SUPPORTED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_MINIMAL_LIBC, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_HAS_NEWLIB_LIBC_NANO, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_COMMON_LIBC_ABORT, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_COMMON_LIBC_GMTIME_R, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_COMMON_LIBC_MALLOC, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_COMMON_LIBC_CALLOC, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_COMMON_LIBC_REALLOCARRAY, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_COMMON_LIBC_STRNLEN, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_MINIMAL_LIBC_NON_REENTRANT_FUNCTIONS, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_MINIMAL_LIBC_MALLOC, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_MINIMAL_LIBC_MALLOC_ARENA_SIZE, -2); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_MINIMAL_LIBC_CALLOC, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_MINIMAL_LIBC_REALLOCARRAY, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_MINIMAL_LIBC_TIME, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_STDOUT_CONSOLE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_NEED_LIBC_MEM_PARTITION, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_SYS_HEAP_ALLOC_LOOPS, 3); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_SYS_HEAP_AUTO, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_HAS_POWEROFF, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_CBPRINTF_NANO, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_CBPRINTF_FULL_INTEGRAL, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_CBPRINTF_LIBC_SUBSTS, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_CBPRINTF_PACKAGE_LOG_LEVEL_DEFAULT, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_CBPRINTF_PACKAGE_LOG_LEVEL, 0); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_CBPRINTF_CONVERT_CHECK_PTR, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_POSIX_ENV_LOG_LEVEL_DEFAULT, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_POSIX_ENV_LOG_LEVEL, 0); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_SEM_VALUE_MAX, 32767); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_SEM_NAMELEN_MAX, 16); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_POSIX_RTSIG_MAX, 0); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_POSIX_PAGE_SIZE_BITS, 6); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_LIBGCC_RTLIB, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_NOTIFY, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ONOFF, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_PRINTK, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_EARLY_CONSOLE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ASSERT_VERBOSE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_LLEXT_EDK_NAME, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_LOG_CORE_INIT_PRIORITY, 0); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_LOG_MODE_MINIMAL, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_LOG_DEFAULT_LEVEL, 0); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_LOG_OVERRIDE_LEVEL, 0); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_LOG_MAX_LEVEL, 4); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_LOG_USE_VLA, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_LOG_SIMPLE_MSG_OPTIMIZE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_TIMER_RANDOM_INITIAL_STATE, 123456789); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_FLASH_MAP, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_COVERAGE_GCOV_HEAP_SIZE, 16384); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_TOOLCHAIN_ZEPHYR_0_16, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_TOOLCHAIN_ZEPHYR_SUPPORTS_THREAD_LOCAL_STORAGE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_LINKER_ORPHAN_SECTION_WARN, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ROM_END_OFFSET, 0x0); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_LD_LINKER_SCRIPT_SUPPORTED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_LD_LINKER_TEMPLATE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_LINKER_SORT_BY_ALIGNMENT, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_LINKER_GENERIC_SECTIONS_PRESENT_AT_BOOT, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_LINKER_LAST_SECTION_ID, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_LINKER_LAST_SECTION_ID_PATTERN, 0xE015E015); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_LINKER_USE_RELAX, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_LINKER_ITERABLE_SUBALIGN, 4); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_LINKER_DEVNULL_SUPPORT, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_STD_C99, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_TOOLCHAIN_SUPPORTS_GNU_EXTENSIONS, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_COMPILER_FREESTANDING, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_SIZE_OPTIMIZATIONS, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_COMPILER_TRACK_MACRO_EXPANSION, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_COMPILER_COLOR_DIAGNOSTICS, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_FORTIFY_SOURCE_NONE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_COMPILER_OPT, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_RUNTIME_ERROR_CHECKS, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_KERNEL_BIN_NAME, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_OUTPUT_STAT, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_OUTPUT_PRINT_MEMORY_USAGE, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_BUILD_OUTPUT_META, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_BUILD_OUTPUT_STRIP_PATHS, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_CHECK_INIT_PRIORITIES, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_WARN_DEPRECATED, 1); +GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ENFORCE_ZEPHYR_STDINT, 1); + +GEN_ABS_SYM_END diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/extra_kconfig_options.conf b/nrfdemo/build/mcuboot/zephyr/misc/generated/extra_kconfig_options.conf new file mode 100644 index 0000000..6089a23 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/extra_kconfig_options.conf @@ -0,0 +1,2 @@ + +CONFIG_NCS_MCUBOOT_IN_BUILD=y
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/struct_tags.json b/nrfdemo/build/mcuboot/zephyr/misc/generated/struct_tags.json new file mode 100644 index 0000000..b435977 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/struct_tags.json @@ -0,0 +1,89 @@ +{ + "__net_socket": [ + "modem_socket", + "net_context", + "dispatcher_context", + "spair", + "net_mgmt_socket", + "tls_context", + "websocket_context" + ], + "__subsystem": [ + "flash_driver_api", + "gpio_driver_api", + "uart_driver_api", + "shared_irq_driver_api", + "crypto_driver_api", + "adc_driver_api", + "auxdisplay_driver_api", + "bbram_driver_api", + "can_driver_api", + "cellular_driver_api", + "charger_driver_api", + "clock_control_driver_api", + "coredump_driver_api", + "counter_driver_api", + "dac_driver_api", + "dai_driver_api", + "display_driver_api", + "dma_driver_api", + "edac_driver_api", + "eeprom_driver_api", + "emul_bbram_driver_api", + "fuel_gauge_emul_driver_api", + "emul_sensor_driver_api", + "entropy_driver_api", + "espi_driver_api", + "espi_saf_driver_api", + "fpga_driver_api", + "fuel_gauge_driver_api", + "gnss_driver_api", + "hwspinlock_driver_api", + "i2c_driver_api", + "i2c_target_driver_api", + "i2s_driver_api", + "i3c_driver_api", + "ipm_driver_api", + "kscan_driver_api", + "led_driver_api", + "led_strip_driver_api", + "lora_driver_api", + "mbox_driver_api", + "mdio_driver_api", + "mipi_dbi_driver_api", + "mipi_dsi_driver_api", + "peci_driver_api", + "ps2_driver_api", + "ptp_clock_driver_api", + "pwm_driver_api", + "regulator_parent_driver_api", + "regulator_driver_api", + "reset_driver_api", + "retained_mem_driver_api", + "rtc_driver_api", + "sdhc_driver_api", + "sensor_driver_api", + "smbus_driver_api", + "spi_driver_api", + "syscon_driver_api", + "video_driver_api", + "w1_driver_api", + "wdt_driver_api", + "can_transceiver_driver_api", + "uart_mux_driver_api", + "i3c_target_driver_api", + "its_driver_api", + "vtd_driver_api", + "tgpio_driver_api", + "pcie_ctrl_driver_api", + "pcie_ep_driver_api", + "svc_driver_api", + "bc12_emul_driver_api", + "bc12_driver_api", + "usbc_ppc_driver_api", + "tcpc_driver_api", + "usbc_vbus_driver_api", + "ivshmem_driver_api", + "ethphy_driver_api" + ] +}
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls.json b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls.json new file mode 100644 index 0000000..e5e1acf --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls.json @@ -0,0 +1,4242 @@ +[ + [ + [ + "int zephyr_read_stdin", + "char *buf, int nbytes" + ], + "libc-hooks.h", + true + ], + [ + [ + "int zephyr_write_stdout", + "const void *buf, int nbytes" + ], + "libc-hooks.h", + true + ], + [ + [ + "int zephyr_fputc", + "int c, FILE * stream" + ], + "libc-hooks.h", + true + ], + [ + [ + "size_t zephyr_fwrite", + "const void *ZRESTRICT ptr, size_t size,\n\t\t\t\tsize_t nitems, FILE *ZRESTRICT stream" + ], + "libc-hooks.h", + true + ], + [ + [ + "int __posix_clock_get_base", + "clockid_t clock_id, struct timespec *ts" + ], + "posix_clock.h", + true + ], + [ + [ + "int z_sys_mutex_kernel_lock", + "struct sys_mutex *mutex,\n\t\t\t\t k_timeout_t timeout" + ], + "mutex.h", + true + ], + [ + [ + "int z_sys_mutex_kernel_unlock", + "struct sys_mutex *mutex" + ], + "mutex.h", + true + ], + [ + [ + "void z_log_msg_simple_create_0", + "const void *source, uint32_t level,\n\t\t\t\t\t const char *fmt" + ], + "log_msg.h", + true + ], + [ + [ + "void z_log_msg_simple_create_1", + "const void *source, uint32_t level,\n\t\t\t\t\t const char *fmt, uint32_t arg" + ], + "log_msg.h", + true + ], + [ + [ + "void z_log_msg_simple_create_2", + "const void *source, uint32_t level,\n\t\t\t\t\t const char *fmt, uint32_t arg0, uint32_t arg1" + ], + "log_msg.h", + true + ], + [ + [ + "void z_log_msg_static_create", + "const void *source,\n\t\t\t\t\tconst struct log_msg_desc desc,\n\t\t\t\t\tuint8_t *package, const void *data" + ], + "log_msg.h", + true + ], + [ + [ + "void log_panic", + "void" + ], + "log_ctrl.h", + true + ], + [ + [ + "bool log_process", + "void" + ], + "log_ctrl.h", + true + ], + [ + [ + "uint32_t log_buffered_cnt", + "void" + ], + "log_ctrl.h", + true + ], + [ + [ + "uint32_t log_filter_set", + "struct log_backend const *const backend,\n\t\t\t\t uint32_t domain_id, int16_t source_id,\n\t\t\t\t uint32_t level" + ], + "log_ctrl.h", + true + ], + [ + [ + "uint32_t log_frontend_filter_set", + "int16_t source_id, uint32_t level" + ], + "log_ctrl.h", + true + ], + [ + [ + "int flash_read", + "const struct device *dev, off_t offset, void *data,\n\t\t\t size_t len" + ], + "flash.h", + true + ], + [ + [ + "int flash_write", + "const struct device *dev, off_t offset,\n\t\t\t const void *data,\n\t\t\t size_t len" + ], + "flash.h", + true + ], + [ + [ + "int flash_erase", + "const struct device *dev, off_t offset, size_t size" + ], + "flash.h", + true + ], + [ + [ + "int flash_get_page_info_by_offs", + "const struct device *dev,\n\t\t\t\t\t off_t offset,\n\t\t\t\t\t struct flash_pages_info *info" + ], + "flash.h", + true + ], + [ + [ + "int flash_get_page_info_by_idx", + "const struct device *dev,\n\t\t\t\t\t uint32_t page_index,\n\t\t\t\t\t struct flash_pages_info *info" + ], + "flash.h", + true + ], + [ + [ + "size_t flash_get_page_count", + "const struct device *dev" + ], + "flash.h", + true + ], + [ + [ + "int flash_sfdp_read", + "const struct device *dev, off_t offset,\n\t\t\t void *data, size_t len" + ], + "flash.h", + true + ], + [ + [ + "int flash_read_jedec_id", + "const struct device *dev, uint8_t *id" + ], + "flash.h", + true + ], + [ + [ + "size_t flash_get_write_block_size", + "const struct device *dev" + ], + "flash.h", + true + ], + [ + [ + "const struct flash_parameters *flash_get_parameters", + "const struct device *dev" + ], + "flash.h", + true + ], + [ + [ + "int flash_ex_op", + "const struct device *dev, uint16_t code,\n\t\t\t const uintptr_t in, void *out" + ], + "flash.h", + true + ], + [ + [ + "int gpio_pin_interrupt_configure", + "const struct device *port,\n\t\t\t\t\t gpio_pin_t pin,\n\t\t\t\t\t gpio_flags_t flags" + ], + "gpio.h", + true + ], + [ + [ + "int gpio_pin_configure", + "const struct device *port,\n\t\t\t\t gpio_pin_t pin,\n\t\t\t\t gpio_flags_t flags" + ], + "gpio.h", + true + ], + [ + [ + "int gpio_port_get_direction", + "const struct device *port, gpio_port_pins_t map,\n\t\t\t\t gpio_port_pins_t *inputs, gpio_port_pins_t *outputs" + ], + "gpio.h", + true + ], + [ + [ + "int gpio_pin_get_config", + "const struct device *port, gpio_pin_t pin,\n\t\t\t\t gpio_flags_t *flags" + ], + "gpio.h", + true + ], + [ + [ + "int gpio_port_get_raw", + "const struct device *port,\n\t\t\t\tgpio_port_value_t *value" + ], + "gpio.h", + true + ], + [ + [ + "int gpio_port_set_masked_raw", + "const struct device *port,\n\t\t\t\t gpio_port_pins_t mask,\n\t\t\t\t gpio_port_value_t value" + ], + "gpio.h", + true + ], + [ + [ + "int gpio_port_set_bits_raw", + "const struct device *port,\n\t\t\t\t gpio_port_pins_t pins" + ], + "gpio.h", + true + ], + [ + [ + "int gpio_port_clear_bits_raw", + "const struct device *port,\n\t\t\t\t gpio_port_pins_t pins" + ], + "gpio.h", + true + ], + [ + [ + "int gpio_port_toggle_bits", + "const struct device *port,\n\t\t\t\t gpio_port_pins_t pins" + ], + "gpio.h", + true + ], + [ + [ + "int gpio_get_pending_int", + "const struct device *dev" + ], + "gpio.h", + true + ], + [ + [ + "int uart_err_check", + "const struct device *dev" + ], + "uart.h", + true + ], + [ + [ + "int uart_poll_in", + "const struct device *dev, unsigned char *p_char" + ], + "uart.h", + true + ], + [ + [ + "int uart_poll_in_u16", + "const struct device *dev, uint16_t *p_u16" + ], + "uart.h", + true + ], + [ + [ + "void uart_poll_out", + "const struct device *dev,\n\t\t\t unsigned char out_char" + ], + "uart.h", + true + ], + [ + [ + "void uart_poll_out_u16", + "const struct device *dev, uint16_t out_u16" + ], + "uart.h", + true + ], + [ + [ + "int uart_configure", + "const struct device *dev,\n\t\t\t const struct uart_config *cfg" + ], + "uart.h", + true + ], + [ + [ + "int uart_config_get", + "const struct device *dev,\n\t\t\t struct uart_config *cfg" + ], + "uart.h", + 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*data,\n\t\t\t uint16_t len" + ], + "auxdisplay.h", + false + ], + [ + [ + "int auxdisplay_custom_command", + "const struct device *dev,\n\t\t\t\t\tstruct auxdisplay_custom_data *data" + ], + "auxdisplay.h", + false + ], + [ + [ + "int bbram_check_invalid", + "const struct device *dev" + ], + "bbram.h", + false + ], + [ + [ + "int bbram_check_standby_power", + "const struct device *dev" + ], + "bbram.h", + false + ], + [ + [ + "int bbram_check_power", + "const struct device *dev" + ], + "bbram.h", + false + ], + [ + [ + "int bbram_get_size", + "const struct device *dev, size_t *size" + ], + "bbram.h", + false + ], + [ + [ + "int bbram_read", + "const struct device *dev, size_t offset, size_t size,\n\t\t\t uint8_t *data" + ], + "bbram.h", + false + ], + [ + [ + "int bbram_write", + "const struct device *dev, size_t offset, size_t size,\n\t\t\t const uint8_t *data" + ], + "bbram.h", + false + ], + [ + [ + "int can_get_core_clock", + "const struct device *dev, uint32_t *rate" + ], + "can.h", + false + ], + [ + [ + "uint32_t can_get_bitrate_min", + "const struct device *dev" + ], + "can.h", + false + ], + [ + [ + "uint32_t can_get_bitrate_max", + "const struct device *dev" + ], + "can.h", + false + ], + [ + [ + "const struct can_timing *can_get_timing_min", + "const struct device *dev" + ], + "can.h", + false + ], + [ + [ + "const struct can_timing *can_get_timing_max", + "const struct device *dev" + ], + "can.h", + false + ], + [ + [ + "int can_calc_timing", + "const struct device *dev, struct can_timing *res,\n\t\t\t uint32_t bitrate, uint16_t sample_pnt" + ], + "can.h", + false + ], + [ + [ + "const struct can_timing *can_get_timing_data_min", + "const struct device *dev" + ], + "can.h", + false + ], + [ + [ + "const struct can_timing *can_get_timing_data_max", + "const struct device *dev" + ], + "can.h", + false + ], + [ + [ + "int can_calc_timing_data", + "const struct device *dev, struct can_timing *res,\n\t\t\t\t uint32_t bitrate, uint16_t sample_pnt" + ], + "can.h", + false + ], + [ + [ + "int can_set_timing_data", + "const struct device *dev,\n\t\t\t\t const struct can_timing *timing_data" + ], + "can.h", + false + ], + [ + [ + "int can_set_bitrate_data", + "const struct device *dev, uint32_t bitrate_data" + ], + "can.h", + false + ], + [ + [ + "int can_set_timing", + "const struct device *dev,\n\t\t\t const struct can_timing *timing" + ], + "can.h", + false + ], + [ + [ + "int can_get_capabilities", + "const struct device *dev, can_mode_t *cap" + ], + "can.h", + false + ], + [ + [ + "const struct device *can_get_transceiver", + "const struct device *dev" + ], + "can.h", + false + ], + [ + [ + "int can_start", + "const struct device *dev" + ], + "can.h", + false + ], + [ + [ + "int can_stop", + "const struct device *dev" + ], + "can.h", + false + ], + [ + [ + "int can_set_mode", + "const struct device *dev, can_mode_t mode" + ], + "can.h", + false + ], + [ + [ + "can_mode_t can_get_mode", + "const struct device *dev" + ], + "can.h", + false + ], + [ + [ + "int can_set_bitrate", + "const struct device *dev, uint32_t bitrate" + ], + "can.h", + false + ], + [ + [ + "int can_send", + "const struct device *dev, const struct can_frame *frame,\n\t\t k_timeout_t timeout, can_tx_callback_t callback,\n\t\t void *user_data" + ], + "can.h", + false + ], + [ + [ + "int can_add_rx_filter_msgq", + "const struct device *dev, struct k_msgq *msgq,\n\t\t\t\t const struct can_filter *filter" + ], + "can.h", + false + ], + [ + [ + "void can_remove_rx_filter", + "const struct device *dev, int filter_id" + ], + "can.h", + false + ], + [ + [ + "int can_get_max_filters", + "const struct device *dev, bool ide" + ], + "can.h", + false + ], + [ + [ + "int can_get_state", + "const struct device *dev, enum can_state *state,\n\t\t\t struct can_bus_err_cnt *err_cnt" + ], + "can.h", + false + ], + [ + [ + "int can_recover", + "const struct device *dev, k_timeout_t timeout" + ], + "can.h", + false + ], + [ + [ + "uint32_t can_stats_get_bit_errors", + "const struct device *dev" + ], + "can.h", + false + ], + [ + [ + "uint32_t can_stats_get_bit0_errors", + "const struct device *dev" + ], + "can.h", + false + ], + [ + [ + "uint32_t can_stats_get_bit1_errors", + "const struct device *dev" + ], + "can.h", + false + ], + [ + [ + "uint32_t can_stats_get_stuff_errors", + "const struct device *dev" + ], + "can.h", + false + ], + [ + [ + "uint32_t can_stats_get_crc_errors", + "const struct device *dev" + ], + "can.h", + false + ], + [ + [ + "uint32_t can_stats_get_form_errors", + "const struct device *dev" + ], + "can.h", + false + ], + [ + [ + "uint32_t can_stats_get_ack_errors", + "const struct device *dev" + ], + "can.h", + false + ], + [ + [ + "uint32_t can_stats_get_rx_overruns", + "const struct device *dev" + ], + "can.h", + false + ], + [ + [ + "int charger_get_prop", + "const struct device *dev, const charger_prop_t prop,\n\t\t\t union charger_propval *val" + ], + "charger.h", + false + ], + [ + [ + "int charger_set_prop", + "const struct device *dev, const charger_prop_t prop,\n\t\t\t const union charger_propval *val" + ], + "charger.h", + false + ], + [ + [ + "int charger_charge_enable", + "const struct device *dev, const bool enable" + ], + "charger.h", + false + ], + [ + [ + "bool counter_is_counting_up", + "const struct device *dev" + ], + "counter.h", + false + ], + [ + [ + "uint8_t counter_get_num_of_channels", + "const struct device *dev" + ], + "counter.h", + false + ], + [ + [ + "uint32_t counter_get_frequency", + "const struct device *dev" + ], + "counter.h", + false + ], + [ + [ + "uint32_t counter_us_to_ticks", + "const struct device *dev, uint64_t us" + ], + "counter.h", + false + ], + [ + [ + "uint64_t counter_ticks_to_us", + "const struct device *dev, uint32_t ticks" + ], + "counter.h", + false + ], + [ + [ + "uint32_t counter_get_max_top_value", + "const struct device *dev" + ], + "counter.h", + false + ], + [ + [ + "int counter_start", + "const struct device *dev" + ], + "counter.h", + false + ], + [ + [ + "int counter_stop", + "const struct device *dev" + ], + "counter.h", + false + ], + [ + [ + "int counter_get_value", + "const struct device *dev, uint32_t *ticks" + ], + "counter.h", + false + ], + [ + [ + "int counter_get_value_64", + "const struct device *dev, uint64_t *ticks" + ], + "counter.h", + false + ], + [ + [ + "int counter_set_channel_alarm", + "const struct device *dev,\n\t\t\t\t\tuint8_t chan_id,\n\t\t\t\t\tconst struct counter_alarm_cfg *alarm_cfg" + ], + "counter.h", + false + ], + [ + [ + "int counter_cancel_channel_alarm", + "const struct device *dev,\n\t\t\t\t\t uint8_t chan_id" + ], + "counter.h", + false + ], + [ + [ + "int counter_set_top_value", + "const struct device *dev,\n\t\t\t\t const struct counter_top_cfg *cfg" + ], + "counter.h", + false + ], + [ + [ + "int counter_get_pending_int", + "const struct device *dev" + ], + "counter.h", + false + ], + [ + [ + "uint32_t counter_get_top_value", + "const struct device *dev" + ], + "counter.h", + false + ], + [ + [ + "int counter_set_guard_period", + "const struct device *dev,\n\t\t\t\t\tuint32_t ticks,\n\t\t\t\t\tuint32_t flags" + ], + "counter.h", + false + ], + [ + [ + "uint32_t counter_get_guard_period", + "const struct device *dev,\n\t\t\t\t\t uint32_t flags" + ], + "counter.h", + false + ], + [ + [ + "int dac_channel_setup", + "const struct device *dev,\n\t\t\t\tconst struct dac_channel_cfg *channel_cfg" + ], + "dac.h", + false + ], + [ + [ + "int dac_write_value", + "const struct device *dev, uint8_t channel,\n\t\t\t uint32_t value" + ], + "dac.h", + false + ], + [ + [ + "int dma_start", + "const struct device *dev, uint32_t channel" + ], + "dma.h", + false + ], + [ + [ + "int dma_stop", + "const struct device *dev, uint32_t channel" + ], + "dma.h", + false + ], + [ + [ + "int dma_suspend", + "const struct device *dev, uint32_t channel" + ], + "dma.h", + false + ], + [ + [ + "int dma_resume", + "const struct device *dev, uint32_t channel" + ], + "dma.h", + false + ], + [ + [ + "int dma_request_channel", + "const struct device *dev,\n\t\t\t\t void *filter_param" + ], + "dma.h", + false + ], + [ + [ + "void dma_release_channel", + "const struct device *dev,\n\t\t\t\t uint32_t channel" + ], + "dma.h", + false + ], + [ + [ + "int dma_chan_filter", + "const struct device *dev,\n\t\t\t\t int channel, void *filter_param" + ], + "dma.h", + false + ], + [ + [ + "int eeprom_read", + "const struct device *dev, off_t offset, void *data,\n\t\t\t size_t len" + ], + "eeprom.h", + false + ], + [ + [ + "int eeprom_write", + "const struct device *dev, off_t offset,\n\t\t\t const void *data,\n\t\t\t size_t len" + ], + "eeprom.h", + false + ], + [ + [ + "size_t eeprom_get_size", + "const struct device *dev" + ], + "eeprom.h", + false + ], + [ + [ + "int emul_fuel_gauge_set_battery_charging", + "const struct emul *target, uint32_t uV, int uA" + ], + "emul_fuel_gauge.h", + false + ], + [ + [ + "int emul_fuel_gauge_is_battery_cutoff", + "const struct emul *target, bool *cutoff" + ], + "emul_fuel_gauge.h", + false + ], + [ + [ + "int entropy_get_entropy", + "const struct device *dev,\n\t\t\t\t uint8_t *buffer,\n\t\t\t\t uint16_t length" + ], + "entropy.h", + false + ], + [ + [ + "int espi_config", + "const struct device *dev, struct espi_cfg *cfg" + ], + "espi.h", + false + ], + [ + [ + "bool espi_get_channel_status", + "const struct device *dev,\n\t\t\t\t enum espi_channel ch" + ], + "espi.h", + false + ], + [ + [ + "int espi_read_request", + "const struct device *dev,\n\t\t\t\tstruct espi_request_packet *req" + ], + "espi.h", + false + ], + [ + [ + "int espi_write_request", + "const struct device *dev,\n\t\t\t\t struct espi_request_packet *req" + ], + "espi.h", + false + ], + [ + [ + "int espi_read_lpc_request", + "const struct device *dev,\n\t\t\t\t enum lpc_peripheral_opcode op,\n\t\t\t\t uint32_t *data" + ], + "espi.h", + false + ], + [ + [ + "int espi_write_lpc_request", + "const struct device *dev,\n\t\t\t\t enum lpc_peripheral_opcode op,\n\t\t\t\t uint32_t *data" + ], + "espi.h", + false + ], + [ + [ + "int espi_send_vwire", + "const struct device *dev,\n\t\t\t enum espi_vwire_signal signal,\n\t\t\t uint8_t level" + ], + "espi.h", + false + ], + [ + [ + "int espi_receive_vwire", + "const struct device *dev,\n\t\t\t\t enum espi_vwire_signal signal,\n\t\t\t\t uint8_t *level" + ], + "espi.h", + false + ], + [ + [ + "int espi_send_oob", + "const struct device *dev,\n\t\t\t struct espi_oob_packet *pckt" + ], + "espi.h", + false + ], + [ + [ + "int espi_receive_oob", + "const struct device *dev,\n\t\t\t struct espi_oob_packet *pckt" + ], + "espi.h", + false + ], + [ + [ + "int espi_read_flash", + "const struct device *dev,\n\t\t\t struct espi_flash_packet *pckt" + ], + "espi.h", + false + ], + [ + [ + "int espi_write_flash", + "const struct device *dev,\n\t\t\t struct espi_flash_packet *pckt" + ], + "espi.h", + false + ], + [ + [ + "int espi_flash_erase", + "const struct device *dev,\n\t\t\t struct espi_flash_packet *pckt" + ], + "espi.h", + false + ], + [ + [ + "int espi_saf_config", + "const struct device *dev,\n\t\t\t const struct espi_saf_cfg *cfg" + ], + "espi_saf.h", + false + ], + [ + [ + "int espi_saf_set_protection_regions", + "\n\t\t\t\tconst struct device *dev,\n\t\t\t\tconst struct espi_saf_protection *pr" + ], + "espi_saf.h", + false + ], + [ + [ + "int espi_saf_activate", + "const struct device *dev" + ], + "espi_saf.h", + false + ], + [ + [ + "bool espi_saf_get_channel_status", + "const struct device *dev" + ], + "espi_saf.h", + false + ], + [ + [ + "int espi_saf_flash_read", + "const struct device *dev,\n\t\t\t\t struct espi_saf_packet *pckt" + ], + "espi_saf.h", + false + ], + [ + [ + "int espi_saf_flash_write", + "const struct device *dev,\n\t\t\t\t struct espi_saf_packet *pckt" + ], + "espi_saf.h", + false + ], + [ + [ + "int espi_saf_flash_erase", + "const struct device *dev,\n\t\t\t\t struct espi_saf_packet *pckt" + ], + "espi_saf.h", + false + ], + [ + [ + "int espi_saf_flash_unsuccess", + "const struct device *dev,\n\t\t\t\t struct espi_saf_packet *pckt" + ], + "espi_saf.h", + false + ], + [ + [ + "int fuel_gauge_get_prop", + "const struct device *dev, fuel_gauge_prop_t prop,\n\t\t\t\t union fuel_gauge_prop_val *val" + ], + "fuel_gauge.h", + false + ], + [ + [ + "int fuel_gauge_get_props", + "const struct device *dev, fuel_gauge_prop_t *props,\n\t\t\t\t union fuel_gauge_prop_val *vals, size_t len" + ], + "fuel_gauge.h", + false + ], + [ + [ + "int fuel_gauge_set_prop", + "const struct device *dev, fuel_gauge_prop_t prop,\n\t\t\t\t union fuel_gauge_prop_val val" + ], + "fuel_gauge.h", + false + ], + [ + [ + "int fuel_gauge_set_props", + "const struct device *dev, fuel_gauge_prop_t *props,\n\t\t\t\t union fuel_gauge_prop_val *vals, size_t len" + ], + "fuel_gauge.h", + false + ], + [ + [ + "int fuel_gauge_get_buffer_prop", + "const struct device *dev, fuel_gauge_prop_t prop_type,\n\t\t\t\t\t void *dst, size_t dst_len" + ], + "fuel_gauge.h", + false + ], + [ + [ + "int fuel_gauge_battery_cutoff", + "const struct device *dev" + ], + "fuel_gauge.h", + false + ], + [ + [ + "int gnss_set_fix_rate", + "const struct device *dev, uint32_t fix_interval_ms" + ], + "gnss.h", + false + ], + [ + [ + "int gnss_get_fix_rate", + "const struct device *dev, uint32_t *fix_interval_ms" + ], + "gnss.h", + false + ], + [ + [ + "int gnss_set_periodic_config", + "const struct device *dev,\n\t\t\t\t const struct gnss_periodic_config *config" + ], + "gnss.h", + false + ], + [ + [ + "int gnss_get_periodic_config", + "const struct device *dev,\n\t\t\t\t struct gnss_periodic_config *config" + ], + "gnss.h", + false + ], + [ + [ + "int gnss_set_navigation_mode", + "const struct device *dev,\n\t\t\t\t enum gnss_navigation_mode mode" + ], + "gnss.h", + false + ], + [ + [ + "int gnss_get_navigation_mode", + "const struct device *dev,\n\t\t\t\t enum gnss_navigation_mode *mode" + ], + "gnss.h", + false + ], + [ + [ + "int gnss_set_enabled_systems", + "const struct device *dev, gnss_systems_t systems" + ], + "gnss.h", + false + ], + [ + [ + "int gnss_get_enabled_systems", + "const struct device *dev, gnss_systems_t *systems" + ], + "gnss.h", + false + ], + [ + [ + "int gnss_get_supported_systems", + "const struct device *dev, gnss_systems_t *systems" + ], + "gnss.h", + false + ], + [ + [ + "ssize_t hwinfo_get_device_id", + "uint8_t *buffer, size_t length" + ], + "hwinfo.h", + false + ], + [ + [ + "int hwinfo_get_device_eui64", + "uint8_t *buffer" + ], + "hwinfo.h", + false + ], + [ + [ + "int hwinfo_get_reset_cause", + "uint32_t *cause" + ], + "hwinfo.h", + false + ], + [ + [ + "int hwinfo_clear_reset_cause", + "void" + ], + "hwinfo.h", + false + ], + [ + [ + "int hwinfo_get_supported_reset_cause", + "uint32_t *supported" + ], + "hwinfo.h", + false + ], + [ + [ + "int hwspinlock_trylock", + "const struct device *dev, uint32_t id" + ], + "hwspinlock.h", + false + ], + [ + [ + "void hwspinlock_lock", + "const struct device *dev, uint32_t id" + ], + "hwspinlock.h", + false + ], + [ + [ + "void hwspinlock_unlock", + "const struct device *dev, uint32_t id" + ], + "hwspinlock.h", + false + ], + [ + [ + "uint32_t hwspinlock_get_max_id", + "const struct device *dev" + ], + "hwspinlock.h", + false + ], + [ + [ + "int i2c_configure", + "const struct device *dev, uint32_t dev_config" + ], + "i2c.h", + false + ], + [ + [ + "int i2c_get_config", + "const struct device *dev, uint32_t *dev_config" + ], + "i2c.h", + false + ], + [ + [ + "int i2c_transfer", + "const struct device *dev,\n\t\t\t struct i2c_msg *msgs, uint8_t num_msgs,\n\t\t\t uint16_t addr" + ], + "i2c.h", + false + ], + [ + [ + "int i2c_recover_bus", + "const struct device *dev" + ], + "i2c.h", + false + ], + [ + [ + "int i2c_target_driver_register", + "const struct device *dev" + ], + "i2c.h", + false + ], + [ + [ + "int i2c_target_driver_unregister", + "const struct device *dev" + ], + "i2c.h", + false + ], + [ + [ + "int i2s_configure", + "const struct device *dev, enum i2s_dir dir,\n\t\t\t const struct i2s_config *cfg" + ], + "i2s.h", + false + ], + [ + [ + "int i2s_buf_read", + "const struct device *dev, void *buf, size_t *size" + ], + "i2s.h", + false + ], + [ + [ + "int i2s_buf_write", + "const struct device *dev, void *buf, size_t size" + ], + "i2s.h", + false + ], + [ + [ + "int i2s_trigger", + "const struct device *dev, enum i2s_dir dir,\n\t\t\t enum i2s_trigger_cmd cmd" + ], + "i2s.h", + false + ], + [ + [ + "int i3c_do_ccc", + "const struct device *dev,\n\t\t\t struct i3c_ccc_payload *payload" + ], + "i3c.h", + false + ], + [ + [ + "int i3c_transfer", + "struct i3c_device_desc *target,\n\t\t\t struct i3c_msg *msgs, uint8_t num_msgs" + ], + "i3c.h", + false + ], + [ + [ + "int ipm_send", + "const struct device *ipmdev, int wait, uint32_t id,\n\t\t const void *data, int size" + ], + "ipm.h", + false + ], + [ + [ + "int ipm_max_data_size_get", + "const struct device *ipmdev" + ], + "ipm.h", + false + ], + [ + [ + "uint32_t ipm_max_id_val_get", + "const struct device *ipmdev" + ], + "ipm.h", + false + ], + [ + [ + "int ipm_set_enabled", + "const struct device *ipmdev, int enable" + ], + "ipm.h", + false + ], + [ + [ + "void ipm_complete", + "const struct device *ipmdev" + ], + "ipm.h", + false + ], + [ + [ + "int kscan_config", + "const struct device *dev,\n\t\t\t kscan_callback_t callback" + ], + "kscan.h", + false + ], + [ + [ + "int kscan_enable_callback", + "const struct device *dev" + ], + "kscan.h", + false + ], + [ + [ + "int kscan_disable_callback", + "const struct device *dev" + ], + "kscan.h", + false + ], + [ + [ + "int led_blink", + "const struct device *dev, uint32_t led,\n\t\t\t uint32_t delay_on, uint32_t delay_off" + ], + "led.h", + false + ], + [ + [ + "int led_get_info", + "const struct device *dev, uint32_t led,\n\t\t\t const struct led_info **info" + ], + "led.h", + false + ], + [ + [ + "int led_set_brightness", + "const struct device *dev, uint32_t led,\n\t\t\t\t uint8_t value" + ], + "led.h", + false + ], + [ + [ + "int led_write_channels", + "const struct device *dev,\n\t\t\t\t uint32_t start_channel,\n\t\t\t\t uint32_t num_channels, const uint8_t *buf" + ], + "led.h", + false + ], + [ + [ + "int led_set_channel", + "const struct device *dev,\n\t\t\t uint32_t channel, uint8_t value" + ], + "led.h", + false + ], + [ + [ + "int led_set_color", + "const struct device *dev, uint32_t led,\n\t\t\t uint8_t num_colors, const uint8_t *color" + ], + "led.h", + false + ], + [ + [ + "int led_on", + "const struct device *dev, uint32_t led" + ], + "led.h", + false + ], + [ + [ + "int led_off", + "const struct device *dev, uint32_t led" + ], + "led.h", + false + ], + [ + [ + "int mbox_send", + "const struct device *dev, mbox_channel_id_t channel_id,\n\t\t\tconst struct mbox_msg *msg" + ], + "mbox.h", + false + ], + [ + [ + "int mbox_mtu_get", + "const struct device *dev" + ], + "mbox.h", + false + ], + [ + [ + "int mbox_set_enabled", + "const struct device *dev,\n\t\t\t mbox_channel_id_t channel_id, bool enabled" + ], + "mbox.h", + false + ], + [ + [ + "uint32_t mbox_max_channels_get", + "const struct device *dev" + ], + "mbox.h", + false + ], + [ + [ + "void mdio_bus_enable", + "const struct device *dev" + ], + "mdio.h", + false + ], + [ + [ + "void mdio_bus_disable", + "const struct device *dev" + ], + "mdio.h", + false + ], + [ + [ + "int mdio_read", + "const struct device *dev, uint8_t prtad, uint8_t regad,\n\t\t\tuint16_t *data" + ], + "mdio.h", + false + ], + [ + [ + "int mdio_write", + "const struct device *dev, uint8_t prtad, uint8_t regad,\n\t\t\t uint16_t data" + ], + "mdio.h", + false + ], + [ + [ + "int mdio_read_c45", + "const struct device *dev, uint8_t prtad,\n\t\t\t uint8_t devad, uint16_t regad, uint16_t *data" + ], + "mdio.h", + false + ], + [ + [ + "int mdio_write_c45", + "const struct device *dev, uint8_t prtad,\n\t\t\t uint8_t devad, uint16_t regad, uint16_t data" + ], + "mdio.h", + false + ], + [ + [ + "int peci_config", + "const struct device *dev, uint32_t bitrate" + ], + "peci.h", + false + ], + [ + [ + "int peci_enable", + "const struct device *dev" + ], + "peci.h", + false + ], + [ + [ + "int peci_disable", + "const struct device *dev" + ], + "peci.h", + false + ], + [ + [ + "int peci_transfer", + "const struct device *dev, struct peci_msg *msg" + ], + "peci.h", + false + ], + [ + [ + "int ps2_config", + "const struct device *dev,\n\t\t\t ps2_callback_t callback_isr" + ], + "ps2.h", + false + ], + [ + [ + "int ps2_write", + "const struct device *dev, uint8_t value" + ], + "ps2.h", + false + ], + [ + [ + "int ps2_read", + "const struct device *dev, uint8_t *value" + ], + "ps2.h", + false + ], + [ + [ + "int ps2_enable_callback", + "const struct device *dev" + ], + "ps2.h", + false + ], + [ + [ + "int ps2_disable_callback", + "const struct device *dev" + ], + "ps2.h", + false + ], + [ + [ + "int ptp_clock_get", + "const struct device *dev, struct net_ptp_time *tm" + ], + "ptp_clock.h", + false + ], + [ + [ + "int pwm_set_cycles", + "const struct device *dev, uint32_t channel,\n\t\t\t uint32_t period, uint32_t pulse,\n\t\t\t pwm_flags_t flags" + ], + "pwm.h", + false + ], + [ + [ + "int pwm_get_cycles_per_sec", + "const struct device *dev, uint32_t channel,\n\t\t\t\t uint64_t *cycles" + ], + "pwm.h", + false + ], + [ + [ + "int pwm_enable_capture", + "const struct device *dev, uint32_t channel" + ], + "pwm.h", + false + ], + [ + [ + "int pwm_disable_capture", + "const struct device *dev, uint32_t channel" + ], + "pwm.h", + false + ], + [ + [ + "int pwm_capture_cycles", + "const struct device *dev, uint32_t channel,\n\t\t\t\t pwm_flags_t flags, uint32_t *period,\n\t\t\t\t uint32_t *pulse, k_timeout_t timeout" + ], + "pwm.h", + false + ], + [ + [ + "int reset_status", + "const struct device *dev, uint32_t id, uint8_t *status" + ], + "reset.h", + false + ], + [ + [ + "int reset_line_assert", + "const struct device *dev, uint32_t id" + ], + "reset.h", + false + ], + [ + [ + "int reset_line_deassert", + "const struct device *dev, uint32_t id" + ], + "reset.h", + false + ], + [ + [ + "int reset_line_toggle", + "const struct device *dev, uint32_t id" + ], + "reset.h", + false + ], + [ + [ + "ssize_t retained_mem_size", + "const struct device *dev" + ], + "retained_mem.h", + false + ], + [ + [ + "int retained_mem_read", + "const struct device *dev, off_t offset, uint8_t *buffer,\n\t\t\t\tsize_t size" + ], + "retained_mem.h", + false + ], + [ + [ + "int retained_mem_write", + "const struct device *dev, off_t offset, const uint8_t *buffer,\n\t\t\t\t size_t size" + ], + "retained_mem.h", + false + ], + [ + [ + "int retained_mem_clear", + "const struct device *dev" + ], + "retained_mem.h", + false + ], + [ + [ + "int rtc_set_time", + "const struct device *dev, const struct rtc_time *timeptr" + ], + "rtc.h", + false + ], + [ + [ + "int rtc_get_time", + "const struct device *dev, struct rtc_time *timeptr" + ], + "rtc.h", + false + ], + [ + [ + "int rtc_alarm_get_supported_fields", + "const struct device *dev, uint16_t id,\n\t\t\t\t\t uint16_t *mask" + ], + "rtc.h", + false + ], + [ + [ + "int rtc_alarm_set_time", + "const struct device *dev, uint16_t id, uint16_t mask,\n\t\t\t\t const struct rtc_time *timeptr" + ], + "rtc.h", + false + ], + [ + [ + "int rtc_alarm_get_time", + "const struct device *dev, uint16_t id, uint16_t *mask,\n\t\t\t\t struct rtc_time *timeptr" + ], + "rtc.h", + false + ], + [ + [ + "int rtc_alarm_is_pending", + "const struct device *dev, uint16_t id" + ], + "rtc.h", + false + ], + [ + [ + "int rtc_alarm_set_callback", + "const struct device *dev, uint16_t id,\n\t\t\t\t rtc_alarm_callback callback, void *user_data" + ], + "rtc.h", + false + ], + [ + [ + "int rtc_update_set_callback", + "const struct device *dev, rtc_update_callback callback,\n\t\t\t\t void *user_data" + ], + "rtc.h", + false + ], + [ + [ + "int rtc_set_calibration", + "const struct device *dev, int32_t calibration" + ], + "rtc.h", + false + ], + [ + [ + "int rtc_get_calibration", + "const struct device *dev, int32_t *calibration" + ], + "rtc.h", + false + ], + [ + [ + "int sdhc_hw_reset", + "const struct device *dev" + ], + "sdhc.h", + false + ], + [ + [ + "int sdhc_request", + "const struct device *dev, struct sdhc_command *cmd,\n\t\t\t struct sdhc_data *data" + ], + "sdhc.h", + false + ], + [ + [ + "int sdhc_set_io", + "const struct device *dev, struct sdhc_io *io" + ], + "sdhc.h", + false + ], + [ + [ + "int sdhc_card_present", + "const struct device *dev" + ], + "sdhc.h", + false + ], + [ + [ + "int sdhc_execute_tuning", + "const struct device *dev" + ], + "sdhc.h", + false + ], + [ + [ + "int sdhc_card_busy", + "const struct device *dev" + ], + "sdhc.h", + false + ], + [ + [ + "int sdhc_get_host_props", + "const struct device *dev,\n\t\t\t\t struct sdhc_host_props *props" + ], + "sdhc.h", + false + ], + [ + [ + "int sdhc_enable_interrupt", + "const struct device *dev,\n\t\t\t\t sdhc_interrupt_cb_t callback,\n\t\t\t\t int sources, void *user_data" + ], + "sdhc.h", + false + ], + [ + [ + "int sdhc_disable_interrupt", + "const struct device *dev, int sources" + ], + "sdhc.h", + false + ], + [ + [ + "int sensor_attr_set", + "const struct device *dev,\n\t\t\t enum sensor_channel chan,\n\t\t\t enum sensor_attribute attr,\n\t\t\t const struct sensor_value *val" + ], + "sensor.h", + false + ], + [ + [ + "int sensor_attr_get", + "const struct device *dev,\n\t\t\t enum sensor_channel chan,\n\t\t\t enum sensor_attribute attr,\n\t\t\t struct sensor_value *val" + ], + "sensor.h", + false + ], + [ + [ + "int sensor_sample_fetch", + "const struct device *dev" + ], + "sensor.h", + false + ], + [ + [ + "int sensor_sample_fetch_chan", + "const struct device *dev,\n\t\t\t\t enum sensor_channel type" + ], + "sensor.h", + false + ], + [ + [ + "int sensor_channel_get", + "const struct device *dev,\n\t\t\t\t enum sensor_channel chan,\n\t\t\t\t struct sensor_value *val" + ], + "sensor.h", + false + ], + [ + [ + "int sensor_get_decoder", + "const struct device *dev,\n\t\t\t\t const struct sensor_decoder_api **decoder" + ], + "sensor.h", + false + ], + [ + [ + "int sensor_reconfigure_read_iodev", + "struct rtio_iodev *iodev, const struct device *sensor,\n\t\t\t\t\t const struct sensor_chan_spec *channels,\n\t\t\t\t\t size_t num_channels" + ], + "sensor.h", + false + ], + [ + [ + "int smbus_configure", + "const struct device *dev, uint32_t dev_config" + ], + "smbus.h", + false + ], + [ + [ + "int smbus_get_config", + "const struct device *dev, uint32_t *dev_config" + ], + "smbus.h", + false + ], + [ + [ + "int smbus_smbalert_remove_cb", + "const struct device *dev,\n\t\t\t\t struct smbus_callback *cb" + ], + "smbus.h", + false + ], + [ + [ + "int smbus_host_notify_remove_cb", + "const struct device *dev,\n\t\t\t\t\t struct smbus_callback *cb" + ], + "smbus.h", + false + ], + [ + [ + "int smbus_quick", + "const struct device *dev, uint16_t addr,\n\t\t\t enum smbus_direction direction" + ], + "smbus.h", + false + ], + [ + [ + "int smbus_byte_write", + "const struct device *dev, uint16_t addr,\n\t\t\t uint8_t byte" + ], + "smbus.h", + false + ], + [ + [ + "int smbus_byte_read", + "const struct device *dev, uint16_t addr,\n\t\t\t uint8_t *byte" + ], + "smbus.h", + false + ], + [ + [ + "int smbus_byte_data_write", + "const struct device *dev, uint16_t addr,\n\t\t\t\t uint8_t cmd, uint8_t byte" + ], + "smbus.h", + false + ], + [ + [ + "int smbus_byte_data_read", + "const struct device *dev, uint16_t addr,\n\t\t\t\t uint8_t cmd, uint8_t *byte" + ], + "smbus.h", + false + ], + [ + [ + "int smbus_word_data_write", + "const struct device *dev, uint16_t addr,\n\t\t\t\t uint8_t cmd, uint16_t word" + ], + "smbus.h", + false + ], + [ + [ + "int smbus_word_data_read", + "const struct device *dev, uint16_t addr,\n\t\t\t\t uint8_t cmd, uint16_t *word" + ], + "smbus.h", + false + ], + [ + [ + "int smbus_pcall", + "const struct device *dev, uint16_t addr,\n\t\t\t uint8_t cmd, uint16_t send_word, uint16_t *recv_word" + ], + "smbus.h", + false + ], + [ + [ + "int smbus_block_write", + "const struct device *dev, uint16_t addr,\n\t\t\t\tuint8_t cmd, uint8_t count, uint8_t *buf" + ], + "smbus.h", + false + ], + [ + [ + "int smbus_block_read", + "const struct device *dev, uint16_t addr,\n\t\t\t uint8_t cmd, uint8_t *count, uint8_t *buf" + ], + "smbus.h", + false + ], + [ + [ + "int smbus_block_pcall", + "const struct device *dev,\n\t\t\t\tuint16_t addr, uint8_t cmd,\n\t\t\t\tuint8_t snd_count, uint8_t *snd_buf,\n\t\t\t\tuint8_t *rcv_count, uint8_t *rcv_buf" + ], + "smbus.h", + false + ], + [ + [ + "int spi_transceive", + "const struct device *dev,\n\t\t\t const struct spi_config *config,\n\t\t\t const struct spi_buf_set *tx_bufs,\n\t\t\t const struct spi_buf_set *rx_bufs" + ], + "spi.h", + false + ], + [ + [ + "int spi_release", + "const struct device *dev,\n\t\t\t const struct spi_config *config" + ], + "spi.h", + false + ], + [ + [ + "int syscon_get_base", + "const struct device *dev, uintptr_t *addr" + ], + "syscon.h", + false + ], + [ + [ + "int syscon_read_reg", + "const struct device *dev, uint16_t reg, uint32_t *val" + ], + "syscon.h", + false + ], + [ + [ + "int syscon_write_reg", + "const struct device *dev, uint16_t reg, uint32_t val" + ], + "syscon.h", + false + ], + [ + [ + "int syscon_get_size", + "const struct device *dev, size_t *size" + ], + "syscon.h", + false + ], + [ + [ + "int w1_change_bus_lock", + "const struct device *dev, bool lock" + ], + "w1.h", + false + ], + [ + [ + "int w1_reset_bus", + "const struct device *dev" + ], + "w1.h", + false + ], + [ + [ + "int w1_read_bit", + "const struct device *dev" + ], + "w1.h", + false + ], + [ + [ + "int w1_write_bit", + "const struct device *dev, const bool bit" + ], + "w1.h", + false + ], + [ + [ + "int w1_read_byte", + "const struct device *dev" + ], + "w1.h", + false + ], + [ + [ + "int w1_write_byte", + "const struct device *dev, uint8_t byte" + ], + "w1.h", + false + ], + [ + [ + "int w1_read_block", + "const struct device *dev, uint8_t *buffer, size_t len" + ], + "w1.h", + false + ], + [ + [ + "int w1_write_block", + "const struct device *dev,\n\t\t\t const uint8_t *buffer, size_t len" + ], + "w1.h", + false + ], + [ + [ + "size_t w1_get_slave_count", + "const struct device *dev" + ], + "w1.h", + false + ], + [ + [ + "int w1_configure", + "const struct device *dev,\n\t\t\t enum w1_settings_type type, uint32_t value" + ], + "w1.h", + false + ], + [ + [ + "int w1_search_bus", + "const struct device *dev, uint8_t command,\n\t\t\t uint8_t family, w1_search_callback_t callback,\n\t\t\t void *user_data" + ], + "w1.h", + false + ], + [ + [ + "int wdt_setup", + "const struct device *dev, uint8_t options" + ], + "watchdog.h", + false + ], + [ + [ + "int wdt_disable", + "const struct device *dev" + ], + "watchdog.h", + false + ], + [ + [ + "int wdt_feed", + "const struct device *dev, int channel_id" + ], + "watchdog.h", + false + ], + [ + [ + "const struct device *uart_mux_find", + "int dlci_address" + ], + "uart_mux.h", + false + ], + [ + [ + "void *flash_simulator_get_memory", + "const struct device *dev,\n\t\t\t\t\t size_t *mock_size" + ], + "flash_simulator.h", + false + ], + [ + [ + "void nrf_qspi_nor_xip_enable", + "const struct device *dev, bool enable" + ], + "nrf_qspi_nor.h", + false + ], + [ + [ + "ssize_t devmux_select_get", + "const struct device *dev" + ], + "devmux.h", + false + ], + [ + [ + "int devmux_select_set", + "struct device *dev, size_t index" + ], + "devmux.h", + false + ], + [ + [ + "int tgpio_port_get_time", + "const struct device *dev, uint64_t *current_time" + ], + "timeaware_gpio.h", + false + ], + [ + [ + "int tgpio_port_get_cycles_per_second", + "const struct device *dev, uint32_t *cycles" + ], + "timeaware_gpio.h", + false + ], + [ + [ + "int tgpio_pin_disable", + "const struct device *dev, uint32_t pin" + ], + "timeaware_gpio.h", + false + ], + [ + [ + "int tgpio_pin_config_ext_timestamp", + "const struct device *dev, uint32_t pin,\n\t\t\t\t\t uint32_t event_polarity" + ], + "timeaware_gpio.h", + false + ], + [ + [ + "int tgpio_pin_periodic_output", + "const struct device *dev, uint32_t pin,\n\t\t\t\t\t uint64_t start_time, uint64_t repeat_interval,\n\t\t\t\t\t bool periodic_enable" + ], + "timeaware_gpio.h", + false + ], + [ + [ + "int tgpio_pin_read_ts_ec", + "const struct device *dev, uint32_t pin, uint64_t *timestamp,\n\t\t\t\t uint64_t *event_count" + ], + "timeaware_gpio.h", + false + ], + [ + [ + "int maxim_ds3231_req_syncpoint", + "const struct device *dev,\n\t\t\t\t\t struct k_poll_signal *signal" + ], + "maxim_ds3231.h", + false + ], + [ + [ + "int maxim_ds3231_get_syncpoint", + "const struct device *dev,\n\t\t\t\t\t struct maxim_ds3231_syncpoint *syncpoint" + ], + "maxim_ds3231.h", + false + ], + [ + [ + "void sip_supervisory_call", + "const struct device *dev, unsigned long function_id,\n\t\t\t\t unsigned long arg0, unsigned long arg1, unsigned long arg2,\n\t\t\t\t unsigned long arg3, unsigned long arg4, unsigned long arg5,\n\t\t\t\t unsigned long arg6, struct arm_smccc_res *res" + ], + "sip_svc_driver.h", + false + ], + [ + [ + "bool sip_svc_plat_func_id_valid", + "const struct device *dev, uint32_t command,\n\t\t\t\t\t uint32_t func_id" + ], + "sip_svc_driver.h", + false + ], + [ + [ + "uint32_t sip_svc_plat_format_trans_id", + "const struct device *dev, uint32_t client_idx,\n\t\t\t\t\t\tuint32_t trans_idx" + ], + "sip_svc_driver.h", + false + ], + [ + [ + "uint32_t sip_svc_plat_get_trans_idx", + "const struct device *dev, uint32_t trans_id" + ], + "sip_svc_driver.h", + false + ], + [ + [ + "void sip_svc_plat_update_trans_id", + "const struct device *dev,\n\t\t\t\t\t struct sip_svc_request *request, uint32_t trans_id" + ], + "sip_svc_driver.h", + false + ], + [ + [ + "uint32_t sip_svc_plat_get_error_code", + "const struct device *dev, struct arm_smccc_res *res" + ], + "sip_svc_driver.h", + false + ], + [ + [ + "int sip_svc_plat_async_res_req", + "const struct device *dev, unsigned long *a0,\n\t\t\t\t\t unsigned long *a1, unsigned long *a2, unsigned long *a3,\n\t\t\t\t\t unsigned long *a4, unsigned long *a5, unsigned long *a6,\n\t\t\t\t\t unsigned long *a7, char *buf, size_t size" + ], + "sip_svc_driver.h", + false + ], + [ + [ + "int sip_svc_plat_async_res_res", + "const struct device *dev, struct arm_smccc_res *res,\n\t\t\t\t\t char *buf, size_t *size, uint32_t *trans_id" + ], + "sip_svc_driver.h", + false + ], + [ + [ + "void sip_svc_plat_free_async_memory", + "const struct device *dev,\n\t\t\t\t\t struct sip_svc_request *request" + ], + "sip_svc_driver.h", + false + ], + [ + [ + "int bc12_set_role", + "const struct device *dev, enum bc12_role role" + ], + "usb_bc12.h", + false + ], + [ + [ + "int bc12_set_result_cb", + "const struct device *dev, bc12_callback_t cb, void *user_data" + ], + "usb_bc12.h", + false + ], + [ + [ + "size_t ivshmem_get_mem", + "const struct device *dev,\n\t\t\t\t uintptr_t *memmap" + ], + "ivshmem.h", + false + ], + [ + [ + "uint32_t ivshmem_get_id", + "const struct device *dev" + ], + "ivshmem.h", + false + ], + [ + [ + "uint16_t ivshmem_get_vectors", + "const struct device *dev" + ], + "ivshmem.h", + false + ], + [ + [ + "int ivshmem_int_peer", + "const struct device *dev,\n\t\t\t uint32_t peer_id, uint16_t vector" + ], + "ivshmem.h", + false + ], + [ + [ + "int ivshmem_register_handler", + "const struct device *dev,\n\t\t\t\t struct k_poll_signal *signal,\n\t\t\t\t uint16_t vector" + ], + "ivshmem.h", + false + ], + [ + [ + "size_t ivshmem_get_rw_mem_section", + "const struct device *dev,\n\t\t\t\t\t uintptr_t *memmap" + ], + "ivshmem.h", + false + ], + [ + [ + "size_t ivshmem_get_output_mem_section", + "const struct device *dev,\n\t\t\t\t\t\tuint32_t peer_id,\n\t\t\t\t\t\tuintptr_t *memmap" + ], + "ivshmem.h", + false + ], + [ + [ + "uint32_t ivshmem_get_state", + "const struct device *dev,\n\t\t\t\t uint32_t peer_id" + ], + "ivshmem.h", + false + ], + [ + [ + "int ivshmem_set_state", + "const struct device *dev,\n\t\t\t\tuint32_t state" + ], + "ivshmem.h", + false + ], + [ + [ + "uint32_t ivshmem_get_max_peers", + "const struct device *dev" + ], + "ivshmem.h", + false + ], + [ + [ + "uint16_t ivshmem_get_protocol", + "const struct device *dev" + ], + "ivshmem.h", + false + ], + [ + [ + "int ivshmem_enable_interrupts", + "const struct device *dev,\n\t\t\t\t\tbool enable" + ], + "ivshmem.h", + false + ], + [ + [ + "void k_mem_paging_stats_get", + "struct k_mem_paging_stats_t *stats" + ], + "demand_paging.h", + false + ], + [ + [ + "void k_mem_paging_thread_stats_get", + "struct k_thread *thread,\n\t\t\t\t struct k_mem_paging_stats_t *stats" + ], + "demand_paging.h", + false + ], + [ + [ + "void k_mem_paging_histogram_eviction_get", + "\n\tstruct k_mem_paging_histogram_t *hist" + ], + "demand_paging.h", + false + ], + [ + [ + "void k_mem_paging_histogram_backing_store_page_in_get", + "\n\tstruct k_mem_paging_histogram_t *hist" + ], + "demand_paging.h", + false + ], + [ + [ + "void k_mem_paging_histogram_backing_store_page_out_get", + "\n\tstruct k_mem_paging_histogram_t *hist" + ], + "demand_paging.h", + false + ], + [ + [ + "void updatehub_autohandler", + "void" + ], + "updatehub.h", + false + ], + [ + [ + "enum updatehub_response updatehub_probe", + "void" + ], + "updatehub.h", + false + ], + [ + [ + "enum updatehub_response updatehub_update", + "void" + ], + "updatehub.h", + false + ], + [ + [ + "int updatehub_confirm", + "void" + ], + "updatehub.h", + false + ], + [ + [ + "int updatehub_reboot", + "void" + ], + "updatehub.h", + false + ], + [ + [ + "const struct device *net_eth_get_ptp_clock_by_index", + "int index" + ], + "ethernet.h", + false + ], + [ + [ + "int net_if_ipv6_addr_lookup_by_index", + "const struct in6_addr *addr" + ], + "net_if.h", + false + ], + [ + [ + "bool net_if_ipv6_addr_add_by_index", + "int index,\n\t\t\t\t\t struct in6_addr *addr,\n\t\t\t\t\t enum net_addr_type addr_type,\n\t\t\t\t\t uint32_t vlifetime" + ], + "net_if.h", + false + ], + [ + [ + "bool net_if_ipv6_addr_rm_by_index", + "int index,\n\t\t\t\t\t const struct in6_addr *addr" + ], + "net_if.h", + false + ], + [ + [ + "int net_if_ipv4_addr_lookup_by_index", + "const struct in_addr *addr" + ], + "net_if.h", + false + ], + [ + [ + "bool net_if_ipv4_addr_add_by_index", + "int index,\n\t\t\t\t\t struct in_addr *addr,\n\t\t\t\t\t enum net_addr_type addr_type,\n\t\t\t\t\t uint32_t vlifetime" + ], + "net_if.h", + false + ], + [ + [ + "bool net_if_ipv4_addr_rm_by_index", + "int index,\n\t\t\t\t\t const struct in_addr *addr" + ], + "net_if.h", + false + ], + [ + [ + "bool net_if_ipv4_set_netmask_by_index", + "int index,\n\t\t\t\t\t\t\t const struct in_addr *netmask" + ], + "net_if.h", + false + ], + [ + [ + "bool net_if_ipv4_set_netmask_by_addr_by_index", + "int index,\n\t\t\t\t\t\t\tconst struct in_addr *addr,\n\t\t\t\t\t\t\tconst struct in_addr *netmask" + ], + "net_if.h", + false + ], + [ + [ + "bool net_if_ipv4_set_gw_by_index", + "int index, const struct in_addr *gw" + ], + "net_if.h", + false + ], + [ + [ + "struct net_if *net_if_get_by_index", + "int index" + ], + "net_if.h", + false + ], + [ + [ + "int net_addr_pton", + "sa_family_t family, const char *src, void *dst" + ], + "net_ip.h", + false + ], + [ + [ + "char *net_addr_ntop", + "sa_family_t family, const void *src,\n\t\t\t char *dst, size_t size" + ], + "net_ip.h", + false + ], + [ + [ + "void *zsock_get_context_object", + "int sock" + ], + "socket.h", + false + ], + [ + [ + "int zsock_socket", + "int family, int type, int proto" + ], + "socket.h", + false + ], + [ + [ + "int zsock_socketpair", + "int family, int type, int proto, int *sv" + ], + "socket.h", + false + ], + [ + [ + "int zsock_close", + "int sock" + ], + "socket.h", + false + ], + [ + [ + "int zsock_shutdown", + "int sock, int how" + ], + "socket.h", + false + ], + [ + [ + "int zsock_bind", + "int sock, const struct sockaddr *addr,\n\t\t\t socklen_t addrlen" + ], + "socket.h", + false + ], + [ + [ + "int zsock_connect", + "int sock, const struct sockaddr *addr,\n\t\t\t socklen_t addrlen" + ], + "socket.h", + false + ], + [ + [ + "int zsock_listen", + "int sock, int backlog" + ], + "socket.h", + false + ], + [ + [ + "int zsock_accept", + "int sock, struct sockaddr *addr, socklen_t *addrlen" + ], + "socket.h", + false + ], + [ + [ + "ssize_t zsock_sendto", + "int sock, const void *buf, size_t len,\n\t\t\t int flags, const struct sockaddr *dest_addr,\n\t\t\t socklen_t addrlen" + ], + "socket.h", + false + ], + [ + [ + "ssize_t zsock_sendmsg", + "int sock, const struct msghdr *msg,\n\t\t\t\tint flags" + ], + "socket.h", + false + ], + [ + [ + "ssize_t zsock_recvfrom", + "int sock, void *buf, size_t max_len,\n\t\t\t\t int flags, struct sockaddr *src_addr,\n\t\t\t\t socklen_t *addrlen" + ], + "socket.h", + false + ], + [ + [ + "ssize_t zsock_recvmsg", + "int sock, struct msghdr *msg, int flags" + ], + "socket.h", + false + ], + [ + [ + "int zsock_fcntl_impl", + "int sock, int cmd, int flags" + ], + "socket.h", + false + ], + [ + [ + "int zsock_ioctl_impl", + "int sock, unsigned long request, va_list ap" + ], + "socket.h", + false + ], + [ + [ + "int zsock_poll", + "struct zsock_pollfd *fds, int nfds, int timeout" + ], + "socket.h", + false + ], + [ + [ + "int zsock_getsockopt", + "int sock, int level, int optname,\n\t\t\t void *optval, socklen_t *optlen" + ], + "socket.h", + false + ], + [ + [ + "int zsock_setsockopt", + "int sock, int level, int optname,\n\t\t\t const void *optval, socklen_t optlen" + ], + "socket.h", + false + ], + [ + [ + "int zsock_getpeername", + "int sock, struct sockaddr *addr,\n\t\t\t\tsocklen_t *addrlen" + ], + "socket.h", + false + ], + [ + [ + "int zsock_getsockname", + "int sock, struct sockaddr *addr,\n\t\t\t\tsocklen_t *addrlen" + ], + "socket.h", + false + ], + [ + [ + "int zsock_gethostname", + "char *buf, size_t len" + ], + "socket.h", + false + ], + [ + [ + "int zsock_inet_pton", + "sa_family_t family, const char *src, void *dst" + ], + "socket.h", + false + ], + [ + [ + "int z_zsock_getaddrinfo_internal", + "const char *host,\n\t\t\t\t\t const char *service,\n\t\t\t\t\t const struct zsock_addrinfo *hints,\n\t\t\t\t\t struct zsock_addrinfo *res" + ], + "socket.h", + false + ], + [ + [ + "int zsock_select", + "int nfds, zsock_fd_set *readfds,\n\t\t\t zsock_fd_set *writefds,\n\t\t\t zsock_fd_set *exceptfds,\n\t\t\t struct zsock_timeval *timeout" + ], + "socket_select.h", + false + ], + [ + [ + "int net_socket_service_register", + "const struct net_socket_service_desc *service,\n\t\t\t\t\t struct zsock_pollfd *fds, int len, void *user_data" + ], + "socket_service.h", + false + ], + [ + [ + "void sys_rand_get", + "void *dst, size_t len" + ], + "random.h", + false + ], + [ + [ + "int sys_csrand_get", + "void *dst, size_t len" + ], + "random.h", + false + ], + [ + [ + "int rtio_cqe_get_mempool_buffer", + "const struct rtio *r, struct rtio_cqe *cqe,\n\t\t\t\t\t uint8_t **buff, uint32_t *buff_len" + ], + "rtio.h", + false + ], + [ + [ + "void rtio_release_buffer", + "struct rtio *r, void *buff, uint32_t buff_len" + ], + "rtio.h", + false + ], + [ + [ + "int rtio_sqe_cancel", + "struct rtio_sqe *sqe" + ], + "rtio.h", + false + ], + [ + [ + "int rtio_sqe_copy_in_get_handles", + "struct rtio *r, const struct rtio_sqe *sqes,\n\t\t\t\t\t struct rtio_sqe **handle, size_t sqe_count" + ], + "rtio.h", + false + ], + [ + [ + "int rtio_cqe_copy_out", + "struct rtio *r,\n\t\t\t\tstruct rtio_cqe *cqes,\n\t\t\t\tsize_t cqe_count,\n\t\t\t\tk_timeout_t timeout" + ], + "rtio.h", + false + ], + [ + [ + "int rtio_submit", + "struct rtio *r, uint32_t wait_count" + ], + "rtio.h", + false + ], + [ + [ + "bool atomic_cas", + "atomic_t *target, atomic_val_t old_value,\n\t\t\t atomic_val_t new_value" + ], + "atomic_c.h", + false + ], + [ + [ + "bool atomic_ptr_cas", + "atomic_ptr_t *target, atomic_ptr_val_t old_value,\n\t\t\t atomic_ptr_val_t new_value" + ], + "atomic_c.h", + false + ], + [ + [ + "atomic_val_t atomic_add", + "atomic_t *target, atomic_val_t value" + ], + "atomic_c.h", + false + ], + [ + [ + "atomic_val_t atomic_sub", + "atomic_t *target, atomic_val_t value" + ], + "atomic_c.h", + false + ], + [ + [ + "atomic_val_t atomic_set", + "atomic_t *target, atomic_val_t value" + ], + "atomic_c.h", + false + ], + [ + [ + "atomic_ptr_val_t atomic_ptr_set", + "atomic_ptr_t *target, atomic_ptr_val_t value" + ], + "atomic_c.h", + false + ], + [ + [ + "atomic_val_t atomic_or", + "atomic_t *target, atomic_val_t value" + ], + "atomic_c.h", + false + ], + [ + [ + "atomic_val_t atomic_xor", + "atomic_t *target, atomic_val_t value" + ], + "atomic_c.h", + false + ], + [ + [ + "atomic_val_t atomic_and", + "atomic_t *target, atomic_val_t value" + ], + "atomic_c.h", + false + ], + [ + [ + "atomic_val_t atomic_nand", + "atomic_t *target, atomic_val_t value" + ], + "atomic_c.h", + false + ] +]
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_file_list.txt b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_file_list.txt new file mode 100644 index 0000000..59bbc7b --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_file_list.txt @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/sys/libc-hooks.h;/home/mike/Documents/ncs/v2.7.0/zephyr/lib/posix/options/posix_clock.h;/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/sys/mutex.h;/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/logging/log_msg.h;/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/logging/log_ctrl.h;/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/drivers/flash.h;/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/drivers/gpio.h;/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/drivers/uart.h;/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/device.h;/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/kernel.h;/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/sys/kobject.h;/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/sys/time_units.h;/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/sys/errno_private.h
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include new file mode 120000 index 0000000..4cf525a --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr new file mode 120000 index 0000000..6f6e4d8 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_acpi b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_acpi new file mode 120000 index 0000000..5b581a0 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_acpi @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/acpi
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_app_memory b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_app_memory new file mode 120000 index 0000000..58f4766 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_app_memory @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/app_memory
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch new file mode 120000 index 0000000..ba979d5 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/arch
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arc b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arc new file mode 120000 index 0000000..a3130d0 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arc @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/arch/arc
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arc_asm-compat b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arc_asm-compat new file mode 120000 index 0000000..e590989 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arc_asm-compat @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/arch/arc/asm-compat
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arc_v2 b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arc_v2 new file mode 120000 index 0000000..583476f --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arc_v2 @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/arch/arc/v2
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arc_v2_dsp b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arc_v2_dsp new file mode 120000 index 0000000..d8aa1c0 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arc_v2_dsp @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/arch/arc/v2/dsp
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arc_v2_mpu b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arc_v2_mpu new file mode 120000 index 0000000..b1546ee --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arc_v2_mpu @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/arch/arc/v2/mpu
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arc_v2_secureshield b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arc_v2_secureshield new file mode 120000 index 0000000..fdef46a --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arc_v2_secureshield @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/arch/arc/v2/secureshield
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm new file mode 120000 index 0000000..f7e5187 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/arch/arm
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm64 b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm64 new file mode 120000 index 0000000..4eaa537 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm64 @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/arch/arm64
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm64_cortex_r b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm64_cortex_r new file mode 120000 index 0000000..ac6a243 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm64_cortex_r @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/arch/arm64/cortex_r
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm64_scripts b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm64_scripts new file mode 120000 index 0000000..1039367 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm64_scripts @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/arch/arm64/scripts
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_cortex_a_r b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_cortex_a_r new file mode 120000 index 0000000..e248b54 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_cortex_a_r @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/arch/arm/cortex_a_r
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_cortex_a_r_scripts b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_cortex_a_r_scripts new file mode 120000 index 0000000..6711da7 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_cortex_a_r_scripts @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/arch/arm/cortex_a_r/scripts
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_cortex_m b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_cortex_m new file mode 120000 index 0000000..1903303 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_cortex_m @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/arch/arm/cortex_m
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_cortex_m_scripts b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_cortex_m_scripts new file mode 120000 index 0000000..336cc5b --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_cortex_m_scripts @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/arch/arm/cortex_m/scripts
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_cortex_r b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_cortex_r new file mode 120000 index 0000000..72b3c46 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_cortex_r @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/arch/arm/cortex_r
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_cortex_r_scripts b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_cortex_r_scripts new file mode 120000 index 0000000..d65a4d6 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_cortex_r_scripts @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/arch/arm/cortex_r/scripts
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_mmu b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_mmu new file mode 120000 index 0000000..ed7faa3 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_mmu @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/arch/arm/mmu
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_mpu b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_mpu new file mode 120000 index 0000000..0550a24 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_mpu @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/arch/arm/mpu
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_common b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_common new file mode 120000 index 0000000..25183ef --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_common @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/arch/common
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_mips b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_mips new file mode 120000 index 0000000..8cbb885 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_mips @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/arch/mips
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_nios2 b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_nios2 new file mode 120000 index 0000000..e2ec4dd --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_nios2 @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/arch/nios2
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_posix b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_posix new file mode 120000 index 0000000..513cd52 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_posix @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/arch/posix
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_riscv b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_riscv new file mode 120000 index 0000000..0f61215 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_riscv @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/arch/riscv
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_riscv_common b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_riscv_common new file mode 120000 index 0000000..80ccd43 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_riscv_common @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/arch/riscv/common
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_riscv_riscv-privileged b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_riscv_riscv-privileged new file mode 120000 index 0000000..5c681b7 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_riscv_riscv-privileged @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/arch/riscv/riscv-privileged
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_sparc b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_sparc new file mode 120000 index 0000000..d0a401b --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_sparc @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/arch/sparc
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_x86 b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_x86 new file mode 120000 index 0000000..d5e945f --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_x86 @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/arch/x86
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_x86_ia32 b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_x86_ia32 new file mode 120000 index 0000000..f1a5168 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_x86_ia32 @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/arch/x86/ia32
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_x86_ia32_scripts b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_x86_ia32_scripts new file mode 120000 index 0000000..ee625b7 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_x86_ia32_scripts @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/arch/x86/ia32/scripts
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_x86_intel64 b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_x86_intel64 new file mode 120000 index 0000000..7da7418 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_x86_intel64 @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/arch/x86/intel64
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_xtensa b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_xtensa new file mode 120000 index 0000000..809cfac --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_arch_xtensa @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/arch/xtensa
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_audio b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_audio new file mode 120000 index 0000000..a05201b --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_audio @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/audio
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_bluetooth b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_bluetooth new file mode 120000 index 0000000..23e6c9a --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_bluetooth @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/bluetooth
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_bluetooth_audio b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_bluetooth_audio new file mode 120000 index 0000000..10682ea --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_bluetooth_audio @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/bluetooth/audio
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_bluetooth_classic b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_bluetooth_classic new file mode 120000 index 0000000..2f8b98c --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_bluetooth_classic @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/bluetooth/classic
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_bluetooth_mesh b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_bluetooth_mesh new file mode 120000 index 0000000..1ef7062 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_bluetooth_mesh @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/bluetooth/mesh
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_bluetooth_services b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_bluetooth_services new file mode 120000 index 0000000..173a298 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_bluetooth_services @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/bluetooth/services
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_bluetooth_services_nus b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_bluetooth_services_nus new file mode 120000 index 0000000..222f3dc --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_bluetooth_services_nus @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/bluetooth/services/nus
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_canbus b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_canbus new file mode 120000 index 0000000..2a242d6 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_canbus @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/canbus
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_console b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_console new file mode 120000 index 0000000..2f9e2bf --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_console @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/console
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_crypto b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_crypto new file mode 120000 index 0000000..f49456b --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_crypto @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/crypto
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_data b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_data new file mode 120000 index 0000000..79c1906 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_data @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/data
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_debug b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_debug new file mode 120000 index 0000000..7c1b4f7 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_debug @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/debug
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_devicetree b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_devicetree new file mode 120000 index 0000000..58eab55 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_devicetree @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/devicetree
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dfu b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dfu new file mode 120000 index 0000000..ce45907 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dfu @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/dfu
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_display b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_display new file mode 120000 index 0000000..d9aa0a1 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_display @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/display
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers new file mode 120000 index 0000000..fa94b7f --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/drivers
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_adc b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_adc new file mode 120000 index 0000000..b6d6c4c --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_adc @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/drivers/adc
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_bluetooth b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_bluetooth new file mode 120000 index 0000000..8b46be8 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_bluetooth @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/drivers/bluetooth
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_can b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_can new file mode 120000 index 0000000..93ef3ea --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_can @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/drivers/can
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_clock_control b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_clock_control new file mode 120000 index 0000000..8da4998 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_clock_control @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/drivers/clock_control
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_console b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_console new file mode 120000 index 0000000..6ef4fb8 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_console @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/drivers/console
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_dma b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_dma new file mode 120000 index 0000000..bc8646d --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_dma @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/drivers/dma
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_eeprom b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_eeprom new file mode 120000 index 0000000..921398c --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_eeprom @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/drivers/eeprom
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_ethernet b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_ethernet new file mode 120000 index 0000000..322bc12 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_ethernet @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/drivers/ethernet
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_flash b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_flash new file mode 120000 index 0000000..8032f3c --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_flash @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/drivers/flash
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_gnss b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_gnss new file mode 120000 index 0000000..89eba39 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_gnss @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/drivers/gnss
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_gpio b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_gpio new file mode 120000 index 0000000..e668b59 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_gpio @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/drivers/gpio
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_i2c b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_i2c new file mode 120000 index 0000000..6909658 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_i2c @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/drivers/i2c
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_i2c_target b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_i2c_target new file mode 120000 index 0000000..c76b3a7 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_i2c_target @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/drivers/i2c/target
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_i3c b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_i3c new file mode 120000 index 0000000..573e07c --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_i3c @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/drivers/i3c
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_ieee802154 b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_ieee802154 new file mode 120000 index 0000000..2455259 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_ieee802154 @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/drivers/ieee802154
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_interrupt_controller b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_interrupt_controller new file mode 120000 index 0000000..20c3313 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_interrupt_controller @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/drivers/interrupt_controller
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_led b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_led new file mode 120000 index 0000000..7bca449 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_led @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/drivers/led
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_led_strip b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_led_strip new file mode 120000 index 0000000..f2b861a --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_led_strip @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/drivers/led_strip
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_mfd b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_mfd new file mode 120000 index 0000000..776e544 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_mfd @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/drivers/mfd
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_mipi_dsi b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_mipi_dsi new file mode 120000 index 0000000..ff1665b --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_mipi_dsi @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/drivers/mipi_dsi
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc new file mode 120000 index 0000000..5f5b6ae --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/drivers/misc
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_devmux b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_devmux new file mode 120000 index 0000000..075c871 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_devmux @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/drivers/misc/devmux
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_ft8xx b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_ft8xx new file mode 120000 index 0000000..3e9f44c --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_ft8xx @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/drivers/misc/ft8xx
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_grove_lcd b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_grove_lcd new file mode 120000 index 0000000..386dc08 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_grove_lcd @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/drivers/misc/grove_lcd
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_nxp_flexio b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_nxp_flexio new file mode 120000 index 0000000..2b493f9 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_nxp_flexio @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/drivers/misc/nxp_flexio
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_pio_rpi_pico b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_pio_rpi_pico new file mode 120000 index 0000000..5ae6a9a --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_pio_rpi_pico @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/drivers/misc/pio_rpi_pico
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_timeaware_gpio b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_timeaware_gpio new file mode 120000 index 0000000..4b72faa --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_timeaware_gpio @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/drivers/misc/timeaware_gpio
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_mm b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_mm new file mode 120000 index 0000000..54cc7bf --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_mm @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/drivers/mm
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_modem b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_modem new file mode 120000 index 0000000..e630ef4 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_modem @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/drivers/modem
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_pcie b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_pcie new file mode 120000 index 0000000..f511981 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_pcie @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/drivers/pcie
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_pcie_endpoint b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_pcie_endpoint new file mode 120000 index 0000000..3aafc30 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_pcie_endpoint @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/drivers/pcie/endpoint
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_pinctrl b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_pinctrl new file mode 120000 index 0000000..8808d5d --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_pinctrl @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/drivers/pinctrl
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_pm_cpu_ops b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_pm_cpu_ops new file mode 120000 index 0000000..d975ced --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_pm_cpu_ops @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/drivers/pm_cpu_ops
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_power b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_power new file mode 120000 index 0000000..60ae32e --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_power @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/drivers/power
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_pwm b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_pwm new file mode 120000 index 0000000..5cb1a72 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_pwm @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/drivers/pwm
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_regulator b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_regulator new file mode 120000 index 0000000..eb9931c --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_regulator @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/drivers/regulator
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_rtc b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_rtc new file mode 120000 index 0000000..6b5c275 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_rtc @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/drivers/rtc
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_sensor b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_sensor new file mode 120000 index 0000000..48f0c07 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_sensor @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/drivers/sensor
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_serial b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_serial new file mode 120000 index 0000000..c744d31 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_serial @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/drivers/serial
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_sip_svc b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_sip_svc new file mode 120000 index 0000000..f44b508 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_sip_svc @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/drivers/sip_svc
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_timer b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_timer new file mode 120000 index 0000000..debcb61 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_timer @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/drivers/timer
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_uart b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_uart new file mode 120000 index 0000000..c0fcf50 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_uart @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/drivers/uart
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_usb b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_usb new file mode 120000 index 0000000..75e3ab4 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_usb @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/drivers/usb
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_usb_c b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_usb_c new file mode 120000 index 0000000..153a286 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_usb_c @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/drivers/usb_c
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_virtualization b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_virtualization new file mode 120000 index 0000000..54c7a2e --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_virtualization @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/drivers/virtualization
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dsp b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dsp new file mode 120000 index 0000000..95488c0 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dsp @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/dsp
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings new file mode 120000 index 0000000..0947fbf --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/dt-bindings
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_acpi b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_acpi new file mode 120000 index 0000000..4bf88fc --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_acpi @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/dt-bindings/acpi
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_adc b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_adc new file mode 120000 index 0000000..e5b4a02 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_adc @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/dt-bindings/adc
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_clock b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_clock new file mode 120000 index 0000000..7b6fcb1 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_clock @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/dt-bindings/clock
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_dac b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_dac new file mode 120000 index 0000000..312c14a --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_dac @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/dt-bindings/dac
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_dai b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_dai new file mode 120000 index 0000000..1680ef0 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_dai @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/dt-bindings/dai
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_display b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_display new file mode 120000 index 0000000..88ac56a --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_display @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/dt-bindings/display
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_dma b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_dma new file mode 120000 index 0000000..35ebf87 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_dma @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/dt-bindings/dma
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_espi b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_espi new file mode 120000 index 0000000..ac113da --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_espi @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/dt-bindings/espi
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_ethernet b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_ethernet new file mode 120000 index 0000000..fbcadcb --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_ethernet @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/dt-bindings/ethernet
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_flash_controller b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_flash_controller new file mode 120000 index 0000000..ea92701 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_flash_controller @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/dt-bindings/flash_controller
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_gnss b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_gnss new file mode 120000 index 0000000..52fdf83 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_gnss @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/dt-bindings/gnss
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_gpio b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_gpio new file mode 120000 index 0000000..cca072e --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_gpio @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/dt-bindings/gpio
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_i2c b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_i2c new file mode 120000 index 0000000..ea49e44 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_i2c @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/dt-bindings/i2c
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_input b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_input new file mode 120000 index 0000000..2934316 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_input @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/dt-bindings/input
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_inputmux b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_inputmux new file mode 120000 index 0000000..8cc14f5 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_inputmux @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/dt-bindings/inputmux
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_interrupt-controller b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_interrupt-controller new file mode 120000 index 0000000..5b5b948 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_interrupt-controller @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/dt-bindings/interrupt-controller
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_ipc_service b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_ipc_service new file mode 120000 index 0000000..f342684 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_ipc_service @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/dt-bindings/ipc_service
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_led b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_led new file mode 120000 index 0000000..2d4dcf8 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_led @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/dt-bindings/led
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_lora b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_lora new file mode 120000 index 0000000..222bfe9 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_lora @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/dt-bindings/lora
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_lvgl b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_lvgl new file mode 120000 index 0000000..56f82b5 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_lvgl @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/dt-bindings/lvgl
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_memory-attr b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_memory-attr new file mode 120000 index 0000000..72e7787 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_memory-attr @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/dt-bindings/memory-attr
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_memory-controller b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_memory-controller new file mode 120000 index 0000000..f3f4b44 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_memory-controller @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/dt-bindings/memory-controller
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_mipi_dbi b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_mipi_dbi new file mode 120000 index 0000000..35860df --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_mipi_dbi @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/dt-bindings/mipi_dbi
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\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_pcie b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_pcie new file mode 120000 index 0000000..8c2b394 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_pcie @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/dt-bindings/pcie
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\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_pwm b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_pwm new file mode 120000 index 0000000..aa4c53b --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_pwm @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/dt-bindings/pwm
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_rdc b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_rdc new file mode 120000 index 0000000..4afc3cd --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_rdc @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/dt-bindings/rdc
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\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_reset b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_reset new file mode 120000 index 0000000..31fe63d --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_reset @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/dt-bindings/reset
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_sensor b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_sensor new file mode 120000 index 0000000..92241ab --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_sensor @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/dt-bindings/sensor
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\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_timer b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_timer new file mode 120000 index 0000000..26f7d6e --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_timer @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/dt-bindings/timer
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\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_usb-c b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_usb-c new file mode 120000 index 0000000..f71d833 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_usb-c @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/dt-bindings/usb-c
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_fs b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_fs new file mode 120000 index 0000000..1105f0a --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_fs @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/fs
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_input b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_input new file mode 120000 index 0000000..17b7f2b --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_input @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/input
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\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_kernel b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_kernel new file mode 120000 index 0000000..8efd313 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_kernel @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/kernel
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\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_kernel_mm b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_kernel_mm new file mode 120000 index 0000000..3c78437 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_kernel_mm @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/kernel/mm
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_linker b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_linker new file mode 120000 index 0000000..bb4b640 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_linker @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/linker
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_linker_common-rom b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_linker_common-rom new file mode 120000 index 0000000..08c9124 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_linker_common-rom @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/linker/common-rom
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_llext b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_llext new file mode 120000 index 0000000..fc9196d --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_llext @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/llext
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_logging b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_logging new file mode 120000 index 0000000..8c8aba1 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_logging @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/logging
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_lorawan b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_lorawan new file mode 120000 index 0000000..448ffb9 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_lorawan @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/lorawan
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_math b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_math new file mode 120000 index 0000000..cfb0498 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_math @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/math
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mem_mgmt b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mem_mgmt new file mode 120000 index 0000000..112e51b --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mem_mgmt @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/mem_mgmt
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt new file mode 120000 index 0000000..3ddc613 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/mgmt
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_ec_host_cmd b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_ec_host_cmd new file mode 120000 index 0000000..2ebc982 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_ec_host_cmd @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/mgmt/ec_host_cmd
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr new file mode 120000 index 0000000..6452fcf --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/mgmt/mcumgr
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp new file mode 120000 index 0000000..50f90b9 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/mgmt/mcumgr/grp
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_fs_mgmt b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_fs_mgmt new file mode 120000 index 0000000..ff07880 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_fs_mgmt @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/mgmt/mcumgr/grp/fs_mgmt
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_img_mgmt b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_img_mgmt new file mode 120000 index 0000000..194891b --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_img_mgmt @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/mgmt/mcumgr/grp/img_mgmt
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_os_mgmt b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_os_mgmt new file mode 120000 index 0000000..de018d1 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_os_mgmt @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/mgmt/mcumgr/grp/os_mgmt
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_settings_mgmt b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_settings_mgmt new file mode 120000 index 0000000..4ca914c --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_settings_mgmt @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/mgmt/mcumgr/grp/settings_mgmt
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_shell_mgmt b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_shell_mgmt new file mode 120000 index 0000000..2f81426 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_shell_mgmt @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/mgmt/mcumgr/grp/shell_mgmt
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_stat_mgmt b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_stat_mgmt new file mode 120000 index 0000000..20dce5f --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_stat_mgmt @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/mgmt/mcumgr/grp/stat_mgmt
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_zephyr b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_zephyr new file mode 120000 index 0000000..61b1406 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_zephyr @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/mgmt/mcumgr/grp/zephyr
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_mgmt b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_mgmt new file mode 120000 index 0000000..30d3a09 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_mgmt @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/mgmt/mcumgr/mgmt
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_smp b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_smp new file mode 120000 index 0000000..7d81d3d --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_smp @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/mgmt/mcumgr/smp
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_transport b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_transport new file mode 120000 index 0000000..667594d --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_transport @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/mgmt/mcumgr/transport
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_modbus b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_modbus new file mode 120000 index 0000000..5eb3008 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_modbus @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/modbus
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_modem b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_modem new file mode 120000 index 0000000..f38c8ab --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_modem @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/modem
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_modem_backend b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_modem_backend new file mode 120000 index 0000000..4b09678 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_modem_backend @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/modem/backend
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_multi_heap b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_multi_heap new file mode 120000 index 0000000..4a450ea --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_multi_heap @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/multi_heap
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_net b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_net new file mode 120000 index 0000000..a4bf535 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_net @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/net
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_net_conn_mgr b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_net_conn_mgr new file mode 120000 index 0000000..74ff277 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_net_conn_mgr @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/net/conn_mgr
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_net_http b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_net_http new file mode 120000 index 0000000..23b2f0b --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_net_http @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/net/http
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_pm b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_pm new file mode 120000 index 0000000..72628c9 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_pm @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/pm
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_portability b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_portability new file mode 120000 index 0000000..c6f6ffd --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_portability @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/portability
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_posix b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_posix new file mode 120000 index 0000000..a606078 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_posix @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/posix
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_posix_arpa b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_posix_arpa new file mode 120000 index 0000000..d762f68 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_posix_arpa @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/posix/arpa
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_posix_net b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_posix_net new file mode 120000 index 0000000..359f5f5 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_posix_net @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/posix/net
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_posix_netinet b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_posix_netinet new file mode 120000 index 0000000..a972bac --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_posix_netinet @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/posix/netinet
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_posix_sys b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_posix_sys new file mode 120000 index 0000000..c54371a --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_posix_sys @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/posix/sys
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_random b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_random new file mode 120000 index 0000000..0dbe6af --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_random @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/random
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_retention b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_retention new file mode 120000 index 0000000..d149231 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_retention @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/retention
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_rtio b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_rtio new file mode 120000 index 0000000..73a9df9 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_rtio @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/rtio
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_sd b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_sd new file mode 120000 index 0000000..cf731bd --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_sd @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/sd
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_sensing b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_sensing new file mode 120000 index 0000000..6774dbe --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_sensing @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/sensing
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_settings b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_settings new file mode 120000 index 0000000..2a0f992 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_settings @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/settings
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_shell b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_shell new file mode 120000 index 0000000..55c8e00 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_shell @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/shell
\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_sip_svc b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_sip_svc new file mode 120000 index 0000000..0152831 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr_sip_svc @@ -0,0 +1 @@ +/home/mike/Documents/ncs/v2.7.0/zephyr/include/zephyr/sip_svc
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\ No newline at end of file diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_subdirs.trigger b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_subdirs.trigger new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_subdirs.trigger diff --git a/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_subdirs.txt b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_subdirs.txt new file mode 100644 index 0000000..54cca90 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/misc/generated/syscalls_subdirs.txt @@ -0,0 +1,205 @@ +/home/mike/Documents/ncs/v2.7.0/conexio-firmware-sdk/samples/conexio_stratus/mqtt_control/build/mcuboot/zephyr/misc/generated/syscalls_links/include +/home/mike/Documents/ncs/v2.7.0/conexio-firmware-sdk/samples/conexio_stratus/mqtt_control/build/mcuboot/zephyr/misc/generated/syscalls_links/include_zephyr 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runner if --runner is not given. +flash-runner: nrfjprog + +# Default debug runner if --runner is not given. +debug-runner: jlink + +# Common runner configuration values. +config: + board_dir: /home/mike/Documents/ncs/v2.7.0/conexio-firmware-sdk/boards/conexio/stratus_pro + # Build outputs: + elf_file: zephyr.elf + hex_file: zephyr.hex + bin_file: zephyr.bin + # Host tools: + gdb: /home/mike/ncs/toolchains/e9dba88316/opt/zephyr-sdk/arm-zephyr-eabi/bin/arm-zephyr-eabi-gdb + +# Runner specific arguments +args: + nrfjprog: + [] + + jlink: + - --dt-flash=y + - --device=nRF9160_xxAA + - --speed=4000 diff --git a/nrfdemo/build/mcuboot/zephyr/snippets_generated.cmake b/nrfdemo/build/mcuboot/zephyr/snippets_generated.cmake new file mode 100644 index 0000000..75d6c97 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/snippets_generated.cmake @@ -0,0 +1,20 @@ +# WARNING. THIS FILE IS AUTO-GENERATED. DO NOT MODIFY! +# +# This file contains build system settings derived from your snippets. +# Its contents are an implementation detail that should not be used outside +# of Zephyr's snippets CMake module. +# +# See the Snippets guide in the Zephyr documentation for more information. + +############################################################################### +# Global information about all snippets. + +# The name of every snippet that was discovered. +set(SNIPPET_NAMES "cdc-acm-console" "diagnostic-logs" "nordic-bt-rpc" "nordic-flpr" "nordic-flpr-xip" "nordic-ppr" "nordic-ppr-xip" "nrf70-debug" "nrf70-fw-patch-ext-flash" "nrf91-modem-trace-ext-flash" "nrf91-modem-trace-uart" "nus-console" "rtt-console" "tfm-enable-share-uart" "xen_dom0") +# The paths to all the snippet.yml files. One snippet +# can have multiple snippet.yml files. +set(SNIPPET_PATHS "/home/mike/Documents/ncs/v2.7.0/nrf/snippets/matter-diagnostic-logs/snippet.yml" "/home/mike/Documents/ncs/v2.7.0/nrf/snippets/nordic-bt-rpc/snippet.yml" "/home/mike/Documents/ncs/v2.7.0/nrf/snippets/nrf70-debug/snippet.yml" "/home/mike/Documents/ncs/v2.7.0/nrf/snippets/nrf70-fw-patch-ext-flash/snippet.yml" "/home/mike/Documents/ncs/v2.7.0/nrf/snippets/nrf91-modem-trace-ext-flash/snippet.yml" "/home/mike/Documents/ncs/v2.7.0/nrf/snippets/nrf91-modem-trace-uart/snippet.yml" "/home/mike/Documents/ncs/v2.7.0/nrf/snippets/tfm-enable-share-uart/snippet.yml" "/home/mike/Documents/ncs/v2.7.0/zephyr/snippets/cdc-acm-console/snippet.yml" "/home/mike/Documents/ncs/v2.7.0/zephyr/snippets/nordic-flpr-xip/snippet.yml" "/home/mike/Documents/ncs/v2.7.0/zephyr/snippets/nordic-flpr/snippet.yml" "/home/mike/Documents/ncs/v2.7.0/zephyr/snippets/nordic-ppr-xip/snippet.yml" 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if(BUILD_TYPE) + string(REGEX REPLACE "^[^A-Za-z0-9_]+" "" + CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}") + else() + set(CMAKE_INSTALL_CONFIG_NAME "") + endif() + message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"") +endif() + +# Set the component getting installed. +if(NOT CMAKE_INSTALL_COMPONENT) + if(COMPONENT) + message(STATUS "Install component: \"${COMPONENT}\"") + set(CMAKE_INSTALL_COMPONENT "${COMPONENT}") + else() + set(CMAKE_INSTALL_COMPONENT) + endif() +endif() + +# Is this installation the result of a crosscompile? +if(NOT DEFINED CMAKE_CROSSCOMPILING) + set(CMAKE_CROSSCOMPILING "TRUE") +endif() + +# Set default install directory permissions. +if(NOT DEFINED CMAKE_OBJDUMP) + set(CMAKE_OBJDUMP "/home/mike/ncs/toolchains/e9dba88316/opt/zephyr-sdk/arm-zephyr-eabi/bin/arm-zephyr-eabi-objdump") +endif() + +if(NOT CMAKE_INSTALL_LOCAL_ONLY) + # Include the install script for each subdirectory. + include("/home/mike/Documents/ncs/v2.7.0/conexio-firmware-sdk/samples/conexio_stratus/mqtt_control/build/mcuboot/zephyr/soc/common/cmake_install.cmake") + include("/home/mike/Documents/ncs/v2.7.0/conexio-firmware-sdk/samples/conexio_stratus/mqtt_control/build/mcuboot/zephyr/soc/soc/nrf9151/cmake_install.cmake") + +endif() + diff --git a/nrfdemo/build/mcuboot/zephyr/soc/common/cmake_install.cmake b/nrfdemo/build/mcuboot/zephyr/soc/common/cmake_install.cmake new file mode 100644 index 0000000..b3122d9 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/soc/common/cmake_install.cmake @@ -0,0 +1,39 @@ +# Install script for directory: /home/mike/Documents/ncs/v2.7.0/zephyr/soc/common + +# Set the install prefix +if(NOT DEFINED CMAKE_INSTALL_PREFIX) + set(CMAKE_INSTALL_PREFIX "/usr/local") +endif() +string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}") + +# Set the install configuration name. +if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME) + if(BUILD_TYPE) + string(REGEX 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+endif() +string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}") + +# Set the install configuration name. +if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME) + if(BUILD_TYPE) + string(REGEX REPLACE "^[^A-Za-z0-9_]+" "" + CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}") + else() + set(CMAKE_INSTALL_CONFIG_NAME "") + endif() + message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"") +endif() + +# Set the component getting installed. +if(NOT CMAKE_INSTALL_COMPONENT) + if(COMPONENT) + message(STATUS "Install component: \"${COMPONENT}\"") + set(CMAKE_INSTALL_COMPONENT "${COMPONENT}") + else() + set(CMAKE_INSTALL_COMPONENT) + endif() +endif() + +# Is this installation the result of a crosscompile? +if(NOT DEFINED CMAKE_CROSSCOMPILING) + set(CMAKE_CROSSCOMPILING "TRUE") +endif() + +# Set default install directory permissions. +if(NOT DEFINED CMAKE_OBJDUMP) + set(CMAKE_OBJDUMP "/home/mike/ncs/toolchains/e9dba88316/opt/zephyr-sdk/arm-zephyr-eabi/bin/arm-zephyr-eabi-objdump") +endif() + +if(NOT CMAKE_INSTALL_LOCAL_ONLY) + # Include the install script for each subdirectory. + include("/home/mike/Documents/ncs/v2.7.0/conexio-firmware-sdk/samples/conexio_stratus/mqtt_control/build/mcuboot/zephyr/soc/soc/nrf9151/nrf91/cmake_install.cmake") + include("/home/mike/Documents/ncs/v2.7.0/conexio-firmware-sdk/samples/conexio_stratus/mqtt_control/build/mcuboot/zephyr/soc/soc/nrf9151/common/cmake_install.cmake") + +endif() + diff --git a/nrfdemo/build/mcuboot/zephyr/soc/soc/nrf9151/common/cmake_install.cmake b/nrfdemo/build/mcuboot/zephyr/soc/soc/nrf9151/common/cmake_install.cmake new file mode 100644 index 0000000..7f54234 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/soc/soc/nrf9151/common/cmake_install.cmake @@ -0,0 +1,39 @@ +# Install script for directory: /home/mike/Documents/ncs/v2.7.0/zephyr/soc/nordic/common + +# Set the install prefix +if(NOT DEFINED CMAKE_INSTALL_PREFIX) + set(CMAKE_INSTALL_PREFIX "/usr/local") +endif() +string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}") + +# Set the install configuration name. +if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME) + if(BUILD_TYPE) + string(REGEX REPLACE "^[^A-Za-z0-9_]+" "" + CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}") + else() + set(CMAKE_INSTALL_CONFIG_NAME "") + endif() + message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"") +endif() + +# Set the component getting installed. +if(NOT CMAKE_INSTALL_COMPONENT) + if(COMPONENT) + message(STATUS "Install component: \"${COMPONENT}\"") + set(CMAKE_INSTALL_COMPONENT "${COMPONENT}") + else() + set(CMAKE_INSTALL_COMPONENT) + endif() +endif() + +# Is this installation the result of a crosscompile? +if(NOT DEFINED CMAKE_CROSSCOMPILING) + set(CMAKE_CROSSCOMPILING "TRUE") +endif() + +# Set default install directory permissions. +if(NOT DEFINED CMAKE_OBJDUMP) + set(CMAKE_OBJDUMP "/home/mike/ncs/toolchains/e9dba88316/opt/zephyr-sdk/arm-zephyr-eabi/bin/arm-zephyr-eabi-objdump") +endif() + diff --git a/nrfdemo/build/mcuboot/zephyr/soc/soc/nrf9151/libsoc__nordic.a b/nrfdemo/build/mcuboot/zephyr/soc/soc/nrf9151/libsoc__nordic.a Binary files differnew file mode 100644 index 0000000..4892c45 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/soc/soc/nrf9151/libsoc__nordic.a diff --git a/nrfdemo/build/mcuboot/zephyr/soc/soc/nrf9151/nrf91/cmake_install.cmake b/nrfdemo/build/mcuboot/zephyr/soc/soc/nrf9151/nrf91/cmake_install.cmake new file mode 100644 index 0000000..08c8089 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/soc/soc/nrf9151/nrf91/cmake_install.cmake @@ -0,0 +1,39 @@ +# Install script for directory: /home/mike/Documents/ncs/v2.7.0/zephyr/soc/nordic/nrf91 + +# Set the install prefix +if(NOT DEFINED CMAKE_INSTALL_PREFIX) + set(CMAKE_INSTALL_PREFIX "/usr/local") +endif() +string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}") + +# Set the install configuration name. +if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME) + if(BUILD_TYPE) + string(REGEX REPLACE "^[^A-Za-z0-9_]+" "" + CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}") + else() + set(CMAKE_INSTALL_CONFIG_NAME "") + endif() + message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"") +endif() + +# Set the component getting installed. +if(NOT CMAKE_INSTALL_COMPONENT) + if(COMPONENT) + message(STATUS "Install component: \"${COMPONENT}\"") + set(CMAKE_INSTALL_COMPONENT "${COMPONENT}") + else() + set(CMAKE_INSTALL_COMPONENT) + endif() +endif() + +# Is this installation the result of a crosscompile? +if(NOT DEFINED CMAKE_CROSSCOMPILING) + set(CMAKE_CROSSCOMPILING "TRUE") +endif() + +# Set default install directory permissions. +if(NOT DEFINED CMAKE_OBJDUMP) + set(CMAKE_OBJDUMP "/home/mike/ncs/toolchains/e9dba88316/opt/zephyr-sdk/arm-zephyr-eabi/bin/arm-zephyr-eabi-objdump") +endif() + diff --git a/nrfdemo/build/mcuboot/zephyr/subsys/canbus/cmake_install.cmake b/nrfdemo/build/mcuboot/zephyr/subsys/canbus/cmake_install.cmake new file mode 100644 index 0000000..3c13183 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/subsys/canbus/cmake_install.cmake @@ -0,0 +1,39 @@ +# Install script for directory: /home/mike/Documents/ncs/v2.7.0/zephyr/subsys/canbus + +# Set the install prefix +if(NOT DEFINED CMAKE_INSTALL_PREFIX) + set(CMAKE_INSTALL_PREFIX "/usr/local") +endif() +string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}") + +# Set the install configuration name. +if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME) + if(BUILD_TYPE) + string(REGEX REPLACE "^[^A-Za-z0-9_]+" "" + CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}") + else() + set(CMAKE_INSTALL_CONFIG_NAME "") + endif() + message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"") +endif() + +# Set the component getting installed. +if(NOT CMAKE_INSTALL_COMPONENT) + if(COMPONENT) + message(STATUS "Install component: \"${COMPONENT}\"") + set(CMAKE_INSTALL_COMPONENT "${COMPONENT}") + else() + set(CMAKE_INSTALL_COMPONENT) + endif() +endif() + +# Is this installation the result of a crosscompile? +if(NOT DEFINED CMAKE_CROSSCOMPILING) + set(CMAKE_CROSSCOMPILING "TRUE") +endif() + +# Set default install directory permissions. +if(NOT DEFINED CMAKE_OBJDUMP) + set(CMAKE_OBJDUMP "/home/mike/ncs/toolchains/e9dba88316/opt/zephyr-sdk/arm-zephyr-eabi/bin/arm-zephyr-eabi-objdump") +endif() + diff --git a/nrfdemo/build/mcuboot/zephyr/subsys/cmake_install.cmake b/nrfdemo/build/mcuboot/zephyr/subsys/cmake_install.cmake new file mode 100644 index 0000000..8f8e916 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/subsys/cmake_install.cmake @@ -0,0 +1,64 @@ +# Install script for directory: /home/mike/Documents/ncs/v2.7.0/zephyr/subsys + +# Set the install prefix +if(NOT DEFINED CMAKE_INSTALL_PREFIX) + set(CMAKE_INSTALL_PREFIX "/usr/local") +endif() +string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}") + +# Set the install configuration name. +if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME) + if(BUILD_TYPE) + string(REGEX REPLACE "^[^A-Za-z0-9_]+" "" + CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}") + else() + set(CMAKE_INSTALL_CONFIG_NAME "") + endif() + message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"") +endif() + +# Set the component getting installed. +if(NOT CMAKE_INSTALL_COMPONENT) + if(COMPONENT) + message(STATUS "Install component: \"${COMPONENT}\"") + set(CMAKE_INSTALL_COMPONENT "${COMPONENT}") + else() + set(CMAKE_INSTALL_COMPONENT) + endif() +endif() + +# Is this installation the result of a crosscompile? +if(NOT DEFINED CMAKE_CROSSCOMPILING) + set(CMAKE_CROSSCOMPILING "TRUE") +endif() + +# Set default install directory permissions. +if(NOT DEFINED CMAKE_OBJDUMP) + set(CMAKE_OBJDUMP "/home/mike/ncs/toolchains/e9dba88316/opt/zephyr-sdk/arm-zephyr-eabi/bin/arm-zephyr-eabi-objdump") +endif() + +if(NOT CMAKE_INSTALL_LOCAL_ONLY) + # Include the install script for each subdirectory. + include("/home/mike/Documents/ncs/v2.7.0/conexio-firmware-sdk/samples/conexio_stratus/mqtt_control/build/mcuboot/zephyr/subsys/canbus/cmake_install.cmake") + include("/home/mike/Documents/ncs/v2.7.0/conexio-firmware-sdk/samples/conexio_stratus/mqtt_control/build/mcuboot/zephyr/subsys/debug/cmake_install.cmake") + include("/home/mike/Documents/ncs/v2.7.0/conexio-firmware-sdk/samples/conexio_stratus/mqtt_control/build/mcuboot/zephyr/subsys/fb/cmake_install.cmake") + include("/home/mike/Documents/ncs/v2.7.0/conexio-firmware-sdk/samples/conexio_stratus/mqtt_control/build/mcuboot/zephyr/subsys/fs/cmake_install.cmake") + include("/home/mike/Documents/ncs/v2.7.0/conexio-firmware-sdk/samples/conexio_stratus/mqtt_control/build/mcuboot/zephyr/subsys/ipc/cmake_install.cmake") + include("/home/mike/Documents/ncs/v2.7.0/conexio-firmware-sdk/samples/conexio_stratus/mqtt_control/build/mcuboot/zephyr/subsys/logging/cmake_install.cmake") + include("/home/mike/Documents/ncs/v2.7.0/conexio-firmware-sdk/samples/conexio_stratus/mqtt_control/build/mcuboot/zephyr/subsys/mem_mgmt/cmake_install.cmake") + include("/home/mike/Documents/ncs/v2.7.0/conexio-firmware-sdk/samples/conexio_stratus/mqtt_control/build/mcuboot/zephyr/subsys/mgmt/cmake_install.cmake") + include("/home/mike/Documents/ncs/v2.7.0/conexio-firmware-sdk/samples/conexio_stratus/mqtt_control/build/mcuboot/zephyr/subsys/modbus/cmake_install.cmake") + include("/home/mike/Documents/ncs/v2.7.0/conexio-firmware-sdk/samples/conexio_stratus/mqtt_control/build/mcuboot/zephyr/subsys/pm/cmake_install.cmake") + include("/home/mike/Documents/ncs/v2.7.0/conexio-firmware-sdk/samples/conexio_stratus/mqtt_control/build/mcuboot/zephyr/subsys/portability/cmake_install.cmake") + include("/home/mike/Documents/ncs/v2.7.0/conexio-firmware-sdk/samples/conexio_stratus/mqtt_control/build/mcuboot/zephyr/subsys/random/cmake_install.cmake") + include("/home/mike/Documents/ncs/v2.7.0/conexio-firmware-sdk/samples/conexio_stratus/mqtt_control/build/mcuboot/zephyr/subsys/rtio/cmake_install.cmake") + include("/home/mike/Documents/ncs/v2.7.0/conexio-firmware-sdk/samples/conexio_stratus/mqtt_control/build/mcuboot/zephyr/subsys/sd/cmake_install.cmake") + include("/home/mike/Documents/ncs/v2.7.0/conexio-firmware-sdk/samples/conexio_stratus/mqtt_control/build/mcuboot/zephyr/subsys/stats/cmake_install.cmake") + include("/home/mike/Documents/ncs/v2.7.0/conexio-firmware-sdk/samples/conexio_stratus/mqtt_control/build/mcuboot/zephyr/subsys/storage/cmake_install.cmake") + include("/home/mike/Documents/ncs/v2.7.0/conexio-firmware-sdk/samples/conexio_stratus/mqtt_control/build/mcuboot/zephyr/subsys/task_wdt/cmake_install.cmake") + include("/home/mike/Documents/ncs/v2.7.0/conexio-firmware-sdk/samples/conexio_stratus/mqtt_control/build/mcuboot/zephyr/subsys/testsuite/cmake_install.cmake") + include("/home/mike/Documents/ncs/v2.7.0/conexio-firmware-sdk/samples/conexio_stratus/mqtt_control/build/mcuboot/zephyr/subsys/tracing/cmake_install.cmake") + include("/home/mike/Documents/ncs/v2.7.0/conexio-firmware-sdk/samples/conexio_stratus/mqtt_control/build/mcuboot/zephyr/subsys/usb/cmake_install.cmake") + +endif() + diff --git a/nrfdemo/build/mcuboot/zephyr/subsys/debug/cmake_install.cmake b/nrfdemo/build/mcuboot/zephyr/subsys/debug/cmake_install.cmake new file mode 100644 index 0000000..eec9f27 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/subsys/debug/cmake_install.cmake @@ -0,0 +1,39 @@ +# Install script for directory: /home/mike/Documents/ncs/v2.7.0/zephyr/subsys/debug + +# Set the install prefix +if(NOT DEFINED CMAKE_INSTALL_PREFIX) + set(CMAKE_INSTALL_PREFIX "/usr/local") +endif() +string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}") + +# Set the install configuration name. +if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME) + if(BUILD_TYPE) + string(REGEX REPLACE "^[^A-Za-z0-9_]+" "" + CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}") + else() + set(CMAKE_INSTALL_CONFIG_NAME "") + endif() + message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"") +endif() + +# Set the component getting installed. +if(NOT CMAKE_INSTALL_COMPONENT) + if(COMPONENT) + message(STATUS "Install component: \"${COMPONENT}\"") + set(CMAKE_INSTALL_COMPONENT "${COMPONENT}") + else() + set(CMAKE_INSTALL_COMPONENT) + endif() +endif() + +# Is this installation the result of a crosscompile? +if(NOT DEFINED CMAKE_CROSSCOMPILING) + set(CMAKE_CROSSCOMPILING "TRUE") +endif() + +# Set default install directory permissions. +if(NOT DEFINED CMAKE_OBJDUMP) + set(CMAKE_OBJDUMP "/home/mike/ncs/toolchains/e9dba88316/opt/zephyr-sdk/arm-zephyr-eabi/bin/arm-zephyr-eabi-objdump") +endif() + diff --git a/nrfdemo/build/mcuboot/zephyr/subsys/fb/cmake_install.cmake b/nrfdemo/build/mcuboot/zephyr/subsys/fb/cmake_install.cmake new file mode 100644 index 0000000..10d48a2 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/subsys/fb/cmake_install.cmake @@ -0,0 +1,39 @@ +# Install script for directory: /home/mike/Documents/ncs/v2.7.0/zephyr/subsys/fb + +# Set the install prefix +if(NOT DEFINED CMAKE_INSTALL_PREFIX) + set(CMAKE_INSTALL_PREFIX "/usr/local") +endif() +string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}") + +# Set the install configuration name. +if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME) + if(BUILD_TYPE) + string(REGEX REPLACE "^[^A-Za-z0-9_]+" "" + CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}") + else() + set(CMAKE_INSTALL_CONFIG_NAME "") + endif() + message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"") +endif() + +# Set the component getting installed. +if(NOT CMAKE_INSTALL_COMPONENT) + if(COMPONENT) + message(STATUS "Install component: \"${COMPONENT}\"") + set(CMAKE_INSTALL_COMPONENT "${COMPONENT}") + else() + set(CMAKE_INSTALL_COMPONENT) + endif() +endif() + +# Is this installation the result of a crosscompile? +if(NOT DEFINED CMAKE_CROSSCOMPILING) + set(CMAKE_CROSSCOMPILING "TRUE") +endif() + +# Set default install directory permissions. +if(NOT DEFINED CMAKE_OBJDUMP) + set(CMAKE_OBJDUMP "/home/mike/ncs/toolchains/e9dba88316/opt/zephyr-sdk/arm-zephyr-eabi/bin/arm-zephyr-eabi-objdump") +endif() + diff --git a/nrfdemo/build/mcuboot/zephyr/subsys/fs/cmake_install.cmake b/nrfdemo/build/mcuboot/zephyr/subsys/fs/cmake_install.cmake new file mode 100644 index 0000000..8f9e9d4 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/subsys/fs/cmake_install.cmake @@ -0,0 +1,39 @@ +# Install script for directory: /home/mike/Documents/ncs/v2.7.0/zephyr/subsys/fs + +# Set the install prefix +if(NOT DEFINED CMAKE_INSTALL_PREFIX) + set(CMAKE_INSTALL_PREFIX "/usr/local") +endif() +string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}") + +# Set the install configuration name. +if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME) + if(BUILD_TYPE) + string(REGEX REPLACE "^[^A-Za-z0-9_]+" "" + CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}") + else() + set(CMAKE_INSTALL_CONFIG_NAME "") + endif() + message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"") +endif() + +# Set the component getting installed. +if(NOT CMAKE_INSTALL_COMPONENT) + if(COMPONENT) + message(STATUS "Install component: \"${COMPONENT}\"") + set(CMAKE_INSTALL_COMPONENT "${COMPONENT}") + else() + set(CMAKE_INSTALL_COMPONENT) + endif() +endif() + +# Is this installation the result of a crosscompile? +if(NOT DEFINED CMAKE_CROSSCOMPILING) + set(CMAKE_CROSSCOMPILING "TRUE") +endif() + +# Set default install directory permissions. +if(NOT DEFINED CMAKE_OBJDUMP) + set(CMAKE_OBJDUMP "/home/mike/ncs/toolchains/e9dba88316/opt/zephyr-sdk/arm-zephyr-eabi/bin/arm-zephyr-eabi-objdump") +endif() + diff --git a/nrfdemo/build/mcuboot/zephyr/subsys/ipc/cmake_install.cmake b/nrfdemo/build/mcuboot/zephyr/subsys/ipc/cmake_install.cmake new file mode 100644 index 0000000..2d7d9ed --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/subsys/ipc/cmake_install.cmake @@ -0,0 +1,39 @@ +# Install script for directory: /home/mike/Documents/ncs/v2.7.0/zephyr/subsys/ipc + +# Set the install prefix +if(NOT DEFINED CMAKE_INSTALL_PREFIX) + set(CMAKE_INSTALL_PREFIX "/usr/local") +endif() +string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}") + +# Set the install configuration name. +if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME) + if(BUILD_TYPE) + string(REGEX REPLACE "^[^A-Za-z0-9_]+" "" + CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}") + else() + set(CMAKE_INSTALL_CONFIG_NAME "") + endif() + message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"") +endif() + +# Set the component getting installed. +if(NOT CMAKE_INSTALL_COMPONENT) + if(COMPONENT) + message(STATUS "Install component: \"${COMPONENT}\"") + set(CMAKE_INSTALL_COMPONENT "${COMPONENT}") + else() + set(CMAKE_INSTALL_COMPONENT) + endif() +endif() + +# Is this installation the result of a crosscompile? +if(NOT DEFINED CMAKE_CROSSCOMPILING) + set(CMAKE_CROSSCOMPILING "TRUE") +endif() + +# Set default install directory permissions. +if(NOT DEFINED CMAKE_OBJDUMP) + set(CMAKE_OBJDUMP "/home/mike/ncs/toolchains/e9dba88316/opt/zephyr-sdk/arm-zephyr-eabi/bin/arm-zephyr-eabi-objdump") +endif() + diff --git a/nrfdemo/build/mcuboot/zephyr/subsys/logging/cmake_install.cmake b/nrfdemo/build/mcuboot/zephyr/subsys/logging/cmake_install.cmake new file mode 100644 index 0000000..eca9df7 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/subsys/logging/cmake_install.cmake @@ -0,0 +1,39 @@ +# Install script for directory: /home/mike/Documents/ncs/v2.7.0/zephyr/subsys/logging + +# Set the install prefix +if(NOT DEFINED CMAKE_INSTALL_PREFIX) + set(CMAKE_INSTALL_PREFIX "/usr/local") +endif() +string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}") + +# Set the install configuration name. +if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME) + if(BUILD_TYPE) + string(REGEX REPLACE "^[^A-Za-z0-9_]+" "" + CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}") + else() + set(CMAKE_INSTALL_CONFIG_NAME "") + endif() + message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"") +endif() + +# Set the component getting installed. +if(NOT CMAKE_INSTALL_COMPONENT) + if(COMPONENT) + message(STATUS "Install component: \"${COMPONENT}\"") + set(CMAKE_INSTALL_COMPONENT "${COMPONENT}") + else() + set(CMAKE_INSTALL_COMPONENT) + endif() +endif() + +# Is this installation the result of a crosscompile? +if(NOT DEFINED CMAKE_CROSSCOMPILING) + set(CMAKE_CROSSCOMPILING "TRUE") +endif() + +# Set default install directory permissions. +if(NOT DEFINED CMAKE_OBJDUMP) + set(CMAKE_OBJDUMP "/home/mike/ncs/toolchains/e9dba88316/opt/zephyr-sdk/arm-zephyr-eabi/bin/arm-zephyr-eabi-objdump") +endif() + diff --git a/nrfdemo/build/mcuboot/zephyr/subsys/mem_mgmt/cmake_install.cmake b/nrfdemo/build/mcuboot/zephyr/subsys/mem_mgmt/cmake_install.cmake new file mode 100644 index 0000000..d26a292 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/subsys/mem_mgmt/cmake_install.cmake @@ -0,0 +1,39 @@ +# Install script for directory: /home/mike/Documents/ncs/v2.7.0/zephyr/subsys/mem_mgmt + +# Set the install prefix +if(NOT DEFINED CMAKE_INSTALL_PREFIX) + set(CMAKE_INSTALL_PREFIX "/usr/local") +endif() +string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}") + +# Set the install configuration name. +if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME) + if(BUILD_TYPE) + string(REGEX REPLACE "^[^A-Za-z0-9_]+" "" + CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}") + else() + set(CMAKE_INSTALL_CONFIG_NAME "") + endif() + message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"") +endif() + +# Set the component getting installed. +if(NOT CMAKE_INSTALL_COMPONENT) + if(COMPONENT) + message(STATUS "Install component: \"${COMPONENT}\"") + set(CMAKE_INSTALL_COMPONENT "${COMPONENT}") + else() + set(CMAKE_INSTALL_COMPONENT) + endif() +endif() + +# Is this installation the result of a crosscompile? +if(NOT DEFINED CMAKE_CROSSCOMPILING) + set(CMAKE_CROSSCOMPILING "TRUE") +endif() + +# Set default install directory permissions. +if(NOT DEFINED CMAKE_OBJDUMP) + set(CMAKE_OBJDUMP "/home/mike/ncs/toolchains/e9dba88316/opt/zephyr-sdk/arm-zephyr-eabi/bin/arm-zephyr-eabi-objdump") +endif() + diff --git a/nrfdemo/build/mcuboot/zephyr/subsys/mgmt/cmake_install.cmake b/nrfdemo/build/mcuboot/zephyr/subsys/mgmt/cmake_install.cmake new file mode 100644 index 0000000..0186571 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/subsys/mgmt/cmake_install.cmake @@ -0,0 +1,39 @@ +# Install script for directory: /home/mike/Documents/ncs/v2.7.0/zephyr/subsys/mgmt + +# Set the install prefix +if(NOT DEFINED CMAKE_INSTALL_PREFIX) + set(CMAKE_INSTALL_PREFIX "/usr/local") +endif() +string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}") + +# Set the install configuration name. +if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME) + if(BUILD_TYPE) + string(REGEX REPLACE "^[^A-Za-z0-9_]+" "" + CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}") + else() + set(CMAKE_INSTALL_CONFIG_NAME "") + endif() + message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"") +endif() + +# Set the component getting installed. +if(NOT CMAKE_INSTALL_COMPONENT) + if(COMPONENT) + message(STATUS "Install component: \"${COMPONENT}\"") + set(CMAKE_INSTALL_COMPONENT "${COMPONENT}") + else() + set(CMAKE_INSTALL_COMPONENT) + endif() +endif() + +# Is this installation the result of a crosscompile? +if(NOT DEFINED CMAKE_CROSSCOMPILING) + set(CMAKE_CROSSCOMPILING "TRUE") +endif() + +# Set default install directory permissions. +if(NOT DEFINED CMAKE_OBJDUMP) + set(CMAKE_OBJDUMP "/home/mike/ncs/toolchains/e9dba88316/opt/zephyr-sdk/arm-zephyr-eabi/bin/arm-zephyr-eabi-objdump") +endif() + diff --git a/nrfdemo/build/mcuboot/zephyr/subsys/modbus/cmake_install.cmake b/nrfdemo/build/mcuboot/zephyr/subsys/modbus/cmake_install.cmake new file mode 100644 index 0000000..2951c59 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/subsys/modbus/cmake_install.cmake @@ -0,0 +1,39 @@ +# Install script for directory: /home/mike/Documents/ncs/v2.7.0/zephyr/subsys/modbus + +# Set the install prefix +if(NOT DEFINED CMAKE_INSTALL_PREFIX) + set(CMAKE_INSTALL_PREFIX "/usr/local") +endif() +string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}") + +# Set the install configuration name. +if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME) + if(BUILD_TYPE) + string(REGEX REPLACE "^[^A-Za-z0-9_]+" "" + CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}") + else() + set(CMAKE_INSTALL_CONFIG_NAME "") + endif() + message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"") +endif() + +# Set the component getting installed. +if(NOT CMAKE_INSTALL_COMPONENT) + if(COMPONENT) + message(STATUS "Install component: \"${COMPONENT}\"") + set(CMAKE_INSTALL_COMPONENT "${COMPONENT}") + else() + set(CMAKE_INSTALL_COMPONENT) + endif() +endif() + +# Is this installation the result of a crosscompile? +if(NOT DEFINED CMAKE_CROSSCOMPILING) + set(CMAKE_CROSSCOMPILING "TRUE") +endif() + +# Set default install directory permissions. +if(NOT DEFINED CMAKE_OBJDUMP) + set(CMAKE_OBJDUMP "/home/mike/ncs/toolchains/e9dba88316/opt/zephyr-sdk/arm-zephyr-eabi/bin/arm-zephyr-eabi-objdump") +endif() + diff --git a/nrfdemo/build/mcuboot/zephyr/subsys/pm/cmake_install.cmake b/nrfdemo/build/mcuboot/zephyr/subsys/pm/cmake_install.cmake new file mode 100644 index 0000000..6a508ae --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/subsys/pm/cmake_install.cmake @@ -0,0 +1,39 @@ +# Install script for directory: /home/mike/Documents/ncs/v2.7.0/zephyr/subsys/pm + +# Set the install prefix +if(NOT DEFINED CMAKE_INSTALL_PREFIX) + set(CMAKE_INSTALL_PREFIX "/usr/local") +endif() +string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}") + +# Set the install configuration name. +if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME) + if(BUILD_TYPE) + string(REGEX REPLACE "^[^A-Za-z0-9_]+" "" + CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}") + else() + set(CMAKE_INSTALL_CONFIG_NAME "") + endif() + message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"") +endif() + +# Set the component getting installed. +if(NOT CMAKE_INSTALL_COMPONENT) + if(COMPONENT) + message(STATUS "Install component: \"${COMPONENT}\"") + set(CMAKE_INSTALL_COMPONENT "${COMPONENT}") + else() + set(CMAKE_INSTALL_COMPONENT) + endif() +endif() + +# Is this installation the result of a crosscompile? +if(NOT DEFINED CMAKE_CROSSCOMPILING) + set(CMAKE_CROSSCOMPILING "TRUE") +endif() + +# Set default install directory permissions. +if(NOT DEFINED CMAKE_OBJDUMP) + set(CMAKE_OBJDUMP "/home/mike/ncs/toolchains/e9dba88316/opt/zephyr-sdk/arm-zephyr-eabi/bin/arm-zephyr-eabi-objdump") +endif() + diff --git a/nrfdemo/build/mcuboot/zephyr/subsys/portability/cmake_install.cmake b/nrfdemo/build/mcuboot/zephyr/subsys/portability/cmake_install.cmake new file mode 100644 index 0000000..6ff52f8 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/subsys/portability/cmake_install.cmake @@ -0,0 +1,39 @@ +# Install script for directory: /home/mike/Documents/ncs/v2.7.0/zephyr/subsys/portability + +# Set the install prefix +if(NOT DEFINED CMAKE_INSTALL_PREFIX) + set(CMAKE_INSTALL_PREFIX "/usr/local") +endif() +string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}") + +# Set the install configuration name. +if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME) + if(BUILD_TYPE) + string(REGEX REPLACE "^[^A-Za-z0-9_]+" "" + CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}") + else() + set(CMAKE_INSTALL_CONFIG_NAME "") + endif() + message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"") +endif() + +# Set the component getting installed. +if(NOT CMAKE_INSTALL_COMPONENT) + if(COMPONENT) + message(STATUS "Install component: \"${COMPONENT}\"") + set(CMAKE_INSTALL_COMPONENT "${COMPONENT}") + else() + set(CMAKE_INSTALL_COMPONENT) + endif() +endif() + +# Is this installation the result of a crosscompile? +if(NOT DEFINED CMAKE_CROSSCOMPILING) + set(CMAKE_CROSSCOMPILING "TRUE") +endif() + +# Set default install directory permissions. +if(NOT DEFINED CMAKE_OBJDUMP) + set(CMAKE_OBJDUMP "/home/mike/ncs/toolchains/e9dba88316/opt/zephyr-sdk/arm-zephyr-eabi/bin/arm-zephyr-eabi-objdump") +endif() + diff --git a/nrfdemo/build/mcuboot/zephyr/subsys/random/cmake_install.cmake b/nrfdemo/build/mcuboot/zephyr/subsys/random/cmake_install.cmake new file mode 100644 index 0000000..47009b9 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/subsys/random/cmake_install.cmake @@ -0,0 +1,39 @@ +# Install script for directory: /home/mike/Documents/ncs/v2.7.0/zephyr/subsys/random + +# Set the install prefix +if(NOT DEFINED CMAKE_INSTALL_PREFIX) + set(CMAKE_INSTALL_PREFIX "/usr/local") +endif() +string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}") + +# Set the install configuration name. +if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME) + if(BUILD_TYPE) + string(REGEX REPLACE "^[^A-Za-z0-9_]+" "" + CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}") + else() + set(CMAKE_INSTALL_CONFIG_NAME "") + endif() + message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"") +endif() + +# Set the component getting installed. +if(NOT CMAKE_INSTALL_COMPONENT) + if(COMPONENT) + message(STATUS "Install component: \"${COMPONENT}\"") + set(CMAKE_INSTALL_COMPONENT "${COMPONENT}") + else() + set(CMAKE_INSTALL_COMPONENT) + endif() +endif() + +# Is this installation the result of a crosscompile? +if(NOT DEFINED CMAKE_CROSSCOMPILING) + set(CMAKE_CROSSCOMPILING "TRUE") +endif() + +# Set default install directory permissions. +if(NOT DEFINED CMAKE_OBJDUMP) + set(CMAKE_OBJDUMP "/home/mike/ncs/toolchains/e9dba88316/opt/zephyr-sdk/arm-zephyr-eabi/bin/arm-zephyr-eabi-objdump") +endif() + diff --git a/nrfdemo/build/mcuboot/zephyr/subsys/rtio/cmake_install.cmake b/nrfdemo/build/mcuboot/zephyr/subsys/rtio/cmake_install.cmake new file mode 100644 index 0000000..a388561 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/subsys/rtio/cmake_install.cmake @@ -0,0 +1,39 @@ +# Install script for directory: /home/mike/Documents/ncs/v2.7.0/zephyr/subsys/rtio + +# Set the install prefix +if(NOT DEFINED CMAKE_INSTALL_PREFIX) + set(CMAKE_INSTALL_PREFIX "/usr/local") +endif() +string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}") + +# Set the install configuration name. +if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME) + if(BUILD_TYPE) + string(REGEX REPLACE "^[^A-Za-z0-9_]+" "" + CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}") + else() + set(CMAKE_INSTALL_CONFIG_NAME "") + endif() + message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"") +endif() + +# Set the component getting installed. +if(NOT CMAKE_INSTALL_COMPONENT) + if(COMPONENT) + message(STATUS "Install component: \"${COMPONENT}\"") + set(CMAKE_INSTALL_COMPONENT "${COMPONENT}") + else() + set(CMAKE_INSTALL_COMPONENT) + endif() +endif() + +# Is this installation the result of a crosscompile? +if(NOT DEFINED CMAKE_CROSSCOMPILING) + set(CMAKE_CROSSCOMPILING "TRUE") +endif() + +# Set default install directory permissions. +if(NOT DEFINED CMAKE_OBJDUMP) + set(CMAKE_OBJDUMP "/home/mike/ncs/toolchains/e9dba88316/opt/zephyr-sdk/arm-zephyr-eabi/bin/arm-zephyr-eabi-objdump") +endif() + diff --git a/nrfdemo/build/mcuboot/zephyr/subsys/sd/cmake_install.cmake b/nrfdemo/build/mcuboot/zephyr/subsys/sd/cmake_install.cmake new file mode 100644 index 0000000..d395188 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/subsys/sd/cmake_install.cmake @@ -0,0 +1,39 @@ +# Install script for directory: /home/mike/Documents/ncs/v2.7.0/zephyr/subsys/sd + +# Set the install prefix +if(NOT DEFINED CMAKE_INSTALL_PREFIX) + set(CMAKE_INSTALL_PREFIX "/usr/local") +endif() +string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}") + +# Set the install configuration name. +if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME) + if(BUILD_TYPE) + string(REGEX REPLACE "^[^A-Za-z0-9_]+" "" + CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}") + else() + set(CMAKE_INSTALL_CONFIG_NAME "") + endif() + message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"") +endif() + +# Set the component getting installed. +if(NOT CMAKE_INSTALL_COMPONENT) + if(COMPONENT) + message(STATUS "Install component: \"${COMPONENT}\"") + set(CMAKE_INSTALL_COMPONENT "${COMPONENT}") + else() + set(CMAKE_INSTALL_COMPONENT) + endif() +endif() + +# Is this installation the result of a crosscompile? +if(NOT DEFINED CMAKE_CROSSCOMPILING) + set(CMAKE_CROSSCOMPILING "TRUE") +endif() + +# Set default install directory permissions. +if(NOT DEFINED CMAKE_OBJDUMP) + set(CMAKE_OBJDUMP "/home/mike/ncs/toolchains/e9dba88316/opt/zephyr-sdk/arm-zephyr-eabi/bin/arm-zephyr-eabi-objdump") +endif() + diff --git a/nrfdemo/build/mcuboot/zephyr/subsys/stats/cmake_install.cmake b/nrfdemo/build/mcuboot/zephyr/subsys/stats/cmake_install.cmake new file mode 100644 index 0000000..0e19a42 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/subsys/stats/cmake_install.cmake @@ -0,0 +1,39 @@ +# Install script for directory: /home/mike/Documents/ncs/v2.7.0/zephyr/subsys/stats + +# Set the install prefix +if(NOT DEFINED CMAKE_INSTALL_PREFIX) + set(CMAKE_INSTALL_PREFIX "/usr/local") +endif() +string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}") + +# Set the install configuration name. +if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME) + if(BUILD_TYPE) + string(REGEX REPLACE "^[^A-Za-z0-9_]+" "" + CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}") + else() + set(CMAKE_INSTALL_CONFIG_NAME "") + endif() + message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"") +endif() + +# Set the component getting installed. +if(NOT CMAKE_INSTALL_COMPONENT) + if(COMPONENT) + message(STATUS "Install component: \"${COMPONENT}\"") + set(CMAKE_INSTALL_COMPONENT "${COMPONENT}") + else() + set(CMAKE_INSTALL_COMPONENT) + endif() +endif() + +# Is this installation the result of a crosscompile? +if(NOT DEFINED CMAKE_CROSSCOMPILING) + set(CMAKE_CROSSCOMPILING "TRUE") +endif() + +# Set default install directory permissions. +if(NOT DEFINED CMAKE_OBJDUMP) + set(CMAKE_OBJDUMP "/home/mike/ncs/toolchains/e9dba88316/opt/zephyr-sdk/arm-zephyr-eabi/bin/arm-zephyr-eabi-objdump") +endif() + diff --git a/nrfdemo/build/mcuboot/zephyr/subsys/storage/cmake_install.cmake b/nrfdemo/build/mcuboot/zephyr/subsys/storage/cmake_install.cmake new file mode 100644 index 0000000..2427f97 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/subsys/storage/cmake_install.cmake @@ -0,0 +1,45 @@ +# Install script for directory: /home/mike/Documents/ncs/v2.7.0/zephyr/subsys/storage + +# Set the install prefix +if(NOT DEFINED CMAKE_INSTALL_PREFIX) + set(CMAKE_INSTALL_PREFIX "/usr/local") +endif() +string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}") + +# Set the install configuration name. +if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME) + if(BUILD_TYPE) + string(REGEX REPLACE "^[^A-Za-z0-9_]+" "" + CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}") + else() + set(CMAKE_INSTALL_CONFIG_NAME "") + endif() + message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"") +endif() + +# Set the component getting installed. +if(NOT CMAKE_INSTALL_COMPONENT) + if(COMPONENT) + message(STATUS "Install component: \"${COMPONENT}\"") + set(CMAKE_INSTALL_COMPONENT "${COMPONENT}") + else() + set(CMAKE_INSTALL_COMPONENT) + endif() +endif() + +# Is this installation the result of a crosscompile? +if(NOT DEFINED CMAKE_CROSSCOMPILING) + set(CMAKE_CROSSCOMPILING "TRUE") +endif() + +# Set default install directory permissions. +if(NOT DEFINED CMAKE_OBJDUMP) + set(CMAKE_OBJDUMP "/home/mike/ncs/toolchains/e9dba88316/opt/zephyr-sdk/arm-zephyr-eabi/bin/arm-zephyr-eabi-objdump") +endif() + +if(NOT CMAKE_INSTALL_LOCAL_ONLY) + # Include the install script for each subdirectory. + include("/home/mike/Documents/ncs/v2.7.0/conexio-firmware-sdk/samples/conexio_stratus/mqtt_control/build/mcuboot/zephyr/subsys/storage/flash_map/cmake_install.cmake") + +endif() + diff --git a/nrfdemo/build/mcuboot/zephyr/subsys/storage/flash_map/cmake_install.cmake b/nrfdemo/build/mcuboot/zephyr/subsys/storage/flash_map/cmake_install.cmake new file mode 100644 index 0000000..918b8c2 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/subsys/storage/flash_map/cmake_install.cmake @@ -0,0 +1,39 @@ +# Install script for directory: /home/mike/Documents/ncs/v2.7.0/zephyr/subsys/storage/flash_map + +# Set the install prefix +if(NOT DEFINED CMAKE_INSTALL_PREFIX) + set(CMAKE_INSTALL_PREFIX "/usr/local") +endif() +string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}") + +# Set the install configuration name. +if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME) + if(BUILD_TYPE) + string(REGEX REPLACE "^[^A-Za-z0-9_]+" "" + CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}") + else() + set(CMAKE_INSTALL_CONFIG_NAME "") + endif() + message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"") +endif() + +# Set the component getting installed. +if(NOT CMAKE_INSTALL_COMPONENT) + if(COMPONENT) + message(STATUS "Install component: \"${COMPONENT}\"") + set(CMAKE_INSTALL_COMPONENT "${COMPONENT}") + else() + set(CMAKE_INSTALL_COMPONENT) + endif() +endif() + +# Is this installation the result of a crosscompile? +if(NOT DEFINED CMAKE_CROSSCOMPILING) + set(CMAKE_CROSSCOMPILING "TRUE") +endif() + +# Set default install directory permissions. +if(NOT DEFINED CMAKE_OBJDUMP) + set(CMAKE_OBJDUMP "/home/mike/ncs/toolchains/e9dba88316/opt/zephyr-sdk/arm-zephyr-eabi/bin/arm-zephyr-eabi-objdump") +endif() + diff --git a/nrfdemo/build/mcuboot/zephyr/subsys/task_wdt/cmake_install.cmake b/nrfdemo/build/mcuboot/zephyr/subsys/task_wdt/cmake_install.cmake new file mode 100644 index 0000000..2c490b0 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/subsys/task_wdt/cmake_install.cmake @@ -0,0 +1,39 @@ +# Install script for directory: /home/mike/Documents/ncs/v2.7.0/zephyr/subsys/task_wdt + +# Set the install prefix +if(NOT DEFINED CMAKE_INSTALL_PREFIX) + set(CMAKE_INSTALL_PREFIX "/usr/local") +endif() +string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}") + +# Set the install configuration name. +if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME) + if(BUILD_TYPE) + string(REGEX REPLACE "^[^A-Za-z0-9_]+" "" + CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}") + else() + set(CMAKE_INSTALL_CONFIG_NAME "") + endif() + message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"") +endif() + +# Set the component getting installed. +if(NOT CMAKE_INSTALL_COMPONENT) + if(COMPONENT) + message(STATUS "Install component: \"${COMPONENT}\"") + set(CMAKE_INSTALL_COMPONENT "${COMPONENT}") + else() + set(CMAKE_INSTALL_COMPONENT) + endif() +endif() + +# Is this installation the result of a crosscompile? +if(NOT DEFINED CMAKE_CROSSCOMPILING) + set(CMAKE_CROSSCOMPILING "TRUE") +endif() + +# Set default install directory permissions. +if(NOT DEFINED CMAKE_OBJDUMP) + set(CMAKE_OBJDUMP "/home/mike/ncs/toolchains/e9dba88316/opt/zephyr-sdk/arm-zephyr-eabi/bin/arm-zephyr-eabi-objdump") +endif() + diff --git a/nrfdemo/build/mcuboot/zephyr/subsys/testsuite/cmake_install.cmake b/nrfdemo/build/mcuboot/zephyr/subsys/testsuite/cmake_install.cmake new file mode 100644 index 0000000..6d41c9a --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/subsys/testsuite/cmake_install.cmake @@ -0,0 +1,39 @@ +# Install script for directory: /home/mike/Documents/ncs/v2.7.0/zephyr/subsys/testsuite + +# Set the install prefix +if(NOT DEFINED CMAKE_INSTALL_PREFIX) + set(CMAKE_INSTALL_PREFIX "/usr/local") +endif() +string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}") + +# Set the install configuration name. +if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME) + if(BUILD_TYPE) + string(REGEX REPLACE "^[^A-Za-z0-9_]+" "" + CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}") + else() + set(CMAKE_INSTALL_CONFIG_NAME "") + endif() + message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"") +endif() + +# Set the component getting installed. +if(NOT CMAKE_INSTALL_COMPONENT) + if(COMPONENT) + message(STATUS "Install component: \"${COMPONENT}\"") + set(CMAKE_INSTALL_COMPONENT "${COMPONENT}") + else() + set(CMAKE_INSTALL_COMPONENT) + endif() +endif() + +# Is this installation the result of a crosscompile? +if(NOT DEFINED CMAKE_CROSSCOMPILING) + set(CMAKE_CROSSCOMPILING "TRUE") +endif() + +# Set default install directory permissions. +if(NOT DEFINED CMAKE_OBJDUMP) + set(CMAKE_OBJDUMP "/home/mike/ncs/toolchains/e9dba88316/opt/zephyr-sdk/arm-zephyr-eabi/bin/arm-zephyr-eabi-objdump") +endif() + diff --git a/nrfdemo/build/mcuboot/zephyr/subsys/tracing/cmake_install.cmake b/nrfdemo/build/mcuboot/zephyr/subsys/tracing/cmake_install.cmake new file mode 100644 index 0000000..08af04a --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/subsys/tracing/cmake_install.cmake @@ -0,0 +1,39 @@ +# Install script for directory: /home/mike/Documents/ncs/v2.7.0/zephyr/subsys/tracing + +# Set the install prefix +if(NOT DEFINED CMAKE_INSTALL_PREFIX) + set(CMAKE_INSTALL_PREFIX "/usr/local") +endif() +string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}") + +# Set the install configuration name. +if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME) + if(BUILD_TYPE) + string(REGEX REPLACE "^[^A-Za-z0-9_]+" "" + CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}") + else() + set(CMAKE_INSTALL_CONFIG_NAME "") + endif() + message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"") +endif() + +# Set the component getting installed. +if(NOT CMAKE_INSTALL_COMPONENT) + if(COMPONENT) + message(STATUS "Install component: \"${COMPONENT}\"") + set(CMAKE_INSTALL_COMPONENT "${COMPONENT}") + else() + set(CMAKE_INSTALL_COMPONENT) + endif() +endif() + +# Is this installation the result of a crosscompile? +if(NOT DEFINED CMAKE_CROSSCOMPILING) + set(CMAKE_CROSSCOMPILING "TRUE") +endif() + +# Set default install directory permissions. +if(NOT DEFINED CMAKE_OBJDUMP) + set(CMAKE_OBJDUMP "/home/mike/ncs/toolchains/e9dba88316/opt/zephyr-sdk/arm-zephyr-eabi/bin/arm-zephyr-eabi-objdump") +endif() + diff --git a/nrfdemo/build/mcuboot/zephyr/subsys/usb/cmake_install.cmake b/nrfdemo/build/mcuboot/zephyr/subsys/usb/cmake_install.cmake new file mode 100644 index 0000000..700f90e --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/subsys/usb/cmake_install.cmake @@ -0,0 +1,39 @@ +# Install script for directory: /home/mike/Documents/ncs/v2.7.0/zephyr/subsys/usb + +# Set the install prefix +if(NOT DEFINED CMAKE_INSTALL_PREFIX) + set(CMAKE_INSTALL_PREFIX "/usr/local") +endif() +string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}") + +# Set the install configuration name. +if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME) + if(BUILD_TYPE) + string(REGEX REPLACE "^[^A-Za-z0-9_]+" "" + CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}") + else() + set(CMAKE_INSTALL_CONFIG_NAME "") + endif() + message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"") +endif() + +# Set the component getting installed. +if(NOT CMAKE_INSTALL_COMPONENT) + if(COMPONENT) + message(STATUS "Install component: \"${COMPONENT}\"") + set(CMAKE_INSTALL_COMPONENT "${COMPONENT}") + else() + set(CMAKE_INSTALL_COMPONENT) + endif() +endif() + +# Is this installation the result of a crosscompile? +if(NOT DEFINED CMAKE_CROSSCOMPILING) + set(CMAKE_CROSSCOMPILING "TRUE") +endif() + +# Set default install directory permissions. +if(NOT DEFINED CMAKE_OBJDUMP) + set(CMAKE_OBJDUMP "/home/mike/ncs/toolchains/e9dba88316/opt/zephyr-sdk/arm-zephyr-eabi/bin/arm-zephyr-eabi-objdump") +endif() + diff --git a/nrfdemo/build/mcuboot/zephyr/zephyr.bin b/nrfdemo/build/mcuboot/zephyr/zephyr.bin Binary files differnew file mode 100755 index 0000000..bddb076 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/zephyr.bin diff --git a/nrfdemo/build/mcuboot/zephyr/zephyr.dts b/nrfdemo/build/mcuboot/zephyr/zephyr.dts new file mode 100644 index 0000000..ae59382 --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/zephyr.dts @@ -0,0 +1,642 @@ +/dts-v1/; + +/ { + #address-cells = < 0x1 >; + #size-cells = < 0x1 >; + model = "Conexio Stratus Pro"; + compatible = "conexio,stratus_pro"; + chosen { + zephyr,entropy = &cryptocell; + zephyr,flash-controller = &flash_controller; + zephyr,console = &uart0; + zephyr,shell-uart = &uart0; + zephyr,uart-mcumgr = &uart0; + zephyr,sram = &sram0_s; + zephyr,flash = &flash0; + zephyr,code-partition = &boot_partition; + zephyr,sram-secure-partition = &sram0_s; + zephyr,sram-non-secure-partition = &sram0_ns; + }; + aliases { + led0 = &led0; + pwm-led0 = &pwm_led0; + sw0 = &button0; + bootloader-led0 = &led0; + mcuboot-button0 = &button0; + mcuboot-led0 = &led0; + watchdog0 = &wdt0; + }; + soc { + #address-cells = < 0x1 >; + #size-cells = < 0x1 >; + compatible = "nordic,nrf9151-laca", "nordic,nrf9120", "nordic,nrf91", "simple-bus"; + interrupt-parent = < &nvic >; + ranges; + nvic: interrupt-controller@e000e100 { + #address-cells = < 0x1 >; + compatible = "arm,v8m-nvic"; + reg = < 0xe000e100 0xc00 >; + interrupt-controller; + #interrupt-cells = < 0x2 >; + arm,num-irq-priority-bits = < 0x3 >; + phandle = < 0x1 >; + }; + systick: timer@e000e010 { + compatible = "arm,armv8m-systick"; + reg = < 0xe000e010 0x10 >; + status = "disabled"; + }; + sram0: memory@20000000 { + compatible = "mmio-sram"; + reg = < 0x20000000 0x40000 >; + }; + peripheral@50000000 { + #address-cells = < 0x1 >; + #size-cells = < 0x1 >; + ranges = < 0x0 0x50000000 0x10000000 >; + flash_controller: flash-controller@39000 { + compatible = "nordic,nrf91-flash-controller"; + reg = < 0x39000 0x1000 >; + partial-erase; + #address-cells = < 0x1 >; + #size-cells = < 0x1 >; + flash0: flash@0 { + compatible = "soc-nv-flash"; + erase-block-size = < 0x1000 >; + write-block-size = < 0x4 >; + reg = < 0x0 0x100000 >; + partitions { + compatible = "fixed-partitions"; + #address-cells = < 0x1 >; + #size-cells = < 0x1 >; + boot_partition: partition@0 { + label = "mcuboot"; + reg = < 0x0 0x10000 >; + }; + slot0_partition: partition@10000 { + label = "image-0"; + reg = < 0x10000 0x40000 >; + }; + slot0_ns_partition: partition@50000 { + label = "image-0-nonsecure"; + reg = < 0x50000 0x30000 >; + }; + slot1_partition: partition@80000 { + label = "image-1"; + reg = < 0x80000 0x40000 >; + }; + slot1_ns_partition: partition@c0000 { + label = "image-1-nonsecure"; + reg = < 0xc0000 0x30000 >; + }; + scratch_partition: partition@f0000 { + label = "image-scratch"; + reg = < 0xf0000 0xa000 >; + }; + storage_partition: partition@fa000 { + label = "storage"; + reg = < 0xfa000 0x6000 >; + }; + }; + }; + }; + adc: adc@e000 { + compatible = "nordic,nrf-saadc"; + reg = < 0xe000 0x1000 >; + interrupts = < 0xe 0x1 >; + status = "okay"; + #io-channel-cells = < 0x1 >; + }; + dppic: dppic@17000 { + compatible = "nordic,nrf-dppic"; + reg = < 0x17000 0x1000 >; + status = "okay"; + }; + egu0: egu@1b000 { + compatible = "nordic,nrf-egu"; + reg = < 0x1b000 0x1000 >; + interrupts = < 0x1b 0x1 >; + status = "okay"; + }; + egu1: egu@1c000 { + compatible = "nordic,nrf-egu"; + reg = < 0x1c000 0x1000 >; + interrupts = < 0x1c 0x1 >; + status = "okay"; + }; + egu2: egu@1d000 { + compatible = "nordic,nrf-egu"; + reg = < 0x1d000 0x1000 >; + interrupts = < 0x1d 0x1 >; + status = "okay"; + }; + egu3: egu@1e000 { + compatible = "nordic,nrf-egu"; + reg = < 0x1e000 0x1000 >; + interrupts = < 0x1e 0x1 >; + status = "okay"; + }; + egu4: egu@1f000 { + compatible = "nordic,nrf-egu"; + reg = < 0x1f000 0x1000 >; + interrupts = < 0x1f 0x1 >; + status = "okay"; + }; + egu5: egu@20000 { + compatible = "nordic,nrf-egu"; + reg = < 0x20000 0x1000 >; + interrupts = < 0x20 0x1 >; + status = "okay"; + }; + ipc: ipc@2a000 { + compatible = "nordic,nrf-ipc"; + reg = < 0x2a000 0x1000 >; + interrupts = < 0x2a 0x1 >; + status = "okay"; + }; + i2s0: i2s@28000 { + compatible = "nordic,nrf-i2s"; + #address-cells = < 0x1 >; + #size-cells = < 0x0 >; + reg = < 0x28000 0x1000 >; + interrupts = < 0x28 0x1 >; + status = "disabled"; + }; + kmu: kmu@39000 { + compatible = "nordic,nrf-kmu"; + reg = < 0x39000 0x1000 >; + interrupts = < 0x39 0x1 >; + status = "okay"; + }; + pdm0: pdm@26000 { + compatible = "nordic,nrf-pdm"; + reg = < 0x26000 0x1000 >; + interrupts = < 0x26 0x1 >; + status = "disabled"; + }; + regulators: regulator@4000 { + compatible = "nordic,nrf-regulators"; + reg = < 0x4000 0x1000 >; + status = "okay"; + }; + vmc: vmc@3a000 { + compatible = "nordic,nrf-vmc"; + reg = < 0x3a000 0x1000 >; + status = "okay"; + }; + uart0: uart@8000 { + compatible = "nordic,nrf-uarte"; + reg = < 0x8000 0x1000 >; + interrupts = < 0x8 0x1 >; + status = "okay"; + current-speed = < 0x1c200 >; + pinctrl-0 = < &uart0_default >; + pinctrl-1 = < &uart0_sleep >; + pinctrl-names = "default", "sleep"; + }; + uart1: uart@9000 { + compatible = "nordic,nrf-uarte"; + reg = < 0x9000 0x1000 >; + interrupts = < 0x9 0x1 >; + status = "disabled"; + }; + uart2: uart@a000 { + compatible = "nordic,nrf-uarte"; + reg = < 0xa000 0x1000 >; + interrupts = < 0xa 0x1 >; + status = "disabled"; + }; + uart3: uart@b000 { + compatible = "nordic,nrf-uarte"; + reg = < 0xb000 0x1000 >; + interrupts = < 0xb 0x1 >; + status = "disabled"; + }; + i2c0: i2c@8000 { + compatible = "nordic,nrf-twim"; + #address-cells = < 0x1 >; + #size-cells = < 0x0 >; + reg = < 0x8000 0x1000 >; + clock-frequency = < 0x186a0 >; + interrupts = < 0x8 0x1 >; + easydma-maxcnt-bits = < 0xd >; + status = "disabled"; + }; + i2c1: i2c@9000 { + compatible = "nordic,nrf-twim"; + #address-cells = < 0x1 >; + #size-cells = < 0x0 >; + reg = < 0x9000 0x1000 >; + clock-frequency = < 0x186a0 >; + interrupts = < 0x9 0x1 >; + easydma-maxcnt-bits = < 0xd >; + status = "disabled"; + }; + i2c2: i2c@a000 { + compatible = "nordic,nrf-twim"; + #address-cells = < 0x1 >; + #size-cells = < 0x0 >; + reg = < 0xa000 0x1000 >; + clock-frequency = < 0x61a80 >; + interrupts = < 0xa 0x1 >; + easydma-maxcnt-bits = < 0xd >; + status = "okay"; + pinctrl-0 = < &i2c2_default >; + pinctrl-1 = < &i2c2_sleep >; + pinctrl-names = "default", "sleep"; + pmic_main: npm1300@6b { + compatible = "nordic,npm1300"; + reg = < 0x6b >; + pmic_charger: charger { + compatible = "nordic,npm1300-charger"; + term-microvolt = < 0x3f52f0 >; + term-warm-microvolt = < 0x3d0900 >; + current-microamp = < 0xc3500 >; + dischg-limit-microamp = < 0xf4240 >; + vbus-limit-microamp = < 0xf4240 >; + thermistor-ohms = < 0x2710 >; + thermistor-beta = < 0xd34 >; + charging-enable; + }; + regulators { + compatible = "nordic,npm1300-regulator"; + reg_1v8: BUCK1 { + regulator-min-microvolt = < 0x1b7740 >; + regulator-max-microvolt = < 0x1b7740 >; + regulator-boot-on; + }; + reg_3v3: BUCK2 { + regulator-min-microvolt = < 0x325aa0 >; + regulator-max-microvolt = < 0x325aa0 >; + regulator-boot-on; + }; + }; + }; + lis2dh: lis2dh@18 { + compatible = "st,lis2dh"; + reg = < 0x18 >; + irq-gpios = < &gpio0 0x1d 0x0 >; + disconnect-sdo-sa0-pull-up; + }; + eeprom0: eeprom@50 { + compatible = "atmel,at24"; + reg = < 0x50 >; + size = < 0x800 >; + pagesize = < 0x20 >; + address-width = < 0x10 >; + timeout = < 0x5 >; + }; + }; + i2c3: i2c@b000 { + compatible = "nordic,nrf-twim"; + #address-cells = < 0x1 >; + #size-cells = < 0x0 >; + reg = < 0xb000 0x1000 >; + clock-frequency = < 0x186a0 >; + interrupts = < 0xb 0x1 >; + easydma-maxcnt-bits = < 0xd >; + status = "disabled"; + }; + spi0: spi@8000 { + compatible = "nordic,nrf-spim"; + #address-cells = < 0x1 >; + #size-cells = < 0x0 >; + reg = < 0x8000 0x1000 >; + interrupts = < 0x8 0x1 >; + max-frequency = < 0x7a1200 >; + easydma-maxcnt-bits = < 0xd >; + status = "disabled"; + }; + spi1: spi@9000 { + compatible = "nordic,nrf-spim"; + #address-cells = < 0x1 >; + #size-cells = < 0x0 >; + reg = < 0x9000 0x1000 >; + interrupts = < 0x9 0x1 >; + max-frequency = < 0x7a1200 >; + easydma-maxcnt-bits = < 0xd >; + status = "disabled"; + }; + spi2: spi@a000 { + compatible = "nordic,nrf-spim"; + #address-cells = < 0x1 >; + #size-cells = < 0x0 >; + reg = < 0xa000 0x1000 >; + interrupts = < 0xa 0x1 >; + max-frequency = < 0x7a1200 >; + easydma-maxcnt-bits = < 0xd >; + status = "disabled"; + }; + spi3: edge_connector_spi: spi@b000 { + compatible = "nordic,nrf-spim"; + #address-cells = < 0x1 >; + #size-cells = < 0x0 >; + reg = < 0xb000 0x1000 >; + interrupts = < 0xb 0x1 >; + max-frequency = < 0x7a1200 >; + easydma-maxcnt-bits = < 0xd >; + status = "disabled"; + cs-gpios = < &gpio0 0x11 0x1 >; + pinctrl-0 = < &spi3_default >; + pinctrl-1 = < &spi3_sleep >; + pinctrl-names = "default", "sleep"; + }; + pwm0: pwm@21000 { + compatible = "nordic,nrf-pwm"; + reg = < 0x21000 0x1000 >; + interrupts = < 0x21 0x1 >; + status = "okay"; + #pwm-cells = < 0x3 >; + pinctrl-0 = < &pwm0_default >; + pinctrl-1 = < &pwm0_sleep >; + pinctrl-names = "default", "sleep"; + phandle = < 0xd >; + }; + pwm1: pwm@22000 { + compatible = "nordic,nrf-pwm"; + reg = < 0x22000 0x1000 >; + interrupts = < 0x22 0x1 >; + status = "disabled"; + #pwm-cells = < 0x3 >; + }; + pwm2: pwm@23000 { + compatible = "nordic,nrf-pwm"; + reg = < 0x23000 0x1000 >; + interrupts = < 0x23 0x1 >; + status = "disabled"; + #pwm-cells = < 0x3 >; + }; + pwm3: pwm@24000 { + compatible = "nordic,nrf-pwm"; + reg = < 0x24000 0x1000 >; + interrupts = < 0x24 0x1 >; + status = "disabled"; + #pwm-cells = < 0x3 >; + }; + gpio0: gpio@842500 { + compatible = "nordic,nrf-gpio"; + gpio-controller; + reg = < 0x842500 0x300 >; + #gpio-cells = < 0x2 >; + status = "okay"; + port = < 0x0 >; + gpiote-instance = < &gpiote >; + phandle = < 0x6 >; + }; + rtc0: rtc@14000 { + compatible = "nordic,nrf-rtc"; + reg = < 0x14000 0x1000 >; + cc-num = < 0x4 >; + interrupts = < 0x14 0x1 >; + status = "disabled"; + clock-frequency = < 0x8000 >; + prescaler = < 0x1 >; + }; + rtc1: rtc@15000 { + compatible = "nordic,nrf-rtc"; + reg = < 0x15000 0x1000 >; + cc-num = < 0x4 >; + interrupts = < 0x15 0x1 >; + status = "disabled"; + clock-frequency = < 0x8000 >; + prescaler = < 0x1 >; + }; + clock: clock@5000 { + compatible = "nordic,nrf-clock"; + reg = < 0x5000 0x1000 >; + interrupts = < 0x5 0x1 >; + status = "okay"; + }; + power: power@5000 { + compatible = "nordic,nrf-power"; + reg = < 0x5000 0x1000 >; + ranges = < 0x0 0x5000 0x1000 >; + interrupts = < 0x5 0x1 >; + status = "okay"; + #address-cells = < 0x1 >; + #size-cells = < 0x1 >; + gpregret1: gpregret1@51c { + #address-cells = < 0x1 >; + #size-cells = < 0x1 >; + compatible = "nordic,nrf-gpregret"; + reg = < 0x51c 0x1 >; + status = "okay"; + }; + gpregret2: gpregret2@520 { + #address-cells = < 0x1 >; + #size-cells = < 0x1 >; + compatible = "nordic,nrf-gpregret"; + reg = < 0x520 0x1 >; + status = "okay"; + }; + }; + wdt: wdt0: watchdog@18000 { + compatible = "nordic,nrf-wdt"; + reg = < 0x18000 0x1000 >; + interrupts = < 0x18 0x1 >; + status = "okay"; + }; + timer0: timer@f000 { + compatible = "nordic,nrf-timer"; + status = "disabled"; + reg = < 0xf000 0x1000 >; + cc-num = < 0x6 >; + max-bit-width = < 0x20 >; + interrupts = < 0xf 0x1 >; + prescaler = < 0x0 >; + }; + timer1: timer@10000 { + compatible = "nordic,nrf-timer"; + status = "disabled"; + reg = < 0x10000 0x1000 >; + cc-num = < 0x6 >; + max-bit-width = < 0x20 >; + interrupts = < 0x10 0x1 >; + prescaler = < 0x0 >; + phandle = < 0xc >; + }; + timer2: timer@11000 { + compatible = "nordic,nrf-timer"; + status = "disabled"; + reg = < 0x11000 0x1000 >; + cc-num = < 0x6 >; + max-bit-width = < 0x20 >; + interrupts = < 0x11 0x1 >; + prescaler = < 0x0 >; + }; + }; + cryptocell: crypto@50840000 { + compatible = "nordic,cryptocell", "arm,cryptocell-310"; + reg = < 0x50840000 0x1000 >, < 0x50841000 0x1000 >; + reg-names = "wrapper", "core"; + interrupts = < 0x40 0x1 >; + status = "okay"; + }; + ctrlap: ctrlap@50006000 { + compatible = "nordic,nrf-ctrlapperi"; + reg = < 0x50006000 0x1000 >; + status = "okay"; + }; + gpiote: gpiote0: gpiote@5000d000 { + compatible = "nordic,nrf-gpiote"; + reg = < 0x5000d000 0x1000 >; + interrupts = < 0xd 0x5 >; + status = "okay"; + instance = < 0x0 >; + phandle = < 0xb >; + }; + gpiote1: gpiote@40031000 { + compatible = "nordic,nrf-gpiote"; + reg = < 0x40031000 0x1000 >; + interrupts = < 0x31 0x5 >; + status = "disabled"; + instance = < 0x1 >; + }; + spu: spu@50003000 { + compatible = "nordic,nrf-spu"; + reg = < 0x50003000 0x1000 >; + interrupts = < 0x3 0x1 >; + status = "okay"; + }; + ficr: ficr@ff0000 { + compatible = "nordic,nrf-ficr"; + reg = < 0xff0000 0x1000 >; + #nordic,ficr-cells = < 0x1 >; + status = "okay"; + }; + uicr: uicr@ff8000 { + compatible = "nordic,nrf-uicr"; + reg = < 0xff8000 0x1000 >; + status = "okay"; + }; + }; + pinctrl: pin-controller { + compatible = "nordic,nrf-pinctrl"; + uart0_default: uart0_default { + phandle = < 0x2 >; + group1 { + psels = < 0x1c >, < 0x2001b >; + }; + }; + uart0_sleep: uart0_sleep { + phandle = < 0x3 >; + group1 { + psels = < 0x1c >, < 0x2001b >; + low-power-enable; + }; + }; + i2c2_default: i2c2_default { + phandle = < 0x4 >; + group1 { + psels = < 0x180008 >, < 0x160007 >; + }; + }; + i2c2_sleep: i2c2_sleep { + phandle = < 0x5 >; + group1 { + psels = < 0x180008 >, < 0x160007 >; + low-power-enable; + }; + }; + pwm0_default: pwm0_default { + phandle = < 0x9 >; + group1 { + psels = < 0x2c0019 >; + }; + }; + pwm0_sleep: pwm0_sleep { + phandle = < 0xa >; + group1 { + psels = < 0x2c0019 >; + low-power-enable; + }; + }; + spi3_default: spi3_default { + phandle = < 0x7 >; + group1 { + psels = < 0x8000d >, < 0xa000e >, < 0xc000f >; + }; + }; + spi3_sleep: spi3_sleep { + phandle = < 0x8 >; + group1 { + psels = < 0x8000d >, < 0xa000e >, < 0xc000f >; + low-power-enable; + }; + }; + }; + rng_hci: entropy_bt_hci { + compatible = "zephyr,bt-hci-entropy"; + status = "okay"; + }; + sw_pwm: sw-pwm { + compatible = "nordic,nrf-sw-pwm"; + status = "disabled"; + generator = < &timer1 >; + clock-prescaler = < 0x0 >; + #pwm-cells = < 0x3 >; + }; + cpus { + #address-cells = < 0x1 >; + #size-cells = < 0x0 >; + cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-m33f"; + reg = < 0x0 >; + #address-cells = < 0x1 >; + #size-cells = < 0x1 >; + mpu: mpu@e000ed90 { + compatible = "arm,armv8m-mpu"; + reg = < 0xe000ed90 0x40 >; + }; + }; + }; + leds { + compatible = "gpio-leds"; + led0: led_0 { + gpios = < &gpio0 0x19 0x0 >; + label = "LED"; + }; + }; + pwmleds { + compatible = "pwm-leds"; + pwm_led0: pwm_led_0 { + pwms = < &pwm0 0x0 0x1312d00 0x0 >; + }; + }; + buttons { + compatible = "gpio-keys"; + button0: button_0 { + gpios = < &gpio0 0x1f 0x11 >; + label = "Mode button"; + zephyr,code = < 0xb >; + }; + }; + stratus_header: connector { + compatible = "conexio-stratus-header"; + #gpio-cells = < 0x2 >; + gpio-map-mask = < 0xffffffff 0xffffffc0 >; + gpio-map-pass-thru = < 0x0 0x3f >; + gpio-map = < 0x0 0x0 &gpio0 0x0 0x0 >, < 0x1 0x0 &gpio0 0x1 0x0 >, < 0x2 0x0 &gpio0 0x2 0x0 >, < 0x3 0x0 &gpio0 0x3 0x0 >, < 0x4 0x0 &gpio0 0x4 0x0 >, < 0x5 0x0 &gpio0 0x5 0x0 >, < 0x6 0x0 &gpio0 0x6 0x0 >, < 0x7 0x0 &gpio0 0x7 0x0 >, < 0x8 0x0 &gpio0 0x8 0x0 >, < 0x9 0x0 &gpio0 0x9 0x0 >, < 0xa 0x0 &gpio0 0xa 0x0 >, < 0xb 0x0 &gpio0 0xb 0x0 >, < 0xc 0x0 &gpio0 0xc 0x0 >, < 0xd 0x0 &gpio0 0xd 0x0 >, < 0xe 0x0 &gpio0 0xe 0x0 >, < 0xf 0x0 &gpio0 0xf 0x0 >, < 0x10 0x0 &gpio0 0x10 0x0 >, < 0x11 0x0 &gpio0 0x11 0x0 >, < 0x12 0x0 &gpio0 0x12 0x0 >, < 0x13 0x0 &gpio0 0x13 0x0 >, < 0x14 0x0 &gpio0 0x14 0x0 >, < 0x15 0x0 &gpio0 0x15 0x0 >, < 0x16 0x0 &gpio0 0x16 0x0 >, < 0x17 0x0 &gpio0 0x17 0x0 >, < 0x18 0x0 &gpio0 0x18 0x0 >, < 0x1a 0x0 &gpio0 0x1a 0x0 >, < 0x1b 0x0 &gpio0 0x1b 0x0 >, < 0x1c 0x0 &gpio0 0x1c 0x0 >; + }; + sensor-pwr-ctrl { + compatible = "regulator-fixed"; + regulator-name = "sensor-power"; + enable-gpios = < &gpio0 0x1a 0x0 >; + regulator-boot-on; + }; + reserved-memory { + #address-cells = < 0x1 >; + #size-cells = < 0x1 >; + ranges; + sram0_s: image_s@20000000 { + reg = < 0x20000000 0x16000 >; + }; + sram0_modem: image_modem@20016000 { + reg = < 0x20016000 0xa000 >; + }; + sram0_ns: image_ns@20020000 { + reg = < 0x20020000 0x20000 >; + }; + }; +}; diff --git a/nrfdemo/build/mcuboot/zephyr/zephyr.dts.d b/nrfdemo/build/mcuboot/zephyr/zephyr.dts.d new file mode 100644 index 0000000..0fc963a --- /dev/null +++ b/nrfdemo/build/mcuboot/zephyr/zephyr.dts.d @@ -0,0 +1,31 @@ +empty_file.o: /home/mike/Documents/ncs/v2.7.0/zephyr/misc/empty_file.c \ + /home/mike/Documents/ncs/v2.7.0/conexio-firmware-sdk/boards/conexio/stratus_pro/conexio_stratus_pro_nrf9151.dts \ + /home/mike/Documents/ncs/v2.7.0/zephyr/dts/arm/nordic/nrf9151_laca.dtsi \ + /home/mike/Documents/ncs/v2.7.0/zephyr/dts/common/mem.h \ + /home/mike/Documents/ncs/v2.7.0/zephyr/dts/arm/nordic/nrf91.dtsi \ + /home/mike/Documents/ncs/v2.7.0/zephyr/dts/arm/armv8-m.dtsi \ + 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b/nrfdemo/build/mcuboot/zephyr/zephyr.stat @@ -0,0 +1,72 @@ +ELF Header: + Magic: 7f 45 4c 46 01 01 01 00 00 00 00 00 00 00 00 00 + Class: ELF32 + Data: 2's complement, little endian + Version: 1 (current) + OS/ABI: UNIX - System V + ABI Version: 0 + Type: EXEC (Executable file) + Machine: ARM + Version: 0x1 + Entry point address: 0x2045 + Start of program headers: 52 (bytes into file) + Start of section headers: 913004 (bytes into file) + Flags: 0x5000400, Version5 EABI, hard-float ABI + Size of this header: 52 (bytes) + Size of program headers: 32 (bytes) + Number of program headers: 5 + Size of section headers: 40 (bytes) + Number of section headers: 28 + Section header string table index: 27 + +Section Headers: + [Nr] Name Type Addr Off Size ES Flg Lk Inf Al + [ 0] NULL 00000000 000000 000000 00 0 0 0 + [ 1] rom_start PROGBITS 00000000 0000e0 000144 00 WAX 0 0 4 + [ 2] text PROGBITS 00000144 000224 006b40 00 AX 0 0 4 + [ 3] .ARM.exidx ARM_EXIDX 00006c84 006d64 000008 00 AL 2 0 4 + [ 4] initlevel PROGBITS 00006c8c 006d6c 000048 00 A 0 0 4 + [ 5] device_area PROGBITS 00006cd4 006db4 000050 00 A 0 0 4 + [ 6] sw_isr_table PROGBITS 00006d24 006e04 000208 00 WA 0 0 4 + [ 7] log_const_area PROGBITS 00006f2c 00700c 000008 00 A 0 0 4 + [ 8] rodata PROGBITS 00006f40 007020 000a34 00 A 0 0 16 + [ 9] .ramfunc PROGBITS 20000000 007b68 000000 00 W 0 0 1 + [10] datas PROGBITS 20000000 007a54 000108 00 WA 0 0 4 + [11] device_states PROGBITS 20000108 007b5c 000008 00 WA 0 0 1 + [12] bss NOBITS 20000110 007b68 000ec0 00 WA 0 0 8 + [13] noinit NOBITS 20000fd0 007b68 003000 00 WA 0 0 8 + [14] .comment PROGBITS 00000000 007b68 0000c1 01 MS 0 0 1 + [15] .debug_aranges PROGBITS 00000000 007c30 001598 00 0 0 8 + [16] .debug_info PROGBITS 00000000 0091c8 06b9e5 00 0 0 1 + [17] .debug_abbrev PROGBITS 00000000 074bad 00ca51 00 0 0 1 + [18] .debug_line PROGBITS 00000000 0815fe 01d6d1 00 0 0 1 + [19] .debug_frame PROGBITS 00000000 09ecd0 002f64 00 0 0 4 + [20] .debug_str PROGBITS 00000000 0a1c34 00c933 01 MS 0 0 1 + [21] .debug_loc PROGBITS 00000000 0ae567 01d5ad 00 0 0 1 + [22] .debug_ranges PROGBITS 00000000 0cbb18 004a60 00 0 0 8 + [23] .ARM.attributes ARM_ATTRIBUTES 00000000 0d0578 00003a 00 0 0 1 + [24] .last_section PROGBITS 00007a84 007b64 000004 00 A 0 0 1 + [25] .symtab SYMTAB 00000000 0d05b4 0078c0 10 26 992 4 + [26] .strtab STRTAB 00000000 0d7e74 006ed3 00 0 0 1 + [27] .shstrtab STRTAB 00000000 0ded47 000123 00 0 0 1 +Key to Flags: + W (write), A (alloc), X (execute), M (merge), S (strings), I (info), + L (link order), O (extra OS processing required), G (group), T (TLS), + C (compressed), x (unknown), o (OS specific), E (exclude), + D (mbind), y (purecode), p (processor specific) + +Program Headers: + Type Offset VirtAddr PhysAddr FileSiz MemSiz Flg Align + EXIDX 0x006d64 0x00006c84 0x00006c84 0x00008 0x00008 R 0x4 + LOAD 0x0000e0 0x00000000 0x00000000 0x07974 0x07974 RWE 0x10 + LOAD 0x007a54 0x20000000 0x00007974 0x00110 0x00110 RW 0x4 + LOAD 0x007b64 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modules/mcuboot/boot/bootutil/zephyr/libmcuboot_util.a(bootutil_public.c.obj) + .rodata.levels.0 + 0x000000000000710c 0x18 zephyr/kernel/libkernel.a(init.c.obj) + .rodata.CSWTCH.10 + 0x0000000000007124 0x1c /home/mike/Documents/ncs/v2.7.0/nrfxlib/crypto/nrf_cc310_platform/lib/cortex-m33/hard-float/no-interrupts/libnrf_cc310_platform_0.9.19.a(nrf_cc3xx_platform.c.obj) + .rodata.CC_PalPowerSaveModeInit.str1.4 + 0x0000000000007140 0x20 /home/mike/Documents/ncs/v2.7.0/nrfxlib/crypto/nrf_cc310_platform/lib/cortex-m33/hard-float/no-interrupts/libnrf_cc310_platform_0.9.19.a(cc_pal_pm.c.obj) + .rodata.mutex_free.str1.4 + 0x0000000000007160 0x26 /home/mike/Documents/ncs/v2.7.0/nrfxlib/crypto/nrf_cc310_platform/lib/cortex-m33/hard-float/no-interrupts/libnrf_cc310_platform_0.9.19.a(nrf_cc3xx_platform_mutex.c.obj) + *fill* 0x0000000000007186 0x2 + .rodata.mutex_init.str1.4 + 0x0000000000007188 0x23 /home/mike/Documents/ncs/v2.7.0/nrfxlib/crypto/nrf_cc310_platform/lib/cortex-m33/hard-float/no-interrupts/libnrf_cc310_platform_0.9.19.a(nrf_cc3xx_platform_mutex.c.obj) + *fill* 0x00000000000071ab 0x1 + .rodata.domain_secp256r1 + 0x00000000000071ac 0xcc /home/mike/Documents/ncs/v2.7.0/nrfxlib/crypto/nrf_cc310_bl/lib/cortex-m33/hard-float/no-interrupts/libnrf_cc310_bl_0.9.12.a(nrf_cc310_bl_ecdsa_verify_secp256r1.c.obj) + 0x00000000000071ac domain_secp256r1 + .rodata.NRF_CC310_BL_HASH_LARVAL_SHA256 + 0x0000000000007278 0x20 /home/mike/Documents/ncs/v2.7.0/nrfxlib/crypto/nrf_cc310_bl/lib/cortex-m33/hard-float/no-interrupts/libnrf_cc310_bl_0.9.12.a(nrf_cc310_bl_hash_sha256.c.obj) + 0x0000000000007278 NRF_CC310_BL_HASH_LARVAL_SHA256 + .rodata.allowed_unprot_tlvs + 0x0000000000007298 0x1c app/libapp.a(image_validate.c.obj) + .rodata.boot_img_magic + 0x00000000000072b4 0x10 modules/mcuboot/boot/bootutil/zephyr/libmcuboot_util.a(bootutil_public.c.obj) + 0x00000000000072b4 boot_img_magic + .rodata.main.str1.1 + 0x00000000000072c4 0xde app/libapp.a(main.c.obj) + .rodata.str1.1 + 0x00000000000073a2 0x8 app/libapp.a(main.c.obj) + .rodata.flash_device_base.str1.1 + 0x00000000000073aa 0x26 app/libapp.a(flash_map_extended.c.obj) + .rodata.ec_secp256r1_oid + 0x00000000000073d0 0x9 app/libapp.a(image_ecdsa.c.obj) + .rodata.ec_pubkey_oid + 0x00000000000073d9 0x8 app/libapp.a(image_ecdsa.c.obj) + .rodata.bootutil_max_image_size.str1.1 + 0x00000000000073e1 0x3b app/libapp.a(bootutil_misc.c.obj) + .rodata.boot_validate_slot.isra.0.str1.1 + 0x000000000000741c 0x3a app/libapp.a(loader.c.obj) + .rodata.boot_swap_image.isra.0.str1.1 + 0x0000000000007456 0x2f app/libapp.a(loader.c.obj) + .rodata.context_boot_go.str1.1 + 0x0000000000007485 0xf1 app/libapp.a(loader.c.obj) + .rodata.swap_read_status_bytes.str1.1 + 0x0000000000007576 0x23 app/libapp.a(swap_move.c.obj) + .rodata.boot_slots_compatible.str1.1 + 0x0000000000007599 0x93 app/libapp.a(swap_move.c.obj) + .rodata.swap_status_source.str1.1 + 0x000000000000762c 0xa4 app/libapp.a(swap_move.c.obj) + .rodata.swap_run.str1.1 + 0x00000000000076d0 0x89 app/libapp.a(swap_move.c.obj) + .rodata.ecdsa_pub_key + 0x0000000000007759 0x5b app/libapp.a(autogen-pubkey.c.obj) + 0x0000000000007759 ecdsa_pub_key + .rodata.z_cbvprintf_impl.str1.1 + 0x00000000000077b4 0x12 zephyr/libzephyr.a(cbprintf_nano.c.obj) + 0x13 (size before relaxing) + .rodata.boot_banner.str1.1 + 0x00000000000077c6 0x92 zephyr/libzephyr.a(banner.c.obj) + .rodata.str1.1 + 0x0000000000007858 0x17 zephyr/drivers/clock_control/libdrivers__clock_control.a(clock_control_nrf.c.obj) + .rodata.str1.1 + 0x000000000000786f 0x17 zephyr/drivers/flash/libdrivers__flash.a(soc_flash_nrf.c.obj) + .rodata.str1.1 + 0x0000000000007886 0xc zephyr/drivers/gpio/libdrivers__gpio.a(gpio_nrfx.c.obj) + .rodata.drive_modes + 0x0000000000007892 0x8 zephyr/drivers/pinctrl/libdrivers__pinctrl.a(pinctrl_nrf.c.obj) + .rodata.str1.1 + 0x000000000000789a 0xa zephyr/drivers/serial/libdrivers__serial.a(uart_nrfx_uarte.c.obj) + .rodata.boot_swap_type_multi.str1.1 + 0x00000000000078a4 0xb8 modules/mcuboot/boot/bootutil/zephyr/libmcuboot_util.a(bootutil_public.c.obj) + .rodata.boot_swap_tables + 0x000000000000795c 0x12 modules/mcuboot/boot/bootutil/zephyr/libmcuboot_util.a(bootutil_public.c.obj) + .rodata.CSWTCH.17 + 0x000000000000796e 0x3 modules/hal_nordic/nrfx/libmodules__hal_nordic__nrfx.a(system_nrf91.c.obj) + *(SORT_BY_ALIGNMENT(.gnu.linkonce.r.*)) + 0x0000000000007974 . = ALIGN (0x4) + *fill* 0x0000000000007971 0x3 + 0x0000000000007974 __rodata_region_end = . + 0x0000000000007974 . = ALIGN (_region_min_align) + 0x0000000000007974 __rom_region_end = ((__rom_region_start + .) - ADDR (rom_start)) + +/DISCARD/ + *(SORT_BY_ALIGNMENT(.got.plt)) + *(SORT_BY_ALIGNMENT(.igot.plt)) + *(SORT_BY_ALIGNMENT(.got)) + *(SORT_BY_ALIGNMENT(.igot)) + 0x0000000020000000 . = 0x20000000 + 0x0000000020000000 . = ALIGN (_region_min_align) + 0x0000000020000000 _image_ram_start = . + +.ramfunc 0x0000000020000000 0x0 load address 0x0000000000007974 + 0x0000000020000000 . = ALIGN (_region_min_align) + 0x0000000020000000 __ramfunc_start = . + *(SORT_BY_ALIGNMENT(.ramfunc)) + *(SORT_BY_ALIGNMENT(.ramfunc.*)) + 0x0000000020000000 . = ALIGN (_region_min_align) + 0x0000000020000000 __ramfunc_end = . + 0x0000000000000000 __ramfunc_size = (__ramfunc_end - __ramfunc_start) + 0x0000000000007974 __ramfunc_load_start = LOADADDR (.ramfunc) + +datas 0x0000000020000000 0x108 load address 0x0000000000007974 + 0x0000000020000000 __data_region_start = . + 0x0000000020000000 __data_start = . + *(SORT_BY_ALIGNMENT(.data)) + *(SORT_BY_ALIGNMENT(.data.*)) + .data.FIH_NO_BOOTABLE_IMAGE + 0x0000000020000000 0x4 app/libapp.a(fault_injection_hardening.c.obj) + 0x0000000020000000 FIH_NO_BOOTABLE_IMAGE + .data.FIH_FAILURE + 0x0000000020000004 0x4 app/libapp.a(fault_injection_hardening.c.obj) + 0x0000000020000004 FIH_FAILURE + .data.FIH_SUCCESS + 0x0000000020000008 0x4 app/libapp.a(fault_injection_hardening.c.obj) + 0x0000000020000008 FIH_SUCCESS + .data.memset_func + 0x000000002000000c 0x4 app/libapp.a(platform_util.c.obj) + .data._char_out + 0x0000000020000010 0x4 zephyr/libzephyr.a(printk.c.obj) + 0x0000000020000010 _char_out + .data.flash_map + 0x0000000020000014 0x4 zephyr/libzephyr.a(flash_map_partition_manager.c.obj) + 0x0000000020000014 flash_map + .data._stdout_hook + 0x0000000020000018 0x4 zephyr/lib/libc/minimal/liblib__libc__minimal.a(stdout_console.c.obj) + .data.uarte_0_data + 0x000000002000001c 0x1c zephyr/drivers/serial/libdrivers__serial.a(uart_nrfx_uarte.c.obj) + .data.m_allocated_channels + 0x0000000020000038 0x4 modules/hal_nordic/nrfx/libmodules__hal_nordic__nrfx.a(nrfx_dppi.c.obj) + .data.m_cb 0x000000002000003c 0x64 modules/hal_nordic/nrfx/libmodules__hal_nordic__nrfx.a(nrfx_gpiote.c.obj) + .data.timeout_list + 0x00000000200000a0 0x8 zephyr/kernel/libkernel.a(timeout.c.obj) + .data.platform_abort_apis + 0x00000000200000a8 0x8 /home/mike/Documents/ncs/v2.7.0/nrfxlib/crypto/nrf_cc310_platform/lib/cortex-m33/hard-float/no-interrupts/libnrf_cc310_platform_0.9.19.a(nrf_cc3xx_platform_abort.c.obj) + 0x00000000200000a8 platform_abort_apis + .data.pCCRndCryptoMutex + 0x00000000200000b0 0x4 /home/mike/Documents/ncs/v2.7.0/nrfxlib/crypto/nrf_cc310_platform/lib/cortex-m33/hard-float/no-interrupts/libnrf_cc310_platform_0.9.19.a(cc_pal.c.obj) + 0x00000000200000b0 pCCRndCryptoMutex + .data.CCPowerMutex + 0x00000000200000b4 0x4 /home/mike/Documents/ncs/v2.7.0/nrfxlib/crypto/nrf_cc310_platform/lib/cortex-m33/hard-float/no-interrupts/libnrf_cc310_platform_0.9.19.a(cc_pal.c.obj) + 0x00000000200000b4 CCPowerMutex + .data.CCRndCryptoMutex + 0x00000000200000b8 0x4 /home/mike/Documents/ncs/v2.7.0/nrfxlib/crypto/nrf_cc310_platform/lib/cortex-m33/hard-float/no-interrupts/libnrf_cc310_platform_0.9.19.a(cc_pal.c.obj) + 0x00000000200000b8 CCRndCryptoMutex + .data.CCAsymCryptoMutex + 0x00000000200000bc 0x4 /home/mike/Documents/ncs/v2.7.0/nrfxlib/crypto/nrf_cc310_platform/lib/cortex-m33/hard-float/no-interrupts/libnrf_cc310_platform_0.9.19.a(cc_pal.c.obj) + 0x00000000200000bc CCAsymCryptoMutex + .data.CCSymCryptoMutex + 0x00000000200000c0 0x4 /home/mike/Documents/ncs/v2.7.0/nrfxlib/crypto/nrf_cc310_platform/lib/cortex-m33/hard-float/no-interrupts/libnrf_cc310_platform_0.9.19.a(cc_pal.c.obj) + 0x00000000200000c0 CCSymCryptoMutex + .data.platform_mutexes + 0x00000000200000c4 0x14 /home/mike/Documents/ncs/v2.7.0/nrfxlib/crypto/nrf_cc310_platform/lib/cortex-m33/hard-float/no-interrupts/libnrf_cc310_platform_0.9.19.a(nrf_cc3xx_platform_mutex.c.obj) + 0x00000000200000c4 platform_mutexes + .data.platform_mutex_apis + 0x00000000200000d8 0x10 /home/mike/Documents/ncs/v2.7.0/nrfxlib/crypto/nrf_cc310_platform/lib/cortex-m33/hard-float/no-interrupts/libnrf_cc310_platform_0.9.19.a(nrf_cc3xx_platform_mutex.c.obj) + 0x00000000200000d8 platform_mutex_apis + .data.power_mutex + 0x00000000200000e8 0x8 /home/mike/Documents/ncs/v2.7.0/nrfxlib/crypto/nrf_cc310_platform/lib/cortex-m33/hard-float/no-interrupts/libnrf_cc310_platform_0.9.19.a(nrf_cc3xx_platform_mutex.c.obj) + .data.rng_mutex + 0x00000000200000f0 0x8 /home/mike/Documents/ncs/v2.7.0/nrfxlib/crypto/nrf_cc310_platform/lib/cortex-m33/hard-float/no-interrupts/libnrf_cc310_platform_0.9.19.a(nrf_cc3xx_platform_mutex.c.obj) + .data.asym_mutex + 0x00000000200000f8 0x8 /home/mike/Documents/ncs/v2.7.0/nrfxlib/crypto/nrf_cc310_platform/lib/cortex-m33/hard-float/no-interrupts/libnrf_cc310_platform_0.9.19.a(nrf_cc3xx_platform_mutex.c.obj) + .data.sym_mutex + 0x0000000020000100 0x8 /home/mike/Documents/ncs/v2.7.0/nrfxlib/crypto/nrf_cc310_platform/lib/cortex-m33/hard-float/no-interrupts/libnrf_cc310_platform_0.9.19.a(nrf_cc3xx_platform_mutex.c.obj) + *(SORT_BY_ALIGNMENT(.kernel.*)) + 0x0000000020000108 __data_end = . + 0x0000000000000108 __data_size = (__data_end - __data_start) + 0x0000000000007974 __data_load_start = LOADADDR (datas) + 0x0000000000007974 __data_region_load_start = LOADADDR (datas) + +device_states 0x0000000020000108 0x8 load address 0x0000000000007a7c + 0x0000000020000108 __device_states_start = . + *(SORT_BY_ALIGNMENT(.z_devstate)) + .z_devstate 0x0000000020000108 0x2 zephyr/drivers/clock_control/libdrivers__clock_control.a(clock_control_nrf.c.obj) + .z_devstate 0x000000002000010a 0x2 zephyr/drivers/flash/libdrivers__flash.a(soc_flash_nrf.c.obj) + .z_devstate 0x000000002000010c 0x2 zephyr/drivers/gpio/libdrivers__gpio.a(gpio_nrfx.c.obj) + .z_devstate 0x000000002000010e 0x2 zephyr/drivers/serial/libdrivers__serial.a(uart_nrfx_uarte.c.obj) + *(SORT_BY_ALIGNMENT(.z_devstate.*)) + 0x0000000020000110 __device_states_end = . + +log_mpsc_pbuf_area + 0x0000000020000110 0x0 load address 0x0000000000007a84 + 0x0000000020000110 _log_mpsc_pbuf_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._log_mpsc_pbuf.static.*))) + 0x0000000020000110 _log_mpsc_pbuf_list_end = . + +log_msg_ptr_area + 0x0000000020000110 0x0 load address 0x0000000000007a84 + 0x0000000020000110 _log_msg_ptr_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._log_msg_ptr.static.*))) + 0x0000000020000110 _log_msg_ptr_list_end = . + +log_dynamic_area + 0x0000000020000110 0x0 load address 0x0000000000007a84 + 0x0000000020000110 _log_dynamic_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._log_dynamic.static.*))) + 0x0000000020000110 _log_dynamic_list_end = . + +k_timer_area 0x0000000020000110 0x0 load address 0x0000000000007a84 + 0x0000000020000110 _k_timer_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._k_timer.static.*))) + 0x0000000020000110 _k_timer_list_end = . + +k_mem_slab_area + 0x0000000020000110 0x0 load address 0x0000000000007a84 + 0x0000000020000110 _k_mem_slab_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._k_mem_slab.static.*))) + 0x0000000020000110 _k_mem_slab_list_end = . + +k_heap_area 0x0000000020000110 0x0 load address 0x0000000000007a84 + 0x0000000020000110 _k_heap_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._k_heap.static.*))) + 0x0000000020000110 _k_heap_list_end = . + +k_mutex_area 0x0000000020000110 0x0 load address 0x0000000000007a84 + 0x0000000020000110 _k_mutex_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._k_mutex.static.*))) + 0x0000000020000110 _k_mutex_list_end = . + +k_stack_area 0x0000000020000110 0x0 load address 0x0000000000007a84 + 0x0000000020000110 _k_stack_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._k_stack.static.*))) + 0x0000000020000110 _k_stack_list_end = . + +k_msgq_area 0x0000000020000110 0x0 load address 0x0000000000007a84 + 0x0000000020000110 _k_msgq_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._k_msgq.static.*))) + 0x0000000020000110 _k_msgq_list_end = . + +k_mbox_area 0x0000000020000110 0x0 load address 0x0000000000007a84 + 0x0000000020000110 _k_mbox_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._k_mbox.static.*))) + 0x0000000020000110 _k_mbox_list_end = . + +k_pipe_area 0x0000000020000110 0x0 load address 0x0000000000007a84 + 0x0000000020000110 _k_pipe_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._k_pipe.static.*))) + 0x0000000020000110 _k_pipe_list_end = . + +k_sem_area 0x0000000020000110 0x0 load address 0x0000000000007a84 + 0x0000000020000110 _k_sem_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._k_sem.static.*))) + 0x0000000020000110 _k_sem_list_end = . + +k_event_area 0x0000000020000110 0x0 load address 0x0000000000007a84 + 0x0000000020000110 _k_event_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._k_event.static.*))) + 0x0000000020000110 _k_event_list_end = . + +k_queue_area 0x0000000020000110 0x0 load address 0x0000000000007a84 + 0x0000000020000110 _k_queue_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._k_queue.static.*))) + 0x0000000020000110 _k_queue_list_end = . + +k_fifo_area 0x0000000020000110 0x0 load address 0x0000000000007a84 + 0x0000000020000110 _k_fifo_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._k_fifo.static.*))) + 0x0000000020000110 _k_fifo_list_end = . + +k_lifo_area 0x0000000020000110 0x0 load address 0x0000000000007a84 + 0x0000000020000110 _k_lifo_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._k_lifo.static.*))) + 0x0000000020000110 _k_lifo_list_end = . + +k_condvar_area 0x0000000020000110 0x0 load address 0x0000000000007a84 + 0x0000000020000110 _k_condvar_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._k_condvar.static.*))) + 0x0000000020000110 _k_condvar_list_end = . + +sys_mem_blocks_ptr_area + 0x0000000020000110 0x0 load address 0x0000000000007a84 + 0x0000000020000110 _sys_mem_blocks_ptr_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._sys_mem_blocks_ptr.static.*))) + 0x0000000020000110 _sys_mem_blocks_ptr_list_end = . + +net_buf_pool_area + 0x0000000020000110 0x0 load address 0x0000000000007a84 + 0x0000000020000110 _net_buf_pool_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._net_buf_pool.static.*))) + 0x0000000020000110 _net_buf_pool_list_end = . + 0x0000000020000110 __data_region_end = . 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.gnu.linkonce.sw_isr_table + 0x0000000000006d24 0x208 zephyr/arch/common/libisr_tables.a(isr_tables.c.obj) + 0x0000000000006d24 _sw_isr_table + +initlevel_error + 0x0000000000006c8c 0x0 + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(.z_init_[_A-Z0-9]*))) + 0x0000000000000001 ASSERT ((SIZEOF (initlevel_error) == 0x0), Undefined initialization levels used.) + +app_shmem_regions + 0x0000000000006f2c 0x0 + 0x0000000000006f2c __app_shmem_regions_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(.app_regions.*))) + 0x0000000000006f2c __app_shmem_regions_end = . + +k_p4wq_initparam_area + 0x0000000000006f2c 0x0 + 0x0000000000006f2c _k_p4wq_initparam_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._k_p4wq_initparam.static.*))) + 0x0000000000006f2c _k_p4wq_initparam_list_end = . + +_static_thread_data_area + 0x0000000000006f2c 0x0 + 0x0000000000006f2c __static_thread_data_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(.__static_thread_data.static.*))) + 0x0000000000006f2c __static_thread_data_list_end = . + +device_deps 0x0000000000006f2c 0x0 + 0x0000000000006f2c __device_deps_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(.__device_deps_pass2*))) + 0x0000000000006f2c __device_deps_end = . + +ztest 0x0000000000006f2c 0x0 + 0x0000000000006f2c _ztest_expected_result_entry_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._ztest_expected_result_entry.static.*))) + 0x0000000000006f2c _ztest_expected_result_entry_list_end = . + 0x0000000000006f2c _ztest_suite_node_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._ztest_suite_node.static.*))) + 0x0000000000006f2c _ztest_suite_node_list_end = . + 0x0000000000006f2c _ztest_unit_test_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._ztest_unit_test.static.*))) + 0x0000000000006f2c _ztest_unit_test_list_end = . + 0x0000000000006f2c _ztest_test_rule_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._ztest_test_rule.static.*))) + 0x0000000000006f2c _ztest_test_rule_list_end = . + +bt_l2cap_fixed_chan_area + 0x0000000000006f2c 0x0 + 0x0000000000006f2c _bt_l2cap_fixed_chan_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._bt_l2cap_fixed_chan.static.*))) + 0x0000000000006f2c _bt_l2cap_fixed_chan_list_end = . + +bt_gatt_service_static_area + 0x0000000000006f2c 0x0 + 0x0000000000006f2c _bt_gatt_service_static_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._bt_gatt_service_static.static.*))) + 0x0000000000006f2c _bt_gatt_service_static_list_end = . + +log_strings_area + 0x0000000000006f2c 0x0 + 0x0000000000006f2c _log_strings_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._log_strings.static.*))) + 0x0000000000006f2c _log_strings_list_end = . + +log_const_area 0x0000000000006f2c 0x8 + 0x0000000000006f2c _log_const_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._log_const.static.*))) + ._log_const.static.log_const_mcuboot_ + 0x0000000000006f2c 0x8 app/libapp.a(main.c.obj) + 0x0000000000006f2c log_const_mcuboot + 0x0000000000006f34 _log_const_list_end = . + +log_backend_area + 0x0000000000006f34 0x0 + 0x0000000000006f34 _log_backend_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._log_backend.static.*))) + 0x0000000000006f34 _log_backend_list_end = . + +log_link_area 0x0000000000006f34 0x0 + 0x0000000000006f34 _log_link_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._log_link.static.*))) + 0x0000000000006f34 _log_link_list_end = . + +tracing_backend_area + 0x0000000000006f34 0x0 + 0x0000000000006f34 _tracing_backend_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._tracing_backend.static.*))) + 0x0000000000006f34 _tracing_backend_list_end = . + +zephyr_dbg_info + *(SORT_BY_ALIGNMENT(.dbg_thread_info)) + +symbol_to_keep 0x0000000000006f34 0x0 + 0x0000000000006f34 __symbol_to_keep_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(.symbol_to_keep*))) + 0x0000000000006f34 __symbol_to_keep_end = . + +shell_area 0x0000000000006f34 0x0 + 0x0000000000006f34 _shell_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._shell.static.*))) + 0x0000000000006f34 _shell_list_end = . + +shell_root_cmds_area + 0x0000000000006f34 0x0 + 0x0000000000006f34 _shell_root_cmds_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._shell_root_cmds.static.*))) + 0x0000000000006f34 _shell_root_cmds_list_end = . + +shell_subcmds_area + 0x0000000000006f34 0x0 + 0x0000000000006f34 _shell_subcmds_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._shell_subcmds.static.*))) + 0x0000000000006f34 _shell_subcmds_list_end = . + +shell_dynamic_subcmds_area + 0x0000000000006f34 0x0 + 0x0000000000006f34 _shell_dynamic_subcmds_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._shell_dynamic_subcmds.static.*))) + 0x0000000000006f34 _shell_dynamic_subcmds_list_end = . + +cfb_font_area 0x0000000000006f34 0x0 + 0x0000000000006f34 _cfb_font_list_start = . + *(SORT_BY_NAME(SORT_BY_ALIGNMENT(._cfb_font.static.*))) + 0x0000000000006f34 _cfb_font_list_end = . + +rodata 0x0000000000006f40 0xa34 + *(SORT_BY_ALIGNMENT(.rodata)) + .rodata 0x0000000000006f40 0x10 /home/mike/Documents/ncs/v2.7.0/nrfxlib/crypto/nrf_cc310_bl/lib/cortex-m33/hard-float/no-interrupts/libnrf_cc310_bl_0.9.12.a(nrf_cc310_bl_hash_sha256.c.obj) + *(SORT_BY_ALIGNMENT(.rodata.*)) + .rodata.delay_machine_code.0 + 0x0000000000006f50 0x6 zephyr/soc/soc/nrf9151/libsoc__nordic.a(soc.c.obj) + *fill* 0x0000000000006f56 0x2 + .rodata.all_slots.0 + 0x0000000000006f58 0x8 app/libapp.a(flash_map_extended.c.obj) + .rodata.bootutil_key_cnt + 0x0000000000006f60 0x4 app/libapp.a(keys.c.obj) + 0x0000000000006f60 bootutil_key_cnt + .rodata.bootutil_keys + 0x0000000000006f64 0x8 app/libapp.a(keys.c.obj) + 0x0000000000006f64 bootutil_keys + .rodata.all_slots.0 + 0x0000000000006f6c 0x8 app/libapp.a(bootutil_misc.c.obj) + .rodata.all_slots.0 + 0x0000000000006f74 0x8 app/libapp.a(swap_misc.c.obj) + .rodata.ecdsa_pub_key_len + 0x0000000000006f7c 0x4 app/libapp.a(autogen-pubkey.c.obj) + 0x0000000000006f7c ecdsa_pub_key_len + .rodata.nrf_uarte_to_clean + 0x0000000000006f80 0x8 app/libapp.a(nrf_cleanup.c.obj) + .rodata.flash_map_entries + 0x0000000000006f88 0x4 zephyr/libzephyr.a(flash_map_partition_manager.c.obj) + 0x0000000000006f88 flash_map_entries + .rodata.default_flash_map + 0x0000000000006f8c 0xa0 zephyr/libzephyr.a(flash_map_partition_manager.c.obj) + 0x0000000000006f8c default_flash_map + .rodata.apis 0x000000000000702c 0x8 zephyr/libzephyr.a(nrf_cc3xx_platform_abort_zephyr.c.obj) + .rodata.transitions.0 + 0x0000000000007034 0xc zephyr/drivers/clock_control/libdrivers__clock_control.a(clock_control_nrf.c.obj) + .rodata.config + 0x0000000000007040 0x18 zephyr/drivers/clock_control/libdrivers__clock_control.a(clock_control_nrf.c.obj) + .rodata.clock_control_api + 0x0000000000007058 0x1c zephyr/drivers/clock_control/libdrivers__clock_control.a(clock_control_nrf.c.obj) + .rodata.flash_nrf_api + 0x0000000000007074 0x14 zephyr/drivers/flash/libdrivers__flash.a(soc_flash_nrf.c.obj) + .rodata.flash_nrf_parameters + 0x0000000000007088 0x8 zephyr/drivers/flash/libdrivers__flash.a(soc_flash_nrf.c.obj) + .rodata.gpio_nrfx_p0_cfg + 0x0000000000007090 0x18 zephyr/drivers/gpio/libdrivers__gpio.a(gpio_nrfx.c.obj) + .rodata.gpio_nrfx_drv_api_funcs + 0x00000000000070a8 0x24 zephyr/drivers/gpio/libdrivers__gpio.a(gpio_nrfx.c.obj) + .rodata.uarte_0z_config + 0x00000000000070cc 0x10 zephyr/drivers/serial/libdrivers__serial.a(uart_nrfx_uarte.c.obj) + .rodata.__pinctrl_dev_config__device_dts_ord_80 + 0x00000000000070dc 0xc zephyr/drivers/serial/libdrivers__serial.a(uart_nrfx_uarte.c.obj) + .rodata.__pinctrl_states__device_dts_ord_80 + 0x00000000000070e8 0x8 zephyr/drivers/serial/libdrivers__serial.a(uart_nrfx_uarte.c.obj) + .rodata.__pinctrl_state_pins_0__device_dts_ord_80 + 0x00000000000070f0 0x8 zephyr/drivers/serial/libdrivers__serial.a(uart_nrfx_uarte.c.obj) + .rodata.uart_nrfx_uarte_driver_api + 0x00000000000070f8 0xc zephyr/drivers/serial/libdrivers__serial.a(uart_nrfx_uarte.c.obj) + .rodata.all_slots.0 + 0x0000000000007104 0x8 modules/mcuboot/boot/bootutil/zephyr/libmcuboot_util.a(bootutil_public.c.obj) + .rodata.levels.0 + 0x000000000000710c 0x18 zephyr/kernel/libkernel.a(init.c.obj) + .rodata.CSWTCH.10 + 0x0000000000007124 0x1c /home/mike/Documents/ncs/v2.7.0/nrfxlib/crypto/nrf_cc310_platform/lib/cortex-m33/hard-float/no-interrupts/libnrf_cc310_platform_0.9.19.a(nrf_cc3xx_platform.c.obj) + .rodata.CC_PalPowerSaveModeInit.str1.4 + 0x0000000000007140 0x20 /home/mike/Documents/ncs/v2.7.0/nrfxlib/crypto/nrf_cc310_platform/lib/cortex-m33/hard-float/no-interrupts/libnrf_cc310_platform_0.9.19.a(cc_pal_pm.c.obj) + .rodata.mutex_free.str1.4 + 0x0000000000007160 0x26 /home/mike/Documents/ncs/v2.7.0/nrfxlib/crypto/nrf_cc310_platform/lib/cortex-m33/hard-float/no-interrupts/libnrf_cc310_platform_0.9.19.a(nrf_cc3xx_platform_mutex.c.obj) + *fill* 0x0000000000007186 0x2 + .rodata.mutex_init.str1.4 + 0x0000000000007188 0x23 /home/mike/Documents/ncs/v2.7.0/nrfxlib/crypto/nrf_cc310_platform/lib/cortex-m33/hard-float/no-interrupts/libnrf_cc310_platform_0.9.19.a(nrf_cc3xx_platform_mutex.c.obj) + *fill* 0x00000000000071ab 0x1 + .rodata.domain_secp256r1 + 0x00000000000071ac 0xcc /home/mike/Documents/ncs/v2.7.0/nrfxlib/crypto/nrf_cc310_bl/lib/cortex-m33/hard-float/no-interrupts/libnrf_cc310_bl_0.9.12.a(nrf_cc310_bl_ecdsa_verify_secp256r1.c.obj) + 0x00000000000071ac domain_secp256r1 + .rodata.NRF_CC310_BL_HASH_LARVAL_SHA256 + 0x0000000000007278 0x20 /home/mike/Documents/ncs/v2.7.0/nrfxlib/crypto/nrf_cc310_bl/lib/cortex-m33/hard-float/no-interrupts/libnrf_cc310_bl_0.9.12.a(nrf_cc310_bl_hash_sha256.c.obj) + 0x0000000000007278 NRF_CC310_BL_HASH_LARVAL_SHA256 + .rodata.allowed_unprot_tlvs + 0x0000000000007298 0x1c app/libapp.a(image_validate.c.obj) + .rodata.boot_img_magic + 0x00000000000072b4 0x10 modules/mcuboot/boot/bootutil/zephyr/libmcuboot_util.a(bootutil_public.c.obj) + 0x00000000000072b4 boot_img_magic + .rodata.main.str1.1 + 0x00000000000072c4 0xde app/libapp.a(main.c.obj) + .rodata.str1.1 + 0x00000000000073a2 0x8 app/libapp.a(main.c.obj) + .rodata.flash_device_base.str1.1 + 0x00000000000073aa 0x26 app/libapp.a(flash_map_extended.c.obj) + .rodata.ec_secp256r1_oid + 0x00000000000073d0 0x9 app/libapp.a(image_ecdsa.c.obj) + .rodata.ec_pubkey_oid + 0x00000000000073d9 0x8 app/libapp.a(image_ecdsa.c.obj) + .rodata.bootutil_max_image_size.str1.1 + 0x00000000000073e1 0x3b app/libapp.a(bootutil_misc.c.obj) + .rodata.boot_validate_slot.isra.0.str1.1 + 0x000000000000741c 0x3a app/libapp.a(loader.c.obj) + .rodata.boot_swap_image.isra.0.str1.1 + 0x0000000000007456 0x2f app/libapp.a(loader.c.obj) + .rodata.context_boot_go.str1.1 + 0x0000000000007485 0xf1 app/libapp.a(loader.c.obj) + .rodata.swap_read_status_bytes.str1.1 + 0x0000000000007576 0x23 app/libapp.a(swap_move.c.obj) + .rodata.boot_slots_compatible.str1.1 + 0x0000000000007599 0x93 app/libapp.a(swap_move.c.obj) + .rodata.swap_status_source.str1.1 + 0x000000000000762c 0xa4 app/libapp.a(swap_move.c.obj) + .rodata.swap_run.str1.1 + 0x00000000000076d0 0x89 app/libapp.a(swap_move.c.obj) + .rodata.ecdsa_pub_key + 0x0000000000007759 0x5b app/libapp.a(autogen-pubkey.c.obj) + 0x0000000000007759 ecdsa_pub_key + .rodata.z_cbvprintf_impl.str1.1 + 0x00000000000077b4 0x12 zephyr/libzephyr.a(cbprintf_nano.c.obj) + 0x13 (size before relaxing) + .rodata.boot_banner.str1.1 + 0x00000000000077c6 0x92 zephyr/libzephyr.a(banner.c.obj) + .rodata.str1.1 + 0x0000000000007858 0x17 zephyr/drivers/clock_control/libdrivers__clock_control.a(clock_control_nrf.c.obj) + .rodata.str1.1 + 0x000000000000786f 0x17 zephyr/drivers/flash/libdrivers__flash.a(soc_flash_nrf.c.obj) + .rodata.str1.1 + 0x0000000000007886 0xc zephyr/drivers/gpio/libdrivers__gpio.a(gpio_nrfx.c.obj) + .rodata.drive_modes + 0x0000000000007892 0x8 zephyr/drivers/pinctrl/libdrivers__pinctrl.a(pinctrl_nrf.c.obj) + .rodata.str1.1 + 0x000000000000789a 0xa zephyr/drivers/serial/libdrivers__serial.a(uart_nrfx_uarte.c.obj) + .rodata.boot_swap_type_multi.str1.1 + 0x00000000000078a4 0xb8 modules/mcuboot/boot/bootutil/zephyr/libmcuboot_util.a(bootutil_public.c.obj) + .rodata.boot_swap_tables + 0x000000000000795c 0x12 modules/mcuboot/boot/bootutil/zephyr/libmcuboot_util.a(bootutil_public.c.obj) + .rodata.CSWTCH.17 + 0x000000000000796e 0x3 modules/hal_nordic/nrfx/libmodules__hal_nordic__nrfx.a(system_nrf91.c.obj) + *(SORT_BY_ALIGNMENT(.gnu.linkonce.r.*)) + 0x0000000000007974 . = ALIGN (0x4) + *fill* 0x0000000000007971 0x3 + 0x0000000000007974 __rodata_region_end = . + 0x0000000000007974 . = ALIGN (_region_min_align) + 0x0000000000007974 __rom_region_end = ((__rom_region_start + .) - ADDR (rom_start)) + +/DISCARD/ + *(SORT_BY_ALIGNMENT(.got.plt)) + *(SORT_BY_ALIGNMENT(.igot.plt)) + *(SORT_BY_ALIGNMENT(.got)) + *(SORT_BY_ALIGNMENT(.igot)) + 0x0000000020000000 . = 0x20000000 + 0x0000000020000000 . = ALIGN (_region_min_align) + 0x0000000020000000 _image_ram_start = . + +.ramfunc 0x0000000020000000 0x0 load address 0x0000000000007974 + 0x0000000020000000 . = ALIGN (_region_min_align) + 0x0000000020000000 __ramfunc_start = . + *(SORT_BY_ALIGNMENT(.ramfunc)) + *(SORT_BY_ALIGNMENT(.ramfunc.*)) + 0x0000000020000000 . = ALIGN (_region_min_align) + 0x0000000020000000 __ramfunc_end = . + 0x0000000000000000 __ramfunc_size = (__ramfunc_end - __ramfunc_start) + 0x0000000000007974 __ramfunc_load_start = LOADADDR (.ramfunc) + +datas 0x0000000020000000 0x108 load address 0x0000000000007974 + 0x0000000020000000 __data_region_start = . + 0x0000000020000000 __data_start = . + *(SORT_BY_ALIGNMENT(.data)) + *(SORT_BY_ALIGNMENT(.data.*)) + .data.FIH_NO_BOOTABLE_IMAGE + 0x0000000020000000 0x4 app/libapp.a(fault_injection_hardening.c.obj) + 0x0000000020000000 FIH_NO_BOOTABLE_IMAGE + .data.FIH_FAILURE + 0x0000000020000004 0x4 app/libapp.a(fault_injection_hardening.c.obj) + 0x0000000020000004 FIH_FAILURE + .data.FIH_SUCCESS + 0x0000000020000008 0x4 app/libapp.a(fault_injection_hardening.c.obj) + 0x0000000020000008 FIH_SUCCESS + .data.memset_func + 0x000000002000000c 0x4 app/libapp.a(platform_util.c.obj) + .data._char_out + 0x0000000020000010 0x4 zephyr/libzephyr.a(printk.c.obj) + 0x0000000020000010 _char_out + .data.flash_map + 0x0000000020000014 0x4 zephyr/libzephyr.a(flash_map_partition_manager.c.obj) + 0x0000000020000014 flash_map + .data._stdout_hook + 0x0000000020000018 0x4 zephyr/lib/libc/minimal/liblib__libc__minimal.a(stdout_console.c.obj) + .data.uarte_0_data + 0x000000002000001c 0x1c zephyr/drivers/serial/libdrivers__serial.a(uart_nrfx_uarte.c.obj) + .data.m_allocated_channels + 0x0000000020000038 0x4 modules/hal_nordic/nrfx/libmodules__hal_nordic__nrfx.a(nrfx_dppi.c.obj) + .data.m_cb 0x000000002000003c 0x64 modules/hal_nordic/nrfx/libmodules__hal_nordic__nrfx.a(nrfx_gpiote.c.obj) + .data.timeout_list + 0x00000000200000a0 0x8 zephyr/kernel/libkernel.a(timeout.c.obj) + .data.platform_abort_apis + 0x00000000200000a8 0x8 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/home/mike/Documents/ncs/v2.7.0/nrfxlib/crypto/nrf_cc310_platform/lib/cortex-m33/hard-float/no-interrupts/libnrf_cc310_platform_0.9.19.a(ctr_drbg.c.obj) + .ARM.attributes + 0x00000000000023de 0x3a /home/mike/Documents/ncs/v2.7.0/nrfxlib/crypto/nrf_cc310_platform/lib/cortex-m33/hard-float/no-interrupts/libnrf_cc310_platform_0.9.19.a(custom_entropy.c.obj) + .ARM.attributes + 0x0000000000002418 0x3a /home/mike/Documents/ncs/v2.7.0/nrfxlib/crypto/nrf_cc310_platform/lib/cortex-m33/hard-float/no-interrupts/libnrf_cc310_platform_0.9.19.a(hmac_drbg_alt.c.obj) + .ARM.attributes + 0x0000000000002452 0x3a /home/mike/Documents/ncs/v2.7.0/nrfxlib/crypto/nrf_cc310_platform/lib/cortex-m33/hard-float/no-interrupts/libnrf_cc310_platform_0.9.19.a(cc_rng_plat.c.obj) + .ARM.attributes + 0x000000000000248c 0x3a /home/mike/Documents/ncs/v2.7.0/nrfxlib/crypto/nrf_cc310_platform/lib/cortex-m33/hard-float/no-interrupts/libnrf_cc310_platform_0.9.19.a(cc_pal_trng.c.obj) + .ARM.attributes + 0x00000000000024c6 0x3a /home/mike/Documents/ncs/v2.7.0/nrfxlib/crypto/nrf_cc310_platform/lib/cortex-m33/hard-float/no-interrupts/libnrf_cc310_platform_0.9.19.a(threading_alt.c.obj) + .ARM.attributes + 0x0000000000002500 0x3a /home/mike/Documents/ncs/v2.7.0/nrfxlib/crypto/nrf_cc310_platform/lib/cortex-m33/hard-float/no-interrupts/libnrf_cc310_platform_0.9.19.a(llf_rnd.c.obj) + .ARM.attributes + 0x000000000000253a 0x3a /home/mike/Documents/ncs/v2.7.0/nrfxlib/crypto/nrf_cc310_platform/lib/cortex-m33/hard-float/no-interrupts/libnrf_cc310_platform_0.9.19.a(trng_api.c.obj) + .ARM.attributes + 0x0000000000002574 0x3a /home/mike/Documents/ncs/v2.7.0/nrfxlib/crypto/nrf_cc310_platform/lib/cortex-m33/hard-float/no-interrupts/libnrf_cc310_platform_0.9.19.a(aes_alt.c.obj) + .ARM.attributes + 0x00000000000025ae 0x3a /home/mike/Documents/ncs/v2.7.0/nrfxlib/crypto/nrf_cc310_platform/lib/cortex-m33/hard-float/no-interrupts/libnrf_cc310_platform_0.9.19.a(sha256_alt.c.obj) + .ARM.attributes + 0x00000000000025e8 0x3a /home/mike/Documents/ncs/v2.7.0/nrfxlib/crypto/nrf_cc310_platform/lib/cortex-m33/hard-float/no-interrupts/libnrf_cc310_platform_0.9.19.a(mbedtls_hash_common.c.obj) + .ARM.attributes + 0x0000000000002622 0x3a /home/mike/Documents/ncs/v2.7.0/nrfxlib/crypto/nrf_cc310_platform/lib/cortex-m33/hard-float/no-interrupts/libnrf_cc310_platform_0.9.19.a(sha256.c.obj) + .ARM.attributes + 0x000000000000265c 0x3a /home/mike/Documents/ncs/v2.7.0/nrfxlib/crypto/nrf_cc310_platform/lib/cortex-m33/hard-float/no-interrupts/libnrf_cc310_platform_0.9.19.a(driver_common.c.obj) + .ARM.attributes + 0x0000000000002696 0x3a /home/mike/Documents/ncs/v2.7.0/nrfxlib/crypto/nrf_cc310_platform/lib/cortex-m33/hard-float/no-interrupts/libnrf_cc310_platform_0.9.19.a(hash_driver.c.obj) + .ARM.attributes + 0x00000000000026d0 0x3a /home/mike/Documents/ncs/v2.7.0/nrfxlib/crypto/nrf_cc310_platform/lib/cortex-m33/hard-float/no-interrupts/libnrf_cc310_platform_0.9.19.a(aes_driver.c.obj) + .ARM.attributes + 0x000000000000270a 0x3a /home/mike/Documents/ncs/v2.7.0/nrfxlib/crypto/nrf_cc310_platform/lib/cortex-m33/hard-float/no-interrupts/libnrf_cc310_platform_0.9.19.a(kmu_shared.c.obj) + .ARM.attributes + 0x0000000000002744 0x3a /home/mike/Documents/ncs/v2.7.0/nrfxlib/crypto/nrf_cc310_platform/lib/cortex-m33/hard-float/no-interrupts/libnrf_cc310_platform_0.9.19.a(cc_platform_keys.c.obj) + .ARM.attributes + 0x000000000000277e 0x3a /home/mike/Documents/ncs/v2.7.0/nrfxlib/crypto/nrf_cc310_platform/lib/cortex-m33/hard-float/no-interrupts/libnrf_cc310_platform_0.9.19.a(cc_util_cmac.c.obj) + .ARM.attributes + 0x00000000000027b8 0x3a /home/mike/Documents/ncs/v2.7.0/nrfxlib/crypto/nrf_cc310_platform/lib/cortex-m33/hard-float/no-interrupts/libnrf_cc310_platform_0.9.19.a(cc_pal_buff_attr.c.obj) + .ARM.attributes + 0x00000000000027f2 0x3a /home/mike/Documents/ncs/v2.7.0/nrfxlib/crypto/nrf_cc310_platform/lib/cortex-m33/hard-float/no-interrupts/libnrf_cc310_platform_0.9.19.a(nrf_cc3xx_platform_kmu.c.obj) + .ARM.attributes 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0x0000000000002958 0x3c /home/mike/Documents/ncs/v2.7.0/nrfxlib/crypto/nrf_cc310_bl/lib/cortex-m33/hard-float/no-interrupts/libnrf_cc310_bl_0.9.12.a(ssi_pal_mem.c.obj) + .ARM.attributes + 0x0000000000002994 0x3c /home/mike/Documents/ncs/v2.7.0/nrfxlib/crypto/nrf_cc310_bl/lib/cortex-m33/hard-float/no-interrupts/libnrf_cc310_bl_0.9.12.a(crys_common_conv_endian.c.obj) + .ARM.attributes + 0x00000000000029d0 0x3c /home/mike/Documents/ncs/v2.7.0/nrfxlib/crypto/nrf_cc310_bl/lib/cortex-m33/hard-float/no-interrupts/libnrf_cc310_bl_0.9.12.a(nrf_cc310_bl_hash.c.obj) + .ARM.attributes + 0x0000000000002a0c 0x3c /home/mike/Documents/ncs/v2.7.0/nrfxlib/crypto/nrf_cc310_bl/lib/cortex-m33/hard-float/no-interrupts/libnrf_cc310_bl_0.9.12.a(pka_ec_wrst.c.obj) + .ARM.attributes + 0x0000000000002a48 0x3c /home/mike/Documents/ncs/v2.7.0/nrfxlib/crypto/nrf_cc310_bl/lib/cortex-m33/hard-float/no-interrupts/libnrf_cc310_bl_0.9.12.a(ssi_hal.c.obj) + *(SORT_BY_ALIGNMENT(.gnu.attributes)) + +.last_section 0x0000000000007a84 0x4 + 0x0000000000007a84 0x4 LONG 0xe015e015 + 0x0000000000007a88 _flash_used = ((LOADADDR (.last_section) + SIZEOF (.last_section)) - __rom_region_start) +OUTPUT(zephyr/zephyr_pre0.elf elf32-littlearm) +LOAD linker stubs |