nrfdemo

112 files changed, 30717 insertions, 0 deletions

diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/app_commit.h b/nrfdemo/builddk/mcuboot/zephyr/include/generated/app_commit.h
new file mode 100644
index 0000000..1a806c0
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/app_commit.h
@@ -0,0 +1,12 @@
+#ifndef _APP_COMMIT_H_
+#define _APP_COMMIT_H_
+
+/*  values come from cmake/version.cmake
+ * BUILD_COMMIT related  values will be 'git rev-parse',
+ * alternatively user defined BUILD_VERSION.
+ */
+
+#define APP_COMMIT                   daf2946a0f07
+#define APP_COMMIT_STRING            "daf2946a0f07"
+
+#endif /* _APP_COMMIT_H_ */
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/app_data_alignment.ld b/nrfdemo/builddk/mcuboot/zephyr/include/generated/app_data_alignment.ld
new file mode 100644
index 0000000..a9257f1
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/app_data_alignment.ld
@@ -0,0 +1,9 @@
+/*
+ * Copyright (c) 2017 Linaro Limited.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/* Set initial alignment to the 32 byte minimum for all MPUs */
+_app_data_align = 32;
+. = ALIGN(32);
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/app_smem.ld b/nrfdemo/builddk/mcuboot/zephyr/include/generated/app_smem.ld
new file mode 100644
index 0000000..7b3eead
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/app_smem.ld
@@ -0,0 +1,38 @@
+/* SPDX-License-Identifier: Apache-2.0 */
+
+/*
+ * This hackish way of including files is due to CMake issues:
+ *   https://gitlab.kitware.com/cmake/cmake/issues/11985
+ *   https://gitlab.kitware.com/cmake/cmake/issues/13718
+ *
+ * When using the "Unix Makefiles" generator, CMake simply
+ * greps for "#include" to generate dependency list.
+ * So if doing it normally, both files are being included
+ * in the dependency list. This creates weird dependency
+ * issue:
+ *
+ *   1. Using A.ld to create a linker script A.cmd.
+ *   2. Using A.cmd to generate A_prebuilt.elf.
+ *   3. Using A_prebuilt.elf to create B.ld.
+ *   4. Creating B.cmd with B.ld.
+ *   5. Creating B_prebuilt.elf using B.cmd.
+ *
+ * Since the dependency list of A.cmd contains both
+ * A.ld and B.ld, when make is invoked again, B.ld
+ * is newer than A.cmd so everything from this point on
+ * gets rebuilt. In order to break this cycle, this
+ * hackish needs to be used since CMake does not parse
+ * macros, and thus these will not appear in
+ * the dependency list. The dependencies should then be
+ * put in CMakeLists.txt instead.
+ *
+ * Note: Ninja generator does not suffer from this issue.
+ */
+#ifdef LINKER_APP_SMEM_UNALIGNED
+#define APP_SMEM_LD <app_smem_unaligned.ld>
+#else
+#define APP_SMEM_LD <app_smem_aligned.ld>
+#endif
+
+#include APP_SMEM_LD
+#undef APP_SMEM_LD
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/app_smem_aligned.ld b/nrfdemo/builddk/mcuboot/zephyr/include/generated/app_smem_aligned.ld
new file mode 100644
index 0000000..ce36567
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/app_smem_aligned.ld
@@ -0,0 +1,3 @@
+/* SPDX-License-Identifier: Apache-2.0 */
+
+/* Empty file  */
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/app_smem_unaligned.ld b/nrfdemo/builddk/mcuboot/zephyr/include/generated/app_smem_unaligned.ld
new file mode 100644
index 0000000..ddc31d4
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/app_smem_unaligned.ld
@@ -0,0 +1,3 @@
+/* SPDX-License-Identifier: Apache-2.0 */
+
+/* Empty file */
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/app_version.h b/nrfdemo/builddk/mcuboot/zephyr/include/generated/app_version.h
new file mode 100644
index 0000000..26d411d
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/app_version.h
@@ -0,0 +1,25 @@
+#ifndef _APP_VERSION_H_
+#define _APP_VERSION_H_
+
+/*  values come from cmake/version.cmake
+ * BUILD_VERSION related  values will be 'git describe',
+ * alternatively user defined BUILD_VERSION.
+ */
+
+/* #undef ZEPHYR_VERSION_CODE */
+/* #undef ZEPHYR_VERSION */
+
+#define APPVERSION                   0x2010000
+#define APP_VERSION_NUMBER           0x20100
+#define APP_VERSION_MAJOR            2
+#define APP_VERSION_MINOR            1
+#define APP_PATCHLEVEL               0
+#define APP_TWEAK                    0
+#define APP_VERSION_STRING           "2.1.0-dev"
+#define APP_VERSION_EXTENDED_STRING  "2.1.0-dev+0"
+#define APP_VERSION_TWEAK_STRING     "2.1.0+0"
+
+#define APP_BUILD_VERSION v2.1.0-ncs1
+
+
+#endif /* _APP_VERSION_H_ */
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/autoconf.h b/nrfdemo/builddk/mcuboot/zephyr/include/generated/autoconf.h
new file mode 100644
index 0000000..27bfeab
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/autoconf.h
@@ -0,0 +1,524 @@
+#define CONFIG_PM_PARTITION_SIZE_MCUBOOT_SCRATCH 0x1e000
+#define CONFIG_PM_PARTITION_SIZE_MCUBOOT_PAD 0x200
+#define CONFIG_PM_PARTITION_SIZE_MCUBOOT 0xc000
+#define CONFIG_BOOT_USE_NRF_CC310_BL 1
+#define CONFIG_MCUBOOT_NRF_CLEANUP_PERIPHERAL 1
+#define CONFIG_BOOT_SIGNATURE_KEY_FILE "root-ec-p256.pem"
+#define CONFIG_BOOT_ERASE_PROGRESSIVELY 1
+#define CONFIG_MCUBOOT 1
+#define CONFIG_BOOT_USE_CC310 1
+#define CONFIG_NRFXLIB_CRYPTO 1
+#define CONFIG_NRF_CC310_BL 1
+#define CONFIG_BOOT_SIGNATURE_TYPE_ECDSA_P256 1
+#define CONFIG_BOOT_ECDSA_CC310 1
+#define CONFIG_MCUBOOT_CLEANUP_ARM_CORE 1
+#define CONFIG_MBEDTLS_CFG_FILE "mcuboot-mbedtls-cfg.h"
+#define CONFIG_BOOT_VALIDATE_SLOT0 1
+#define CONFIG_BOOT_PREFER_SWAP_MOVE 1
+#define CONFIG_BOOT_SWAP_USING_MOVE 1
+#define CONFIG_BOOT_ENCRYPTION_SUPPORT 1
+#define CONFIG_BOOT_MAX_IMG_SECTORS 128
+#define CONFIG_BOOT_SHARE_BACKEND_DISABLED 1
+#define CONFIG_BOOT_FIH_PROFILE_LOW 1
+#define CONFIG_BOOT_USB_DFU_NO 1
+#define CONFIG_MCUBOOT_LOG_LEVEL_INF 1
+#define CONFIG_MCUBOOT_LOG_LEVEL 3
+#define CONFIG_MCUBOOT_LOG_THREAD_STACK_SIZE 768
+#define CONFIG_UPDATEABLE_IMAGE_NUMBER 1
+#define CONFIG_BOOT_WATCHDOG_FEED 1
+#define CONFIG_MCUBOOT_DEVICE_SETTINGS 1
+#define CONFIG_USB_DEVICE_PRODUCT "MCUBOOT"
+#define CONFIG_FLASH_LOAD_SIZE 0x10000
+#define CONFIG_FLASH_LOAD_OFFSET 0x0
+#define CONFIG_NUM_IRQS 65
+#define CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC 32768
+#define CONFIG_FLASH_SIZE 1024
+#define CONFIG_FLASH_BASE_ADDRESS 0x0
+#define CONFIG_MP_MAX_NUM_CPUS 1
+#define CONFIG_PLATFORM_SPECIFIC_INIT 1
+#define CONFIG_SYS_CLOCK_TICKS_PER_SEC 32768
+#define CONFIG_ROM_START_OFFSET 0x0
+#define CONFIG_PINCTRL 1
+#define CONFIG_BUILD_OUTPUT_BIN 1
+#define CONFIG_XIP 1
+#define CONFIG_MAIN_STACK_SIZE 10240
+#define CONFIG_IDLE_STACK_SIZE 320
+#define CONFIG_HAS_FLASH_LOAD_OFFSET 1
+#define CONFIG_CPU_HAS_ARM_MPU 1
+#define CONFIG_TICKLESS_KERNEL 1
+#define CONFIG_CLOCK_CONTROL_INIT_PRIORITY 30
+#define CONFIG_USE_DT_CODE_PARTITION 1
+#define CONFIG_FPU 1
+#define CONFIG_HW_STACK_PROTECTION 1
+#define CONFIG_SERIAL_INIT_PRIORITY 50
+#define CONFIG_GPIO 1
+#define CONFIG_SERIAL 1
+#define CONFIG_KERNEL_ENTRY "__start"
+#define CONFIG_LOG 1
+#define CONFIG_SYSTEM_WORKQUEUE_STACK_SIZE 1024
+#define CONFIG_DCACHE_LINE_SIZE 32
+#define CONFIG_GEN_IRQ_VECTOR_TABLE 1
+#define CONFIG_SOC "nrf9161"
+#define CONFIG_ARCH_SW_ISR_TABLE_ALIGN 4
+#define CONFIG_NRF_RTC_TIMER 1
+#define CONFIG_LOG_DOMAIN_NAME ""
+#define CONFIG_BUILD_OUTPUT_HEX 1
+#define CONFIG_CLOCK_CONTROL 1
+#define CONFIG_ARCH_HAS_CUSTOM_BUSY_WAIT 1
+#define CONFIG_SOC_HAS_TIMING_FUNCTIONS 1
+#define CONFIG_FLASH_INIT_PRIORITY 50
+#define CONFIG_GEN_ISR_TABLES 1
+#define CONFIG_GEN_IRQ_START_VECTOR 0
+#define CONFIG_GEN_SW_ISR_TABLE 1
+#define CONFIG_SRAM_OFFSET 0x0
+#define CONFIG_CONSOLE 1
+#define CONFIG_SOC_SERIES "nrf91"
+#define CONFIG_ARCH_IRQ_VECTOR_TABLE_ALIGN 4
+#define CONFIG_ISR_STACK_SIZE 2048
+#define CONFIG_MINIMAL_LIBC_OPTIMIZE_STRING_FOR_SIZE 1
+#define CONFIG_ICACHE_LINE_SIZE 32
+#define CONFIG_DT_HAS_ARDUINO_UNO_ADC_ENABLED 1
+#define CONFIG_DT_HAS_ARDUINO_HEADER_R3_ENABLED 1
+#define CONFIG_DT_HAS_ARM_ARMV8M_MPU_ENABLED 1
+#define CONFIG_DT_HAS_ARM_CORTEX_M33F_ENABLED 1
+#define CONFIG_DT_HAS_ARM_CRYPTOCELL_310_ENABLED 1
+#define CONFIG_DT_HAS_ARM_V8M_NVIC_ENABLED 1
+#define CONFIG_DT_HAS_FIXED_PARTITIONS_ENABLED 1
+#define CONFIG_DT_HAS_GPIO_KEYS_ENABLED 1
+#define CONFIG_DT_HAS_GPIO_LEDS_ENABLED 1
+#define CONFIG_DT_HAS_MMIO_SRAM_ENABLED 1
+#define CONFIG_DT_HAS_NORDIC_NRF_CLOCK_ENABLED 1
+#define CONFIG_DT_HAS_NORDIC_NRF_CTRLAPPERI_ENABLED 1
+#define CONFIG_DT_HAS_NORDIC_NRF_DPPIC_ENABLED 1
+#define CONFIG_DT_HAS_NORDIC_NRF_EGU_ENABLED 1
+#define CONFIG_DT_HAS_NORDIC_NRF_FICR_ENABLED 1
+#define CONFIG_DT_HAS_NORDIC_NRF_GPIO_ENABLED 1
+#define CONFIG_DT_HAS_NORDIC_NRF_GPIOTE_ENABLED 1
+#define CONFIG_DT_HAS_NORDIC_NRF_GPREGRET_ENABLED 1
+#define CONFIG_DT_HAS_NORDIC_NRF_IPC_ENABLED 1
+#define CONFIG_DT_HAS_NORDIC_NRF_KMU_ENABLED 1
+#define CONFIG_DT_HAS_NORDIC_NRF_PINCTRL_ENABLED 1
+#define CONFIG_DT_HAS_NORDIC_NRF_POWER_ENABLED 1
+#define CONFIG_DT_HAS_NORDIC_NRF_PWM_ENABLED 1
+#define CONFIG_DT_HAS_NORDIC_NRF_REGULATORS_ENABLED 1
+#define CONFIG_DT_HAS_NORDIC_NRF_SAADC_ENABLED 1
+#define CONFIG_DT_HAS_NORDIC_NRF_SPIM_ENABLED 1
+#define CONFIG_DT_HAS_NORDIC_NRF_SPU_ENABLED 1
+#define CONFIG_DT_HAS_NORDIC_NRF_TWIM_ENABLED 1
+#define CONFIG_DT_HAS_NORDIC_NRF_UARTE_ENABLED 1
+#define CONFIG_DT_HAS_NORDIC_NRF_UICR_ENABLED 1
+#define CONFIG_DT_HAS_NORDIC_NRF_VMC_ENABLED 1
+#define CONFIG_DT_HAS_NORDIC_NRF_WDT_ENABLED 1
+#define CONFIG_DT_HAS_NORDIC_NRF91_FLASH_CONTROLLER_ENABLED 1
+#define CONFIG_DT_HAS_PWM_LEDS_ENABLED 1
+#define CONFIG_DT_HAS_SOC_NV_FLASH_ENABLED 1
+#define CONFIG_DT_HAS_ZEPHYR_BT_HCI_ENTROPY_ENABLED 1
+#define CONFIG_NUM_METAIRQ_PRIORITIES 0
+#define CONFIG_MPSL_WORK_STACK_SIZE 1024
+#define CONFIG_WARN_EXPERIMENTAL 1
+#define CONFIG_INIT_ARCH_HW_AT_BOOT 1
+#define CONFIG_NORDIC_QSPI_NOR_FLASH_LAYOUT_PAGE_SIZE 4096
+#define CONFIG_NCS_MCUBOOT_IN_BUILD 1
+#define CONFIG_PM_PARTITION_SIZE_PROVISION 0x280
+#define CONFIG_PM_PARTITION_SIZE_B0_IMAGE 0x8000
+#define CONFIG_IS_BOOTLOADER_IMG 1
+#define CONFIG_SB_VALIDATION_INFO_MAGIC 0x86518483
+#define CONFIG_SB_VALIDATION_POINTER_MAGIC 0x6919b47e
+#define CONFIG_SB_VALIDATION_INFO_CRYPTO_ID 1
+#define CONFIG_SB_VALIDATION_INFO_VERSION 2
+#define CONFIG_SB_VALIDATION_METADATA_OFFSET 0
+#define CONFIG_SB_VALIDATE_FW_SIGNATURE 1
+#define CONFIG_SYSTEM_WORKQUEUE_PRIORITY -2
+#define CONFIG_HEAP_MEM_POOL_SIZE 0
+#define CONFIG_PCD_VERSION_PAGE_BUF_SIZE 2046
+#define CONFIG_NRF_CLOUD_CLIENT_ID_SRC_COMPILE_TIME 1
+#define CONFIG_NRF_CLOUD_CLIENT_ID "my-client-id"
+#define CONFIG_FOTA_USE_NRF_CLOUD_SETTINGS_AREA 1
+#define CONFIG_FOTA_DL_TIMEOUT_MIN 15
+#define CONFIG_NRF_CLOUD_ALERT_LOG_LEVEL_DEFAULT 1
+#define CONFIG_NRF_CLOUD_ALERT_LOG_LEVEL 0
+#define CONFIG_NRF_CLOUD_LOG_OUTPUT_LEVEL 1
+#define CONFIG_NRF_CLOUD_LOG_BUF_SIZE 256
+#define CONFIG_NRF_CLOUD_LOG_LOG_LEVEL_DEFAULT 1
+#define CONFIG_NRF_CLOUD_LOG_LOG_LEVEL 0
+#define CONFIG_NRF_CLOUD_LOG_LEVEL_DEFAULT 1
+#define CONFIG_NRF_CLOUD_LOG_LEVEL 0
+#define CONFIG_MPSL_FEM_LOG_LEVEL_DEFAULT 1
+#define CONFIG_MPSL_FEM_LOG_LEVEL 0
+#define CONFIG_MPSL_THREAD_COOP_PRIO 8
+#define CONFIG_MPSL_TIMESLOT_SESSION_COUNT 0
+#define CONFIG_MPSL_LOG_LEVEL_DEFAULT 1
+#define CONFIG_MPSL_LOG_LEVEL 0
+#define CONFIG_PARTITION_MANAGER_ENABLED 1
+#define CONFIG_FLASH_MAP_CUSTOM 1
+#define CONFIG_SRAM_SIZE 88
+#define CONFIG_SRAM_BASE_ADDRESS 0x20000000
+#define CONFIG_PM_EXTERNAL_FLASH_BASE 0x0
+#define CONFIG_PM_EXTERNAL_FLASH_PATH ""
+#define CONFIG_PM_EXTERNAL_FLASH_SIZE_BITS 0
+#define CONFIG_PM_SRAM_BASE 0x20000000
+#define CONFIG_PM_SRAM_SIZE 0x40000
+#define CONFIG_MGMT_FMFU_LOG_LEVEL_DEFAULT 1
+#define CONFIG_MGMT_FMFU_LOG_LEVEL 0
+#define CONFIG_MGMT_SUITFU_TRIGGER_UPDATE_RESET_DELAY_MS 100
+#define CONFIG_MGMT_SUITFU_AUTO_REGISTER_HANDLERS 1
+#define CONFIG_MGMT_SUITFU_GRP_IMG 1
+#define CONFIG_MGMT_SUITFU_IMAGE_NUMBER 0
+#define CONFIG_MGMT_SUITFU_LOG_LEVEL_DEFAULT 1
+#define CONFIG_MGMT_SUITFU_LOG_LEVEL 0
+#define CONFIG_AUDIO_MODULE_NAME_SIZE 20
+#define CONFIG_AUDIO_MODULE_LOG_LEVEL_DEFAULT 1
+#define CONFIG_AUDIO_MODULE_LOG_LEVEL 0
+#define CONFIG_COMMON_LIBC_MALLOC_ARENA_SIZE 0
+#define CONFIG_POSIX_MAX_FDS 4
+#define CONFIG_WFA_QT_LOG_LEVEL_DEFAULT 1
+#define CONFIG_WFA_QT_LOG_LEVEL 0
+#define CONFIG_WFA_QT_THREAD_STACK_SIZE 4096
+#define CONFIG_WFA_QT_REBOOT_TIMEOUT_MS 1000
+#define CONFIG_WFA_QT_DEFAULT_INTERFACE "nordic_wlan0"
+#define CONFIG_WPAS_READY_TIMEOUT_MS 10000
+#define CONFIG_NRF_SPU_FLASH_REGION_SIZE 0x8000
+#define CONFIG_FPROTECT_BLOCK_SIZE 0x8000
+#define CONFIG_FPROTECT 1
+#define CONFIG_HW_UNIQUE_KEY_SUPPORTED 1
+#define CONFIG_HW_UNIQUE_KEY_PARTITION_SIZE 0x0
+#define CONFIG_NCS_BOOT_BANNER 1
+#define CONFIG_NCS_APPLICATION_BOOT_BANNER_STRING "MCUboot"
+#define CONFIG_NCS_NCS_BOOT_BANNER_STRING "nRF Connect SDK"
+#define CONFIG_NCS_ZEPHYR_BOOT_BANNER_STRING "Zephyr OS"
+#define CONFIG_HW_CC3XX 1
+#define CONFIG_NRFX_GPIOTE_NUM_OF_EVT_HANDLERS 1
+#define CONFIG_ZTEST_MULTICORE_DEFAULT_SETTINGS 1
+#define CONFIG_ZEPHYR_NRF_MODULE 1
+#define CONFIG_SIGN_IMAGES 1
+#define CONFIG_DT_FLASH_WRITE_BLOCK_SIZE 4
+#define CONFIG_ZEPHYR_MCUBOOT_MODULE 1
+#define CONFIG_ZEPHYR_MBEDTLS_MODULE 1
+#define CONFIG_ZEPHYR_OBERON_PSA_CRYPTO_MODULE 1
+#define CONFIG_TFM_BOARD "/home/mike/Documents/ncs/v2.7.0/zephyr/modules/trusted-firmware-m/nordic/nrf9120"
+#define CONFIG_ZEPHYR_TRUSTED_FIRMWARE_M_MODULE 1
+#define CONFIG_ZEPHYR_PSA_ARCH_TESTS_MODULE 1
+#define CONFIG_ZEPHYR_SOC_HWMV1_MODULE 1
+#define CONFIG_ZEPHYR_CJSON_MODULE 1
+#define CONFIG_ZEPHYR_AZURE_SDK_FOR_C_MODULE 1
+#define CONFIG_ZEPHYR_CIRRUS_LOGIC_MODULE 1
+#define CONFIG_ZEPHYR_OPENTHREAD_MODULE 1
+#define CONFIG_SUIT_ENVELOPE_TEMPLATE ""
+#define CONFIG_SUIT_ENVELOPE_TARGET ""
+#define CONFIG_SUIT_ENVELOPE_OUTPUT_ARTIFACT "merged.hex"
+#define CONFIG_SUIT_ENVELOPE_OUTPUT_MPI_MERGE 1
+#define CONFIG_ZEPHYR_SUIT_GENERATOR_MODULE 1
+#define CONFIG_SUIT_PLATFORM_DRY_RUN_SUPPORT 1
+#define CONFIG_ZEPHYR_SUIT_PROCESSOR_MODULE 1
+#define CONFIG_ZEPHYR_MEMFAULT_FIRMWARE_SDK_MODULE 1
+#define CONFIG_ZEPHYR_COREMARK_MODULE 1
+#define CONFIG_ZEPHYR_CANOPENNODE_MODULE 1
+#define CONFIG_ZEPHYR_CHRE_MODULE 1
+#define CONFIG_ZEPHYR_LZ4_MODULE 1
+#define CONFIG_ZEPHYR_NANOPB_MODULE 1
+#define CONFIG_ZEPHYR_TF_M_TESTS_MODULE 1
+#define CONFIG_ZEPHYR_ZSCILIB_MODULE 1
+#define CONFIG_ZEPHYR_CMSIS_MODULE 1
+#define CONFIG_HAS_CMSIS_CORE 1
+#define CONFIG_HAS_CMSIS_CORE_M 1
+#define CONFIG_ZEPHYR_CMSIS_DSP_MODULE 1
+#define CONFIG_ZEPHYR_CMSIS_NN_MODULE 1
+#define CONFIG_ZEPHYR_FATFS_MODULE 1
+#define CONFIG_ZEPHYR_HAL_NORDIC_MODULE 1
+#define CONFIG_HAS_NRFX 1
+#define CONFIG_NRFX_CLOCK 1
+#define CONFIG_NRFX_CLOCK_LFXO_TWO_STAGE_ENABLED 1
+#define CONFIG_NRFX_DPPI 1
+#define CONFIG_NRFX_GPIOTE 1
+#define CONFIG_NRFX_GPIOTE0 1
+#define CONFIG_NRFX_NVMC 1
+#define CONFIG_NRFX_WDT 1
+#define CONFIG_NRFX_WDT0 1
+#define CONFIG_ZEPHYR_HAL_ST_MODULE 1
+#define CONFIG_ZEPHYR_HAL_WURTHELEKTRONIK_MODULE 1
+#define CONFIG_ZEPHYR_LIBMETAL_MODULE 1
+#define CONFIG_ZEPHYR_LIBLC3_MODULE 1
+#define CONFIG_ZEPHYR_LITTLEFS_MODULE 1
+#define CONFIG_ZEPHYR_LORAMAC_NODE_MODULE 1
+#define CONFIG_ZEPHYR_LVGL_MODULE 1
+#define CONFIG_ZEPHYR_MIPI_SYS_T_MODULE 1
+#define CONFIG_ZEPHYR_NRF_HW_MODELS_MODULE 1
+#define CONFIG_ZEPHYR_OPEN_AMP_MODULE 1
+#define CONFIG_ZEPHYR_PICOLIBC_MODULE 1
+#define CONFIG_ZEPHYR_SEGGER_MODULE 1
+#define CONFIG_HAS_SEGGER_RTT 1
+#define CONFIG_ZEPHYR_TINYCRYPT_MODULE 1
+#define CONFIG_ZEPHYR_UOSCORE_UEDHOC_MODULE 1
+#define CONFIG_ZEPHYR_ZCBOR_MODULE 1
+#define CONFIG_NRF_MODEM_SHMEM_CTRL_SIZE 0x4e8
+#define CONFIG_HAS_HW_NRF_CC3XX 1
+#define CONFIG_NRF_CC3XX_PLATFORM 1
+#define CONFIG_CC3XX_MUTEX_LOCK 1
+#define CONFIG_NRF_802154_SOURCE_NRFXLIB 1
+#define CONFIG_ZEPHYR_NRFXLIB_MODULE 1
+#define CONFIG_ZEPHYR_CONNECTEDHOMEIP_MODULE 1
+#define CONFIG_MCUBOOT_BOOTUTIL_LIB 1
+#define CONFIG_BOARD "nrf9161dk"
+#define CONFIG_BOARD_REVISION "0.9.0"
+#define CONFIG_BOARD_TARGET "nrf9161dk@0.9.0/nrf9161"
+#define CONFIG_BOARD_NRF9161DK 1
+#define CONFIG_BOARD_NRF9161DK_NRF9161 1
+#define CONFIG_BOARD_QUALIFIERS "nrf9161"
+#define CONFIG_SOC_FAMILY "nordic_nrf"
+#define CONFIG_SOC_FAMILY_NORDIC_NRF 1
+#define CONFIG_SOC_SERIES_NRF91X 1
+#define CONFIG_SOC_NRF9120 1
+#define CONFIG_SOC_NRF9161_LACA 1
+#define CONFIG_HAS_HW_NRF_CC310 1
+#define CONFIG_HAS_HW_NRF_CLOCK 1
+#define CONFIG_HAS_HW_NRF_CTRLAP 1
+#define CONFIG_HAS_HW_NRF_DPPIC 1
+#define CONFIG_HAS_HW_NRF_EGU0 1
+#define CONFIG_HAS_HW_NRF_EGU1 1
+#define CONFIG_HAS_HW_NRF_EGU2 1
+#define CONFIG_HAS_HW_NRF_EGU3 1
+#define CONFIG_HAS_HW_NRF_EGU4 1
+#define CONFIG_HAS_HW_NRF_EGU5 1
+#define CONFIG_HAS_HW_NRF_GPIO0 1
+#define CONFIG_HAS_HW_NRF_GPIOTE0 1
+#define CONFIG_HAS_HW_NRF_IPC 1
+#define CONFIG_HAS_HW_NRF_KMU 1
+#define CONFIG_HAS_HW_NRF_NVMC_PE 1
+#define CONFIG_HAS_HW_NRF_POWER 1
+#define CONFIG_HAS_HW_NRF_PWM0 1
+#define CONFIG_HAS_HW_NRF_REGULATORS 1
+#define CONFIG_HAS_HW_NRF_SAADC 1
+#define CONFIG_HAS_HW_NRF_SPIM3 1
+#define CONFIG_HAS_HW_NRF_SPU 1
+#define CONFIG_HAS_HW_NRF_TWIM2 1
+#define CONFIG_HAS_HW_NRF_UARTE0 1
+#define CONFIG_HAS_HW_NRF_UARTE1 1
+#define CONFIG_HAS_HW_NRF_VMC 1
+#define CONFIG_HAS_HW_NRF_WDT0 1
+#define CONFIG_NRF_ENABLE_ICACHE 1
+#define CONFIG_NRF_SPU_FLASH_REGION_ALIGNMENT 0x8000
+#define CONFIG_NRF_SPU_RAM_REGION_SIZE 0x2000
+#define CONFIG_NRF_SPU_RAM_REGION_ALIGNMENT 0x2000
+#define CONFIG_NRF_RTC_TIMER_USER_CHAN_COUNT 0
+#define CONFIG_NRF_SOC_SECURE_SUPPORTED 1
+#define CONFIG_NRF_APPROTECT_USE_UICR 1
+#define CONFIG_GPIO_INIT_PRIORITY 40
+#define CONFIG_SOC_LOG_LEVEL_DEFAULT 1
+#define CONFIG_SOC_LOG_LEVEL 0
+#define CONFIG_SOC_COMPATIBLE_NRF 1
+#define CONFIG_ARCH "arm"
+#define CONFIG_ARCH_HAS_SINGLE_THREAD_SUPPORT 1
+#define CONFIG_CPU_CORTEX 1
+#define CONFIG_ARM_MPU_REGION_MIN_ALIGN_AND_SIZE 4
+#define CONFIG_CPU_CORTEX_M 1
+#define CONFIG_ISA_THUMB2 1
+#define CONFIG_ASSEMBLER_ISA_THUMB2 1
+#define CONFIG_COMPILER_ISA_THUMB2 1
+#define CONFIG_STACK_ALIGN_DOUBLE_WORD 1
+#define CONFIG_FAULT_DUMP 2
+#define CONFIG_BUILTIN_STACK_GUARD 1
+#define CONFIG_ARM_STACK_PROTECTION 1
+#define CONFIG_FP_HARDABI 1
+#define CONFIG_FP16 1
+#define CONFIG_FP16_IEEE 1
+#define CONFIG_CPU_CORTEX_M33 1
+#define CONFIG_CPU_CORTEX_M_HAS_SYSTICK 1
+#define CONFIG_CPU_CORTEX_M_HAS_DWT 1
+#define CONFIG_CPU_CORTEX_M_HAS_BASEPRI 1
+#define CONFIG_CPU_CORTEX_M_HAS_VTOR 1
+#define CONFIG_CPU_CORTEX_M_HAS_SPLIM 1
+#define CONFIG_CPU_CORTEX_M_HAS_PROGRAMMABLE_FAULT_PRIOS 1
+#define CONFIG_CPU_CORTEX_M_HAS_CMSE 1
+#define CONFIG_ARMV7_M_ARMV8_M_MAINLINE 1
+#define CONFIG_ARMV8_M_MAINLINE 1
+#define CONFIG_ARMV8_M_SE 1
+#define CONFIG_ARMV7_M_ARMV8_M_FP 1
+#define CONFIG_ARMV8_M_DSP 1
+#define CONFIG_NULL_POINTER_EXCEPTION_DETECTION_NONE 1
+#define CONFIG_ARM_TRUSTZONE_M 1
+#define CONFIG_CPU_HAS_NRF_IDAU 1
+#define CONFIG_ARM 1
+#define CONFIG_ARCH_IS_SET 1
+#define CONFIG_ARCH_LOG_LEVEL_DEFAULT 1
+#define CONFIG_ARCH_LOG_LEVEL 0
+#define CONFIG_LITTLE_ENDIAN 1
+#define CONFIG_GEN_PRIV_STACKS 1
+#define CONFIG_ISR_TABLES_LOCAL_DECLARATION_SUPPORTED 1
+#define CONFIG_IRQ_VECTOR_TABLE_JUMP_BY_ADDRESS 1
+#define CONFIG_EXCEPTION_DEBUG 1
+#define CONFIG_ARCH_HAS_TIMING_FUNCTIONS 1
+#define CONFIG_ARCH_HAS_TRUSTED_EXECUTION 1
+#define CONFIG_ARCH_HAS_STACK_PROTECTION 1
+#define CONFIG_ARCH_HAS_RAMFUNC_SUPPORT 1
+#define CONFIG_ARCH_HAS_NESTED_EXCEPTION_DETECTION 1
+#define CONFIG_ARCH_SUPPORTS_COREDUMP 1
+#define CONFIG_ARCH_SUPPORTS_ARCH_HW_INIT 1
+#define CONFIG_ARCH_SUPPORTS_ROM_START 1
+#define CONFIG_ARCH_HAS_EXTRA_EXCEPTION_INFO 1
+#define CONFIG_ARCH_HAS_THREAD_LOCAL_STORAGE 1
+#define CONFIG_ARCH_HAS_SUSPEND_TO_RAM 1
+#define CONFIG_ARCH_HAS_THREAD_ABORT 1
+#define CONFIG_ARCH_HAS_CODE_DATA_RELOCATION 1
+#define CONFIG_CPU_HAS_TEE 1
+#define CONFIG_CPU_HAS_FPU 1
+#define CONFIG_CPU_HAS_MPU 1
+#define CONFIG_TOOLCHAIN_HAS_BUILTIN_FFS 1
+#define CONFIG_KERNEL_LOG_LEVEL_DEFAULT 1
+#define CONFIG_KERNEL_LOG_LEVEL 0
+#define CONFIG_NUM_COOP_PRIORITIES 1
+#define CONFIG_NUM_PREEMPT_PRIORITIES 0
+#define CONFIG_MAIN_THREAD_PRIORITY -2
+#define CONFIG_COOP_ENABLED 1
+#define CONFIG_PRIORITY_CEILING -127
+#define CONFIG_THREAD_STACK_INFO 1
+#define CONFIG_SCHED_DUMB 1
+#define CONFIG_WAITQ_DUMB 1
+#define CONFIG_ERRNO 1
+#define CONFIG_BARRIER_OPERATIONS_ARCH 1
+#define CONFIG_ATOMIC_OPERATIONS_BUILTIN 1
+#define CONFIG_NUM_MBOX_ASYNC_MSGS 10
+#define CONFIG_KERNEL_MEM_POOL 1
+#define CONFIG_ARCH_HAS_CUSTOM_SWAP_TO_MAIN 1
+#define CONFIG_SWAP_NONATOMIC 1
+#define CONFIG_SYS_CLOCK_EXISTS 1
+#define CONFIG_TIMEOUT_64BIT 1
+#define CONFIG_SYS_CLOCK_MAX_TIMEOUT_DAYS 365
+#define CONFIG_MP_NUM_CPUS 1
+#define CONFIG_TOOLCHAIN_SUPPORTS_THREAD_LOCAL_STORAGE 1
+#define CONFIG_KERNEL_INIT_PRIORITY_OBJECTS 30
+#define CONFIG_KERNEL_INIT_PRIORITY_DEFAULT 40
+#define CONFIG_KERNEL_INIT_PRIORITY_DEVICE 50
+#define CONFIG_APPLICATION_INIT_PRIORITY 90
+#define CONFIG_CLOCK_CONTROL_LOG_LEVEL_DEFAULT 1
+#define CONFIG_CLOCK_CONTROL_LOG_LEVEL 0
+#define CONFIG_CLOCK_CONTROL_NRF 1
+#define CONFIG_CLOCK_CONTROL_NRF_K32SRC_XTAL 1
+#define CONFIG_CLOCK_CONTROL_NRF_K32SRC_50PPM 1
+#define CONFIG_CLOCK_CONTROL_NRF_ACCURACY 50
+#define CONFIG_CONSOLE_INPUT_MAX_LINE_LEN 128
+#define CONFIG_CONSOLE_HAS_DRIVER 1
+#define CONFIG_CONSOLE_INIT_PRIORITY 60
+#define CONFIG_UART_CONSOLE 1
+#define CONFIG_UART_CONSOLE_LOG_LEVEL_DEFAULT 1
+#define CONFIG_UART_CONSOLE_LOG_LEVEL 0
+#define CONFIG_FLASH_HAS_DRIVER_ENABLED 1
+#define CONFIG_FLASH_HAS_PAGE_LAYOUT 1
+#define CONFIG_FLASH 1
+#define CONFIG_FLASH_LOG_LEVEL_DEFAULT 1
+#define CONFIG_FLASH_LOG_LEVEL 0
+#define CONFIG_FLASH_PAGE_LAYOUT 1
+#define CONFIG_SOC_FLASH_NRF 1
+#define CONFIG_SOC_FLASH_NRF_RADIO_SYNC_NONE 1
+#define CONFIG_GPIO_LOG_LEVEL_DEFAULT 1
+#define CONFIG_GPIO_LOG_LEVEL 0
+#define CONFIG_GPIO_NRFX 1
+#define CONFIG_GPIO_NRFX_INTERRUPT 1
+#define CONFIG_INTC_INIT_PRIORITY 40
+#define CONFIG_INTC_LOG_LEVEL_DEFAULT 1
+#define CONFIG_INTC_LOG_LEVEL 0
+#define CONFIG_PINCTRL_LOG_LEVEL_DEFAULT 1
+#define CONFIG_PINCTRL_LOG_LEVEL 0
+#define CONFIG_PINCTRL_STORE_REG 1
+#define CONFIG_PINCTRL_NRF 1
+#define CONFIG_SERIAL_HAS_DRIVER 1
+#define CONFIG_SERIAL_SUPPORT_ASYNC 1
+#define CONFIG_SERIAL_SUPPORT_INTERRUPT 1
+#define CONFIG_UART_LOG_LEVEL_DEFAULT 1
+#define CONFIG_UART_LOG_LEVEL 0
+#define CONFIG_UART_NRFX 1
+#define CONFIG_UART_NRFX_UARTE 1
+#define CONFIG_UART_NRFX_UARTE_LEGACY_SHIM 1
+#define CONFIG_UART_0_ENHANCED_POLL_OUT 1
+#define CONFIG_UART_0_NRF_TX_BUFFER_SIZE 32
+#define CONFIG_UART_1_ENHANCED_POLL_OUT 1
+#define CONFIG_UART_1_NRF_TX_BUFFER_SIZE 32
+#define CONFIG_SYSTEM_CLOCK_INIT_PRIORITY 0
+#define CONFIG_TICKLESS_CAPABLE 1
+#define CONFIG_SYSTEM_TIMER_HAS_DISABLE_SUPPORT 1
+#define CONFIG_SYSTEM_CLOCK_WAIT_FOR_STABILITY 1
+#define CONFIG_NRF_USBD_COMMON_LOG_LEVEL_DEFAULT 1
+#define CONFIG_NRF_USBD_COMMON_LOG_LEVEL 0
+#define CONFIG_USBC_LOG_LEVEL_DEFAULT 1
+#define CONFIG_USBC_LOG_LEVEL 0
+#define CONFIG_FULL_LIBC_SUPPORTED 1
+#define CONFIG_MINIMAL_LIBC_SUPPORTED 1
+#define CONFIG_NEWLIB_LIBC_SUPPORTED 1
+#define CONFIG_PICOLIBC_SUPPORTED 1
+#define CONFIG_MINIMAL_LIBC 1
+#define CONFIG_HAS_NEWLIB_LIBC_NANO 1
+#define CONFIG_COMMON_LIBC_ABORT 1
+#define CONFIG_COMMON_LIBC_GMTIME_R 1
+#define CONFIG_COMMON_LIBC_MALLOC 1
+#define CONFIG_COMMON_LIBC_CALLOC 1
+#define CONFIG_COMMON_LIBC_REALLOCARRAY 1
+#define CONFIG_COMMON_LIBC_STRNLEN 1
+#define CONFIG_MINIMAL_LIBC_NON_REENTRANT_FUNCTIONS 1
+#define CONFIG_MINIMAL_LIBC_MALLOC 1
+#define CONFIG_MINIMAL_LIBC_MALLOC_ARENA_SIZE -2
+#define CONFIG_MINIMAL_LIBC_CALLOC 1
+#define CONFIG_MINIMAL_LIBC_REALLOCARRAY 1
+#define CONFIG_MINIMAL_LIBC_TIME 1
+#define CONFIG_STDOUT_CONSOLE 1
+#define CONFIG_NEED_LIBC_MEM_PARTITION 1
+#define CONFIG_SYS_HEAP_ALLOC_LOOPS 3
+#define CONFIG_SYS_HEAP_AUTO 1
+#define CONFIG_HAS_POWEROFF 1
+#define CONFIG_CBPRINTF_NANO 1
+#define CONFIG_CBPRINTF_FULL_INTEGRAL 1
+#define CONFIG_CBPRINTF_LIBC_SUBSTS 1
+#define CONFIG_CBPRINTF_PACKAGE_LOG_LEVEL_DEFAULT 1
+#define CONFIG_CBPRINTF_PACKAGE_LOG_LEVEL 0
+#define CONFIG_CBPRINTF_CONVERT_CHECK_PTR 1
+#define CONFIG_POSIX_ENV_LOG_LEVEL_DEFAULT 1
+#define CONFIG_POSIX_ENV_LOG_LEVEL 0
+#define CONFIG_SEM_VALUE_MAX 32767
+#define CONFIG_SEM_NAMELEN_MAX 16
+#define CONFIG_POSIX_RTSIG_MAX 0
+#define CONFIG_POSIX_PAGE_SIZE_BITS 6
+#define CONFIG_LIBGCC_RTLIB 1
+#define CONFIG_NOTIFY 1
+#define CONFIG_ONOFF 1
+#define CONFIG_PRINTK 1
+#define CONFIG_EARLY_CONSOLE 1
+#define CONFIG_ASSERT_VERBOSE 1
+#define CONFIG_LLEXT_EDK_NAME "llext-edk"
+#define CONFIG_LOG_CORE_INIT_PRIORITY 0
+#define CONFIG_LOG_MODE_MINIMAL 1
+#define CONFIG_LOG_DEFAULT_LEVEL 0
+#define CONFIG_LOG_OVERRIDE_LEVEL 0
+#define CONFIG_LOG_MAX_LEVEL 4
+#define CONFIG_LOG_USE_VLA 1
+#define CONFIG_LOG_SIMPLE_MSG_OPTIMIZE 1
+#define CONFIG_TIMER_RANDOM_INITIAL_STATE 123456789
+#define CONFIG_FLASH_MAP 1
+#define CONFIG_COVERAGE_GCOV_HEAP_SIZE 16384
+#define CONFIG_TOOLCHAIN_ZEPHYR_0_16 1
+#define CONFIG_TOOLCHAIN_ZEPHYR_SUPPORTS_THREAD_LOCAL_STORAGE 1
+#define CONFIG_LINKER_ORPHAN_SECTION_WARN 1
+#define CONFIG_ROM_END_OFFSET 0x0
+#define CONFIG_LD_LINKER_SCRIPT_SUPPORTED 1
+#define CONFIG_LD_LINKER_TEMPLATE 1
+#define CONFIG_LINKER_SORT_BY_ALIGNMENT 1
+#define CONFIG_LINKER_GENERIC_SECTIONS_PRESENT_AT_BOOT 1
+#define CONFIG_LINKER_LAST_SECTION_ID 1
+#define CONFIG_LINKER_LAST_SECTION_ID_PATTERN 0xE015E015
+#define CONFIG_LINKER_USE_RELAX 1
+#define CONFIG_LINKER_ITERABLE_SUBALIGN 4
+#define CONFIG_LINKER_DEVNULL_SUPPORT 1
+#define CONFIG_STD_C99 1
+#define CONFIG_TOOLCHAIN_SUPPORTS_GNU_EXTENSIONS 1
+#define CONFIG_COMPILER_FREESTANDING 1
+#define CONFIG_SIZE_OPTIMIZATIONS 1
+#define CONFIG_COMPILER_TRACK_MACRO_EXPANSION 1
+#define CONFIG_COMPILER_COLOR_DIAGNOSTICS 1
+#define CONFIG_FORTIFY_SOURCE_NONE 1
+#define CONFIG_COMPILER_OPT ""
+#define CONFIG_RUNTIME_ERROR_CHECKS 1
+#define CONFIG_KERNEL_BIN_NAME "zephyr"
+#define CONFIG_OUTPUT_STAT 1
+#define CONFIG_OUTPUT_PRINT_MEMORY_USAGE 1
+#define CONFIG_BUILD_OUTPUT_META 1
+#define CONFIG_BUILD_OUTPUT_STRIP_PATHS 1
+#define CONFIG_CHECK_INIT_PRIORITIES 1
+#define CONFIG_WARN_DEPRECATED 1
+#define CONFIG_ENFORCE_ZEPHYR_STDINT 1
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/devicetree_generated.h b/nrfdemo/builddk/mcuboot/zephyr/include/generated/devicetree_generated.h
new file mode 100644
index 0000000..2426b97
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/devicetree_generated.h
@@ -0,0 +1,13105 @@
+/*
+ * Generated by gen_defines.py
+ *
+ * DTS input file:
+ *   /home/mike/Documents/ncs/v2.7.0/conexio-firmware-sdk/samples/conexio_stratus/mqtt_control/builddk/mcuboot/zephyr/zephyr.dts.pre
+ *
+ * Directories with bindings:
+ *   /home/mike/Documents/ncs/v2.7.0/nrf/dts/bindings, $ZEPHYR_BASE/boards/nordic/nrf9161dk/dts/bindings, $ZEPHYR_BASE/dts/bindings
+ *
+ * Node dependency ordering (ordinal and path):
+ *   0   /
+ *   1   /aliases
+ *   2   /analog-connector
+ *   3   /chosen
+ *   4   /connector
+ *   5   /entropy_bt_hci
+ *   6   /soc
+ *   7   /soc/interrupt-controller@e000e100
+ *   8   /soc/gpiote@5000d000
+ *   9   /soc/peripheral@50000000
+ *   10  /soc/peripheral@50000000/gpio@842500
+ *   11  /gpio-reset
+ *   12  /soc/peripheral@50000000/timer@10000
+ *   13  /sw-pwm
+ *   14  /buttons
+ *   15  /buttons/button_0
+ *   16  /buttons/button_1
+ *   17  /buttons/button_2
+ *   18  /buttons/button_3
+ *   19  /cpus
+ *   20  /cpus/cpu@0
+ *   21  /cpus/cpu@0/mpu@e000ed90
+ *   22  /leds
+ *   23  /leds/led_0
+ *   24  /leds/led_1
+ *   25  /leds/led_2
+ *   26  /leds/led_3
+ *   27  /pin-controller
+ *   28  /pin-controller/i2c2_default
+ *   29  /pin-controller/i2c2_default/group1
+ *   30  /pin-controller/i2c2_sleep
+ *   31  /pin-controller/i2c2_sleep/group1
+ *   32  /pin-controller/pwm0_default
+ *   33  /pin-controller/pwm0_default/group1
+ *   34  /pin-controller/pwm0_sleep
+ *   35  /pin-controller/pwm0_sleep/group1
+ *   36  /pin-controller/spi3_default
+ *   37  /pin-controller/spi3_default/group1
+ *   38  /pin-controller/spi3_sleep
+ *   39  /pin-controller/spi3_sleep/group1
+ *   40  /pin-controller/uart0_default
+ *   41  /pin-controller/uart0_default/group1
+ *   42  /pin-controller/uart0_default/group2
+ *   43  /pin-controller/uart0_sleep
+ *   44  /pin-controller/uart0_sleep/group1
+ *   45  /pin-controller/uart1_default
+ *   46  /pin-controller/uart1_default/group1
+ *   47  /pin-controller/uart1_default/group2
+ *   48  /pin-controller/uart1_sleep
+ *   49  /pin-controller/uart1_sleep/group1
+ *   50  /soc/peripheral@50000000/pwm@21000
+ *   51  /pwmleds
+ *   52  /pwmleds/pwm_led_0
+ *   53  /reserved-memory
+ *   54  /reserved-memory/image_modem@20016000
+ *   55  /reserved-memory/image_ns@20020000
+ *   56  /reserved-memory/image_s@20000000
+ *   57  /soc/crypto@50840000
+ *   58  /soc/ctrlap@50006000
+ *   59  /soc/ficr@ff0000
+ *   60  /soc/gpiote@40031000
+ *   61  /soc/memory@20000000
+ *   62  /soc/spu@50003000
+ *   63  /soc/timer@e000e010
+ *   64  /soc/uicr@ff8000
+ *   65  /soc/peripheral@50000000/adc@e000
+ *   66  /soc/peripheral@50000000/clock@5000
+ *   67  /soc/peripheral@50000000/dppic@17000
+ *   68  /soc/peripheral@50000000/egu@1b000
+ *   69  /soc/peripheral@50000000/egu@1c000
+ *   70  /soc/peripheral@50000000/egu@1d000
+ *   71  /soc/peripheral@50000000/egu@1e000
+ *   72  /soc/peripheral@50000000/egu@1f000
+ *   73  /soc/peripheral@50000000/egu@20000
+ *   74  /soc/peripheral@50000000/i2c@8000
+ *   75  /soc/peripheral@50000000/i2c@9000
+ *   76  /soc/peripheral@50000000/i2c@b000
+ *   77  /soc/peripheral@50000000/i2s@28000
+ *   78  /soc/peripheral@50000000/ipc@2a000
+ *   79  /soc/peripheral@50000000/kmu@39000
+ *   80  /soc/peripheral@50000000/pdm@26000
+ *   81  /soc/peripheral@50000000/pwm@22000
+ *   82  /soc/peripheral@50000000/pwm@23000
+ *   83  /soc/peripheral@50000000/pwm@24000
+ *   84  /soc/peripheral@50000000/regulator@4000
+ *   85  /soc/peripheral@50000000/rtc@14000
+ *   86  /soc/peripheral@50000000/rtc@15000
+ *   87  /soc/peripheral@50000000/spi@8000
+ *   88  /soc/peripheral@50000000/spi@9000
+ *   89  /soc/peripheral@50000000/spi@a000
+ *   90  /soc/peripheral@50000000/timer@f000
+ *   91  /soc/peripheral@50000000/timer@11000
+ *   92  /soc/peripheral@50000000/uart@8000
+ *   93  /soc/peripheral@50000000/uart@9000
+ *   94  /soc/peripheral@50000000/uart@a000
+ *   95  /soc/peripheral@50000000/uart@b000
+ *   96  /soc/peripheral@50000000/vmc@3a000
+ *   97  /soc/peripheral@50000000/watchdog@18000
+ *   98  /soc/peripheral@50000000/flash-controller@39000
+ *   99  /soc/peripheral@50000000/flash-controller@39000/flash@0
+ *   100 /soc/peripheral@50000000/flash-controller@39000/flash@0/partitions
+ *   101 /soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@0
+ *   102 /soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@10000
+ *   103 /soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@50000
+ *   104 /soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@85000
+ *   105 /soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@c5000
+ *   106 /soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@fa000
+ *   107 /soc/peripheral@50000000/i2c@a000
+ *   108 /soc/peripheral@50000000/i2c@a000/pcal6408a@21
+ *   109 /soc/peripheral@50000000/power@5000
+ *   110 /soc/peripheral@50000000/power@5000/gpregret1@51c
+ *   111 /soc/peripheral@50000000/power@5000/gpregret2@520
+ *   112 /soc/peripheral@50000000/spi@b000
+ *   113 /soc/peripheral@50000000/spi@b000/gd25wb256e3ir@1
+ *
+ * Definitions derived from these nodes in dependency order are next,
+ * followed by /chosen nodes.
+ */
+
+/* Used to remove brackets from around a single argument */
+#define DT_DEBRACKET_INTERNAL(...) __VA_ARGS__
+
+/*
+ * Devicetree node: /
+ *
+ * Node identifier: DT_N
+ */
+
+/* Node's full path: */
+#define DT_N_PATH "/"
+
+/* Node's name with unit-address: */
+#define DT_N_FULL_NAME "/"
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_CHILD_NUM 14
+#define DT_N_CHILD_NUM_STATUS_OKAY 12
+#define DT_N_FOREACH_CHILD(fn) fn(DT_N_S_chosen) fn(DT_N_S_aliases) fn(DT_N_S_soc) fn(DT_N_S_pin_controller) fn(DT_N_S_entropy_bt_hci) fn(DT_N_S_sw_pwm) fn(DT_N_S_cpus) fn(DT_N_S_leds) fn(DT_N_S_pwmleds) fn(DT_N_S_buttons) fn(DT_N_S_gpio_reset) fn(DT_N_S_connector) fn(DT_N_S_analog_connector) fn(DT_N_S_reserved_memory)
+#define DT_N_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_chosen) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_aliases) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pin_controller) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_entropy_bt_hci) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_sw_pwm) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_cpus) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_leds) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pwmleds) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_buttons) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_gpio_reset) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_connector) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_analog_connector) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_reserved_memory)
+#define DT_N_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_chosen, __VA_ARGS__) fn(DT_N_S_aliases, __VA_ARGS__) fn(DT_N_S_soc, __VA_ARGS__) fn(DT_N_S_pin_controller, __VA_ARGS__) fn(DT_N_S_entropy_bt_hci, __VA_ARGS__) fn(DT_N_S_sw_pwm, __VA_ARGS__) fn(DT_N_S_cpus, __VA_ARGS__) fn(DT_N_S_leds, __VA_ARGS__) fn(DT_N_S_pwmleds, __VA_ARGS__) fn(DT_N_S_buttons, __VA_ARGS__) fn(DT_N_S_gpio_reset, __VA_ARGS__) fn(DT_N_S_connector, __VA_ARGS__) fn(DT_N_S_analog_connector, __VA_ARGS__) fn(DT_N_S_reserved_memory, __VA_ARGS__)
+#define DT_N_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_chosen, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_aliases, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pin_controller, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_entropy_bt_hci, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_sw_pwm, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_cpus, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_leds, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pwmleds, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_buttons, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_gpio_reset, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_connector, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_analog_connector, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_reserved_memory, __VA_ARGS__)
+#define DT_N_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_chosen) fn(DT_N_S_aliases) fn(DT_N_S_soc) fn(DT_N_S_pin_controller) fn(DT_N_S_entropy_bt_hci) fn(DT_N_S_cpus) fn(DT_N_S_leds) fn(DT_N_S_pwmleds) fn(DT_N_S_buttons) fn(DT_N_S_connector) fn(DT_N_S_analog_connector) fn(DT_N_S_reserved_memory)
+#define DT_N_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_chosen) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_aliases) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pin_controller) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_entropy_bt_hci) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_cpus) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_leds) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pwmleds) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_buttons) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_connector) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_analog_connector) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_reserved_memory)
+#define DT_N_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_chosen, __VA_ARGS__) fn(DT_N_S_aliases, __VA_ARGS__) fn(DT_N_S_soc, __VA_ARGS__) fn(DT_N_S_pin_controller, __VA_ARGS__) fn(DT_N_S_entropy_bt_hci, __VA_ARGS__) fn(DT_N_S_cpus, __VA_ARGS__) fn(DT_N_S_leds, __VA_ARGS__) fn(DT_N_S_pwmleds, __VA_ARGS__) fn(DT_N_S_buttons, __VA_ARGS__) fn(DT_N_S_connector, __VA_ARGS__) fn(DT_N_S_analog_connector, __VA_ARGS__) fn(DT_N_S_reserved_memory, __VA_ARGS__)
+#define DT_N_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_chosen, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_aliases, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pin_controller, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_entropy_bt_hci, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_cpus, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_leds, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pwmleds, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_buttons, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_connector, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_analog_connector, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_reserved_memory, __VA_ARGS__)
+
+/* Node's dependency ordinal: */
+#define DT_N_ORD 0
+#define DT_N_ORD_STR_SORTABLE 00000
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_REQUIRES_ORDS /* nothing */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_SUPPORTS_ORDS \
+	1, /* /aliases */ \
+	2, /* /analog-connector */ \
+	3, /* /chosen */ \
+	4, /* /connector */ \
+	5, /* /entropy_bt_hci */ \
+	6, /* /soc */ \
+	11, /* /gpio-reset */ \
+	13, /* /sw-pwm */ \
+	14, /* /buttons */ \
+	19, /* /cpus */ \
+	22, /* /leds */ \
+	27, /* /pin-controller */ \
+	51, /* /pwmleds */ \
+	53, /* /reserved-memory */
+
+/* Existence and alternate IDs: */
+#define DT_N_EXISTS 1
+#define DT_N_INST_0_nordic_nrf9161_dk_nrf9161 DT_N
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_REG_NUM 0
+#define DT_N_RANGES_NUM 0
+#define DT_N_FOREACH_RANGE(fn) 
+#define DT_N_IRQ_NUM 0
+#define DT_N_IRQ_LEVEL 0
+#define DT_N_COMPAT_MATCHES_nordic_nrf9161_dk_nrf9161 1
+#define DT_N_COMPAT_VENDOR_IDX_0_EXISTS 1
+#define DT_N_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
+#define DT_N_COMPAT_MODEL_IDX_0_EXISTS 1
+#define DT_N_COMPAT_MODEL_IDX_0 "nrf9161-dk-nrf9161"
+#define DT_N_STATUS_okay 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_PINCTRL_NUM 0
+
+/* Generic property macros: */
+#define DT_N_P_compatible {"nordic,nrf9161-dk-nrf9161"}
+#define DT_N_P_compatible_IDX_0 "nordic,nrf9161-dk-nrf9161"
+#define DT_N_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf9161-dk-nrf9161
+#define DT_N_P_compatible_IDX_0_STRING_TOKEN nordic_nrf9161_dk_nrf9161
+#define DT_N_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF9161_DK_NRF9161
+#define DT_N_P_compatible_IDX_0_EXISTS 1
+#define DT_N_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N, compatible, 0)
+#define DT_N_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N, compatible, 0)
+#define DT_N_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N, compatible, 0, __VA_ARGS__)
+#define DT_N_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N, compatible, 0, __VA_ARGS__)
+#define DT_N_P_compatible_LEN 1
+#define DT_N_P_compatible_EXISTS 1
+
+/*
+ * Devicetree node: /aliases
+ *
+ * Node identifier: DT_N_S_aliases
+ */
+
+/* Node's full path: */
+#define DT_N_S_aliases_PATH "/aliases"
+
+/* Node's name with unit-address: */
+#define DT_N_S_aliases_FULL_NAME "aliases"
+
+/* Node parent (/) identifier: */
+#define DT_N_S_aliases_PARENT DT_N
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_aliases_CHILD_IDX 1
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_aliases_CHILD_NUM 0
+#define DT_N_S_aliases_CHILD_NUM_STATUS_OKAY 0
+#define DT_N_S_aliases_FOREACH_CHILD(fn) 
+#define DT_N_S_aliases_FOREACH_CHILD_SEP(fn, sep) 
+#define DT_N_S_aliases_FOREACH_CHILD_VARGS(fn, ...) 
+#define DT_N_S_aliases_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
+#define DT_N_S_aliases_FOREACH_CHILD_STATUS_OKAY(fn) 
+#define DT_N_S_aliases_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
+#define DT_N_S_aliases_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
+#define DT_N_S_aliases_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 
+
+/* Node's dependency ordinal: */
+#define DT_N_S_aliases_ORD 1
+#define DT_N_S_aliases_ORD_STR_SORTABLE 00001
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_aliases_REQUIRES_ORDS \
+	0, /* / */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_aliases_SUPPORTS_ORDS /* nothing */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_aliases_EXISTS 1
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_aliases_REG_NUM 0
+#define DT_N_S_aliases_RANGES_NUM 0
+#define DT_N_S_aliases_FOREACH_RANGE(fn) 
+#define DT_N_S_aliases_IRQ_NUM 0
+#define DT_N_S_aliases_IRQ_LEVEL 0
+#define DT_N_S_aliases_STATUS_okay 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_aliases_PINCTRL_NUM 0
+
+/* (No generic property macros) */
+
+/*
+ * Devicetree node: /analog-connector
+ *
+ * Node identifier: DT_N_S_analog_connector
+ *
+ * Binding (compatible = arduino,uno-adc):
+ *   $ZEPHYR_BASE/dts/bindings/adc/arduino,uno-adc.yaml
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_analog_connector_PATH "/analog-connector"
+
+/* Node's name with unit-address: */
+#define DT_N_S_analog_connector_FULL_NAME "analog-connector"
+
+/* Node parent (/) identifier: */
+#define DT_N_S_analog_connector_PARENT DT_N
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_analog_connector_CHILD_IDX 12
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_analog_connector_CHILD_NUM 0
+#define DT_N_S_analog_connector_CHILD_NUM_STATUS_OKAY 0
+#define DT_N_S_analog_connector_FOREACH_CHILD(fn) 
+#define DT_N_S_analog_connector_FOREACH_CHILD_SEP(fn, sep) 
+#define DT_N_S_analog_connector_FOREACH_CHILD_VARGS(fn, ...) 
+#define DT_N_S_analog_connector_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
+#define DT_N_S_analog_connector_FOREACH_CHILD_STATUS_OKAY(fn) 
+#define DT_N_S_analog_connector_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
+#define DT_N_S_analog_connector_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
+#define DT_N_S_analog_connector_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 
+
+/* Node's dependency ordinal: */
+#define DT_N_S_analog_connector_ORD 2
+#define DT_N_S_analog_connector_ORD_STR_SORTABLE 00002
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_analog_connector_REQUIRES_ORDS \
+	0, /* / */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_analog_connector_SUPPORTS_ORDS /* nothing */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_analog_connector_EXISTS 1
+#define DT_N_INST_0_arduino_uno_adc DT_N_S_analog_connector
+#define DT_N_NODELABEL_arduino_adc  DT_N_S_analog_connector
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_analog_connector_REG_NUM 0
+#define DT_N_S_analog_connector_RANGES_NUM 0
+#define DT_N_S_analog_connector_FOREACH_RANGE(fn) 
+#define DT_N_S_analog_connector_IRQ_NUM 0
+#define DT_N_S_analog_connector_IRQ_LEVEL 0
+#define DT_N_S_analog_connector_COMPAT_MATCHES_arduino_uno_adc 1
+#define DT_N_S_analog_connector_COMPAT_VENDOR_IDX_0_EXISTS 1
+#define DT_N_S_analog_connector_COMPAT_VENDOR_IDX_0 "Arduino"
+#define DT_N_S_analog_connector_COMPAT_MODEL_IDX_0_EXISTS 1
+#define DT_N_S_analog_connector_COMPAT_MODEL_IDX_0 "uno-adc"
+#define DT_N_S_analog_connector_STATUS_okay 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_analog_connector_PINCTRL_NUM 0
+
+/* Generic property macros: */
+#define DT_N_S_analog_connector_P_wakeup_source 0
+#define DT_N_S_analog_connector_P_wakeup_source_EXISTS 1
+#define DT_N_S_analog_connector_P_zephyr_pm_device_runtime_auto 0
+#define DT_N_S_analog_connector_P_zephyr_pm_device_runtime_auto_EXISTS 1
+#define DT_N_S_analog_connector_P_compatible {"arduino,uno-adc"}
+#define DT_N_S_analog_connector_P_compatible_IDX_0 "arduino,uno-adc"
+#define DT_N_S_analog_connector_P_compatible_IDX_0_STRING_UNQUOTED arduino,uno-adc
+#define DT_N_S_analog_connector_P_compatible_IDX_0_STRING_TOKEN arduino_uno_adc
+#define DT_N_S_analog_connector_P_compatible_IDX_0_STRING_UPPER_TOKEN ARDUINO_UNO_ADC
+#define DT_N_S_analog_connector_P_compatible_IDX_0_EXISTS 1
+#define DT_N_S_analog_connector_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_analog_connector, compatible, 0)
+#define DT_N_S_analog_connector_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_analog_connector, compatible, 0)
+#define DT_N_S_analog_connector_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_analog_connector, compatible, 0, __VA_ARGS__)
+#define DT_N_S_analog_connector_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_analog_connector, compatible, 0, __VA_ARGS__)
+#define DT_N_S_analog_connector_P_compatible_LEN 1
+#define DT_N_S_analog_connector_P_compatible_EXISTS 1
+#define DT_N_S_analog_connector_P_zephyr_deferred_init 0
+#define DT_N_S_analog_connector_P_zephyr_deferred_init_EXISTS 1
+
+/*
+ * Devicetree node: /chosen
+ *
+ * Node identifier: DT_N_S_chosen
+ */
+
+/* Node's full path: */
+#define DT_N_S_chosen_PATH "/chosen"
+
+/* Node's name with unit-address: */
+#define DT_N_S_chosen_FULL_NAME "chosen"
+
+/* Node parent (/) identifier: */
+#define DT_N_S_chosen_PARENT DT_N
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_chosen_CHILD_IDX 0
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_chosen_CHILD_NUM 0
+#define DT_N_S_chosen_CHILD_NUM_STATUS_OKAY 0
+#define DT_N_S_chosen_FOREACH_CHILD(fn) 
+#define DT_N_S_chosen_FOREACH_CHILD_SEP(fn, sep) 
+#define DT_N_S_chosen_FOREACH_CHILD_VARGS(fn, ...) 
+#define DT_N_S_chosen_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
+#define DT_N_S_chosen_FOREACH_CHILD_STATUS_OKAY(fn) 
+#define DT_N_S_chosen_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
+#define DT_N_S_chosen_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
+#define DT_N_S_chosen_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 
+
+/* Node's dependency ordinal: */
+#define DT_N_S_chosen_ORD 3
+#define DT_N_S_chosen_ORD_STR_SORTABLE 00003
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_chosen_REQUIRES_ORDS \
+	0, /* / */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_chosen_SUPPORTS_ORDS /* nothing */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_chosen_EXISTS 1
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_chosen_REG_NUM 0
+#define DT_N_S_chosen_RANGES_NUM 0
+#define DT_N_S_chosen_FOREACH_RANGE(fn) 
+#define DT_N_S_chosen_IRQ_NUM 0
+#define DT_N_S_chosen_IRQ_LEVEL 0
+#define DT_N_S_chosen_STATUS_okay 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_chosen_PINCTRL_NUM 0
+
+/* (No generic property macros) */
+
+/*
+ * Devicetree node: /connector
+ *
+ * Node identifier: DT_N_S_connector
+ *
+ * Binding (compatible = arduino-header-r3):
+ *   $ZEPHYR_BASE/dts/bindings/gpio/arduino-header-r3.yaml
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_connector_PATH "/connector"
+
+/* Node's name with unit-address: */
+#define DT_N_S_connector_FULL_NAME "connector"
+
+/* Node parent (/) identifier: */
+#define DT_N_S_connector_PARENT DT_N
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_connector_CHILD_IDX 11
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_connector_CHILD_NUM 0
+#define DT_N_S_connector_CHILD_NUM_STATUS_OKAY 0
+#define DT_N_S_connector_FOREACH_CHILD(fn) 
+#define DT_N_S_connector_FOREACH_CHILD_SEP(fn, sep) 
+#define DT_N_S_connector_FOREACH_CHILD_VARGS(fn, ...) 
+#define DT_N_S_connector_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
+#define DT_N_S_connector_FOREACH_CHILD_STATUS_OKAY(fn) 
+#define DT_N_S_connector_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
+#define DT_N_S_connector_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
+#define DT_N_S_connector_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 
+
+/* Node's dependency ordinal: */
+#define DT_N_S_connector_ORD 4
+#define DT_N_S_connector_ORD_STR_SORTABLE 00004
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_connector_REQUIRES_ORDS \
+	0, /* / */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_connector_SUPPORTS_ORDS /* nothing */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_connector_EXISTS 1
+#define DT_N_INST_0_arduino_header_r3 DT_N_S_connector
+#define DT_N_NODELABEL_arduino_header DT_N_S_connector
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_connector_REG_NUM 0
+#define DT_N_S_connector_RANGES_NUM 0
+#define DT_N_S_connector_FOREACH_RANGE(fn) 
+#define DT_N_S_connector_IRQ_NUM 0
+#define DT_N_S_connector_IRQ_LEVEL 0
+#define DT_N_S_connector_COMPAT_MATCHES_arduino_header_r3 1
+#define DT_N_S_connector_STATUS_okay 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_connector_PINCTRL_NUM 0
+
+/* Generic property macros: */
+#define DT_N_S_connector_P_wakeup_source 0
+#define DT_N_S_connector_P_wakeup_source_EXISTS 1
+#define DT_N_S_connector_P_zephyr_pm_device_runtime_auto 0
+#define DT_N_S_connector_P_zephyr_pm_device_runtime_auto_EXISTS 1
+#define DT_N_S_connector_P_compatible {"arduino-header-r3"}
+#define DT_N_S_connector_P_compatible_IDX_0 "arduino-header-r3"
+#define DT_N_S_connector_P_compatible_IDX_0_STRING_UNQUOTED arduino-header-r3
+#define DT_N_S_connector_P_compatible_IDX_0_STRING_TOKEN arduino_header_r3
+#define DT_N_S_connector_P_compatible_IDX_0_STRING_UPPER_TOKEN ARDUINO_HEADER_R3
+#define DT_N_S_connector_P_compatible_IDX_0_EXISTS 1
+#define DT_N_S_connector_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_connector, compatible, 0)
+#define DT_N_S_connector_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_connector, compatible, 0)
+#define DT_N_S_connector_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_connector, compatible, 0, __VA_ARGS__)
+#define DT_N_S_connector_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_connector, compatible, 0, __VA_ARGS__)
+#define DT_N_S_connector_P_compatible_LEN 1
+#define DT_N_S_connector_P_compatible_EXISTS 1
+#define DT_N_S_connector_P_zephyr_deferred_init 0
+#define DT_N_S_connector_P_zephyr_deferred_init_EXISTS 1
+
+/*
+ * Devicetree node: /entropy_bt_hci
+ *
+ * Node identifier: DT_N_S_entropy_bt_hci
+ *
+ * Binding (compatible = zephyr,bt-hci-entropy):
+ *   $ZEPHYR_BASE/dts/bindings/bluetooth/zephyr,bt-hci-entropy.yaml
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_entropy_bt_hci_PATH "/entropy_bt_hci"
+
+/* Node's name with unit-address: */
+#define DT_N_S_entropy_bt_hci_FULL_NAME "entropy_bt_hci"
+
+/* Node parent (/) identifier: */
+#define DT_N_S_entropy_bt_hci_PARENT DT_N
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_entropy_bt_hci_CHILD_IDX 4
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_entropy_bt_hci_CHILD_NUM 0
+#define DT_N_S_entropy_bt_hci_CHILD_NUM_STATUS_OKAY 0
+#define DT_N_S_entropy_bt_hci_FOREACH_CHILD(fn) 
+#define DT_N_S_entropy_bt_hci_FOREACH_CHILD_SEP(fn, sep) 
+#define DT_N_S_entropy_bt_hci_FOREACH_CHILD_VARGS(fn, ...) 
+#define DT_N_S_entropy_bt_hci_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
+#define DT_N_S_entropy_bt_hci_FOREACH_CHILD_STATUS_OKAY(fn) 
+#define DT_N_S_entropy_bt_hci_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
+#define DT_N_S_entropy_bt_hci_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
+#define DT_N_S_entropy_bt_hci_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 
+
+/* Node's dependency ordinal: */
+#define DT_N_S_entropy_bt_hci_ORD 5
+#define DT_N_S_entropy_bt_hci_ORD_STR_SORTABLE 00005
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_entropy_bt_hci_REQUIRES_ORDS \
+	0, /* / */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_entropy_bt_hci_SUPPORTS_ORDS /* nothing */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_entropy_bt_hci_EXISTS 1
+#define DT_N_INST_0_zephyr_bt_hci_entropy DT_N_S_entropy_bt_hci
+#define DT_N_NODELABEL_rng_hci            DT_N_S_entropy_bt_hci
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_entropy_bt_hci_REG_NUM 0
+#define DT_N_S_entropy_bt_hci_RANGES_NUM 0
+#define DT_N_S_entropy_bt_hci_FOREACH_RANGE(fn) 
+#define DT_N_S_entropy_bt_hci_IRQ_NUM 0
+#define DT_N_S_entropy_bt_hci_IRQ_LEVEL 0
+#define DT_N_S_entropy_bt_hci_COMPAT_MATCHES_zephyr_bt_hci_entropy 1
+#define DT_N_S_entropy_bt_hci_COMPAT_VENDOR_IDX_0_EXISTS 1
+#define DT_N_S_entropy_bt_hci_COMPAT_VENDOR_IDX_0 "Zephyr-specific binding"
+#define DT_N_S_entropy_bt_hci_COMPAT_MODEL_IDX_0_EXISTS 1
+#define DT_N_S_entropy_bt_hci_COMPAT_MODEL_IDX_0 "bt-hci-entropy"
+#define DT_N_S_entropy_bt_hci_STATUS_okay 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_entropy_bt_hci_PINCTRL_NUM 0
+
+/* Generic property macros: */
+#define DT_N_S_entropy_bt_hci_P_wakeup_source 0
+#define DT_N_S_entropy_bt_hci_P_wakeup_source_EXISTS 1
+#define DT_N_S_entropy_bt_hci_P_zephyr_pm_device_runtime_auto 0
+#define DT_N_S_entropy_bt_hci_P_zephyr_pm_device_runtime_auto_EXISTS 1
+#define DT_N_S_entropy_bt_hci_P_status "okay"
+#define DT_N_S_entropy_bt_hci_P_status_STRING_UNQUOTED okay
+#define DT_N_S_entropy_bt_hci_P_status_STRING_TOKEN okay
+#define DT_N_S_entropy_bt_hci_P_status_STRING_UPPER_TOKEN OKAY
+#define DT_N_S_entropy_bt_hci_P_status_IDX_0 "okay"
+#define DT_N_S_entropy_bt_hci_P_status_IDX_0_EXISTS 1
+#define DT_N_S_entropy_bt_hci_P_status_ENUM_IDX 1
+#define DT_N_S_entropy_bt_hci_P_status_ENUM_VAL_okay_EXISTS 1
+#define DT_N_S_entropy_bt_hci_P_status_ENUM_TOKEN okay
+#define DT_N_S_entropy_bt_hci_P_status_ENUM_UPPER_TOKEN OKAY
+#define DT_N_S_entropy_bt_hci_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_entropy_bt_hci, status, 0)
+#define DT_N_S_entropy_bt_hci_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_entropy_bt_hci, status, 0)
+#define DT_N_S_entropy_bt_hci_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_entropy_bt_hci, status, 0, __VA_ARGS__)
+#define DT_N_S_entropy_bt_hci_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_entropy_bt_hci, status, 0, __VA_ARGS__)
+#define DT_N_S_entropy_bt_hci_P_status_LEN 1
+#define DT_N_S_entropy_bt_hci_P_status_EXISTS 1
+#define DT_N_S_entropy_bt_hci_P_compatible {"zephyr,bt-hci-entropy"}
+#define DT_N_S_entropy_bt_hci_P_compatible_IDX_0 "zephyr,bt-hci-entropy"
+#define DT_N_S_entropy_bt_hci_P_compatible_IDX_0_STRING_UNQUOTED zephyr,bt-hci-entropy
+#define DT_N_S_entropy_bt_hci_P_compatible_IDX_0_STRING_TOKEN zephyr_bt_hci_entropy
+#define DT_N_S_entropy_bt_hci_P_compatible_IDX_0_STRING_UPPER_TOKEN ZEPHYR_BT_HCI_ENTROPY
+#define DT_N_S_entropy_bt_hci_P_compatible_IDX_0_EXISTS 1
+#define DT_N_S_entropy_bt_hci_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_entropy_bt_hci, compatible, 0)
+#define DT_N_S_entropy_bt_hci_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_entropy_bt_hci, compatible, 0)
+#define DT_N_S_entropy_bt_hci_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_entropy_bt_hci, compatible, 0, __VA_ARGS__)
+#define DT_N_S_entropy_bt_hci_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_entropy_bt_hci, compatible, 0, __VA_ARGS__)
+#define DT_N_S_entropy_bt_hci_P_compatible_LEN 1
+#define DT_N_S_entropy_bt_hci_P_compatible_EXISTS 1
+#define DT_N_S_entropy_bt_hci_P_zephyr_deferred_init 0
+#define DT_N_S_entropy_bt_hci_P_zephyr_deferred_init_EXISTS 1
+
+/*
+ * Devicetree node: /soc
+ *
+ * Node identifier: DT_N_S_soc
+ */
+
+/* Node's full path: */
+#define DT_N_S_soc_PATH "/soc"
+
+/* Node's name with unit-address: */
+#define DT_N_S_soc_FULL_NAME "soc"
+
+/* Node parent (/) identifier: */
+#define DT_N_S_soc_PARENT DT_N
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_soc_CHILD_IDX 2
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_soc_CHILD_NUM 11
+#define DT_N_S_soc_CHILD_NUM_STATUS_OKAY 9
+#define DT_N_S_soc_FOREACH_CHILD(fn) fn(DT_N_S_soc_S_interrupt_controller_e000e100) fn(DT_N_S_soc_S_timer_e000e010) fn(DT_N_S_soc_S_memory_20000000) fn(DT_N_S_soc_S_peripheral_50000000) fn(DT_N_S_soc_S_crypto_50840000) fn(DT_N_S_soc_S_ctrlap_50006000) fn(DT_N_S_soc_S_gpiote_5000d000) fn(DT_N_S_soc_S_gpiote_40031000) fn(DT_N_S_soc_S_spu_50003000) fn(DT_N_S_soc_S_ficr_ff0000) fn(DT_N_S_soc_S_uicr_ff8000)
+#define DT_N_S_soc_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_soc_S_interrupt_controller_e000e100) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timer_e000e010) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_memory_20000000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_crypto_50840000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_ctrlap_50006000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_gpiote_5000d000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_gpiote_40031000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_spu_50003000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_ficr_ff0000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_uicr_ff8000)
+#define DT_N_S_soc_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_soc_S_interrupt_controller_e000e100, __VA_ARGS__) fn(DT_N_S_soc_S_timer_e000e010, __VA_ARGS__) fn(DT_N_S_soc_S_memory_20000000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000, __VA_ARGS__) fn(DT_N_S_soc_S_crypto_50840000, __VA_ARGS__) fn(DT_N_S_soc_S_ctrlap_50006000, __VA_ARGS__) fn(DT_N_S_soc_S_gpiote_5000d000, __VA_ARGS__) fn(DT_N_S_soc_S_gpiote_40031000, __VA_ARGS__) fn(DT_N_S_soc_S_spu_50003000, __VA_ARGS__) fn(DT_N_S_soc_S_ficr_ff0000, __VA_ARGS__) fn(DT_N_S_soc_S_uicr_ff8000, __VA_ARGS__)
+#define DT_N_S_soc_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_interrupt_controller_e000e100, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timer_e000e010, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_memory_20000000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_crypto_50840000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_ctrlap_50006000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_gpiote_5000d000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_gpiote_40031000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_spu_50003000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_ficr_ff0000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_uicr_ff8000, __VA_ARGS__)
+#define DT_N_S_soc_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_soc_S_interrupt_controller_e000e100) fn(DT_N_S_soc_S_memory_20000000) fn(DT_N_S_soc_S_peripheral_50000000) fn(DT_N_S_soc_S_crypto_50840000) fn(DT_N_S_soc_S_ctrlap_50006000) fn(DT_N_S_soc_S_gpiote_5000d000) fn(DT_N_S_soc_S_spu_50003000) fn(DT_N_S_soc_S_ficr_ff0000) fn(DT_N_S_soc_S_uicr_ff8000)
+#define DT_N_S_soc_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_soc_S_interrupt_controller_e000e100) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_memory_20000000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_crypto_50840000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_ctrlap_50006000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_gpiote_5000d000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_spu_50003000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_ficr_ff0000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_uicr_ff8000)
+#define DT_N_S_soc_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_soc_S_interrupt_controller_e000e100, __VA_ARGS__) fn(DT_N_S_soc_S_memory_20000000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000, __VA_ARGS__) fn(DT_N_S_soc_S_crypto_50840000, __VA_ARGS__) fn(DT_N_S_soc_S_ctrlap_50006000, __VA_ARGS__) fn(DT_N_S_soc_S_gpiote_5000d000, __VA_ARGS__) fn(DT_N_S_soc_S_spu_50003000, __VA_ARGS__) fn(DT_N_S_soc_S_ficr_ff0000, __VA_ARGS__) fn(DT_N_S_soc_S_uicr_ff8000, __VA_ARGS__)
+#define DT_N_S_soc_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_interrupt_controller_e000e100, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_memory_20000000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_crypto_50840000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_ctrlap_50006000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_gpiote_5000d000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_spu_50003000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_ficr_ff0000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_uicr_ff8000, __VA_ARGS__)
+
+/* Node's dependency ordinal: */
+#define DT_N_S_soc_ORD 6
+#define DT_N_S_soc_ORD_STR_SORTABLE 00006
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_soc_REQUIRES_ORDS \
+	0, /* / */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_soc_SUPPORTS_ORDS \
+	7, /* /soc/interrupt-controller@e000e100 */ \
+	8, /* /soc/gpiote@5000d000 */ \
+	9, /* /soc/peripheral@50000000 */ \
+	57, /* /soc/crypto@50840000 */ \
+	58, /* /soc/ctrlap@50006000 */ \
+	59, /* /soc/ficr@ff0000 */ \
+	60, /* /soc/gpiote@40031000 */ \
+	61, /* /soc/memory@20000000 */ \
+	62, /* /soc/spu@50003000 */ \
+	63, /* /soc/timer@e000e010 */ \
+	64, /* /soc/uicr@ff8000 */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_soc_EXISTS 1
+#define DT_N_INST_0_nordic_nrf9161_laca DT_N_S_soc
+#define DT_N_INST_0_nordic_nrf9120      DT_N_S_soc
+#define DT_N_INST_0_nordic_nrf91        DT_N_S_soc
+#define DT_N_INST_0_simple_bus          DT_N_S_soc
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_soc_REG_NUM 0
+#define DT_N_S_soc_RANGES_NUM 0
+#define DT_N_S_soc_FOREACH_RANGE(fn) 
+#define DT_N_S_soc_IRQ_NUM 0
+#define DT_N_S_soc_IRQ_LEVEL 0
+#define DT_N_S_soc_COMPAT_MATCHES_nordic_nrf9161_laca 1
+#define DT_N_S_soc_COMPAT_VENDOR_IDX_0_EXISTS 1
+#define DT_N_S_soc_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
+#define DT_N_S_soc_COMPAT_MODEL_IDX_0_EXISTS 1
+#define DT_N_S_soc_COMPAT_MODEL_IDX_0 "nrf9161-laca"
+#define DT_N_S_soc_COMPAT_MATCHES_nordic_nrf9120 1
+#define DT_N_S_soc_COMPAT_VENDOR_IDX_1_EXISTS 1
+#define DT_N_S_soc_COMPAT_VENDOR_IDX_1 "Nordic Semiconductor"
+#define DT_N_S_soc_COMPAT_MODEL_IDX_1_EXISTS 1
+#define DT_N_S_soc_COMPAT_MODEL_IDX_1 "nrf9120"
+#define DT_N_S_soc_COMPAT_MATCHES_nordic_nrf91 1
+#define DT_N_S_soc_COMPAT_VENDOR_IDX_2_EXISTS 1
+#define DT_N_S_soc_COMPAT_VENDOR_IDX_2 "Nordic Semiconductor"
+#define DT_N_S_soc_COMPAT_MODEL_IDX_2_EXISTS 1
+#define DT_N_S_soc_COMPAT_MODEL_IDX_2 "nrf91"
+#define DT_N_S_soc_COMPAT_MATCHES_simple_bus 1
+#define DT_N_S_soc_STATUS_okay 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_soc_PINCTRL_NUM 0
+
+/* Generic property macros: */
+#define DT_N_S_soc_P_compatible {"nordic,nrf9161-laca", "nordic,nrf9120", "nordic,nrf91", "simple-bus"}
+#define DT_N_S_soc_P_compatible_IDX_0 "nordic,nrf9161-laca"
+#define DT_N_S_soc_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf9161-laca
+#define DT_N_S_soc_P_compatible_IDX_0_STRING_TOKEN nordic_nrf9161_laca
+#define DT_N_S_soc_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF9161_LACA
+#define DT_N_S_soc_P_compatible_IDX_0_EXISTS 1
+#define DT_N_S_soc_P_compatible_IDX_1 "nordic,nrf9120"
+#define DT_N_S_soc_P_compatible_IDX_1_STRING_UNQUOTED nordic,nrf9120
+#define DT_N_S_soc_P_compatible_IDX_1_STRING_TOKEN nordic_nrf9120
+#define DT_N_S_soc_P_compatible_IDX_1_STRING_UPPER_TOKEN NORDIC_NRF9120
+#define DT_N_S_soc_P_compatible_IDX_1_EXISTS 1
+#define DT_N_S_soc_P_compatible_IDX_2 "nordic,nrf91"
+#define DT_N_S_soc_P_compatible_IDX_2_STRING_UNQUOTED nordic,nrf91
+#define DT_N_S_soc_P_compatible_IDX_2_STRING_TOKEN nordic_nrf91
+#define DT_N_S_soc_P_compatible_IDX_2_STRING_UPPER_TOKEN NORDIC_NRF91
+#define DT_N_S_soc_P_compatible_IDX_2_EXISTS 1
+#define DT_N_S_soc_P_compatible_IDX_3 "simple-bus"
+#define DT_N_S_soc_P_compatible_IDX_3_STRING_UNQUOTED simple-bus
+#define DT_N_S_soc_P_compatible_IDX_3_STRING_TOKEN simple_bus
+#define DT_N_S_soc_P_compatible_IDX_3_STRING_UPPER_TOKEN SIMPLE_BUS
+#define DT_N_S_soc_P_compatible_IDX_3_EXISTS 1
+#define DT_N_S_soc_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc, compatible, 0) \
+	fn(DT_N_S_soc, compatible, 1) \
+	fn(DT_N_S_soc, compatible, 2) \
+	fn(DT_N_S_soc, compatible, 3)
+#define DT_N_S_soc_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc, compatible, 0) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc, compatible, 1) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc, compatible, 2) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc, compatible, 3)
+#define DT_N_S_soc_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc, compatible, 0, __VA_ARGS__) \
+	fn(DT_N_S_soc, compatible, 1, __VA_ARGS__) \
+	fn(DT_N_S_soc, compatible, 2, __VA_ARGS__) \
+	fn(DT_N_S_soc, compatible, 3, __VA_ARGS__)
+#define DT_N_S_soc_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc, compatible, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc, compatible, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc, compatible, 2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc, compatible, 3, __VA_ARGS__)
+#define DT_N_S_soc_P_compatible_LEN 4
+#define DT_N_S_soc_P_compatible_EXISTS 1
+#define DT_N_S_soc_P_ranges_EXISTS 1
+
+/*
+ * Devicetree node: /soc/interrupt-controller@e000e100
+ *
+ * Node identifier: DT_N_S_soc_S_interrupt_controller_e000e100
+ *
+ * Binding (compatible = arm,v8m-nvic):
+ *   $ZEPHYR_BASE/dts/bindings/interrupt-controller/arm,v8m-nvic.yaml
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_soc_S_interrupt_controller_e000e100_PATH "/soc/interrupt-controller@e000e100"
+
+/* Node's name with unit-address: */
+#define DT_N_S_soc_S_interrupt_controller_e000e100_FULL_NAME "interrupt-controller@e000e100"
+
+/* Node parent (/soc) identifier: */
+#define DT_N_S_soc_S_interrupt_controller_e000e100_PARENT DT_N_S_soc
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_soc_S_interrupt_controller_e000e100_CHILD_IDX 0
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_soc_S_interrupt_controller_e000e100_CHILD_NUM 0
+#define DT_N_S_soc_S_interrupt_controller_e000e100_CHILD_NUM_STATUS_OKAY 0
+#define DT_N_S_soc_S_interrupt_controller_e000e100_FOREACH_CHILD(fn) 
+#define DT_N_S_soc_S_interrupt_controller_e000e100_FOREACH_CHILD_SEP(fn, sep) 
+#define DT_N_S_soc_S_interrupt_controller_e000e100_FOREACH_CHILD_VARGS(fn, ...) 
+#define DT_N_S_soc_S_interrupt_controller_e000e100_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
+#define DT_N_S_soc_S_interrupt_controller_e000e100_FOREACH_CHILD_STATUS_OKAY(fn) 
+#define DT_N_S_soc_S_interrupt_controller_e000e100_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
+#define DT_N_S_soc_S_interrupt_controller_e000e100_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
+#define DT_N_S_soc_S_interrupt_controller_e000e100_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 
+
+/* Node's dependency ordinal: */
+#define DT_N_S_soc_S_interrupt_controller_e000e100_ORD 7
+#define DT_N_S_soc_S_interrupt_controller_e000e100_ORD_STR_SORTABLE 00007
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_soc_S_interrupt_controller_e000e100_REQUIRES_ORDS \
+	6, /* /soc */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_soc_S_interrupt_controller_e000e100_SUPPORTS_ORDS \
+	8, /* /soc/gpiote@5000d000 */ \
+	12, /* /soc/peripheral@50000000/timer@10000 */ \
+	50, /* /soc/peripheral@50000000/pwm@21000 */ \
+	57, /* /soc/crypto@50840000 */ \
+	60, /* /soc/gpiote@40031000 */ \
+	62, /* /soc/spu@50003000 */ \
+	65, /* /soc/peripheral@50000000/adc@e000 */ \
+	66, /* /soc/peripheral@50000000/clock@5000 */ \
+	68, /* /soc/peripheral@50000000/egu@1b000 */ \
+	69, /* /soc/peripheral@50000000/egu@1c000 */ \
+	70, /* /soc/peripheral@50000000/egu@1d000 */ \
+	71, /* /soc/peripheral@50000000/egu@1e000 */ \
+	72, /* /soc/peripheral@50000000/egu@1f000 */ \
+	73, /* /soc/peripheral@50000000/egu@20000 */ \
+	74, /* /soc/peripheral@50000000/i2c@8000 */ \
+	75, /* /soc/peripheral@50000000/i2c@9000 */ \
+	76, /* /soc/peripheral@50000000/i2c@b000 */ \
+	77, /* /soc/peripheral@50000000/i2s@28000 */ \
+	78, /* /soc/peripheral@50000000/ipc@2a000 */ \
+	79, /* /soc/peripheral@50000000/kmu@39000 */ \
+	80, /* /soc/peripheral@50000000/pdm@26000 */ \
+	81, /* /soc/peripheral@50000000/pwm@22000 */ \
+	82, /* /soc/peripheral@50000000/pwm@23000 */ \
+	83, /* /soc/peripheral@50000000/pwm@24000 */ \
+	85, /* /soc/peripheral@50000000/rtc@14000 */ \
+	86, /* /soc/peripheral@50000000/rtc@15000 */ \
+	87, /* /soc/peripheral@50000000/spi@8000 */ \
+	88, /* /soc/peripheral@50000000/spi@9000 */ \
+	89, /* /soc/peripheral@50000000/spi@a000 */ \
+	90, /* /soc/peripheral@50000000/timer@f000 */ \
+	91, /* /soc/peripheral@50000000/timer@11000 */ \
+	92, /* /soc/peripheral@50000000/uart@8000 */ \
+	93, /* /soc/peripheral@50000000/uart@9000 */ \
+	94, /* /soc/peripheral@50000000/uart@a000 */ \
+	95, /* /soc/peripheral@50000000/uart@b000 */ \
+	97, /* /soc/peripheral@50000000/watchdog@18000 */ \
+	107, /* /soc/peripheral@50000000/i2c@a000 */ \
+	109, /* /soc/peripheral@50000000/power@5000 */ \
+	112, /* /soc/peripheral@50000000/spi@b000 */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_soc_S_interrupt_controller_e000e100_EXISTS 1
+#define DT_N_INST_0_arm_v8m_nvic DT_N_S_soc_S_interrupt_controller_e000e100
+#define DT_N_NODELABEL_nvic      DT_N_S_soc_S_interrupt_controller_e000e100
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_soc_S_interrupt_controller_e000e100_REG_NUM 1
+#define DT_N_S_soc_S_interrupt_controller_e000e100_REG_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_interrupt_controller_e000e100_REG_IDX_0_VAL_ADDRESS 3758153984 /* 0xe000e100 */
+#define DT_N_S_soc_S_interrupt_controller_e000e100_REG_IDX_0_VAL_SIZE 3072 /* 0xc00 */
+#define DT_N_S_soc_S_interrupt_controller_e000e100_RANGES_NUM 0
+#define DT_N_S_soc_S_interrupt_controller_e000e100_FOREACH_RANGE(fn) 
+#define DT_N_S_soc_S_interrupt_controller_e000e100_IRQ_NUM 0
+#define DT_N_S_soc_S_interrupt_controller_e000e100_IRQ_LEVEL 0
+#define DT_N_S_soc_S_interrupt_controller_e000e100_COMPAT_MATCHES_arm_v8m_nvic 1
+#define DT_N_S_soc_S_interrupt_controller_e000e100_COMPAT_VENDOR_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_interrupt_controller_e000e100_COMPAT_VENDOR_IDX_0 "ARM Ltd."
+#define DT_N_S_soc_S_interrupt_controller_e000e100_COMPAT_MODEL_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_interrupt_controller_e000e100_COMPAT_MODEL_IDX_0 "v8m-nvic"
+#define DT_N_S_soc_S_interrupt_controller_e000e100_STATUS_okay 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_soc_S_interrupt_controller_e000e100_PINCTRL_NUM 0
+
+/* Generic property macros: */
+#define DT_N_S_soc_S_interrupt_controller_e000e100_P_interrupt_controller 1
+#define DT_N_S_soc_S_interrupt_controller_e000e100_P_interrupt_controller_EXISTS 1
+#define DT_N_S_soc_S_interrupt_controller_e000e100_P_wakeup_source 0
+#define DT_N_S_soc_S_interrupt_controller_e000e100_P_wakeup_source_EXISTS 1
+#define DT_N_S_soc_S_interrupt_controller_e000e100_P_zephyr_pm_device_runtime_auto 0
+#define DT_N_S_soc_S_interrupt_controller_e000e100_P_zephyr_pm_device_runtime_auto_EXISTS 1
+#define DT_N_S_soc_S_interrupt_controller_e000e100_P_compatible {"arm,v8m-nvic"}
+#define DT_N_S_soc_S_interrupt_controller_e000e100_P_compatible_IDX_0 "arm,v8m-nvic"
+#define DT_N_S_soc_S_interrupt_controller_e000e100_P_compatible_IDX_0_STRING_UNQUOTED arm,v8m-nvic
+#define DT_N_S_soc_S_interrupt_controller_e000e100_P_compatible_IDX_0_STRING_TOKEN arm_v8m_nvic
+#define DT_N_S_soc_S_interrupt_controller_e000e100_P_compatible_IDX_0_STRING_UPPER_TOKEN ARM_V8M_NVIC
+#define DT_N_S_soc_S_interrupt_controller_e000e100_P_compatible_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_interrupt_controller_e000e100_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_interrupt_controller_e000e100, compatible, 0)
+#define DT_N_S_soc_S_interrupt_controller_e000e100_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_interrupt_controller_e000e100, compatible, 0)
+#define DT_N_S_soc_S_interrupt_controller_e000e100_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_interrupt_controller_e000e100, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_interrupt_controller_e000e100_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_interrupt_controller_e000e100, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_interrupt_controller_e000e100_P_compatible_LEN 1
+#define DT_N_S_soc_S_interrupt_controller_e000e100_P_compatible_EXISTS 1
+#define DT_N_S_soc_S_interrupt_controller_e000e100_P_reg {3758153984 /* 0xe000e100 */, 3072 /* 0xc00 */}
+#define DT_N_S_soc_S_interrupt_controller_e000e100_P_reg_IDX_0 3758153984
+#define DT_N_S_soc_S_interrupt_controller_e000e100_P_reg_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_interrupt_controller_e000e100_P_reg_IDX_1 3072
+#define DT_N_S_soc_S_interrupt_controller_e000e100_P_reg_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_interrupt_controller_e000e100_P_reg_EXISTS 1
+#define DT_N_S_soc_S_interrupt_controller_e000e100_P_zephyr_deferred_init 0
+#define DT_N_S_soc_S_interrupt_controller_e000e100_P_zephyr_deferred_init_EXISTS 1
+#define DT_N_S_soc_S_interrupt_controller_e000e100_P_arm_num_irq_priority_bits 3
+#define DT_N_S_soc_S_interrupt_controller_e000e100_P_arm_num_irq_priority_bits_EXISTS 1
+
+/*
+ * Devicetree node: /soc/gpiote@5000d000
+ *
+ * Node identifier: DT_N_S_soc_S_gpiote_5000d000
+ *
+ * Binding (compatible = nordic,nrf-gpiote):
+ *   $ZEPHYR_BASE/dts/bindings/gpio/nordic,nrf-gpiote.yaml
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_soc_S_gpiote_5000d000_PATH "/soc/gpiote@5000d000"
+
+/* Node's name with unit-address: */
+#define DT_N_S_soc_S_gpiote_5000d000_FULL_NAME "gpiote@5000d000"
+
+/* Node parent (/soc) identifier: */
+#define DT_N_S_soc_S_gpiote_5000d000_PARENT DT_N_S_soc
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_soc_S_gpiote_5000d000_CHILD_IDX 6
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_soc_S_gpiote_5000d000_CHILD_NUM 0
+#define DT_N_S_soc_S_gpiote_5000d000_CHILD_NUM_STATUS_OKAY 0
+#define DT_N_S_soc_S_gpiote_5000d000_FOREACH_CHILD(fn) 
+#define DT_N_S_soc_S_gpiote_5000d000_FOREACH_CHILD_SEP(fn, sep) 
+#define DT_N_S_soc_S_gpiote_5000d000_FOREACH_CHILD_VARGS(fn, ...) 
+#define DT_N_S_soc_S_gpiote_5000d000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
+#define DT_N_S_soc_S_gpiote_5000d000_FOREACH_CHILD_STATUS_OKAY(fn) 
+#define DT_N_S_soc_S_gpiote_5000d000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
+#define DT_N_S_soc_S_gpiote_5000d000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
+#define DT_N_S_soc_S_gpiote_5000d000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 
+
+/* Node's dependency ordinal: */
+#define DT_N_S_soc_S_gpiote_5000d000_ORD 8
+#define DT_N_S_soc_S_gpiote_5000d000_ORD_STR_SORTABLE 00008
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_soc_S_gpiote_5000d000_REQUIRES_ORDS \
+	6, /* /soc */ \
+	7, /* /soc/interrupt-controller@e000e100 */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_soc_S_gpiote_5000d000_SUPPORTS_ORDS \
+	10, /* /soc/peripheral@50000000/gpio@842500 */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_soc_S_gpiote_5000d000_EXISTS 1
+#define DT_N_INST_0_nordic_nrf_gpiote DT_N_S_soc_S_gpiote_5000d000
+#define DT_N_NODELABEL_gpiote         DT_N_S_soc_S_gpiote_5000d000
+#define DT_N_NODELABEL_gpiote0        DT_N_S_soc_S_gpiote_5000d000
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_soc_S_gpiote_5000d000_REG_NUM 1
+#define DT_N_S_soc_S_gpiote_5000d000_REG_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_gpiote_5000d000_REG_IDX_0_VAL_ADDRESS 1342230528 /* 0x5000d000 */
+#define DT_N_S_soc_S_gpiote_5000d000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
+#define DT_N_S_soc_S_gpiote_5000d000_RANGES_NUM 0
+#define DT_N_S_soc_S_gpiote_5000d000_FOREACH_RANGE(fn) 
+#define DT_N_S_soc_S_gpiote_5000d000_IRQ_NUM 1
+#define DT_N_S_soc_S_gpiote_5000d000_IRQ_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_gpiote_5000d000_IRQ_IDX_0_VAL_irq 13
+#define DT_N_S_soc_S_gpiote_5000d000_IRQ_IDX_0_VAL_irq_EXISTS 1
+#define DT_N_S_soc_S_gpiote_5000d000_IRQ_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_gpiote_5000d000_IRQ_IDX_0_VAL_priority 5
+#define DT_N_S_soc_S_gpiote_5000d000_IRQ_IDX_0_VAL_priority_EXISTS 1
+#define DT_N_S_soc_S_gpiote_5000d000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100
+#define DT_N_S_soc_S_gpiote_5000d000_IRQ_LEVEL 1
+#define DT_N_S_soc_S_gpiote_5000d000_COMPAT_MATCHES_nordic_nrf_gpiote 1
+#define DT_N_S_soc_S_gpiote_5000d000_COMPAT_VENDOR_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_gpiote_5000d000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
+#define DT_N_S_soc_S_gpiote_5000d000_COMPAT_MODEL_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_gpiote_5000d000_COMPAT_MODEL_IDX_0 "nrf-gpiote"
+#define DT_N_S_soc_S_gpiote_5000d000_STATUS_okay 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_soc_S_gpiote_5000d000_PINCTRL_NUM 0
+
+/* Generic property macros: */
+#define DT_N_S_soc_S_gpiote_5000d000_P_wakeup_source 0
+#define DT_N_S_soc_S_gpiote_5000d000_P_wakeup_source_EXISTS 1
+#define DT_N_S_soc_S_gpiote_5000d000_P_zephyr_pm_device_runtime_auto 0
+#define DT_N_S_soc_S_gpiote_5000d000_P_zephyr_pm_device_runtime_auto_EXISTS 1
+#define DT_N_S_soc_S_gpiote_5000d000_P_status "okay"
+#define DT_N_S_soc_S_gpiote_5000d000_P_status_STRING_UNQUOTED okay
+#define DT_N_S_soc_S_gpiote_5000d000_P_status_STRING_TOKEN okay
+#define DT_N_S_soc_S_gpiote_5000d000_P_status_STRING_UPPER_TOKEN OKAY
+#define DT_N_S_soc_S_gpiote_5000d000_P_status_IDX_0 "okay"
+#define DT_N_S_soc_S_gpiote_5000d000_P_status_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_gpiote_5000d000_P_status_ENUM_IDX 1
+#define DT_N_S_soc_S_gpiote_5000d000_P_status_ENUM_VAL_okay_EXISTS 1
+#define DT_N_S_soc_S_gpiote_5000d000_P_status_ENUM_TOKEN okay
+#define DT_N_S_soc_S_gpiote_5000d000_P_status_ENUM_UPPER_TOKEN OKAY
+#define DT_N_S_soc_S_gpiote_5000d000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_gpiote_5000d000, status, 0)
+#define DT_N_S_soc_S_gpiote_5000d000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_gpiote_5000d000, status, 0)
+#define DT_N_S_soc_S_gpiote_5000d000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_gpiote_5000d000, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_gpiote_5000d000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_gpiote_5000d000, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_gpiote_5000d000_P_status_LEN 1
+#define DT_N_S_soc_S_gpiote_5000d000_P_status_EXISTS 1
+#define DT_N_S_soc_S_gpiote_5000d000_P_compatible {"nordic,nrf-gpiote"}
+#define DT_N_S_soc_S_gpiote_5000d000_P_compatible_IDX_0 "nordic,nrf-gpiote"
+#define DT_N_S_soc_S_gpiote_5000d000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-gpiote
+#define DT_N_S_soc_S_gpiote_5000d000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_gpiote
+#define DT_N_S_soc_S_gpiote_5000d000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_GPIOTE
+#define DT_N_S_soc_S_gpiote_5000d000_P_compatible_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_gpiote_5000d000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_gpiote_5000d000, compatible, 0)
+#define DT_N_S_soc_S_gpiote_5000d000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_gpiote_5000d000, compatible, 0)
+#define DT_N_S_soc_S_gpiote_5000d000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_gpiote_5000d000, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_gpiote_5000d000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_gpiote_5000d000, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_gpiote_5000d000_P_compatible_LEN 1
+#define DT_N_S_soc_S_gpiote_5000d000_P_compatible_EXISTS 1
+#define DT_N_S_soc_S_gpiote_5000d000_P_reg {1342230528 /* 0x5000d000 */, 4096 /* 0x1000 */}
+#define DT_N_S_soc_S_gpiote_5000d000_P_reg_IDX_0 1342230528
+#define DT_N_S_soc_S_gpiote_5000d000_P_reg_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_gpiote_5000d000_P_reg_IDX_1 4096
+#define DT_N_S_soc_S_gpiote_5000d000_P_reg_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_gpiote_5000d000_P_reg_EXISTS 1
+#define DT_N_S_soc_S_gpiote_5000d000_P_interrupts {13 /* 0xd */, 5 /* 0x5 */}
+#define DT_N_S_soc_S_gpiote_5000d000_P_interrupts_IDX_0 13
+#define DT_N_S_soc_S_gpiote_5000d000_P_interrupts_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_gpiote_5000d000_P_interrupts_IDX_1 5
+#define DT_N_S_soc_S_gpiote_5000d000_P_interrupts_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_gpiote_5000d000_P_interrupts_EXISTS 1
+#define DT_N_S_soc_S_gpiote_5000d000_P_zephyr_deferred_init 0
+#define DT_N_S_soc_S_gpiote_5000d000_P_zephyr_deferred_init_EXISTS 1
+#define DT_N_S_soc_S_gpiote_5000d000_P_instance 0
+#define DT_N_S_soc_S_gpiote_5000d000_P_instance_EXISTS 1
+
+/*
+ * Devicetree node: /soc/peripheral@50000000
+ *
+ * Node identifier: DT_N_S_soc_S_peripheral_50000000
+ */
+
+/* Node's full path: */
+#define DT_N_S_soc_S_peripheral_50000000_PATH "/soc/peripheral@50000000"
+
+/* Node's name with unit-address: */
+#define DT_N_S_soc_S_peripheral_50000000_FULL_NAME "peripheral@50000000"
+
+/* Node parent (/soc) identifier: */
+#define DT_N_S_soc_S_peripheral_50000000_PARENT DT_N_S_soc
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_soc_S_peripheral_50000000_CHILD_IDX 3
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_soc_S_peripheral_50000000_CHILD_NUM 40
+#define DT_N_S_soc_S_peripheral_50000000_CHILD_NUM_STATUS_OKAY 22
+#define DT_N_S_soc_S_peripheral_50000000_FOREACH_CHILD(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000) fn(DT_N_S_soc_S_peripheral_50000000_S_adc_e000) fn(DT_N_S_soc_S_peripheral_50000000_S_dppic_17000) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1b000) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1c000) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1d000) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1e000) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1f000) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_20000) fn(DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000) fn(DT_N_S_soc_S_peripheral_50000000_S_i2s_28000) fn(DT_N_S_soc_S_peripheral_50000000_S_kmu_39000) fn(DT_N_S_soc_S_peripheral_50000000_S_pdm_26000) fn(DT_N_S_soc_S_peripheral_50000000_S_regulator_4000) fn(DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_8000) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_9000) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_a000) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_b000) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_8000) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_9000) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_b000) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_8000) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_9000) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_a000) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_21000) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_22000) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_23000) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_24000) fn(DT_N_S_soc_S_peripheral_50000000_S_gpio_842500) fn(DT_N_S_soc_S_peripheral_50000000_S_rtc_14000) fn(DT_N_S_soc_S_peripheral_50000000_S_rtc_15000) fn(DT_N_S_soc_S_peripheral_50000000_S_clock_5000) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000) fn(DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000) fn(DT_N_S_soc_S_peripheral_50000000_S_timer_f000) fn(DT_N_S_soc_S_peripheral_50000000_S_timer_10000) fn(DT_N_S_soc_S_peripheral_50000000_S_timer_11000)
+#define DT_N_S_soc_S_peripheral_50000000_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_adc_e000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_dppic_17000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1b000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1c000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1d000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1e000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1f000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_egu_20000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_i2s_28000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_kmu_39000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_pdm_26000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_regulator_4000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_uart_8000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_uart_9000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_uart_a000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_uart_b000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_8000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_9000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_b000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_spi_8000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_spi_9000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_spi_a000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_21000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_22000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_23000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_24000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_gpio_842500) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_rtc_14000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_rtc_15000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_clock_5000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_timer_f000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_timer_10000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_timer_11000)
+#define DT_N_S_soc_S_peripheral_50000000_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_adc_e000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_dppic_17000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1b000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1c000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1d000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1e000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1f000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_20000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_i2s_28000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_kmu_39000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_pdm_26000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_regulator_4000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_8000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_9000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_a000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_b000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_8000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_9000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_b000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_8000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_9000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_a000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_21000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_22000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_23000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_24000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_gpio_842500, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_rtc_14000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_rtc_15000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_clock_5000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_timer_f000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_timer_10000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_timer_11000, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_adc_e000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_dppic_17000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1b000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1c000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1d000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1e000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1f000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_egu_20000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_i2s_28000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_kmu_39000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_pdm_26000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_regulator_4000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_uart_8000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_uart_9000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_uart_a000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_uart_b000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_8000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_9000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_b000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_spi_8000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_spi_9000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_spi_a000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_21000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_22000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_23000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_24000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_gpio_842500, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_rtc_14000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_rtc_15000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_clock_5000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_timer_f000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_timer_10000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_timer_11000, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000) fn(DT_N_S_soc_S_peripheral_50000000_S_adc_e000) fn(DT_N_S_soc_S_peripheral_50000000_S_dppic_17000) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1b000) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1c000) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1d000) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1e000) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1f000) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_20000) fn(DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000) fn(DT_N_S_soc_S_peripheral_50000000_S_kmu_39000) fn(DT_N_S_soc_S_peripheral_50000000_S_regulator_4000) fn(DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_8000) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_9000) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_21000) fn(DT_N_S_soc_S_peripheral_50000000_S_gpio_842500) fn(DT_N_S_soc_S_peripheral_50000000_S_clock_5000) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000) fn(DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000)
+#define DT_N_S_soc_S_peripheral_50000000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_adc_e000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_dppic_17000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1b000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1c000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1d000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1e000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1f000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_egu_20000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_kmu_39000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_regulator_4000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_uart_8000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_uart_9000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_21000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_gpio_842500) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_clock_5000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000)
+#define DT_N_S_soc_S_peripheral_50000000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_adc_e000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_dppic_17000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1b000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1c000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1d000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1e000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1f000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_20000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_kmu_39000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_regulator_4000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_8000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_9000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_21000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_gpio_842500, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_clock_5000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_adc_e000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_dppic_17000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1b000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1c000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1d000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1e000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1f000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_egu_20000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_kmu_39000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_regulator_4000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_uart_8000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_uart_9000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_21000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_gpio_842500, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_clock_5000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000, __VA_ARGS__)
+
+/* Node's dependency ordinal: */
+#define DT_N_S_soc_S_peripheral_50000000_ORD 9
+#define DT_N_S_soc_S_peripheral_50000000_ORD_STR_SORTABLE 00009
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_soc_S_peripheral_50000000_REQUIRES_ORDS \
+	6, /* /soc */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_soc_S_peripheral_50000000_SUPPORTS_ORDS \
+	10, /* /soc/peripheral@50000000/gpio@842500 */ \
+	12, /* /soc/peripheral@50000000/timer@10000 */ \
+	50, /* /soc/peripheral@50000000/pwm@21000 */ \
+	65, /* /soc/peripheral@50000000/adc@e000 */ \
+	66, /* /soc/peripheral@50000000/clock@5000 */ \
+	67, /* /soc/peripheral@50000000/dppic@17000 */ \
+	68, /* /soc/peripheral@50000000/egu@1b000 */ \
+	69, /* /soc/peripheral@50000000/egu@1c000 */ \
+	70, /* /soc/peripheral@50000000/egu@1d000 */ \
+	71, /* /soc/peripheral@50000000/egu@1e000 */ \
+	72, /* /soc/peripheral@50000000/egu@1f000 */ \
+	73, /* /soc/peripheral@50000000/egu@20000 */ \
+	74, /* /soc/peripheral@50000000/i2c@8000 */ \
+	75, /* /soc/peripheral@50000000/i2c@9000 */ \
+	76, /* /soc/peripheral@50000000/i2c@b000 */ \
+	77, /* /soc/peripheral@50000000/i2s@28000 */ \
+	78, /* /soc/peripheral@50000000/ipc@2a000 */ \
+	79, /* /soc/peripheral@50000000/kmu@39000 */ \
+	80, /* /soc/peripheral@50000000/pdm@26000 */ \
+	81, /* /soc/peripheral@50000000/pwm@22000 */ \
+	82, /* /soc/peripheral@50000000/pwm@23000 */ \
+	83, /* /soc/peripheral@50000000/pwm@24000 */ \
+	84, /* /soc/peripheral@50000000/regulator@4000 */ \
+	85, /* /soc/peripheral@50000000/rtc@14000 */ \
+	86, /* /soc/peripheral@50000000/rtc@15000 */ \
+	87, /* /soc/peripheral@50000000/spi@8000 */ \
+	88, /* /soc/peripheral@50000000/spi@9000 */ \
+	89, /* /soc/peripheral@50000000/spi@a000 */ \
+	90, /* /soc/peripheral@50000000/timer@f000 */ \
+	91, /* /soc/peripheral@50000000/timer@11000 */ \
+	92, /* /soc/peripheral@50000000/uart@8000 */ \
+	93, /* /soc/peripheral@50000000/uart@9000 */ \
+	94, /* /soc/peripheral@50000000/uart@a000 */ \
+	95, /* /soc/peripheral@50000000/uart@b000 */ \
+	96, /* /soc/peripheral@50000000/vmc@3a000 */ \
+	97, /* /soc/peripheral@50000000/watchdog@18000 */ \
+	98, /* /soc/peripheral@50000000/flash-controller@39000 */ \
+	107, /* /soc/peripheral@50000000/i2c@a000 */ \
+	109, /* /soc/peripheral@50000000/power@5000 */ \
+	112, /* /soc/peripheral@50000000/spi@b000 */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_soc_S_peripheral_50000000_EXISTS 1
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_soc_S_peripheral_50000000_REG_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_RANGES_NUM 1
+#define DT_N_S_soc_S_peripheral_50000000_RANGES_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_RANGES_IDX_0_VAL_CHILD_BUS_ADDRESS 0 /* 0x0 */
+#define DT_N_S_soc_S_peripheral_50000000_RANGES_IDX_0_VAL_PARENT_BUS_ADDRESS 1342177280 /* 0x50000000 */
+#define DT_N_S_soc_S_peripheral_50000000_RANGES_IDX_0_VAL_LENGTH 268435456 /* 0x10000000 */
+#define DT_N_S_soc_S_peripheral_50000000_FOREACH_RANGE(fn) fn(DT_N_S_soc_S_peripheral_50000000, 0)
+#define DT_N_S_soc_S_peripheral_50000000_IRQ_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_IRQ_LEVEL 0
+#define DT_N_S_soc_S_peripheral_50000000_STATUS_okay 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_soc_S_peripheral_50000000_PINCTRL_NUM 0
+
+/* Generic property macros: */
+#define DT_N_S_soc_S_peripheral_50000000_P_ranges_EXISTS 1
+
+/*
+ * Devicetree node: /soc/peripheral@50000000/gpio@842500
+ *
+ * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_gpio_842500
+ *
+ * Binding (compatible = nordic,nrf-gpio):
+ *   $ZEPHYR_BASE/dts/bindings/gpio/nordic,nrf-gpio.yaml
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_PATH "/soc/peripheral@50000000/gpio@842500"
+
+/* Node's name with unit-address: */
+#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_FULL_NAME "gpio@842500"
+
+/* Node parent (/soc/peripheral@50000000) identifier: */
+#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_PARENT DT_N_S_soc_S_peripheral_50000000
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_CHILD_IDX 31
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_CHILD_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_CHILD_NUM_STATUS_OKAY 0
+#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_FOREACH_CHILD(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_FOREACH_CHILD_SEP(fn, sep) 
+#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_FOREACH_CHILD_VARGS(fn, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_FOREACH_CHILD_STATUS_OKAY(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
+#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 
+
+/* Node's dependency ordinal: */
+#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_ORD 10
+#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_ORD_STR_SORTABLE 00010
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_REQUIRES_ORDS \
+	8, /* /soc/gpiote@5000d000 */ \
+	9, /* /soc/peripheral@50000000 */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_SUPPORTS_ORDS \
+	11, /* /gpio-reset */ \
+	14, /* /buttons */ \
+	15, /* /buttons/button_0 */ \
+	16, /* /buttons/button_1 */ \
+	17, /* /buttons/button_2 */ \
+	18, /* /buttons/button_3 */ \
+	22, /* /leds */ \
+	23, /* /leds/led_0 */ \
+	24, /* /leds/led_1 */ \
+	25, /* /leds/led_2 */ \
+	26, /* /leds/led_3 */ \
+	108, /* /soc/peripheral@50000000/i2c@a000/pcal6408a@21 */ \
+	112, /* /soc/peripheral@50000000/spi@b000 */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_EXISTS 1
+#define DT_N_INST_0_nordic_nrf_gpio DT_N_S_soc_S_peripheral_50000000_S_gpio_842500
+#define DT_N_NODELABEL_gpio0        DT_N_S_soc_S_peripheral_50000000_S_gpio_842500
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_REG_NUM 1
+#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_REG_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_REG_IDX_0_VAL_ADDRESS 1350837504 /* 0x50842500 */
+#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_REG_IDX_0_VAL_SIZE 768 /* 0x300 */
+#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_RANGES_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_FOREACH_RANGE(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_IRQ_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_IRQ_LEVEL 0
+#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_COMPAT_MATCHES_nordic_nrf_gpio 1
+#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_COMPAT_VENDOR_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
+#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_COMPAT_MODEL_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_COMPAT_MODEL_IDX_0 "nrf-gpio"
+#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_STATUS_okay 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_PINCTRL_NUM 0
+
+/* Generic property macros: */
+#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_gpio_controller 1
+#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_gpio_controller_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_ngpios 32
+#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_ngpios_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_wakeup_source 0
+#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_wakeup_source_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_zephyr_pm_device_runtime_auto 0
+#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_zephyr_pm_device_runtime_auto_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_status "okay"
+#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_status_STRING_UNQUOTED okay
+#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_status_STRING_TOKEN okay
+#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_status_STRING_UPPER_TOKEN OKAY
+#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_status_IDX_0 "okay"
+#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_status_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_status_ENUM_IDX 1
+#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_status_ENUM_VAL_okay_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_status_ENUM_TOKEN okay
+#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_status_ENUM_UPPER_TOKEN OKAY
+#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_gpio_842500, status, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_gpio_842500, status, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_gpio_842500, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_gpio_842500, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_status_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_status_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_compatible {"nordic,nrf-gpio"}
+#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_compatible_IDX_0 "nordic,nrf-gpio"
+#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-gpio
+#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_gpio
+#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_GPIO
+#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_compatible_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_gpio_842500, compatible, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_gpio_842500, compatible, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_gpio_842500, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_gpio_842500, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_compatible_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_compatible_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_reg {8660224 /* 0x842500 */, 768 /* 0x300 */}
+#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_reg_IDX_0 8660224
+#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_reg_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_reg_IDX_1 768
+#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_reg_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_reg_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_zephyr_deferred_init 0
+#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_zephyr_deferred_init_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_gpiote_instance DT_N_S_soc_S_gpiote_5000d000
+#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_gpiote_instance_IDX_0 DT_N_S_soc_S_gpiote_5000d000
+#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_gpiote_instance_IDX_0_PH DT_N_S_soc_S_gpiote_5000d000
+#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_gpiote_instance_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_gpiote_instance_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_gpio_842500, gpiote_instance, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_gpiote_instance_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_gpio_842500, gpiote_instance, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_gpiote_instance_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_gpio_842500, gpiote_instance, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_gpiote_instance_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_gpio_842500, gpiote_instance, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_gpiote_instance_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_gpiote_instance_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_port 0
+#define DT_N_S_soc_S_peripheral_50000000_S_gpio_842500_P_port_EXISTS 1
+
+/*
+ * Devicetree node: /gpio-reset
+ *
+ * Node identifier: DT_N_S_gpio_reset
+ *
+ * Binding (compatible = nordic,nrf9161dk-nrf5340-reset):
+ *   $ZEPHYR_BASE/boards/nordic/nrf9161dk/dts/bindings/nordic,nrf9161dk-nrf5340-reset.yaml
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_gpio_reset_PATH "/gpio-reset"
+
+/* Node's name with unit-address: */
+#define DT_N_S_gpio_reset_FULL_NAME "gpio-reset"
+
+/* Node parent (/) identifier: */
+#define DT_N_S_gpio_reset_PARENT DT_N
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_gpio_reset_CHILD_IDX 10
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_gpio_reset_CHILD_NUM 0
+#define DT_N_S_gpio_reset_CHILD_NUM_STATUS_OKAY 0
+#define DT_N_S_gpio_reset_FOREACH_CHILD(fn) 
+#define DT_N_S_gpio_reset_FOREACH_CHILD_SEP(fn, sep) 
+#define DT_N_S_gpio_reset_FOREACH_CHILD_VARGS(fn, ...) 
+#define DT_N_S_gpio_reset_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
+#define DT_N_S_gpio_reset_FOREACH_CHILD_STATUS_OKAY(fn) 
+#define DT_N_S_gpio_reset_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
+#define DT_N_S_gpio_reset_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
+#define DT_N_S_gpio_reset_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 
+
+/* Node's dependency ordinal: */
+#define DT_N_S_gpio_reset_ORD 11
+#define DT_N_S_gpio_reset_ORD_STR_SORTABLE 00011
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_gpio_reset_REQUIRES_ORDS \
+	0, /* / */ \
+	10, /* /soc/peripheral@50000000/gpio@842500 */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_gpio_reset_SUPPORTS_ORDS /* nothing */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_gpio_reset_EXISTS 1
+#define DT_N_INST_0_nordic_nrf9161dk_nrf5340_reset DT_N_S_gpio_reset
+#define DT_N_NODELABEL_nrf5340_reset               DT_N_S_gpio_reset
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_gpio_reset_REG_NUM 0
+#define DT_N_S_gpio_reset_RANGES_NUM 0
+#define DT_N_S_gpio_reset_FOREACH_RANGE(fn) 
+#define DT_N_S_gpio_reset_IRQ_NUM 0
+#define DT_N_S_gpio_reset_IRQ_LEVEL 0
+#define DT_N_S_gpio_reset_COMPAT_MATCHES_nordic_nrf9161dk_nrf5340_reset 1
+#define DT_N_S_gpio_reset_COMPAT_VENDOR_IDX_0_EXISTS 1
+#define DT_N_S_gpio_reset_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
+#define DT_N_S_gpio_reset_COMPAT_MODEL_IDX_0_EXISTS 1
+#define DT_N_S_gpio_reset_COMPAT_MODEL_IDX_0 "nrf9161dk-nrf5340-reset"
+#define DT_N_S_gpio_reset_STATUS_disabled 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_gpio_reset_PINCTRL_NUM 0
+
+/* Generic property macros: */
+#define DT_N_S_gpio_reset_P_wakeup_source 0
+#define DT_N_S_gpio_reset_P_wakeup_source_EXISTS 1
+#define DT_N_S_gpio_reset_P_zephyr_pm_device_runtime_auto 0
+#define DT_N_S_gpio_reset_P_zephyr_pm_device_runtime_auto_EXISTS 1
+#define DT_N_S_gpio_reset_P_status "disabled"
+#define DT_N_S_gpio_reset_P_status_STRING_UNQUOTED disabled
+#define DT_N_S_gpio_reset_P_status_STRING_TOKEN disabled
+#define DT_N_S_gpio_reset_P_status_STRING_UPPER_TOKEN DISABLED
+#define DT_N_S_gpio_reset_P_status_IDX_0 "disabled"
+#define DT_N_S_gpio_reset_P_status_IDX_0_EXISTS 1
+#define DT_N_S_gpio_reset_P_status_ENUM_IDX 2
+#define DT_N_S_gpio_reset_P_status_ENUM_VAL_disabled_EXISTS 1
+#define DT_N_S_gpio_reset_P_status_ENUM_TOKEN disabled
+#define DT_N_S_gpio_reset_P_status_ENUM_UPPER_TOKEN DISABLED
+#define DT_N_S_gpio_reset_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_gpio_reset, status, 0)
+#define DT_N_S_gpio_reset_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_gpio_reset, status, 0)
+#define DT_N_S_gpio_reset_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_gpio_reset, status, 0, __VA_ARGS__)
+#define DT_N_S_gpio_reset_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_gpio_reset, status, 0, __VA_ARGS__)
+#define DT_N_S_gpio_reset_P_status_LEN 1
+#define DT_N_S_gpio_reset_P_status_EXISTS 1
+#define DT_N_S_gpio_reset_P_compatible {"nordic,nrf9161dk-nrf5340-reset"}
+#define DT_N_S_gpio_reset_P_compatible_IDX_0 "nordic,nrf9161dk-nrf5340-reset"
+#define DT_N_S_gpio_reset_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf9161dk-nrf5340-reset
+#define DT_N_S_gpio_reset_P_compatible_IDX_0_STRING_TOKEN nordic_nrf9161dk_nrf5340_reset
+#define DT_N_S_gpio_reset_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF9161DK_NRF5340_RESET
+#define DT_N_S_gpio_reset_P_compatible_IDX_0_EXISTS 1
+#define DT_N_S_gpio_reset_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_gpio_reset, compatible, 0)
+#define DT_N_S_gpio_reset_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_gpio_reset, compatible, 0)
+#define DT_N_S_gpio_reset_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_gpio_reset, compatible, 0, __VA_ARGS__)
+#define DT_N_S_gpio_reset_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_gpio_reset, compatible, 0, __VA_ARGS__)
+#define DT_N_S_gpio_reset_P_compatible_LEN 1
+#define DT_N_S_gpio_reset_P_compatible_EXISTS 1
+#define DT_N_S_gpio_reset_P_zephyr_deferred_init 0
+#define DT_N_S_gpio_reset_P_zephyr_deferred_init_EXISTS 1
+#define DT_N_S_gpio_reset_P_gpios_IDX_0_EXISTS 1
+#define DT_N_S_gpio_reset_P_gpios_IDX_0_PH DT_N_S_soc_S_peripheral_50000000_S_gpio_842500
+#define DT_N_S_gpio_reset_P_gpios_IDX_0_VAL_pin 21
+#define DT_N_S_gpio_reset_P_gpios_IDX_0_VAL_pin_EXISTS 1
+#define DT_N_S_gpio_reset_P_gpios_IDX_0_VAL_flags 1
+#define DT_N_S_gpio_reset_P_gpios_IDX_0_VAL_flags_EXISTS 1
+#define DT_N_S_gpio_reset_P_gpios_FOREACH_PROP_ELEM(fn) fn(DT_N_S_gpio_reset, gpios, 0)
+#define DT_N_S_gpio_reset_P_gpios_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_gpio_reset, gpios, 0)
+#define DT_N_S_gpio_reset_P_gpios_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_gpio_reset, gpios, 0, __VA_ARGS__)
+#define DT_N_S_gpio_reset_P_gpios_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_gpio_reset, gpios, 0, __VA_ARGS__)
+#define DT_N_S_gpio_reset_P_gpios_LEN 1
+#define DT_N_S_gpio_reset_P_gpios_EXISTS 1
+
+/*
+ * Devicetree node: /soc/peripheral@50000000/timer@10000
+ *
+ * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_timer_10000
+ *
+ * Binding (compatible = nordic,nrf-timer):
+ *   $ZEPHYR_BASE/dts/bindings/timer/nordic,nrf-timer.yaml
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_PATH "/soc/peripheral@50000000/timer@10000"
+
+/* Node's name with unit-address: */
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_FULL_NAME "timer@10000"
+
+/* Node parent (/soc/peripheral@50000000) identifier: */
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_PARENT DT_N_S_soc_S_peripheral_50000000
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_CHILD_IDX 38
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_CHILD_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_CHILD_NUM_STATUS_OKAY 0
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_FOREACH_CHILD(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_FOREACH_CHILD_SEP(fn, sep) 
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_FOREACH_CHILD_VARGS(fn, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_FOREACH_CHILD_STATUS_OKAY(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 
+
+/* Node's dependency ordinal: */
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_ORD 12
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_ORD_STR_SORTABLE 00012
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_REQUIRES_ORDS \
+	7, /* /soc/interrupt-controller@e000e100 */ \
+	9, /* /soc/peripheral@50000000 */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_SUPPORTS_ORDS \
+	13, /* /sw-pwm */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_EXISTS 1
+#define DT_N_INST_1_nordic_nrf_timer DT_N_S_soc_S_peripheral_50000000_S_timer_10000
+#define DT_N_NODELABEL_timer1        DT_N_S_soc_S_peripheral_50000000_S_timer_10000
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_REG_NUM 1
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_REG_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_REG_IDX_0_VAL_ADDRESS 1342242816 /* 0x50010000 */
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_RANGES_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_FOREACH_RANGE(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_IRQ_NUM 1
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_IRQ_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_IRQ_IDX_0_VAL_irq 16
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_IRQ_IDX_0_VAL_irq_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_IRQ_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_IRQ_IDX_0_VAL_priority 1
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_IRQ_IDX_0_VAL_priority_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_IRQ_LEVEL 1
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_COMPAT_MATCHES_nordic_nrf_timer 1
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_COMPAT_VENDOR_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_COMPAT_MODEL_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_COMPAT_MODEL_IDX_0 "nrf-timer"
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_STATUS_disabled 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_PINCTRL_NUM 0
+
+/* Generic property macros: */
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_wakeup_source 0
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_wakeup_source_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_zephyr_pm_device_runtime_auto 0
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_zephyr_pm_device_runtime_auto_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_status "disabled"
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_status_STRING_UNQUOTED disabled
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_status_STRING_TOKEN disabled
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_status_STRING_UPPER_TOKEN DISABLED
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_status_IDX_0 "disabled"
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_status_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_status_ENUM_IDX 2
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_status_ENUM_VAL_disabled_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_status_ENUM_TOKEN disabled
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_status_ENUM_UPPER_TOKEN DISABLED
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_timer_10000, status, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_timer_10000, status, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_timer_10000, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_timer_10000, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_status_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_status_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_compatible {"nordic,nrf-timer"}
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_compatible_IDX_0 "nordic,nrf-timer"
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-timer
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_timer
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_TIMER
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_compatible_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_timer_10000, compatible, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_timer_10000, compatible, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_timer_10000, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_timer_10000, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_compatible_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_compatible_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_reg {65536 /* 0x10000 */, 4096 /* 0x1000 */}
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_reg_IDX_0 65536
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_reg_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_reg_IDX_1 4096
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_reg_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_reg_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_interrupts {16 /* 0x10 */, 1 /* 0x1 */}
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_interrupts_IDX_0 16
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_interrupts_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_interrupts_IDX_1 1
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_interrupts_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_interrupts_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_zephyr_deferred_init 0
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_zephyr_deferred_init_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_cc_num 6
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_cc_num_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_max_bit_width 32
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_max_bit_width_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_max_frequency 16000000
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_max_frequency_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_prescaler 0
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_prescaler_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_zli 0
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_10000_P_zli_EXISTS 1
+
+/*
+ * Devicetree node: /sw-pwm
+ *
+ * Node identifier: DT_N_S_sw_pwm
+ *
+ * Binding (compatible = nordic,nrf-sw-pwm):
+ *   $ZEPHYR_BASE/dts/bindings/pwm/nordic,nrf-sw-pwm.yaml
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_sw_pwm_PATH "/sw-pwm"
+
+/* Node's name with unit-address: */
+#define DT_N_S_sw_pwm_FULL_NAME "sw-pwm"
+
+/* Node parent (/) identifier: */
+#define DT_N_S_sw_pwm_PARENT DT_N
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_sw_pwm_CHILD_IDX 5
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_sw_pwm_CHILD_NUM 0
+#define DT_N_S_sw_pwm_CHILD_NUM_STATUS_OKAY 0
+#define DT_N_S_sw_pwm_FOREACH_CHILD(fn) 
+#define DT_N_S_sw_pwm_FOREACH_CHILD_SEP(fn, sep) 
+#define DT_N_S_sw_pwm_FOREACH_CHILD_VARGS(fn, ...) 
+#define DT_N_S_sw_pwm_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
+#define DT_N_S_sw_pwm_FOREACH_CHILD_STATUS_OKAY(fn) 
+#define DT_N_S_sw_pwm_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
+#define DT_N_S_sw_pwm_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
+#define DT_N_S_sw_pwm_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 
+
+/* Node's dependency ordinal: */
+#define DT_N_S_sw_pwm_ORD 13
+#define DT_N_S_sw_pwm_ORD_STR_SORTABLE 00013
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_sw_pwm_REQUIRES_ORDS \
+	0, /* / */ \
+	12, /* /soc/peripheral@50000000/timer@10000 */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_sw_pwm_SUPPORTS_ORDS /* nothing */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_sw_pwm_EXISTS 1
+#define DT_N_INST_0_nordic_nrf_sw_pwm DT_N_S_sw_pwm
+#define DT_N_NODELABEL_sw_pwm         DT_N_S_sw_pwm
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_sw_pwm_REG_NUM 0
+#define DT_N_S_sw_pwm_RANGES_NUM 0
+#define DT_N_S_sw_pwm_FOREACH_RANGE(fn) 
+#define DT_N_S_sw_pwm_IRQ_NUM 0
+#define DT_N_S_sw_pwm_IRQ_LEVEL 0
+#define DT_N_S_sw_pwm_COMPAT_MATCHES_nordic_nrf_sw_pwm 1
+#define DT_N_S_sw_pwm_COMPAT_VENDOR_IDX_0_EXISTS 1
+#define DT_N_S_sw_pwm_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
+#define DT_N_S_sw_pwm_COMPAT_MODEL_IDX_0_EXISTS 1
+#define DT_N_S_sw_pwm_COMPAT_MODEL_IDX_0 "nrf-sw-pwm"
+#define DT_N_S_sw_pwm_STATUS_disabled 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_sw_pwm_PINCTRL_NUM 0
+
+/* Generic property macros: */
+#define DT_N_S_sw_pwm_P_wakeup_source 0
+#define DT_N_S_sw_pwm_P_wakeup_source_EXISTS 1
+#define DT_N_S_sw_pwm_P_zephyr_pm_device_runtime_auto 0
+#define DT_N_S_sw_pwm_P_zephyr_pm_device_runtime_auto_EXISTS 1
+#define DT_N_S_sw_pwm_P_status "disabled"
+#define DT_N_S_sw_pwm_P_status_STRING_UNQUOTED disabled
+#define DT_N_S_sw_pwm_P_status_STRING_TOKEN disabled
+#define DT_N_S_sw_pwm_P_status_STRING_UPPER_TOKEN DISABLED
+#define DT_N_S_sw_pwm_P_status_IDX_0 "disabled"
+#define DT_N_S_sw_pwm_P_status_IDX_0_EXISTS 1
+#define DT_N_S_sw_pwm_P_status_ENUM_IDX 2
+#define DT_N_S_sw_pwm_P_status_ENUM_VAL_disabled_EXISTS 1
+#define DT_N_S_sw_pwm_P_status_ENUM_TOKEN disabled
+#define DT_N_S_sw_pwm_P_status_ENUM_UPPER_TOKEN DISABLED
+#define DT_N_S_sw_pwm_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_sw_pwm, status, 0)
+#define DT_N_S_sw_pwm_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_sw_pwm, status, 0)
+#define DT_N_S_sw_pwm_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_sw_pwm, status, 0, __VA_ARGS__)
+#define DT_N_S_sw_pwm_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_sw_pwm, status, 0, __VA_ARGS__)
+#define DT_N_S_sw_pwm_P_status_LEN 1
+#define DT_N_S_sw_pwm_P_status_EXISTS 1
+#define DT_N_S_sw_pwm_P_compatible {"nordic,nrf-sw-pwm"}
+#define DT_N_S_sw_pwm_P_compatible_IDX_0 "nordic,nrf-sw-pwm"
+#define DT_N_S_sw_pwm_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-sw-pwm
+#define DT_N_S_sw_pwm_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_sw_pwm
+#define DT_N_S_sw_pwm_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_SW_PWM
+#define DT_N_S_sw_pwm_P_compatible_IDX_0_EXISTS 1
+#define DT_N_S_sw_pwm_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_sw_pwm, compatible, 0)
+#define DT_N_S_sw_pwm_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_sw_pwm, compatible, 0)
+#define DT_N_S_sw_pwm_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_sw_pwm, compatible, 0, __VA_ARGS__)
+#define DT_N_S_sw_pwm_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_sw_pwm, compatible, 0, __VA_ARGS__)
+#define DT_N_S_sw_pwm_P_compatible_LEN 1
+#define DT_N_S_sw_pwm_P_compatible_EXISTS 1
+#define DT_N_S_sw_pwm_P_zephyr_deferred_init 0
+#define DT_N_S_sw_pwm_P_zephyr_deferred_init_EXISTS 1
+#define DT_N_S_sw_pwm_P_generator DT_N_S_soc_S_peripheral_50000000_S_timer_10000
+#define DT_N_S_sw_pwm_P_generator_IDX_0 DT_N_S_soc_S_peripheral_50000000_S_timer_10000
+#define DT_N_S_sw_pwm_P_generator_IDX_0_PH DT_N_S_soc_S_peripheral_50000000_S_timer_10000
+#define DT_N_S_sw_pwm_P_generator_IDX_0_EXISTS 1
+#define DT_N_S_sw_pwm_P_generator_FOREACH_PROP_ELEM(fn) fn(DT_N_S_sw_pwm, generator, 0)
+#define DT_N_S_sw_pwm_P_generator_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_sw_pwm, generator, 0)
+#define DT_N_S_sw_pwm_P_generator_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_sw_pwm, generator, 0, __VA_ARGS__)
+#define DT_N_S_sw_pwm_P_generator_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_sw_pwm, generator, 0, __VA_ARGS__)
+#define DT_N_S_sw_pwm_P_generator_LEN 1
+#define DT_N_S_sw_pwm_P_generator_EXISTS 1
+#define DT_N_S_sw_pwm_P_clock_prescaler 0
+#define DT_N_S_sw_pwm_P_clock_prescaler_EXISTS 1
+
+/*
+ * Devicetree node: /buttons
+ *
+ * Node identifier: DT_N_S_buttons
+ *
+ * Binding (compatible = gpio-keys):
+ *   $ZEPHYR_BASE/dts/bindings/input/gpio-keys.yaml
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_buttons_PATH "/buttons"
+
+/* Node's name with unit-address: */
+#define DT_N_S_buttons_FULL_NAME "buttons"
+
+/* Node parent (/) identifier: */
+#define DT_N_S_buttons_PARENT DT_N
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_buttons_CHILD_IDX 9
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_buttons_CHILD_NUM 4
+#define DT_N_S_buttons_CHILD_NUM_STATUS_OKAY 4
+#define DT_N_S_buttons_FOREACH_CHILD(fn) fn(DT_N_S_buttons_S_button_0) fn(DT_N_S_buttons_S_button_1) fn(DT_N_S_buttons_S_button_2) fn(DT_N_S_buttons_S_button_3)
+#define DT_N_S_buttons_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_buttons_S_button_0) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_buttons_S_button_1) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_buttons_S_button_2) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_buttons_S_button_3)
+#define DT_N_S_buttons_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_buttons_S_button_0, __VA_ARGS__) fn(DT_N_S_buttons_S_button_1, __VA_ARGS__) fn(DT_N_S_buttons_S_button_2, __VA_ARGS__) fn(DT_N_S_buttons_S_button_3, __VA_ARGS__)
+#define DT_N_S_buttons_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_buttons_S_button_0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_buttons_S_button_1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_buttons_S_button_2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_buttons_S_button_3, __VA_ARGS__)
+#define DT_N_S_buttons_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_buttons_S_button_0) fn(DT_N_S_buttons_S_button_1) fn(DT_N_S_buttons_S_button_2) fn(DT_N_S_buttons_S_button_3)
+#define DT_N_S_buttons_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_buttons_S_button_0) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_buttons_S_button_1) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_buttons_S_button_2) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_buttons_S_button_3)
+#define DT_N_S_buttons_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_buttons_S_button_0, __VA_ARGS__) fn(DT_N_S_buttons_S_button_1, __VA_ARGS__) fn(DT_N_S_buttons_S_button_2, __VA_ARGS__) fn(DT_N_S_buttons_S_button_3, __VA_ARGS__)
+#define DT_N_S_buttons_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_buttons_S_button_0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_buttons_S_button_1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_buttons_S_button_2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_buttons_S_button_3, __VA_ARGS__)
+
+/* Node's dependency ordinal: */
+#define DT_N_S_buttons_ORD 14
+#define DT_N_S_buttons_ORD_STR_SORTABLE 00014
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_buttons_REQUIRES_ORDS \
+	0, /* / */ \
+	10, /* /soc/peripheral@50000000/gpio@842500 */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_buttons_SUPPORTS_ORDS \
+	15, /* /buttons/button_0 */ \
+	16, /* /buttons/button_1 */ \
+	17, /* /buttons/button_2 */ \
+	18, /* /buttons/button_3 */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_buttons_EXISTS 1
+#define DT_N_INST_0_gpio_keys DT_N_S_buttons
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_buttons_REG_NUM 0
+#define DT_N_S_buttons_RANGES_NUM 0
+#define DT_N_S_buttons_FOREACH_RANGE(fn) 
+#define DT_N_S_buttons_IRQ_NUM 0
+#define DT_N_S_buttons_IRQ_LEVEL 0
+#define DT_N_S_buttons_COMPAT_MATCHES_gpio_keys 1
+#define DT_N_S_buttons_STATUS_okay 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_buttons_PINCTRL_NUM 0
+
+/* Generic property macros: */
+#define DT_N_S_buttons_P_wakeup_source 0
+#define DT_N_S_buttons_P_wakeup_source_EXISTS 1
+#define DT_N_S_buttons_P_zephyr_pm_device_runtime_auto 0
+#define DT_N_S_buttons_P_zephyr_pm_device_runtime_auto_EXISTS 1
+#define DT_N_S_buttons_P_compatible {"gpio-keys"}
+#define DT_N_S_buttons_P_compatible_IDX_0 "gpio-keys"
+#define DT_N_S_buttons_P_compatible_IDX_0_STRING_UNQUOTED gpio-keys
+#define DT_N_S_buttons_P_compatible_IDX_0_STRING_TOKEN gpio_keys
+#define DT_N_S_buttons_P_compatible_IDX_0_STRING_UPPER_TOKEN GPIO_KEYS
+#define DT_N_S_buttons_P_compatible_IDX_0_EXISTS 1
+#define DT_N_S_buttons_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_buttons, compatible, 0)
+#define DT_N_S_buttons_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_buttons, compatible, 0)
+#define DT_N_S_buttons_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_buttons, compatible, 0, __VA_ARGS__)
+#define DT_N_S_buttons_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_buttons, compatible, 0, __VA_ARGS__)
+#define DT_N_S_buttons_P_compatible_LEN 1
+#define DT_N_S_buttons_P_compatible_EXISTS 1
+#define DT_N_S_buttons_P_zephyr_deferred_init 0
+#define DT_N_S_buttons_P_zephyr_deferred_init_EXISTS 1
+#define DT_N_S_buttons_P_debounce_interval_ms 30
+#define DT_N_S_buttons_P_debounce_interval_ms_EXISTS 1
+#define DT_N_S_buttons_P_polling_mode 0
+#define DT_N_S_buttons_P_polling_mode_EXISTS 1
+
+/*
+ * Devicetree node: /buttons/button_0
+ *
+ * Node identifier: DT_N_S_buttons_S_button_0
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_buttons_S_button_0_PATH "/buttons/button_0"
+
+/* Node's name with unit-address: */
+#define DT_N_S_buttons_S_button_0_FULL_NAME "button_0"
+
+/* Node parent (/buttons) identifier: */
+#define DT_N_S_buttons_S_button_0_PARENT DT_N_S_buttons
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_buttons_S_button_0_CHILD_IDX 0
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_buttons_S_button_0_CHILD_NUM 0
+#define DT_N_S_buttons_S_button_0_CHILD_NUM_STATUS_OKAY 0
+#define DT_N_S_buttons_S_button_0_FOREACH_CHILD(fn) 
+#define DT_N_S_buttons_S_button_0_FOREACH_CHILD_SEP(fn, sep) 
+#define DT_N_S_buttons_S_button_0_FOREACH_CHILD_VARGS(fn, ...) 
+#define DT_N_S_buttons_S_button_0_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
+#define DT_N_S_buttons_S_button_0_FOREACH_CHILD_STATUS_OKAY(fn) 
+#define DT_N_S_buttons_S_button_0_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
+#define DT_N_S_buttons_S_button_0_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
+#define DT_N_S_buttons_S_button_0_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 
+
+/* Node's dependency ordinal: */
+#define DT_N_S_buttons_S_button_0_ORD 15
+#define DT_N_S_buttons_S_button_0_ORD_STR_SORTABLE 00015
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_buttons_S_button_0_REQUIRES_ORDS \
+	10, /* /soc/peripheral@50000000/gpio@842500 */ \
+	14, /* /buttons */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_buttons_S_button_0_SUPPORTS_ORDS /* nothing */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_buttons_S_button_0_EXISTS 1
+#define DT_N_ALIAS_sw0             DT_N_S_buttons_S_button_0
+#define DT_N_ALIAS_mcuboot_button0 DT_N_S_buttons_S_button_0
+#define DT_N_NODELABEL_button0     DT_N_S_buttons_S_button_0
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_buttons_S_button_0_REG_NUM 0
+#define DT_N_S_buttons_S_button_0_RANGES_NUM 0
+#define DT_N_S_buttons_S_button_0_FOREACH_RANGE(fn) 
+#define DT_N_S_buttons_S_button_0_IRQ_NUM 0
+#define DT_N_S_buttons_S_button_0_IRQ_LEVEL 0
+#define DT_N_S_buttons_S_button_0_STATUS_okay 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_buttons_S_button_0_PINCTRL_NUM 0
+
+/* Generic property macros: */
+#define DT_N_S_buttons_S_button_0_P_gpios_IDX_0_EXISTS 1
+#define DT_N_S_buttons_S_button_0_P_gpios_IDX_0_PH DT_N_S_soc_S_peripheral_50000000_S_gpio_842500
+#define DT_N_S_buttons_S_button_0_P_gpios_IDX_0_VAL_pin 8
+#define DT_N_S_buttons_S_button_0_P_gpios_IDX_0_VAL_pin_EXISTS 1
+#define DT_N_S_buttons_S_button_0_P_gpios_IDX_0_VAL_flags 17
+#define DT_N_S_buttons_S_button_0_P_gpios_IDX_0_VAL_flags_EXISTS 1
+#define DT_N_S_buttons_S_button_0_P_gpios_FOREACH_PROP_ELEM(fn) fn(DT_N_S_buttons_S_button_0, gpios, 0)
+#define DT_N_S_buttons_S_button_0_P_gpios_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_buttons_S_button_0, gpios, 0)
+#define DT_N_S_buttons_S_button_0_P_gpios_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_buttons_S_button_0, gpios, 0, __VA_ARGS__)
+#define DT_N_S_buttons_S_button_0_P_gpios_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_buttons_S_button_0, gpios, 0, __VA_ARGS__)
+#define DT_N_S_buttons_S_button_0_P_gpios_LEN 1
+#define DT_N_S_buttons_S_button_0_P_gpios_EXISTS 1
+#define DT_N_S_buttons_S_button_0_P_label "Push button 1"
+#define DT_N_S_buttons_S_button_0_P_label_STRING_UNQUOTED Push button 1
+#define DT_N_S_buttons_S_button_0_P_label_STRING_TOKEN Push_button_1
+#define DT_N_S_buttons_S_button_0_P_label_STRING_UPPER_TOKEN PUSH_BUTTON_1
+#define DT_N_S_buttons_S_button_0_P_label_IDX_0 "Push button 1"
+#define DT_N_S_buttons_S_button_0_P_label_IDX_0_EXISTS 1
+#define DT_N_S_buttons_S_button_0_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_buttons_S_button_0, label, 0)
+#define DT_N_S_buttons_S_button_0_P_label_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_buttons_S_button_0, label, 0)
+#define DT_N_S_buttons_S_button_0_P_label_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_buttons_S_button_0, label, 0, __VA_ARGS__)
+#define DT_N_S_buttons_S_button_0_P_label_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_buttons_S_button_0, label, 0, __VA_ARGS__)
+#define DT_N_S_buttons_S_button_0_P_label_LEN 1
+#define DT_N_S_buttons_S_button_0_P_label_EXISTS 1
+#define DT_N_S_buttons_S_button_0_P_zephyr_code 11
+#define DT_N_S_buttons_S_button_0_P_zephyr_code_EXISTS 1
+
+/*
+ * Devicetree node: /buttons/button_1
+ *
+ * Node identifier: DT_N_S_buttons_S_button_1
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_buttons_S_button_1_PATH "/buttons/button_1"
+
+/* Node's name with unit-address: */
+#define DT_N_S_buttons_S_button_1_FULL_NAME "button_1"
+
+/* Node parent (/buttons) identifier: */
+#define DT_N_S_buttons_S_button_1_PARENT DT_N_S_buttons
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_buttons_S_button_1_CHILD_IDX 1
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_buttons_S_button_1_CHILD_NUM 0
+#define DT_N_S_buttons_S_button_1_CHILD_NUM_STATUS_OKAY 0
+#define DT_N_S_buttons_S_button_1_FOREACH_CHILD(fn) 
+#define DT_N_S_buttons_S_button_1_FOREACH_CHILD_SEP(fn, sep) 
+#define DT_N_S_buttons_S_button_1_FOREACH_CHILD_VARGS(fn, ...) 
+#define DT_N_S_buttons_S_button_1_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
+#define DT_N_S_buttons_S_button_1_FOREACH_CHILD_STATUS_OKAY(fn) 
+#define DT_N_S_buttons_S_button_1_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
+#define DT_N_S_buttons_S_button_1_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
+#define DT_N_S_buttons_S_button_1_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 
+
+/* Node's dependency ordinal: */
+#define DT_N_S_buttons_S_button_1_ORD 16
+#define DT_N_S_buttons_S_button_1_ORD_STR_SORTABLE 00016
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_buttons_S_button_1_REQUIRES_ORDS \
+	10, /* /soc/peripheral@50000000/gpio@842500 */ \
+	14, /* /buttons */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_buttons_S_button_1_SUPPORTS_ORDS /* nothing */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_buttons_S_button_1_EXISTS 1
+#define DT_N_ALIAS_sw1         DT_N_S_buttons_S_button_1
+#define DT_N_NODELABEL_button1 DT_N_S_buttons_S_button_1
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_buttons_S_button_1_REG_NUM 0
+#define DT_N_S_buttons_S_button_1_RANGES_NUM 0
+#define DT_N_S_buttons_S_button_1_FOREACH_RANGE(fn) 
+#define DT_N_S_buttons_S_button_1_IRQ_NUM 0
+#define DT_N_S_buttons_S_button_1_IRQ_LEVEL 0
+#define DT_N_S_buttons_S_button_1_STATUS_okay 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_buttons_S_button_1_PINCTRL_NUM 0
+
+/* Generic property macros: */
+#define DT_N_S_buttons_S_button_1_P_gpios_IDX_0_EXISTS 1
+#define DT_N_S_buttons_S_button_1_P_gpios_IDX_0_PH DT_N_S_soc_S_peripheral_50000000_S_gpio_842500
+#define DT_N_S_buttons_S_button_1_P_gpios_IDX_0_VAL_pin 9
+#define DT_N_S_buttons_S_button_1_P_gpios_IDX_0_VAL_pin_EXISTS 1
+#define DT_N_S_buttons_S_button_1_P_gpios_IDX_0_VAL_flags 17
+#define DT_N_S_buttons_S_button_1_P_gpios_IDX_0_VAL_flags_EXISTS 1
+#define DT_N_S_buttons_S_button_1_P_gpios_FOREACH_PROP_ELEM(fn) fn(DT_N_S_buttons_S_button_1, gpios, 0)
+#define DT_N_S_buttons_S_button_1_P_gpios_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_buttons_S_button_1, gpios, 0)
+#define DT_N_S_buttons_S_button_1_P_gpios_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_buttons_S_button_1, gpios, 0, __VA_ARGS__)
+#define DT_N_S_buttons_S_button_1_P_gpios_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_buttons_S_button_1, gpios, 0, __VA_ARGS__)
+#define DT_N_S_buttons_S_button_1_P_gpios_LEN 1
+#define DT_N_S_buttons_S_button_1_P_gpios_EXISTS 1
+#define DT_N_S_buttons_S_button_1_P_label "Push button 2"
+#define DT_N_S_buttons_S_button_1_P_label_STRING_UNQUOTED Push button 2
+#define DT_N_S_buttons_S_button_1_P_label_STRING_TOKEN Push_button_2
+#define DT_N_S_buttons_S_button_1_P_label_STRING_UPPER_TOKEN PUSH_BUTTON_2
+#define DT_N_S_buttons_S_button_1_P_label_IDX_0 "Push button 2"
+#define DT_N_S_buttons_S_button_1_P_label_IDX_0_EXISTS 1
+#define DT_N_S_buttons_S_button_1_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_buttons_S_button_1, label, 0)
+#define DT_N_S_buttons_S_button_1_P_label_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_buttons_S_button_1, label, 0)
+#define DT_N_S_buttons_S_button_1_P_label_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_buttons_S_button_1, label, 0, __VA_ARGS__)
+#define DT_N_S_buttons_S_button_1_P_label_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_buttons_S_button_1, label, 0, __VA_ARGS__)
+#define DT_N_S_buttons_S_button_1_P_label_LEN 1
+#define DT_N_S_buttons_S_button_1_P_label_EXISTS 1
+#define DT_N_S_buttons_S_button_1_P_zephyr_code 2
+#define DT_N_S_buttons_S_button_1_P_zephyr_code_EXISTS 1
+
+/*
+ * Devicetree node: /buttons/button_2
+ *
+ * Node identifier: DT_N_S_buttons_S_button_2
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_buttons_S_button_2_PATH "/buttons/button_2"
+
+/* Node's name with unit-address: */
+#define DT_N_S_buttons_S_button_2_FULL_NAME "button_2"
+
+/* Node parent (/buttons) identifier: */
+#define DT_N_S_buttons_S_button_2_PARENT DT_N_S_buttons
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_buttons_S_button_2_CHILD_IDX 2
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_buttons_S_button_2_CHILD_NUM 0
+#define DT_N_S_buttons_S_button_2_CHILD_NUM_STATUS_OKAY 0
+#define DT_N_S_buttons_S_button_2_FOREACH_CHILD(fn) 
+#define DT_N_S_buttons_S_button_2_FOREACH_CHILD_SEP(fn, sep) 
+#define DT_N_S_buttons_S_button_2_FOREACH_CHILD_VARGS(fn, ...) 
+#define DT_N_S_buttons_S_button_2_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
+#define DT_N_S_buttons_S_button_2_FOREACH_CHILD_STATUS_OKAY(fn) 
+#define DT_N_S_buttons_S_button_2_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
+#define DT_N_S_buttons_S_button_2_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
+#define DT_N_S_buttons_S_button_2_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 
+
+/* Node's dependency ordinal: */
+#define DT_N_S_buttons_S_button_2_ORD 17
+#define DT_N_S_buttons_S_button_2_ORD_STR_SORTABLE 00017
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_buttons_S_button_2_REQUIRES_ORDS \
+	10, /* /soc/peripheral@50000000/gpio@842500 */ \
+	14, /* /buttons */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_buttons_S_button_2_SUPPORTS_ORDS /* nothing */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_buttons_S_button_2_EXISTS 1
+#define DT_N_ALIAS_sw2         DT_N_S_buttons_S_button_2
+#define DT_N_NODELABEL_button2 DT_N_S_buttons_S_button_2
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_buttons_S_button_2_REG_NUM 0
+#define DT_N_S_buttons_S_button_2_RANGES_NUM 0
+#define DT_N_S_buttons_S_button_2_FOREACH_RANGE(fn) 
+#define DT_N_S_buttons_S_button_2_IRQ_NUM 0
+#define DT_N_S_buttons_S_button_2_IRQ_LEVEL 0
+#define DT_N_S_buttons_S_button_2_STATUS_okay 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_buttons_S_button_2_PINCTRL_NUM 0
+
+/* Generic property macros: */
+#define DT_N_S_buttons_S_button_2_P_gpios_IDX_0_EXISTS 1
+#define DT_N_S_buttons_S_button_2_P_gpios_IDX_0_PH DT_N_S_soc_S_peripheral_50000000_S_gpio_842500
+#define DT_N_S_buttons_S_button_2_P_gpios_IDX_0_VAL_pin 18
+#define DT_N_S_buttons_S_button_2_P_gpios_IDX_0_VAL_pin_EXISTS 1
+#define DT_N_S_buttons_S_button_2_P_gpios_IDX_0_VAL_flags 17
+#define DT_N_S_buttons_S_button_2_P_gpios_IDX_0_VAL_flags_EXISTS 1
+#define DT_N_S_buttons_S_button_2_P_gpios_FOREACH_PROP_ELEM(fn) fn(DT_N_S_buttons_S_button_2, gpios, 0)
+#define DT_N_S_buttons_S_button_2_P_gpios_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_buttons_S_button_2, gpios, 0)
+#define DT_N_S_buttons_S_button_2_P_gpios_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_buttons_S_button_2, gpios, 0, __VA_ARGS__)
+#define DT_N_S_buttons_S_button_2_P_gpios_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_buttons_S_button_2, gpios, 0, __VA_ARGS__)
+#define DT_N_S_buttons_S_button_2_P_gpios_LEN 1
+#define DT_N_S_buttons_S_button_2_P_gpios_EXISTS 1
+#define DT_N_S_buttons_S_button_2_P_label "Push button 3"
+#define DT_N_S_buttons_S_button_2_P_label_STRING_UNQUOTED Push button 3
+#define DT_N_S_buttons_S_button_2_P_label_STRING_TOKEN Push_button_3
+#define DT_N_S_buttons_S_button_2_P_label_STRING_UPPER_TOKEN PUSH_BUTTON_3
+#define DT_N_S_buttons_S_button_2_P_label_IDX_0 "Push button 3"
+#define DT_N_S_buttons_S_button_2_P_label_IDX_0_EXISTS 1
+#define DT_N_S_buttons_S_button_2_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_buttons_S_button_2, label, 0)
+#define DT_N_S_buttons_S_button_2_P_label_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_buttons_S_button_2, label, 0)
+#define DT_N_S_buttons_S_button_2_P_label_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_buttons_S_button_2, label, 0, __VA_ARGS__)
+#define DT_N_S_buttons_S_button_2_P_label_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_buttons_S_button_2, label, 0, __VA_ARGS__)
+#define DT_N_S_buttons_S_button_2_P_label_LEN 1
+#define DT_N_S_buttons_S_button_2_P_label_EXISTS 1
+#define DT_N_S_buttons_S_button_2_P_zephyr_code 3
+#define DT_N_S_buttons_S_button_2_P_zephyr_code_EXISTS 1
+
+/*
+ * Devicetree node: /buttons/button_3
+ *
+ * Node identifier: DT_N_S_buttons_S_button_3
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_buttons_S_button_3_PATH "/buttons/button_3"
+
+/* Node's name with unit-address: */
+#define DT_N_S_buttons_S_button_3_FULL_NAME "button_3"
+
+/* Node parent (/buttons) identifier: */
+#define DT_N_S_buttons_S_button_3_PARENT DT_N_S_buttons
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_buttons_S_button_3_CHILD_IDX 3
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_buttons_S_button_3_CHILD_NUM 0
+#define DT_N_S_buttons_S_button_3_CHILD_NUM_STATUS_OKAY 0
+#define DT_N_S_buttons_S_button_3_FOREACH_CHILD(fn) 
+#define DT_N_S_buttons_S_button_3_FOREACH_CHILD_SEP(fn, sep) 
+#define DT_N_S_buttons_S_button_3_FOREACH_CHILD_VARGS(fn, ...) 
+#define DT_N_S_buttons_S_button_3_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
+#define DT_N_S_buttons_S_button_3_FOREACH_CHILD_STATUS_OKAY(fn) 
+#define DT_N_S_buttons_S_button_3_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
+#define DT_N_S_buttons_S_button_3_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
+#define DT_N_S_buttons_S_button_3_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 
+
+/* Node's dependency ordinal: */
+#define DT_N_S_buttons_S_button_3_ORD 18
+#define DT_N_S_buttons_S_button_3_ORD_STR_SORTABLE 00018
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_buttons_S_button_3_REQUIRES_ORDS \
+	10, /* /soc/peripheral@50000000/gpio@842500 */ \
+	14, /* /buttons */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_buttons_S_button_3_SUPPORTS_ORDS /* nothing */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_buttons_S_button_3_EXISTS 1
+#define DT_N_ALIAS_sw3         DT_N_S_buttons_S_button_3
+#define DT_N_NODELABEL_button3 DT_N_S_buttons_S_button_3
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_buttons_S_button_3_REG_NUM 0
+#define DT_N_S_buttons_S_button_3_RANGES_NUM 0
+#define DT_N_S_buttons_S_button_3_FOREACH_RANGE(fn) 
+#define DT_N_S_buttons_S_button_3_IRQ_NUM 0
+#define DT_N_S_buttons_S_button_3_IRQ_LEVEL 0
+#define DT_N_S_buttons_S_button_3_STATUS_okay 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_buttons_S_button_3_PINCTRL_NUM 0
+
+/* Generic property macros: */
+#define DT_N_S_buttons_S_button_3_P_gpios_IDX_0_EXISTS 1
+#define DT_N_S_buttons_S_button_3_P_gpios_IDX_0_PH DT_N_S_soc_S_peripheral_50000000_S_gpio_842500
+#define DT_N_S_buttons_S_button_3_P_gpios_IDX_0_VAL_pin 19
+#define DT_N_S_buttons_S_button_3_P_gpios_IDX_0_VAL_pin_EXISTS 1
+#define DT_N_S_buttons_S_button_3_P_gpios_IDX_0_VAL_flags 17
+#define DT_N_S_buttons_S_button_3_P_gpios_IDX_0_VAL_flags_EXISTS 1
+#define DT_N_S_buttons_S_button_3_P_gpios_FOREACH_PROP_ELEM(fn) fn(DT_N_S_buttons_S_button_3, gpios, 0)
+#define DT_N_S_buttons_S_button_3_P_gpios_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_buttons_S_button_3, gpios, 0)
+#define DT_N_S_buttons_S_button_3_P_gpios_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_buttons_S_button_3, gpios, 0, __VA_ARGS__)
+#define DT_N_S_buttons_S_button_3_P_gpios_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_buttons_S_button_3, gpios, 0, __VA_ARGS__)
+#define DT_N_S_buttons_S_button_3_P_gpios_LEN 1
+#define DT_N_S_buttons_S_button_3_P_gpios_EXISTS 1
+#define DT_N_S_buttons_S_button_3_P_label "Push button 4"
+#define DT_N_S_buttons_S_button_3_P_label_STRING_UNQUOTED Push button 4
+#define DT_N_S_buttons_S_button_3_P_label_STRING_TOKEN Push_button_4
+#define DT_N_S_buttons_S_button_3_P_label_STRING_UPPER_TOKEN PUSH_BUTTON_4
+#define DT_N_S_buttons_S_button_3_P_label_IDX_0 "Push button 4"
+#define DT_N_S_buttons_S_button_3_P_label_IDX_0_EXISTS 1
+#define DT_N_S_buttons_S_button_3_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_buttons_S_button_3, label, 0)
+#define DT_N_S_buttons_S_button_3_P_label_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_buttons_S_button_3, label, 0)
+#define DT_N_S_buttons_S_button_3_P_label_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_buttons_S_button_3, label, 0, __VA_ARGS__)
+#define DT_N_S_buttons_S_button_3_P_label_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_buttons_S_button_3, label, 0, __VA_ARGS__)
+#define DT_N_S_buttons_S_button_3_P_label_LEN 1
+#define DT_N_S_buttons_S_button_3_P_label_EXISTS 1
+#define DT_N_S_buttons_S_button_3_P_zephyr_code 4
+#define DT_N_S_buttons_S_button_3_P_zephyr_code_EXISTS 1
+
+/*
+ * Devicetree node: /cpus
+ *
+ * Node identifier: DT_N_S_cpus
+ */
+
+/* Node's full path: */
+#define DT_N_S_cpus_PATH "/cpus"
+
+/* Node's name with unit-address: */
+#define DT_N_S_cpus_FULL_NAME "cpus"
+
+/* Node parent (/) identifier: */
+#define DT_N_S_cpus_PARENT DT_N
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_cpus_CHILD_IDX 6
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_cpus_CHILD_NUM 1
+#define DT_N_S_cpus_CHILD_NUM_STATUS_OKAY 1
+#define DT_N_S_cpus_FOREACH_CHILD(fn) fn(DT_N_S_cpus_S_cpu_0)
+#define DT_N_S_cpus_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_cpus_S_cpu_0)
+#define DT_N_S_cpus_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_cpus_S_cpu_0, __VA_ARGS__)
+#define DT_N_S_cpus_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_cpus_S_cpu_0, __VA_ARGS__)
+#define DT_N_S_cpus_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_cpus_S_cpu_0)
+#define DT_N_S_cpus_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_cpus_S_cpu_0)
+#define DT_N_S_cpus_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_cpus_S_cpu_0, __VA_ARGS__)
+#define DT_N_S_cpus_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_cpus_S_cpu_0, __VA_ARGS__)
+
+/* Node's dependency ordinal: */
+#define DT_N_S_cpus_ORD 19
+#define DT_N_S_cpus_ORD_STR_SORTABLE 00019
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_cpus_REQUIRES_ORDS \
+	0, /* / */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_cpus_SUPPORTS_ORDS \
+	20, /* /cpus/cpu@0 */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_cpus_EXISTS 1
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_cpus_REG_NUM 0
+#define DT_N_S_cpus_RANGES_NUM 0
+#define DT_N_S_cpus_FOREACH_RANGE(fn) 
+#define DT_N_S_cpus_IRQ_NUM 0
+#define DT_N_S_cpus_IRQ_LEVEL 0
+#define DT_N_S_cpus_STATUS_okay 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_cpus_PINCTRL_NUM 0
+
+/* (No generic property macros) */
+
+/*
+ * Devicetree node: /cpus/cpu@0
+ *
+ * Node identifier: DT_N_S_cpus_S_cpu_0
+ *
+ * Binding (compatible = arm,cortex-m33f):
+ *   $ZEPHYR_BASE/dts/bindings/cpu/arm,cortex-m33f.yaml
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_cpus_S_cpu_0_PATH "/cpus/cpu@0"
+
+/* Node's name with unit-address: */
+#define DT_N_S_cpus_S_cpu_0_FULL_NAME "cpu@0"
+
+/* Node parent (/cpus) identifier: */
+#define DT_N_S_cpus_S_cpu_0_PARENT DT_N_S_cpus
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_cpus_S_cpu_0_CHILD_IDX 0
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_cpus_S_cpu_0_CHILD_NUM 1
+#define DT_N_S_cpus_S_cpu_0_CHILD_NUM_STATUS_OKAY 1
+#define DT_N_S_cpus_S_cpu_0_FOREACH_CHILD(fn) fn(DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90)
+#define DT_N_S_cpus_S_cpu_0_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90)
+#define DT_N_S_cpus_S_cpu_0_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90, __VA_ARGS__)
+#define DT_N_S_cpus_S_cpu_0_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90, __VA_ARGS__)
+#define DT_N_S_cpus_S_cpu_0_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90)
+#define DT_N_S_cpus_S_cpu_0_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90)
+#define DT_N_S_cpus_S_cpu_0_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90, __VA_ARGS__)
+#define DT_N_S_cpus_S_cpu_0_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90, __VA_ARGS__)
+
+/* Node's dependency ordinal: */
+#define DT_N_S_cpus_S_cpu_0_ORD 20
+#define DT_N_S_cpus_S_cpu_0_ORD_STR_SORTABLE 00020
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_cpus_S_cpu_0_REQUIRES_ORDS \
+	19, /* /cpus */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_cpus_S_cpu_0_SUPPORTS_ORDS \
+	21, /* /cpus/cpu@0/mpu@e000ed90 */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_cpus_S_cpu_0_EXISTS 1
+#define DT_N_INST_0_arm_cortex_m33f DT_N_S_cpus_S_cpu_0
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_cpus_S_cpu_0_REG_NUM 1
+#define DT_N_S_cpus_S_cpu_0_REG_IDX_0_EXISTS 1
+#define DT_N_S_cpus_S_cpu_0_REG_IDX_0_VAL_ADDRESS 0 /* 0x0 */
+#define DT_N_S_cpus_S_cpu_0_RANGES_NUM 0
+#define DT_N_S_cpus_S_cpu_0_FOREACH_RANGE(fn) 
+#define DT_N_S_cpus_S_cpu_0_IRQ_NUM 0
+#define DT_N_S_cpus_S_cpu_0_IRQ_LEVEL 0
+#define DT_N_S_cpus_S_cpu_0_COMPAT_MATCHES_arm_cortex_m33f 1
+#define DT_N_S_cpus_S_cpu_0_COMPAT_VENDOR_IDX_0_EXISTS 1
+#define DT_N_S_cpus_S_cpu_0_COMPAT_VENDOR_IDX_0 "ARM Ltd."
+#define DT_N_S_cpus_S_cpu_0_COMPAT_MODEL_IDX_0_EXISTS 1
+#define DT_N_S_cpus_S_cpu_0_COMPAT_MODEL_IDX_0 "cortex-m33f"
+#define DT_N_S_cpus_S_cpu_0_STATUS_okay 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_cpus_S_cpu_0_PINCTRL_NUM 0
+
+/* Generic property macros: */
+#define DT_N_S_cpus_S_cpu_0_P_wakeup_source 0
+#define DT_N_S_cpus_S_cpu_0_P_wakeup_source_EXISTS 1
+#define DT_N_S_cpus_S_cpu_0_P_zephyr_pm_device_runtime_auto 0
+#define DT_N_S_cpus_S_cpu_0_P_zephyr_pm_device_runtime_auto_EXISTS 1
+#define DT_N_S_cpus_S_cpu_0_P_compatible {"arm,cortex-m33f"}
+#define DT_N_S_cpus_S_cpu_0_P_compatible_IDX_0 "arm,cortex-m33f"
+#define DT_N_S_cpus_S_cpu_0_P_compatible_IDX_0_STRING_UNQUOTED arm,cortex-m33f
+#define DT_N_S_cpus_S_cpu_0_P_compatible_IDX_0_STRING_TOKEN arm_cortex_m33f
+#define DT_N_S_cpus_S_cpu_0_P_compatible_IDX_0_STRING_UPPER_TOKEN ARM_CORTEX_M33F
+#define DT_N_S_cpus_S_cpu_0_P_compatible_IDX_0_EXISTS 1
+#define DT_N_S_cpus_S_cpu_0_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_cpus_S_cpu_0, compatible, 0)
+#define DT_N_S_cpus_S_cpu_0_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_cpus_S_cpu_0, compatible, 0)
+#define DT_N_S_cpus_S_cpu_0_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_cpus_S_cpu_0, compatible, 0, __VA_ARGS__)
+#define DT_N_S_cpus_S_cpu_0_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_cpus_S_cpu_0, compatible, 0, __VA_ARGS__)
+#define DT_N_S_cpus_S_cpu_0_P_compatible_LEN 1
+#define DT_N_S_cpus_S_cpu_0_P_compatible_EXISTS 1
+#define DT_N_S_cpus_S_cpu_0_P_reg {0 /* 0x0 */}
+#define DT_N_S_cpus_S_cpu_0_P_reg_IDX_0 0
+#define DT_N_S_cpus_S_cpu_0_P_reg_IDX_0_EXISTS 1
+#define DT_N_S_cpus_S_cpu_0_P_reg_EXISTS 1
+#define DT_N_S_cpus_S_cpu_0_P_zephyr_deferred_init 0
+#define DT_N_S_cpus_S_cpu_0_P_zephyr_deferred_init_EXISTS 1
+
+/*
+ * Devicetree node: /cpus/cpu@0/mpu@e000ed90
+ *
+ * Node identifier: DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90
+ *
+ * Binding (compatible = arm,armv8m-mpu):
+ *   $ZEPHYR_BASE/dts/bindings/mmu_mpu/arm,armv8m-mpu.yaml
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_PATH "/cpus/cpu@0/mpu@e000ed90"
+
+/* Node's name with unit-address: */
+#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_FULL_NAME "mpu@e000ed90"
+
+/* Node parent (/cpus/cpu@0) identifier: */
+#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_PARENT DT_N_S_cpus_S_cpu_0
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_CHILD_IDX 0
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_CHILD_NUM 0
+#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_CHILD_NUM_STATUS_OKAY 0
+#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_FOREACH_CHILD(fn) 
+#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_FOREACH_CHILD_SEP(fn, sep) 
+#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_FOREACH_CHILD_VARGS(fn, ...) 
+#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
+#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_FOREACH_CHILD_STATUS_OKAY(fn) 
+#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
+#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
+#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 
+
+/* Node's dependency ordinal: */
+#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_ORD 21
+#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_ORD_STR_SORTABLE 00021
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_REQUIRES_ORDS \
+	20, /* /cpus/cpu@0 */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_SUPPORTS_ORDS /* nothing */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_EXISTS 1
+#define DT_N_INST_0_arm_armv8m_mpu DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90
+#define DT_N_NODELABEL_mpu         DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_REG_NUM 1
+#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_REG_IDX_0_EXISTS 1
+#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_REG_IDX_0_VAL_ADDRESS 3758157200 /* 0xe000ed90 */
+#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_REG_IDX_0_VAL_SIZE 64 /* 0x40 */
+#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_RANGES_NUM 0
+#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_FOREACH_RANGE(fn) 
+#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_IRQ_NUM 0
+#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_IRQ_LEVEL 0
+#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_COMPAT_MATCHES_arm_armv8m_mpu 1
+#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_COMPAT_VENDOR_IDX_0_EXISTS 1
+#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_COMPAT_VENDOR_IDX_0 "ARM Ltd."
+#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_COMPAT_MODEL_IDX_0_EXISTS 1
+#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_COMPAT_MODEL_IDX_0 "armv8m-mpu"
+#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_STATUS_okay 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_PINCTRL_NUM 0
+
+/* Generic property macros: */
+#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_P_wakeup_source 0
+#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_P_wakeup_source_EXISTS 1
+#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_P_zephyr_pm_device_runtime_auto 0
+#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_P_zephyr_pm_device_runtime_auto_EXISTS 1
+#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_P_compatible {"arm,armv8m-mpu"}
+#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_P_compatible_IDX_0 "arm,armv8m-mpu"
+#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_P_compatible_IDX_0_STRING_UNQUOTED arm,armv8m-mpu
+#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_P_compatible_IDX_0_STRING_TOKEN arm_armv8m_mpu
+#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_P_compatible_IDX_0_STRING_UPPER_TOKEN ARM_ARMV8M_MPU
+#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_P_compatible_IDX_0_EXISTS 1
+#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90, compatible, 0)
+#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90, compatible, 0)
+#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90, compatible, 0, __VA_ARGS__)
+#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90, compatible, 0, __VA_ARGS__)
+#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_P_compatible_LEN 1
+#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_P_compatible_EXISTS 1
+#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_P_reg {3758157200 /* 0xe000ed90 */, 64 /* 0x40 */}
+#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_P_reg_IDX_0 3758157200
+#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_P_reg_IDX_0_EXISTS 1
+#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_P_reg_IDX_1 64
+#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_P_reg_IDX_1_EXISTS 1
+#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_P_reg_EXISTS 1
+#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_P_zephyr_deferred_init 0
+#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_P_zephyr_deferred_init_EXISTS 1
+
+/*
+ * Devicetree node: /leds
+ *
+ * Node identifier: DT_N_S_leds
+ *
+ * Binding (compatible = gpio-leds):
+ *   $ZEPHYR_BASE/dts/bindings/led/gpio-leds.yaml
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_leds_PATH "/leds"
+
+/* Node's name with unit-address: */
+#define DT_N_S_leds_FULL_NAME "leds"
+
+/* Node parent (/) identifier: */
+#define DT_N_S_leds_PARENT DT_N
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_leds_CHILD_IDX 7
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_leds_CHILD_NUM 4
+#define DT_N_S_leds_CHILD_NUM_STATUS_OKAY 4
+#define DT_N_S_leds_FOREACH_CHILD(fn) fn(DT_N_S_leds_S_led_0) fn(DT_N_S_leds_S_led_1) fn(DT_N_S_leds_S_led_2) fn(DT_N_S_leds_S_led_3)
+#define DT_N_S_leds_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_leds_S_led_0) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_leds_S_led_1) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_leds_S_led_2) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_leds_S_led_3)
+#define DT_N_S_leds_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_leds_S_led_0, __VA_ARGS__) fn(DT_N_S_leds_S_led_1, __VA_ARGS__) fn(DT_N_S_leds_S_led_2, __VA_ARGS__) fn(DT_N_S_leds_S_led_3, __VA_ARGS__)
+#define DT_N_S_leds_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_leds_S_led_0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_leds_S_led_1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_leds_S_led_2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_leds_S_led_3, __VA_ARGS__)
+#define DT_N_S_leds_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_leds_S_led_0) fn(DT_N_S_leds_S_led_1) fn(DT_N_S_leds_S_led_2) fn(DT_N_S_leds_S_led_3)
+#define DT_N_S_leds_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_leds_S_led_0) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_leds_S_led_1) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_leds_S_led_2) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_leds_S_led_3)
+#define DT_N_S_leds_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_leds_S_led_0, __VA_ARGS__) fn(DT_N_S_leds_S_led_1, __VA_ARGS__) fn(DT_N_S_leds_S_led_2, __VA_ARGS__) fn(DT_N_S_leds_S_led_3, __VA_ARGS__)
+#define DT_N_S_leds_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_leds_S_led_0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_leds_S_led_1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_leds_S_led_2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_leds_S_led_3, __VA_ARGS__)
+
+/* Node's dependency ordinal: */
+#define DT_N_S_leds_ORD 22
+#define DT_N_S_leds_ORD_STR_SORTABLE 00022
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_leds_REQUIRES_ORDS \
+	0, /* / */ \
+	10, /* /soc/peripheral@50000000/gpio@842500 */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_leds_SUPPORTS_ORDS \
+	23, /* /leds/led_0 */ \
+	24, /* /leds/led_1 */ \
+	25, /* /leds/led_2 */ \
+	26, /* /leds/led_3 */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_leds_EXISTS 1
+#define DT_N_INST_0_gpio_leds DT_N_S_leds
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_leds_REG_NUM 0
+#define DT_N_S_leds_RANGES_NUM 0
+#define DT_N_S_leds_FOREACH_RANGE(fn) 
+#define DT_N_S_leds_IRQ_NUM 0
+#define DT_N_S_leds_IRQ_LEVEL 0
+#define DT_N_S_leds_COMPAT_MATCHES_gpio_leds 1
+#define DT_N_S_leds_STATUS_okay 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_leds_PINCTRL_NUM 0
+
+/* Generic property macros: */
+#define DT_N_S_leds_P_compatible {"gpio-leds"}
+#define DT_N_S_leds_P_compatible_IDX_0 "gpio-leds"
+#define DT_N_S_leds_P_compatible_IDX_0_STRING_UNQUOTED gpio-leds
+#define DT_N_S_leds_P_compatible_IDX_0_STRING_TOKEN gpio_leds
+#define DT_N_S_leds_P_compatible_IDX_0_STRING_UPPER_TOKEN GPIO_LEDS
+#define DT_N_S_leds_P_compatible_IDX_0_EXISTS 1
+#define DT_N_S_leds_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_leds, compatible, 0)
+#define DT_N_S_leds_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_leds, compatible, 0)
+#define DT_N_S_leds_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_leds, compatible, 0, __VA_ARGS__)
+#define DT_N_S_leds_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_leds, compatible, 0, __VA_ARGS__)
+#define DT_N_S_leds_P_compatible_LEN 1
+#define DT_N_S_leds_P_compatible_EXISTS 1
+
+/*
+ * Devicetree node: /leds/led_0
+ *
+ * Node identifier: DT_N_S_leds_S_led_0
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_leds_S_led_0_PATH "/leds/led_0"
+
+/* Node's name with unit-address: */
+#define DT_N_S_leds_S_led_0_FULL_NAME "led_0"
+
+/* Node parent (/leds) identifier: */
+#define DT_N_S_leds_S_led_0_PARENT DT_N_S_leds
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_leds_S_led_0_CHILD_IDX 0
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_leds_S_led_0_CHILD_NUM 0
+#define DT_N_S_leds_S_led_0_CHILD_NUM_STATUS_OKAY 0
+#define DT_N_S_leds_S_led_0_FOREACH_CHILD(fn) 
+#define DT_N_S_leds_S_led_0_FOREACH_CHILD_SEP(fn, sep) 
+#define DT_N_S_leds_S_led_0_FOREACH_CHILD_VARGS(fn, ...) 
+#define DT_N_S_leds_S_led_0_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
+#define DT_N_S_leds_S_led_0_FOREACH_CHILD_STATUS_OKAY(fn) 
+#define DT_N_S_leds_S_led_0_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
+#define DT_N_S_leds_S_led_0_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
+#define DT_N_S_leds_S_led_0_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 
+
+/* Node's dependency ordinal: */
+#define DT_N_S_leds_S_led_0_ORD 23
+#define DT_N_S_leds_S_led_0_ORD_STR_SORTABLE 00023
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_leds_S_led_0_REQUIRES_ORDS \
+	10, /* /soc/peripheral@50000000/gpio@842500 */ \
+	22, /* /leds */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_leds_S_led_0_SUPPORTS_ORDS /* nothing */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_leds_S_led_0_EXISTS 1
+#define DT_N_ALIAS_led0            DT_N_S_leds_S_led_0
+#define DT_N_ALIAS_bootloader_led0 DT_N_S_leds_S_led_0
+#define DT_N_ALIAS_mcuboot_led0    DT_N_S_leds_S_led_0
+#define DT_N_NODELABEL_led0        DT_N_S_leds_S_led_0
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_leds_S_led_0_REG_NUM 0
+#define DT_N_S_leds_S_led_0_RANGES_NUM 0
+#define DT_N_S_leds_S_led_0_FOREACH_RANGE(fn) 
+#define DT_N_S_leds_S_led_0_IRQ_NUM 0
+#define DT_N_S_leds_S_led_0_IRQ_LEVEL 0
+#define DT_N_S_leds_S_led_0_STATUS_okay 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_leds_S_led_0_PINCTRL_NUM 0
+
+/* Generic property macros: */
+#define DT_N_S_leds_S_led_0_P_gpios_IDX_0_EXISTS 1
+#define DT_N_S_leds_S_led_0_P_gpios_IDX_0_PH DT_N_S_soc_S_peripheral_50000000_S_gpio_842500
+#define DT_N_S_leds_S_led_0_P_gpios_IDX_0_VAL_pin 0
+#define DT_N_S_leds_S_led_0_P_gpios_IDX_0_VAL_pin_EXISTS 1
+#define DT_N_S_leds_S_led_0_P_gpios_IDX_0_VAL_flags 0
+#define DT_N_S_leds_S_led_0_P_gpios_IDX_0_VAL_flags_EXISTS 1
+#define DT_N_S_leds_S_led_0_P_gpios_FOREACH_PROP_ELEM(fn) fn(DT_N_S_leds_S_led_0, gpios, 0)
+#define DT_N_S_leds_S_led_0_P_gpios_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_leds_S_led_0, gpios, 0)
+#define DT_N_S_leds_S_led_0_P_gpios_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_leds_S_led_0, gpios, 0, __VA_ARGS__)
+#define DT_N_S_leds_S_led_0_P_gpios_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_leds_S_led_0, gpios, 0, __VA_ARGS__)
+#define DT_N_S_leds_S_led_0_P_gpios_LEN 1
+#define DT_N_S_leds_S_led_0_P_gpios_EXISTS 1
+#define DT_N_S_leds_S_led_0_P_label "Green LED 1"
+#define DT_N_S_leds_S_led_0_P_label_STRING_UNQUOTED Green LED 1
+#define DT_N_S_leds_S_led_0_P_label_STRING_TOKEN Green_LED_1
+#define DT_N_S_leds_S_led_0_P_label_STRING_UPPER_TOKEN GREEN_LED_1
+#define DT_N_S_leds_S_led_0_P_label_IDX_0 "Green LED 1"
+#define DT_N_S_leds_S_led_0_P_label_IDX_0_EXISTS 1
+#define DT_N_S_leds_S_led_0_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_leds_S_led_0, label, 0)
+#define DT_N_S_leds_S_led_0_P_label_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_leds_S_led_0, label, 0)
+#define DT_N_S_leds_S_led_0_P_label_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_leds_S_led_0, label, 0, __VA_ARGS__)
+#define DT_N_S_leds_S_led_0_P_label_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_leds_S_led_0, label, 0, __VA_ARGS__)
+#define DT_N_S_leds_S_led_0_P_label_LEN 1
+#define DT_N_S_leds_S_led_0_P_label_EXISTS 1
+
+/*
+ * Devicetree node: /leds/led_1
+ *
+ * Node identifier: DT_N_S_leds_S_led_1
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_leds_S_led_1_PATH "/leds/led_1"
+
+/* Node's name with unit-address: */
+#define DT_N_S_leds_S_led_1_FULL_NAME "led_1"
+
+/* Node parent (/leds) identifier: */
+#define DT_N_S_leds_S_led_1_PARENT DT_N_S_leds
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_leds_S_led_1_CHILD_IDX 1
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_leds_S_led_1_CHILD_NUM 0
+#define DT_N_S_leds_S_led_1_CHILD_NUM_STATUS_OKAY 0
+#define DT_N_S_leds_S_led_1_FOREACH_CHILD(fn) 
+#define DT_N_S_leds_S_led_1_FOREACH_CHILD_SEP(fn, sep) 
+#define DT_N_S_leds_S_led_1_FOREACH_CHILD_VARGS(fn, ...) 
+#define DT_N_S_leds_S_led_1_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
+#define DT_N_S_leds_S_led_1_FOREACH_CHILD_STATUS_OKAY(fn) 
+#define DT_N_S_leds_S_led_1_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
+#define DT_N_S_leds_S_led_1_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
+#define DT_N_S_leds_S_led_1_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 
+
+/* Node's dependency ordinal: */
+#define DT_N_S_leds_S_led_1_ORD 24
+#define DT_N_S_leds_S_led_1_ORD_STR_SORTABLE 00024
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_leds_S_led_1_REQUIRES_ORDS \
+	10, /* /soc/peripheral@50000000/gpio@842500 */ \
+	22, /* /leds */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_leds_S_led_1_SUPPORTS_ORDS /* nothing */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_leds_S_led_1_EXISTS 1
+#define DT_N_ALIAS_led1     DT_N_S_leds_S_led_1
+#define DT_N_NODELABEL_led1 DT_N_S_leds_S_led_1
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_leds_S_led_1_REG_NUM 0
+#define DT_N_S_leds_S_led_1_RANGES_NUM 0
+#define DT_N_S_leds_S_led_1_FOREACH_RANGE(fn) 
+#define DT_N_S_leds_S_led_1_IRQ_NUM 0
+#define DT_N_S_leds_S_led_1_IRQ_LEVEL 0
+#define DT_N_S_leds_S_led_1_STATUS_okay 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_leds_S_led_1_PINCTRL_NUM 0
+
+/* Generic property macros: */
+#define DT_N_S_leds_S_led_1_P_gpios_IDX_0_EXISTS 1
+#define DT_N_S_leds_S_led_1_P_gpios_IDX_0_PH DT_N_S_soc_S_peripheral_50000000_S_gpio_842500
+#define DT_N_S_leds_S_led_1_P_gpios_IDX_0_VAL_pin 1
+#define DT_N_S_leds_S_led_1_P_gpios_IDX_0_VAL_pin_EXISTS 1
+#define DT_N_S_leds_S_led_1_P_gpios_IDX_0_VAL_flags 0
+#define DT_N_S_leds_S_led_1_P_gpios_IDX_0_VAL_flags_EXISTS 1
+#define DT_N_S_leds_S_led_1_P_gpios_FOREACH_PROP_ELEM(fn) fn(DT_N_S_leds_S_led_1, gpios, 0)
+#define DT_N_S_leds_S_led_1_P_gpios_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_leds_S_led_1, gpios, 0)
+#define DT_N_S_leds_S_led_1_P_gpios_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_leds_S_led_1, gpios, 0, __VA_ARGS__)
+#define DT_N_S_leds_S_led_1_P_gpios_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_leds_S_led_1, gpios, 0, __VA_ARGS__)
+#define DT_N_S_leds_S_led_1_P_gpios_LEN 1
+#define DT_N_S_leds_S_led_1_P_gpios_EXISTS 1
+#define DT_N_S_leds_S_led_1_P_label "Green LED 2"
+#define DT_N_S_leds_S_led_1_P_label_STRING_UNQUOTED Green LED 2
+#define DT_N_S_leds_S_led_1_P_label_STRING_TOKEN Green_LED_2
+#define DT_N_S_leds_S_led_1_P_label_STRING_UPPER_TOKEN GREEN_LED_2
+#define DT_N_S_leds_S_led_1_P_label_IDX_0 "Green LED 2"
+#define DT_N_S_leds_S_led_1_P_label_IDX_0_EXISTS 1
+#define DT_N_S_leds_S_led_1_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_leds_S_led_1, label, 0)
+#define DT_N_S_leds_S_led_1_P_label_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_leds_S_led_1, label, 0)
+#define DT_N_S_leds_S_led_1_P_label_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_leds_S_led_1, label, 0, __VA_ARGS__)
+#define DT_N_S_leds_S_led_1_P_label_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_leds_S_led_1, label, 0, __VA_ARGS__)
+#define DT_N_S_leds_S_led_1_P_label_LEN 1
+#define DT_N_S_leds_S_led_1_P_label_EXISTS 1
+
+/*
+ * Devicetree node: /leds/led_2
+ *
+ * Node identifier: DT_N_S_leds_S_led_2
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_leds_S_led_2_PATH "/leds/led_2"
+
+/* Node's name with unit-address: */
+#define DT_N_S_leds_S_led_2_FULL_NAME "led_2"
+
+/* Node parent (/leds) identifier: */
+#define DT_N_S_leds_S_led_2_PARENT DT_N_S_leds
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_leds_S_led_2_CHILD_IDX 2
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_leds_S_led_2_CHILD_NUM 0
+#define DT_N_S_leds_S_led_2_CHILD_NUM_STATUS_OKAY 0
+#define DT_N_S_leds_S_led_2_FOREACH_CHILD(fn) 
+#define DT_N_S_leds_S_led_2_FOREACH_CHILD_SEP(fn, sep) 
+#define DT_N_S_leds_S_led_2_FOREACH_CHILD_VARGS(fn, ...) 
+#define DT_N_S_leds_S_led_2_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
+#define DT_N_S_leds_S_led_2_FOREACH_CHILD_STATUS_OKAY(fn) 
+#define DT_N_S_leds_S_led_2_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
+#define DT_N_S_leds_S_led_2_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
+#define DT_N_S_leds_S_led_2_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 
+
+/* Node's dependency ordinal: */
+#define DT_N_S_leds_S_led_2_ORD 25
+#define DT_N_S_leds_S_led_2_ORD_STR_SORTABLE 00025
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_leds_S_led_2_REQUIRES_ORDS \
+	10, /* /soc/peripheral@50000000/gpio@842500 */ \
+	22, /* /leds */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_leds_S_led_2_SUPPORTS_ORDS /* nothing */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_leds_S_led_2_EXISTS 1
+#define DT_N_ALIAS_led2     DT_N_S_leds_S_led_2
+#define DT_N_NODELABEL_led2 DT_N_S_leds_S_led_2
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_leds_S_led_2_REG_NUM 0
+#define DT_N_S_leds_S_led_2_RANGES_NUM 0
+#define DT_N_S_leds_S_led_2_FOREACH_RANGE(fn) 
+#define DT_N_S_leds_S_led_2_IRQ_NUM 0
+#define DT_N_S_leds_S_led_2_IRQ_LEVEL 0
+#define DT_N_S_leds_S_led_2_STATUS_okay 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_leds_S_led_2_PINCTRL_NUM 0
+
+/* Generic property macros: */
+#define DT_N_S_leds_S_led_2_P_gpios_IDX_0_EXISTS 1
+#define DT_N_S_leds_S_led_2_P_gpios_IDX_0_PH DT_N_S_soc_S_peripheral_50000000_S_gpio_842500
+#define DT_N_S_leds_S_led_2_P_gpios_IDX_0_VAL_pin 4
+#define DT_N_S_leds_S_led_2_P_gpios_IDX_0_VAL_pin_EXISTS 1
+#define DT_N_S_leds_S_led_2_P_gpios_IDX_0_VAL_flags 0
+#define DT_N_S_leds_S_led_2_P_gpios_IDX_0_VAL_flags_EXISTS 1
+#define DT_N_S_leds_S_led_2_P_gpios_FOREACH_PROP_ELEM(fn) fn(DT_N_S_leds_S_led_2, gpios, 0)
+#define DT_N_S_leds_S_led_2_P_gpios_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_leds_S_led_2, gpios, 0)
+#define DT_N_S_leds_S_led_2_P_gpios_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_leds_S_led_2, gpios, 0, __VA_ARGS__)
+#define DT_N_S_leds_S_led_2_P_gpios_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_leds_S_led_2, gpios, 0, __VA_ARGS__)
+#define DT_N_S_leds_S_led_2_P_gpios_LEN 1
+#define DT_N_S_leds_S_led_2_P_gpios_EXISTS 1
+#define DT_N_S_leds_S_led_2_P_label "Green LED 3"
+#define DT_N_S_leds_S_led_2_P_label_STRING_UNQUOTED Green LED 3
+#define DT_N_S_leds_S_led_2_P_label_STRING_TOKEN Green_LED_3
+#define DT_N_S_leds_S_led_2_P_label_STRING_UPPER_TOKEN GREEN_LED_3
+#define DT_N_S_leds_S_led_2_P_label_IDX_0 "Green LED 3"
+#define DT_N_S_leds_S_led_2_P_label_IDX_0_EXISTS 1
+#define DT_N_S_leds_S_led_2_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_leds_S_led_2, label, 0)
+#define DT_N_S_leds_S_led_2_P_label_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_leds_S_led_2, label, 0)
+#define DT_N_S_leds_S_led_2_P_label_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_leds_S_led_2, label, 0, __VA_ARGS__)
+#define DT_N_S_leds_S_led_2_P_label_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_leds_S_led_2, label, 0, __VA_ARGS__)
+#define DT_N_S_leds_S_led_2_P_label_LEN 1
+#define DT_N_S_leds_S_led_2_P_label_EXISTS 1
+
+/*
+ * Devicetree node: /leds/led_3
+ *
+ * Node identifier: DT_N_S_leds_S_led_3
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_leds_S_led_3_PATH "/leds/led_3"
+
+/* Node's name with unit-address: */
+#define DT_N_S_leds_S_led_3_FULL_NAME "led_3"
+
+/* Node parent (/leds) identifier: */
+#define DT_N_S_leds_S_led_3_PARENT DT_N_S_leds
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_leds_S_led_3_CHILD_IDX 3
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_leds_S_led_3_CHILD_NUM 0
+#define DT_N_S_leds_S_led_3_CHILD_NUM_STATUS_OKAY 0
+#define DT_N_S_leds_S_led_3_FOREACH_CHILD(fn) 
+#define DT_N_S_leds_S_led_3_FOREACH_CHILD_SEP(fn, sep) 
+#define DT_N_S_leds_S_led_3_FOREACH_CHILD_VARGS(fn, ...) 
+#define DT_N_S_leds_S_led_3_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
+#define DT_N_S_leds_S_led_3_FOREACH_CHILD_STATUS_OKAY(fn) 
+#define DT_N_S_leds_S_led_3_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
+#define DT_N_S_leds_S_led_3_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
+#define DT_N_S_leds_S_led_3_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 
+
+/* Node's dependency ordinal: */
+#define DT_N_S_leds_S_led_3_ORD 26
+#define DT_N_S_leds_S_led_3_ORD_STR_SORTABLE 00026
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_leds_S_led_3_REQUIRES_ORDS \
+	10, /* /soc/peripheral@50000000/gpio@842500 */ \
+	22, /* /leds */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_leds_S_led_3_SUPPORTS_ORDS /* nothing */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_leds_S_led_3_EXISTS 1
+#define DT_N_ALIAS_led3     DT_N_S_leds_S_led_3
+#define DT_N_NODELABEL_led3 DT_N_S_leds_S_led_3
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_leds_S_led_3_REG_NUM 0
+#define DT_N_S_leds_S_led_3_RANGES_NUM 0
+#define DT_N_S_leds_S_led_3_FOREACH_RANGE(fn) 
+#define DT_N_S_leds_S_led_3_IRQ_NUM 0
+#define DT_N_S_leds_S_led_3_IRQ_LEVEL 0
+#define DT_N_S_leds_S_led_3_STATUS_okay 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_leds_S_led_3_PINCTRL_NUM 0
+
+/* Generic property macros: */
+#define DT_N_S_leds_S_led_3_P_gpios_IDX_0_EXISTS 1
+#define DT_N_S_leds_S_led_3_P_gpios_IDX_0_PH DT_N_S_soc_S_peripheral_50000000_S_gpio_842500
+#define DT_N_S_leds_S_led_3_P_gpios_IDX_0_VAL_pin 5
+#define DT_N_S_leds_S_led_3_P_gpios_IDX_0_VAL_pin_EXISTS 1
+#define DT_N_S_leds_S_led_3_P_gpios_IDX_0_VAL_flags 0
+#define DT_N_S_leds_S_led_3_P_gpios_IDX_0_VAL_flags_EXISTS 1
+#define DT_N_S_leds_S_led_3_P_gpios_FOREACH_PROP_ELEM(fn) fn(DT_N_S_leds_S_led_3, gpios, 0)
+#define DT_N_S_leds_S_led_3_P_gpios_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_leds_S_led_3, gpios, 0)
+#define DT_N_S_leds_S_led_3_P_gpios_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_leds_S_led_3, gpios, 0, __VA_ARGS__)
+#define DT_N_S_leds_S_led_3_P_gpios_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_leds_S_led_3, gpios, 0, __VA_ARGS__)
+#define DT_N_S_leds_S_led_3_P_gpios_LEN 1
+#define DT_N_S_leds_S_led_3_P_gpios_EXISTS 1
+#define DT_N_S_leds_S_led_3_P_label "Green LED 4"
+#define DT_N_S_leds_S_led_3_P_label_STRING_UNQUOTED Green LED 4
+#define DT_N_S_leds_S_led_3_P_label_STRING_TOKEN Green_LED_4
+#define DT_N_S_leds_S_led_3_P_label_STRING_UPPER_TOKEN GREEN_LED_4
+#define DT_N_S_leds_S_led_3_P_label_IDX_0 "Green LED 4"
+#define DT_N_S_leds_S_led_3_P_label_IDX_0_EXISTS 1
+#define DT_N_S_leds_S_led_3_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_leds_S_led_3, label, 0)
+#define DT_N_S_leds_S_led_3_P_label_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_leds_S_led_3, label, 0)
+#define DT_N_S_leds_S_led_3_P_label_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_leds_S_led_3, label, 0, __VA_ARGS__)
+#define DT_N_S_leds_S_led_3_P_label_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_leds_S_led_3, label, 0, __VA_ARGS__)
+#define DT_N_S_leds_S_led_3_P_label_LEN 1
+#define DT_N_S_leds_S_led_3_P_label_EXISTS 1
+
+/*
+ * Devicetree node: /pin-controller
+ *
+ * Node identifier: DT_N_S_pin_controller
+ *
+ * Binding (compatible = nordic,nrf-pinctrl):
+ *   $ZEPHYR_BASE/dts/bindings/pinctrl/nordic,nrf-pinctrl.yaml
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_pin_controller_PATH "/pin-controller"
+
+/* Node's name with unit-address: */
+#define DT_N_S_pin_controller_FULL_NAME "pin-controller"
+
+/* Node parent (/) identifier: */
+#define DT_N_S_pin_controller_PARENT DT_N
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_pin_controller_CHILD_IDX 3
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_pin_controller_CHILD_NUM 10
+#define DT_N_S_pin_controller_CHILD_NUM_STATUS_OKAY 10
+#define DT_N_S_pin_controller_FOREACH_CHILD(fn) fn(DT_N_S_pin_controller_S_uart0_default) fn(DT_N_S_pin_controller_S_uart0_sleep) fn(DT_N_S_pin_controller_S_uart1_default) fn(DT_N_S_pin_controller_S_uart1_sleep) fn(DT_N_S_pin_controller_S_i2c2_default) fn(DT_N_S_pin_controller_S_i2c2_sleep) fn(DT_N_S_pin_controller_S_pwm0_default) fn(DT_N_S_pin_controller_S_pwm0_sleep) fn(DT_N_S_pin_controller_S_spi3_default) fn(DT_N_S_pin_controller_S_spi3_sleep)
+#define DT_N_S_pin_controller_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_pin_controller_S_uart0_default) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pin_controller_S_uart0_sleep) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pin_controller_S_uart1_default) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pin_controller_S_uart1_sleep) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pin_controller_S_i2c2_default) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pin_controller_S_i2c2_sleep) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pin_controller_S_pwm0_default) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pin_controller_S_pwm0_sleep) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pin_controller_S_spi3_default) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pin_controller_S_spi3_sleep)
+#define DT_N_S_pin_controller_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_pin_controller_S_uart0_default, __VA_ARGS__) fn(DT_N_S_pin_controller_S_uart0_sleep, __VA_ARGS__) fn(DT_N_S_pin_controller_S_uart1_default, __VA_ARGS__) fn(DT_N_S_pin_controller_S_uart1_sleep, __VA_ARGS__) fn(DT_N_S_pin_controller_S_i2c2_default, __VA_ARGS__) fn(DT_N_S_pin_controller_S_i2c2_sleep, __VA_ARGS__) fn(DT_N_S_pin_controller_S_pwm0_default, __VA_ARGS__) fn(DT_N_S_pin_controller_S_pwm0_sleep, __VA_ARGS__) fn(DT_N_S_pin_controller_S_spi3_default, __VA_ARGS__) fn(DT_N_S_pin_controller_S_spi3_sleep, __VA_ARGS__)
+#define DT_N_S_pin_controller_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_pin_controller_S_uart0_default, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pin_controller_S_uart0_sleep, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pin_controller_S_uart1_default, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pin_controller_S_uart1_sleep, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pin_controller_S_i2c2_default, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pin_controller_S_i2c2_sleep, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pin_controller_S_pwm0_default, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pin_controller_S_pwm0_sleep, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pin_controller_S_spi3_default, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pin_controller_S_spi3_sleep, __VA_ARGS__)
+#define DT_N_S_pin_controller_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_pin_controller_S_uart0_default) fn(DT_N_S_pin_controller_S_uart0_sleep) fn(DT_N_S_pin_controller_S_uart1_default) fn(DT_N_S_pin_controller_S_uart1_sleep) fn(DT_N_S_pin_controller_S_i2c2_default) fn(DT_N_S_pin_controller_S_i2c2_sleep) fn(DT_N_S_pin_controller_S_pwm0_default) fn(DT_N_S_pin_controller_S_pwm0_sleep) fn(DT_N_S_pin_controller_S_spi3_default) fn(DT_N_S_pin_controller_S_spi3_sleep)
+#define DT_N_S_pin_controller_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_pin_controller_S_uart0_default) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pin_controller_S_uart0_sleep) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pin_controller_S_uart1_default) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pin_controller_S_uart1_sleep) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pin_controller_S_i2c2_default) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pin_controller_S_i2c2_sleep) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pin_controller_S_pwm0_default) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pin_controller_S_pwm0_sleep) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pin_controller_S_spi3_default) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pin_controller_S_spi3_sleep)
+#define DT_N_S_pin_controller_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_pin_controller_S_uart0_default, __VA_ARGS__) fn(DT_N_S_pin_controller_S_uart0_sleep, __VA_ARGS__) fn(DT_N_S_pin_controller_S_uart1_default, __VA_ARGS__) fn(DT_N_S_pin_controller_S_uart1_sleep, __VA_ARGS__) fn(DT_N_S_pin_controller_S_i2c2_default, __VA_ARGS__) fn(DT_N_S_pin_controller_S_i2c2_sleep, __VA_ARGS__) fn(DT_N_S_pin_controller_S_pwm0_default, __VA_ARGS__) fn(DT_N_S_pin_controller_S_pwm0_sleep, __VA_ARGS__) fn(DT_N_S_pin_controller_S_spi3_default, __VA_ARGS__) fn(DT_N_S_pin_controller_S_spi3_sleep, __VA_ARGS__)
+#define DT_N_S_pin_controller_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_pin_controller_S_uart0_default, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pin_controller_S_uart0_sleep, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pin_controller_S_uart1_default, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pin_controller_S_uart1_sleep, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pin_controller_S_i2c2_default, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pin_controller_S_i2c2_sleep, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pin_controller_S_pwm0_default, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pin_controller_S_pwm0_sleep, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pin_controller_S_spi3_default, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pin_controller_S_spi3_sleep, __VA_ARGS__)
+
+/* Node's dependency ordinal: */
+#define DT_N_S_pin_controller_ORD 27
+#define DT_N_S_pin_controller_ORD_STR_SORTABLE 00027
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_pin_controller_REQUIRES_ORDS \
+	0, /* / */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_pin_controller_SUPPORTS_ORDS \
+	28, /* /pin-controller/i2c2_default */ \
+	30, /* /pin-controller/i2c2_sleep */ \
+	32, /* /pin-controller/pwm0_default */ \
+	34, /* /pin-controller/pwm0_sleep */ \
+	36, /* /pin-controller/spi3_default */ \
+	38, /* /pin-controller/spi3_sleep */ \
+	40, /* /pin-controller/uart0_default */ \
+	43, /* /pin-controller/uart0_sleep */ \
+	45, /* /pin-controller/uart1_default */ \
+	48, /* /pin-controller/uart1_sleep */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_pin_controller_EXISTS 1
+#define DT_N_INST_0_nordic_nrf_pinctrl DT_N_S_pin_controller
+#define DT_N_NODELABEL_pinctrl         DT_N_S_pin_controller
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_pin_controller_REG_NUM 0
+#define DT_N_S_pin_controller_RANGES_NUM 0
+#define DT_N_S_pin_controller_FOREACH_RANGE(fn) 
+#define DT_N_S_pin_controller_IRQ_NUM 0
+#define DT_N_S_pin_controller_IRQ_LEVEL 0
+#define DT_N_S_pin_controller_COMPAT_MATCHES_nordic_nrf_pinctrl 1
+#define DT_N_S_pin_controller_COMPAT_VENDOR_IDX_0_EXISTS 1
+#define DT_N_S_pin_controller_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
+#define DT_N_S_pin_controller_COMPAT_MODEL_IDX_0_EXISTS 1
+#define DT_N_S_pin_controller_COMPAT_MODEL_IDX_0 "nrf-pinctrl"
+#define DT_N_S_pin_controller_STATUS_okay 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_pin_controller_PINCTRL_NUM 0
+
+/* Generic property macros: */
+#define DT_N_S_pin_controller_P_wakeup_source 0
+#define DT_N_S_pin_controller_P_wakeup_source_EXISTS 1
+#define DT_N_S_pin_controller_P_zephyr_pm_device_runtime_auto 0
+#define DT_N_S_pin_controller_P_zephyr_pm_device_runtime_auto_EXISTS 1
+#define DT_N_S_pin_controller_P_compatible {"nordic,nrf-pinctrl"}
+#define DT_N_S_pin_controller_P_compatible_IDX_0 "nordic,nrf-pinctrl"
+#define DT_N_S_pin_controller_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-pinctrl
+#define DT_N_S_pin_controller_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_pinctrl
+#define DT_N_S_pin_controller_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_PINCTRL
+#define DT_N_S_pin_controller_P_compatible_IDX_0_EXISTS 1
+#define DT_N_S_pin_controller_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_pin_controller, compatible, 0)
+#define DT_N_S_pin_controller_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_pin_controller, compatible, 0)
+#define DT_N_S_pin_controller_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_pin_controller, compatible, 0, __VA_ARGS__)
+#define DT_N_S_pin_controller_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_pin_controller, compatible, 0, __VA_ARGS__)
+#define DT_N_S_pin_controller_P_compatible_LEN 1
+#define DT_N_S_pin_controller_P_compatible_EXISTS 1
+#define DT_N_S_pin_controller_P_zephyr_deferred_init 0
+#define DT_N_S_pin_controller_P_zephyr_deferred_init_EXISTS 1
+
+/*
+ * Devicetree node: /pin-controller/i2c2_default
+ *
+ * Node identifier: DT_N_S_pin_controller_S_i2c2_default
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_pin_controller_S_i2c2_default_PATH "/pin-controller/i2c2_default"
+
+/* Node's name with unit-address: */
+#define DT_N_S_pin_controller_S_i2c2_default_FULL_NAME "i2c2_default"
+
+/* Node parent (/pin-controller) identifier: */
+#define DT_N_S_pin_controller_S_i2c2_default_PARENT DT_N_S_pin_controller
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_pin_controller_S_i2c2_default_CHILD_IDX 4
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_pin_controller_S_i2c2_default_CHILD_NUM 1
+#define DT_N_S_pin_controller_S_i2c2_default_CHILD_NUM_STATUS_OKAY 1
+#define DT_N_S_pin_controller_S_i2c2_default_FOREACH_CHILD(fn) fn(DT_N_S_pin_controller_S_i2c2_default_S_group1)
+#define DT_N_S_pin_controller_S_i2c2_default_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_pin_controller_S_i2c2_default_S_group1)
+#define DT_N_S_pin_controller_S_i2c2_default_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_pin_controller_S_i2c2_default_S_group1, __VA_ARGS__)
+#define DT_N_S_pin_controller_S_i2c2_default_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_pin_controller_S_i2c2_default_S_group1, __VA_ARGS__)
+#define DT_N_S_pin_controller_S_i2c2_default_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_pin_controller_S_i2c2_default_S_group1)
+#define DT_N_S_pin_controller_S_i2c2_default_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_pin_controller_S_i2c2_default_S_group1)
+#define DT_N_S_pin_controller_S_i2c2_default_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_pin_controller_S_i2c2_default_S_group1, __VA_ARGS__)
+#define DT_N_S_pin_controller_S_i2c2_default_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_pin_controller_S_i2c2_default_S_group1, __VA_ARGS__)
+
+/* Node's dependency ordinal: */
+#define DT_N_S_pin_controller_S_i2c2_default_ORD 28
+#define DT_N_S_pin_controller_S_i2c2_default_ORD_STR_SORTABLE 00028
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_pin_controller_S_i2c2_default_REQUIRES_ORDS \
+	27, /* /pin-controller */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_pin_controller_S_i2c2_default_SUPPORTS_ORDS \
+	29, /* /pin-controller/i2c2_default/group1 */ \
+	107, /* /soc/peripheral@50000000/i2c@a000 */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_pin_controller_S_i2c2_default_EXISTS 1
+#define DT_N_NODELABEL_i2c2_default DT_N_S_pin_controller_S_i2c2_default
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_pin_controller_S_i2c2_default_REG_NUM 0
+#define DT_N_S_pin_controller_S_i2c2_default_RANGES_NUM 0
+#define DT_N_S_pin_controller_S_i2c2_default_FOREACH_RANGE(fn) 
+#define DT_N_S_pin_controller_S_i2c2_default_IRQ_NUM 0
+#define DT_N_S_pin_controller_S_i2c2_default_IRQ_LEVEL 0
+#define DT_N_S_pin_controller_S_i2c2_default_STATUS_okay 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_pin_controller_S_i2c2_default_PINCTRL_NUM 0
+
+/* (No generic property macros) */
+
+/*
+ * Devicetree node: /pin-controller/i2c2_default/group1
+ *
+ * Node identifier: DT_N_S_pin_controller_S_i2c2_default_S_group1
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_pin_controller_S_i2c2_default_S_group1_PATH "/pin-controller/i2c2_default/group1"
+
+/* Node's name with unit-address: */
+#define DT_N_S_pin_controller_S_i2c2_default_S_group1_FULL_NAME "group1"
+
+/* Node parent (/pin-controller/i2c2_default) identifier: */
+#define DT_N_S_pin_controller_S_i2c2_default_S_group1_PARENT DT_N_S_pin_controller_S_i2c2_default
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_pin_controller_S_i2c2_default_S_group1_CHILD_IDX 0
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_pin_controller_S_i2c2_default_S_group1_CHILD_NUM 0
+#define DT_N_S_pin_controller_S_i2c2_default_S_group1_CHILD_NUM_STATUS_OKAY 0
+#define DT_N_S_pin_controller_S_i2c2_default_S_group1_FOREACH_CHILD(fn) 
+#define DT_N_S_pin_controller_S_i2c2_default_S_group1_FOREACH_CHILD_SEP(fn, sep) 
+#define DT_N_S_pin_controller_S_i2c2_default_S_group1_FOREACH_CHILD_VARGS(fn, ...) 
+#define DT_N_S_pin_controller_S_i2c2_default_S_group1_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
+#define DT_N_S_pin_controller_S_i2c2_default_S_group1_FOREACH_CHILD_STATUS_OKAY(fn) 
+#define DT_N_S_pin_controller_S_i2c2_default_S_group1_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
+#define DT_N_S_pin_controller_S_i2c2_default_S_group1_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
+#define DT_N_S_pin_controller_S_i2c2_default_S_group1_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 
+
+/* Node's dependency ordinal: */
+#define DT_N_S_pin_controller_S_i2c2_default_S_group1_ORD 29
+#define DT_N_S_pin_controller_S_i2c2_default_S_group1_ORD_STR_SORTABLE 00029
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_pin_controller_S_i2c2_default_S_group1_REQUIRES_ORDS \
+	28, /* /pin-controller/i2c2_default */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_pin_controller_S_i2c2_default_S_group1_SUPPORTS_ORDS /* nothing */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_pin_controller_S_i2c2_default_S_group1_EXISTS 1
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_pin_controller_S_i2c2_default_S_group1_REG_NUM 0
+#define DT_N_S_pin_controller_S_i2c2_default_S_group1_RANGES_NUM 0
+#define DT_N_S_pin_controller_S_i2c2_default_S_group1_FOREACH_RANGE(fn) 
+#define DT_N_S_pin_controller_S_i2c2_default_S_group1_IRQ_NUM 0
+#define DT_N_S_pin_controller_S_i2c2_default_S_group1_IRQ_LEVEL 0
+#define DT_N_S_pin_controller_S_i2c2_default_S_group1_STATUS_okay 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_pin_controller_S_i2c2_default_S_group1_PINCTRL_NUM 0
+
+/* Generic property macros: */
+#define DT_N_S_pin_controller_S_i2c2_default_S_group1_P_bias_disable 0
+#define DT_N_S_pin_controller_S_i2c2_default_S_group1_P_bias_disable_EXISTS 1
+#define DT_N_S_pin_controller_S_i2c2_default_S_group1_P_bias_pull_up 0
+#define DT_N_S_pin_controller_S_i2c2_default_S_group1_P_bias_pull_up_EXISTS 1
+#define DT_N_S_pin_controller_S_i2c2_default_S_group1_P_bias_pull_down 0
+#define DT_N_S_pin_controller_S_i2c2_default_S_group1_P_bias_pull_down_EXISTS 1
+#define DT_N_S_pin_controller_S_i2c2_default_S_group1_P_low_power_enable 0
+#define DT_N_S_pin_controller_S_i2c2_default_S_group1_P_low_power_enable_EXISTS 1
+#define DT_N_S_pin_controller_S_i2c2_default_S_group1_P_psels {1572894 /* 0x18001e */, 1441823 /* 0x16001f */}
+#define DT_N_S_pin_controller_S_i2c2_default_S_group1_P_psels_IDX_0 1572894
+#define DT_N_S_pin_controller_S_i2c2_default_S_group1_P_psels_IDX_0_EXISTS 1
+#define DT_N_S_pin_controller_S_i2c2_default_S_group1_P_psels_IDX_1 1441823
+#define DT_N_S_pin_controller_S_i2c2_default_S_group1_P_psels_IDX_1_EXISTS 1
+#define DT_N_S_pin_controller_S_i2c2_default_S_group1_P_psels_FOREACH_PROP_ELEM(fn) fn(DT_N_S_pin_controller_S_i2c2_default_S_group1, psels, 0) \
+	fn(DT_N_S_pin_controller_S_i2c2_default_S_group1, psels, 1)
+#define DT_N_S_pin_controller_S_i2c2_default_S_group1_P_psels_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_pin_controller_S_i2c2_default_S_group1, psels, 0) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_pin_controller_S_i2c2_default_S_group1, psels, 1)
+#define DT_N_S_pin_controller_S_i2c2_default_S_group1_P_psels_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_pin_controller_S_i2c2_default_S_group1, psels, 0, __VA_ARGS__) \
+	fn(DT_N_S_pin_controller_S_i2c2_default_S_group1, psels, 1, __VA_ARGS__)
+#define DT_N_S_pin_controller_S_i2c2_default_S_group1_P_psels_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_pin_controller_S_i2c2_default_S_group1, psels, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_pin_controller_S_i2c2_default_S_group1, psels, 1, __VA_ARGS__)
+#define DT_N_S_pin_controller_S_i2c2_default_S_group1_P_psels_LEN 2
+#define DT_N_S_pin_controller_S_i2c2_default_S_group1_P_psels_EXISTS 1
+#define DT_N_S_pin_controller_S_i2c2_default_S_group1_P_nordic_drive_mode 0
+#define DT_N_S_pin_controller_S_i2c2_default_S_group1_P_nordic_drive_mode_EXISTS 1
+#define DT_N_S_pin_controller_S_i2c2_default_S_group1_P_nordic_invert 0
+#define DT_N_S_pin_controller_S_i2c2_default_S_group1_P_nordic_invert_EXISTS 1
+
+/*
+ * Devicetree node: /pin-controller/i2c2_sleep
+ *
+ * Node identifier: DT_N_S_pin_controller_S_i2c2_sleep
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_pin_controller_S_i2c2_sleep_PATH "/pin-controller/i2c2_sleep"
+
+/* Node's name with unit-address: */
+#define DT_N_S_pin_controller_S_i2c2_sleep_FULL_NAME "i2c2_sleep"
+
+/* Node parent (/pin-controller) identifier: */
+#define DT_N_S_pin_controller_S_i2c2_sleep_PARENT DT_N_S_pin_controller
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_pin_controller_S_i2c2_sleep_CHILD_IDX 5
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_pin_controller_S_i2c2_sleep_CHILD_NUM 1
+#define DT_N_S_pin_controller_S_i2c2_sleep_CHILD_NUM_STATUS_OKAY 1
+#define DT_N_S_pin_controller_S_i2c2_sleep_FOREACH_CHILD(fn) fn(DT_N_S_pin_controller_S_i2c2_sleep_S_group1)
+#define DT_N_S_pin_controller_S_i2c2_sleep_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_pin_controller_S_i2c2_sleep_S_group1)
+#define DT_N_S_pin_controller_S_i2c2_sleep_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_pin_controller_S_i2c2_sleep_S_group1, __VA_ARGS__)
+#define DT_N_S_pin_controller_S_i2c2_sleep_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_pin_controller_S_i2c2_sleep_S_group1, __VA_ARGS__)
+#define DT_N_S_pin_controller_S_i2c2_sleep_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_pin_controller_S_i2c2_sleep_S_group1)
+#define DT_N_S_pin_controller_S_i2c2_sleep_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_pin_controller_S_i2c2_sleep_S_group1)
+#define DT_N_S_pin_controller_S_i2c2_sleep_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_pin_controller_S_i2c2_sleep_S_group1, __VA_ARGS__)
+#define DT_N_S_pin_controller_S_i2c2_sleep_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_pin_controller_S_i2c2_sleep_S_group1, __VA_ARGS__)
+
+/* Node's dependency ordinal: */
+#define DT_N_S_pin_controller_S_i2c2_sleep_ORD 30
+#define DT_N_S_pin_controller_S_i2c2_sleep_ORD_STR_SORTABLE 00030
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_pin_controller_S_i2c2_sleep_REQUIRES_ORDS \
+	27, /* /pin-controller */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_pin_controller_S_i2c2_sleep_SUPPORTS_ORDS \
+	31, /* /pin-controller/i2c2_sleep/group1 */ \
+	107, /* /soc/peripheral@50000000/i2c@a000 */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_pin_controller_S_i2c2_sleep_EXISTS 1
+#define DT_N_NODELABEL_i2c2_sleep DT_N_S_pin_controller_S_i2c2_sleep
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_pin_controller_S_i2c2_sleep_REG_NUM 0
+#define DT_N_S_pin_controller_S_i2c2_sleep_RANGES_NUM 0
+#define DT_N_S_pin_controller_S_i2c2_sleep_FOREACH_RANGE(fn) 
+#define DT_N_S_pin_controller_S_i2c2_sleep_IRQ_NUM 0
+#define DT_N_S_pin_controller_S_i2c2_sleep_IRQ_LEVEL 0
+#define DT_N_S_pin_controller_S_i2c2_sleep_STATUS_okay 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_pin_controller_S_i2c2_sleep_PINCTRL_NUM 0
+
+/* (No generic property macros) */
+
+/*
+ * Devicetree node: /pin-controller/i2c2_sleep/group1
+ *
+ * Node identifier: DT_N_S_pin_controller_S_i2c2_sleep_S_group1
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_pin_controller_S_i2c2_sleep_S_group1_PATH "/pin-controller/i2c2_sleep/group1"
+
+/* Node's name with unit-address: */
+#define DT_N_S_pin_controller_S_i2c2_sleep_S_group1_FULL_NAME "group1"
+
+/* Node parent (/pin-controller/i2c2_sleep) identifier: */
+#define DT_N_S_pin_controller_S_i2c2_sleep_S_group1_PARENT DT_N_S_pin_controller_S_i2c2_sleep
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_pin_controller_S_i2c2_sleep_S_group1_CHILD_IDX 0
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_pin_controller_S_i2c2_sleep_S_group1_CHILD_NUM 0
+#define DT_N_S_pin_controller_S_i2c2_sleep_S_group1_CHILD_NUM_STATUS_OKAY 0
+#define DT_N_S_pin_controller_S_i2c2_sleep_S_group1_FOREACH_CHILD(fn) 
+#define DT_N_S_pin_controller_S_i2c2_sleep_S_group1_FOREACH_CHILD_SEP(fn, sep) 
+#define DT_N_S_pin_controller_S_i2c2_sleep_S_group1_FOREACH_CHILD_VARGS(fn, ...) 
+#define DT_N_S_pin_controller_S_i2c2_sleep_S_group1_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
+#define DT_N_S_pin_controller_S_i2c2_sleep_S_group1_FOREACH_CHILD_STATUS_OKAY(fn) 
+#define DT_N_S_pin_controller_S_i2c2_sleep_S_group1_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
+#define DT_N_S_pin_controller_S_i2c2_sleep_S_group1_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
+#define DT_N_S_pin_controller_S_i2c2_sleep_S_group1_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 
+
+/* Node's dependency ordinal: */
+#define DT_N_S_pin_controller_S_i2c2_sleep_S_group1_ORD 31
+#define DT_N_S_pin_controller_S_i2c2_sleep_S_group1_ORD_STR_SORTABLE 00031
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_pin_controller_S_i2c2_sleep_S_group1_REQUIRES_ORDS \
+	30, /* /pin-controller/i2c2_sleep */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_pin_controller_S_i2c2_sleep_S_group1_SUPPORTS_ORDS /* nothing */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_pin_controller_S_i2c2_sleep_S_group1_EXISTS 1
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_pin_controller_S_i2c2_sleep_S_group1_REG_NUM 0
+#define DT_N_S_pin_controller_S_i2c2_sleep_S_group1_RANGES_NUM 0
+#define DT_N_S_pin_controller_S_i2c2_sleep_S_group1_FOREACH_RANGE(fn) 
+#define DT_N_S_pin_controller_S_i2c2_sleep_S_group1_IRQ_NUM 0
+#define DT_N_S_pin_controller_S_i2c2_sleep_S_group1_IRQ_LEVEL 0
+#define DT_N_S_pin_controller_S_i2c2_sleep_S_group1_STATUS_okay 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_pin_controller_S_i2c2_sleep_S_group1_PINCTRL_NUM 0
+
+/* Generic property macros: */
+#define DT_N_S_pin_controller_S_i2c2_sleep_S_group1_P_bias_disable 0
+#define DT_N_S_pin_controller_S_i2c2_sleep_S_group1_P_bias_disable_EXISTS 1
+#define DT_N_S_pin_controller_S_i2c2_sleep_S_group1_P_bias_pull_up 0
+#define DT_N_S_pin_controller_S_i2c2_sleep_S_group1_P_bias_pull_up_EXISTS 1
+#define DT_N_S_pin_controller_S_i2c2_sleep_S_group1_P_bias_pull_down 0
+#define DT_N_S_pin_controller_S_i2c2_sleep_S_group1_P_bias_pull_down_EXISTS 1
+#define DT_N_S_pin_controller_S_i2c2_sleep_S_group1_P_low_power_enable 1
+#define DT_N_S_pin_controller_S_i2c2_sleep_S_group1_P_low_power_enable_EXISTS 1
+#define DT_N_S_pin_controller_S_i2c2_sleep_S_group1_P_psels {1572894 /* 0x18001e */, 1441823 /* 0x16001f */}
+#define DT_N_S_pin_controller_S_i2c2_sleep_S_group1_P_psels_IDX_0 1572894
+#define DT_N_S_pin_controller_S_i2c2_sleep_S_group1_P_psels_IDX_0_EXISTS 1
+#define DT_N_S_pin_controller_S_i2c2_sleep_S_group1_P_psels_IDX_1 1441823
+#define DT_N_S_pin_controller_S_i2c2_sleep_S_group1_P_psels_IDX_1_EXISTS 1
+#define DT_N_S_pin_controller_S_i2c2_sleep_S_group1_P_psels_FOREACH_PROP_ELEM(fn) fn(DT_N_S_pin_controller_S_i2c2_sleep_S_group1, psels, 0) \
+	fn(DT_N_S_pin_controller_S_i2c2_sleep_S_group1, psels, 1)
+#define DT_N_S_pin_controller_S_i2c2_sleep_S_group1_P_psels_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_pin_controller_S_i2c2_sleep_S_group1, psels, 0) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_pin_controller_S_i2c2_sleep_S_group1, psels, 1)
+#define DT_N_S_pin_controller_S_i2c2_sleep_S_group1_P_psels_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_pin_controller_S_i2c2_sleep_S_group1, psels, 0, __VA_ARGS__) \
+	fn(DT_N_S_pin_controller_S_i2c2_sleep_S_group1, psels, 1, __VA_ARGS__)
+#define DT_N_S_pin_controller_S_i2c2_sleep_S_group1_P_psels_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_pin_controller_S_i2c2_sleep_S_group1, psels, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_pin_controller_S_i2c2_sleep_S_group1, psels, 1, __VA_ARGS__)
+#define DT_N_S_pin_controller_S_i2c2_sleep_S_group1_P_psels_LEN 2
+#define DT_N_S_pin_controller_S_i2c2_sleep_S_group1_P_psels_EXISTS 1
+#define DT_N_S_pin_controller_S_i2c2_sleep_S_group1_P_nordic_drive_mode 0
+#define DT_N_S_pin_controller_S_i2c2_sleep_S_group1_P_nordic_drive_mode_EXISTS 1
+#define DT_N_S_pin_controller_S_i2c2_sleep_S_group1_P_nordic_invert 0
+#define DT_N_S_pin_controller_S_i2c2_sleep_S_group1_P_nordic_invert_EXISTS 1
+
+/*
+ * Devicetree node: /pin-controller/pwm0_default
+ *
+ * Node identifier: DT_N_S_pin_controller_S_pwm0_default
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_pin_controller_S_pwm0_default_PATH "/pin-controller/pwm0_default"
+
+/* Node's name with unit-address: */
+#define DT_N_S_pin_controller_S_pwm0_default_FULL_NAME "pwm0_default"
+
+/* Node parent (/pin-controller) identifier: */
+#define DT_N_S_pin_controller_S_pwm0_default_PARENT DT_N_S_pin_controller
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_pin_controller_S_pwm0_default_CHILD_IDX 6
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_pin_controller_S_pwm0_default_CHILD_NUM 1
+#define DT_N_S_pin_controller_S_pwm0_default_CHILD_NUM_STATUS_OKAY 1
+#define DT_N_S_pin_controller_S_pwm0_default_FOREACH_CHILD(fn) fn(DT_N_S_pin_controller_S_pwm0_default_S_group1)
+#define DT_N_S_pin_controller_S_pwm0_default_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_pin_controller_S_pwm0_default_S_group1)
+#define DT_N_S_pin_controller_S_pwm0_default_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_pin_controller_S_pwm0_default_S_group1, __VA_ARGS__)
+#define DT_N_S_pin_controller_S_pwm0_default_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_pin_controller_S_pwm0_default_S_group1, __VA_ARGS__)
+#define DT_N_S_pin_controller_S_pwm0_default_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_pin_controller_S_pwm0_default_S_group1)
+#define DT_N_S_pin_controller_S_pwm0_default_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_pin_controller_S_pwm0_default_S_group1)
+#define DT_N_S_pin_controller_S_pwm0_default_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_pin_controller_S_pwm0_default_S_group1, __VA_ARGS__)
+#define DT_N_S_pin_controller_S_pwm0_default_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_pin_controller_S_pwm0_default_S_group1, __VA_ARGS__)
+
+/* Node's dependency ordinal: */
+#define DT_N_S_pin_controller_S_pwm0_default_ORD 32
+#define DT_N_S_pin_controller_S_pwm0_default_ORD_STR_SORTABLE 00032
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_pin_controller_S_pwm0_default_REQUIRES_ORDS \
+	27, /* /pin-controller */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_pin_controller_S_pwm0_default_SUPPORTS_ORDS \
+	33, /* /pin-controller/pwm0_default/group1 */ \
+	50, /* /soc/peripheral@50000000/pwm@21000 */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_pin_controller_S_pwm0_default_EXISTS 1
+#define DT_N_NODELABEL_pwm0_default DT_N_S_pin_controller_S_pwm0_default
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_pin_controller_S_pwm0_default_REG_NUM 0
+#define DT_N_S_pin_controller_S_pwm0_default_RANGES_NUM 0
+#define DT_N_S_pin_controller_S_pwm0_default_FOREACH_RANGE(fn) 
+#define DT_N_S_pin_controller_S_pwm0_default_IRQ_NUM 0
+#define DT_N_S_pin_controller_S_pwm0_default_IRQ_LEVEL 0
+#define DT_N_S_pin_controller_S_pwm0_default_STATUS_okay 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_pin_controller_S_pwm0_default_PINCTRL_NUM 0
+
+/* (No generic property macros) */
+
+/*
+ * Devicetree node: /pin-controller/pwm0_default/group1
+ *
+ * Node identifier: DT_N_S_pin_controller_S_pwm0_default_S_group1
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_pin_controller_S_pwm0_default_S_group1_PATH "/pin-controller/pwm0_default/group1"
+
+/* Node's name with unit-address: */
+#define DT_N_S_pin_controller_S_pwm0_default_S_group1_FULL_NAME "group1"
+
+/* Node parent (/pin-controller/pwm0_default) identifier: */
+#define DT_N_S_pin_controller_S_pwm0_default_S_group1_PARENT DT_N_S_pin_controller_S_pwm0_default
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_pin_controller_S_pwm0_default_S_group1_CHILD_IDX 0
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_pin_controller_S_pwm0_default_S_group1_CHILD_NUM 0
+#define DT_N_S_pin_controller_S_pwm0_default_S_group1_CHILD_NUM_STATUS_OKAY 0
+#define DT_N_S_pin_controller_S_pwm0_default_S_group1_FOREACH_CHILD(fn) 
+#define DT_N_S_pin_controller_S_pwm0_default_S_group1_FOREACH_CHILD_SEP(fn, sep) 
+#define DT_N_S_pin_controller_S_pwm0_default_S_group1_FOREACH_CHILD_VARGS(fn, ...) 
+#define DT_N_S_pin_controller_S_pwm0_default_S_group1_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
+#define DT_N_S_pin_controller_S_pwm0_default_S_group1_FOREACH_CHILD_STATUS_OKAY(fn) 
+#define DT_N_S_pin_controller_S_pwm0_default_S_group1_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
+#define DT_N_S_pin_controller_S_pwm0_default_S_group1_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
+#define DT_N_S_pin_controller_S_pwm0_default_S_group1_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 
+
+/* Node's dependency ordinal: */
+#define DT_N_S_pin_controller_S_pwm0_default_S_group1_ORD 33
+#define DT_N_S_pin_controller_S_pwm0_default_S_group1_ORD_STR_SORTABLE 00033
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_pin_controller_S_pwm0_default_S_group1_REQUIRES_ORDS \
+	32, /* /pin-controller/pwm0_default */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_pin_controller_S_pwm0_default_S_group1_SUPPORTS_ORDS /* nothing */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_pin_controller_S_pwm0_default_S_group1_EXISTS 1
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_pin_controller_S_pwm0_default_S_group1_REG_NUM 0
+#define DT_N_S_pin_controller_S_pwm0_default_S_group1_RANGES_NUM 0
+#define DT_N_S_pin_controller_S_pwm0_default_S_group1_FOREACH_RANGE(fn) 
+#define DT_N_S_pin_controller_S_pwm0_default_S_group1_IRQ_NUM 0
+#define DT_N_S_pin_controller_S_pwm0_default_S_group1_IRQ_LEVEL 0
+#define DT_N_S_pin_controller_S_pwm0_default_S_group1_STATUS_okay 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_pin_controller_S_pwm0_default_S_group1_PINCTRL_NUM 0
+
+/* Generic property macros: */
+#define DT_N_S_pin_controller_S_pwm0_default_S_group1_P_bias_disable 0
+#define DT_N_S_pin_controller_S_pwm0_default_S_group1_P_bias_disable_EXISTS 1
+#define DT_N_S_pin_controller_S_pwm0_default_S_group1_P_bias_pull_up 0
+#define DT_N_S_pin_controller_S_pwm0_default_S_group1_P_bias_pull_up_EXISTS 1
+#define DT_N_S_pin_controller_S_pwm0_default_S_group1_P_bias_pull_down 0
+#define DT_N_S_pin_controller_S_pwm0_default_S_group1_P_bias_pull_down_EXISTS 1
+#define DT_N_S_pin_controller_S_pwm0_default_S_group1_P_low_power_enable 0
+#define DT_N_S_pin_controller_S_pwm0_default_S_group1_P_low_power_enable_EXISTS 1
+#define DT_N_S_pin_controller_S_pwm0_default_S_group1_P_psels {2883584 /* 0x2c0000 */}
+#define DT_N_S_pin_controller_S_pwm0_default_S_group1_P_psels_IDX_0 2883584
+#define DT_N_S_pin_controller_S_pwm0_default_S_group1_P_psels_IDX_0_EXISTS 1
+#define DT_N_S_pin_controller_S_pwm0_default_S_group1_P_psels_FOREACH_PROP_ELEM(fn) fn(DT_N_S_pin_controller_S_pwm0_default_S_group1, psels, 0)
+#define DT_N_S_pin_controller_S_pwm0_default_S_group1_P_psels_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_pin_controller_S_pwm0_default_S_group1, psels, 0)
+#define DT_N_S_pin_controller_S_pwm0_default_S_group1_P_psels_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_pin_controller_S_pwm0_default_S_group1, psels, 0, __VA_ARGS__)
+#define DT_N_S_pin_controller_S_pwm0_default_S_group1_P_psels_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_pin_controller_S_pwm0_default_S_group1, psels, 0, __VA_ARGS__)
+#define DT_N_S_pin_controller_S_pwm0_default_S_group1_P_psels_LEN 1
+#define DT_N_S_pin_controller_S_pwm0_default_S_group1_P_psels_EXISTS 1
+#define DT_N_S_pin_controller_S_pwm0_default_S_group1_P_nordic_drive_mode 0
+#define DT_N_S_pin_controller_S_pwm0_default_S_group1_P_nordic_drive_mode_EXISTS 1
+#define DT_N_S_pin_controller_S_pwm0_default_S_group1_P_nordic_invert 0
+#define DT_N_S_pin_controller_S_pwm0_default_S_group1_P_nordic_invert_EXISTS 1
+
+/*
+ * Devicetree node: /pin-controller/pwm0_sleep
+ *
+ * Node identifier: DT_N_S_pin_controller_S_pwm0_sleep
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_pin_controller_S_pwm0_sleep_PATH "/pin-controller/pwm0_sleep"
+
+/* Node's name with unit-address: */
+#define DT_N_S_pin_controller_S_pwm0_sleep_FULL_NAME "pwm0_sleep"
+
+/* Node parent (/pin-controller) identifier: */
+#define DT_N_S_pin_controller_S_pwm0_sleep_PARENT DT_N_S_pin_controller
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_pin_controller_S_pwm0_sleep_CHILD_IDX 7
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_pin_controller_S_pwm0_sleep_CHILD_NUM 1
+#define DT_N_S_pin_controller_S_pwm0_sleep_CHILD_NUM_STATUS_OKAY 1
+#define DT_N_S_pin_controller_S_pwm0_sleep_FOREACH_CHILD(fn) fn(DT_N_S_pin_controller_S_pwm0_sleep_S_group1)
+#define DT_N_S_pin_controller_S_pwm0_sleep_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_pin_controller_S_pwm0_sleep_S_group1)
+#define DT_N_S_pin_controller_S_pwm0_sleep_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_pin_controller_S_pwm0_sleep_S_group1, __VA_ARGS__)
+#define DT_N_S_pin_controller_S_pwm0_sleep_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_pin_controller_S_pwm0_sleep_S_group1, __VA_ARGS__)
+#define DT_N_S_pin_controller_S_pwm0_sleep_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_pin_controller_S_pwm0_sleep_S_group1)
+#define DT_N_S_pin_controller_S_pwm0_sleep_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_pin_controller_S_pwm0_sleep_S_group1)
+#define DT_N_S_pin_controller_S_pwm0_sleep_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_pin_controller_S_pwm0_sleep_S_group1, __VA_ARGS__)
+#define DT_N_S_pin_controller_S_pwm0_sleep_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_pin_controller_S_pwm0_sleep_S_group1, __VA_ARGS__)
+
+/* Node's dependency ordinal: */
+#define DT_N_S_pin_controller_S_pwm0_sleep_ORD 34
+#define DT_N_S_pin_controller_S_pwm0_sleep_ORD_STR_SORTABLE 00034
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_pin_controller_S_pwm0_sleep_REQUIRES_ORDS \
+	27, /* /pin-controller */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_pin_controller_S_pwm0_sleep_SUPPORTS_ORDS \
+	35, /* /pin-controller/pwm0_sleep/group1 */ \
+	50, /* /soc/peripheral@50000000/pwm@21000 */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_pin_controller_S_pwm0_sleep_EXISTS 1
+#define DT_N_NODELABEL_pwm0_sleep DT_N_S_pin_controller_S_pwm0_sleep
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_pin_controller_S_pwm0_sleep_REG_NUM 0
+#define DT_N_S_pin_controller_S_pwm0_sleep_RANGES_NUM 0
+#define DT_N_S_pin_controller_S_pwm0_sleep_FOREACH_RANGE(fn) 
+#define DT_N_S_pin_controller_S_pwm0_sleep_IRQ_NUM 0
+#define DT_N_S_pin_controller_S_pwm0_sleep_IRQ_LEVEL 0
+#define DT_N_S_pin_controller_S_pwm0_sleep_STATUS_okay 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_pin_controller_S_pwm0_sleep_PINCTRL_NUM 0
+
+/* (No generic property macros) */
+
+/*
+ * Devicetree node: /pin-controller/pwm0_sleep/group1
+ *
+ * Node identifier: DT_N_S_pin_controller_S_pwm0_sleep_S_group1
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_pin_controller_S_pwm0_sleep_S_group1_PATH "/pin-controller/pwm0_sleep/group1"
+
+/* Node's name with unit-address: */
+#define DT_N_S_pin_controller_S_pwm0_sleep_S_group1_FULL_NAME "group1"
+
+/* Node parent (/pin-controller/pwm0_sleep) identifier: */
+#define DT_N_S_pin_controller_S_pwm0_sleep_S_group1_PARENT DT_N_S_pin_controller_S_pwm0_sleep
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_pin_controller_S_pwm0_sleep_S_group1_CHILD_IDX 0
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_pin_controller_S_pwm0_sleep_S_group1_CHILD_NUM 0
+#define DT_N_S_pin_controller_S_pwm0_sleep_S_group1_CHILD_NUM_STATUS_OKAY 0
+#define DT_N_S_pin_controller_S_pwm0_sleep_S_group1_FOREACH_CHILD(fn) 
+#define DT_N_S_pin_controller_S_pwm0_sleep_S_group1_FOREACH_CHILD_SEP(fn, sep) 
+#define DT_N_S_pin_controller_S_pwm0_sleep_S_group1_FOREACH_CHILD_VARGS(fn, ...) 
+#define DT_N_S_pin_controller_S_pwm0_sleep_S_group1_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
+#define DT_N_S_pin_controller_S_pwm0_sleep_S_group1_FOREACH_CHILD_STATUS_OKAY(fn) 
+#define DT_N_S_pin_controller_S_pwm0_sleep_S_group1_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
+#define DT_N_S_pin_controller_S_pwm0_sleep_S_group1_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
+#define DT_N_S_pin_controller_S_pwm0_sleep_S_group1_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 
+
+/* Node's dependency ordinal: */
+#define DT_N_S_pin_controller_S_pwm0_sleep_S_group1_ORD 35
+#define DT_N_S_pin_controller_S_pwm0_sleep_S_group1_ORD_STR_SORTABLE 00035
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_pin_controller_S_pwm0_sleep_S_group1_REQUIRES_ORDS \
+	34, /* /pin-controller/pwm0_sleep */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_pin_controller_S_pwm0_sleep_S_group1_SUPPORTS_ORDS /* nothing */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_pin_controller_S_pwm0_sleep_S_group1_EXISTS 1
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_pin_controller_S_pwm0_sleep_S_group1_REG_NUM 0
+#define DT_N_S_pin_controller_S_pwm0_sleep_S_group1_RANGES_NUM 0
+#define DT_N_S_pin_controller_S_pwm0_sleep_S_group1_FOREACH_RANGE(fn) 
+#define DT_N_S_pin_controller_S_pwm0_sleep_S_group1_IRQ_NUM 0
+#define DT_N_S_pin_controller_S_pwm0_sleep_S_group1_IRQ_LEVEL 0
+#define DT_N_S_pin_controller_S_pwm0_sleep_S_group1_STATUS_okay 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_pin_controller_S_pwm0_sleep_S_group1_PINCTRL_NUM 0
+
+/* Generic property macros: */
+#define DT_N_S_pin_controller_S_pwm0_sleep_S_group1_P_bias_disable 0
+#define DT_N_S_pin_controller_S_pwm0_sleep_S_group1_P_bias_disable_EXISTS 1
+#define DT_N_S_pin_controller_S_pwm0_sleep_S_group1_P_bias_pull_up 0
+#define DT_N_S_pin_controller_S_pwm0_sleep_S_group1_P_bias_pull_up_EXISTS 1
+#define DT_N_S_pin_controller_S_pwm0_sleep_S_group1_P_bias_pull_down 0
+#define DT_N_S_pin_controller_S_pwm0_sleep_S_group1_P_bias_pull_down_EXISTS 1
+#define DT_N_S_pin_controller_S_pwm0_sleep_S_group1_P_low_power_enable 1
+#define DT_N_S_pin_controller_S_pwm0_sleep_S_group1_P_low_power_enable_EXISTS 1
+#define DT_N_S_pin_controller_S_pwm0_sleep_S_group1_P_psels {2883584 /* 0x2c0000 */}
+#define DT_N_S_pin_controller_S_pwm0_sleep_S_group1_P_psels_IDX_0 2883584
+#define DT_N_S_pin_controller_S_pwm0_sleep_S_group1_P_psels_IDX_0_EXISTS 1
+#define DT_N_S_pin_controller_S_pwm0_sleep_S_group1_P_psels_FOREACH_PROP_ELEM(fn) fn(DT_N_S_pin_controller_S_pwm0_sleep_S_group1, psels, 0)
+#define DT_N_S_pin_controller_S_pwm0_sleep_S_group1_P_psels_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_pin_controller_S_pwm0_sleep_S_group1, psels, 0)
+#define DT_N_S_pin_controller_S_pwm0_sleep_S_group1_P_psels_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_pin_controller_S_pwm0_sleep_S_group1, psels, 0, __VA_ARGS__)
+#define DT_N_S_pin_controller_S_pwm0_sleep_S_group1_P_psels_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_pin_controller_S_pwm0_sleep_S_group1, psels, 0, __VA_ARGS__)
+#define DT_N_S_pin_controller_S_pwm0_sleep_S_group1_P_psels_LEN 1
+#define DT_N_S_pin_controller_S_pwm0_sleep_S_group1_P_psels_EXISTS 1
+#define DT_N_S_pin_controller_S_pwm0_sleep_S_group1_P_nordic_drive_mode 0
+#define DT_N_S_pin_controller_S_pwm0_sleep_S_group1_P_nordic_drive_mode_EXISTS 1
+#define DT_N_S_pin_controller_S_pwm0_sleep_S_group1_P_nordic_invert 0
+#define DT_N_S_pin_controller_S_pwm0_sleep_S_group1_P_nordic_invert_EXISTS 1
+
+/*
+ * Devicetree node: /pin-controller/spi3_default
+ *
+ * Node identifier: DT_N_S_pin_controller_S_spi3_default
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_pin_controller_S_spi3_default_PATH "/pin-controller/spi3_default"
+
+/* Node's name with unit-address: */
+#define DT_N_S_pin_controller_S_spi3_default_FULL_NAME "spi3_default"
+
+/* Node parent (/pin-controller) identifier: */
+#define DT_N_S_pin_controller_S_spi3_default_PARENT DT_N_S_pin_controller
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_pin_controller_S_spi3_default_CHILD_IDX 8
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_pin_controller_S_spi3_default_CHILD_NUM 1
+#define DT_N_S_pin_controller_S_spi3_default_CHILD_NUM_STATUS_OKAY 1
+#define DT_N_S_pin_controller_S_spi3_default_FOREACH_CHILD(fn) fn(DT_N_S_pin_controller_S_spi3_default_S_group1)
+#define DT_N_S_pin_controller_S_spi3_default_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_pin_controller_S_spi3_default_S_group1)
+#define DT_N_S_pin_controller_S_spi3_default_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_pin_controller_S_spi3_default_S_group1, __VA_ARGS__)
+#define DT_N_S_pin_controller_S_spi3_default_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_pin_controller_S_spi3_default_S_group1, __VA_ARGS__)
+#define DT_N_S_pin_controller_S_spi3_default_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_pin_controller_S_spi3_default_S_group1)
+#define DT_N_S_pin_controller_S_spi3_default_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_pin_controller_S_spi3_default_S_group1)
+#define DT_N_S_pin_controller_S_spi3_default_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_pin_controller_S_spi3_default_S_group1, __VA_ARGS__)
+#define DT_N_S_pin_controller_S_spi3_default_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_pin_controller_S_spi3_default_S_group1, __VA_ARGS__)
+
+/* Node's dependency ordinal: */
+#define DT_N_S_pin_controller_S_spi3_default_ORD 36
+#define DT_N_S_pin_controller_S_spi3_default_ORD_STR_SORTABLE 00036
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_pin_controller_S_spi3_default_REQUIRES_ORDS \
+	27, /* /pin-controller */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_pin_controller_S_spi3_default_SUPPORTS_ORDS \
+	37, /* /pin-controller/spi3_default/group1 */ \
+	112, /* /soc/peripheral@50000000/spi@b000 */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_pin_controller_S_spi3_default_EXISTS 1
+#define DT_N_NODELABEL_spi3_default DT_N_S_pin_controller_S_spi3_default
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_pin_controller_S_spi3_default_REG_NUM 0
+#define DT_N_S_pin_controller_S_spi3_default_RANGES_NUM 0
+#define DT_N_S_pin_controller_S_spi3_default_FOREACH_RANGE(fn) 
+#define DT_N_S_pin_controller_S_spi3_default_IRQ_NUM 0
+#define DT_N_S_pin_controller_S_spi3_default_IRQ_LEVEL 0
+#define DT_N_S_pin_controller_S_spi3_default_STATUS_okay 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_pin_controller_S_spi3_default_PINCTRL_NUM 0
+
+/* (No generic property macros) */
+
+/*
+ * Devicetree node: /pin-controller/spi3_default/group1
+ *
+ * Node identifier: DT_N_S_pin_controller_S_spi3_default_S_group1
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_pin_controller_S_spi3_default_S_group1_PATH "/pin-controller/spi3_default/group1"
+
+/* Node's name with unit-address: */
+#define DT_N_S_pin_controller_S_spi3_default_S_group1_FULL_NAME "group1"
+
+/* Node parent (/pin-controller/spi3_default) identifier: */
+#define DT_N_S_pin_controller_S_spi3_default_S_group1_PARENT DT_N_S_pin_controller_S_spi3_default
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_pin_controller_S_spi3_default_S_group1_CHILD_IDX 0
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_pin_controller_S_spi3_default_S_group1_CHILD_NUM 0
+#define DT_N_S_pin_controller_S_spi3_default_S_group1_CHILD_NUM_STATUS_OKAY 0
+#define DT_N_S_pin_controller_S_spi3_default_S_group1_FOREACH_CHILD(fn) 
+#define DT_N_S_pin_controller_S_spi3_default_S_group1_FOREACH_CHILD_SEP(fn, sep) 
+#define DT_N_S_pin_controller_S_spi3_default_S_group1_FOREACH_CHILD_VARGS(fn, ...) 
+#define DT_N_S_pin_controller_S_spi3_default_S_group1_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
+#define DT_N_S_pin_controller_S_spi3_default_S_group1_FOREACH_CHILD_STATUS_OKAY(fn) 
+#define DT_N_S_pin_controller_S_spi3_default_S_group1_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
+#define DT_N_S_pin_controller_S_spi3_default_S_group1_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
+#define DT_N_S_pin_controller_S_spi3_default_S_group1_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 
+
+/* Node's dependency ordinal: */
+#define DT_N_S_pin_controller_S_spi3_default_S_group1_ORD 37
+#define DT_N_S_pin_controller_S_spi3_default_S_group1_ORD_STR_SORTABLE 00037
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_pin_controller_S_spi3_default_S_group1_REQUIRES_ORDS \
+	36, /* /pin-controller/spi3_default */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_pin_controller_S_spi3_default_S_group1_SUPPORTS_ORDS /* nothing */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_pin_controller_S_spi3_default_S_group1_EXISTS 1
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_pin_controller_S_spi3_default_S_group1_REG_NUM 0
+#define DT_N_S_pin_controller_S_spi3_default_S_group1_RANGES_NUM 0
+#define DT_N_S_pin_controller_S_spi3_default_S_group1_FOREACH_RANGE(fn) 
+#define DT_N_S_pin_controller_S_spi3_default_S_group1_IRQ_NUM 0
+#define DT_N_S_pin_controller_S_spi3_default_S_group1_IRQ_LEVEL 0
+#define DT_N_S_pin_controller_S_spi3_default_S_group1_STATUS_okay 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_pin_controller_S_spi3_default_S_group1_PINCTRL_NUM 0
+
+/* Generic property macros: */
+#define DT_N_S_pin_controller_S_spi3_default_S_group1_P_bias_disable 0
+#define DT_N_S_pin_controller_S_spi3_default_S_group1_P_bias_disable_EXISTS 1
+#define DT_N_S_pin_controller_S_spi3_default_S_group1_P_bias_pull_up 0
+#define DT_N_S_pin_controller_S_spi3_default_S_group1_P_bias_pull_up_EXISTS 1
+#define DT_N_S_pin_controller_S_spi3_default_S_group1_P_bias_pull_down 0
+#define DT_N_S_pin_controller_S_spi3_default_S_group1_P_bias_pull_down_EXISTS 1
+#define DT_N_S_pin_controller_S_spi3_default_S_group1_P_low_power_enable 0
+#define DT_N_S_pin_controller_S_spi3_default_S_group1_P_low_power_enable_EXISTS 1
+#define DT_N_S_pin_controller_S_spi3_default_S_group1_P_psels {524301 /* 0x8000d */, 786444 /* 0xc000c */, 655371 /* 0xa000b */}
+#define DT_N_S_pin_controller_S_spi3_default_S_group1_P_psels_IDX_0 524301
+#define DT_N_S_pin_controller_S_spi3_default_S_group1_P_psels_IDX_0_EXISTS 1
+#define DT_N_S_pin_controller_S_spi3_default_S_group1_P_psels_IDX_1 786444
+#define DT_N_S_pin_controller_S_spi3_default_S_group1_P_psels_IDX_1_EXISTS 1
+#define DT_N_S_pin_controller_S_spi3_default_S_group1_P_psels_IDX_2 655371
+#define DT_N_S_pin_controller_S_spi3_default_S_group1_P_psels_IDX_2_EXISTS 1
+#define DT_N_S_pin_controller_S_spi3_default_S_group1_P_psels_FOREACH_PROP_ELEM(fn) fn(DT_N_S_pin_controller_S_spi3_default_S_group1, psels, 0) \
+	fn(DT_N_S_pin_controller_S_spi3_default_S_group1, psels, 1) \
+	fn(DT_N_S_pin_controller_S_spi3_default_S_group1, psels, 2)
+#define DT_N_S_pin_controller_S_spi3_default_S_group1_P_psels_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_pin_controller_S_spi3_default_S_group1, psels, 0) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_pin_controller_S_spi3_default_S_group1, psels, 1) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_pin_controller_S_spi3_default_S_group1, psels, 2)
+#define DT_N_S_pin_controller_S_spi3_default_S_group1_P_psels_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_pin_controller_S_spi3_default_S_group1, psels, 0, __VA_ARGS__) \
+	fn(DT_N_S_pin_controller_S_spi3_default_S_group1, psels, 1, __VA_ARGS__) \
+	fn(DT_N_S_pin_controller_S_spi3_default_S_group1, psels, 2, __VA_ARGS__)
+#define DT_N_S_pin_controller_S_spi3_default_S_group1_P_psels_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_pin_controller_S_spi3_default_S_group1, psels, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_pin_controller_S_spi3_default_S_group1, psels, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_pin_controller_S_spi3_default_S_group1, psels, 2, __VA_ARGS__)
+#define DT_N_S_pin_controller_S_spi3_default_S_group1_P_psels_LEN 3
+#define DT_N_S_pin_controller_S_spi3_default_S_group1_P_psels_EXISTS 1
+#define DT_N_S_pin_controller_S_spi3_default_S_group1_P_nordic_drive_mode 3
+#define DT_N_S_pin_controller_S_spi3_default_S_group1_P_nordic_drive_mode_EXISTS 1
+#define DT_N_S_pin_controller_S_spi3_default_S_group1_P_nordic_invert 0
+#define DT_N_S_pin_controller_S_spi3_default_S_group1_P_nordic_invert_EXISTS 1
+
+/*
+ * Devicetree node: /pin-controller/spi3_sleep
+ *
+ * Node identifier: DT_N_S_pin_controller_S_spi3_sleep
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_pin_controller_S_spi3_sleep_PATH "/pin-controller/spi3_sleep"
+
+/* Node's name with unit-address: */
+#define DT_N_S_pin_controller_S_spi3_sleep_FULL_NAME "spi3_sleep"
+
+/* Node parent (/pin-controller) identifier: */
+#define DT_N_S_pin_controller_S_spi3_sleep_PARENT DT_N_S_pin_controller
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_pin_controller_S_spi3_sleep_CHILD_IDX 9
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_pin_controller_S_spi3_sleep_CHILD_NUM 1
+#define DT_N_S_pin_controller_S_spi3_sleep_CHILD_NUM_STATUS_OKAY 1
+#define DT_N_S_pin_controller_S_spi3_sleep_FOREACH_CHILD(fn) fn(DT_N_S_pin_controller_S_spi3_sleep_S_group1)
+#define DT_N_S_pin_controller_S_spi3_sleep_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_pin_controller_S_spi3_sleep_S_group1)
+#define DT_N_S_pin_controller_S_spi3_sleep_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_pin_controller_S_spi3_sleep_S_group1, __VA_ARGS__)
+#define DT_N_S_pin_controller_S_spi3_sleep_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_pin_controller_S_spi3_sleep_S_group1, __VA_ARGS__)
+#define DT_N_S_pin_controller_S_spi3_sleep_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_pin_controller_S_spi3_sleep_S_group1)
+#define DT_N_S_pin_controller_S_spi3_sleep_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_pin_controller_S_spi3_sleep_S_group1)
+#define DT_N_S_pin_controller_S_spi3_sleep_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_pin_controller_S_spi3_sleep_S_group1, __VA_ARGS__)
+#define DT_N_S_pin_controller_S_spi3_sleep_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_pin_controller_S_spi3_sleep_S_group1, __VA_ARGS__)
+
+/* Node's dependency ordinal: */
+#define DT_N_S_pin_controller_S_spi3_sleep_ORD 38
+#define DT_N_S_pin_controller_S_spi3_sleep_ORD_STR_SORTABLE 00038
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_pin_controller_S_spi3_sleep_REQUIRES_ORDS \
+	27, /* /pin-controller */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_pin_controller_S_spi3_sleep_SUPPORTS_ORDS \
+	39, /* /pin-controller/spi3_sleep/group1 */ \
+	112, /* /soc/peripheral@50000000/spi@b000 */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_pin_controller_S_spi3_sleep_EXISTS 1
+#define DT_N_NODELABEL_spi3_sleep DT_N_S_pin_controller_S_spi3_sleep
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_pin_controller_S_spi3_sleep_REG_NUM 0
+#define DT_N_S_pin_controller_S_spi3_sleep_RANGES_NUM 0
+#define DT_N_S_pin_controller_S_spi3_sleep_FOREACH_RANGE(fn) 
+#define DT_N_S_pin_controller_S_spi3_sleep_IRQ_NUM 0
+#define DT_N_S_pin_controller_S_spi3_sleep_IRQ_LEVEL 0
+#define DT_N_S_pin_controller_S_spi3_sleep_STATUS_okay 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_pin_controller_S_spi3_sleep_PINCTRL_NUM 0
+
+/* (No generic property macros) */
+
+/*
+ * Devicetree node: /pin-controller/spi3_sleep/group1
+ *
+ * Node identifier: DT_N_S_pin_controller_S_spi3_sleep_S_group1
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_PATH "/pin-controller/spi3_sleep/group1"
+
+/* Node's name with unit-address: */
+#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_FULL_NAME "group1"
+
+/* Node parent (/pin-controller/spi3_sleep) identifier: */
+#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_PARENT DT_N_S_pin_controller_S_spi3_sleep
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_CHILD_IDX 0
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_CHILD_NUM 0
+#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_CHILD_NUM_STATUS_OKAY 0
+#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_FOREACH_CHILD(fn) 
+#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_FOREACH_CHILD_SEP(fn, sep) 
+#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_FOREACH_CHILD_VARGS(fn, ...) 
+#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
+#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_FOREACH_CHILD_STATUS_OKAY(fn) 
+#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
+#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
+#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 
+
+/* Node's dependency ordinal: */
+#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_ORD 39
+#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_ORD_STR_SORTABLE 00039
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_REQUIRES_ORDS \
+	38, /* /pin-controller/spi3_sleep */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_SUPPORTS_ORDS /* nothing */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_EXISTS 1
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_REG_NUM 0
+#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_RANGES_NUM 0
+#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_FOREACH_RANGE(fn) 
+#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_IRQ_NUM 0
+#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_IRQ_LEVEL 0
+#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_STATUS_okay 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_PINCTRL_NUM 0
+
+/* Generic property macros: */
+#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_P_bias_disable 0
+#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_P_bias_disable_EXISTS 1
+#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_P_bias_pull_up 0
+#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_P_bias_pull_up_EXISTS 1
+#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_P_bias_pull_down 0
+#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_P_bias_pull_down_EXISTS 1
+#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_P_low_power_enable 1
+#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_P_low_power_enable_EXISTS 1
+#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_P_psels {524301 /* 0x8000d */, 786444 /* 0xc000c */, 655371 /* 0xa000b */}
+#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_P_psels_IDX_0 524301
+#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_P_psels_IDX_0_EXISTS 1
+#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_P_psels_IDX_1 786444
+#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_P_psels_IDX_1_EXISTS 1
+#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_P_psels_IDX_2 655371
+#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_P_psels_IDX_2_EXISTS 1
+#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_P_psels_FOREACH_PROP_ELEM(fn) fn(DT_N_S_pin_controller_S_spi3_sleep_S_group1, psels, 0) \
+	fn(DT_N_S_pin_controller_S_spi3_sleep_S_group1, psels, 1) \
+	fn(DT_N_S_pin_controller_S_spi3_sleep_S_group1, psels, 2)
+#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_P_psels_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_pin_controller_S_spi3_sleep_S_group1, psels, 0) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_pin_controller_S_spi3_sleep_S_group1, psels, 1) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_pin_controller_S_spi3_sleep_S_group1, psels, 2)
+#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_P_psels_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_pin_controller_S_spi3_sleep_S_group1, psels, 0, __VA_ARGS__) \
+	fn(DT_N_S_pin_controller_S_spi3_sleep_S_group1, psels, 1, __VA_ARGS__) \
+	fn(DT_N_S_pin_controller_S_spi3_sleep_S_group1, psels, 2, __VA_ARGS__)
+#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_P_psels_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_pin_controller_S_spi3_sleep_S_group1, psels, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_pin_controller_S_spi3_sleep_S_group1, psels, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_pin_controller_S_spi3_sleep_S_group1, psels, 2, __VA_ARGS__)
+#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_P_psels_LEN 3
+#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_P_psels_EXISTS 1
+#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_P_nordic_drive_mode 0
+#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_P_nordic_drive_mode_EXISTS 1
+#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_P_nordic_invert 0
+#define DT_N_S_pin_controller_S_spi3_sleep_S_group1_P_nordic_invert_EXISTS 1
+
+/*
+ * Devicetree node: /pin-controller/uart0_default
+ *
+ * Node identifier: DT_N_S_pin_controller_S_uart0_default
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_pin_controller_S_uart0_default_PATH "/pin-controller/uart0_default"
+
+/* Node's name with unit-address: */
+#define DT_N_S_pin_controller_S_uart0_default_FULL_NAME "uart0_default"
+
+/* Node parent (/pin-controller) identifier: */
+#define DT_N_S_pin_controller_S_uart0_default_PARENT DT_N_S_pin_controller
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_pin_controller_S_uart0_default_CHILD_IDX 0
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_pin_controller_S_uart0_default_CHILD_NUM 2
+#define DT_N_S_pin_controller_S_uart0_default_CHILD_NUM_STATUS_OKAY 2
+#define DT_N_S_pin_controller_S_uart0_default_FOREACH_CHILD(fn) fn(DT_N_S_pin_controller_S_uart0_default_S_group1) fn(DT_N_S_pin_controller_S_uart0_default_S_group2)
+#define DT_N_S_pin_controller_S_uart0_default_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_pin_controller_S_uart0_default_S_group1) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pin_controller_S_uart0_default_S_group2)
+#define DT_N_S_pin_controller_S_uart0_default_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_pin_controller_S_uart0_default_S_group1, __VA_ARGS__) fn(DT_N_S_pin_controller_S_uart0_default_S_group2, __VA_ARGS__)
+#define DT_N_S_pin_controller_S_uart0_default_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_pin_controller_S_uart0_default_S_group1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pin_controller_S_uart0_default_S_group2, __VA_ARGS__)
+#define DT_N_S_pin_controller_S_uart0_default_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_pin_controller_S_uart0_default_S_group1) fn(DT_N_S_pin_controller_S_uart0_default_S_group2)
+#define DT_N_S_pin_controller_S_uart0_default_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_pin_controller_S_uart0_default_S_group1) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pin_controller_S_uart0_default_S_group2)
+#define DT_N_S_pin_controller_S_uart0_default_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_pin_controller_S_uart0_default_S_group1, __VA_ARGS__) fn(DT_N_S_pin_controller_S_uart0_default_S_group2, __VA_ARGS__)
+#define DT_N_S_pin_controller_S_uart0_default_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_pin_controller_S_uart0_default_S_group1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pin_controller_S_uart0_default_S_group2, __VA_ARGS__)
+
+/* Node's dependency ordinal: */
+#define DT_N_S_pin_controller_S_uart0_default_ORD 40
+#define DT_N_S_pin_controller_S_uart0_default_ORD_STR_SORTABLE 00040
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_pin_controller_S_uart0_default_REQUIRES_ORDS \
+	27, /* /pin-controller */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_pin_controller_S_uart0_default_SUPPORTS_ORDS \
+	41, /* /pin-controller/uart0_default/group1 */ \
+	42, /* /pin-controller/uart0_default/group2 */ \
+	92, /* /soc/peripheral@50000000/uart@8000 */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_pin_controller_S_uart0_default_EXISTS 1
+#define DT_N_NODELABEL_uart0_default DT_N_S_pin_controller_S_uart0_default
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_pin_controller_S_uart0_default_REG_NUM 0
+#define DT_N_S_pin_controller_S_uart0_default_RANGES_NUM 0
+#define DT_N_S_pin_controller_S_uart0_default_FOREACH_RANGE(fn) 
+#define DT_N_S_pin_controller_S_uart0_default_IRQ_NUM 0
+#define DT_N_S_pin_controller_S_uart0_default_IRQ_LEVEL 0
+#define DT_N_S_pin_controller_S_uart0_default_STATUS_okay 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_pin_controller_S_uart0_default_PINCTRL_NUM 0
+
+/* (No generic property macros) */
+
+/*
+ * Devicetree node: /pin-controller/uart0_default/group1
+ *
+ * Node identifier: DT_N_S_pin_controller_S_uart0_default_S_group1
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_pin_controller_S_uart0_default_S_group1_PATH "/pin-controller/uart0_default/group1"
+
+/* Node's name with unit-address: */
+#define DT_N_S_pin_controller_S_uart0_default_S_group1_FULL_NAME "group1"
+
+/* Node parent (/pin-controller/uart0_default) identifier: */
+#define DT_N_S_pin_controller_S_uart0_default_S_group1_PARENT DT_N_S_pin_controller_S_uart0_default
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_pin_controller_S_uart0_default_S_group1_CHILD_IDX 0
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_pin_controller_S_uart0_default_S_group1_CHILD_NUM 0
+#define DT_N_S_pin_controller_S_uart0_default_S_group1_CHILD_NUM_STATUS_OKAY 0
+#define DT_N_S_pin_controller_S_uart0_default_S_group1_FOREACH_CHILD(fn) 
+#define DT_N_S_pin_controller_S_uart0_default_S_group1_FOREACH_CHILD_SEP(fn, sep) 
+#define DT_N_S_pin_controller_S_uart0_default_S_group1_FOREACH_CHILD_VARGS(fn, ...) 
+#define DT_N_S_pin_controller_S_uart0_default_S_group1_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
+#define DT_N_S_pin_controller_S_uart0_default_S_group1_FOREACH_CHILD_STATUS_OKAY(fn) 
+#define DT_N_S_pin_controller_S_uart0_default_S_group1_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
+#define DT_N_S_pin_controller_S_uart0_default_S_group1_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
+#define DT_N_S_pin_controller_S_uart0_default_S_group1_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 
+
+/* Node's dependency ordinal: */
+#define DT_N_S_pin_controller_S_uart0_default_S_group1_ORD 41
+#define DT_N_S_pin_controller_S_uart0_default_S_group1_ORD_STR_SORTABLE 00041
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_pin_controller_S_uart0_default_S_group1_REQUIRES_ORDS \
+	40, /* /pin-controller/uart0_default */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_pin_controller_S_uart0_default_S_group1_SUPPORTS_ORDS /* nothing */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_pin_controller_S_uart0_default_S_group1_EXISTS 1
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_pin_controller_S_uart0_default_S_group1_REG_NUM 0
+#define DT_N_S_pin_controller_S_uart0_default_S_group1_RANGES_NUM 0
+#define DT_N_S_pin_controller_S_uart0_default_S_group1_FOREACH_RANGE(fn) 
+#define DT_N_S_pin_controller_S_uart0_default_S_group1_IRQ_NUM 0
+#define DT_N_S_pin_controller_S_uart0_default_S_group1_IRQ_LEVEL 0
+#define DT_N_S_pin_controller_S_uart0_default_S_group1_STATUS_okay 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_pin_controller_S_uart0_default_S_group1_PINCTRL_NUM 0
+
+/* Generic property macros: */
+#define DT_N_S_pin_controller_S_uart0_default_S_group1_P_bias_disable 0
+#define DT_N_S_pin_controller_S_uart0_default_S_group1_P_bias_disable_EXISTS 1
+#define DT_N_S_pin_controller_S_uart0_default_S_group1_P_bias_pull_up 0
+#define DT_N_S_pin_controller_S_uart0_default_S_group1_P_bias_pull_up_EXISTS 1
+#define DT_N_S_pin_controller_S_uart0_default_S_group1_P_bias_pull_down 0
+#define DT_N_S_pin_controller_S_uart0_default_S_group1_P_bias_pull_down_EXISTS 1
+#define DT_N_S_pin_controller_S_uart0_default_S_group1_P_low_power_enable 0
+#define DT_N_S_pin_controller_S_uart0_default_S_group1_P_low_power_enable_EXISTS 1
+#define DT_N_S_pin_controller_S_uart0_default_S_group1_P_psels {27 /* 0x1b */, 262158 /* 0x4000e */}
+#define DT_N_S_pin_controller_S_uart0_default_S_group1_P_psels_IDX_0 27
+#define DT_N_S_pin_controller_S_uart0_default_S_group1_P_psels_IDX_0_EXISTS 1
+#define DT_N_S_pin_controller_S_uart0_default_S_group1_P_psels_IDX_1 262158
+#define DT_N_S_pin_controller_S_uart0_default_S_group1_P_psels_IDX_1_EXISTS 1
+#define DT_N_S_pin_controller_S_uart0_default_S_group1_P_psels_FOREACH_PROP_ELEM(fn) fn(DT_N_S_pin_controller_S_uart0_default_S_group1, psels, 0) \
+	fn(DT_N_S_pin_controller_S_uart0_default_S_group1, psels, 1)
+#define DT_N_S_pin_controller_S_uart0_default_S_group1_P_psels_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_pin_controller_S_uart0_default_S_group1, psels, 0) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_pin_controller_S_uart0_default_S_group1, psels, 1)
+#define DT_N_S_pin_controller_S_uart0_default_S_group1_P_psels_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_pin_controller_S_uart0_default_S_group1, psels, 0, __VA_ARGS__) \
+	fn(DT_N_S_pin_controller_S_uart0_default_S_group1, psels, 1, __VA_ARGS__)
+#define DT_N_S_pin_controller_S_uart0_default_S_group1_P_psels_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_pin_controller_S_uart0_default_S_group1, psels, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_pin_controller_S_uart0_default_S_group1, psels, 1, __VA_ARGS__)
+#define DT_N_S_pin_controller_S_uart0_default_S_group1_P_psels_LEN 2
+#define DT_N_S_pin_controller_S_uart0_default_S_group1_P_psels_EXISTS 1
+#define DT_N_S_pin_controller_S_uart0_default_S_group1_P_nordic_drive_mode 0
+#define DT_N_S_pin_controller_S_uart0_default_S_group1_P_nordic_drive_mode_EXISTS 1
+#define DT_N_S_pin_controller_S_uart0_default_S_group1_P_nordic_invert 0
+#define DT_N_S_pin_controller_S_uart0_default_S_group1_P_nordic_invert_EXISTS 1
+
+/*
+ * Devicetree node: /pin-controller/uart0_default/group2
+ *
+ * Node identifier: DT_N_S_pin_controller_S_uart0_default_S_group2
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_pin_controller_S_uart0_default_S_group2_PATH "/pin-controller/uart0_default/group2"
+
+/* Node's name with unit-address: */
+#define DT_N_S_pin_controller_S_uart0_default_S_group2_FULL_NAME "group2"
+
+/* Node parent (/pin-controller/uart0_default) identifier: */
+#define DT_N_S_pin_controller_S_uart0_default_S_group2_PARENT DT_N_S_pin_controller_S_uart0_default
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_pin_controller_S_uart0_default_S_group2_CHILD_IDX 1
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_pin_controller_S_uart0_default_S_group2_CHILD_NUM 0
+#define DT_N_S_pin_controller_S_uart0_default_S_group2_CHILD_NUM_STATUS_OKAY 0
+#define DT_N_S_pin_controller_S_uart0_default_S_group2_FOREACH_CHILD(fn) 
+#define DT_N_S_pin_controller_S_uart0_default_S_group2_FOREACH_CHILD_SEP(fn, sep) 
+#define DT_N_S_pin_controller_S_uart0_default_S_group2_FOREACH_CHILD_VARGS(fn, ...) 
+#define DT_N_S_pin_controller_S_uart0_default_S_group2_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
+#define DT_N_S_pin_controller_S_uart0_default_S_group2_FOREACH_CHILD_STATUS_OKAY(fn) 
+#define DT_N_S_pin_controller_S_uart0_default_S_group2_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
+#define DT_N_S_pin_controller_S_uart0_default_S_group2_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
+#define DT_N_S_pin_controller_S_uart0_default_S_group2_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 
+
+/* Node's dependency ordinal: */
+#define DT_N_S_pin_controller_S_uart0_default_S_group2_ORD 42
+#define DT_N_S_pin_controller_S_uart0_default_S_group2_ORD_STR_SORTABLE 00042
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_pin_controller_S_uart0_default_S_group2_REQUIRES_ORDS \
+	40, /* /pin-controller/uart0_default */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_pin_controller_S_uart0_default_S_group2_SUPPORTS_ORDS /* nothing */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_pin_controller_S_uart0_default_S_group2_EXISTS 1
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_pin_controller_S_uart0_default_S_group2_REG_NUM 0
+#define DT_N_S_pin_controller_S_uart0_default_S_group2_RANGES_NUM 0
+#define DT_N_S_pin_controller_S_uart0_default_S_group2_FOREACH_RANGE(fn) 
+#define DT_N_S_pin_controller_S_uart0_default_S_group2_IRQ_NUM 0
+#define DT_N_S_pin_controller_S_uart0_default_S_group2_IRQ_LEVEL 0
+#define DT_N_S_pin_controller_S_uart0_default_S_group2_STATUS_okay 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_pin_controller_S_uart0_default_S_group2_PINCTRL_NUM 0
+
+/* Generic property macros: */
+#define DT_N_S_pin_controller_S_uart0_default_S_group2_P_bias_disable 0
+#define DT_N_S_pin_controller_S_uart0_default_S_group2_P_bias_disable_EXISTS 1
+#define DT_N_S_pin_controller_S_uart0_default_S_group2_P_bias_pull_up 1
+#define DT_N_S_pin_controller_S_uart0_default_S_group2_P_bias_pull_up_EXISTS 1
+#define DT_N_S_pin_controller_S_uart0_default_S_group2_P_bias_pull_down 0
+#define DT_N_S_pin_controller_S_uart0_default_S_group2_P_bias_pull_down_EXISTS 1
+#define DT_N_S_pin_controller_S_uart0_default_S_group2_P_low_power_enable 0
+#define DT_N_S_pin_controller_S_uart0_default_S_group2_P_low_power_enable_EXISTS 1
+#define DT_N_S_pin_controller_S_uart0_default_S_group2_P_psels {131098 /* 0x2001a */, 393231 /* 0x6000f */}
+#define DT_N_S_pin_controller_S_uart0_default_S_group2_P_psels_IDX_0 131098
+#define DT_N_S_pin_controller_S_uart0_default_S_group2_P_psels_IDX_0_EXISTS 1
+#define DT_N_S_pin_controller_S_uart0_default_S_group2_P_psels_IDX_1 393231
+#define DT_N_S_pin_controller_S_uart0_default_S_group2_P_psels_IDX_1_EXISTS 1
+#define DT_N_S_pin_controller_S_uart0_default_S_group2_P_psels_FOREACH_PROP_ELEM(fn) fn(DT_N_S_pin_controller_S_uart0_default_S_group2, psels, 0) \
+	fn(DT_N_S_pin_controller_S_uart0_default_S_group2, psels, 1)
+#define DT_N_S_pin_controller_S_uart0_default_S_group2_P_psels_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_pin_controller_S_uart0_default_S_group2, psels, 0) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_pin_controller_S_uart0_default_S_group2, psels, 1)
+#define DT_N_S_pin_controller_S_uart0_default_S_group2_P_psels_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_pin_controller_S_uart0_default_S_group2, psels, 0, __VA_ARGS__) \
+	fn(DT_N_S_pin_controller_S_uart0_default_S_group2, psels, 1, __VA_ARGS__)
+#define DT_N_S_pin_controller_S_uart0_default_S_group2_P_psels_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_pin_controller_S_uart0_default_S_group2, psels, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_pin_controller_S_uart0_default_S_group2, psels, 1, __VA_ARGS__)
+#define DT_N_S_pin_controller_S_uart0_default_S_group2_P_psels_LEN 2
+#define DT_N_S_pin_controller_S_uart0_default_S_group2_P_psels_EXISTS 1
+#define DT_N_S_pin_controller_S_uart0_default_S_group2_P_nordic_drive_mode 0
+#define DT_N_S_pin_controller_S_uart0_default_S_group2_P_nordic_drive_mode_EXISTS 1
+#define DT_N_S_pin_controller_S_uart0_default_S_group2_P_nordic_invert 0
+#define DT_N_S_pin_controller_S_uart0_default_S_group2_P_nordic_invert_EXISTS 1
+
+/*
+ * Devicetree node: /pin-controller/uart0_sleep
+ *
+ * Node identifier: DT_N_S_pin_controller_S_uart0_sleep
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_pin_controller_S_uart0_sleep_PATH "/pin-controller/uart0_sleep"
+
+/* Node's name with unit-address: */
+#define DT_N_S_pin_controller_S_uart0_sleep_FULL_NAME "uart0_sleep"
+
+/* Node parent (/pin-controller) identifier: */
+#define DT_N_S_pin_controller_S_uart0_sleep_PARENT DT_N_S_pin_controller
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_pin_controller_S_uart0_sleep_CHILD_IDX 1
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_pin_controller_S_uart0_sleep_CHILD_NUM 1
+#define DT_N_S_pin_controller_S_uart0_sleep_CHILD_NUM_STATUS_OKAY 1
+#define DT_N_S_pin_controller_S_uart0_sleep_FOREACH_CHILD(fn) fn(DT_N_S_pin_controller_S_uart0_sleep_S_group1)
+#define DT_N_S_pin_controller_S_uart0_sleep_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_pin_controller_S_uart0_sleep_S_group1)
+#define DT_N_S_pin_controller_S_uart0_sleep_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_pin_controller_S_uart0_sleep_S_group1, __VA_ARGS__)
+#define DT_N_S_pin_controller_S_uart0_sleep_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_pin_controller_S_uart0_sleep_S_group1, __VA_ARGS__)
+#define DT_N_S_pin_controller_S_uart0_sleep_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_pin_controller_S_uart0_sleep_S_group1)
+#define DT_N_S_pin_controller_S_uart0_sleep_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_pin_controller_S_uart0_sleep_S_group1)
+#define DT_N_S_pin_controller_S_uart0_sleep_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_pin_controller_S_uart0_sleep_S_group1, __VA_ARGS__)
+#define DT_N_S_pin_controller_S_uart0_sleep_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_pin_controller_S_uart0_sleep_S_group1, __VA_ARGS__)
+
+/* Node's dependency ordinal: */
+#define DT_N_S_pin_controller_S_uart0_sleep_ORD 43
+#define DT_N_S_pin_controller_S_uart0_sleep_ORD_STR_SORTABLE 00043
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_pin_controller_S_uart0_sleep_REQUIRES_ORDS \
+	27, /* /pin-controller */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_pin_controller_S_uart0_sleep_SUPPORTS_ORDS \
+	44, /* /pin-controller/uart0_sleep/group1 */ \
+	92, /* /soc/peripheral@50000000/uart@8000 */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_pin_controller_S_uart0_sleep_EXISTS 1
+#define DT_N_NODELABEL_uart0_sleep DT_N_S_pin_controller_S_uart0_sleep
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_pin_controller_S_uart0_sleep_REG_NUM 0
+#define DT_N_S_pin_controller_S_uart0_sleep_RANGES_NUM 0
+#define DT_N_S_pin_controller_S_uart0_sleep_FOREACH_RANGE(fn) 
+#define DT_N_S_pin_controller_S_uart0_sleep_IRQ_NUM 0
+#define DT_N_S_pin_controller_S_uart0_sleep_IRQ_LEVEL 0
+#define DT_N_S_pin_controller_S_uart0_sleep_STATUS_okay 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_pin_controller_S_uart0_sleep_PINCTRL_NUM 0
+
+/* (No generic property macros) */
+
+/*
+ * Devicetree node: /pin-controller/uart0_sleep/group1
+ *
+ * Node identifier: DT_N_S_pin_controller_S_uart0_sleep_S_group1
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_PATH "/pin-controller/uart0_sleep/group1"
+
+/* Node's name with unit-address: */
+#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_FULL_NAME "group1"
+
+/* Node parent (/pin-controller/uart0_sleep) identifier: */
+#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_PARENT DT_N_S_pin_controller_S_uart0_sleep
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_CHILD_IDX 0
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_CHILD_NUM 0
+#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_CHILD_NUM_STATUS_OKAY 0
+#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_FOREACH_CHILD(fn) 
+#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_FOREACH_CHILD_SEP(fn, sep) 
+#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_FOREACH_CHILD_VARGS(fn, ...) 
+#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
+#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_FOREACH_CHILD_STATUS_OKAY(fn) 
+#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
+#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
+#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 
+
+/* Node's dependency ordinal: */
+#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_ORD 44
+#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_ORD_STR_SORTABLE 00044
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_REQUIRES_ORDS \
+	43, /* /pin-controller/uart0_sleep */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_SUPPORTS_ORDS /* nothing */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_EXISTS 1
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_REG_NUM 0
+#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_RANGES_NUM 0
+#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_FOREACH_RANGE(fn) 
+#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_IRQ_NUM 0
+#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_IRQ_LEVEL 0
+#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_STATUS_okay 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_PINCTRL_NUM 0
+
+/* Generic property macros: */
+#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_P_bias_disable 0
+#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_P_bias_disable_EXISTS 1
+#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_P_bias_pull_up 0
+#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_P_bias_pull_up_EXISTS 1
+#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_P_bias_pull_down 0
+#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_P_bias_pull_down_EXISTS 1
+#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_P_low_power_enable 1
+#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_P_low_power_enable_EXISTS 1
+#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_P_psels {27 /* 0x1b */, 131098 /* 0x2001a */, 262158 /* 0x4000e */, 393231 /* 0x6000f */}
+#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_P_psels_IDX_0 27
+#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_P_psels_IDX_0_EXISTS 1
+#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_P_psels_IDX_1 131098
+#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_P_psels_IDX_1_EXISTS 1
+#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_P_psels_IDX_2 262158
+#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_P_psels_IDX_2_EXISTS 1
+#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_P_psels_IDX_3 393231
+#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_P_psels_IDX_3_EXISTS 1
+#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_P_psels_FOREACH_PROP_ELEM(fn) fn(DT_N_S_pin_controller_S_uart0_sleep_S_group1, psels, 0) \
+	fn(DT_N_S_pin_controller_S_uart0_sleep_S_group1, psels, 1) \
+	fn(DT_N_S_pin_controller_S_uart0_sleep_S_group1, psels, 2) \
+	fn(DT_N_S_pin_controller_S_uart0_sleep_S_group1, psels, 3)
+#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_P_psels_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_pin_controller_S_uart0_sleep_S_group1, psels, 0) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_pin_controller_S_uart0_sleep_S_group1, psels, 1) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_pin_controller_S_uart0_sleep_S_group1, psels, 2) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_pin_controller_S_uart0_sleep_S_group1, psels, 3)
+#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_P_psels_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_pin_controller_S_uart0_sleep_S_group1, psels, 0, __VA_ARGS__) \
+	fn(DT_N_S_pin_controller_S_uart0_sleep_S_group1, psels, 1, __VA_ARGS__) \
+	fn(DT_N_S_pin_controller_S_uart0_sleep_S_group1, psels, 2, __VA_ARGS__) \
+	fn(DT_N_S_pin_controller_S_uart0_sleep_S_group1, psels, 3, __VA_ARGS__)
+#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_P_psels_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_pin_controller_S_uart0_sleep_S_group1, psels, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_pin_controller_S_uart0_sleep_S_group1, psels, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_pin_controller_S_uart0_sleep_S_group1, psels, 2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_pin_controller_S_uart0_sleep_S_group1, psels, 3, __VA_ARGS__)
+#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_P_psels_LEN 4
+#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_P_psels_EXISTS 1
+#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_P_nordic_drive_mode 0
+#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_P_nordic_drive_mode_EXISTS 1
+#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_P_nordic_invert 0
+#define DT_N_S_pin_controller_S_uart0_sleep_S_group1_P_nordic_invert_EXISTS 1
+
+/*
+ * Devicetree node: /pin-controller/uart1_default
+ *
+ * Node identifier: DT_N_S_pin_controller_S_uart1_default
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_pin_controller_S_uart1_default_PATH "/pin-controller/uart1_default"
+
+/* Node's name with unit-address: */
+#define DT_N_S_pin_controller_S_uart1_default_FULL_NAME "uart1_default"
+
+/* Node parent (/pin-controller) identifier: */
+#define DT_N_S_pin_controller_S_uart1_default_PARENT DT_N_S_pin_controller
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_pin_controller_S_uart1_default_CHILD_IDX 2
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_pin_controller_S_uart1_default_CHILD_NUM 2
+#define DT_N_S_pin_controller_S_uart1_default_CHILD_NUM_STATUS_OKAY 2
+#define DT_N_S_pin_controller_S_uart1_default_FOREACH_CHILD(fn) fn(DT_N_S_pin_controller_S_uart1_default_S_group1) fn(DT_N_S_pin_controller_S_uart1_default_S_group2)
+#define DT_N_S_pin_controller_S_uart1_default_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_pin_controller_S_uart1_default_S_group1) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pin_controller_S_uart1_default_S_group2)
+#define DT_N_S_pin_controller_S_uart1_default_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_pin_controller_S_uart1_default_S_group1, __VA_ARGS__) fn(DT_N_S_pin_controller_S_uart1_default_S_group2, __VA_ARGS__)
+#define DT_N_S_pin_controller_S_uart1_default_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_pin_controller_S_uart1_default_S_group1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pin_controller_S_uart1_default_S_group2, __VA_ARGS__)
+#define DT_N_S_pin_controller_S_uart1_default_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_pin_controller_S_uart1_default_S_group1) fn(DT_N_S_pin_controller_S_uart1_default_S_group2)
+#define DT_N_S_pin_controller_S_uart1_default_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_pin_controller_S_uart1_default_S_group1) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pin_controller_S_uart1_default_S_group2)
+#define DT_N_S_pin_controller_S_uart1_default_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_pin_controller_S_uart1_default_S_group1, __VA_ARGS__) fn(DT_N_S_pin_controller_S_uart1_default_S_group2, __VA_ARGS__)
+#define DT_N_S_pin_controller_S_uart1_default_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_pin_controller_S_uart1_default_S_group1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pin_controller_S_uart1_default_S_group2, __VA_ARGS__)
+
+/* Node's dependency ordinal: */
+#define DT_N_S_pin_controller_S_uart1_default_ORD 45
+#define DT_N_S_pin_controller_S_uart1_default_ORD_STR_SORTABLE 00045
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_pin_controller_S_uart1_default_REQUIRES_ORDS \
+	27, /* /pin-controller */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_pin_controller_S_uart1_default_SUPPORTS_ORDS \
+	46, /* /pin-controller/uart1_default/group1 */ \
+	47, /* /pin-controller/uart1_default/group2 */ \
+	93, /* /soc/peripheral@50000000/uart@9000 */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_pin_controller_S_uart1_default_EXISTS 1
+#define DT_N_NODELABEL_uart1_default DT_N_S_pin_controller_S_uart1_default
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_pin_controller_S_uart1_default_REG_NUM 0
+#define DT_N_S_pin_controller_S_uart1_default_RANGES_NUM 0
+#define DT_N_S_pin_controller_S_uart1_default_FOREACH_RANGE(fn) 
+#define DT_N_S_pin_controller_S_uart1_default_IRQ_NUM 0
+#define DT_N_S_pin_controller_S_uart1_default_IRQ_LEVEL 0
+#define DT_N_S_pin_controller_S_uart1_default_STATUS_okay 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_pin_controller_S_uart1_default_PINCTRL_NUM 0
+
+/* (No generic property macros) */
+
+/*
+ * Devicetree node: /pin-controller/uart1_default/group1
+ *
+ * Node identifier: DT_N_S_pin_controller_S_uart1_default_S_group1
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_pin_controller_S_uart1_default_S_group1_PATH "/pin-controller/uart1_default/group1"
+
+/* Node's name with unit-address: */
+#define DT_N_S_pin_controller_S_uart1_default_S_group1_FULL_NAME "group1"
+
+/* Node parent (/pin-controller/uart1_default) identifier: */
+#define DT_N_S_pin_controller_S_uart1_default_S_group1_PARENT DT_N_S_pin_controller_S_uart1_default
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_pin_controller_S_uart1_default_S_group1_CHILD_IDX 0
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_pin_controller_S_uart1_default_S_group1_CHILD_NUM 0
+#define DT_N_S_pin_controller_S_uart1_default_S_group1_CHILD_NUM_STATUS_OKAY 0
+#define DT_N_S_pin_controller_S_uart1_default_S_group1_FOREACH_CHILD(fn) 
+#define DT_N_S_pin_controller_S_uart1_default_S_group1_FOREACH_CHILD_SEP(fn, sep) 
+#define DT_N_S_pin_controller_S_uart1_default_S_group1_FOREACH_CHILD_VARGS(fn, ...) 
+#define DT_N_S_pin_controller_S_uart1_default_S_group1_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
+#define DT_N_S_pin_controller_S_uart1_default_S_group1_FOREACH_CHILD_STATUS_OKAY(fn) 
+#define DT_N_S_pin_controller_S_uart1_default_S_group1_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
+#define DT_N_S_pin_controller_S_uart1_default_S_group1_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
+#define DT_N_S_pin_controller_S_uart1_default_S_group1_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 
+
+/* Node's dependency ordinal: */
+#define DT_N_S_pin_controller_S_uart1_default_S_group1_ORD 46
+#define DT_N_S_pin_controller_S_uart1_default_S_group1_ORD_STR_SORTABLE 00046
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_pin_controller_S_uart1_default_S_group1_REQUIRES_ORDS \
+	45, /* /pin-controller/uart1_default */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_pin_controller_S_uart1_default_S_group1_SUPPORTS_ORDS /* nothing */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_pin_controller_S_uart1_default_S_group1_EXISTS 1
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_pin_controller_S_uart1_default_S_group1_REG_NUM 0
+#define DT_N_S_pin_controller_S_uart1_default_S_group1_RANGES_NUM 0
+#define DT_N_S_pin_controller_S_uart1_default_S_group1_FOREACH_RANGE(fn) 
+#define DT_N_S_pin_controller_S_uart1_default_S_group1_IRQ_NUM 0
+#define DT_N_S_pin_controller_S_uart1_default_S_group1_IRQ_LEVEL 0
+#define DT_N_S_pin_controller_S_uart1_default_S_group1_STATUS_okay 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_pin_controller_S_uart1_default_S_group1_PINCTRL_NUM 0
+
+/* Generic property macros: */
+#define DT_N_S_pin_controller_S_uart1_default_S_group1_P_bias_disable 0
+#define DT_N_S_pin_controller_S_uart1_default_S_group1_P_bias_disable_EXISTS 1
+#define DT_N_S_pin_controller_S_uart1_default_S_group1_P_bias_pull_up 0
+#define DT_N_S_pin_controller_S_uart1_default_S_group1_P_bias_pull_up_EXISTS 1
+#define DT_N_S_pin_controller_S_uart1_default_S_group1_P_bias_pull_down 0
+#define DT_N_S_pin_controller_S_uart1_default_S_group1_P_bias_pull_down_EXISTS 1
+#define DT_N_S_pin_controller_S_uart1_default_S_group1_P_low_power_enable 0
+#define DT_N_S_pin_controller_S_uart1_default_S_group1_P_low_power_enable_EXISTS 1
+#define DT_N_S_pin_controller_S_uart1_default_S_group1_P_psels {29 /* 0x1d */, 262160 /* 0x40010 */}
+#define DT_N_S_pin_controller_S_uart1_default_S_group1_P_psels_IDX_0 29
+#define DT_N_S_pin_controller_S_uart1_default_S_group1_P_psels_IDX_0_EXISTS 1
+#define DT_N_S_pin_controller_S_uart1_default_S_group1_P_psels_IDX_1 262160
+#define DT_N_S_pin_controller_S_uart1_default_S_group1_P_psels_IDX_1_EXISTS 1
+#define DT_N_S_pin_controller_S_uart1_default_S_group1_P_psels_FOREACH_PROP_ELEM(fn) fn(DT_N_S_pin_controller_S_uart1_default_S_group1, psels, 0) \
+	fn(DT_N_S_pin_controller_S_uart1_default_S_group1, psels, 1)
+#define DT_N_S_pin_controller_S_uart1_default_S_group1_P_psels_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_pin_controller_S_uart1_default_S_group1, psels, 0) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_pin_controller_S_uart1_default_S_group1, psels, 1)
+#define DT_N_S_pin_controller_S_uart1_default_S_group1_P_psels_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_pin_controller_S_uart1_default_S_group1, psels, 0, __VA_ARGS__) \
+	fn(DT_N_S_pin_controller_S_uart1_default_S_group1, psels, 1, __VA_ARGS__)
+#define DT_N_S_pin_controller_S_uart1_default_S_group1_P_psels_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_pin_controller_S_uart1_default_S_group1, psels, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_pin_controller_S_uart1_default_S_group1, psels, 1, __VA_ARGS__)
+#define DT_N_S_pin_controller_S_uart1_default_S_group1_P_psels_LEN 2
+#define DT_N_S_pin_controller_S_uart1_default_S_group1_P_psels_EXISTS 1
+#define DT_N_S_pin_controller_S_uart1_default_S_group1_P_nordic_drive_mode 0
+#define DT_N_S_pin_controller_S_uart1_default_S_group1_P_nordic_drive_mode_EXISTS 1
+#define DT_N_S_pin_controller_S_uart1_default_S_group1_P_nordic_invert 0
+#define DT_N_S_pin_controller_S_uart1_default_S_group1_P_nordic_invert_EXISTS 1
+
+/*
+ * Devicetree node: /pin-controller/uart1_default/group2
+ *
+ * Node identifier: DT_N_S_pin_controller_S_uart1_default_S_group2
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_pin_controller_S_uart1_default_S_group2_PATH "/pin-controller/uart1_default/group2"
+
+/* Node's name with unit-address: */
+#define DT_N_S_pin_controller_S_uart1_default_S_group2_FULL_NAME "group2"
+
+/* Node parent (/pin-controller/uart1_default) identifier: */
+#define DT_N_S_pin_controller_S_uart1_default_S_group2_PARENT DT_N_S_pin_controller_S_uart1_default
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_pin_controller_S_uart1_default_S_group2_CHILD_IDX 1
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_pin_controller_S_uart1_default_S_group2_CHILD_NUM 0
+#define DT_N_S_pin_controller_S_uart1_default_S_group2_CHILD_NUM_STATUS_OKAY 0
+#define DT_N_S_pin_controller_S_uart1_default_S_group2_FOREACH_CHILD(fn) 
+#define DT_N_S_pin_controller_S_uart1_default_S_group2_FOREACH_CHILD_SEP(fn, sep) 
+#define DT_N_S_pin_controller_S_uart1_default_S_group2_FOREACH_CHILD_VARGS(fn, ...) 
+#define DT_N_S_pin_controller_S_uart1_default_S_group2_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
+#define DT_N_S_pin_controller_S_uart1_default_S_group2_FOREACH_CHILD_STATUS_OKAY(fn) 
+#define DT_N_S_pin_controller_S_uart1_default_S_group2_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
+#define DT_N_S_pin_controller_S_uart1_default_S_group2_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
+#define DT_N_S_pin_controller_S_uart1_default_S_group2_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 
+
+/* Node's dependency ordinal: */
+#define DT_N_S_pin_controller_S_uart1_default_S_group2_ORD 47
+#define DT_N_S_pin_controller_S_uart1_default_S_group2_ORD_STR_SORTABLE 00047
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_pin_controller_S_uart1_default_S_group2_REQUIRES_ORDS \
+	45, /* /pin-controller/uart1_default */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_pin_controller_S_uart1_default_S_group2_SUPPORTS_ORDS /* nothing */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_pin_controller_S_uart1_default_S_group2_EXISTS 1
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_pin_controller_S_uart1_default_S_group2_REG_NUM 0
+#define DT_N_S_pin_controller_S_uart1_default_S_group2_RANGES_NUM 0
+#define DT_N_S_pin_controller_S_uart1_default_S_group2_FOREACH_RANGE(fn) 
+#define DT_N_S_pin_controller_S_uart1_default_S_group2_IRQ_NUM 0
+#define DT_N_S_pin_controller_S_uart1_default_S_group2_IRQ_LEVEL 0
+#define DT_N_S_pin_controller_S_uart1_default_S_group2_STATUS_okay 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_pin_controller_S_uart1_default_S_group2_PINCTRL_NUM 0
+
+/* Generic property macros: */
+#define DT_N_S_pin_controller_S_uart1_default_S_group2_P_bias_disable 0
+#define DT_N_S_pin_controller_S_uart1_default_S_group2_P_bias_disable_EXISTS 1
+#define DT_N_S_pin_controller_S_uart1_default_S_group2_P_bias_pull_up 1
+#define DT_N_S_pin_controller_S_uart1_default_S_group2_P_bias_pull_up_EXISTS 1
+#define DT_N_S_pin_controller_S_uart1_default_S_group2_P_bias_pull_down 0
+#define DT_N_S_pin_controller_S_uart1_default_S_group2_P_bias_pull_down_EXISTS 1
+#define DT_N_S_pin_controller_S_uart1_default_S_group2_P_low_power_enable 0
+#define DT_N_S_pin_controller_S_uart1_default_S_group2_P_low_power_enable_EXISTS 1
+#define DT_N_S_pin_controller_S_uart1_default_S_group2_P_psels {131100 /* 0x2001c */, 393233 /* 0x60011 */}
+#define DT_N_S_pin_controller_S_uart1_default_S_group2_P_psels_IDX_0 131100
+#define DT_N_S_pin_controller_S_uart1_default_S_group2_P_psels_IDX_0_EXISTS 1
+#define DT_N_S_pin_controller_S_uart1_default_S_group2_P_psels_IDX_1 393233
+#define DT_N_S_pin_controller_S_uart1_default_S_group2_P_psels_IDX_1_EXISTS 1
+#define DT_N_S_pin_controller_S_uart1_default_S_group2_P_psels_FOREACH_PROP_ELEM(fn) fn(DT_N_S_pin_controller_S_uart1_default_S_group2, psels, 0) \
+	fn(DT_N_S_pin_controller_S_uart1_default_S_group2, psels, 1)
+#define DT_N_S_pin_controller_S_uart1_default_S_group2_P_psels_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_pin_controller_S_uart1_default_S_group2, psels, 0) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_pin_controller_S_uart1_default_S_group2, psels, 1)
+#define DT_N_S_pin_controller_S_uart1_default_S_group2_P_psels_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_pin_controller_S_uart1_default_S_group2, psels, 0, __VA_ARGS__) \
+	fn(DT_N_S_pin_controller_S_uart1_default_S_group2, psels, 1, __VA_ARGS__)
+#define DT_N_S_pin_controller_S_uart1_default_S_group2_P_psels_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_pin_controller_S_uart1_default_S_group2, psels, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_pin_controller_S_uart1_default_S_group2, psels, 1, __VA_ARGS__)
+#define DT_N_S_pin_controller_S_uart1_default_S_group2_P_psels_LEN 2
+#define DT_N_S_pin_controller_S_uart1_default_S_group2_P_psels_EXISTS 1
+#define DT_N_S_pin_controller_S_uart1_default_S_group2_P_nordic_drive_mode 0
+#define DT_N_S_pin_controller_S_uart1_default_S_group2_P_nordic_drive_mode_EXISTS 1
+#define DT_N_S_pin_controller_S_uart1_default_S_group2_P_nordic_invert 0
+#define DT_N_S_pin_controller_S_uart1_default_S_group2_P_nordic_invert_EXISTS 1
+
+/*
+ * Devicetree node: /pin-controller/uart1_sleep
+ *
+ * Node identifier: DT_N_S_pin_controller_S_uart1_sleep
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_pin_controller_S_uart1_sleep_PATH "/pin-controller/uart1_sleep"
+
+/* Node's name with unit-address: */
+#define DT_N_S_pin_controller_S_uart1_sleep_FULL_NAME "uart1_sleep"
+
+/* Node parent (/pin-controller) identifier: */
+#define DT_N_S_pin_controller_S_uart1_sleep_PARENT DT_N_S_pin_controller
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_pin_controller_S_uart1_sleep_CHILD_IDX 3
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_pin_controller_S_uart1_sleep_CHILD_NUM 1
+#define DT_N_S_pin_controller_S_uart1_sleep_CHILD_NUM_STATUS_OKAY 1
+#define DT_N_S_pin_controller_S_uart1_sleep_FOREACH_CHILD(fn) fn(DT_N_S_pin_controller_S_uart1_sleep_S_group1)
+#define DT_N_S_pin_controller_S_uart1_sleep_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_pin_controller_S_uart1_sleep_S_group1)
+#define DT_N_S_pin_controller_S_uart1_sleep_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_pin_controller_S_uart1_sleep_S_group1, __VA_ARGS__)
+#define DT_N_S_pin_controller_S_uart1_sleep_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_pin_controller_S_uart1_sleep_S_group1, __VA_ARGS__)
+#define DT_N_S_pin_controller_S_uart1_sleep_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_pin_controller_S_uart1_sleep_S_group1)
+#define DT_N_S_pin_controller_S_uart1_sleep_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_pin_controller_S_uart1_sleep_S_group1)
+#define DT_N_S_pin_controller_S_uart1_sleep_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_pin_controller_S_uart1_sleep_S_group1, __VA_ARGS__)
+#define DT_N_S_pin_controller_S_uart1_sleep_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_pin_controller_S_uart1_sleep_S_group1, __VA_ARGS__)
+
+/* Node's dependency ordinal: */
+#define DT_N_S_pin_controller_S_uart1_sleep_ORD 48
+#define DT_N_S_pin_controller_S_uart1_sleep_ORD_STR_SORTABLE 00048
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_pin_controller_S_uart1_sleep_REQUIRES_ORDS \
+	27, /* /pin-controller */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_pin_controller_S_uart1_sleep_SUPPORTS_ORDS \
+	49, /* /pin-controller/uart1_sleep/group1 */ \
+	93, /* /soc/peripheral@50000000/uart@9000 */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_pin_controller_S_uart1_sleep_EXISTS 1
+#define DT_N_NODELABEL_uart1_sleep DT_N_S_pin_controller_S_uart1_sleep
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_pin_controller_S_uart1_sleep_REG_NUM 0
+#define DT_N_S_pin_controller_S_uart1_sleep_RANGES_NUM 0
+#define DT_N_S_pin_controller_S_uart1_sleep_FOREACH_RANGE(fn) 
+#define DT_N_S_pin_controller_S_uart1_sleep_IRQ_NUM 0
+#define DT_N_S_pin_controller_S_uart1_sleep_IRQ_LEVEL 0
+#define DT_N_S_pin_controller_S_uart1_sleep_STATUS_okay 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_pin_controller_S_uart1_sleep_PINCTRL_NUM 0
+
+/* (No generic property macros) */
+
+/*
+ * Devicetree node: /pin-controller/uart1_sleep/group1
+ *
+ * Node identifier: DT_N_S_pin_controller_S_uart1_sleep_S_group1
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_pin_controller_S_uart1_sleep_S_group1_PATH "/pin-controller/uart1_sleep/group1"
+
+/* Node's name with unit-address: */
+#define DT_N_S_pin_controller_S_uart1_sleep_S_group1_FULL_NAME "group1"
+
+/* Node parent (/pin-controller/uart1_sleep) identifier: */
+#define DT_N_S_pin_controller_S_uart1_sleep_S_group1_PARENT DT_N_S_pin_controller_S_uart1_sleep
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_pin_controller_S_uart1_sleep_S_group1_CHILD_IDX 0
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_pin_controller_S_uart1_sleep_S_group1_CHILD_NUM 0
+#define DT_N_S_pin_controller_S_uart1_sleep_S_group1_CHILD_NUM_STATUS_OKAY 0
+#define DT_N_S_pin_controller_S_uart1_sleep_S_group1_FOREACH_CHILD(fn) 
+#define DT_N_S_pin_controller_S_uart1_sleep_S_group1_FOREACH_CHILD_SEP(fn, sep) 
+#define DT_N_S_pin_controller_S_uart1_sleep_S_group1_FOREACH_CHILD_VARGS(fn, ...) 
+#define DT_N_S_pin_controller_S_uart1_sleep_S_group1_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
+#define DT_N_S_pin_controller_S_uart1_sleep_S_group1_FOREACH_CHILD_STATUS_OKAY(fn) 
+#define DT_N_S_pin_controller_S_uart1_sleep_S_group1_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
+#define DT_N_S_pin_controller_S_uart1_sleep_S_group1_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
+#define DT_N_S_pin_controller_S_uart1_sleep_S_group1_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 
+
+/* Node's dependency ordinal: */
+#define DT_N_S_pin_controller_S_uart1_sleep_S_group1_ORD 49
+#define DT_N_S_pin_controller_S_uart1_sleep_S_group1_ORD_STR_SORTABLE 00049
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_pin_controller_S_uart1_sleep_S_group1_REQUIRES_ORDS \
+	48, /* /pin-controller/uart1_sleep */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_pin_controller_S_uart1_sleep_S_group1_SUPPORTS_ORDS /* nothing */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_pin_controller_S_uart1_sleep_S_group1_EXISTS 1
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_pin_controller_S_uart1_sleep_S_group1_REG_NUM 0
+#define DT_N_S_pin_controller_S_uart1_sleep_S_group1_RANGES_NUM 0
+#define DT_N_S_pin_controller_S_uart1_sleep_S_group1_FOREACH_RANGE(fn) 
+#define DT_N_S_pin_controller_S_uart1_sleep_S_group1_IRQ_NUM 0
+#define DT_N_S_pin_controller_S_uart1_sleep_S_group1_IRQ_LEVEL 0
+#define DT_N_S_pin_controller_S_uart1_sleep_S_group1_STATUS_okay 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_pin_controller_S_uart1_sleep_S_group1_PINCTRL_NUM 0
+
+/* Generic property macros: */
+#define DT_N_S_pin_controller_S_uart1_sleep_S_group1_P_bias_disable 0
+#define DT_N_S_pin_controller_S_uart1_sleep_S_group1_P_bias_disable_EXISTS 1
+#define DT_N_S_pin_controller_S_uart1_sleep_S_group1_P_bias_pull_up 0
+#define DT_N_S_pin_controller_S_uart1_sleep_S_group1_P_bias_pull_up_EXISTS 1
+#define DT_N_S_pin_controller_S_uart1_sleep_S_group1_P_bias_pull_down 0
+#define DT_N_S_pin_controller_S_uart1_sleep_S_group1_P_bias_pull_down_EXISTS 1
+#define DT_N_S_pin_controller_S_uart1_sleep_S_group1_P_low_power_enable 1
+#define DT_N_S_pin_controller_S_uart1_sleep_S_group1_P_low_power_enable_EXISTS 1
+#define DT_N_S_pin_controller_S_uart1_sleep_S_group1_P_psels {29 /* 0x1d */, 131100 /* 0x2001c */, 262160 /* 0x40010 */, 393233 /* 0x60011 */}
+#define DT_N_S_pin_controller_S_uart1_sleep_S_group1_P_psels_IDX_0 29
+#define DT_N_S_pin_controller_S_uart1_sleep_S_group1_P_psels_IDX_0_EXISTS 1
+#define DT_N_S_pin_controller_S_uart1_sleep_S_group1_P_psels_IDX_1 131100
+#define DT_N_S_pin_controller_S_uart1_sleep_S_group1_P_psels_IDX_1_EXISTS 1
+#define DT_N_S_pin_controller_S_uart1_sleep_S_group1_P_psels_IDX_2 262160
+#define DT_N_S_pin_controller_S_uart1_sleep_S_group1_P_psels_IDX_2_EXISTS 1
+#define DT_N_S_pin_controller_S_uart1_sleep_S_group1_P_psels_IDX_3 393233
+#define DT_N_S_pin_controller_S_uart1_sleep_S_group1_P_psels_IDX_3_EXISTS 1
+#define DT_N_S_pin_controller_S_uart1_sleep_S_group1_P_psels_FOREACH_PROP_ELEM(fn) fn(DT_N_S_pin_controller_S_uart1_sleep_S_group1, psels, 0) \
+	fn(DT_N_S_pin_controller_S_uart1_sleep_S_group1, psels, 1) \
+	fn(DT_N_S_pin_controller_S_uart1_sleep_S_group1, psels, 2) \
+	fn(DT_N_S_pin_controller_S_uart1_sleep_S_group1, psels, 3)
+#define DT_N_S_pin_controller_S_uart1_sleep_S_group1_P_psels_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_pin_controller_S_uart1_sleep_S_group1, psels, 0) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_pin_controller_S_uart1_sleep_S_group1, psels, 1) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_pin_controller_S_uart1_sleep_S_group1, psels, 2) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_pin_controller_S_uart1_sleep_S_group1, psels, 3)
+#define DT_N_S_pin_controller_S_uart1_sleep_S_group1_P_psels_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_pin_controller_S_uart1_sleep_S_group1, psels, 0, __VA_ARGS__) \
+	fn(DT_N_S_pin_controller_S_uart1_sleep_S_group1, psels, 1, __VA_ARGS__) \
+	fn(DT_N_S_pin_controller_S_uart1_sleep_S_group1, psels, 2, __VA_ARGS__) \
+	fn(DT_N_S_pin_controller_S_uart1_sleep_S_group1, psels, 3, __VA_ARGS__)
+#define DT_N_S_pin_controller_S_uart1_sleep_S_group1_P_psels_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_pin_controller_S_uart1_sleep_S_group1, psels, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_pin_controller_S_uart1_sleep_S_group1, psels, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_pin_controller_S_uart1_sleep_S_group1, psels, 2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_pin_controller_S_uart1_sleep_S_group1, psels, 3, __VA_ARGS__)
+#define DT_N_S_pin_controller_S_uart1_sleep_S_group1_P_psels_LEN 4
+#define DT_N_S_pin_controller_S_uart1_sleep_S_group1_P_psels_EXISTS 1
+#define DT_N_S_pin_controller_S_uart1_sleep_S_group1_P_nordic_drive_mode 0
+#define DT_N_S_pin_controller_S_uart1_sleep_S_group1_P_nordic_drive_mode_EXISTS 1
+#define DT_N_S_pin_controller_S_uart1_sleep_S_group1_P_nordic_invert 0
+#define DT_N_S_pin_controller_S_uart1_sleep_S_group1_P_nordic_invert_EXISTS 1
+
+/*
+ * Devicetree node: /soc/peripheral@50000000/pwm@21000
+ *
+ * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_pwm_21000
+ *
+ * Binding (compatible = nordic,nrf-pwm):
+ *   $ZEPHYR_BASE/dts/bindings/pwm/nordic,nrf-pwm.yaml
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_PATH "/soc/peripheral@50000000/pwm@21000"
+
+/* Node's name with unit-address: */
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_FULL_NAME "pwm@21000"
+
+/* Node parent (/soc/peripheral@50000000) identifier: */
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_PARENT DT_N_S_soc_S_peripheral_50000000
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_CHILD_IDX 27
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_CHILD_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_CHILD_NUM_STATUS_OKAY 0
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_FOREACH_CHILD(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_FOREACH_CHILD_SEP(fn, sep) 
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_FOREACH_CHILD_VARGS(fn, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_FOREACH_CHILD_STATUS_OKAY(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 
+
+/* Node's dependency ordinal: */
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_ORD 50
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_ORD_STR_SORTABLE 00050
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_REQUIRES_ORDS \
+	7, /* /soc/interrupt-controller@e000e100 */ \
+	9, /* /soc/peripheral@50000000 */ \
+	32, /* /pin-controller/pwm0_default */ \
+	34, /* /pin-controller/pwm0_sleep */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_SUPPORTS_ORDS \
+	51, /* /pwmleds */ \
+	52, /* /pwmleds/pwm_led_0 */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_EXISTS 1
+#define DT_N_INST_0_nordic_nrf_pwm DT_N_S_soc_S_peripheral_50000000_S_pwm_21000
+#define DT_N_NODELABEL_pwm0        DT_N_S_soc_S_peripheral_50000000_S_pwm_21000
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_REG_NUM 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_REG_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_REG_IDX_0_VAL_ADDRESS 1342312448 /* 0x50021000 */
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_RANGES_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_FOREACH_RANGE(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_IRQ_NUM 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_IRQ_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_IRQ_IDX_0_VAL_irq 33
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_IRQ_IDX_0_VAL_irq_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_IRQ_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_IRQ_IDX_0_VAL_priority 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_IRQ_IDX_0_VAL_priority_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_IRQ_LEVEL 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_COMPAT_MATCHES_nordic_nrf_pwm 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_COMPAT_VENDOR_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_COMPAT_MODEL_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_COMPAT_MODEL_IDX_0 "nrf-pwm"
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_STATUS_okay 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_PINCTRL_NUM 2
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_PINCTRL_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_PINCTRL_IDX_0_TOKEN default
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_PINCTRL_IDX_0_UPPER_TOKEN DEFAULT
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_PINCTRL_NAME_default_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_PINCTRL_NAME_default_IDX 0
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_PINCTRL_NAME_default_IDX_0_PH DT_N_S_pin_controller_S_pwm0_default
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_PINCTRL_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_PINCTRL_IDX_1_TOKEN sleep
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_PINCTRL_IDX_1_UPPER_TOKEN SLEEP
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_PINCTRL_NAME_sleep_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_PINCTRL_NAME_sleep_IDX 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_PINCTRL_NAME_sleep_IDX_0_PH DT_N_S_pin_controller_S_pwm0_sleep
+
+/* Generic property macros: */
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_wakeup_source 0
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_wakeup_source_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_zephyr_pm_device_runtime_auto 0
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_zephyr_pm_device_runtime_auto_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_status "okay"
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_status_STRING_UNQUOTED okay
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_status_STRING_TOKEN okay
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_status_STRING_UPPER_TOKEN OKAY
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_status_IDX_0 "okay"
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_status_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_status_ENUM_IDX 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_status_ENUM_VAL_okay_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_status_ENUM_TOKEN okay
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_status_ENUM_UPPER_TOKEN OKAY
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_21000, status, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_21000, status, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_21000, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_21000, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_status_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_status_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_compatible {"nordic,nrf-pwm"}
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_compatible_IDX_0 "nordic,nrf-pwm"
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-pwm
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_pwm
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_PWM
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_compatible_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_21000, compatible, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_21000, compatible, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_21000, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_21000, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_compatible_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_compatible_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_reg {135168 /* 0x21000 */, 4096 /* 0x1000 */}
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_reg_IDX_0 135168
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_reg_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_reg_IDX_1 4096
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_reg_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_reg_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_interrupts {33 /* 0x21 */, 1 /* 0x1 */}
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_interrupts_IDX_0 33
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_interrupts_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_interrupts_IDX_1 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_interrupts_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_interrupts_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_zephyr_deferred_init 0
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_zephyr_deferred_init_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_pinctrl_0_IDX_0 DT_N_S_pin_controller_S_pwm0_default
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_pinctrl_0_IDX_0_PH DT_N_S_pin_controller_S_pwm0_default
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_pinctrl_0_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_pinctrl_0_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_21000, pinctrl_0, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_pinctrl_0_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_21000, pinctrl_0, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_pinctrl_0_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_21000, pinctrl_0, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_pinctrl_0_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_21000, pinctrl_0, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_pinctrl_0_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_pinctrl_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_pinctrl_1_IDX_0 DT_N_S_pin_controller_S_pwm0_sleep
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_pinctrl_1_IDX_0_PH DT_N_S_pin_controller_S_pwm0_sleep
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_pinctrl_1_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_pinctrl_1_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_21000, pinctrl_1, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_pinctrl_1_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_21000, pinctrl_1, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_pinctrl_1_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_21000, pinctrl_1, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_pinctrl_1_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_21000, pinctrl_1, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_pinctrl_1_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_pinctrl_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_pinctrl_names {"default", "sleep"}
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_pinctrl_names_IDX_0 "default"
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_pinctrl_names_IDX_0_STRING_UNQUOTED default
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_pinctrl_names_IDX_0_STRING_TOKEN default
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_pinctrl_names_IDX_0_STRING_UPPER_TOKEN DEFAULT
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_pinctrl_names_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_pinctrl_names_IDX_1 "sleep"
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_pinctrl_names_IDX_1_STRING_UNQUOTED sleep
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_pinctrl_names_IDX_1_STRING_TOKEN sleep
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_pinctrl_names_IDX_1_STRING_UPPER_TOKEN SLEEP
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_pinctrl_names_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_pinctrl_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_21000, pinctrl_names, 0) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_21000, pinctrl_names, 1)
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_pinctrl_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_21000, pinctrl_names, 0) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_21000, pinctrl_names, 1)
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_pinctrl_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_21000, pinctrl_names, 0, __VA_ARGS__) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_21000, pinctrl_names, 1, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_pinctrl_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_21000, pinctrl_names, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_21000, pinctrl_names, 1, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_pinctrl_names_LEN 2
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_pinctrl_names_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_center_aligned 0
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_21000_P_center_aligned_EXISTS 1
+
+/*
+ * Devicetree node: /pwmleds
+ *
+ * Node identifier: DT_N_S_pwmleds
+ *
+ * Binding (compatible = pwm-leds):
+ *   $ZEPHYR_BASE/dts/bindings/led/pwm-leds.yaml
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_pwmleds_PATH "/pwmleds"
+
+/* Node's name with unit-address: */
+#define DT_N_S_pwmleds_FULL_NAME "pwmleds"
+
+/* Node parent (/) identifier: */
+#define DT_N_S_pwmleds_PARENT DT_N
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_pwmleds_CHILD_IDX 8
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_pwmleds_CHILD_NUM 1
+#define DT_N_S_pwmleds_CHILD_NUM_STATUS_OKAY 1
+#define DT_N_S_pwmleds_FOREACH_CHILD(fn) fn(DT_N_S_pwmleds_S_pwm_led_0)
+#define DT_N_S_pwmleds_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_pwmleds_S_pwm_led_0)
+#define DT_N_S_pwmleds_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_pwmleds_S_pwm_led_0, __VA_ARGS__)
+#define DT_N_S_pwmleds_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_pwmleds_S_pwm_led_0, __VA_ARGS__)
+#define DT_N_S_pwmleds_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_pwmleds_S_pwm_led_0)
+#define DT_N_S_pwmleds_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_pwmleds_S_pwm_led_0)
+#define DT_N_S_pwmleds_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_pwmleds_S_pwm_led_0, __VA_ARGS__)
+#define DT_N_S_pwmleds_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_pwmleds_S_pwm_led_0, __VA_ARGS__)
+
+/* Node's dependency ordinal: */
+#define DT_N_S_pwmleds_ORD 51
+#define DT_N_S_pwmleds_ORD_STR_SORTABLE 00051
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_pwmleds_REQUIRES_ORDS \
+	0, /* / */ \
+	50, /* /soc/peripheral@50000000/pwm@21000 */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_pwmleds_SUPPORTS_ORDS \
+	52, /* /pwmleds/pwm_led_0 */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_pwmleds_EXISTS 1
+#define DT_N_INST_0_pwm_leds DT_N_S_pwmleds
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_pwmleds_REG_NUM 0
+#define DT_N_S_pwmleds_RANGES_NUM 0
+#define DT_N_S_pwmleds_FOREACH_RANGE(fn) 
+#define DT_N_S_pwmleds_IRQ_NUM 0
+#define DT_N_S_pwmleds_IRQ_LEVEL 0
+#define DT_N_S_pwmleds_COMPAT_MATCHES_pwm_leds 1
+#define DT_N_S_pwmleds_STATUS_okay 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_pwmleds_PINCTRL_NUM 0
+
+/* Generic property macros: */
+#define DT_N_S_pwmleds_P_compatible {"pwm-leds"}
+#define DT_N_S_pwmleds_P_compatible_IDX_0 "pwm-leds"
+#define DT_N_S_pwmleds_P_compatible_IDX_0_STRING_UNQUOTED pwm-leds
+#define DT_N_S_pwmleds_P_compatible_IDX_0_STRING_TOKEN pwm_leds
+#define DT_N_S_pwmleds_P_compatible_IDX_0_STRING_UPPER_TOKEN PWM_LEDS
+#define DT_N_S_pwmleds_P_compatible_IDX_0_EXISTS 1
+#define DT_N_S_pwmleds_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_pwmleds, compatible, 0)
+#define DT_N_S_pwmleds_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_pwmleds, compatible, 0)
+#define DT_N_S_pwmleds_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_pwmleds, compatible, 0, __VA_ARGS__)
+#define DT_N_S_pwmleds_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_pwmleds, compatible, 0, __VA_ARGS__)
+#define DT_N_S_pwmleds_P_compatible_LEN 1
+#define DT_N_S_pwmleds_P_compatible_EXISTS 1
+
+/*
+ * Devicetree node: /pwmleds/pwm_led_0
+ *
+ * Node identifier: DT_N_S_pwmleds_S_pwm_led_0
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_pwmleds_S_pwm_led_0_PATH "/pwmleds/pwm_led_0"
+
+/* Node's name with unit-address: */
+#define DT_N_S_pwmleds_S_pwm_led_0_FULL_NAME "pwm_led_0"
+
+/* Node parent (/pwmleds) identifier: */
+#define DT_N_S_pwmleds_S_pwm_led_0_PARENT DT_N_S_pwmleds
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_pwmleds_S_pwm_led_0_CHILD_IDX 0
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_pwmleds_S_pwm_led_0_CHILD_NUM 0
+#define DT_N_S_pwmleds_S_pwm_led_0_CHILD_NUM_STATUS_OKAY 0
+#define DT_N_S_pwmleds_S_pwm_led_0_FOREACH_CHILD(fn) 
+#define DT_N_S_pwmleds_S_pwm_led_0_FOREACH_CHILD_SEP(fn, sep) 
+#define DT_N_S_pwmleds_S_pwm_led_0_FOREACH_CHILD_VARGS(fn, ...) 
+#define DT_N_S_pwmleds_S_pwm_led_0_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
+#define DT_N_S_pwmleds_S_pwm_led_0_FOREACH_CHILD_STATUS_OKAY(fn) 
+#define DT_N_S_pwmleds_S_pwm_led_0_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
+#define DT_N_S_pwmleds_S_pwm_led_0_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
+#define DT_N_S_pwmleds_S_pwm_led_0_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 
+
+/* Node's dependency ordinal: */
+#define DT_N_S_pwmleds_S_pwm_led_0_ORD 52
+#define DT_N_S_pwmleds_S_pwm_led_0_ORD_STR_SORTABLE 00052
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_pwmleds_S_pwm_led_0_REQUIRES_ORDS \
+	50, /* /soc/peripheral@50000000/pwm@21000 */ \
+	51, /* /pwmleds */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_pwmleds_S_pwm_led_0_SUPPORTS_ORDS /* nothing */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_pwmleds_S_pwm_led_0_EXISTS 1
+#define DT_N_ALIAS_pwm_led0     DT_N_S_pwmleds_S_pwm_led_0
+#define DT_N_NODELABEL_pwm_led0 DT_N_S_pwmleds_S_pwm_led_0
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_pwmleds_S_pwm_led_0_REG_NUM 0
+#define DT_N_S_pwmleds_S_pwm_led_0_RANGES_NUM 0
+#define DT_N_S_pwmleds_S_pwm_led_0_FOREACH_RANGE(fn) 
+#define DT_N_S_pwmleds_S_pwm_led_0_IRQ_NUM 0
+#define DT_N_S_pwmleds_S_pwm_led_0_IRQ_LEVEL 0
+#define DT_N_S_pwmleds_S_pwm_led_0_STATUS_okay 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_pwmleds_S_pwm_led_0_PINCTRL_NUM 0
+
+/* Generic property macros: */
+#define DT_N_S_pwmleds_S_pwm_led_0_P_pwms_IDX_0_EXISTS 1
+#define DT_N_S_pwmleds_S_pwm_led_0_P_pwms_IDX_0_PH DT_N_S_soc_S_peripheral_50000000_S_pwm_21000
+#define DT_N_S_pwmleds_S_pwm_led_0_P_pwms_IDX_0_VAL_channel 0
+#define DT_N_S_pwmleds_S_pwm_led_0_P_pwms_IDX_0_VAL_channel_EXISTS 1
+#define DT_N_S_pwmleds_S_pwm_led_0_P_pwms_IDX_0_VAL_period 20000000
+#define DT_N_S_pwmleds_S_pwm_led_0_P_pwms_IDX_0_VAL_period_EXISTS 1
+#define DT_N_S_pwmleds_S_pwm_led_0_P_pwms_IDX_0_VAL_flags 0
+#define DT_N_S_pwmleds_S_pwm_led_0_P_pwms_IDX_0_VAL_flags_EXISTS 1
+#define DT_N_S_pwmleds_S_pwm_led_0_P_pwms_FOREACH_PROP_ELEM(fn) fn(DT_N_S_pwmleds_S_pwm_led_0, pwms, 0)
+#define DT_N_S_pwmleds_S_pwm_led_0_P_pwms_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_pwmleds_S_pwm_led_0, pwms, 0)
+#define DT_N_S_pwmleds_S_pwm_led_0_P_pwms_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_pwmleds_S_pwm_led_0, pwms, 0, __VA_ARGS__)
+#define DT_N_S_pwmleds_S_pwm_led_0_P_pwms_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_pwmleds_S_pwm_led_0, pwms, 0, __VA_ARGS__)
+#define DT_N_S_pwmleds_S_pwm_led_0_P_pwms_LEN 1
+#define DT_N_S_pwmleds_S_pwm_led_0_P_pwms_EXISTS 1
+
+/*
+ * Devicetree node: /reserved-memory
+ *
+ * Node identifier: DT_N_S_reserved_memory
+ */
+
+/* Node's full path: */
+#define DT_N_S_reserved_memory_PATH "/reserved-memory"
+
+/* Node's name with unit-address: */
+#define DT_N_S_reserved_memory_FULL_NAME "reserved-memory"
+
+/* Node parent (/) identifier: */
+#define DT_N_S_reserved_memory_PARENT DT_N
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_reserved_memory_CHILD_IDX 13
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_reserved_memory_CHILD_NUM 3
+#define DT_N_S_reserved_memory_CHILD_NUM_STATUS_OKAY 3
+#define DT_N_S_reserved_memory_FOREACH_CHILD(fn) fn(DT_N_S_reserved_memory_S_image_s_20000000) fn(DT_N_S_reserved_memory_S_image_modem_20016000) fn(DT_N_S_reserved_memory_S_image_ns_20020000)
+#define DT_N_S_reserved_memory_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_reserved_memory_S_image_s_20000000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_reserved_memory_S_image_modem_20016000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_reserved_memory_S_image_ns_20020000)
+#define DT_N_S_reserved_memory_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_reserved_memory_S_image_s_20000000, __VA_ARGS__) fn(DT_N_S_reserved_memory_S_image_modem_20016000, __VA_ARGS__) fn(DT_N_S_reserved_memory_S_image_ns_20020000, __VA_ARGS__)
+#define DT_N_S_reserved_memory_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_reserved_memory_S_image_s_20000000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_reserved_memory_S_image_modem_20016000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_reserved_memory_S_image_ns_20020000, __VA_ARGS__)
+#define DT_N_S_reserved_memory_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_reserved_memory_S_image_s_20000000) fn(DT_N_S_reserved_memory_S_image_modem_20016000) fn(DT_N_S_reserved_memory_S_image_ns_20020000)
+#define DT_N_S_reserved_memory_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_reserved_memory_S_image_s_20000000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_reserved_memory_S_image_modem_20016000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_reserved_memory_S_image_ns_20020000)
+#define DT_N_S_reserved_memory_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_reserved_memory_S_image_s_20000000, __VA_ARGS__) fn(DT_N_S_reserved_memory_S_image_modem_20016000, __VA_ARGS__) fn(DT_N_S_reserved_memory_S_image_ns_20020000, __VA_ARGS__)
+#define DT_N_S_reserved_memory_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_reserved_memory_S_image_s_20000000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_reserved_memory_S_image_modem_20016000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_reserved_memory_S_image_ns_20020000, __VA_ARGS__)
+
+/* Node's dependency ordinal: */
+#define DT_N_S_reserved_memory_ORD 53
+#define DT_N_S_reserved_memory_ORD_STR_SORTABLE 00053
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_reserved_memory_REQUIRES_ORDS \
+	0, /* / */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_reserved_memory_SUPPORTS_ORDS \
+	54, /* /reserved-memory/image_modem@20016000 */ \
+	55, /* /reserved-memory/image_ns@20020000 */ \
+	56, /* /reserved-memory/image_s@20000000 */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_reserved_memory_EXISTS 1
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_reserved_memory_REG_NUM 0
+#define DT_N_S_reserved_memory_RANGES_NUM 0
+#define DT_N_S_reserved_memory_FOREACH_RANGE(fn) 
+#define DT_N_S_reserved_memory_IRQ_NUM 0
+#define DT_N_S_reserved_memory_IRQ_LEVEL 0
+#define DT_N_S_reserved_memory_STATUS_okay 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_reserved_memory_PINCTRL_NUM 0
+
+/* Generic property macros: */
+#define DT_N_S_reserved_memory_P_ranges_EXISTS 1
+
+/*
+ * Devicetree node: /reserved-memory/image_modem@20016000
+ *
+ * Node identifier: DT_N_S_reserved_memory_S_image_modem_20016000
+ */
+
+/* Node's full path: */
+#define DT_N_S_reserved_memory_S_image_modem_20016000_PATH "/reserved-memory/image_modem@20016000"
+
+/* Node's name with unit-address: */
+#define DT_N_S_reserved_memory_S_image_modem_20016000_FULL_NAME "image_modem@20016000"
+
+/* Node parent (/reserved-memory) identifier: */
+#define DT_N_S_reserved_memory_S_image_modem_20016000_PARENT DT_N_S_reserved_memory
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_reserved_memory_S_image_modem_20016000_CHILD_IDX 1
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_reserved_memory_S_image_modem_20016000_CHILD_NUM 0
+#define DT_N_S_reserved_memory_S_image_modem_20016000_CHILD_NUM_STATUS_OKAY 0
+#define DT_N_S_reserved_memory_S_image_modem_20016000_FOREACH_CHILD(fn) 
+#define DT_N_S_reserved_memory_S_image_modem_20016000_FOREACH_CHILD_SEP(fn, sep) 
+#define DT_N_S_reserved_memory_S_image_modem_20016000_FOREACH_CHILD_VARGS(fn, ...) 
+#define DT_N_S_reserved_memory_S_image_modem_20016000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
+#define DT_N_S_reserved_memory_S_image_modem_20016000_FOREACH_CHILD_STATUS_OKAY(fn) 
+#define DT_N_S_reserved_memory_S_image_modem_20016000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
+#define DT_N_S_reserved_memory_S_image_modem_20016000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
+#define DT_N_S_reserved_memory_S_image_modem_20016000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 
+
+/* Node's dependency ordinal: */
+#define DT_N_S_reserved_memory_S_image_modem_20016000_ORD 54
+#define DT_N_S_reserved_memory_S_image_modem_20016000_ORD_STR_SORTABLE 00054
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_reserved_memory_S_image_modem_20016000_REQUIRES_ORDS \
+	53, /* /reserved-memory */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_reserved_memory_S_image_modem_20016000_SUPPORTS_ORDS /* nothing */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_reserved_memory_S_image_modem_20016000_EXISTS 1
+#define DT_N_NODELABEL_sram0_modem DT_N_S_reserved_memory_S_image_modem_20016000
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_reserved_memory_S_image_modem_20016000_REG_NUM 1
+#define DT_N_S_reserved_memory_S_image_modem_20016000_REG_IDX_0_EXISTS 1
+#define DT_N_S_reserved_memory_S_image_modem_20016000_REG_IDX_0_VAL_ADDRESS 536961024 /* 0x20016000 */
+#define DT_N_S_reserved_memory_S_image_modem_20016000_REG_IDX_0_VAL_SIZE 40960 /* 0xa000 */
+#define DT_N_S_reserved_memory_S_image_modem_20016000_RANGES_NUM 0
+#define DT_N_S_reserved_memory_S_image_modem_20016000_FOREACH_RANGE(fn) 
+#define DT_N_S_reserved_memory_S_image_modem_20016000_IRQ_NUM 0
+#define DT_N_S_reserved_memory_S_image_modem_20016000_IRQ_LEVEL 0
+#define DT_N_S_reserved_memory_S_image_modem_20016000_STATUS_okay 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_reserved_memory_S_image_modem_20016000_PINCTRL_NUM 0
+
+/* Generic property macros: */
+#define DT_N_S_reserved_memory_S_image_modem_20016000_P_reg {536961024 /* 0x20016000 */, 40960 /* 0xa000 */}
+#define DT_N_S_reserved_memory_S_image_modem_20016000_P_reg_IDX_0 536961024
+#define DT_N_S_reserved_memory_S_image_modem_20016000_P_reg_IDX_0_EXISTS 1
+#define DT_N_S_reserved_memory_S_image_modem_20016000_P_reg_IDX_1 40960
+#define DT_N_S_reserved_memory_S_image_modem_20016000_P_reg_IDX_1_EXISTS 1
+#define DT_N_S_reserved_memory_S_image_modem_20016000_P_reg_EXISTS 1
+
+/*
+ * Devicetree node: /reserved-memory/image_ns@20020000
+ *
+ * Node identifier: DT_N_S_reserved_memory_S_image_ns_20020000
+ */
+
+/* Node's full path: */
+#define DT_N_S_reserved_memory_S_image_ns_20020000_PATH "/reserved-memory/image_ns@20020000"
+
+/* Node's name with unit-address: */
+#define DT_N_S_reserved_memory_S_image_ns_20020000_FULL_NAME "image_ns@20020000"
+
+/* Node parent (/reserved-memory) identifier: */
+#define DT_N_S_reserved_memory_S_image_ns_20020000_PARENT DT_N_S_reserved_memory
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_reserved_memory_S_image_ns_20020000_CHILD_IDX 2
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_reserved_memory_S_image_ns_20020000_CHILD_NUM 0
+#define DT_N_S_reserved_memory_S_image_ns_20020000_CHILD_NUM_STATUS_OKAY 0
+#define DT_N_S_reserved_memory_S_image_ns_20020000_FOREACH_CHILD(fn) 
+#define DT_N_S_reserved_memory_S_image_ns_20020000_FOREACH_CHILD_SEP(fn, sep) 
+#define DT_N_S_reserved_memory_S_image_ns_20020000_FOREACH_CHILD_VARGS(fn, ...) 
+#define DT_N_S_reserved_memory_S_image_ns_20020000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
+#define DT_N_S_reserved_memory_S_image_ns_20020000_FOREACH_CHILD_STATUS_OKAY(fn) 
+#define DT_N_S_reserved_memory_S_image_ns_20020000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
+#define DT_N_S_reserved_memory_S_image_ns_20020000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
+#define DT_N_S_reserved_memory_S_image_ns_20020000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 
+
+/* Node's dependency ordinal: */
+#define DT_N_S_reserved_memory_S_image_ns_20020000_ORD 55
+#define DT_N_S_reserved_memory_S_image_ns_20020000_ORD_STR_SORTABLE 00055
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_reserved_memory_S_image_ns_20020000_REQUIRES_ORDS \
+	53, /* /reserved-memory */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_reserved_memory_S_image_ns_20020000_SUPPORTS_ORDS /* nothing */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_reserved_memory_S_image_ns_20020000_EXISTS 1
+#define DT_N_NODELABEL_sram0_ns DT_N_S_reserved_memory_S_image_ns_20020000
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_reserved_memory_S_image_ns_20020000_REG_NUM 1
+#define DT_N_S_reserved_memory_S_image_ns_20020000_REG_IDX_0_EXISTS 1
+#define DT_N_S_reserved_memory_S_image_ns_20020000_REG_IDX_0_VAL_ADDRESS 537001984 /* 0x20020000 */
+#define DT_N_S_reserved_memory_S_image_ns_20020000_REG_IDX_0_VAL_SIZE 131072 /* 0x20000 */
+#define DT_N_S_reserved_memory_S_image_ns_20020000_RANGES_NUM 0
+#define DT_N_S_reserved_memory_S_image_ns_20020000_FOREACH_RANGE(fn) 
+#define DT_N_S_reserved_memory_S_image_ns_20020000_IRQ_NUM 0
+#define DT_N_S_reserved_memory_S_image_ns_20020000_IRQ_LEVEL 0
+#define DT_N_S_reserved_memory_S_image_ns_20020000_STATUS_okay 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_reserved_memory_S_image_ns_20020000_PINCTRL_NUM 0
+
+/* Generic property macros: */
+#define DT_N_S_reserved_memory_S_image_ns_20020000_P_reg {537001984 /* 0x20020000 */, 131072 /* 0x20000 */}
+#define DT_N_S_reserved_memory_S_image_ns_20020000_P_reg_IDX_0 537001984
+#define DT_N_S_reserved_memory_S_image_ns_20020000_P_reg_IDX_0_EXISTS 1
+#define DT_N_S_reserved_memory_S_image_ns_20020000_P_reg_IDX_1 131072
+#define DT_N_S_reserved_memory_S_image_ns_20020000_P_reg_IDX_1_EXISTS 1
+#define DT_N_S_reserved_memory_S_image_ns_20020000_P_reg_EXISTS 1
+
+/*
+ * Devicetree node: /reserved-memory/image_s@20000000
+ *
+ * Node identifier: DT_N_S_reserved_memory_S_image_s_20000000
+ */
+
+/* Node's full path: */
+#define DT_N_S_reserved_memory_S_image_s_20000000_PATH "/reserved-memory/image_s@20000000"
+
+/* Node's name with unit-address: */
+#define DT_N_S_reserved_memory_S_image_s_20000000_FULL_NAME "image_s@20000000"
+
+/* Node parent (/reserved-memory) identifier: */
+#define DT_N_S_reserved_memory_S_image_s_20000000_PARENT DT_N_S_reserved_memory
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_reserved_memory_S_image_s_20000000_CHILD_IDX 0
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_reserved_memory_S_image_s_20000000_CHILD_NUM 0
+#define DT_N_S_reserved_memory_S_image_s_20000000_CHILD_NUM_STATUS_OKAY 0
+#define DT_N_S_reserved_memory_S_image_s_20000000_FOREACH_CHILD(fn) 
+#define DT_N_S_reserved_memory_S_image_s_20000000_FOREACH_CHILD_SEP(fn, sep) 
+#define DT_N_S_reserved_memory_S_image_s_20000000_FOREACH_CHILD_VARGS(fn, ...) 
+#define DT_N_S_reserved_memory_S_image_s_20000000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
+#define DT_N_S_reserved_memory_S_image_s_20000000_FOREACH_CHILD_STATUS_OKAY(fn) 
+#define DT_N_S_reserved_memory_S_image_s_20000000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
+#define DT_N_S_reserved_memory_S_image_s_20000000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
+#define DT_N_S_reserved_memory_S_image_s_20000000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 
+
+/* Node's dependency ordinal: */
+#define DT_N_S_reserved_memory_S_image_s_20000000_ORD 56
+#define DT_N_S_reserved_memory_S_image_s_20000000_ORD_STR_SORTABLE 00056
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_reserved_memory_S_image_s_20000000_REQUIRES_ORDS \
+	53, /* /reserved-memory */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_reserved_memory_S_image_s_20000000_SUPPORTS_ORDS /* nothing */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_reserved_memory_S_image_s_20000000_EXISTS 1
+#define DT_N_NODELABEL_sram0_s DT_N_S_reserved_memory_S_image_s_20000000
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_reserved_memory_S_image_s_20000000_REG_NUM 1
+#define DT_N_S_reserved_memory_S_image_s_20000000_REG_IDX_0_EXISTS 1
+#define DT_N_S_reserved_memory_S_image_s_20000000_REG_IDX_0_VAL_ADDRESS 536870912 /* 0x20000000 */
+#define DT_N_S_reserved_memory_S_image_s_20000000_REG_IDX_0_VAL_SIZE 90112 /* 0x16000 */
+#define DT_N_S_reserved_memory_S_image_s_20000000_RANGES_NUM 0
+#define DT_N_S_reserved_memory_S_image_s_20000000_FOREACH_RANGE(fn) 
+#define DT_N_S_reserved_memory_S_image_s_20000000_IRQ_NUM 0
+#define DT_N_S_reserved_memory_S_image_s_20000000_IRQ_LEVEL 0
+#define DT_N_S_reserved_memory_S_image_s_20000000_STATUS_okay 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_reserved_memory_S_image_s_20000000_PINCTRL_NUM 0
+
+/* Generic property macros: */
+#define DT_N_S_reserved_memory_S_image_s_20000000_P_reg {536870912 /* 0x20000000 */, 90112 /* 0x16000 */}
+#define DT_N_S_reserved_memory_S_image_s_20000000_P_reg_IDX_0 536870912
+#define DT_N_S_reserved_memory_S_image_s_20000000_P_reg_IDX_0_EXISTS 1
+#define DT_N_S_reserved_memory_S_image_s_20000000_P_reg_IDX_1 90112
+#define DT_N_S_reserved_memory_S_image_s_20000000_P_reg_IDX_1_EXISTS 1
+#define DT_N_S_reserved_memory_S_image_s_20000000_P_reg_EXISTS 1
+
+/*
+ * Devicetree node: /soc/crypto@50840000
+ *
+ * Node identifier: DT_N_S_soc_S_crypto_50840000
+ *
+ * Binding (compatible = arm,cryptocell-310):
+ *   $ZEPHYR_BASE/dts/bindings/crypto/arm,cryptocell-310.yaml
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_soc_S_crypto_50840000_PATH "/soc/crypto@50840000"
+
+/* Node's name with unit-address: */
+#define DT_N_S_soc_S_crypto_50840000_FULL_NAME "crypto@50840000"
+
+/* Node parent (/soc) identifier: */
+#define DT_N_S_soc_S_crypto_50840000_PARENT DT_N_S_soc
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_soc_S_crypto_50840000_CHILD_IDX 4
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_soc_S_crypto_50840000_CHILD_NUM 0
+#define DT_N_S_soc_S_crypto_50840000_CHILD_NUM_STATUS_OKAY 0
+#define DT_N_S_soc_S_crypto_50840000_FOREACH_CHILD(fn) 
+#define DT_N_S_soc_S_crypto_50840000_FOREACH_CHILD_SEP(fn, sep) 
+#define DT_N_S_soc_S_crypto_50840000_FOREACH_CHILD_VARGS(fn, ...) 
+#define DT_N_S_soc_S_crypto_50840000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
+#define DT_N_S_soc_S_crypto_50840000_FOREACH_CHILD_STATUS_OKAY(fn) 
+#define DT_N_S_soc_S_crypto_50840000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
+#define DT_N_S_soc_S_crypto_50840000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
+#define DT_N_S_soc_S_crypto_50840000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 
+
+/* Node's dependency ordinal: */
+#define DT_N_S_soc_S_crypto_50840000_ORD 57
+#define DT_N_S_soc_S_crypto_50840000_ORD_STR_SORTABLE 00057
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_soc_S_crypto_50840000_REQUIRES_ORDS \
+	6, /* /soc */ \
+	7, /* /soc/interrupt-controller@e000e100 */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_soc_S_crypto_50840000_SUPPORTS_ORDS /* nothing */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_soc_S_crypto_50840000_EXISTS 1
+#define DT_N_INST_0_nordic_cryptocell  DT_N_S_soc_S_crypto_50840000
+#define DT_N_INST_0_arm_cryptocell_310 DT_N_S_soc_S_crypto_50840000
+#define DT_N_NODELABEL_cryptocell      DT_N_S_soc_S_crypto_50840000
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_soc_S_crypto_50840000_REG_NUM 2
+#define DT_N_S_soc_S_crypto_50840000_REG_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_crypto_50840000_REG_IDX_0_VAL_ADDRESS 1350828032 /* 0x50840000 */
+#define DT_N_S_soc_S_crypto_50840000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
+#define DT_N_S_soc_S_crypto_50840000_REG_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_crypto_50840000_REG_IDX_1_VAL_ADDRESS 1350832128 /* 0x50841000 */
+#define DT_N_S_soc_S_crypto_50840000_REG_IDX_1_VAL_SIZE 4096 /* 0x1000 */
+#define DT_N_S_soc_S_crypto_50840000_REG_NAME_wrapper_VAL_ADDRESS DT_N_S_soc_S_crypto_50840000_REG_IDX_0_VAL_ADDRESS
+#define DT_N_S_soc_S_crypto_50840000_REG_NAME_wrapper_VAL_SIZE DT_N_S_soc_S_crypto_50840000_REG_IDX_0_VAL_SIZE
+#define DT_N_S_soc_S_crypto_50840000_REG_NAME_core_VAL_ADDRESS DT_N_S_soc_S_crypto_50840000_REG_IDX_1_VAL_ADDRESS
+#define DT_N_S_soc_S_crypto_50840000_REG_NAME_core_VAL_SIZE DT_N_S_soc_S_crypto_50840000_REG_IDX_1_VAL_SIZE
+#define DT_N_S_soc_S_crypto_50840000_RANGES_NUM 0
+#define DT_N_S_soc_S_crypto_50840000_FOREACH_RANGE(fn) 
+#define DT_N_S_soc_S_crypto_50840000_IRQ_NUM 1
+#define DT_N_S_soc_S_crypto_50840000_IRQ_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_crypto_50840000_IRQ_IDX_0_VAL_irq 64
+#define DT_N_S_soc_S_crypto_50840000_IRQ_IDX_0_VAL_irq_EXISTS 1
+#define DT_N_S_soc_S_crypto_50840000_IRQ_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_crypto_50840000_IRQ_IDX_0_VAL_priority 1
+#define DT_N_S_soc_S_crypto_50840000_IRQ_IDX_0_VAL_priority_EXISTS 1
+#define DT_N_S_soc_S_crypto_50840000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100
+#define DT_N_S_soc_S_crypto_50840000_IRQ_LEVEL 1
+#define DT_N_S_soc_S_crypto_50840000_COMPAT_MATCHES_nordic_cryptocell 1
+#define DT_N_S_soc_S_crypto_50840000_COMPAT_VENDOR_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_crypto_50840000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
+#define DT_N_S_soc_S_crypto_50840000_COMPAT_MODEL_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_crypto_50840000_COMPAT_MODEL_IDX_0 "cryptocell"
+#define DT_N_S_soc_S_crypto_50840000_COMPAT_MATCHES_arm_cryptocell_310 1
+#define DT_N_S_soc_S_crypto_50840000_COMPAT_VENDOR_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_crypto_50840000_COMPAT_VENDOR_IDX_1 "ARM Ltd."
+#define DT_N_S_soc_S_crypto_50840000_COMPAT_MODEL_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_crypto_50840000_COMPAT_MODEL_IDX_1 "cryptocell-310"
+#define DT_N_S_soc_S_crypto_50840000_STATUS_okay 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_soc_S_crypto_50840000_PINCTRL_NUM 0
+
+/* Generic property macros: */
+#define DT_N_S_soc_S_crypto_50840000_P_wakeup_source 0
+#define DT_N_S_soc_S_crypto_50840000_P_wakeup_source_EXISTS 1
+#define DT_N_S_soc_S_crypto_50840000_P_zephyr_pm_device_runtime_auto 0
+#define DT_N_S_soc_S_crypto_50840000_P_zephyr_pm_device_runtime_auto_EXISTS 1
+#define DT_N_S_soc_S_crypto_50840000_P_status "okay"
+#define DT_N_S_soc_S_crypto_50840000_P_status_STRING_UNQUOTED okay
+#define DT_N_S_soc_S_crypto_50840000_P_status_STRING_TOKEN okay
+#define DT_N_S_soc_S_crypto_50840000_P_status_STRING_UPPER_TOKEN OKAY
+#define DT_N_S_soc_S_crypto_50840000_P_status_IDX_0 "okay"
+#define DT_N_S_soc_S_crypto_50840000_P_status_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_crypto_50840000_P_status_ENUM_IDX 1
+#define DT_N_S_soc_S_crypto_50840000_P_status_ENUM_VAL_okay_EXISTS 1
+#define DT_N_S_soc_S_crypto_50840000_P_status_ENUM_TOKEN okay
+#define DT_N_S_soc_S_crypto_50840000_P_status_ENUM_UPPER_TOKEN OKAY
+#define DT_N_S_soc_S_crypto_50840000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_crypto_50840000, status, 0)
+#define DT_N_S_soc_S_crypto_50840000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_crypto_50840000, status, 0)
+#define DT_N_S_soc_S_crypto_50840000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_crypto_50840000, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_crypto_50840000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_crypto_50840000, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_crypto_50840000_P_status_LEN 1
+#define DT_N_S_soc_S_crypto_50840000_P_status_EXISTS 1
+#define DT_N_S_soc_S_crypto_50840000_P_compatible {"nordic,cryptocell", "arm,cryptocell-310"}
+#define DT_N_S_soc_S_crypto_50840000_P_compatible_IDX_0 "nordic,cryptocell"
+#define DT_N_S_soc_S_crypto_50840000_P_compatible_IDX_0_STRING_UNQUOTED nordic,cryptocell
+#define DT_N_S_soc_S_crypto_50840000_P_compatible_IDX_0_STRING_TOKEN nordic_cryptocell
+#define DT_N_S_soc_S_crypto_50840000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_CRYPTOCELL
+#define DT_N_S_soc_S_crypto_50840000_P_compatible_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_crypto_50840000_P_compatible_IDX_1 "arm,cryptocell-310"
+#define DT_N_S_soc_S_crypto_50840000_P_compatible_IDX_1_STRING_UNQUOTED arm,cryptocell-310
+#define DT_N_S_soc_S_crypto_50840000_P_compatible_IDX_1_STRING_TOKEN arm_cryptocell_310
+#define DT_N_S_soc_S_crypto_50840000_P_compatible_IDX_1_STRING_UPPER_TOKEN ARM_CRYPTOCELL_310
+#define DT_N_S_soc_S_crypto_50840000_P_compatible_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_crypto_50840000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_crypto_50840000, compatible, 0) \
+	fn(DT_N_S_soc_S_crypto_50840000, compatible, 1)
+#define DT_N_S_soc_S_crypto_50840000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_crypto_50840000, compatible, 0) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_crypto_50840000, compatible, 1)
+#define DT_N_S_soc_S_crypto_50840000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_crypto_50840000, compatible, 0, __VA_ARGS__) \
+	fn(DT_N_S_soc_S_crypto_50840000, compatible, 1, __VA_ARGS__)
+#define DT_N_S_soc_S_crypto_50840000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_crypto_50840000, compatible, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_crypto_50840000, compatible, 1, __VA_ARGS__)
+#define DT_N_S_soc_S_crypto_50840000_P_compatible_LEN 2
+#define DT_N_S_soc_S_crypto_50840000_P_compatible_EXISTS 1
+#define DT_N_S_soc_S_crypto_50840000_P_reg {1350828032 /* 0x50840000 */, 4096 /* 0x1000 */, 1350832128 /* 0x50841000 */, 4096 /* 0x1000 */}
+#define DT_N_S_soc_S_crypto_50840000_P_reg_IDX_0 1350828032
+#define DT_N_S_soc_S_crypto_50840000_P_reg_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_crypto_50840000_P_reg_IDX_1 4096
+#define DT_N_S_soc_S_crypto_50840000_P_reg_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_crypto_50840000_P_reg_IDX_2 1350832128
+#define DT_N_S_soc_S_crypto_50840000_P_reg_IDX_2_EXISTS 1
+#define DT_N_S_soc_S_crypto_50840000_P_reg_IDX_3 4096
+#define DT_N_S_soc_S_crypto_50840000_P_reg_IDX_3_EXISTS 1
+#define DT_N_S_soc_S_crypto_50840000_P_reg_EXISTS 1
+#define DT_N_S_soc_S_crypto_50840000_P_reg_names {"wrapper", "core"}
+#define DT_N_S_soc_S_crypto_50840000_P_reg_names_IDX_0 "wrapper"
+#define DT_N_S_soc_S_crypto_50840000_P_reg_names_IDX_0_STRING_UNQUOTED wrapper
+#define DT_N_S_soc_S_crypto_50840000_P_reg_names_IDX_0_STRING_TOKEN wrapper
+#define DT_N_S_soc_S_crypto_50840000_P_reg_names_IDX_0_STRING_UPPER_TOKEN WRAPPER
+#define DT_N_S_soc_S_crypto_50840000_P_reg_names_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_crypto_50840000_P_reg_names_IDX_1 "core"
+#define DT_N_S_soc_S_crypto_50840000_P_reg_names_IDX_1_STRING_UNQUOTED core
+#define DT_N_S_soc_S_crypto_50840000_P_reg_names_IDX_1_STRING_TOKEN core
+#define DT_N_S_soc_S_crypto_50840000_P_reg_names_IDX_1_STRING_UPPER_TOKEN CORE
+#define DT_N_S_soc_S_crypto_50840000_P_reg_names_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_crypto_50840000_P_reg_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_crypto_50840000, reg_names, 0) \
+	fn(DT_N_S_soc_S_crypto_50840000, reg_names, 1)
+#define DT_N_S_soc_S_crypto_50840000_P_reg_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_crypto_50840000, reg_names, 0) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_crypto_50840000, reg_names, 1)
+#define DT_N_S_soc_S_crypto_50840000_P_reg_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_crypto_50840000, reg_names, 0, __VA_ARGS__) \
+	fn(DT_N_S_soc_S_crypto_50840000, reg_names, 1, __VA_ARGS__)
+#define DT_N_S_soc_S_crypto_50840000_P_reg_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_crypto_50840000, reg_names, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_crypto_50840000, reg_names, 1, __VA_ARGS__)
+#define DT_N_S_soc_S_crypto_50840000_P_reg_names_LEN 2
+#define DT_N_S_soc_S_crypto_50840000_P_reg_names_EXISTS 1
+#define DT_N_S_soc_S_crypto_50840000_P_interrupts {64 /* 0x40 */, 1 /* 0x1 */}
+#define DT_N_S_soc_S_crypto_50840000_P_interrupts_IDX_0 64
+#define DT_N_S_soc_S_crypto_50840000_P_interrupts_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_crypto_50840000_P_interrupts_IDX_1 1
+#define DT_N_S_soc_S_crypto_50840000_P_interrupts_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_crypto_50840000_P_interrupts_EXISTS 1
+#define DT_N_S_soc_S_crypto_50840000_P_zephyr_deferred_init 0
+#define DT_N_S_soc_S_crypto_50840000_P_zephyr_deferred_init_EXISTS 1
+
+/*
+ * Devicetree node: /soc/ctrlap@50006000
+ *
+ * Node identifier: DT_N_S_soc_S_ctrlap_50006000
+ *
+ * Binding (compatible = nordic,nrf-ctrlapperi):
+ *   $ZEPHYR_BASE/dts/bindings/arm/nordic,nrf-ctrlapperi.yaml
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_soc_S_ctrlap_50006000_PATH "/soc/ctrlap@50006000"
+
+/* Node's name with unit-address: */
+#define DT_N_S_soc_S_ctrlap_50006000_FULL_NAME "ctrlap@50006000"
+
+/* Node parent (/soc) identifier: */
+#define DT_N_S_soc_S_ctrlap_50006000_PARENT DT_N_S_soc
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_soc_S_ctrlap_50006000_CHILD_IDX 5
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_soc_S_ctrlap_50006000_CHILD_NUM 0
+#define DT_N_S_soc_S_ctrlap_50006000_CHILD_NUM_STATUS_OKAY 0
+#define DT_N_S_soc_S_ctrlap_50006000_FOREACH_CHILD(fn) 
+#define DT_N_S_soc_S_ctrlap_50006000_FOREACH_CHILD_SEP(fn, sep) 
+#define DT_N_S_soc_S_ctrlap_50006000_FOREACH_CHILD_VARGS(fn, ...) 
+#define DT_N_S_soc_S_ctrlap_50006000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
+#define DT_N_S_soc_S_ctrlap_50006000_FOREACH_CHILD_STATUS_OKAY(fn) 
+#define DT_N_S_soc_S_ctrlap_50006000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
+#define DT_N_S_soc_S_ctrlap_50006000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
+#define DT_N_S_soc_S_ctrlap_50006000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 
+
+/* Node's dependency ordinal: */
+#define DT_N_S_soc_S_ctrlap_50006000_ORD 58
+#define DT_N_S_soc_S_ctrlap_50006000_ORD_STR_SORTABLE 00058
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_soc_S_ctrlap_50006000_REQUIRES_ORDS \
+	6, /* /soc */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_soc_S_ctrlap_50006000_SUPPORTS_ORDS /* nothing */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_soc_S_ctrlap_50006000_EXISTS 1
+#define DT_N_INST_0_nordic_nrf_ctrlapperi DT_N_S_soc_S_ctrlap_50006000
+#define DT_N_NODELABEL_ctrlap             DT_N_S_soc_S_ctrlap_50006000
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_soc_S_ctrlap_50006000_REG_NUM 1
+#define DT_N_S_soc_S_ctrlap_50006000_REG_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_ctrlap_50006000_REG_IDX_0_VAL_ADDRESS 1342201856 /* 0x50006000 */
+#define DT_N_S_soc_S_ctrlap_50006000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
+#define DT_N_S_soc_S_ctrlap_50006000_RANGES_NUM 0
+#define DT_N_S_soc_S_ctrlap_50006000_FOREACH_RANGE(fn) 
+#define DT_N_S_soc_S_ctrlap_50006000_IRQ_NUM 0
+#define DT_N_S_soc_S_ctrlap_50006000_IRQ_LEVEL 0
+#define DT_N_S_soc_S_ctrlap_50006000_COMPAT_MATCHES_nordic_nrf_ctrlapperi 1
+#define DT_N_S_soc_S_ctrlap_50006000_COMPAT_VENDOR_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_ctrlap_50006000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
+#define DT_N_S_soc_S_ctrlap_50006000_COMPAT_MODEL_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_ctrlap_50006000_COMPAT_MODEL_IDX_0 "nrf-ctrlapperi"
+#define DT_N_S_soc_S_ctrlap_50006000_STATUS_okay 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_soc_S_ctrlap_50006000_PINCTRL_NUM 0
+
+/* Generic property macros: */
+#define DT_N_S_soc_S_ctrlap_50006000_P_wakeup_source 0
+#define DT_N_S_soc_S_ctrlap_50006000_P_wakeup_source_EXISTS 1
+#define DT_N_S_soc_S_ctrlap_50006000_P_zephyr_pm_device_runtime_auto 0
+#define DT_N_S_soc_S_ctrlap_50006000_P_zephyr_pm_device_runtime_auto_EXISTS 1
+#define DT_N_S_soc_S_ctrlap_50006000_P_status "okay"
+#define DT_N_S_soc_S_ctrlap_50006000_P_status_STRING_UNQUOTED okay
+#define DT_N_S_soc_S_ctrlap_50006000_P_status_STRING_TOKEN okay
+#define DT_N_S_soc_S_ctrlap_50006000_P_status_STRING_UPPER_TOKEN OKAY
+#define DT_N_S_soc_S_ctrlap_50006000_P_status_IDX_0 "okay"
+#define DT_N_S_soc_S_ctrlap_50006000_P_status_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_ctrlap_50006000_P_status_ENUM_IDX 1
+#define DT_N_S_soc_S_ctrlap_50006000_P_status_ENUM_VAL_okay_EXISTS 1
+#define DT_N_S_soc_S_ctrlap_50006000_P_status_ENUM_TOKEN okay
+#define DT_N_S_soc_S_ctrlap_50006000_P_status_ENUM_UPPER_TOKEN OKAY
+#define DT_N_S_soc_S_ctrlap_50006000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_ctrlap_50006000, status, 0)
+#define DT_N_S_soc_S_ctrlap_50006000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_ctrlap_50006000, status, 0)
+#define DT_N_S_soc_S_ctrlap_50006000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_ctrlap_50006000, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_ctrlap_50006000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_ctrlap_50006000, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_ctrlap_50006000_P_status_LEN 1
+#define DT_N_S_soc_S_ctrlap_50006000_P_status_EXISTS 1
+#define DT_N_S_soc_S_ctrlap_50006000_P_compatible {"nordic,nrf-ctrlapperi"}
+#define DT_N_S_soc_S_ctrlap_50006000_P_compatible_IDX_0 "nordic,nrf-ctrlapperi"
+#define DT_N_S_soc_S_ctrlap_50006000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-ctrlapperi
+#define DT_N_S_soc_S_ctrlap_50006000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_ctrlapperi
+#define DT_N_S_soc_S_ctrlap_50006000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_CTRLAPPERI
+#define DT_N_S_soc_S_ctrlap_50006000_P_compatible_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_ctrlap_50006000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_ctrlap_50006000, compatible, 0)
+#define DT_N_S_soc_S_ctrlap_50006000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_ctrlap_50006000, compatible, 0)
+#define DT_N_S_soc_S_ctrlap_50006000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_ctrlap_50006000, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_ctrlap_50006000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_ctrlap_50006000, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_ctrlap_50006000_P_compatible_LEN 1
+#define DT_N_S_soc_S_ctrlap_50006000_P_compatible_EXISTS 1
+#define DT_N_S_soc_S_ctrlap_50006000_P_reg {1342201856 /* 0x50006000 */, 4096 /* 0x1000 */}
+#define DT_N_S_soc_S_ctrlap_50006000_P_reg_IDX_0 1342201856
+#define DT_N_S_soc_S_ctrlap_50006000_P_reg_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_ctrlap_50006000_P_reg_IDX_1 4096
+#define DT_N_S_soc_S_ctrlap_50006000_P_reg_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_ctrlap_50006000_P_reg_EXISTS 1
+#define DT_N_S_soc_S_ctrlap_50006000_P_zephyr_deferred_init 0
+#define DT_N_S_soc_S_ctrlap_50006000_P_zephyr_deferred_init_EXISTS 1
+
+/*
+ * Devicetree node: /soc/ficr@ff0000
+ *
+ * Node identifier: DT_N_S_soc_S_ficr_ff0000
+ *
+ * Binding (compatible = nordic,nrf-ficr):
+ *   $ZEPHYR_BASE/dts/bindings/misc/nordic,nrf-ficr.yaml
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_soc_S_ficr_ff0000_PATH "/soc/ficr@ff0000"
+
+/* Node's name with unit-address: */
+#define DT_N_S_soc_S_ficr_ff0000_FULL_NAME "ficr@ff0000"
+
+/* Node parent (/soc) identifier: */
+#define DT_N_S_soc_S_ficr_ff0000_PARENT DT_N_S_soc
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_soc_S_ficr_ff0000_CHILD_IDX 9
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_soc_S_ficr_ff0000_CHILD_NUM 0
+#define DT_N_S_soc_S_ficr_ff0000_CHILD_NUM_STATUS_OKAY 0
+#define DT_N_S_soc_S_ficr_ff0000_FOREACH_CHILD(fn) 
+#define DT_N_S_soc_S_ficr_ff0000_FOREACH_CHILD_SEP(fn, sep) 
+#define DT_N_S_soc_S_ficr_ff0000_FOREACH_CHILD_VARGS(fn, ...) 
+#define DT_N_S_soc_S_ficr_ff0000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
+#define DT_N_S_soc_S_ficr_ff0000_FOREACH_CHILD_STATUS_OKAY(fn) 
+#define DT_N_S_soc_S_ficr_ff0000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
+#define DT_N_S_soc_S_ficr_ff0000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
+#define DT_N_S_soc_S_ficr_ff0000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 
+
+/* Node's dependency ordinal: */
+#define DT_N_S_soc_S_ficr_ff0000_ORD 59
+#define DT_N_S_soc_S_ficr_ff0000_ORD_STR_SORTABLE 00059
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_soc_S_ficr_ff0000_REQUIRES_ORDS \
+	6, /* /soc */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_soc_S_ficr_ff0000_SUPPORTS_ORDS /* nothing */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_soc_S_ficr_ff0000_EXISTS 1
+#define DT_N_INST_0_nordic_nrf_ficr DT_N_S_soc_S_ficr_ff0000
+#define DT_N_NODELABEL_ficr         DT_N_S_soc_S_ficr_ff0000
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_soc_S_ficr_ff0000_REG_NUM 1
+#define DT_N_S_soc_S_ficr_ff0000_REG_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_ficr_ff0000_REG_IDX_0_VAL_ADDRESS 16711680 /* 0xff0000 */
+#define DT_N_S_soc_S_ficr_ff0000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
+#define DT_N_S_soc_S_ficr_ff0000_RANGES_NUM 0
+#define DT_N_S_soc_S_ficr_ff0000_FOREACH_RANGE(fn) 
+#define DT_N_S_soc_S_ficr_ff0000_IRQ_NUM 0
+#define DT_N_S_soc_S_ficr_ff0000_IRQ_LEVEL 0
+#define DT_N_S_soc_S_ficr_ff0000_COMPAT_MATCHES_nordic_nrf_ficr 1
+#define DT_N_S_soc_S_ficr_ff0000_COMPAT_VENDOR_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_ficr_ff0000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
+#define DT_N_S_soc_S_ficr_ff0000_COMPAT_MODEL_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_ficr_ff0000_COMPAT_MODEL_IDX_0 "nrf-ficr"
+#define DT_N_S_soc_S_ficr_ff0000_STATUS_okay 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_soc_S_ficr_ff0000_PINCTRL_NUM 0
+
+/* Generic property macros: */
+#define DT_N_S_soc_S_ficr_ff0000_P_wakeup_source 0
+#define DT_N_S_soc_S_ficr_ff0000_P_wakeup_source_EXISTS 1
+#define DT_N_S_soc_S_ficr_ff0000_P_zephyr_pm_device_runtime_auto 0
+#define DT_N_S_soc_S_ficr_ff0000_P_zephyr_pm_device_runtime_auto_EXISTS 1
+#define DT_N_S_soc_S_ficr_ff0000_P_status "okay"
+#define DT_N_S_soc_S_ficr_ff0000_P_status_STRING_UNQUOTED okay
+#define DT_N_S_soc_S_ficr_ff0000_P_status_STRING_TOKEN okay
+#define DT_N_S_soc_S_ficr_ff0000_P_status_STRING_UPPER_TOKEN OKAY
+#define DT_N_S_soc_S_ficr_ff0000_P_status_IDX_0 "okay"
+#define DT_N_S_soc_S_ficr_ff0000_P_status_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_ficr_ff0000_P_status_ENUM_IDX 1
+#define DT_N_S_soc_S_ficr_ff0000_P_status_ENUM_VAL_okay_EXISTS 1
+#define DT_N_S_soc_S_ficr_ff0000_P_status_ENUM_TOKEN okay
+#define DT_N_S_soc_S_ficr_ff0000_P_status_ENUM_UPPER_TOKEN OKAY
+#define DT_N_S_soc_S_ficr_ff0000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_ficr_ff0000, status, 0)
+#define DT_N_S_soc_S_ficr_ff0000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_ficr_ff0000, status, 0)
+#define DT_N_S_soc_S_ficr_ff0000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_ficr_ff0000, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_ficr_ff0000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_ficr_ff0000, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_ficr_ff0000_P_status_LEN 1
+#define DT_N_S_soc_S_ficr_ff0000_P_status_EXISTS 1
+#define DT_N_S_soc_S_ficr_ff0000_P_compatible {"nordic,nrf-ficr"}
+#define DT_N_S_soc_S_ficr_ff0000_P_compatible_IDX_0 "nordic,nrf-ficr"
+#define DT_N_S_soc_S_ficr_ff0000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-ficr
+#define DT_N_S_soc_S_ficr_ff0000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_ficr
+#define DT_N_S_soc_S_ficr_ff0000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_FICR
+#define DT_N_S_soc_S_ficr_ff0000_P_compatible_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_ficr_ff0000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_ficr_ff0000, compatible, 0)
+#define DT_N_S_soc_S_ficr_ff0000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_ficr_ff0000, compatible, 0)
+#define DT_N_S_soc_S_ficr_ff0000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_ficr_ff0000, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_ficr_ff0000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_ficr_ff0000, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_ficr_ff0000_P_compatible_LEN 1
+#define DT_N_S_soc_S_ficr_ff0000_P_compatible_EXISTS 1
+#define DT_N_S_soc_S_ficr_ff0000_P_reg {16711680 /* 0xff0000 */, 4096 /* 0x1000 */}
+#define DT_N_S_soc_S_ficr_ff0000_P_reg_IDX_0 16711680
+#define DT_N_S_soc_S_ficr_ff0000_P_reg_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_ficr_ff0000_P_reg_IDX_1 4096
+#define DT_N_S_soc_S_ficr_ff0000_P_reg_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_ficr_ff0000_P_reg_EXISTS 1
+#define DT_N_S_soc_S_ficr_ff0000_P_zephyr_deferred_init 0
+#define DT_N_S_soc_S_ficr_ff0000_P_zephyr_deferred_init_EXISTS 1
+
+/*
+ * Devicetree node: /soc/gpiote@40031000
+ *
+ * Node identifier: DT_N_S_soc_S_gpiote_40031000
+ *
+ * Binding (compatible = nordic,nrf-gpiote):
+ *   $ZEPHYR_BASE/dts/bindings/gpio/nordic,nrf-gpiote.yaml
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_soc_S_gpiote_40031000_PATH "/soc/gpiote@40031000"
+
+/* Node's name with unit-address: */
+#define DT_N_S_soc_S_gpiote_40031000_FULL_NAME "gpiote@40031000"
+
+/* Node parent (/soc) identifier: */
+#define DT_N_S_soc_S_gpiote_40031000_PARENT DT_N_S_soc
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_soc_S_gpiote_40031000_CHILD_IDX 7
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_soc_S_gpiote_40031000_CHILD_NUM 0
+#define DT_N_S_soc_S_gpiote_40031000_CHILD_NUM_STATUS_OKAY 0
+#define DT_N_S_soc_S_gpiote_40031000_FOREACH_CHILD(fn) 
+#define DT_N_S_soc_S_gpiote_40031000_FOREACH_CHILD_SEP(fn, sep) 
+#define DT_N_S_soc_S_gpiote_40031000_FOREACH_CHILD_VARGS(fn, ...) 
+#define DT_N_S_soc_S_gpiote_40031000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
+#define DT_N_S_soc_S_gpiote_40031000_FOREACH_CHILD_STATUS_OKAY(fn) 
+#define DT_N_S_soc_S_gpiote_40031000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
+#define DT_N_S_soc_S_gpiote_40031000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
+#define DT_N_S_soc_S_gpiote_40031000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 
+
+/* Node's dependency ordinal: */
+#define DT_N_S_soc_S_gpiote_40031000_ORD 60
+#define DT_N_S_soc_S_gpiote_40031000_ORD_STR_SORTABLE 00060
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_soc_S_gpiote_40031000_REQUIRES_ORDS \
+	6, /* /soc */ \
+	7, /* /soc/interrupt-controller@e000e100 */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_soc_S_gpiote_40031000_SUPPORTS_ORDS /* nothing */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_soc_S_gpiote_40031000_EXISTS 1
+#define DT_N_INST_1_nordic_nrf_gpiote DT_N_S_soc_S_gpiote_40031000
+#define DT_N_NODELABEL_gpiote1        DT_N_S_soc_S_gpiote_40031000
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_soc_S_gpiote_40031000_REG_NUM 1
+#define DT_N_S_soc_S_gpiote_40031000_REG_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_gpiote_40031000_REG_IDX_0_VAL_ADDRESS 1073942528 /* 0x40031000 */
+#define DT_N_S_soc_S_gpiote_40031000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
+#define DT_N_S_soc_S_gpiote_40031000_RANGES_NUM 0
+#define DT_N_S_soc_S_gpiote_40031000_FOREACH_RANGE(fn) 
+#define DT_N_S_soc_S_gpiote_40031000_IRQ_NUM 1
+#define DT_N_S_soc_S_gpiote_40031000_IRQ_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_gpiote_40031000_IRQ_IDX_0_VAL_irq 49
+#define DT_N_S_soc_S_gpiote_40031000_IRQ_IDX_0_VAL_irq_EXISTS 1
+#define DT_N_S_soc_S_gpiote_40031000_IRQ_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_gpiote_40031000_IRQ_IDX_0_VAL_priority 5
+#define DT_N_S_soc_S_gpiote_40031000_IRQ_IDX_0_VAL_priority_EXISTS 1
+#define DT_N_S_soc_S_gpiote_40031000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100
+#define DT_N_S_soc_S_gpiote_40031000_IRQ_LEVEL 1
+#define DT_N_S_soc_S_gpiote_40031000_COMPAT_MATCHES_nordic_nrf_gpiote 1
+#define DT_N_S_soc_S_gpiote_40031000_COMPAT_VENDOR_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_gpiote_40031000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
+#define DT_N_S_soc_S_gpiote_40031000_COMPAT_MODEL_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_gpiote_40031000_COMPAT_MODEL_IDX_0 "nrf-gpiote"
+#define DT_N_S_soc_S_gpiote_40031000_STATUS_disabled 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_soc_S_gpiote_40031000_PINCTRL_NUM 0
+
+/* Generic property macros: */
+#define DT_N_S_soc_S_gpiote_40031000_P_wakeup_source 0
+#define DT_N_S_soc_S_gpiote_40031000_P_wakeup_source_EXISTS 1
+#define DT_N_S_soc_S_gpiote_40031000_P_zephyr_pm_device_runtime_auto 0
+#define DT_N_S_soc_S_gpiote_40031000_P_zephyr_pm_device_runtime_auto_EXISTS 1
+#define DT_N_S_soc_S_gpiote_40031000_P_status "disabled"
+#define DT_N_S_soc_S_gpiote_40031000_P_status_STRING_UNQUOTED disabled
+#define DT_N_S_soc_S_gpiote_40031000_P_status_STRING_TOKEN disabled
+#define DT_N_S_soc_S_gpiote_40031000_P_status_STRING_UPPER_TOKEN DISABLED
+#define DT_N_S_soc_S_gpiote_40031000_P_status_IDX_0 "disabled"
+#define DT_N_S_soc_S_gpiote_40031000_P_status_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_gpiote_40031000_P_status_ENUM_IDX 2
+#define DT_N_S_soc_S_gpiote_40031000_P_status_ENUM_VAL_disabled_EXISTS 1
+#define DT_N_S_soc_S_gpiote_40031000_P_status_ENUM_TOKEN disabled
+#define DT_N_S_soc_S_gpiote_40031000_P_status_ENUM_UPPER_TOKEN DISABLED
+#define DT_N_S_soc_S_gpiote_40031000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_gpiote_40031000, status, 0)
+#define DT_N_S_soc_S_gpiote_40031000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_gpiote_40031000, status, 0)
+#define DT_N_S_soc_S_gpiote_40031000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_gpiote_40031000, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_gpiote_40031000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_gpiote_40031000, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_gpiote_40031000_P_status_LEN 1
+#define DT_N_S_soc_S_gpiote_40031000_P_status_EXISTS 1
+#define DT_N_S_soc_S_gpiote_40031000_P_compatible {"nordic,nrf-gpiote"}
+#define DT_N_S_soc_S_gpiote_40031000_P_compatible_IDX_0 "nordic,nrf-gpiote"
+#define DT_N_S_soc_S_gpiote_40031000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-gpiote
+#define DT_N_S_soc_S_gpiote_40031000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_gpiote
+#define DT_N_S_soc_S_gpiote_40031000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_GPIOTE
+#define DT_N_S_soc_S_gpiote_40031000_P_compatible_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_gpiote_40031000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_gpiote_40031000, compatible, 0)
+#define DT_N_S_soc_S_gpiote_40031000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_gpiote_40031000, compatible, 0)
+#define DT_N_S_soc_S_gpiote_40031000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_gpiote_40031000, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_gpiote_40031000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_gpiote_40031000, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_gpiote_40031000_P_compatible_LEN 1
+#define DT_N_S_soc_S_gpiote_40031000_P_compatible_EXISTS 1
+#define DT_N_S_soc_S_gpiote_40031000_P_reg {1073942528 /* 0x40031000 */, 4096 /* 0x1000 */}
+#define DT_N_S_soc_S_gpiote_40031000_P_reg_IDX_0 1073942528
+#define DT_N_S_soc_S_gpiote_40031000_P_reg_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_gpiote_40031000_P_reg_IDX_1 4096
+#define DT_N_S_soc_S_gpiote_40031000_P_reg_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_gpiote_40031000_P_reg_EXISTS 1
+#define DT_N_S_soc_S_gpiote_40031000_P_interrupts {49 /* 0x31 */, 5 /* 0x5 */}
+#define DT_N_S_soc_S_gpiote_40031000_P_interrupts_IDX_0 49
+#define DT_N_S_soc_S_gpiote_40031000_P_interrupts_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_gpiote_40031000_P_interrupts_IDX_1 5
+#define DT_N_S_soc_S_gpiote_40031000_P_interrupts_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_gpiote_40031000_P_interrupts_EXISTS 1
+#define DT_N_S_soc_S_gpiote_40031000_P_zephyr_deferred_init 0
+#define DT_N_S_soc_S_gpiote_40031000_P_zephyr_deferred_init_EXISTS 1
+#define DT_N_S_soc_S_gpiote_40031000_P_instance 1
+#define DT_N_S_soc_S_gpiote_40031000_P_instance_EXISTS 1
+
+/*
+ * Devicetree node: /soc/memory@20000000
+ *
+ * Node identifier: DT_N_S_soc_S_memory_20000000
+ *
+ * Binding (compatible = mmio-sram):
+ *   $ZEPHYR_BASE/dts/bindings/sram/mmio-sram.yaml
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_soc_S_memory_20000000_PATH "/soc/memory@20000000"
+
+/* Node's name with unit-address: */
+#define DT_N_S_soc_S_memory_20000000_FULL_NAME "memory@20000000"
+
+/* Node parent (/soc) identifier: */
+#define DT_N_S_soc_S_memory_20000000_PARENT DT_N_S_soc
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_soc_S_memory_20000000_CHILD_IDX 2
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_soc_S_memory_20000000_CHILD_NUM 0
+#define DT_N_S_soc_S_memory_20000000_CHILD_NUM_STATUS_OKAY 0
+#define DT_N_S_soc_S_memory_20000000_FOREACH_CHILD(fn) 
+#define DT_N_S_soc_S_memory_20000000_FOREACH_CHILD_SEP(fn, sep) 
+#define DT_N_S_soc_S_memory_20000000_FOREACH_CHILD_VARGS(fn, ...) 
+#define DT_N_S_soc_S_memory_20000000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
+#define DT_N_S_soc_S_memory_20000000_FOREACH_CHILD_STATUS_OKAY(fn) 
+#define DT_N_S_soc_S_memory_20000000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
+#define DT_N_S_soc_S_memory_20000000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
+#define DT_N_S_soc_S_memory_20000000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 
+
+/* Node's dependency ordinal: */
+#define DT_N_S_soc_S_memory_20000000_ORD 61
+#define DT_N_S_soc_S_memory_20000000_ORD_STR_SORTABLE 00061
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_soc_S_memory_20000000_REQUIRES_ORDS \
+	6, /* /soc */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_soc_S_memory_20000000_SUPPORTS_ORDS /* nothing */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_soc_S_memory_20000000_EXISTS 1
+#define DT_N_INST_0_mmio_sram DT_N_S_soc_S_memory_20000000
+#define DT_N_NODELABEL_sram0  DT_N_S_soc_S_memory_20000000
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_soc_S_memory_20000000_REG_NUM 1
+#define DT_N_S_soc_S_memory_20000000_REG_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_memory_20000000_REG_IDX_0_VAL_ADDRESS 536870912 /* 0x20000000 */
+#define DT_N_S_soc_S_memory_20000000_REG_IDX_0_VAL_SIZE 262144 /* 0x40000 */
+#define DT_N_S_soc_S_memory_20000000_RANGES_NUM 0
+#define DT_N_S_soc_S_memory_20000000_FOREACH_RANGE(fn) 
+#define DT_N_S_soc_S_memory_20000000_IRQ_NUM 0
+#define DT_N_S_soc_S_memory_20000000_IRQ_LEVEL 0
+#define DT_N_S_soc_S_memory_20000000_COMPAT_MATCHES_mmio_sram 1
+#define DT_N_S_soc_S_memory_20000000_STATUS_okay 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_soc_S_memory_20000000_PINCTRL_NUM 0
+
+/* Generic property macros: */
+#define DT_N_S_soc_S_memory_20000000_P_wakeup_source 0
+#define DT_N_S_soc_S_memory_20000000_P_wakeup_source_EXISTS 1
+#define DT_N_S_soc_S_memory_20000000_P_zephyr_pm_device_runtime_auto 0
+#define DT_N_S_soc_S_memory_20000000_P_zephyr_pm_device_runtime_auto_EXISTS 1
+#define DT_N_S_soc_S_memory_20000000_P_compatible {"mmio-sram"}
+#define DT_N_S_soc_S_memory_20000000_P_compatible_IDX_0 "mmio-sram"
+#define DT_N_S_soc_S_memory_20000000_P_compatible_IDX_0_STRING_UNQUOTED mmio-sram
+#define DT_N_S_soc_S_memory_20000000_P_compatible_IDX_0_STRING_TOKEN mmio_sram
+#define DT_N_S_soc_S_memory_20000000_P_compatible_IDX_0_STRING_UPPER_TOKEN MMIO_SRAM
+#define DT_N_S_soc_S_memory_20000000_P_compatible_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_memory_20000000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_memory_20000000, compatible, 0)
+#define DT_N_S_soc_S_memory_20000000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_memory_20000000, compatible, 0)
+#define DT_N_S_soc_S_memory_20000000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_memory_20000000, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_memory_20000000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_memory_20000000, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_memory_20000000_P_compatible_LEN 1
+#define DT_N_S_soc_S_memory_20000000_P_compatible_EXISTS 1
+#define DT_N_S_soc_S_memory_20000000_P_reg {536870912 /* 0x20000000 */, 262144 /* 0x40000 */}
+#define DT_N_S_soc_S_memory_20000000_P_reg_IDX_0 536870912
+#define DT_N_S_soc_S_memory_20000000_P_reg_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_memory_20000000_P_reg_IDX_1 262144
+#define DT_N_S_soc_S_memory_20000000_P_reg_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_memory_20000000_P_reg_EXISTS 1
+#define DT_N_S_soc_S_memory_20000000_P_zephyr_deferred_init 0
+#define DT_N_S_soc_S_memory_20000000_P_zephyr_deferred_init_EXISTS 1
+
+/*
+ * Devicetree node: /soc/spu@50003000
+ *
+ * Node identifier: DT_N_S_soc_S_spu_50003000
+ *
+ * Binding (compatible = nordic,nrf-spu):
+ *   $ZEPHYR_BASE/dts/bindings/arm/nordic,nrf-spu.yaml
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_soc_S_spu_50003000_PATH "/soc/spu@50003000"
+
+/* Node's name with unit-address: */
+#define DT_N_S_soc_S_spu_50003000_FULL_NAME "spu@50003000"
+
+/* Node parent (/soc) identifier: */
+#define DT_N_S_soc_S_spu_50003000_PARENT DT_N_S_soc
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_soc_S_spu_50003000_CHILD_IDX 8
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_soc_S_spu_50003000_CHILD_NUM 0
+#define DT_N_S_soc_S_spu_50003000_CHILD_NUM_STATUS_OKAY 0
+#define DT_N_S_soc_S_spu_50003000_FOREACH_CHILD(fn) 
+#define DT_N_S_soc_S_spu_50003000_FOREACH_CHILD_SEP(fn, sep) 
+#define DT_N_S_soc_S_spu_50003000_FOREACH_CHILD_VARGS(fn, ...) 
+#define DT_N_S_soc_S_spu_50003000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
+#define DT_N_S_soc_S_spu_50003000_FOREACH_CHILD_STATUS_OKAY(fn) 
+#define DT_N_S_soc_S_spu_50003000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
+#define DT_N_S_soc_S_spu_50003000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
+#define DT_N_S_soc_S_spu_50003000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 
+
+/* Node's dependency ordinal: */
+#define DT_N_S_soc_S_spu_50003000_ORD 62
+#define DT_N_S_soc_S_spu_50003000_ORD_STR_SORTABLE 00062
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_soc_S_spu_50003000_REQUIRES_ORDS \
+	6, /* /soc */ \
+	7, /* /soc/interrupt-controller@e000e100 */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_soc_S_spu_50003000_SUPPORTS_ORDS /* nothing */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_soc_S_spu_50003000_EXISTS 1
+#define DT_N_INST_0_nordic_nrf_spu DT_N_S_soc_S_spu_50003000
+#define DT_N_NODELABEL_spu         DT_N_S_soc_S_spu_50003000
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_soc_S_spu_50003000_REG_NUM 1
+#define DT_N_S_soc_S_spu_50003000_REG_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_spu_50003000_REG_IDX_0_VAL_ADDRESS 1342189568 /* 0x50003000 */
+#define DT_N_S_soc_S_spu_50003000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
+#define DT_N_S_soc_S_spu_50003000_RANGES_NUM 0
+#define DT_N_S_soc_S_spu_50003000_FOREACH_RANGE(fn) 
+#define DT_N_S_soc_S_spu_50003000_IRQ_NUM 1
+#define DT_N_S_soc_S_spu_50003000_IRQ_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_spu_50003000_IRQ_IDX_0_VAL_irq 3
+#define DT_N_S_soc_S_spu_50003000_IRQ_IDX_0_VAL_irq_EXISTS 1
+#define DT_N_S_soc_S_spu_50003000_IRQ_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_spu_50003000_IRQ_IDX_0_VAL_priority 1
+#define DT_N_S_soc_S_spu_50003000_IRQ_IDX_0_VAL_priority_EXISTS 1
+#define DT_N_S_soc_S_spu_50003000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100
+#define DT_N_S_soc_S_spu_50003000_IRQ_LEVEL 1
+#define DT_N_S_soc_S_spu_50003000_COMPAT_MATCHES_nordic_nrf_spu 1
+#define DT_N_S_soc_S_spu_50003000_COMPAT_VENDOR_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_spu_50003000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
+#define DT_N_S_soc_S_spu_50003000_COMPAT_MODEL_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_spu_50003000_COMPAT_MODEL_IDX_0 "nrf-spu"
+#define DT_N_S_soc_S_spu_50003000_STATUS_okay 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_soc_S_spu_50003000_PINCTRL_NUM 0
+
+/* Generic property macros: */
+#define DT_N_S_soc_S_spu_50003000_P_wakeup_source 0
+#define DT_N_S_soc_S_spu_50003000_P_wakeup_source_EXISTS 1
+#define DT_N_S_soc_S_spu_50003000_P_zephyr_pm_device_runtime_auto 0
+#define DT_N_S_soc_S_spu_50003000_P_zephyr_pm_device_runtime_auto_EXISTS 1
+#define DT_N_S_soc_S_spu_50003000_P_status "okay"
+#define DT_N_S_soc_S_spu_50003000_P_status_STRING_UNQUOTED okay
+#define DT_N_S_soc_S_spu_50003000_P_status_STRING_TOKEN okay
+#define DT_N_S_soc_S_spu_50003000_P_status_STRING_UPPER_TOKEN OKAY
+#define DT_N_S_soc_S_spu_50003000_P_status_IDX_0 "okay"
+#define DT_N_S_soc_S_spu_50003000_P_status_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_spu_50003000_P_status_ENUM_IDX 1
+#define DT_N_S_soc_S_spu_50003000_P_status_ENUM_VAL_okay_EXISTS 1
+#define DT_N_S_soc_S_spu_50003000_P_status_ENUM_TOKEN okay
+#define DT_N_S_soc_S_spu_50003000_P_status_ENUM_UPPER_TOKEN OKAY
+#define DT_N_S_soc_S_spu_50003000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spu_50003000, status, 0)
+#define DT_N_S_soc_S_spu_50003000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_spu_50003000, status, 0)
+#define DT_N_S_soc_S_spu_50003000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_spu_50003000, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_spu_50003000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_spu_50003000, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_spu_50003000_P_status_LEN 1
+#define DT_N_S_soc_S_spu_50003000_P_status_EXISTS 1
+#define DT_N_S_soc_S_spu_50003000_P_compatible {"nordic,nrf-spu"}
+#define DT_N_S_soc_S_spu_50003000_P_compatible_IDX_0 "nordic,nrf-spu"
+#define DT_N_S_soc_S_spu_50003000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-spu
+#define DT_N_S_soc_S_spu_50003000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_spu
+#define DT_N_S_soc_S_spu_50003000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_SPU
+#define DT_N_S_soc_S_spu_50003000_P_compatible_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_spu_50003000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spu_50003000, compatible, 0)
+#define DT_N_S_soc_S_spu_50003000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_spu_50003000, compatible, 0)
+#define DT_N_S_soc_S_spu_50003000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_spu_50003000, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_spu_50003000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_spu_50003000, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_spu_50003000_P_compatible_LEN 1
+#define DT_N_S_soc_S_spu_50003000_P_compatible_EXISTS 1
+#define DT_N_S_soc_S_spu_50003000_P_reg {1342189568 /* 0x50003000 */, 4096 /* 0x1000 */}
+#define DT_N_S_soc_S_spu_50003000_P_reg_IDX_0 1342189568
+#define DT_N_S_soc_S_spu_50003000_P_reg_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_spu_50003000_P_reg_IDX_1 4096
+#define DT_N_S_soc_S_spu_50003000_P_reg_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_spu_50003000_P_reg_EXISTS 1
+#define DT_N_S_soc_S_spu_50003000_P_interrupts {3 /* 0x3 */, 1 /* 0x1 */}
+#define DT_N_S_soc_S_spu_50003000_P_interrupts_IDX_0 3
+#define DT_N_S_soc_S_spu_50003000_P_interrupts_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_spu_50003000_P_interrupts_IDX_1 1
+#define DT_N_S_soc_S_spu_50003000_P_interrupts_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_spu_50003000_P_interrupts_EXISTS 1
+#define DT_N_S_soc_S_spu_50003000_P_zephyr_deferred_init 0
+#define DT_N_S_soc_S_spu_50003000_P_zephyr_deferred_init_EXISTS 1
+
+/*
+ * Devicetree node: /soc/timer@e000e010
+ *
+ * Node identifier: DT_N_S_soc_S_timer_e000e010
+ *
+ * Binding (compatible = arm,armv8m-systick):
+ *   $ZEPHYR_BASE/dts/bindings/timer/arm,armv8m-systick.yaml
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_soc_S_timer_e000e010_PATH "/soc/timer@e000e010"
+
+/* Node's name with unit-address: */
+#define DT_N_S_soc_S_timer_e000e010_FULL_NAME "timer@e000e010"
+
+/* Node parent (/soc) identifier: */
+#define DT_N_S_soc_S_timer_e000e010_PARENT DT_N_S_soc
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_soc_S_timer_e000e010_CHILD_IDX 1
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_soc_S_timer_e000e010_CHILD_NUM 0
+#define DT_N_S_soc_S_timer_e000e010_CHILD_NUM_STATUS_OKAY 0
+#define DT_N_S_soc_S_timer_e000e010_FOREACH_CHILD(fn) 
+#define DT_N_S_soc_S_timer_e000e010_FOREACH_CHILD_SEP(fn, sep) 
+#define DT_N_S_soc_S_timer_e000e010_FOREACH_CHILD_VARGS(fn, ...) 
+#define DT_N_S_soc_S_timer_e000e010_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
+#define DT_N_S_soc_S_timer_e000e010_FOREACH_CHILD_STATUS_OKAY(fn) 
+#define DT_N_S_soc_S_timer_e000e010_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
+#define DT_N_S_soc_S_timer_e000e010_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
+#define DT_N_S_soc_S_timer_e000e010_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 
+
+/* Node's dependency ordinal: */
+#define DT_N_S_soc_S_timer_e000e010_ORD 63
+#define DT_N_S_soc_S_timer_e000e010_ORD_STR_SORTABLE 00063
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_soc_S_timer_e000e010_REQUIRES_ORDS \
+	6, /* /soc */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_soc_S_timer_e000e010_SUPPORTS_ORDS /* nothing */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_soc_S_timer_e000e010_EXISTS 1
+#define DT_N_INST_0_arm_armv8m_systick DT_N_S_soc_S_timer_e000e010
+#define DT_N_NODELABEL_systick         DT_N_S_soc_S_timer_e000e010
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_soc_S_timer_e000e010_REG_NUM 1
+#define DT_N_S_soc_S_timer_e000e010_REG_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_timer_e000e010_REG_IDX_0_VAL_ADDRESS 3758153744 /* 0xe000e010 */
+#define DT_N_S_soc_S_timer_e000e010_REG_IDX_0_VAL_SIZE 16 /* 0x10 */
+#define DT_N_S_soc_S_timer_e000e010_RANGES_NUM 0
+#define DT_N_S_soc_S_timer_e000e010_FOREACH_RANGE(fn) 
+#define DT_N_S_soc_S_timer_e000e010_IRQ_NUM 0
+#define DT_N_S_soc_S_timer_e000e010_IRQ_LEVEL 0
+#define DT_N_S_soc_S_timer_e000e010_COMPAT_MATCHES_arm_armv8m_systick 1
+#define DT_N_S_soc_S_timer_e000e010_COMPAT_VENDOR_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_timer_e000e010_COMPAT_VENDOR_IDX_0 "ARM Ltd."
+#define DT_N_S_soc_S_timer_e000e010_COMPAT_MODEL_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_timer_e000e010_COMPAT_MODEL_IDX_0 "armv8m-systick"
+#define DT_N_S_soc_S_timer_e000e010_STATUS_disabled 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_soc_S_timer_e000e010_PINCTRL_NUM 0
+
+/* Generic property macros: */
+#define DT_N_S_soc_S_timer_e000e010_P_wakeup_source 0
+#define DT_N_S_soc_S_timer_e000e010_P_wakeup_source_EXISTS 1
+#define DT_N_S_soc_S_timer_e000e010_P_zephyr_pm_device_runtime_auto 0
+#define DT_N_S_soc_S_timer_e000e010_P_zephyr_pm_device_runtime_auto_EXISTS 1
+#define DT_N_S_soc_S_timer_e000e010_P_status "disabled"
+#define DT_N_S_soc_S_timer_e000e010_P_status_STRING_UNQUOTED disabled
+#define DT_N_S_soc_S_timer_e000e010_P_status_STRING_TOKEN disabled
+#define DT_N_S_soc_S_timer_e000e010_P_status_STRING_UPPER_TOKEN DISABLED
+#define DT_N_S_soc_S_timer_e000e010_P_status_IDX_0 "disabled"
+#define DT_N_S_soc_S_timer_e000e010_P_status_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_timer_e000e010_P_status_ENUM_IDX 2
+#define DT_N_S_soc_S_timer_e000e010_P_status_ENUM_VAL_disabled_EXISTS 1
+#define DT_N_S_soc_S_timer_e000e010_P_status_ENUM_TOKEN disabled
+#define DT_N_S_soc_S_timer_e000e010_P_status_ENUM_UPPER_TOKEN DISABLED
+#define DT_N_S_soc_S_timer_e000e010_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timer_e000e010, status, 0)
+#define DT_N_S_soc_S_timer_e000e010_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timer_e000e010, status, 0)
+#define DT_N_S_soc_S_timer_e000e010_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timer_e000e010, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_timer_e000e010_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timer_e000e010, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_timer_e000e010_P_status_LEN 1
+#define DT_N_S_soc_S_timer_e000e010_P_status_EXISTS 1
+#define DT_N_S_soc_S_timer_e000e010_P_compatible {"arm,armv8m-systick"}
+#define DT_N_S_soc_S_timer_e000e010_P_compatible_IDX_0 "arm,armv8m-systick"
+#define DT_N_S_soc_S_timer_e000e010_P_compatible_IDX_0_STRING_UNQUOTED arm,armv8m-systick
+#define DT_N_S_soc_S_timer_e000e010_P_compatible_IDX_0_STRING_TOKEN arm_armv8m_systick
+#define DT_N_S_soc_S_timer_e000e010_P_compatible_IDX_0_STRING_UPPER_TOKEN ARM_ARMV8M_SYSTICK
+#define DT_N_S_soc_S_timer_e000e010_P_compatible_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_timer_e000e010_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timer_e000e010, compatible, 0)
+#define DT_N_S_soc_S_timer_e000e010_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timer_e000e010, compatible, 0)
+#define DT_N_S_soc_S_timer_e000e010_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timer_e000e010, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_timer_e000e010_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timer_e000e010, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_timer_e000e010_P_compatible_LEN 1
+#define DT_N_S_soc_S_timer_e000e010_P_compatible_EXISTS 1
+#define DT_N_S_soc_S_timer_e000e010_P_reg {3758153744 /* 0xe000e010 */, 16 /* 0x10 */}
+#define DT_N_S_soc_S_timer_e000e010_P_reg_IDX_0 3758153744
+#define DT_N_S_soc_S_timer_e000e010_P_reg_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_timer_e000e010_P_reg_IDX_1 16
+#define DT_N_S_soc_S_timer_e000e010_P_reg_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_timer_e000e010_P_reg_EXISTS 1
+#define DT_N_S_soc_S_timer_e000e010_P_zephyr_deferred_init 0
+#define DT_N_S_soc_S_timer_e000e010_P_zephyr_deferred_init_EXISTS 1
+
+/*
+ * Devicetree node: /soc/uicr@ff8000
+ *
+ * Node identifier: DT_N_S_soc_S_uicr_ff8000
+ *
+ * Binding (compatible = nordic,nrf-uicr):
+ *   $ZEPHYR_BASE/dts/bindings/arm/nordic,nrf-uicr.yaml
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_soc_S_uicr_ff8000_PATH "/soc/uicr@ff8000"
+
+/* Node's name with unit-address: */
+#define DT_N_S_soc_S_uicr_ff8000_FULL_NAME "uicr@ff8000"
+
+/* Node parent (/soc) identifier: */
+#define DT_N_S_soc_S_uicr_ff8000_PARENT DT_N_S_soc
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_soc_S_uicr_ff8000_CHILD_IDX 10
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_soc_S_uicr_ff8000_CHILD_NUM 0
+#define DT_N_S_soc_S_uicr_ff8000_CHILD_NUM_STATUS_OKAY 0
+#define DT_N_S_soc_S_uicr_ff8000_FOREACH_CHILD(fn) 
+#define DT_N_S_soc_S_uicr_ff8000_FOREACH_CHILD_SEP(fn, sep) 
+#define DT_N_S_soc_S_uicr_ff8000_FOREACH_CHILD_VARGS(fn, ...) 
+#define DT_N_S_soc_S_uicr_ff8000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
+#define DT_N_S_soc_S_uicr_ff8000_FOREACH_CHILD_STATUS_OKAY(fn) 
+#define DT_N_S_soc_S_uicr_ff8000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
+#define DT_N_S_soc_S_uicr_ff8000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
+#define DT_N_S_soc_S_uicr_ff8000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 
+
+/* Node's dependency ordinal: */
+#define DT_N_S_soc_S_uicr_ff8000_ORD 64
+#define DT_N_S_soc_S_uicr_ff8000_ORD_STR_SORTABLE 00064
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_soc_S_uicr_ff8000_REQUIRES_ORDS \
+	6, /* /soc */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_soc_S_uicr_ff8000_SUPPORTS_ORDS /* nothing */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_soc_S_uicr_ff8000_EXISTS 1
+#define DT_N_INST_0_nordic_nrf_uicr DT_N_S_soc_S_uicr_ff8000
+#define DT_N_NODELABEL_uicr         DT_N_S_soc_S_uicr_ff8000
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_soc_S_uicr_ff8000_REG_NUM 1
+#define DT_N_S_soc_S_uicr_ff8000_REG_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_uicr_ff8000_REG_IDX_0_VAL_ADDRESS 16744448 /* 0xff8000 */
+#define DT_N_S_soc_S_uicr_ff8000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
+#define DT_N_S_soc_S_uicr_ff8000_RANGES_NUM 0
+#define DT_N_S_soc_S_uicr_ff8000_FOREACH_RANGE(fn) 
+#define DT_N_S_soc_S_uicr_ff8000_IRQ_NUM 0
+#define DT_N_S_soc_S_uicr_ff8000_IRQ_LEVEL 0
+#define DT_N_S_soc_S_uicr_ff8000_COMPAT_MATCHES_nordic_nrf_uicr 1
+#define DT_N_S_soc_S_uicr_ff8000_COMPAT_VENDOR_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_uicr_ff8000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
+#define DT_N_S_soc_S_uicr_ff8000_COMPAT_MODEL_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_uicr_ff8000_COMPAT_MODEL_IDX_0 "nrf-uicr"
+#define DT_N_S_soc_S_uicr_ff8000_STATUS_okay 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_soc_S_uicr_ff8000_PINCTRL_NUM 0
+
+/* Generic property macros: */
+#define DT_N_S_soc_S_uicr_ff8000_P_wakeup_source 0
+#define DT_N_S_soc_S_uicr_ff8000_P_wakeup_source_EXISTS 1
+#define DT_N_S_soc_S_uicr_ff8000_P_zephyr_pm_device_runtime_auto 0
+#define DT_N_S_soc_S_uicr_ff8000_P_zephyr_pm_device_runtime_auto_EXISTS 1
+#define DT_N_S_soc_S_uicr_ff8000_P_status "okay"
+#define DT_N_S_soc_S_uicr_ff8000_P_status_STRING_UNQUOTED okay
+#define DT_N_S_soc_S_uicr_ff8000_P_status_STRING_TOKEN okay
+#define DT_N_S_soc_S_uicr_ff8000_P_status_STRING_UPPER_TOKEN OKAY
+#define DT_N_S_soc_S_uicr_ff8000_P_status_IDX_0 "okay"
+#define DT_N_S_soc_S_uicr_ff8000_P_status_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_uicr_ff8000_P_status_ENUM_IDX 1
+#define DT_N_S_soc_S_uicr_ff8000_P_status_ENUM_VAL_okay_EXISTS 1
+#define DT_N_S_soc_S_uicr_ff8000_P_status_ENUM_TOKEN okay
+#define DT_N_S_soc_S_uicr_ff8000_P_status_ENUM_UPPER_TOKEN OKAY
+#define DT_N_S_soc_S_uicr_ff8000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_uicr_ff8000, status, 0)
+#define DT_N_S_soc_S_uicr_ff8000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_uicr_ff8000, status, 0)
+#define DT_N_S_soc_S_uicr_ff8000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_uicr_ff8000, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_uicr_ff8000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_uicr_ff8000, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_uicr_ff8000_P_status_LEN 1
+#define DT_N_S_soc_S_uicr_ff8000_P_status_EXISTS 1
+#define DT_N_S_soc_S_uicr_ff8000_P_compatible {"nordic,nrf-uicr"}
+#define DT_N_S_soc_S_uicr_ff8000_P_compatible_IDX_0 "nordic,nrf-uicr"
+#define DT_N_S_soc_S_uicr_ff8000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-uicr
+#define DT_N_S_soc_S_uicr_ff8000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_uicr
+#define DT_N_S_soc_S_uicr_ff8000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_UICR
+#define DT_N_S_soc_S_uicr_ff8000_P_compatible_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_uicr_ff8000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_uicr_ff8000, compatible, 0)
+#define DT_N_S_soc_S_uicr_ff8000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_uicr_ff8000, compatible, 0)
+#define DT_N_S_soc_S_uicr_ff8000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_uicr_ff8000, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_uicr_ff8000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_uicr_ff8000, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_uicr_ff8000_P_compatible_LEN 1
+#define DT_N_S_soc_S_uicr_ff8000_P_compatible_EXISTS 1
+#define DT_N_S_soc_S_uicr_ff8000_P_reg {16744448 /* 0xff8000 */, 4096 /* 0x1000 */}
+#define DT_N_S_soc_S_uicr_ff8000_P_reg_IDX_0 16744448
+#define DT_N_S_soc_S_uicr_ff8000_P_reg_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_uicr_ff8000_P_reg_IDX_1 4096
+#define DT_N_S_soc_S_uicr_ff8000_P_reg_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_uicr_ff8000_P_reg_EXISTS 1
+#define DT_N_S_soc_S_uicr_ff8000_P_zephyr_deferred_init 0
+#define DT_N_S_soc_S_uicr_ff8000_P_zephyr_deferred_init_EXISTS 1
+#define DT_N_S_soc_S_uicr_ff8000_P_nfct_pins_as_gpios 0
+#define DT_N_S_soc_S_uicr_ff8000_P_nfct_pins_as_gpios_EXISTS 1
+#define DT_N_S_soc_S_uicr_ff8000_P_gpio_as_nreset 0
+#define DT_N_S_soc_S_uicr_ff8000_P_gpio_as_nreset_EXISTS 1
+
+/*
+ * Devicetree node: /soc/peripheral@50000000/adc@e000
+ *
+ * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_adc_e000
+ *
+ * Binding (compatible = nordic,nrf-saadc):
+ *   $ZEPHYR_BASE/dts/bindings/adc/nordic,nrf-saadc.yaml
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_PATH "/soc/peripheral@50000000/adc@e000"
+
+/* Node's name with unit-address: */
+#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_FULL_NAME "adc@e000"
+
+/* Node parent (/soc/peripheral@50000000) identifier: */
+#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_PARENT DT_N_S_soc_S_peripheral_50000000
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_CHILD_IDX 1
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_CHILD_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_CHILD_NUM_STATUS_OKAY 0
+#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_FOREACH_CHILD(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_FOREACH_CHILD_SEP(fn, sep) 
+#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_FOREACH_CHILD_VARGS(fn, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_FOREACH_CHILD_STATUS_OKAY(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
+#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 
+
+/* Node's dependency ordinal: */
+#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_ORD 65
+#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_ORD_STR_SORTABLE 00065
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_REQUIRES_ORDS \
+	7, /* /soc/interrupt-controller@e000e100 */ \
+	9, /* /soc/peripheral@50000000 */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_SUPPORTS_ORDS /* nothing */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_EXISTS 1
+#define DT_N_INST_0_nordic_nrf_saadc DT_N_S_soc_S_peripheral_50000000_S_adc_e000
+#define DT_N_NODELABEL_adc           DT_N_S_soc_S_peripheral_50000000_S_adc_e000
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_REG_NUM 1
+#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_REG_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_REG_IDX_0_VAL_ADDRESS 1342234624 /* 0x5000e000 */
+#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
+#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_RANGES_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_FOREACH_RANGE(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_IRQ_NUM 1
+#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_IRQ_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_IRQ_IDX_0_VAL_irq 14
+#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_IRQ_IDX_0_VAL_irq_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_IRQ_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_IRQ_IDX_0_VAL_priority 1
+#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_IRQ_IDX_0_VAL_priority_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100
+#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_IRQ_LEVEL 1
+#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_COMPAT_MATCHES_nordic_nrf_saadc 1
+#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_COMPAT_VENDOR_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
+#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_COMPAT_MODEL_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_COMPAT_MODEL_IDX_0 "nrf-saadc"
+#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_STATUS_okay 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_PINCTRL_NUM 0
+
+/* Generic property macros: */
+#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_P_wakeup_source 0
+#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_P_wakeup_source_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_P_zephyr_pm_device_runtime_auto 0
+#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_P_zephyr_pm_device_runtime_auto_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_P_status "okay"
+#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_P_status_STRING_UNQUOTED okay
+#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_P_status_STRING_TOKEN okay
+#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_P_status_STRING_UPPER_TOKEN OKAY
+#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_P_status_IDX_0 "okay"
+#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_P_status_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_P_status_ENUM_IDX 1
+#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_P_status_ENUM_VAL_okay_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_P_status_ENUM_TOKEN okay
+#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_P_status_ENUM_UPPER_TOKEN OKAY
+#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_adc_e000, status, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_adc_e000, status, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_adc_e000, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_adc_e000, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_P_status_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_P_status_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_P_compatible {"nordic,nrf-saadc"}
+#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_P_compatible_IDX_0 "nordic,nrf-saadc"
+#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-saadc
+#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_saadc
+#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_SAADC
+#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_P_compatible_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_adc_e000, compatible, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_adc_e000, compatible, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_adc_e000, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_adc_e000, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_P_compatible_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_P_compatible_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_P_reg {57344 /* 0xe000 */, 4096 /* 0x1000 */}
+#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_P_reg_IDX_0 57344
+#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_P_reg_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_P_reg_IDX_1 4096
+#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_P_reg_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_P_reg_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_P_interrupts {14 /* 0xe */, 1 /* 0x1 */}
+#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_P_interrupts_IDX_0 14
+#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_P_interrupts_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_P_interrupts_IDX_1 1
+#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_P_interrupts_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_P_interrupts_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_P_zephyr_deferred_init 0
+#define DT_N_S_soc_S_peripheral_50000000_S_adc_e000_P_zephyr_deferred_init_EXISTS 1
+
+/*
+ * Devicetree node: /soc/peripheral@50000000/clock@5000
+ *
+ * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_clock_5000
+ *
+ * Binding (compatible = nordic,nrf-clock):
+ *   $ZEPHYR_BASE/dts/bindings/clock/nordic,nrf-clock.yaml
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_PATH "/soc/peripheral@50000000/clock@5000"
+
+/* Node's name with unit-address: */
+#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_FULL_NAME "clock@5000"
+
+/* Node parent (/soc/peripheral@50000000) identifier: */
+#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_PARENT DT_N_S_soc_S_peripheral_50000000
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_CHILD_IDX 34
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_CHILD_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_CHILD_NUM_STATUS_OKAY 0
+#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_FOREACH_CHILD(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_FOREACH_CHILD_SEP(fn, sep) 
+#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_FOREACH_CHILD_VARGS(fn, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_FOREACH_CHILD_STATUS_OKAY(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
+#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 
+
+/* Node's dependency ordinal: */
+#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_ORD 66
+#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_ORD_STR_SORTABLE 00066
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_REQUIRES_ORDS \
+	7, /* /soc/interrupt-controller@e000e100 */ \
+	9, /* /soc/peripheral@50000000 */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_SUPPORTS_ORDS /* nothing */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_EXISTS 1
+#define DT_N_INST_0_nordic_nrf_clock DT_N_S_soc_S_peripheral_50000000_S_clock_5000
+#define DT_N_NODELABEL_clock         DT_N_S_soc_S_peripheral_50000000_S_clock_5000
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_REG_NUM 1
+#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_REG_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_REG_IDX_0_VAL_ADDRESS 1342197760 /* 0x50005000 */
+#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
+#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_RANGES_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_FOREACH_RANGE(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_IRQ_NUM 1
+#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_IRQ_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_IRQ_IDX_0_VAL_irq 5
+#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_IRQ_IDX_0_VAL_irq_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_IRQ_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_IRQ_IDX_0_VAL_priority 1
+#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_IRQ_IDX_0_VAL_priority_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100
+#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_IRQ_LEVEL 1
+#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_COMPAT_MATCHES_nordic_nrf_clock 1
+#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_COMPAT_VENDOR_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
+#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_COMPAT_MODEL_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_COMPAT_MODEL_IDX_0 "nrf-clock"
+#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_STATUS_okay 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_PINCTRL_NUM 0
+
+/* Generic property macros: */
+#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_P_wakeup_source 0
+#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_P_wakeup_source_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_P_zephyr_pm_device_runtime_auto 0
+#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_P_zephyr_pm_device_runtime_auto_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_P_status "okay"
+#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_P_status_STRING_UNQUOTED okay
+#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_P_status_STRING_TOKEN okay
+#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_P_status_STRING_UPPER_TOKEN OKAY
+#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_P_status_IDX_0 "okay"
+#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_P_status_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_P_status_ENUM_IDX 1
+#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_P_status_ENUM_VAL_okay_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_P_status_ENUM_TOKEN okay
+#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_P_status_ENUM_UPPER_TOKEN OKAY
+#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_clock_5000, status, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_clock_5000, status, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_clock_5000, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_clock_5000, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_P_status_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_P_status_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_P_compatible {"nordic,nrf-clock"}
+#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_P_compatible_IDX_0 "nordic,nrf-clock"
+#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-clock
+#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_clock
+#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_CLOCK
+#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_P_compatible_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_clock_5000, compatible, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_clock_5000, compatible, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_clock_5000, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_clock_5000, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_P_compatible_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_P_compatible_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_P_reg {20480 /* 0x5000 */, 4096 /* 0x1000 */}
+#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_P_reg_IDX_0 20480
+#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_P_reg_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_P_reg_IDX_1 4096
+#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_P_reg_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_P_reg_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_P_interrupts {5 /* 0x5 */, 1 /* 0x1 */}
+#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_P_interrupts_IDX_0 5
+#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_P_interrupts_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_P_interrupts_IDX_1 1
+#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_P_interrupts_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_P_interrupts_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_P_zephyr_deferred_init 0
+#define DT_N_S_soc_S_peripheral_50000000_S_clock_5000_P_zephyr_deferred_init_EXISTS 1
+
+/*
+ * Devicetree node: /soc/peripheral@50000000/dppic@17000
+ *
+ * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_dppic_17000
+ *
+ * Binding (compatible = nordic,nrf-dppic):
+ *   $ZEPHYR_BASE/dts/bindings/misc/nordic,nrf-dppic.yaml
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_PATH "/soc/peripheral@50000000/dppic@17000"
+
+/* Node's name with unit-address: */
+#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_FULL_NAME "dppic@17000"
+
+/* Node parent (/soc/peripheral@50000000) identifier: */
+#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_PARENT DT_N_S_soc_S_peripheral_50000000
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_CHILD_IDX 2
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_CHILD_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_CHILD_NUM_STATUS_OKAY 0
+#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_FOREACH_CHILD(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_FOREACH_CHILD_SEP(fn, sep) 
+#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_FOREACH_CHILD_VARGS(fn, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_FOREACH_CHILD_STATUS_OKAY(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
+#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 
+
+/* Node's dependency ordinal: */
+#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_ORD 67
+#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_ORD_STR_SORTABLE 00067
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_REQUIRES_ORDS \
+	9, /* /soc/peripheral@50000000 */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_SUPPORTS_ORDS /* nothing */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_EXISTS 1
+#define DT_N_INST_0_nordic_nrf_dppic DT_N_S_soc_S_peripheral_50000000_S_dppic_17000
+#define DT_N_NODELABEL_dppic         DT_N_S_soc_S_peripheral_50000000_S_dppic_17000
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_REG_NUM 1
+#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_REG_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_REG_IDX_0_VAL_ADDRESS 1342271488 /* 0x50017000 */
+#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
+#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_RANGES_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_FOREACH_RANGE(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_IRQ_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_IRQ_LEVEL 0
+#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_COMPAT_MATCHES_nordic_nrf_dppic 1
+#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_COMPAT_VENDOR_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
+#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_COMPAT_MODEL_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_COMPAT_MODEL_IDX_0 "nrf-dppic"
+#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_STATUS_okay 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_PINCTRL_NUM 0
+
+/* Generic property macros: */
+#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_P_wakeup_source 0
+#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_P_wakeup_source_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_P_zephyr_pm_device_runtime_auto 0
+#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_P_zephyr_pm_device_runtime_auto_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_P_status "okay"
+#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_P_status_STRING_UNQUOTED okay
+#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_P_status_STRING_TOKEN okay
+#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_P_status_STRING_UPPER_TOKEN OKAY
+#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_P_status_IDX_0 "okay"
+#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_P_status_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_P_status_ENUM_IDX 1
+#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_P_status_ENUM_VAL_okay_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_P_status_ENUM_TOKEN okay
+#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_P_status_ENUM_UPPER_TOKEN OKAY
+#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_dppic_17000, status, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_dppic_17000, status, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_dppic_17000, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_dppic_17000, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_P_status_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_P_status_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_P_compatible {"nordic,nrf-dppic"}
+#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_P_compatible_IDX_0 "nordic,nrf-dppic"
+#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-dppic
+#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_dppic
+#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_DPPIC
+#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_P_compatible_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_dppic_17000, compatible, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_dppic_17000, compatible, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_dppic_17000, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_dppic_17000, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_P_compatible_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_P_compatible_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_P_reg {94208 /* 0x17000 */, 4096 /* 0x1000 */}
+#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_P_reg_IDX_0 94208
+#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_P_reg_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_P_reg_IDX_1 4096
+#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_P_reg_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_P_reg_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_P_zephyr_deferred_init 0
+#define DT_N_S_soc_S_peripheral_50000000_S_dppic_17000_P_zephyr_deferred_init_EXISTS 1
+
+/*
+ * Devicetree node: /soc/peripheral@50000000/egu@1b000
+ *
+ * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_egu_1b000
+ *
+ * Binding (compatible = nordic,nrf-egu):
+ *   $ZEPHYR_BASE/dts/bindings/arm/nordic,nrf-egu.yaml
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_PATH "/soc/peripheral@50000000/egu@1b000"
+
+/* Node's name with unit-address: */
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_FULL_NAME "egu@1b000"
+
+/* Node parent (/soc/peripheral@50000000) identifier: */
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_PARENT DT_N_S_soc_S_peripheral_50000000
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_CHILD_IDX 3
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_CHILD_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_CHILD_NUM_STATUS_OKAY 0
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_FOREACH_CHILD(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_FOREACH_CHILD_SEP(fn, sep) 
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_FOREACH_CHILD_VARGS(fn, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_FOREACH_CHILD_STATUS_OKAY(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 
+
+/* Node's dependency ordinal: */
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_ORD 68
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_ORD_STR_SORTABLE 00068
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_REQUIRES_ORDS \
+	7, /* /soc/interrupt-controller@e000e100 */ \
+	9, /* /soc/peripheral@50000000 */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_SUPPORTS_ORDS /* nothing */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_EXISTS 1
+#define DT_N_INST_0_nordic_nrf_egu DT_N_S_soc_S_peripheral_50000000_S_egu_1b000
+#define DT_N_NODELABEL_egu0        DT_N_S_soc_S_peripheral_50000000_S_egu_1b000
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_REG_NUM 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_REG_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_REG_IDX_0_VAL_ADDRESS 1342287872 /* 0x5001b000 */
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_RANGES_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_FOREACH_RANGE(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_IRQ_NUM 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_IRQ_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_IRQ_IDX_0_VAL_irq 27
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_IRQ_IDX_0_VAL_irq_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_IRQ_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_IRQ_IDX_0_VAL_priority 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_IRQ_IDX_0_VAL_priority_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_IRQ_LEVEL 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_COMPAT_MATCHES_nordic_nrf_egu 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_COMPAT_VENDOR_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_COMPAT_MODEL_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_COMPAT_MODEL_IDX_0 "nrf-egu"
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_STATUS_okay 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_PINCTRL_NUM 0
+
+/* Generic property macros: */
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_P_wakeup_source 0
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_P_wakeup_source_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_P_zephyr_pm_device_runtime_auto 0
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_P_zephyr_pm_device_runtime_auto_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_P_status "okay"
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_P_status_STRING_UNQUOTED okay
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_P_status_STRING_TOKEN okay
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_P_status_STRING_UPPER_TOKEN OKAY
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_P_status_IDX_0 "okay"
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_P_status_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_P_status_ENUM_IDX 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_P_status_ENUM_VAL_okay_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_P_status_ENUM_TOKEN okay
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_P_status_ENUM_UPPER_TOKEN OKAY
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1b000, status, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1b000, status, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1b000, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1b000, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_P_status_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_P_status_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_P_compatible {"nordic,nrf-egu"}
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_P_compatible_IDX_0 "nordic,nrf-egu"
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-egu
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_egu
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_EGU
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_P_compatible_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1b000, compatible, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1b000, compatible, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1b000, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1b000, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_P_compatible_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_P_compatible_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_P_reg {110592 /* 0x1b000 */, 4096 /* 0x1000 */}
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_P_reg_IDX_0 110592
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_P_reg_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_P_reg_IDX_1 4096
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_P_reg_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_P_reg_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_P_interrupts {27 /* 0x1b */, 1 /* 0x1 */}
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_P_interrupts_IDX_0 27
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_P_interrupts_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_P_interrupts_IDX_1 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_P_interrupts_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_P_interrupts_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_P_zephyr_deferred_init 0
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1b000_P_zephyr_deferred_init_EXISTS 1
+
+/*
+ * Devicetree node: /soc/peripheral@50000000/egu@1c000
+ *
+ * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_egu_1c000
+ *
+ * Binding (compatible = nordic,nrf-egu):
+ *   $ZEPHYR_BASE/dts/bindings/arm/nordic,nrf-egu.yaml
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_PATH "/soc/peripheral@50000000/egu@1c000"
+
+/* Node's name with unit-address: */
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_FULL_NAME "egu@1c000"
+
+/* Node parent (/soc/peripheral@50000000) identifier: */
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_PARENT DT_N_S_soc_S_peripheral_50000000
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_CHILD_IDX 4
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_CHILD_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_CHILD_NUM_STATUS_OKAY 0
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_FOREACH_CHILD(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_FOREACH_CHILD_SEP(fn, sep) 
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_FOREACH_CHILD_VARGS(fn, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_FOREACH_CHILD_STATUS_OKAY(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 
+
+/* Node's dependency ordinal: */
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_ORD 69
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_ORD_STR_SORTABLE 00069
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_REQUIRES_ORDS \
+	7, /* /soc/interrupt-controller@e000e100 */ \
+	9, /* /soc/peripheral@50000000 */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_SUPPORTS_ORDS /* nothing */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_EXISTS 1
+#define DT_N_INST_1_nordic_nrf_egu DT_N_S_soc_S_peripheral_50000000_S_egu_1c000
+#define DT_N_NODELABEL_egu1        DT_N_S_soc_S_peripheral_50000000_S_egu_1c000
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_REG_NUM 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_REG_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_REG_IDX_0_VAL_ADDRESS 1342291968 /* 0x5001c000 */
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_RANGES_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_FOREACH_RANGE(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_IRQ_NUM 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_IRQ_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_IRQ_IDX_0_VAL_irq 28
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_IRQ_IDX_0_VAL_irq_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_IRQ_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_IRQ_IDX_0_VAL_priority 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_IRQ_IDX_0_VAL_priority_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_IRQ_LEVEL 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_COMPAT_MATCHES_nordic_nrf_egu 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_COMPAT_VENDOR_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_COMPAT_MODEL_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_COMPAT_MODEL_IDX_0 "nrf-egu"
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_STATUS_okay 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_PINCTRL_NUM 0
+
+/* Generic property macros: */
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_P_wakeup_source 0
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_P_wakeup_source_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_P_zephyr_pm_device_runtime_auto 0
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_P_zephyr_pm_device_runtime_auto_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_P_status "okay"
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_P_status_STRING_UNQUOTED okay
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_P_status_STRING_TOKEN okay
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_P_status_STRING_UPPER_TOKEN OKAY
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_P_status_IDX_0 "okay"
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_P_status_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_P_status_ENUM_IDX 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_P_status_ENUM_VAL_okay_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_P_status_ENUM_TOKEN okay
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_P_status_ENUM_UPPER_TOKEN OKAY
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1c000, status, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1c000, status, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1c000, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1c000, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_P_status_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_P_status_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_P_compatible {"nordic,nrf-egu"}
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_P_compatible_IDX_0 "nordic,nrf-egu"
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-egu
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_egu
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_EGU
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_P_compatible_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1c000, compatible, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1c000, compatible, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1c000, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1c000, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_P_compatible_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_P_compatible_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_P_reg {114688 /* 0x1c000 */, 4096 /* 0x1000 */}
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_P_reg_IDX_0 114688
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_P_reg_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_P_reg_IDX_1 4096
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_P_reg_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_P_reg_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_P_interrupts {28 /* 0x1c */, 1 /* 0x1 */}
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_P_interrupts_IDX_0 28
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_P_interrupts_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_P_interrupts_IDX_1 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_P_interrupts_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_P_interrupts_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_P_zephyr_deferred_init 0
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1c000_P_zephyr_deferred_init_EXISTS 1
+
+/*
+ * Devicetree node: /soc/peripheral@50000000/egu@1d000
+ *
+ * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_egu_1d000
+ *
+ * Binding (compatible = nordic,nrf-egu):
+ *   $ZEPHYR_BASE/dts/bindings/arm/nordic,nrf-egu.yaml
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_PATH "/soc/peripheral@50000000/egu@1d000"
+
+/* Node's name with unit-address: */
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_FULL_NAME "egu@1d000"
+
+/* Node parent (/soc/peripheral@50000000) identifier: */
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_PARENT DT_N_S_soc_S_peripheral_50000000
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_CHILD_IDX 5
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_CHILD_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_CHILD_NUM_STATUS_OKAY 0
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_FOREACH_CHILD(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_FOREACH_CHILD_SEP(fn, sep) 
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_FOREACH_CHILD_VARGS(fn, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_FOREACH_CHILD_STATUS_OKAY(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 
+
+/* Node's dependency ordinal: */
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_ORD 70
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_ORD_STR_SORTABLE 00070
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_REQUIRES_ORDS \
+	7, /* /soc/interrupt-controller@e000e100 */ \
+	9, /* /soc/peripheral@50000000 */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_SUPPORTS_ORDS /* nothing */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_EXISTS 1
+#define DT_N_INST_2_nordic_nrf_egu DT_N_S_soc_S_peripheral_50000000_S_egu_1d000
+#define DT_N_NODELABEL_egu2        DT_N_S_soc_S_peripheral_50000000_S_egu_1d000
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_REG_NUM 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_REG_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_REG_IDX_0_VAL_ADDRESS 1342296064 /* 0x5001d000 */
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_RANGES_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_FOREACH_RANGE(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_IRQ_NUM 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_IRQ_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_IRQ_IDX_0_VAL_irq 29
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_IRQ_IDX_0_VAL_irq_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_IRQ_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_IRQ_IDX_0_VAL_priority 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_IRQ_IDX_0_VAL_priority_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_IRQ_LEVEL 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_COMPAT_MATCHES_nordic_nrf_egu 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_COMPAT_VENDOR_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_COMPAT_MODEL_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_COMPAT_MODEL_IDX_0 "nrf-egu"
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_STATUS_okay 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_PINCTRL_NUM 0
+
+/* Generic property macros: */
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_P_wakeup_source 0
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_P_wakeup_source_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_P_zephyr_pm_device_runtime_auto 0
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_P_zephyr_pm_device_runtime_auto_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_P_status "okay"
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_P_status_STRING_UNQUOTED okay
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_P_status_STRING_TOKEN okay
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_P_status_STRING_UPPER_TOKEN OKAY
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_P_status_IDX_0 "okay"
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_P_status_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_P_status_ENUM_IDX 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_P_status_ENUM_VAL_okay_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_P_status_ENUM_TOKEN okay
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_P_status_ENUM_UPPER_TOKEN OKAY
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1d000, status, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1d000, status, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1d000, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1d000, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_P_status_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_P_status_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_P_compatible {"nordic,nrf-egu"}
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_P_compatible_IDX_0 "nordic,nrf-egu"
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-egu
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_egu
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_EGU
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_P_compatible_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1d000, compatible, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1d000, compatible, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1d000, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1d000, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_P_compatible_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_P_compatible_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_P_reg {118784 /* 0x1d000 */, 4096 /* 0x1000 */}
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_P_reg_IDX_0 118784
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_P_reg_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_P_reg_IDX_1 4096
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_P_reg_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_P_reg_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_P_interrupts {29 /* 0x1d */, 1 /* 0x1 */}
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_P_interrupts_IDX_0 29
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_P_interrupts_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_P_interrupts_IDX_1 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_P_interrupts_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_P_interrupts_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_P_zephyr_deferred_init 0
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1d000_P_zephyr_deferred_init_EXISTS 1
+
+/*
+ * Devicetree node: /soc/peripheral@50000000/egu@1e000
+ *
+ * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_egu_1e000
+ *
+ * Binding (compatible = nordic,nrf-egu):
+ *   $ZEPHYR_BASE/dts/bindings/arm/nordic,nrf-egu.yaml
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_PATH "/soc/peripheral@50000000/egu@1e000"
+
+/* Node's name with unit-address: */
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_FULL_NAME "egu@1e000"
+
+/* Node parent (/soc/peripheral@50000000) identifier: */
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_PARENT DT_N_S_soc_S_peripheral_50000000
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_CHILD_IDX 6
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_CHILD_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_CHILD_NUM_STATUS_OKAY 0
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_FOREACH_CHILD(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_FOREACH_CHILD_SEP(fn, sep) 
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_FOREACH_CHILD_VARGS(fn, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_FOREACH_CHILD_STATUS_OKAY(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 
+
+/* Node's dependency ordinal: */
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_ORD 71
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_ORD_STR_SORTABLE 00071
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_REQUIRES_ORDS \
+	7, /* /soc/interrupt-controller@e000e100 */ \
+	9, /* /soc/peripheral@50000000 */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_SUPPORTS_ORDS /* nothing */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_EXISTS 1
+#define DT_N_INST_3_nordic_nrf_egu DT_N_S_soc_S_peripheral_50000000_S_egu_1e000
+#define DT_N_NODELABEL_egu3        DT_N_S_soc_S_peripheral_50000000_S_egu_1e000
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_REG_NUM 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_REG_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_REG_IDX_0_VAL_ADDRESS 1342300160 /* 0x5001e000 */
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_RANGES_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_FOREACH_RANGE(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_IRQ_NUM 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_IRQ_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_IRQ_IDX_0_VAL_irq 30
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_IRQ_IDX_0_VAL_irq_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_IRQ_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_IRQ_IDX_0_VAL_priority 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_IRQ_IDX_0_VAL_priority_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_IRQ_LEVEL 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_COMPAT_MATCHES_nordic_nrf_egu 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_COMPAT_VENDOR_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_COMPAT_MODEL_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_COMPAT_MODEL_IDX_0 "nrf-egu"
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_STATUS_okay 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_PINCTRL_NUM 0
+
+/* Generic property macros: */
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_P_wakeup_source 0
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_P_wakeup_source_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_P_zephyr_pm_device_runtime_auto 0
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_P_zephyr_pm_device_runtime_auto_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_P_status "okay"
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_P_status_STRING_UNQUOTED okay
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_P_status_STRING_TOKEN okay
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_P_status_STRING_UPPER_TOKEN OKAY
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_P_status_IDX_0 "okay"
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_P_status_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_P_status_ENUM_IDX 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_P_status_ENUM_VAL_okay_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_P_status_ENUM_TOKEN okay
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_P_status_ENUM_UPPER_TOKEN OKAY
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1e000, status, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1e000, status, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1e000, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1e000, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_P_status_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_P_status_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_P_compatible {"nordic,nrf-egu"}
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_P_compatible_IDX_0 "nordic,nrf-egu"
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-egu
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_egu
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_EGU
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_P_compatible_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1e000, compatible, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1e000, compatible, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1e000, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1e000, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_P_compatible_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_P_compatible_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_P_reg {122880 /* 0x1e000 */, 4096 /* 0x1000 */}
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_P_reg_IDX_0 122880
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_P_reg_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_P_reg_IDX_1 4096
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_P_reg_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_P_reg_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_P_interrupts {30 /* 0x1e */, 1 /* 0x1 */}
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_P_interrupts_IDX_0 30
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_P_interrupts_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_P_interrupts_IDX_1 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_P_interrupts_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_P_interrupts_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_P_zephyr_deferred_init 0
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1e000_P_zephyr_deferred_init_EXISTS 1
+
+/*
+ * Devicetree node: /soc/peripheral@50000000/egu@1f000
+ *
+ * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_egu_1f000
+ *
+ * Binding (compatible = nordic,nrf-egu):
+ *   $ZEPHYR_BASE/dts/bindings/arm/nordic,nrf-egu.yaml
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_PATH "/soc/peripheral@50000000/egu@1f000"
+
+/* Node's name with unit-address: */
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_FULL_NAME "egu@1f000"
+
+/* Node parent (/soc/peripheral@50000000) identifier: */
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_PARENT DT_N_S_soc_S_peripheral_50000000
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_CHILD_IDX 7
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_CHILD_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_CHILD_NUM_STATUS_OKAY 0
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_FOREACH_CHILD(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_FOREACH_CHILD_SEP(fn, sep) 
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_FOREACH_CHILD_VARGS(fn, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_FOREACH_CHILD_STATUS_OKAY(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 
+
+/* Node's dependency ordinal: */
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_ORD 72
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_ORD_STR_SORTABLE 00072
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_REQUIRES_ORDS \
+	7, /* /soc/interrupt-controller@e000e100 */ \
+	9, /* /soc/peripheral@50000000 */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_SUPPORTS_ORDS /* nothing */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_EXISTS 1
+#define DT_N_INST_4_nordic_nrf_egu DT_N_S_soc_S_peripheral_50000000_S_egu_1f000
+#define DT_N_NODELABEL_egu4        DT_N_S_soc_S_peripheral_50000000_S_egu_1f000
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_REG_NUM 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_REG_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_REG_IDX_0_VAL_ADDRESS 1342304256 /* 0x5001f000 */
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_RANGES_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_FOREACH_RANGE(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_IRQ_NUM 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_IRQ_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_IRQ_IDX_0_VAL_irq 31
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_IRQ_IDX_0_VAL_irq_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_IRQ_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_IRQ_IDX_0_VAL_priority 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_IRQ_IDX_0_VAL_priority_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_IRQ_LEVEL 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_COMPAT_MATCHES_nordic_nrf_egu 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_COMPAT_VENDOR_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_COMPAT_MODEL_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_COMPAT_MODEL_IDX_0 "nrf-egu"
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_STATUS_okay 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_PINCTRL_NUM 0
+
+/* Generic property macros: */
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_P_wakeup_source 0
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_P_wakeup_source_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_P_zephyr_pm_device_runtime_auto 0
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_P_zephyr_pm_device_runtime_auto_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_P_status "okay"
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_P_status_STRING_UNQUOTED okay
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_P_status_STRING_TOKEN okay
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_P_status_STRING_UPPER_TOKEN OKAY
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_P_status_IDX_0 "okay"
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_P_status_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_P_status_ENUM_IDX 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_P_status_ENUM_VAL_okay_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_P_status_ENUM_TOKEN okay
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_P_status_ENUM_UPPER_TOKEN OKAY
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1f000, status, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1f000, status, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1f000, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1f000, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_P_status_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_P_status_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_P_compatible {"nordic,nrf-egu"}
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_P_compatible_IDX_0 "nordic,nrf-egu"
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-egu
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_egu
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_EGU
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_P_compatible_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1f000, compatible, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1f000, compatible, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1f000, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1f000, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_P_compatible_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_P_compatible_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_P_reg {126976 /* 0x1f000 */, 4096 /* 0x1000 */}
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_P_reg_IDX_0 126976
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_P_reg_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_P_reg_IDX_1 4096
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_P_reg_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_P_reg_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_P_interrupts {31 /* 0x1f */, 1 /* 0x1 */}
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_P_interrupts_IDX_0 31
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_P_interrupts_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_P_interrupts_IDX_1 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_P_interrupts_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_P_interrupts_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_P_zephyr_deferred_init 0
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_1f000_P_zephyr_deferred_init_EXISTS 1
+
+/*
+ * Devicetree node: /soc/peripheral@50000000/egu@20000
+ *
+ * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_egu_20000
+ *
+ * Binding (compatible = nordic,nrf-egu):
+ *   $ZEPHYR_BASE/dts/bindings/arm/nordic,nrf-egu.yaml
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_PATH "/soc/peripheral@50000000/egu@20000"
+
+/* Node's name with unit-address: */
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_FULL_NAME "egu@20000"
+
+/* Node parent (/soc/peripheral@50000000) identifier: */
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_PARENT DT_N_S_soc_S_peripheral_50000000
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_CHILD_IDX 8
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_CHILD_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_CHILD_NUM_STATUS_OKAY 0
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_FOREACH_CHILD(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_FOREACH_CHILD_SEP(fn, sep) 
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_FOREACH_CHILD_VARGS(fn, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_FOREACH_CHILD_STATUS_OKAY(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 
+
+/* Node's dependency ordinal: */
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_ORD 73
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_ORD_STR_SORTABLE 00073
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_REQUIRES_ORDS \
+	7, /* /soc/interrupt-controller@e000e100 */ \
+	9, /* /soc/peripheral@50000000 */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_SUPPORTS_ORDS /* nothing */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_EXISTS 1
+#define DT_N_INST_5_nordic_nrf_egu DT_N_S_soc_S_peripheral_50000000_S_egu_20000
+#define DT_N_NODELABEL_egu5        DT_N_S_soc_S_peripheral_50000000_S_egu_20000
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_REG_NUM 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_REG_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_REG_IDX_0_VAL_ADDRESS 1342308352 /* 0x50020000 */
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_RANGES_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_FOREACH_RANGE(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_IRQ_NUM 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_IRQ_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_IRQ_IDX_0_VAL_irq 32
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_IRQ_IDX_0_VAL_irq_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_IRQ_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_IRQ_IDX_0_VAL_priority 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_IRQ_IDX_0_VAL_priority_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_IRQ_LEVEL 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_COMPAT_MATCHES_nordic_nrf_egu 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_COMPAT_VENDOR_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_COMPAT_MODEL_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_COMPAT_MODEL_IDX_0 "nrf-egu"
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_STATUS_okay 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_PINCTRL_NUM 0
+
+/* Generic property macros: */
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_P_wakeup_source 0
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_P_wakeup_source_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_P_zephyr_pm_device_runtime_auto 0
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_P_zephyr_pm_device_runtime_auto_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_P_status "okay"
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_P_status_STRING_UNQUOTED okay
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_P_status_STRING_TOKEN okay
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_P_status_STRING_UPPER_TOKEN OKAY
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_P_status_IDX_0 "okay"
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_P_status_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_P_status_ENUM_IDX 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_P_status_ENUM_VAL_okay_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_P_status_ENUM_TOKEN okay
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_P_status_ENUM_UPPER_TOKEN OKAY
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_20000, status, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_20000, status, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_20000, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_20000, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_P_status_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_P_status_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_P_compatible {"nordic,nrf-egu"}
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_P_compatible_IDX_0 "nordic,nrf-egu"
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-egu
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_egu
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_EGU
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_P_compatible_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_20000, compatible, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_20000, compatible, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_20000, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_20000, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_P_compatible_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_P_compatible_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_P_reg {131072 /* 0x20000 */, 4096 /* 0x1000 */}
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_P_reg_IDX_0 131072
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_P_reg_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_P_reg_IDX_1 4096
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_P_reg_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_P_reg_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_P_interrupts {32 /* 0x20 */, 1 /* 0x1 */}
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_P_interrupts_IDX_0 32
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_P_interrupts_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_P_interrupts_IDX_1 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_P_interrupts_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_P_interrupts_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_P_zephyr_deferred_init 0
+#define DT_N_S_soc_S_peripheral_50000000_S_egu_20000_P_zephyr_deferred_init_EXISTS 1
+
+/*
+ * Devicetree node: /soc/peripheral@50000000/i2c@8000
+ *
+ * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_i2c_8000
+ *
+ * Binding (compatible = nordic,nrf-twim):
+ *   $ZEPHYR_BASE/dts/bindings/i2c/nordic,nrf-twim.yaml
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_PATH "/soc/peripheral@50000000/i2c@8000"
+
+/* Node's name with unit-address: */
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_FULL_NAME "i2c@8000"
+
+/* Node parent (/soc/peripheral@50000000) identifier: */
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_PARENT DT_N_S_soc_S_peripheral_50000000
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_CHILD_IDX 19
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_CHILD_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_CHILD_NUM_STATUS_OKAY 0
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_FOREACH_CHILD(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_FOREACH_CHILD_SEP(fn, sep) 
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_FOREACH_CHILD_VARGS(fn, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_FOREACH_CHILD_STATUS_OKAY(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 
+
+/* Node's dependency ordinal: */
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_ORD 74
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_ORD_STR_SORTABLE 00074
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_REQUIRES_ORDS \
+	7, /* /soc/interrupt-controller@e000e100 */ \
+	9, /* /soc/peripheral@50000000 */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_SUPPORTS_ORDS /* nothing */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_EXISTS 1
+#define DT_N_INST_1_nordic_nrf_twim DT_N_S_soc_S_peripheral_50000000_S_i2c_8000
+#define DT_N_NODELABEL_i2c0         DT_N_S_soc_S_peripheral_50000000_S_i2c_8000
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_REG_NUM 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_REG_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_REG_IDX_0_VAL_ADDRESS 1342210048 /* 0x50008000 */
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_RANGES_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_FOREACH_RANGE(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_IRQ_NUM 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_IRQ_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_IRQ_IDX_0_VAL_irq 8
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_IRQ_IDX_0_VAL_irq_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_IRQ_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_IRQ_IDX_0_VAL_priority 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_IRQ_IDX_0_VAL_priority_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_IRQ_LEVEL 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_COMPAT_MATCHES_nordic_nrf_twim 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_COMPAT_VENDOR_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_COMPAT_MODEL_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_COMPAT_MODEL_IDX_0 "nrf-twim"
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_STATUS_disabled 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_PINCTRL_NUM 0
+
+/* Generic property macros: */
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_wakeup_source 0
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_wakeup_source_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_zephyr_pm_device_runtime_auto 0
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_zephyr_pm_device_runtime_auto_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_status "disabled"
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_status_STRING_UNQUOTED disabled
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_status_STRING_TOKEN disabled
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_status_STRING_UPPER_TOKEN DISABLED
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_status_IDX_0 "disabled"
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_status_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_status_ENUM_IDX 2
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_status_ENUM_VAL_disabled_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_status_ENUM_TOKEN disabled
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_status_ENUM_UPPER_TOKEN DISABLED
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_8000, status, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_8000, status, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_8000, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_8000, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_status_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_status_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_compatible {"nordic,nrf-twim"}
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_compatible_IDX_0 "nordic,nrf-twim"
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-twim
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_twim
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_TWIM
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_compatible_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_8000, compatible, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_8000, compatible, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_8000, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_8000, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_compatible_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_compatible_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_reg {32768 /* 0x8000 */, 4096 /* 0x1000 */}
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_reg_IDX_0 32768
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_reg_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_reg_IDX_1 4096
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_reg_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_reg_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_interrupts {8 /* 0x8 */, 1 /* 0x1 */}
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_interrupts_IDX_0 8
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_interrupts_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_interrupts_IDX_1 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_interrupts_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_interrupts_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_zephyr_deferred_init 0
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_zephyr_deferred_init_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_clock_frequency 100000
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_clock_frequency_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_sq_size 4
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_sq_size_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_cq_size 4
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_cq_size_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_easydma_maxcnt_bits 13
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_easydma_maxcnt_bits_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_zephyr_concat_buf_size 16
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_zephyr_concat_buf_size_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_zephyr_flash_buf_max_size 16
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_8000_P_zephyr_flash_buf_max_size_EXISTS 1
+
+/*
+ * Devicetree node: /soc/peripheral@50000000/i2c@9000
+ *
+ * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_i2c_9000
+ *
+ * Binding (compatible = nordic,nrf-twim):
+ *   $ZEPHYR_BASE/dts/bindings/i2c/nordic,nrf-twim.yaml
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_PATH "/soc/peripheral@50000000/i2c@9000"
+
+/* Node's name with unit-address: */
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_FULL_NAME "i2c@9000"
+
+/* Node parent (/soc/peripheral@50000000) identifier: */
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_PARENT DT_N_S_soc_S_peripheral_50000000
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_CHILD_IDX 20
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_CHILD_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_CHILD_NUM_STATUS_OKAY 0
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_FOREACH_CHILD(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_FOREACH_CHILD_SEP(fn, sep) 
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_FOREACH_CHILD_VARGS(fn, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_FOREACH_CHILD_STATUS_OKAY(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 
+
+/* Node's dependency ordinal: */
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_ORD 75
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_ORD_STR_SORTABLE 00075
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_REQUIRES_ORDS \
+	7, /* /soc/interrupt-controller@e000e100 */ \
+	9, /* /soc/peripheral@50000000 */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_SUPPORTS_ORDS /* nothing */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_EXISTS 1
+#define DT_N_INST_2_nordic_nrf_twim DT_N_S_soc_S_peripheral_50000000_S_i2c_9000
+#define DT_N_NODELABEL_i2c1         DT_N_S_soc_S_peripheral_50000000_S_i2c_9000
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_REG_NUM 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_REG_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_REG_IDX_0_VAL_ADDRESS 1342214144 /* 0x50009000 */
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_RANGES_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_FOREACH_RANGE(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_IRQ_NUM 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_IRQ_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_IRQ_IDX_0_VAL_irq 9
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_IRQ_IDX_0_VAL_irq_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_IRQ_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_IRQ_IDX_0_VAL_priority 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_IRQ_IDX_0_VAL_priority_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_IRQ_LEVEL 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_COMPAT_MATCHES_nordic_nrf_twim 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_COMPAT_VENDOR_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_COMPAT_MODEL_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_COMPAT_MODEL_IDX_0 "nrf-twim"
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_STATUS_disabled 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_PINCTRL_NUM 0
+
+/* Generic property macros: */
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_wakeup_source 0
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_wakeup_source_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_zephyr_pm_device_runtime_auto 0
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_zephyr_pm_device_runtime_auto_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_status "disabled"
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_status_STRING_UNQUOTED disabled
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_status_STRING_TOKEN disabled
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_status_STRING_UPPER_TOKEN DISABLED
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_status_IDX_0 "disabled"
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_status_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_status_ENUM_IDX 2
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_status_ENUM_VAL_disabled_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_status_ENUM_TOKEN disabled
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_status_ENUM_UPPER_TOKEN DISABLED
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_9000, status, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_9000, status, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_9000, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_9000, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_status_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_status_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_compatible {"nordic,nrf-twim"}
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_compatible_IDX_0 "nordic,nrf-twim"
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-twim
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_twim
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_TWIM
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_compatible_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_9000, compatible, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_9000, compatible, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_9000, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_9000, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_compatible_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_compatible_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_reg {36864 /* 0x9000 */, 4096 /* 0x1000 */}
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_reg_IDX_0 36864
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_reg_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_reg_IDX_1 4096
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_reg_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_reg_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_interrupts {9 /* 0x9 */, 1 /* 0x1 */}
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_interrupts_IDX_0 9
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_interrupts_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_interrupts_IDX_1 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_interrupts_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_interrupts_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_zephyr_deferred_init 0
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_zephyr_deferred_init_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_clock_frequency 100000
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_clock_frequency_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_sq_size 4
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_sq_size_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_cq_size 4
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_cq_size_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_easydma_maxcnt_bits 13
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_easydma_maxcnt_bits_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_zephyr_concat_buf_size 16
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_zephyr_concat_buf_size_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_zephyr_flash_buf_max_size 16
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_9000_P_zephyr_flash_buf_max_size_EXISTS 1
+
+/*
+ * Devicetree node: /soc/peripheral@50000000/i2c@b000
+ *
+ * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_i2c_b000
+ *
+ * Binding (compatible = nordic,nrf-twim):
+ *   $ZEPHYR_BASE/dts/bindings/i2c/nordic,nrf-twim.yaml
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_PATH "/soc/peripheral@50000000/i2c@b000"
+
+/* Node's name with unit-address: */
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_FULL_NAME "i2c@b000"
+
+/* Node parent (/soc/peripheral@50000000) identifier: */
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_PARENT DT_N_S_soc_S_peripheral_50000000
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_CHILD_IDX 22
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_CHILD_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_CHILD_NUM_STATUS_OKAY 0
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_FOREACH_CHILD(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_FOREACH_CHILD_SEP(fn, sep) 
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_FOREACH_CHILD_VARGS(fn, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_FOREACH_CHILD_STATUS_OKAY(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 
+
+/* Node's dependency ordinal: */
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_ORD 76
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_ORD_STR_SORTABLE 00076
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_REQUIRES_ORDS \
+	7, /* /soc/interrupt-controller@e000e100 */ \
+	9, /* /soc/peripheral@50000000 */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_SUPPORTS_ORDS /* nothing */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_EXISTS 1
+#define DT_N_INST_3_nordic_nrf_twim DT_N_S_soc_S_peripheral_50000000_S_i2c_b000
+#define DT_N_NODELABEL_i2c3         DT_N_S_soc_S_peripheral_50000000_S_i2c_b000
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_REG_NUM 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_REG_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_REG_IDX_0_VAL_ADDRESS 1342222336 /* 0x5000b000 */
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_RANGES_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_FOREACH_RANGE(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_IRQ_NUM 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_IRQ_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_IRQ_IDX_0_VAL_irq 11
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_IRQ_IDX_0_VAL_irq_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_IRQ_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_IRQ_IDX_0_VAL_priority 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_IRQ_IDX_0_VAL_priority_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_IRQ_LEVEL 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_COMPAT_MATCHES_nordic_nrf_twim 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_COMPAT_VENDOR_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_COMPAT_MODEL_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_COMPAT_MODEL_IDX_0 "nrf-twim"
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_STATUS_disabled 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_PINCTRL_NUM 0
+
+/* Generic property macros: */
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_wakeup_source 0
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_wakeup_source_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_zephyr_pm_device_runtime_auto 0
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_zephyr_pm_device_runtime_auto_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_status "disabled"
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_status_STRING_UNQUOTED disabled
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_status_STRING_TOKEN disabled
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_status_STRING_UPPER_TOKEN DISABLED
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_status_IDX_0 "disabled"
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_status_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_status_ENUM_IDX 2
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_status_ENUM_VAL_disabled_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_status_ENUM_TOKEN disabled
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_status_ENUM_UPPER_TOKEN DISABLED
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_b000, status, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_b000, status, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_b000, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_b000, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_status_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_status_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_compatible {"nordic,nrf-twim"}
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_compatible_IDX_0 "nordic,nrf-twim"
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-twim
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_twim
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_TWIM
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_compatible_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_b000, compatible, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_b000, compatible, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_b000, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_b000, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_compatible_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_compatible_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_reg {45056 /* 0xb000 */, 4096 /* 0x1000 */}
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_reg_IDX_0 45056
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_reg_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_reg_IDX_1 4096
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_reg_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_reg_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_interrupts {11 /* 0xb */, 1 /* 0x1 */}
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_interrupts_IDX_0 11
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_interrupts_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_interrupts_IDX_1 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_interrupts_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_interrupts_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_zephyr_deferred_init 0
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_zephyr_deferred_init_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_clock_frequency 100000
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_clock_frequency_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_sq_size 4
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_sq_size_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_cq_size 4
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_cq_size_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_easydma_maxcnt_bits 13
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_easydma_maxcnt_bits_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_zephyr_concat_buf_size 16
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_zephyr_concat_buf_size_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_zephyr_flash_buf_max_size 16
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_b000_P_zephyr_flash_buf_max_size_EXISTS 1
+
+/*
+ * Devicetree node: /soc/peripheral@50000000/i2s@28000
+ *
+ * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_i2s_28000
+ *
+ * Binding (compatible = nordic,nrf-i2s):
+ *   $ZEPHYR_BASE/dts/bindings/i2s/nordic,nrf-i2s.yaml
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_PATH "/soc/peripheral@50000000/i2s@28000"
+
+/* Node's name with unit-address: */
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_FULL_NAME "i2s@28000"
+
+/* Node parent (/soc/peripheral@50000000) identifier: */
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_PARENT DT_N_S_soc_S_peripheral_50000000
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_CHILD_IDX 10
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_CHILD_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_CHILD_NUM_STATUS_OKAY 0
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_FOREACH_CHILD(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_FOREACH_CHILD_SEP(fn, sep) 
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_FOREACH_CHILD_VARGS(fn, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_FOREACH_CHILD_STATUS_OKAY(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 
+
+/* Node's dependency ordinal: */
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_ORD 77
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_ORD_STR_SORTABLE 00077
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_REQUIRES_ORDS \
+	7, /* /soc/interrupt-controller@e000e100 */ \
+	9, /* /soc/peripheral@50000000 */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_SUPPORTS_ORDS /* nothing */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_EXISTS 1
+#define DT_N_INST_0_nordic_nrf_i2s DT_N_S_soc_S_peripheral_50000000_S_i2s_28000
+#define DT_N_NODELABEL_i2s0        DT_N_S_soc_S_peripheral_50000000_S_i2s_28000
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_REG_NUM 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_REG_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_REG_IDX_0_VAL_ADDRESS 1342341120 /* 0x50028000 */
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_RANGES_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_FOREACH_RANGE(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_IRQ_NUM 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_IRQ_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_IRQ_IDX_0_VAL_irq 40
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_IRQ_IDX_0_VAL_irq_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_IRQ_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_IRQ_IDX_0_VAL_priority 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_IRQ_IDX_0_VAL_priority_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_IRQ_LEVEL 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_COMPAT_MATCHES_nordic_nrf_i2s 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_COMPAT_VENDOR_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_COMPAT_MODEL_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_COMPAT_MODEL_IDX_0 "nrf-i2s"
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_STATUS_disabled 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_PINCTRL_NUM 0
+
+/* Generic property macros: */
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_wakeup_source 0
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_wakeup_source_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_zephyr_pm_device_runtime_auto 0
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_zephyr_pm_device_runtime_auto_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_status "disabled"
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_status_STRING_UNQUOTED disabled
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_status_STRING_TOKEN disabled
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_status_STRING_UPPER_TOKEN DISABLED
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_status_IDX_0 "disabled"
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_status_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_status_ENUM_IDX 2
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_status_ENUM_VAL_disabled_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_status_ENUM_TOKEN disabled
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_status_ENUM_UPPER_TOKEN DISABLED
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_i2s_28000, status, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_i2s_28000, status, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_i2s_28000, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_i2s_28000, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_status_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_status_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_compatible {"nordic,nrf-i2s"}
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_compatible_IDX_0 "nordic,nrf-i2s"
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-i2s
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_i2s
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_I2S
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_compatible_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_i2s_28000, compatible, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_i2s_28000, compatible, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_i2s_28000, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_i2s_28000, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_compatible_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_compatible_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_reg {163840 /* 0x28000 */, 4096 /* 0x1000 */}
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_reg_IDX_0 163840
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_reg_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_reg_IDX_1 4096
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_reg_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_reg_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_interrupts {40 /* 0x28 */, 1 /* 0x1 */}
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_interrupts_IDX_0 40
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_interrupts_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_interrupts_IDX_1 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_interrupts_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_interrupts_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_zephyr_deferred_init 0
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_zephyr_deferred_init_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_clock_source "PCLK32M_HFXO"
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_clock_source_STRING_UNQUOTED PCLK32M_HFXO
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_clock_source_STRING_TOKEN PCLK32M_HFXO
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_clock_source_STRING_UPPER_TOKEN PCLK32M_HFXO
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_clock_source_IDX_0 "PCLK32M_HFXO"
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_clock_source_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_clock_source_ENUM_IDX 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_clock_source_ENUM_VAL_PCLK32M_HFXO_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_clock_source_ENUM_TOKEN PCLK32M_HFXO
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_clock_source_ENUM_UPPER_TOKEN PCLK32M_HFXO
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_clock_source_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_i2s_28000, clock_source, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_clock_source_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_i2s_28000, clock_source, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_clock_source_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_i2s_28000, clock_source, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_clock_source_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_i2s_28000, clock_source, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_clock_source_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2s_28000_P_clock_source_EXISTS 1
+
+/*
+ * Devicetree node: /soc/peripheral@50000000/ipc@2a000
+ *
+ * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000
+ *
+ * Binding (compatible = nordic,nrf-ipc):
+ *   $ZEPHYR_BASE/dts/bindings/ipc/nordic,nrf-ipc.yaml
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_PATH "/soc/peripheral@50000000/ipc@2a000"
+
+/* Node's name with unit-address: */
+#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_FULL_NAME "ipc@2a000"
+
+/* Node parent (/soc/peripheral@50000000) identifier: */
+#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_PARENT DT_N_S_soc_S_peripheral_50000000
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_CHILD_IDX 9
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_CHILD_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_CHILD_NUM_STATUS_OKAY 0
+#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_FOREACH_CHILD(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_FOREACH_CHILD_SEP(fn, sep) 
+#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_FOREACH_CHILD_VARGS(fn, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_FOREACH_CHILD_STATUS_OKAY(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
+#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 
+
+/* Node's dependency ordinal: */
+#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_ORD 78
+#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_ORD_STR_SORTABLE 00078
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_REQUIRES_ORDS \
+	7, /* /soc/interrupt-controller@e000e100 */ \
+	9, /* /soc/peripheral@50000000 */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_SUPPORTS_ORDS /* nothing */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_EXISTS 1
+#define DT_N_INST_0_nordic_nrf_ipc DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000
+#define DT_N_NODELABEL_ipc         DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_REG_NUM 1
+#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_REG_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_REG_IDX_0_VAL_ADDRESS 1342349312 /* 0x5002a000 */
+#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
+#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_RANGES_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_FOREACH_RANGE(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_IRQ_NUM 1
+#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_IRQ_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_IRQ_IDX_0_VAL_irq 42
+#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_IRQ_IDX_0_VAL_irq_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_IRQ_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_IRQ_IDX_0_VAL_priority 1
+#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_IRQ_IDX_0_VAL_priority_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100
+#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_IRQ_LEVEL 1
+#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_COMPAT_MATCHES_nordic_nrf_ipc 1
+#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_COMPAT_VENDOR_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
+#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_COMPAT_MODEL_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_COMPAT_MODEL_IDX_0 "nrf-ipc"
+#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_STATUS_okay 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_PINCTRL_NUM 0
+
+/* Generic property macros: */
+#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_P_wakeup_source 0
+#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_P_wakeup_source_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_P_zephyr_pm_device_runtime_auto 0
+#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_P_zephyr_pm_device_runtime_auto_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_P_status "okay"
+#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_P_status_STRING_UNQUOTED okay
+#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_P_status_STRING_TOKEN okay
+#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_P_status_STRING_UPPER_TOKEN OKAY
+#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_P_status_IDX_0 "okay"
+#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_P_status_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_P_status_ENUM_IDX 1
+#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_P_status_ENUM_VAL_okay_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_P_status_ENUM_TOKEN okay
+#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_P_status_ENUM_UPPER_TOKEN OKAY
+#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000, status, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000, status, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_P_status_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_P_status_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_P_compatible {"nordic,nrf-ipc"}
+#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_P_compatible_IDX_0 "nordic,nrf-ipc"
+#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-ipc
+#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_ipc
+#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_IPC
+#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_P_compatible_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000, compatible, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000, compatible, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_P_compatible_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_P_compatible_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_P_reg {172032 /* 0x2a000 */, 4096 /* 0x1000 */}
+#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_P_reg_IDX_0 172032
+#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_P_reg_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_P_reg_IDX_1 4096
+#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_P_reg_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_P_reg_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_P_interrupts {42 /* 0x2a */, 1 /* 0x1 */}
+#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_P_interrupts_IDX_0 42
+#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_P_interrupts_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_P_interrupts_IDX_1 1
+#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_P_interrupts_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_P_interrupts_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_P_zephyr_deferred_init 0
+#define DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000_P_zephyr_deferred_init_EXISTS 1
+
+/*
+ * Devicetree node: /soc/peripheral@50000000/kmu@39000
+ *
+ * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_kmu_39000
+ *
+ * Binding (compatible = nordic,nrf-kmu):
+ *   $ZEPHYR_BASE/dts/bindings/arm/nordic,nrf-kmu.yaml
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_PATH "/soc/peripheral@50000000/kmu@39000"
+
+/* Node's name with unit-address: */
+#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_FULL_NAME "kmu@39000"
+
+/* Node parent (/soc/peripheral@50000000) identifier: */
+#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_PARENT DT_N_S_soc_S_peripheral_50000000
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_CHILD_IDX 11
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_CHILD_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_CHILD_NUM_STATUS_OKAY 0
+#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_FOREACH_CHILD(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_FOREACH_CHILD_SEP(fn, sep) 
+#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_FOREACH_CHILD_VARGS(fn, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_FOREACH_CHILD_STATUS_OKAY(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
+#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 
+
+/* Node's dependency ordinal: */
+#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_ORD 79
+#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_ORD_STR_SORTABLE 00079
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_REQUIRES_ORDS \
+	7, /* /soc/interrupt-controller@e000e100 */ \
+	9, /* /soc/peripheral@50000000 */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_SUPPORTS_ORDS /* nothing */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_EXISTS 1
+#define DT_N_INST_0_nordic_nrf_kmu DT_N_S_soc_S_peripheral_50000000_S_kmu_39000
+#define DT_N_NODELABEL_kmu         DT_N_S_soc_S_peripheral_50000000_S_kmu_39000
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_REG_NUM 1
+#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_REG_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_REG_IDX_0_VAL_ADDRESS 1342410752 /* 0x50039000 */
+#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
+#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_RANGES_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_FOREACH_RANGE(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_IRQ_NUM 1
+#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_IRQ_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_IRQ_IDX_0_VAL_irq 57
+#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_IRQ_IDX_0_VAL_irq_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_IRQ_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_IRQ_IDX_0_VAL_priority 1
+#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_IRQ_IDX_0_VAL_priority_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100
+#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_IRQ_LEVEL 1
+#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_COMPAT_MATCHES_nordic_nrf_kmu 1
+#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_COMPAT_VENDOR_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
+#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_COMPAT_MODEL_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_COMPAT_MODEL_IDX_0 "nrf-kmu"
+#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_STATUS_okay 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_PINCTRL_NUM 0
+
+/* Generic property macros: */
+#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_P_wakeup_source 0
+#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_P_wakeup_source_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_P_zephyr_pm_device_runtime_auto 0
+#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_P_zephyr_pm_device_runtime_auto_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_P_status "okay"
+#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_P_status_STRING_UNQUOTED okay
+#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_P_status_STRING_TOKEN okay
+#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_P_status_STRING_UPPER_TOKEN OKAY
+#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_P_status_IDX_0 "okay"
+#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_P_status_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_P_status_ENUM_IDX 1
+#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_P_status_ENUM_VAL_okay_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_P_status_ENUM_TOKEN okay
+#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_P_status_ENUM_UPPER_TOKEN OKAY
+#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_kmu_39000, status, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_kmu_39000, status, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_kmu_39000, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_kmu_39000, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_P_status_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_P_status_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_P_compatible {"nordic,nrf-kmu"}
+#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_P_compatible_IDX_0 "nordic,nrf-kmu"
+#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-kmu
+#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_kmu
+#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_KMU
+#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_P_compatible_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_kmu_39000, compatible, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_kmu_39000, compatible, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_kmu_39000, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_kmu_39000, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_P_compatible_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_P_compatible_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_P_reg {233472 /* 0x39000 */, 4096 /* 0x1000 */}
+#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_P_reg_IDX_0 233472
+#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_P_reg_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_P_reg_IDX_1 4096
+#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_P_reg_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_P_reg_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_P_interrupts {57 /* 0x39 */, 1 /* 0x1 */}
+#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_P_interrupts_IDX_0 57
+#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_P_interrupts_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_P_interrupts_IDX_1 1
+#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_P_interrupts_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_P_interrupts_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_P_zephyr_deferred_init 0
+#define DT_N_S_soc_S_peripheral_50000000_S_kmu_39000_P_zephyr_deferred_init_EXISTS 1
+
+/*
+ * Devicetree node: /soc/peripheral@50000000/pdm@26000
+ *
+ * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_pdm_26000
+ *
+ * Binding (compatible = nordic,nrf-pdm):
+ *   $ZEPHYR_BASE/dts/bindings/audio/nordic,nrf-pdm.yaml
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_PATH "/soc/peripheral@50000000/pdm@26000"
+
+/* Node's name with unit-address: */
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_FULL_NAME "pdm@26000"
+
+/* Node parent (/soc/peripheral@50000000) identifier: */
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_PARENT DT_N_S_soc_S_peripheral_50000000
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_CHILD_IDX 12
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_CHILD_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_CHILD_NUM_STATUS_OKAY 0
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_FOREACH_CHILD(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_FOREACH_CHILD_SEP(fn, sep) 
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_FOREACH_CHILD_VARGS(fn, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_FOREACH_CHILD_STATUS_OKAY(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 
+
+/* Node's dependency ordinal: */
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_ORD 80
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_ORD_STR_SORTABLE 00080
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_REQUIRES_ORDS \
+	7, /* /soc/interrupt-controller@e000e100 */ \
+	9, /* /soc/peripheral@50000000 */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_SUPPORTS_ORDS /* nothing */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_EXISTS 1
+#define DT_N_INST_0_nordic_nrf_pdm DT_N_S_soc_S_peripheral_50000000_S_pdm_26000
+#define DT_N_NODELABEL_pdm0        DT_N_S_soc_S_peripheral_50000000_S_pdm_26000
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_REG_NUM 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_REG_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_REG_IDX_0_VAL_ADDRESS 1342332928 /* 0x50026000 */
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_RANGES_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_FOREACH_RANGE(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_IRQ_NUM 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_IRQ_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_IRQ_IDX_0_VAL_irq 38
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_IRQ_IDX_0_VAL_irq_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_IRQ_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_IRQ_IDX_0_VAL_priority 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_IRQ_IDX_0_VAL_priority_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_IRQ_LEVEL 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_COMPAT_MATCHES_nordic_nrf_pdm 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_COMPAT_VENDOR_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_COMPAT_MODEL_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_COMPAT_MODEL_IDX_0 "nrf-pdm"
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_STATUS_disabled 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_PINCTRL_NUM 0
+
+/* Generic property macros: */
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_wakeup_source 0
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_wakeup_source_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_zephyr_pm_device_runtime_auto 0
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_zephyr_pm_device_runtime_auto_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_status "disabled"
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_status_STRING_UNQUOTED disabled
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_status_STRING_TOKEN disabled
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_status_STRING_UPPER_TOKEN DISABLED
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_status_IDX_0 "disabled"
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_status_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_status_ENUM_IDX 2
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_status_ENUM_VAL_disabled_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_status_ENUM_TOKEN disabled
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_status_ENUM_UPPER_TOKEN DISABLED
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_pdm_26000, status, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_pdm_26000, status, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_pdm_26000, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_pdm_26000, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_status_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_status_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_compatible {"nordic,nrf-pdm"}
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_compatible_IDX_0 "nordic,nrf-pdm"
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-pdm
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_pdm
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_PDM
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_compatible_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_pdm_26000, compatible, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_pdm_26000, compatible, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_pdm_26000, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_pdm_26000, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_compatible_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_compatible_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_reg {155648 /* 0x26000 */, 4096 /* 0x1000 */}
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_reg_IDX_0 155648
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_reg_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_reg_IDX_1 4096
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_reg_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_reg_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_interrupts {38 /* 0x26 */, 1 /* 0x1 */}
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_interrupts_IDX_0 38
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_interrupts_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_interrupts_IDX_1 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_interrupts_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_interrupts_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_zephyr_deferred_init 0
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_zephyr_deferred_init_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_clock_source "PCLK32M_HFXO"
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_clock_source_STRING_UNQUOTED PCLK32M_HFXO
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_clock_source_STRING_TOKEN PCLK32M_HFXO
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_clock_source_STRING_UPPER_TOKEN PCLK32M_HFXO
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_clock_source_IDX_0 "PCLK32M_HFXO"
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_clock_source_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_clock_source_ENUM_IDX 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_clock_source_ENUM_VAL_PCLK32M_HFXO_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_clock_source_ENUM_TOKEN PCLK32M_HFXO
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_clock_source_ENUM_UPPER_TOKEN PCLK32M_HFXO
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_clock_source_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_pdm_26000, clock_source, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_clock_source_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_pdm_26000, clock_source, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_clock_source_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_pdm_26000, clock_source, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_clock_source_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_pdm_26000, clock_source, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_clock_source_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_clock_source_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_queue_size 4
+#define DT_N_S_soc_S_peripheral_50000000_S_pdm_26000_P_queue_size_EXISTS 1
+
+/*
+ * Devicetree node: /soc/peripheral@50000000/pwm@22000
+ *
+ * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_pwm_22000
+ *
+ * Binding (compatible = nordic,nrf-pwm):
+ *   $ZEPHYR_BASE/dts/bindings/pwm/nordic,nrf-pwm.yaml
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_PATH "/soc/peripheral@50000000/pwm@22000"
+
+/* Node's name with unit-address: */
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_FULL_NAME "pwm@22000"
+
+/* Node parent (/soc/peripheral@50000000) identifier: */
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_PARENT DT_N_S_soc_S_peripheral_50000000
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_CHILD_IDX 28
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_CHILD_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_CHILD_NUM_STATUS_OKAY 0
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_FOREACH_CHILD(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_FOREACH_CHILD_SEP(fn, sep) 
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_FOREACH_CHILD_VARGS(fn, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_FOREACH_CHILD_STATUS_OKAY(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 
+
+/* Node's dependency ordinal: */
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_ORD 81
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_ORD_STR_SORTABLE 00081
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_REQUIRES_ORDS \
+	7, /* /soc/interrupt-controller@e000e100 */ \
+	9, /* /soc/peripheral@50000000 */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_SUPPORTS_ORDS /* nothing */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_EXISTS 1
+#define DT_N_INST_1_nordic_nrf_pwm DT_N_S_soc_S_peripheral_50000000_S_pwm_22000
+#define DT_N_NODELABEL_pwm1        DT_N_S_soc_S_peripheral_50000000_S_pwm_22000
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_REG_NUM 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_REG_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_REG_IDX_0_VAL_ADDRESS 1342316544 /* 0x50022000 */
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_RANGES_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_FOREACH_RANGE(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_IRQ_NUM 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_IRQ_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_IRQ_IDX_0_VAL_irq 34
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_IRQ_IDX_0_VAL_irq_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_IRQ_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_IRQ_IDX_0_VAL_priority 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_IRQ_IDX_0_VAL_priority_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_IRQ_LEVEL 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_COMPAT_MATCHES_nordic_nrf_pwm 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_COMPAT_VENDOR_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_COMPAT_MODEL_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_COMPAT_MODEL_IDX_0 "nrf-pwm"
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_STATUS_disabled 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_PINCTRL_NUM 0
+
+/* Generic property macros: */
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_P_wakeup_source 0
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_P_wakeup_source_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_P_zephyr_pm_device_runtime_auto 0
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_P_zephyr_pm_device_runtime_auto_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_P_status "disabled"
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_P_status_STRING_UNQUOTED disabled
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_P_status_STRING_TOKEN disabled
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_P_status_STRING_UPPER_TOKEN DISABLED
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_P_status_IDX_0 "disabled"
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_P_status_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_P_status_ENUM_IDX 2
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_P_status_ENUM_VAL_disabled_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_P_status_ENUM_TOKEN disabled
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_P_status_ENUM_UPPER_TOKEN DISABLED
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_22000, status, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_22000, status, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_22000, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_22000, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_P_status_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_P_status_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_P_compatible {"nordic,nrf-pwm"}
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_P_compatible_IDX_0 "nordic,nrf-pwm"
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-pwm
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_pwm
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_PWM
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_P_compatible_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_22000, compatible, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_22000, compatible, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_22000, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_22000, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_P_compatible_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_P_compatible_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_P_reg {139264 /* 0x22000 */, 4096 /* 0x1000 */}
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_P_reg_IDX_0 139264
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_P_reg_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_P_reg_IDX_1 4096
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_P_reg_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_P_reg_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_P_interrupts {34 /* 0x22 */, 1 /* 0x1 */}
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_P_interrupts_IDX_0 34
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_P_interrupts_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_P_interrupts_IDX_1 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_P_interrupts_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_P_interrupts_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_P_zephyr_deferred_init 0
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_P_zephyr_deferred_init_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_P_center_aligned 0
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_22000_P_center_aligned_EXISTS 1
+
+/*
+ * Devicetree node: /soc/peripheral@50000000/pwm@23000
+ *
+ * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_pwm_23000
+ *
+ * Binding (compatible = nordic,nrf-pwm):
+ *   $ZEPHYR_BASE/dts/bindings/pwm/nordic,nrf-pwm.yaml
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_PATH "/soc/peripheral@50000000/pwm@23000"
+
+/* Node's name with unit-address: */
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_FULL_NAME "pwm@23000"
+
+/* Node parent (/soc/peripheral@50000000) identifier: */
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_PARENT DT_N_S_soc_S_peripheral_50000000
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_CHILD_IDX 29
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_CHILD_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_CHILD_NUM_STATUS_OKAY 0
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_FOREACH_CHILD(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_FOREACH_CHILD_SEP(fn, sep) 
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_FOREACH_CHILD_VARGS(fn, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_FOREACH_CHILD_STATUS_OKAY(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 
+
+/* Node's dependency ordinal: */
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_ORD 82
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_ORD_STR_SORTABLE 00082
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_REQUIRES_ORDS \
+	7, /* /soc/interrupt-controller@e000e100 */ \
+	9, /* /soc/peripheral@50000000 */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_SUPPORTS_ORDS /* nothing */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_EXISTS 1
+#define DT_N_INST_2_nordic_nrf_pwm DT_N_S_soc_S_peripheral_50000000_S_pwm_23000
+#define DT_N_NODELABEL_pwm2        DT_N_S_soc_S_peripheral_50000000_S_pwm_23000
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_REG_NUM 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_REG_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_REG_IDX_0_VAL_ADDRESS 1342320640 /* 0x50023000 */
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_RANGES_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_FOREACH_RANGE(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_IRQ_NUM 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_IRQ_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_IRQ_IDX_0_VAL_irq 35
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_IRQ_IDX_0_VAL_irq_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_IRQ_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_IRQ_IDX_0_VAL_priority 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_IRQ_IDX_0_VAL_priority_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_IRQ_LEVEL 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_COMPAT_MATCHES_nordic_nrf_pwm 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_COMPAT_VENDOR_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_COMPAT_MODEL_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_COMPAT_MODEL_IDX_0 "nrf-pwm"
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_STATUS_disabled 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_PINCTRL_NUM 0
+
+/* Generic property macros: */
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_P_wakeup_source 0
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_P_wakeup_source_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_P_zephyr_pm_device_runtime_auto 0
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_P_zephyr_pm_device_runtime_auto_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_P_status "disabled"
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_P_status_STRING_UNQUOTED disabled
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_P_status_STRING_TOKEN disabled
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_P_status_STRING_UPPER_TOKEN DISABLED
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_P_status_IDX_0 "disabled"
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_P_status_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_P_status_ENUM_IDX 2
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_P_status_ENUM_VAL_disabled_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_P_status_ENUM_TOKEN disabled
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_P_status_ENUM_UPPER_TOKEN DISABLED
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_23000, status, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_23000, status, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_23000, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_23000, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_P_status_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_P_status_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_P_compatible {"nordic,nrf-pwm"}
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_P_compatible_IDX_0 "nordic,nrf-pwm"
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-pwm
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_pwm
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_PWM
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_P_compatible_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_23000, compatible, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_23000, compatible, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_23000, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_23000, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_P_compatible_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_P_compatible_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_P_reg {143360 /* 0x23000 */, 4096 /* 0x1000 */}
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_P_reg_IDX_0 143360
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_P_reg_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_P_reg_IDX_1 4096
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_P_reg_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_P_reg_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_P_interrupts {35 /* 0x23 */, 1 /* 0x1 */}
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_P_interrupts_IDX_0 35
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_P_interrupts_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_P_interrupts_IDX_1 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_P_interrupts_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_P_interrupts_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_P_zephyr_deferred_init 0
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_P_zephyr_deferred_init_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_P_center_aligned 0
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_23000_P_center_aligned_EXISTS 1
+
+/*
+ * Devicetree node: /soc/peripheral@50000000/pwm@24000
+ *
+ * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_pwm_24000
+ *
+ * Binding (compatible = nordic,nrf-pwm):
+ *   $ZEPHYR_BASE/dts/bindings/pwm/nordic,nrf-pwm.yaml
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_PATH "/soc/peripheral@50000000/pwm@24000"
+
+/* Node's name with unit-address: */
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_FULL_NAME "pwm@24000"
+
+/* Node parent (/soc/peripheral@50000000) identifier: */
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_PARENT DT_N_S_soc_S_peripheral_50000000
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_CHILD_IDX 30
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_CHILD_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_CHILD_NUM_STATUS_OKAY 0
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_FOREACH_CHILD(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_FOREACH_CHILD_SEP(fn, sep) 
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_FOREACH_CHILD_VARGS(fn, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_FOREACH_CHILD_STATUS_OKAY(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 
+
+/* Node's dependency ordinal: */
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_ORD 83
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_ORD_STR_SORTABLE 00083
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_REQUIRES_ORDS \
+	7, /* /soc/interrupt-controller@e000e100 */ \
+	9, /* /soc/peripheral@50000000 */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_SUPPORTS_ORDS /* nothing */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_EXISTS 1
+#define DT_N_INST_3_nordic_nrf_pwm DT_N_S_soc_S_peripheral_50000000_S_pwm_24000
+#define DT_N_NODELABEL_pwm3        DT_N_S_soc_S_peripheral_50000000_S_pwm_24000
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_REG_NUM 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_REG_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_REG_IDX_0_VAL_ADDRESS 1342324736 /* 0x50024000 */
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_RANGES_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_FOREACH_RANGE(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_IRQ_NUM 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_IRQ_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_IRQ_IDX_0_VAL_irq 36
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_IRQ_IDX_0_VAL_irq_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_IRQ_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_IRQ_IDX_0_VAL_priority 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_IRQ_IDX_0_VAL_priority_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_IRQ_LEVEL 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_COMPAT_MATCHES_nordic_nrf_pwm 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_COMPAT_VENDOR_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_COMPAT_MODEL_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_COMPAT_MODEL_IDX_0 "nrf-pwm"
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_STATUS_disabled 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_PINCTRL_NUM 0
+
+/* Generic property macros: */
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_P_wakeup_source 0
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_P_wakeup_source_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_P_zephyr_pm_device_runtime_auto 0
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_P_zephyr_pm_device_runtime_auto_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_P_status "disabled"
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_P_status_STRING_UNQUOTED disabled
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_P_status_STRING_TOKEN disabled
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_P_status_STRING_UPPER_TOKEN DISABLED
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_P_status_IDX_0 "disabled"
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_P_status_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_P_status_ENUM_IDX 2
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_P_status_ENUM_VAL_disabled_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_P_status_ENUM_TOKEN disabled
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_P_status_ENUM_UPPER_TOKEN DISABLED
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_24000, status, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_24000, status, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_24000, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_24000, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_P_status_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_P_status_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_P_compatible {"nordic,nrf-pwm"}
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_P_compatible_IDX_0 "nordic,nrf-pwm"
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-pwm
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_pwm
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_PWM
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_P_compatible_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_24000, compatible, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_24000, compatible, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_24000, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_24000, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_P_compatible_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_P_compatible_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_P_reg {147456 /* 0x24000 */, 4096 /* 0x1000 */}
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_P_reg_IDX_0 147456
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_P_reg_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_P_reg_IDX_1 4096
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_P_reg_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_P_reg_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_P_interrupts {36 /* 0x24 */, 1 /* 0x1 */}
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_P_interrupts_IDX_0 36
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_P_interrupts_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_P_interrupts_IDX_1 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_P_interrupts_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_P_interrupts_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_P_zephyr_deferred_init 0
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_P_zephyr_deferred_init_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_P_center_aligned 0
+#define DT_N_S_soc_S_peripheral_50000000_S_pwm_24000_P_center_aligned_EXISTS 1
+
+/*
+ * Devicetree node: /soc/peripheral@50000000/regulator@4000
+ *
+ * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_regulator_4000
+ *
+ * Binding (compatible = nordic,nrf-regulators):
+ *   $ZEPHYR_BASE/dts/bindings/power/nordic,nrf-regulators.yaml
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_PATH "/soc/peripheral@50000000/regulator@4000"
+
+/* Node's name with unit-address: */
+#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_FULL_NAME "regulator@4000"
+
+/* Node parent (/soc/peripheral@50000000) identifier: */
+#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_PARENT DT_N_S_soc_S_peripheral_50000000
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_CHILD_IDX 13
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_CHILD_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_CHILD_NUM_STATUS_OKAY 0
+#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_FOREACH_CHILD(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_FOREACH_CHILD_SEP(fn, sep) 
+#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_FOREACH_CHILD_VARGS(fn, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_FOREACH_CHILD_STATUS_OKAY(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
+#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 
+
+/* Node's dependency ordinal: */
+#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_ORD 84
+#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_ORD_STR_SORTABLE 00084
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_REQUIRES_ORDS \
+	9, /* /soc/peripheral@50000000 */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_SUPPORTS_ORDS /* nothing */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_EXISTS 1
+#define DT_N_INST_0_nordic_nrf_regulators DT_N_S_soc_S_peripheral_50000000_S_regulator_4000
+#define DT_N_NODELABEL_regulators         DT_N_S_soc_S_peripheral_50000000_S_regulator_4000
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_REG_NUM 1
+#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_REG_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_REG_IDX_0_VAL_ADDRESS 1342193664 /* 0x50004000 */
+#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
+#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_RANGES_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_FOREACH_RANGE(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_IRQ_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_IRQ_LEVEL 0
+#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_COMPAT_MATCHES_nordic_nrf_regulators 1
+#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_COMPAT_VENDOR_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
+#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_COMPAT_MODEL_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_COMPAT_MODEL_IDX_0 "nrf-regulators"
+#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_STATUS_okay 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_PINCTRL_NUM 0
+
+/* Generic property macros: */
+#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_P_wakeup_source 0
+#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_P_wakeup_source_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_P_zephyr_pm_device_runtime_auto 0
+#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_P_zephyr_pm_device_runtime_auto_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_P_status "okay"
+#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_P_status_STRING_UNQUOTED okay
+#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_P_status_STRING_TOKEN okay
+#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_P_status_STRING_UPPER_TOKEN OKAY
+#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_P_status_IDX_0 "okay"
+#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_P_status_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_P_status_ENUM_IDX 1
+#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_P_status_ENUM_VAL_okay_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_P_status_ENUM_TOKEN okay
+#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_P_status_ENUM_UPPER_TOKEN OKAY
+#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_regulator_4000, status, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_regulator_4000, status, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_regulator_4000, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_regulator_4000, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_P_status_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_P_status_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_P_compatible {"nordic,nrf-regulators"}
+#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_P_compatible_IDX_0 "nordic,nrf-regulators"
+#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-regulators
+#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_regulators
+#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_REGULATORS
+#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_P_compatible_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_regulator_4000, compatible, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_regulator_4000, compatible, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_regulator_4000, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_regulator_4000, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_P_compatible_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_P_compatible_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_P_reg {16384 /* 0x4000 */, 4096 /* 0x1000 */}
+#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_P_reg_IDX_0 16384
+#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_P_reg_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_P_reg_IDX_1 4096
+#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_P_reg_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_P_reg_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_P_zephyr_deferred_init 0
+#define DT_N_S_soc_S_peripheral_50000000_S_regulator_4000_P_zephyr_deferred_init_EXISTS 1
+
+/*
+ * Devicetree node: /soc/peripheral@50000000/rtc@14000
+ *
+ * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_rtc_14000
+ *
+ * Binding (compatible = nordic,nrf-rtc):
+ *   $ZEPHYR_BASE/dts/bindings/rtc/nordic,nrf-rtc.yaml
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_PATH "/soc/peripheral@50000000/rtc@14000"
+
+/* Node's name with unit-address: */
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_FULL_NAME "rtc@14000"
+
+/* Node parent (/soc/peripheral@50000000) identifier: */
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_PARENT DT_N_S_soc_S_peripheral_50000000
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_CHILD_IDX 32
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_CHILD_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_CHILD_NUM_STATUS_OKAY 0
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_FOREACH_CHILD(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_FOREACH_CHILD_SEP(fn, sep) 
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_FOREACH_CHILD_VARGS(fn, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_FOREACH_CHILD_STATUS_OKAY(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 
+
+/* Node's dependency ordinal: */
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_ORD 85
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_ORD_STR_SORTABLE 00085
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_REQUIRES_ORDS \
+	7, /* /soc/interrupt-controller@e000e100 */ \
+	9, /* /soc/peripheral@50000000 */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_SUPPORTS_ORDS /* nothing */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_EXISTS 1
+#define DT_N_INST_0_nordic_nrf_rtc DT_N_S_soc_S_peripheral_50000000_S_rtc_14000
+#define DT_N_NODELABEL_rtc0        DT_N_S_soc_S_peripheral_50000000_S_rtc_14000
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_REG_NUM 1
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_REG_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_REG_IDX_0_VAL_ADDRESS 1342259200 /* 0x50014000 */
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_RANGES_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_FOREACH_RANGE(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_IRQ_NUM 1
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_IRQ_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_IRQ_IDX_0_VAL_irq 20
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_IRQ_IDX_0_VAL_irq_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_IRQ_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_IRQ_IDX_0_VAL_priority 1
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_IRQ_IDX_0_VAL_priority_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_IRQ_LEVEL 1
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_COMPAT_MATCHES_nordic_nrf_rtc 1
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_COMPAT_VENDOR_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_COMPAT_MODEL_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_COMPAT_MODEL_IDX_0 "nrf-rtc"
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_STATUS_disabled 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_PINCTRL_NUM 0
+
+/* Generic property macros: */
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_wakeup_source 0
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_wakeup_source_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_zephyr_pm_device_runtime_auto 0
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_zephyr_pm_device_runtime_auto_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_status "disabled"
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_status_STRING_UNQUOTED disabled
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_status_STRING_TOKEN disabled
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_status_STRING_UPPER_TOKEN DISABLED
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_status_IDX_0 "disabled"
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_status_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_status_ENUM_IDX 2
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_status_ENUM_VAL_disabled_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_status_ENUM_TOKEN disabled
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_status_ENUM_UPPER_TOKEN DISABLED
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_rtc_14000, status, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_rtc_14000, status, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_rtc_14000, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_rtc_14000, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_status_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_status_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_compatible {"nordic,nrf-rtc"}
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_compatible_IDX_0 "nordic,nrf-rtc"
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-rtc
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_rtc
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_RTC
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_compatible_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_rtc_14000, compatible, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_rtc_14000, compatible, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_rtc_14000, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_rtc_14000, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_compatible_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_compatible_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_reg {81920 /* 0x14000 */, 4096 /* 0x1000 */}
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_reg_IDX_0 81920
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_reg_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_reg_IDX_1 4096
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_reg_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_reg_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_interrupts {20 /* 0x14 */, 1 /* 0x1 */}
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_interrupts_IDX_0 20
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_interrupts_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_interrupts_IDX_1 1
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_interrupts_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_interrupts_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_zephyr_deferred_init 0
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_zephyr_deferred_init_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_clock_frequency 32768
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_clock_frequency_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_prescaler 1
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_prescaler_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_cc_num 4
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_cc_num_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_ppi_wrap 0
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_ppi_wrap_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_fixed_top 0
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_fixed_top_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_zli 0
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_14000_P_zli_EXISTS 1
+
+/*
+ * Devicetree node: /soc/peripheral@50000000/rtc@15000
+ *
+ * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_rtc_15000
+ *
+ * Binding (compatible = nordic,nrf-rtc):
+ *   $ZEPHYR_BASE/dts/bindings/rtc/nordic,nrf-rtc.yaml
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_PATH "/soc/peripheral@50000000/rtc@15000"
+
+/* Node's name with unit-address: */
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_FULL_NAME "rtc@15000"
+
+/* Node parent (/soc/peripheral@50000000) identifier: */
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_PARENT DT_N_S_soc_S_peripheral_50000000
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_CHILD_IDX 33
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_CHILD_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_CHILD_NUM_STATUS_OKAY 0
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_FOREACH_CHILD(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_FOREACH_CHILD_SEP(fn, sep) 
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_FOREACH_CHILD_VARGS(fn, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_FOREACH_CHILD_STATUS_OKAY(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 
+
+/* Node's dependency ordinal: */
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_ORD 86
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_ORD_STR_SORTABLE 00086
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_REQUIRES_ORDS \
+	7, /* /soc/interrupt-controller@e000e100 */ \
+	9, /* /soc/peripheral@50000000 */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_SUPPORTS_ORDS /* nothing */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_EXISTS 1
+#define DT_N_INST_1_nordic_nrf_rtc DT_N_S_soc_S_peripheral_50000000_S_rtc_15000
+#define DT_N_NODELABEL_rtc1        DT_N_S_soc_S_peripheral_50000000_S_rtc_15000
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_REG_NUM 1
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_REG_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_REG_IDX_0_VAL_ADDRESS 1342263296 /* 0x50015000 */
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_RANGES_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_FOREACH_RANGE(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_IRQ_NUM 1
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_IRQ_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_IRQ_IDX_0_VAL_irq 21
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_IRQ_IDX_0_VAL_irq_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_IRQ_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_IRQ_IDX_0_VAL_priority 1
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_IRQ_IDX_0_VAL_priority_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_IRQ_LEVEL 1
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_COMPAT_MATCHES_nordic_nrf_rtc 1
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_COMPAT_VENDOR_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_COMPAT_MODEL_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_COMPAT_MODEL_IDX_0 "nrf-rtc"
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_STATUS_disabled 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_PINCTRL_NUM 0
+
+/* Generic property macros: */
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_wakeup_source 0
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_wakeup_source_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_zephyr_pm_device_runtime_auto 0
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_zephyr_pm_device_runtime_auto_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_status "disabled"
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_status_STRING_UNQUOTED disabled
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_status_STRING_TOKEN disabled
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_status_STRING_UPPER_TOKEN DISABLED
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_status_IDX_0 "disabled"
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_status_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_status_ENUM_IDX 2
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_status_ENUM_VAL_disabled_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_status_ENUM_TOKEN disabled
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_status_ENUM_UPPER_TOKEN DISABLED
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_rtc_15000, status, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_rtc_15000, status, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_rtc_15000, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_rtc_15000, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_status_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_status_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_compatible {"nordic,nrf-rtc"}
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_compatible_IDX_0 "nordic,nrf-rtc"
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-rtc
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_rtc
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_RTC
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_compatible_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_rtc_15000, compatible, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_rtc_15000, compatible, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_rtc_15000, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_rtc_15000, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_compatible_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_compatible_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_reg {86016 /* 0x15000 */, 4096 /* 0x1000 */}
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_reg_IDX_0 86016
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_reg_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_reg_IDX_1 4096
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_reg_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_reg_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_interrupts {21 /* 0x15 */, 1 /* 0x1 */}
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_interrupts_IDX_0 21
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_interrupts_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_interrupts_IDX_1 1
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_interrupts_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_interrupts_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_zephyr_deferred_init 0
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_zephyr_deferred_init_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_clock_frequency 32768
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_clock_frequency_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_prescaler 1
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_prescaler_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_cc_num 4
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_cc_num_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_ppi_wrap 0
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_ppi_wrap_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_fixed_top 0
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_fixed_top_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_zli 0
+#define DT_N_S_soc_S_peripheral_50000000_S_rtc_15000_P_zli_EXISTS 1
+
+/*
+ * Devicetree node: /soc/peripheral@50000000/spi@8000
+ *
+ * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_spi_8000
+ *
+ * Binding (compatible = nordic,nrf-spim):
+ *   $ZEPHYR_BASE/dts/bindings/spi/nordic,nrf-spim.yaml
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_PATH "/soc/peripheral@50000000/spi@8000"
+
+/* Node's name with unit-address: */
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_FULL_NAME "spi@8000"
+
+/* Node parent (/soc/peripheral@50000000) identifier: */
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_PARENT DT_N_S_soc_S_peripheral_50000000
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_CHILD_IDX 23
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_CHILD_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_CHILD_NUM_STATUS_OKAY 0
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_FOREACH_CHILD(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_FOREACH_CHILD_SEP(fn, sep) 
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_FOREACH_CHILD_VARGS(fn, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_FOREACH_CHILD_STATUS_OKAY(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 
+
+/* Node's dependency ordinal: */
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_ORD 87
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_ORD_STR_SORTABLE 00087
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_REQUIRES_ORDS \
+	7, /* /soc/interrupt-controller@e000e100 */ \
+	9, /* /soc/peripheral@50000000 */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_SUPPORTS_ORDS /* nothing */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_EXISTS 1
+#define DT_N_INST_1_nordic_nrf_spim DT_N_S_soc_S_peripheral_50000000_S_spi_8000
+#define DT_N_NODELABEL_spi0         DT_N_S_soc_S_peripheral_50000000_S_spi_8000
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_REG_NUM 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_REG_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_REG_IDX_0_VAL_ADDRESS 1342210048 /* 0x50008000 */
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_RANGES_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_FOREACH_RANGE(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_IRQ_NUM 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_IRQ_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_IRQ_IDX_0_VAL_irq 8
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_IRQ_IDX_0_VAL_irq_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_IRQ_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_IRQ_IDX_0_VAL_priority 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_IRQ_IDX_0_VAL_priority_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_IRQ_LEVEL 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_COMPAT_MATCHES_nordic_nrf_spim 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_COMPAT_VENDOR_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_COMPAT_MODEL_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_COMPAT_MODEL_IDX_0 "nrf-spim"
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_STATUS_disabled 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_PINCTRL_NUM 0
+
+/* Generic property macros: */
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_wakeup_source 0
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_wakeup_source_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_zephyr_pm_device_runtime_auto 0
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_zephyr_pm_device_runtime_auto_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_status "disabled"
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_status_STRING_UNQUOTED disabled
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_status_STRING_TOKEN disabled
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_status_STRING_UPPER_TOKEN DISABLED
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_status_IDX_0 "disabled"
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_status_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_status_ENUM_IDX 2
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_status_ENUM_VAL_disabled_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_status_ENUM_TOKEN disabled
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_status_ENUM_UPPER_TOKEN DISABLED
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_8000, status, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_8000, status, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_8000, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_8000, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_status_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_status_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_compatible {"nordic,nrf-spim"}
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_compatible_IDX_0 "nordic,nrf-spim"
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-spim
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_spim
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_SPIM
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_compatible_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_8000, compatible, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_8000, compatible, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_8000, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_8000, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_compatible_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_compatible_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_reg {32768 /* 0x8000 */, 4096 /* 0x1000 */}
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_reg_IDX_0 32768
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_reg_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_reg_IDX_1 4096
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_reg_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_reg_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_interrupts {8 /* 0x8 */, 1 /* 0x1 */}
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_interrupts_IDX_0 8
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_interrupts_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_interrupts_IDX_1 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_interrupts_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_interrupts_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_zephyr_deferred_init 0
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_zephyr_deferred_init_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_max_frequency 8000000
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_max_frequency_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_overrun_character 255
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_overrun_character_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_easydma_maxcnt_bits 13
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_easydma_maxcnt_bits_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_anomaly_58_workaround 0
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_anomaly_58_workaround_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_rx_delay_supported 0
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_8000_P_rx_delay_supported_EXISTS 1
+
+/*
+ * Devicetree node: /soc/peripheral@50000000/spi@9000
+ *
+ * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_spi_9000
+ *
+ * Binding (compatible = nordic,nrf-spim):
+ *   $ZEPHYR_BASE/dts/bindings/spi/nordic,nrf-spim.yaml
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_PATH "/soc/peripheral@50000000/spi@9000"
+
+/* Node's name with unit-address: */
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_FULL_NAME "spi@9000"
+
+/* Node parent (/soc/peripheral@50000000) identifier: */
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_PARENT DT_N_S_soc_S_peripheral_50000000
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_CHILD_IDX 24
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_CHILD_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_CHILD_NUM_STATUS_OKAY 0
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_FOREACH_CHILD(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_FOREACH_CHILD_SEP(fn, sep) 
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_FOREACH_CHILD_VARGS(fn, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_FOREACH_CHILD_STATUS_OKAY(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 
+
+/* Node's dependency ordinal: */
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_ORD 88
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_ORD_STR_SORTABLE 00088
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_REQUIRES_ORDS \
+	7, /* /soc/interrupt-controller@e000e100 */ \
+	9, /* /soc/peripheral@50000000 */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_SUPPORTS_ORDS /* nothing */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_EXISTS 1
+#define DT_N_INST_2_nordic_nrf_spim DT_N_S_soc_S_peripheral_50000000_S_spi_9000
+#define DT_N_NODELABEL_spi1         DT_N_S_soc_S_peripheral_50000000_S_spi_9000
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_REG_NUM 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_REG_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_REG_IDX_0_VAL_ADDRESS 1342214144 /* 0x50009000 */
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_RANGES_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_FOREACH_RANGE(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_IRQ_NUM 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_IRQ_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_IRQ_IDX_0_VAL_irq 9
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_IRQ_IDX_0_VAL_irq_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_IRQ_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_IRQ_IDX_0_VAL_priority 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_IRQ_IDX_0_VAL_priority_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_IRQ_LEVEL 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_COMPAT_MATCHES_nordic_nrf_spim 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_COMPAT_VENDOR_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_COMPAT_MODEL_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_COMPAT_MODEL_IDX_0 "nrf-spim"
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_STATUS_disabled 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_PINCTRL_NUM 0
+
+/* Generic property macros: */
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_wakeup_source 0
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_wakeup_source_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_zephyr_pm_device_runtime_auto 0
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_zephyr_pm_device_runtime_auto_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_status "disabled"
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_status_STRING_UNQUOTED disabled
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_status_STRING_TOKEN disabled
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_status_STRING_UPPER_TOKEN DISABLED
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_status_IDX_0 "disabled"
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_status_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_status_ENUM_IDX 2
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_status_ENUM_VAL_disabled_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_status_ENUM_TOKEN disabled
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_status_ENUM_UPPER_TOKEN DISABLED
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_9000, status, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_9000, status, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_9000, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_9000, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_status_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_status_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_compatible {"nordic,nrf-spim"}
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_compatible_IDX_0 "nordic,nrf-spim"
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-spim
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_spim
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_SPIM
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_compatible_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_9000, compatible, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_9000, compatible, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_9000, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_9000, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_compatible_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_compatible_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_reg {36864 /* 0x9000 */, 4096 /* 0x1000 */}
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_reg_IDX_0 36864
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_reg_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_reg_IDX_1 4096
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_reg_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_reg_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_interrupts {9 /* 0x9 */, 1 /* 0x1 */}
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_interrupts_IDX_0 9
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_interrupts_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_interrupts_IDX_1 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_interrupts_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_interrupts_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_zephyr_deferred_init 0
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_zephyr_deferred_init_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_max_frequency 8000000
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_max_frequency_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_overrun_character 255
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_overrun_character_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_easydma_maxcnt_bits 13
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_easydma_maxcnt_bits_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_anomaly_58_workaround 0
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_anomaly_58_workaround_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_rx_delay_supported 0
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_9000_P_rx_delay_supported_EXISTS 1
+
+/*
+ * Devicetree node: /soc/peripheral@50000000/spi@a000
+ *
+ * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_spi_a000
+ *
+ * Binding (compatible = nordic,nrf-spim):
+ *   $ZEPHYR_BASE/dts/bindings/spi/nordic,nrf-spim.yaml
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_PATH "/soc/peripheral@50000000/spi@a000"
+
+/* Node's name with unit-address: */
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_FULL_NAME "spi@a000"
+
+/* Node parent (/soc/peripheral@50000000) identifier: */
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_PARENT DT_N_S_soc_S_peripheral_50000000
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_CHILD_IDX 25
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_CHILD_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_CHILD_NUM_STATUS_OKAY 0
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_FOREACH_CHILD(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_FOREACH_CHILD_SEP(fn, sep) 
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_FOREACH_CHILD_VARGS(fn, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_FOREACH_CHILD_STATUS_OKAY(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 
+
+/* Node's dependency ordinal: */
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_ORD 89
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_ORD_STR_SORTABLE 00089
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_REQUIRES_ORDS \
+	7, /* /soc/interrupt-controller@e000e100 */ \
+	9, /* /soc/peripheral@50000000 */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_SUPPORTS_ORDS /* nothing */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_EXISTS 1
+#define DT_N_INST_3_nordic_nrf_spim DT_N_S_soc_S_peripheral_50000000_S_spi_a000
+#define DT_N_NODELABEL_spi2         DT_N_S_soc_S_peripheral_50000000_S_spi_a000
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_REG_NUM 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_REG_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_REG_IDX_0_VAL_ADDRESS 1342218240 /* 0x5000a000 */
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_RANGES_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_FOREACH_RANGE(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_IRQ_NUM 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_IRQ_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_IRQ_IDX_0_VAL_irq 10
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_IRQ_IDX_0_VAL_irq_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_IRQ_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_IRQ_IDX_0_VAL_priority 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_IRQ_IDX_0_VAL_priority_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_IRQ_LEVEL 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_COMPAT_MATCHES_nordic_nrf_spim 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_COMPAT_VENDOR_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_COMPAT_MODEL_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_COMPAT_MODEL_IDX_0 "nrf-spim"
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_STATUS_disabled 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_PINCTRL_NUM 0
+
+/* Generic property macros: */
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_wakeup_source 0
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_wakeup_source_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_zephyr_pm_device_runtime_auto 0
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_zephyr_pm_device_runtime_auto_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_status "disabled"
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_status_STRING_UNQUOTED disabled
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_status_STRING_TOKEN disabled
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_status_STRING_UPPER_TOKEN DISABLED
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_status_IDX_0 "disabled"
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_status_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_status_ENUM_IDX 2
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_status_ENUM_VAL_disabled_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_status_ENUM_TOKEN disabled
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_status_ENUM_UPPER_TOKEN DISABLED
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_a000, status, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_a000, status, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_a000, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_a000, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_status_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_status_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_compatible {"nordic,nrf-spim"}
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_compatible_IDX_0 "nordic,nrf-spim"
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-spim
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_spim
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_SPIM
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_compatible_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_a000, compatible, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_a000, compatible, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_a000, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_a000, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_compatible_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_compatible_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_reg {40960 /* 0xa000 */, 4096 /* 0x1000 */}
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_reg_IDX_0 40960
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_reg_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_reg_IDX_1 4096
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_reg_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_reg_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_interrupts {10 /* 0xa */, 1 /* 0x1 */}
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_interrupts_IDX_0 10
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_interrupts_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_interrupts_IDX_1 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_interrupts_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_interrupts_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_zephyr_deferred_init 0
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_zephyr_deferred_init_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_max_frequency 8000000
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_max_frequency_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_overrun_character 255
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_overrun_character_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_easydma_maxcnt_bits 13
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_easydma_maxcnt_bits_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_anomaly_58_workaround 0
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_anomaly_58_workaround_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_rx_delay_supported 0
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_a000_P_rx_delay_supported_EXISTS 1
+
+/*
+ * Devicetree node: /soc/peripheral@50000000/timer@f000
+ *
+ * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_timer_f000
+ *
+ * Binding (compatible = nordic,nrf-timer):
+ *   $ZEPHYR_BASE/dts/bindings/timer/nordic,nrf-timer.yaml
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_PATH "/soc/peripheral@50000000/timer@f000"
+
+/* Node's name with unit-address: */
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_FULL_NAME "timer@f000"
+
+/* Node parent (/soc/peripheral@50000000) identifier: */
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_PARENT DT_N_S_soc_S_peripheral_50000000
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_CHILD_IDX 37
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_CHILD_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_CHILD_NUM_STATUS_OKAY 0
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_FOREACH_CHILD(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_FOREACH_CHILD_SEP(fn, sep) 
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_FOREACH_CHILD_VARGS(fn, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_FOREACH_CHILD_STATUS_OKAY(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 
+
+/* Node's dependency ordinal: */
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_ORD 90
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_ORD_STR_SORTABLE 00090
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_REQUIRES_ORDS \
+	7, /* /soc/interrupt-controller@e000e100 */ \
+	9, /* /soc/peripheral@50000000 */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_SUPPORTS_ORDS /* nothing */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_EXISTS 1
+#define DT_N_INST_0_nordic_nrf_timer DT_N_S_soc_S_peripheral_50000000_S_timer_f000
+#define DT_N_NODELABEL_timer0        DT_N_S_soc_S_peripheral_50000000_S_timer_f000
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_REG_NUM 1
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_REG_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_REG_IDX_0_VAL_ADDRESS 1342238720 /* 0x5000f000 */
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_RANGES_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_FOREACH_RANGE(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_IRQ_NUM 1
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_IRQ_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_IRQ_IDX_0_VAL_irq 15
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_IRQ_IDX_0_VAL_irq_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_IRQ_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_IRQ_IDX_0_VAL_priority 1
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_IRQ_IDX_0_VAL_priority_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_IRQ_LEVEL 1
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_COMPAT_MATCHES_nordic_nrf_timer 1
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_COMPAT_VENDOR_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_COMPAT_MODEL_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_COMPAT_MODEL_IDX_0 "nrf-timer"
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_STATUS_disabled 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_PINCTRL_NUM 0
+
+/* Generic property macros: */
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_wakeup_source 0
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_wakeup_source_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_zephyr_pm_device_runtime_auto 0
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_zephyr_pm_device_runtime_auto_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_status "disabled"
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_status_STRING_UNQUOTED disabled
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_status_STRING_TOKEN disabled
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_status_STRING_UPPER_TOKEN DISABLED
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_status_IDX_0 "disabled"
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_status_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_status_ENUM_IDX 2
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_status_ENUM_VAL_disabled_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_status_ENUM_TOKEN disabled
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_status_ENUM_UPPER_TOKEN DISABLED
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_timer_f000, status, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_timer_f000, status, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_timer_f000, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_timer_f000, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_status_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_status_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_compatible {"nordic,nrf-timer"}
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_compatible_IDX_0 "nordic,nrf-timer"
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-timer
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_timer
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_TIMER
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_compatible_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_timer_f000, compatible, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_timer_f000, compatible, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_timer_f000, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_timer_f000, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_compatible_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_compatible_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_reg {61440 /* 0xf000 */, 4096 /* 0x1000 */}
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_reg_IDX_0 61440
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_reg_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_reg_IDX_1 4096
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_reg_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_reg_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_interrupts {15 /* 0xf */, 1 /* 0x1 */}
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_interrupts_IDX_0 15
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_interrupts_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_interrupts_IDX_1 1
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_interrupts_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_interrupts_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_zephyr_deferred_init 0
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_zephyr_deferred_init_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_cc_num 6
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_cc_num_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_max_bit_width 32
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_max_bit_width_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_max_frequency 16000000
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_max_frequency_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_prescaler 0
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_prescaler_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_zli 0
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_f000_P_zli_EXISTS 1
+
+/*
+ * Devicetree node: /soc/peripheral@50000000/timer@11000
+ *
+ * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_timer_11000
+ *
+ * Binding (compatible = nordic,nrf-timer):
+ *   $ZEPHYR_BASE/dts/bindings/timer/nordic,nrf-timer.yaml
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_PATH "/soc/peripheral@50000000/timer@11000"
+
+/* Node's name with unit-address: */
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_FULL_NAME "timer@11000"
+
+/* Node parent (/soc/peripheral@50000000) identifier: */
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_PARENT DT_N_S_soc_S_peripheral_50000000
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_CHILD_IDX 39
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_CHILD_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_CHILD_NUM_STATUS_OKAY 0
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_FOREACH_CHILD(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_FOREACH_CHILD_SEP(fn, sep) 
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_FOREACH_CHILD_VARGS(fn, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_FOREACH_CHILD_STATUS_OKAY(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 
+
+/* Node's dependency ordinal: */
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_ORD 91
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_ORD_STR_SORTABLE 00091
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_REQUIRES_ORDS \
+	7, /* /soc/interrupt-controller@e000e100 */ \
+	9, /* /soc/peripheral@50000000 */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_SUPPORTS_ORDS /* nothing */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_EXISTS 1
+#define DT_N_INST_2_nordic_nrf_timer DT_N_S_soc_S_peripheral_50000000_S_timer_11000
+#define DT_N_NODELABEL_timer2        DT_N_S_soc_S_peripheral_50000000_S_timer_11000
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_REG_NUM 1
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_REG_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_REG_IDX_0_VAL_ADDRESS 1342246912 /* 0x50011000 */
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_RANGES_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_FOREACH_RANGE(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_IRQ_NUM 1
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_IRQ_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_IRQ_IDX_0_VAL_irq 17
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_IRQ_IDX_0_VAL_irq_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_IRQ_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_IRQ_IDX_0_VAL_priority 1
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_IRQ_IDX_0_VAL_priority_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_IRQ_LEVEL 1
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_COMPAT_MATCHES_nordic_nrf_timer 1
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_COMPAT_VENDOR_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_COMPAT_MODEL_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_COMPAT_MODEL_IDX_0 "nrf-timer"
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_STATUS_disabled 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_PINCTRL_NUM 0
+
+/* Generic property macros: */
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_wakeup_source 0
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_wakeup_source_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_zephyr_pm_device_runtime_auto 0
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_zephyr_pm_device_runtime_auto_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_status "disabled"
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_status_STRING_UNQUOTED disabled
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_status_STRING_TOKEN disabled
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_status_STRING_UPPER_TOKEN DISABLED
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_status_IDX_0 "disabled"
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_status_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_status_ENUM_IDX 2
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_status_ENUM_VAL_disabled_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_status_ENUM_TOKEN disabled
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_status_ENUM_UPPER_TOKEN DISABLED
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_timer_11000, status, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_timer_11000, status, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_timer_11000, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_timer_11000, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_status_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_status_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_compatible {"nordic,nrf-timer"}
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_compatible_IDX_0 "nordic,nrf-timer"
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-timer
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_timer
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_TIMER
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_compatible_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_timer_11000, compatible, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_timer_11000, compatible, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_timer_11000, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_timer_11000, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_compatible_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_compatible_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_reg {69632 /* 0x11000 */, 4096 /* 0x1000 */}
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_reg_IDX_0 69632
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_reg_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_reg_IDX_1 4096
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_reg_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_reg_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_interrupts {17 /* 0x11 */, 1 /* 0x1 */}
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_interrupts_IDX_0 17
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_interrupts_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_interrupts_IDX_1 1
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_interrupts_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_interrupts_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_zephyr_deferred_init 0
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_zephyr_deferred_init_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_cc_num 6
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_cc_num_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_max_bit_width 32
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_max_bit_width_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_max_frequency 16000000
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_max_frequency_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_prescaler 0
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_prescaler_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_zli 0
+#define DT_N_S_soc_S_peripheral_50000000_S_timer_11000_P_zli_EXISTS 1
+
+/*
+ * Devicetree node: /soc/peripheral@50000000/uart@8000
+ *
+ * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_uart_8000
+ *
+ * Binding (compatible = nordic,nrf-uarte):
+ *   $ZEPHYR_BASE/dts/bindings/serial/nordic,nrf-uarte.yaml
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_PATH "/soc/peripheral@50000000/uart@8000"
+
+/* Node's name with unit-address: */
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_FULL_NAME "uart@8000"
+
+/* Node parent (/soc/peripheral@50000000) identifier: */
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_PARENT DT_N_S_soc_S_peripheral_50000000
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_CHILD_IDX 15
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_CHILD_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_CHILD_NUM_STATUS_OKAY 0
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_FOREACH_CHILD(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_FOREACH_CHILD_SEP(fn, sep) 
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_FOREACH_CHILD_VARGS(fn, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_FOREACH_CHILD_STATUS_OKAY(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 
+
+/* Node's dependency ordinal: */
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_ORD 92
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_ORD_STR_SORTABLE 00092
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_REQUIRES_ORDS \
+	7, /* /soc/interrupt-controller@e000e100 */ \
+	9, /* /soc/peripheral@50000000 */ \
+	40, /* /pin-controller/uart0_default */ \
+	43, /* /pin-controller/uart0_sleep */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_SUPPORTS_ORDS /* nothing */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_EXISTS 1
+#define DT_N_INST_0_nordic_nrf_uarte DT_N_S_soc_S_peripheral_50000000_S_uart_8000
+#define DT_N_NODELABEL_uart0         DT_N_S_soc_S_peripheral_50000000_S_uart_8000
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_REG_NUM 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_REG_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_REG_IDX_0_VAL_ADDRESS 1342210048 /* 0x50008000 */
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_RANGES_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_FOREACH_RANGE(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_IRQ_NUM 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_IRQ_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_IRQ_IDX_0_VAL_irq 8
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_IRQ_IDX_0_VAL_irq_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_IRQ_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_IRQ_IDX_0_VAL_priority 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_IRQ_IDX_0_VAL_priority_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_IRQ_LEVEL 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_COMPAT_MATCHES_nordic_nrf_uarte 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_COMPAT_VENDOR_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_COMPAT_MODEL_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_COMPAT_MODEL_IDX_0 "nrf-uarte"
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_STATUS_okay 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_PINCTRL_NUM 2
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_PINCTRL_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_PINCTRL_IDX_0_TOKEN default
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_PINCTRL_IDX_0_UPPER_TOKEN DEFAULT
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_PINCTRL_NAME_default_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_PINCTRL_NAME_default_IDX 0
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_PINCTRL_NAME_default_IDX_0_PH DT_N_S_pin_controller_S_uart0_default
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_PINCTRL_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_PINCTRL_IDX_1_TOKEN sleep
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_PINCTRL_IDX_1_UPPER_TOKEN SLEEP
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_PINCTRL_NAME_sleep_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_PINCTRL_NAME_sleep_IDX 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_PINCTRL_NAME_sleep_IDX_0_PH DT_N_S_pin_controller_S_uart0_sleep
+
+/* Generic property macros: */
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_wakeup_source 0
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_wakeup_source_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_zephyr_pm_device_runtime_auto 0
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_zephyr_pm_device_runtime_auto_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_status "okay"
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_status_STRING_UNQUOTED okay
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_status_STRING_TOKEN okay
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_status_STRING_UPPER_TOKEN OKAY
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_status_IDX_0 "okay"
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_status_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_status_ENUM_IDX 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_status_ENUM_VAL_okay_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_status_ENUM_TOKEN okay
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_status_ENUM_UPPER_TOKEN OKAY
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_8000, status, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_8000, status, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_8000, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_8000, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_status_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_status_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_compatible {"nordic,nrf-uarte"}
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_compatible_IDX_0 "nordic,nrf-uarte"
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-uarte
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_uarte
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_UARTE
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_compatible_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_8000, compatible, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_8000, compatible, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_8000, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_8000, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_compatible_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_compatible_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_reg {32768 /* 0x8000 */, 4096 /* 0x1000 */}
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_reg_IDX_0 32768
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_reg_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_reg_IDX_1 4096
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_reg_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_reg_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_interrupts {8 /* 0x8 */, 1 /* 0x1 */}
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_interrupts_IDX_0 8
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_interrupts_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_interrupts_IDX_1 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_interrupts_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_interrupts_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_zephyr_deferred_init 0
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_zephyr_deferred_init_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_current_speed 115200
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_current_speed_ENUM_IDX 12
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_current_speed_ENUM_VAL_115200_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_current_speed_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_hw_flow_control 0
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_hw_flow_control_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_pinctrl_0_IDX_0 DT_N_S_pin_controller_S_uart0_default
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_pinctrl_0_IDX_0_PH DT_N_S_pin_controller_S_uart0_default
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_pinctrl_0_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_pinctrl_0_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_8000, pinctrl_0, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_pinctrl_0_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_8000, pinctrl_0, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_pinctrl_0_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_8000, pinctrl_0, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_pinctrl_0_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_8000, pinctrl_0, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_pinctrl_0_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_pinctrl_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_pinctrl_1_IDX_0 DT_N_S_pin_controller_S_uart0_sleep
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_pinctrl_1_IDX_0_PH DT_N_S_pin_controller_S_uart0_sleep
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_pinctrl_1_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_pinctrl_1_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_8000, pinctrl_1, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_pinctrl_1_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_8000, pinctrl_1, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_pinctrl_1_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_8000, pinctrl_1, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_pinctrl_1_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_8000, pinctrl_1, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_pinctrl_1_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_pinctrl_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_pinctrl_names {"default", "sleep"}
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_pinctrl_names_IDX_0 "default"
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_pinctrl_names_IDX_0_STRING_UNQUOTED default
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_pinctrl_names_IDX_0_STRING_TOKEN default
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_pinctrl_names_IDX_0_STRING_UPPER_TOKEN DEFAULT
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_pinctrl_names_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_pinctrl_names_IDX_1 "sleep"
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_pinctrl_names_IDX_1_STRING_UNQUOTED sleep
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_pinctrl_names_IDX_1_STRING_TOKEN sleep
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_pinctrl_names_IDX_1_STRING_UPPER_TOKEN SLEEP
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_pinctrl_names_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_pinctrl_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_8000, pinctrl_names, 0) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_uart_8000, pinctrl_names, 1)
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_pinctrl_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_8000, pinctrl_names, 0) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_uart_8000, pinctrl_names, 1)
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_pinctrl_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_8000, pinctrl_names, 0, __VA_ARGS__) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_uart_8000, pinctrl_names, 1, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_pinctrl_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_8000, pinctrl_names, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_uart_8000, pinctrl_names, 1, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_pinctrl_names_LEN 2
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_pinctrl_names_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_disable_rx 0
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_8000_P_disable_rx_EXISTS 1
+
+/*
+ * Devicetree node: /soc/peripheral@50000000/uart@9000
+ *
+ * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_uart_9000
+ *
+ * Binding (compatible = nordic,nrf-uarte):
+ *   $ZEPHYR_BASE/dts/bindings/serial/nordic,nrf-uarte.yaml
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_PATH "/soc/peripheral@50000000/uart@9000"
+
+/* Node's name with unit-address: */
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_FULL_NAME "uart@9000"
+
+/* Node parent (/soc/peripheral@50000000) identifier: */
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_PARENT DT_N_S_soc_S_peripheral_50000000
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_CHILD_IDX 16
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_CHILD_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_CHILD_NUM_STATUS_OKAY 0
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_FOREACH_CHILD(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_FOREACH_CHILD_SEP(fn, sep) 
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_FOREACH_CHILD_VARGS(fn, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_FOREACH_CHILD_STATUS_OKAY(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 
+
+/* Node's dependency ordinal: */
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_ORD 93
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_ORD_STR_SORTABLE 00093
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_REQUIRES_ORDS \
+	7, /* /soc/interrupt-controller@e000e100 */ \
+	9, /* /soc/peripheral@50000000 */ \
+	45, /* /pin-controller/uart1_default */ \
+	48, /* /pin-controller/uart1_sleep */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_SUPPORTS_ORDS /* nothing */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_EXISTS 1
+#define DT_N_INST_1_nordic_nrf_uarte  DT_N_S_soc_S_peripheral_50000000_S_uart_9000
+#define DT_N_NODELABEL_uart1          DT_N_S_soc_S_peripheral_50000000_S_uart_9000
+#define DT_N_NODELABEL_arduino_serial DT_N_S_soc_S_peripheral_50000000_S_uart_9000
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_REG_NUM 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_REG_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_REG_IDX_0_VAL_ADDRESS 1342214144 /* 0x50009000 */
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_RANGES_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_FOREACH_RANGE(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_IRQ_NUM 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_IRQ_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_IRQ_IDX_0_VAL_irq 9
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_IRQ_IDX_0_VAL_irq_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_IRQ_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_IRQ_IDX_0_VAL_priority 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_IRQ_IDX_0_VAL_priority_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_IRQ_LEVEL 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_COMPAT_MATCHES_nordic_nrf_uarte 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_COMPAT_VENDOR_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_COMPAT_MODEL_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_COMPAT_MODEL_IDX_0 "nrf-uarte"
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_STATUS_okay 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_PINCTRL_NUM 2
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_PINCTRL_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_PINCTRL_IDX_0_TOKEN default
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_PINCTRL_IDX_0_UPPER_TOKEN DEFAULT
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_PINCTRL_NAME_default_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_PINCTRL_NAME_default_IDX 0
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_PINCTRL_NAME_default_IDX_0_PH DT_N_S_pin_controller_S_uart1_default
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_PINCTRL_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_PINCTRL_IDX_1_TOKEN sleep
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_PINCTRL_IDX_1_UPPER_TOKEN SLEEP
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_PINCTRL_NAME_sleep_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_PINCTRL_NAME_sleep_IDX 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_PINCTRL_NAME_sleep_IDX_0_PH DT_N_S_pin_controller_S_uart1_sleep
+
+/* Generic property macros: */
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_wakeup_source 0
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_wakeup_source_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_zephyr_pm_device_runtime_auto 0
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_zephyr_pm_device_runtime_auto_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_status "okay"
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_status_STRING_UNQUOTED okay
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_status_STRING_TOKEN okay
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_status_STRING_UPPER_TOKEN OKAY
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_status_IDX_0 "okay"
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_status_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_status_ENUM_IDX 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_status_ENUM_VAL_okay_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_status_ENUM_TOKEN okay
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_status_ENUM_UPPER_TOKEN OKAY
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_9000, status, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_9000, status, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_9000, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_9000, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_status_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_status_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_compatible {"nordic,nrf-uarte"}
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_compatible_IDX_0 "nordic,nrf-uarte"
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-uarte
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_uarte
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_UARTE
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_compatible_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_9000, compatible, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_9000, compatible, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_9000, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_9000, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_compatible_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_compatible_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_reg {36864 /* 0x9000 */, 4096 /* 0x1000 */}
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_reg_IDX_0 36864
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_reg_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_reg_IDX_1 4096
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_reg_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_reg_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_interrupts {9 /* 0x9 */, 1 /* 0x1 */}
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_interrupts_IDX_0 9
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_interrupts_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_interrupts_IDX_1 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_interrupts_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_interrupts_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_zephyr_deferred_init 0
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_zephyr_deferred_init_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_current_speed 115200
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_current_speed_ENUM_IDX 12
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_current_speed_ENUM_VAL_115200_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_current_speed_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_hw_flow_control 0
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_hw_flow_control_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_pinctrl_0_IDX_0 DT_N_S_pin_controller_S_uart1_default
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_pinctrl_0_IDX_0_PH DT_N_S_pin_controller_S_uart1_default
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_pinctrl_0_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_pinctrl_0_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_9000, pinctrl_0, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_pinctrl_0_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_9000, pinctrl_0, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_pinctrl_0_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_9000, pinctrl_0, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_pinctrl_0_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_9000, pinctrl_0, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_pinctrl_0_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_pinctrl_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_pinctrl_1_IDX_0 DT_N_S_pin_controller_S_uart1_sleep
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_pinctrl_1_IDX_0_PH DT_N_S_pin_controller_S_uart1_sleep
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_pinctrl_1_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_pinctrl_1_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_9000, pinctrl_1, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_pinctrl_1_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_9000, pinctrl_1, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_pinctrl_1_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_9000, pinctrl_1, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_pinctrl_1_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_9000, pinctrl_1, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_pinctrl_1_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_pinctrl_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_pinctrl_names {"default", "sleep"}
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_pinctrl_names_IDX_0 "default"
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_pinctrl_names_IDX_0_STRING_UNQUOTED default
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_pinctrl_names_IDX_0_STRING_TOKEN default
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_pinctrl_names_IDX_0_STRING_UPPER_TOKEN DEFAULT
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_pinctrl_names_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_pinctrl_names_IDX_1 "sleep"
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_pinctrl_names_IDX_1_STRING_UNQUOTED sleep
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_pinctrl_names_IDX_1_STRING_TOKEN sleep
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_pinctrl_names_IDX_1_STRING_UPPER_TOKEN SLEEP
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_pinctrl_names_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_pinctrl_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_9000, pinctrl_names, 0) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_uart_9000, pinctrl_names, 1)
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_pinctrl_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_9000, pinctrl_names, 0) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_uart_9000, pinctrl_names, 1)
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_pinctrl_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_9000, pinctrl_names, 0, __VA_ARGS__) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_uart_9000, pinctrl_names, 1, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_pinctrl_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_9000, pinctrl_names, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_uart_9000, pinctrl_names, 1, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_pinctrl_names_LEN 2
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_pinctrl_names_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_disable_rx 0
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_9000_P_disable_rx_EXISTS 1
+
+/*
+ * Devicetree node: /soc/peripheral@50000000/uart@a000
+ *
+ * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_uart_a000
+ *
+ * Binding (compatible = nordic,nrf-uarte):
+ *   $ZEPHYR_BASE/dts/bindings/serial/nordic,nrf-uarte.yaml
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_PATH "/soc/peripheral@50000000/uart@a000"
+
+/* Node's name with unit-address: */
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_FULL_NAME "uart@a000"
+
+/* Node parent (/soc/peripheral@50000000) identifier: */
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_PARENT DT_N_S_soc_S_peripheral_50000000
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_CHILD_IDX 17
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_CHILD_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_CHILD_NUM_STATUS_OKAY 0
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_FOREACH_CHILD(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_FOREACH_CHILD_SEP(fn, sep) 
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_FOREACH_CHILD_VARGS(fn, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_FOREACH_CHILD_STATUS_OKAY(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 
+
+/* Node's dependency ordinal: */
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_ORD 94
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_ORD_STR_SORTABLE 00094
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_REQUIRES_ORDS \
+	7, /* /soc/interrupt-controller@e000e100 */ \
+	9, /* /soc/peripheral@50000000 */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_SUPPORTS_ORDS /* nothing */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_EXISTS 1
+#define DT_N_INST_2_nordic_nrf_uarte DT_N_S_soc_S_peripheral_50000000_S_uart_a000
+#define DT_N_NODELABEL_uart2         DT_N_S_soc_S_peripheral_50000000_S_uart_a000
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_REG_NUM 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_REG_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_REG_IDX_0_VAL_ADDRESS 1342218240 /* 0x5000a000 */
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_RANGES_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_FOREACH_RANGE(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_IRQ_NUM 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_IRQ_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_IRQ_IDX_0_VAL_irq 10
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_IRQ_IDX_0_VAL_irq_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_IRQ_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_IRQ_IDX_0_VAL_priority 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_IRQ_IDX_0_VAL_priority_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_IRQ_LEVEL 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_COMPAT_MATCHES_nordic_nrf_uarte 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_COMPAT_VENDOR_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_COMPAT_MODEL_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_COMPAT_MODEL_IDX_0 "nrf-uarte"
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_STATUS_disabled 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_PINCTRL_NUM 0
+
+/* Generic property macros: */
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_P_wakeup_source 0
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_P_wakeup_source_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_P_zephyr_pm_device_runtime_auto 0
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_P_zephyr_pm_device_runtime_auto_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_P_status "disabled"
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_P_status_STRING_UNQUOTED disabled
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_P_status_STRING_TOKEN disabled
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_P_status_STRING_UPPER_TOKEN DISABLED
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_P_status_IDX_0 "disabled"
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_P_status_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_P_status_ENUM_IDX 2
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_P_status_ENUM_VAL_disabled_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_P_status_ENUM_TOKEN disabled
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_P_status_ENUM_UPPER_TOKEN DISABLED
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_a000, status, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_a000, status, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_a000, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_a000, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_P_status_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_P_status_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_P_compatible {"nordic,nrf-uarte"}
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_P_compatible_IDX_0 "nordic,nrf-uarte"
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-uarte
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_uarte
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_UARTE
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_P_compatible_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_a000, compatible, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_a000, compatible, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_a000, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_a000, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_P_compatible_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_P_compatible_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_P_reg {40960 /* 0xa000 */, 4096 /* 0x1000 */}
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_P_reg_IDX_0 40960
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_P_reg_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_P_reg_IDX_1 4096
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_P_reg_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_P_reg_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_P_interrupts {10 /* 0xa */, 1 /* 0x1 */}
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_P_interrupts_IDX_0 10
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_P_interrupts_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_P_interrupts_IDX_1 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_P_interrupts_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_P_interrupts_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_P_zephyr_deferred_init 0
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_P_zephyr_deferred_init_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_P_hw_flow_control 0
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_P_hw_flow_control_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_P_disable_rx 0
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_a000_P_disable_rx_EXISTS 1
+
+/*
+ * Devicetree node: /soc/peripheral@50000000/uart@b000
+ *
+ * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_uart_b000
+ *
+ * Binding (compatible = nordic,nrf-uarte):
+ *   $ZEPHYR_BASE/dts/bindings/serial/nordic,nrf-uarte.yaml
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_PATH "/soc/peripheral@50000000/uart@b000"
+
+/* Node's name with unit-address: */
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_FULL_NAME "uart@b000"
+
+/* Node parent (/soc/peripheral@50000000) identifier: */
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_PARENT DT_N_S_soc_S_peripheral_50000000
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_CHILD_IDX 18
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_CHILD_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_CHILD_NUM_STATUS_OKAY 0
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_FOREACH_CHILD(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_FOREACH_CHILD_SEP(fn, sep) 
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_FOREACH_CHILD_VARGS(fn, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_FOREACH_CHILD_STATUS_OKAY(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 
+
+/* Node's dependency ordinal: */
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_ORD 95
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_ORD_STR_SORTABLE 00095
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_REQUIRES_ORDS \
+	7, /* /soc/interrupt-controller@e000e100 */ \
+	9, /* /soc/peripheral@50000000 */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_SUPPORTS_ORDS /* nothing */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_EXISTS 1
+#define DT_N_INST_3_nordic_nrf_uarte DT_N_S_soc_S_peripheral_50000000_S_uart_b000
+#define DT_N_NODELABEL_uart3         DT_N_S_soc_S_peripheral_50000000_S_uart_b000
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_REG_NUM 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_REG_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_REG_IDX_0_VAL_ADDRESS 1342222336 /* 0x5000b000 */
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_RANGES_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_FOREACH_RANGE(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_IRQ_NUM 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_IRQ_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_IRQ_IDX_0_VAL_irq 11
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_IRQ_IDX_0_VAL_irq_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_IRQ_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_IRQ_IDX_0_VAL_priority 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_IRQ_IDX_0_VAL_priority_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_IRQ_LEVEL 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_COMPAT_MATCHES_nordic_nrf_uarte 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_COMPAT_VENDOR_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_COMPAT_MODEL_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_COMPAT_MODEL_IDX_0 "nrf-uarte"
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_STATUS_disabled 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_PINCTRL_NUM 0
+
+/* Generic property macros: */
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_P_wakeup_source 0
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_P_wakeup_source_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_P_zephyr_pm_device_runtime_auto 0
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_P_zephyr_pm_device_runtime_auto_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_P_status "disabled"
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_P_status_STRING_UNQUOTED disabled
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_P_status_STRING_TOKEN disabled
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_P_status_STRING_UPPER_TOKEN DISABLED
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_P_status_IDX_0 "disabled"
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_P_status_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_P_status_ENUM_IDX 2
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_P_status_ENUM_VAL_disabled_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_P_status_ENUM_TOKEN disabled
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_P_status_ENUM_UPPER_TOKEN DISABLED
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_b000, status, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_b000, status, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_b000, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_b000, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_P_status_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_P_status_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_P_compatible {"nordic,nrf-uarte"}
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_P_compatible_IDX_0 "nordic,nrf-uarte"
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-uarte
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_uarte
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_UARTE
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_P_compatible_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_b000, compatible, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_b000, compatible, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_b000, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_b000, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_P_compatible_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_P_compatible_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_P_reg {45056 /* 0xb000 */, 4096 /* 0x1000 */}
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_P_reg_IDX_0 45056
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_P_reg_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_P_reg_IDX_1 4096
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_P_reg_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_P_reg_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_P_interrupts {11 /* 0xb */, 1 /* 0x1 */}
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_P_interrupts_IDX_0 11
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_P_interrupts_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_P_interrupts_IDX_1 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_P_interrupts_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_P_interrupts_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_P_zephyr_deferred_init 0
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_P_zephyr_deferred_init_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_P_hw_flow_control 0
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_P_hw_flow_control_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_P_disable_rx 0
+#define DT_N_S_soc_S_peripheral_50000000_S_uart_b000_P_disable_rx_EXISTS 1
+
+/*
+ * Devicetree node: /soc/peripheral@50000000/vmc@3a000
+ *
+ * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000
+ *
+ * Binding (compatible = nordic,nrf-vmc):
+ *   $ZEPHYR_BASE/dts/bindings/power/nordic,nrf-vmc.yaml
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_PATH "/soc/peripheral@50000000/vmc@3a000"
+
+/* Node's name with unit-address: */
+#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_FULL_NAME "vmc@3a000"
+
+/* Node parent (/soc/peripheral@50000000) identifier: */
+#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_PARENT DT_N_S_soc_S_peripheral_50000000
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_CHILD_IDX 14
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_CHILD_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_CHILD_NUM_STATUS_OKAY 0
+#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_FOREACH_CHILD(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_FOREACH_CHILD_SEP(fn, sep) 
+#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_FOREACH_CHILD_VARGS(fn, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_FOREACH_CHILD_STATUS_OKAY(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
+#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 
+
+/* Node's dependency ordinal: */
+#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_ORD 96
+#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_ORD_STR_SORTABLE 00096
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_REQUIRES_ORDS \
+	9, /* /soc/peripheral@50000000 */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_SUPPORTS_ORDS /* nothing */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_EXISTS 1
+#define DT_N_INST_0_nordic_nrf_vmc DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000
+#define DT_N_NODELABEL_vmc         DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_REG_NUM 1
+#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_REG_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_REG_IDX_0_VAL_ADDRESS 1342414848 /* 0x5003a000 */
+#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
+#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_RANGES_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_FOREACH_RANGE(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_IRQ_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_IRQ_LEVEL 0
+#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_COMPAT_MATCHES_nordic_nrf_vmc 1
+#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_COMPAT_VENDOR_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
+#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_COMPAT_MODEL_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_COMPAT_MODEL_IDX_0 "nrf-vmc"
+#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_STATUS_okay 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_PINCTRL_NUM 0
+
+/* Generic property macros: */
+#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_P_wakeup_source 0
+#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_P_wakeup_source_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_P_zephyr_pm_device_runtime_auto 0
+#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_P_zephyr_pm_device_runtime_auto_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_P_status "okay"
+#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_P_status_STRING_UNQUOTED okay
+#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_P_status_STRING_TOKEN okay
+#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_P_status_STRING_UPPER_TOKEN OKAY
+#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_P_status_IDX_0 "okay"
+#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_P_status_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_P_status_ENUM_IDX 1
+#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_P_status_ENUM_VAL_okay_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_P_status_ENUM_TOKEN okay
+#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_P_status_ENUM_UPPER_TOKEN OKAY
+#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000, status, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000, status, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_P_status_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_P_status_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_P_compatible {"nordic,nrf-vmc"}
+#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_P_compatible_IDX_0 "nordic,nrf-vmc"
+#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-vmc
+#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_vmc
+#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_VMC
+#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_P_compatible_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000, compatible, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000, compatible, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_P_compatible_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_P_compatible_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_P_reg {237568 /* 0x3a000 */, 4096 /* 0x1000 */}
+#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_P_reg_IDX_0 237568
+#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_P_reg_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_P_reg_IDX_1 4096
+#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_P_reg_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_P_reg_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_P_zephyr_deferred_init 0
+#define DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000_P_zephyr_deferred_init_EXISTS 1
+
+/*
+ * Devicetree node: /soc/peripheral@50000000/watchdog@18000
+ *
+ * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000
+ *
+ * Binding (compatible = nordic,nrf-wdt):
+ *   $ZEPHYR_BASE/dts/bindings/watchdog/nordic,nrf-wdt.yaml
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_PATH "/soc/peripheral@50000000/watchdog@18000"
+
+/* Node's name with unit-address: */
+#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_FULL_NAME "watchdog@18000"
+
+/* Node parent (/soc/peripheral@50000000) identifier: */
+#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_PARENT DT_N_S_soc_S_peripheral_50000000
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_CHILD_IDX 36
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_CHILD_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_CHILD_NUM_STATUS_OKAY 0
+#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_FOREACH_CHILD(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_FOREACH_CHILD_SEP(fn, sep) 
+#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_FOREACH_CHILD_VARGS(fn, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_FOREACH_CHILD_STATUS_OKAY(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
+#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 
+
+/* Node's dependency ordinal: */
+#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_ORD 97
+#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_ORD_STR_SORTABLE 00097
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_REQUIRES_ORDS \
+	7, /* /soc/interrupt-controller@e000e100 */ \
+	9, /* /soc/peripheral@50000000 */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_SUPPORTS_ORDS /* nothing */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_EXISTS 1
+#define DT_N_ALIAS_watchdog0       DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000
+#define DT_N_INST_0_nordic_nrf_wdt DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000
+#define DT_N_NODELABEL_wdt         DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000
+#define DT_N_NODELABEL_wdt0        DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_REG_NUM 1
+#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_REG_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_REG_IDX_0_VAL_ADDRESS 1342275584 /* 0x50018000 */
+#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
+#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_RANGES_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_FOREACH_RANGE(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_IRQ_NUM 1
+#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_IRQ_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_IRQ_IDX_0_VAL_irq 24
+#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_IRQ_IDX_0_VAL_irq_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_IRQ_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_IRQ_IDX_0_VAL_priority 1
+#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_IRQ_IDX_0_VAL_priority_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100
+#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_IRQ_LEVEL 1
+#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_COMPAT_MATCHES_nordic_nrf_wdt 1
+#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_COMPAT_VENDOR_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
+#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_COMPAT_MODEL_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_COMPAT_MODEL_IDX_0 "nrf-wdt"
+#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_STATUS_okay 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_PINCTRL_NUM 0
+
+/* Generic property macros: */
+#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_P_wakeup_source 0
+#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_P_wakeup_source_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_P_zephyr_pm_device_runtime_auto 0
+#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_P_zephyr_pm_device_runtime_auto_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_P_status "okay"
+#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_P_status_STRING_UNQUOTED okay
+#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_P_status_STRING_TOKEN okay
+#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_P_status_STRING_UPPER_TOKEN OKAY
+#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_P_status_IDX_0 "okay"
+#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_P_status_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_P_status_ENUM_IDX 1
+#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_P_status_ENUM_VAL_okay_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_P_status_ENUM_TOKEN okay
+#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_P_status_ENUM_UPPER_TOKEN OKAY
+#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000, status, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000, status, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_P_status_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_P_status_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_P_compatible {"nordic,nrf-wdt"}
+#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_P_compatible_IDX_0 "nordic,nrf-wdt"
+#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-wdt
+#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_wdt
+#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_WDT
+#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_P_compatible_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000, compatible, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000, compatible, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_P_compatible_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_P_compatible_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_P_reg {98304 /* 0x18000 */, 4096 /* 0x1000 */}
+#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_P_reg_IDX_0 98304
+#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_P_reg_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_P_reg_IDX_1 4096
+#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_P_reg_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_P_reg_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_P_interrupts {24 /* 0x18 */, 1 /* 0x1 */}
+#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_P_interrupts_IDX_0 24
+#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_P_interrupts_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_P_interrupts_IDX_1 1
+#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_P_interrupts_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_P_interrupts_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_P_zephyr_deferred_init 0
+#define DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000_P_zephyr_deferred_init_EXISTS 1
+
+/*
+ * Devicetree node: /soc/peripheral@50000000/flash-controller@39000
+ *
+ * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000
+ *
+ * Binding (compatible = nordic,nrf91-flash-controller):
+ *   $ZEPHYR_BASE/dts/bindings/flash_controller/nordic,nrf91-flash-controller.yaml
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_PATH "/soc/peripheral@50000000/flash-controller@39000"
+
+/* Node's name with unit-address: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_FULL_NAME "flash-controller@39000"
+
+/* Node parent (/soc/peripheral@50000000) identifier: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_PARENT DT_N_S_soc_S_peripheral_50000000
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_CHILD_IDX 0
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_CHILD_NUM 1
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_CHILD_NUM_STATUS_OKAY 1
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_FOREACH_CHILD(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0)
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0)
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0)
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0)
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0, __VA_ARGS__)
+
+/* Node's dependency ordinal: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_ORD 98
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_ORD_STR_SORTABLE 00098
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_REQUIRES_ORDS \
+	9, /* /soc/peripheral@50000000 */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_SUPPORTS_ORDS \
+	99, /* /soc/peripheral@50000000/flash-controller@39000/flash@0 */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_EXISTS 1
+#define DT_N_INST_0_nordic_nrf91_flash_controller DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000
+#define DT_N_NODELABEL_flash_controller           DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_REG_NUM 1
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_REG_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_REG_IDX_0_VAL_ADDRESS 1342410752 /* 0x50039000 */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_RANGES_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_FOREACH_RANGE(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_IRQ_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_IRQ_LEVEL 0
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_COMPAT_MATCHES_nordic_nrf91_flash_controller 1
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_COMPAT_VENDOR_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_COMPAT_MODEL_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_COMPAT_MODEL_IDX_0 "nrf91-flash-controller"
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_STATUS_okay 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_PINCTRL_NUM 0
+
+/* Generic property macros: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_P_wakeup_source 0
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_P_wakeup_source_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_P_zephyr_pm_device_runtime_auto 0
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_P_zephyr_pm_device_runtime_auto_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_P_compatible {"nordic,nrf91-flash-controller"}
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_P_compatible_IDX_0 "nordic,nrf91-flash-controller"
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf91-flash-controller
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf91_flash_controller
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF91_FLASH_CONTROLLER
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_P_compatible_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000, compatible, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000, compatible, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_P_compatible_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_P_compatible_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_P_reg {233472 /* 0x39000 */, 4096 /* 0x1000 */}
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_P_reg_IDX_0 233472
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_P_reg_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_P_reg_IDX_1 4096
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_P_reg_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_P_reg_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_P_zephyr_deferred_init 0
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_P_zephyr_deferred_init_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_P_partial_erase 1
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_P_partial_erase_EXISTS 1
+
+/*
+ * Devicetree node: /soc/peripheral@50000000/flash-controller@39000/flash@0
+ *
+ * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0
+ *
+ * Binding (compatible = soc-nv-flash):
+ *   $ZEPHYR_BASE/dts/bindings/mtd/soc-nv-flash.yaml
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_PATH "/soc/peripheral@50000000/flash-controller@39000/flash@0"
+
+/* Node's name with unit-address: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_FULL_NAME "flash@0"
+
+/* Node parent (/soc/peripheral@50000000/flash-controller@39000) identifier: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_PARENT DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_CHILD_IDX 0
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_CHILD_NUM 1
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_CHILD_NUM_STATUS_OKAY 1
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_FOREACH_CHILD(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions)
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions)
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions)
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions)
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions, __VA_ARGS__)
+
+/* Node's dependency ordinal: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_ORD 99
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_ORD_STR_SORTABLE 00099
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_REQUIRES_ORDS \
+	98, /* /soc/peripheral@50000000/flash-controller@39000 */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_SUPPORTS_ORDS \
+	100, /* /soc/peripheral@50000000/flash-controller@39000/flash@0/partitions */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_EXISTS 1
+#define DT_N_INST_0_soc_nv_flash DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0
+#define DT_N_NODELABEL_flash0    DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_REG_NUM 1
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_REG_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_REG_IDX_0_VAL_ADDRESS 0 /* 0x0 */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_REG_IDX_0_VAL_SIZE 1048576 /* 0x100000 */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_RANGES_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_FOREACH_RANGE(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_IRQ_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_IRQ_LEVEL 0
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_COMPAT_MATCHES_soc_nv_flash 1
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_STATUS_okay 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_PINCTRL_NUM 0
+
+/* Generic property macros: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_P_wakeup_source 0
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_P_wakeup_source_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_P_zephyr_pm_device_runtime_auto 0
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_P_zephyr_pm_device_runtime_auto_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_P_compatible {"soc-nv-flash"}
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_P_compatible_IDX_0 "soc-nv-flash"
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_P_compatible_IDX_0_STRING_UNQUOTED soc-nv-flash
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_P_compatible_IDX_0_STRING_TOKEN soc_nv_flash
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_P_compatible_IDX_0_STRING_UPPER_TOKEN SOC_NV_FLASH
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_P_compatible_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0, compatible, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0, compatible, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_P_compatible_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_P_compatible_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_P_reg {0 /* 0x0 */, 1048576 /* 0x100000 */}
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_P_reg_IDX_0 0
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_P_reg_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_P_reg_IDX_1 1048576
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_P_reg_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_P_reg_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_P_zephyr_deferred_init 0
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_P_zephyr_deferred_init_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_P_erase_block_size 4096
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_P_erase_block_size_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_P_write_block_size 4
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_P_write_block_size_EXISTS 1
+
+/*
+ * Devicetree node: /soc/peripheral@50000000/flash-controller@39000/flash@0/partitions
+ *
+ * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions
+ *
+ * Binding (compatible = fixed-partitions):
+ *   $ZEPHYR_BASE/dts/bindings/mtd/fixed-partitions.yaml
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_PATH "/soc/peripheral@50000000/flash-controller@39000/flash@0/partitions"
+
+/* Node's name with unit-address: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_FULL_NAME "partitions"
+
+/* Node parent (/soc/peripheral@50000000/flash-controller@39000/flash@0) identifier: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_PARENT DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_CHILD_IDX 0
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_CHILD_NUM 6
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_CHILD_NUM_STATUS_OKAY 6
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_FOREACH_CHILD(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_85000) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c5000) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000)
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_85000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c5000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000)
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_85000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c5000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_85000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c5000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_85000) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c5000) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000)
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_85000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c5000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000)
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_85000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c5000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_85000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c5000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000, __VA_ARGS__)
+
+/* Node's dependency ordinal: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_ORD 100
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_ORD_STR_SORTABLE 00100
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_REQUIRES_ORDS \
+	99, /* /soc/peripheral@50000000/flash-controller@39000/flash@0 */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_SUPPORTS_ORDS \
+	101, /* /soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@0 */ \
+	102, /* /soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@10000 */ \
+	103, /* /soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@50000 */ \
+	104, /* /soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@85000 */ \
+	105, /* /soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@c5000 */ \
+	106, /* /soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@fa000 */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_EXISTS 1
+#define DT_N_INST_0_fixed_partitions DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_REG_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_RANGES_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_FOREACH_RANGE(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_IRQ_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_IRQ_LEVEL 0
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_COMPAT_MATCHES_fixed_partitions 1
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_STATUS_okay 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_PINCTRL_NUM 0
+
+/* (No generic property macros) */
+
+/*
+ * Devicetree node: /soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@0
+ *
+ * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0_PATH "/soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@0"
+
+/* Node's name with unit-address: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0_FULL_NAME "partition@0"
+
+/* Node parent (/soc/peripheral@50000000/flash-controller@39000/flash@0/partitions) identifier: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0_PARENT DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0_CHILD_IDX 0
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0_CHILD_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0_CHILD_NUM_STATUS_OKAY 0
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0_FOREACH_CHILD(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0_FOREACH_CHILD_SEP(fn, sep) 
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0_FOREACH_CHILD_VARGS(fn, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0_FOREACH_CHILD_STATUS_OKAY(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 
+
+/* Node's dependency ordinal: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0_ORD 101
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0_ORD_STR_SORTABLE 00101
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0_REQUIRES_ORDS \
+	100, /* /soc/peripheral@50000000/flash-controller@39000/flash@0/partitions */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0_SUPPORTS_ORDS /* nothing */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0_EXISTS 1
+#define DT_N_NODELABEL_boot_partition DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0_REG_NUM 1
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0_REG_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0_REG_IDX_0_VAL_ADDRESS 0 /* 0x0 */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0_REG_IDX_0_VAL_SIZE 65536 /* 0x10000 */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0_RANGES_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0_FOREACH_RANGE(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0_IRQ_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0_IRQ_LEVEL 0
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0_STATUS_okay 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0_PINCTRL_NUM 0
+
+/* fixed-partitions identifier: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0_PARTITION_ID 0
+
+/* Generic property macros: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0_P_label "mcuboot"
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0_P_label_STRING_UNQUOTED mcuboot
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0_P_label_STRING_TOKEN mcuboot
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0_P_label_STRING_UPPER_TOKEN MCUBOOT
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0_P_label_IDX_0 "mcuboot"
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0_P_label_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0, label, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0_P_label_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0, label, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0_P_label_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0, label, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0_P_label_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0, label, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0_P_label_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0_P_label_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0_P_read_only 0
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0_P_read_only_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0_P_reg {0 /* 0x0 */, 65536 /* 0x10000 */}
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0_P_reg_IDX_0 0
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0_P_reg_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0_P_reg_IDX_1 65536
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0_P_reg_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0_P_reg_EXISTS 1
+
+/*
+ * Devicetree node: /soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@10000
+ *
+ * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000_PATH "/soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@10000"
+
+/* Node's name with unit-address: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000_FULL_NAME "partition@10000"
+
+/* Node parent (/soc/peripheral@50000000/flash-controller@39000/flash@0/partitions) identifier: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000_PARENT DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000_CHILD_IDX 1
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000_CHILD_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000_CHILD_NUM_STATUS_OKAY 0
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000_FOREACH_CHILD(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000_FOREACH_CHILD_SEP(fn, sep) 
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000_FOREACH_CHILD_VARGS(fn, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000_FOREACH_CHILD_STATUS_OKAY(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 
+
+/* Node's dependency ordinal: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000_ORD 102
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000_ORD_STR_SORTABLE 00102
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000_REQUIRES_ORDS \
+	100, /* /soc/peripheral@50000000/flash-controller@39000/flash@0/partitions */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000_SUPPORTS_ORDS /* nothing */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000_EXISTS 1
+#define DT_N_NODELABEL_slot0_partition DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000_REG_NUM 1
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000_REG_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000_REG_IDX_0_VAL_ADDRESS 65536 /* 0x10000 */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000_REG_IDX_0_VAL_SIZE 262144 /* 0x40000 */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000_RANGES_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000_FOREACH_RANGE(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000_IRQ_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000_IRQ_LEVEL 0
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000_STATUS_okay 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000_PINCTRL_NUM 0
+
+/* fixed-partitions identifier: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000_PARTITION_ID 1
+
+/* Generic property macros: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000_P_label "image-0"
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000_P_label_STRING_UNQUOTED image-0
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000_P_label_STRING_TOKEN image_0
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000_P_label_STRING_UPPER_TOKEN IMAGE_0
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000_P_label_IDX_0 "image-0"
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000_P_label_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000, label, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000_P_label_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000, label, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000_P_label_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000, label, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000_P_label_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000, label, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000_P_label_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000_P_label_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000_P_read_only 0
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000_P_read_only_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000_P_reg {65536 /* 0x10000 */, 262144 /* 0x40000 */}
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000_P_reg_IDX_0 65536
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000_P_reg_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000_P_reg_IDX_1 262144
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000_P_reg_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000_P_reg_EXISTS 1
+
+/*
+ * Devicetree node: /soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@50000
+ *
+ * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000_PATH "/soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@50000"
+
+/* Node's name with unit-address: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000_FULL_NAME "partition@50000"
+
+/* Node parent (/soc/peripheral@50000000/flash-controller@39000/flash@0/partitions) identifier: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000_PARENT DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000_CHILD_IDX 2
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000_CHILD_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000_CHILD_NUM_STATUS_OKAY 0
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000_FOREACH_CHILD(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000_FOREACH_CHILD_SEP(fn, sep) 
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000_FOREACH_CHILD_VARGS(fn, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000_FOREACH_CHILD_STATUS_OKAY(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 
+
+/* Node's dependency ordinal: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000_ORD 103
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000_ORD_STR_SORTABLE 00103
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000_REQUIRES_ORDS \
+	100, /* /soc/peripheral@50000000/flash-controller@39000/flash@0/partitions */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000_SUPPORTS_ORDS /* nothing */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000_EXISTS 1
+#define DT_N_NODELABEL_slot0_ns_partition DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000_REG_NUM 1
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000_REG_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000_REG_IDX_0_VAL_ADDRESS 327680 /* 0x50000 */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000_REG_IDX_0_VAL_SIZE 217088 /* 0x35000 */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000_RANGES_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000_FOREACH_RANGE(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000_IRQ_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000_IRQ_LEVEL 0
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000_STATUS_okay 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000_PINCTRL_NUM 0
+
+/* fixed-partitions identifier: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000_PARTITION_ID 2
+
+/* Generic property macros: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000_P_label "image-0-nonsecure"
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000_P_label_STRING_UNQUOTED image-0-nonsecure
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000_P_label_STRING_TOKEN image_0_nonsecure
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000_P_label_STRING_UPPER_TOKEN IMAGE_0_NONSECURE
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000_P_label_IDX_0 "image-0-nonsecure"
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000_P_label_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000, label, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000_P_label_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000, label, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000_P_label_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000, label, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000_P_label_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000, label, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000_P_label_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000_P_label_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000_P_read_only 0
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000_P_read_only_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000_P_reg {327680 /* 0x50000 */, 217088 /* 0x35000 */}
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000_P_reg_IDX_0 327680
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000_P_reg_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000_P_reg_IDX_1 217088
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000_P_reg_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000_P_reg_EXISTS 1
+
+/*
+ * Devicetree node: /soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@85000
+ *
+ * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_85000
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_85000_PATH "/soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@85000"
+
+/* Node's name with unit-address: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_85000_FULL_NAME "partition@85000"
+
+/* Node parent (/soc/peripheral@50000000/flash-controller@39000/flash@0/partitions) identifier: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_85000_PARENT DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_85000_CHILD_IDX 3
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_85000_CHILD_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_85000_CHILD_NUM_STATUS_OKAY 0
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_85000_FOREACH_CHILD(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_85000_FOREACH_CHILD_SEP(fn, sep) 
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_85000_FOREACH_CHILD_VARGS(fn, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_85000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_85000_FOREACH_CHILD_STATUS_OKAY(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_85000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_85000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_85000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 
+
+/* Node's dependency ordinal: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_85000_ORD 104
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_85000_ORD_STR_SORTABLE 00104
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_85000_REQUIRES_ORDS \
+	100, /* /soc/peripheral@50000000/flash-controller@39000/flash@0/partitions */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_85000_SUPPORTS_ORDS /* nothing */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_85000_EXISTS 1
+#define DT_N_NODELABEL_slot1_partition DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_85000
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_85000_REG_NUM 1
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_85000_REG_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_85000_REG_IDX_0_VAL_ADDRESS 544768 /* 0x85000 */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_85000_REG_IDX_0_VAL_SIZE 262144 /* 0x40000 */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_85000_RANGES_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_85000_FOREACH_RANGE(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_85000_IRQ_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_85000_IRQ_LEVEL 0
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_85000_STATUS_okay 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_85000_PINCTRL_NUM 0
+
+/* fixed-partitions identifier: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_85000_PARTITION_ID 3
+
+/* Generic property macros: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_85000_P_label "image-1"
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_85000_P_label_STRING_UNQUOTED image-1
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_85000_P_label_STRING_TOKEN image_1
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_85000_P_label_STRING_UPPER_TOKEN IMAGE_1
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_85000_P_label_IDX_0 "image-1"
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_85000_P_label_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_85000_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_85000, label, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_85000_P_label_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_85000, label, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_85000_P_label_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_85000, label, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_85000_P_label_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_85000, label, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_85000_P_label_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_85000_P_label_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_85000_P_read_only 0
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_85000_P_read_only_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_85000_P_reg {544768 /* 0x85000 */, 262144 /* 0x40000 */}
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_85000_P_reg_IDX_0 544768
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_85000_P_reg_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_85000_P_reg_IDX_1 262144
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_85000_P_reg_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_85000_P_reg_EXISTS 1
+
+/*
+ * Devicetree node: /soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@c5000
+ *
+ * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c5000
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c5000_PATH "/soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@c5000"
+
+/* Node's name with unit-address: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c5000_FULL_NAME "partition@c5000"
+
+/* Node parent (/soc/peripheral@50000000/flash-controller@39000/flash@0/partitions) identifier: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c5000_PARENT DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c5000_CHILD_IDX 4
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c5000_CHILD_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c5000_CHILD_NUM_STATUS_OKAY 0
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c5000_FOREACH_CHILD(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c5000_FOREACH_CHILD_SEP(fn, sep) 
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c5000_FOREACH_CHILD_VARGS(fn, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c5000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c5000_FOREACH_CHILD_STATUS_OKAY(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c5000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c5000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c5000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 
+
+/* Node's dependency ordinal: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c5000_ORD 105
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c5000_ORD_STR_SORTABLE 00105
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c5000_REQUIRES_ORDS \
+	100, /* /soc/peripheral@50000000/flash-controller@39000/flash@0/partitions */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c5000_SUPPORTS_ORDS /* nothing */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c5000_EXISTS 1
+#define DT_N_NODELABEL_slot1_ns_partition DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c5000
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c5000_REG_NUM 1
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c5000_REG_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c5000_REG_IDX_0_VAL_ADDRESS 806912 /* 0xc5000 */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c5000_REG_IDX_0_VAL_SIZE 217088 /* 0x35000 */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c5000_RANGES_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c5000_FOREACH_RANGE(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c5000_IRQ_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c5000_IRQ_LEVEL 0
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c5000_STATUS_okay 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c5000_PINCTRL_NUM 0
+
+/* fixed-partitions identifier: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c5000_PARTITION_ID 4
+
+/* Generic property macros: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c5000_P_label "image-1-nonsecure"
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c5000_P_label_STRING_UNQUOTED image-1-nonsecure
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c5000_P_label_STRING_TOKEN image_1_nonsecure
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c5000_P_label_STRING_UPPER_TOKEN IMAGE_1_NONSECURE
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c5000_P_label_IDX_0 "image-1-nonsecure"
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c5000_P_label_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c5000_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c5000, label, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c5000_P_label_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c5000, label, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c5000_P_label_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c5000, label, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c5000_P_label_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c5000, label, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c5000_P_label_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c5000_P_label_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c5000_P_read_only 0
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c5000_P_read_only_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c5000_P_reg {806912 /* 0xc5000 */, 217088 /* 0x35000 */}
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c5000_P_reg_IDX_0 806912
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c5000_P_reg_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c5000_P_reg_IDX_1 217088
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c5000_P_reg_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c5000_P_reg_EXISTS 1
+
+/*
+ * Devicetree node: /soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@fa000
+ *
+ * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000_PATH "/soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@fa000"
+
+/* Node's name with unit-address: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000_FULL_NAME "partition@fa000"
+
+/* Node parent (/soc/peripheral@50000000/flash-controller@39000/flash@0/partitions) identifier: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000_PARENT DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000_CHILD_IDX 5
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000_CHILD_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000_CHILD_NUM_STATUS_OKAY 0
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000_FOREACH_CHILD(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000_FOREACH_CHILD_SEP(fn, sep) 
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000_FOREACH_CHILD_VARGS(fn, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000_FOREACH_CHILD_STATUS_OKAY(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 
+
+/* Node's dependency ordinal: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000_ORD 106
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000_ORD_STR_SORTABLE 00106
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000_REQUIRES_ORDS \
+	100, /* /soc/peripheral@50000000/flash-controller@39000/flash@0/partitions */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000_SUPPORTS_ORDS /* nothing */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000_EXISTS 1
+#define DT_N_NODELABEL_storage_partition DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000_REG_NUM 1
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000_REG_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000_REG_IDX_0_VAL_ADDRESS 1024000 /* 0xfa000 */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000_REG_IDX_0_VAL_SIZE 24576 /* 0x6000 */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000_RANGES_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000_FOREACH_RANGE(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000_IRQ_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000_IRQ_LEVEL 0
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000_STATUS_okay 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000_PINCTRL_NUM 0
+
+/* fixed-partitions identifier: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000_PARTITION_ID 5
+
+/* Generic property macros: */
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000_P_label "storage"
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000_P_label_STRING_UNQUOTED storage
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000_P_label_STRING_TOKEN storage
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000_P_label_STRING_UPPER_TOKEN STORAGE
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000_P_label_IDX_0 "storage"
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000_P_label_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000, label, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000_P_label_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000, label, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000_P_label_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000, label, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000_P_label_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000, label, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000_P_label_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000_P_label_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000_P_read_only 0
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000_P_read_only_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000_P_reg {1024000 /* 0xfa000 */, 24576 /* 0x6000 */}
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000_P_reg_IDX_0 1024000
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000_P_reg_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000_P_reg_IDX_1 24576
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000_P_reg_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000_P_reg_EXISTS 1
+
+/*
+ * Devicetree node: /soc/peripheral@50000000/i2c@a000
+ *
+ * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_i2c_a000
+ *
+ * Binding (compatible = nordic,nrf-twim):
+ *   $ZEPHYR_BASE/dts/bindings/i2c/nordic,nrf-twim.yaml
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_PATH "/soc/peripheral@50000000/i2c@a000"
+
+/* Node's name with unit-address: */
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_FULL_NAME "i2c@a000"
+
+/* Node parent (/soc/peripheral@50000000) identifier: */
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_PARENT DT_N_S_soc_S_peripheral_50000000
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_CHILD_IDX 21
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_CHILD_NUM 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_CHILD_NUM_STATUS_OKAY 0
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_FOREACH_CHILD(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21)
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21)
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_FOREACH_CHILD_STATUS_OKAY(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 
+
+/* Node's dependency ordinal: */
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_ORD 107
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_ORD_STR_SORTABLE 00107
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_REQUIRES_ORDS \
+	7, /* /soc/interrupt-controller@e000e100 */ \
+	9, /* /soc/peripheral@50000000 */ \
+	28, /* /pin-controller/i2c2_default */ \
+	30, /* /pin-controller/i2c2_sleep */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_SUPPORTS_ORDS \
+	108, /* /soc/peripheral@50000000/i2c@a000/pcal6408a@21 */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_EXISTS 1
+#define DT_N_INST_0_nordic_nrf_twim DT_N_S_soc_S_peripheral_50000000_S_i2c_a000
+#define DT_N_NODELABEL_i2c2         DT_N_S_soc_S_peripheral_50000000_S_i2c_a000
+#define DT_N_NODELABEL_arduino_i2c  DT_N_S_soc_S_peripheral_50000000_S_i2c_a000
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_REG_NUM 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_REG_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_REG_IDX_0_VAL_ADDRESS 1342218240 /* 0x5000a000 */
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_RANGES_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_FOREACH_RANGE(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_IRQ_NUM 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_IRQ_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_IRQ_IDX_0_VAL_irq 10
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_IRQ_IDX_0_VAL_irq_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_IRQ_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_IRQ_IDX_0_VAL_priority 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_IRQ_IDX_0_VAL_priority_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_IRQ_LEVEL 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_COMPAT_MATCHES_nordic_nrf_twim 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_COMPAT_VENDOR_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_COMPAT_MODEL_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_COMPAT_MODEL_IDX_0 "nrf-twim"
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_STATUS_okay 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_PINCTRL_NUM 2
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_PINCTRL_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_PINCTRL_IDX_0_TOKEN default
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_PINCTRL_IDX_0_UPPER_TOKEN DEFAULT
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_PINCTRL_NAME_default_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_PINCTRL_NAME_default_IDX 0
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_PINCTRL_NAME_default_IDX_0_PH DT_N_S_pin_controller_S_i2c2_default
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_PINCTRL_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_PINCTRL_IDX_1_TOKEN sleep
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_PINCTRL_IDX_1_UPPER_TOKEN SLEEP
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_PINCTRL_NAME_sleep_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_PINCTRL_NAME_sleep_IDX 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_PINCTRL_NAME_sleep_IDX_0_PH DT_N_S_pin_controller_S_i2c2_sleep
+
+/* Generic property macros: */
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_wakeup_source 0
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_wakeup_source_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_zephyr_pm_device_runtime_auto 0
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_zephyr_pm_device_runtime_auto_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_status "okay"
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_status_STRING_UNQUOTED okay
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_status_STRING_TOKEN okay
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_status_STRING_UPPER_TOKEN OKAY
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_status_IDX_0 "okay"
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_status_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_status_ENUM_IDX 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_status_ENUM_VAL_okay_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_status_ENUM_TOKEN okay
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_status_ENUM_UPPER_TOKEN OKAY
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000, status, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000, status, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_status_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_status_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_compatible {"nordic,nrf-twim"}
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_compatible_IDX_0 "nordic,nrf-twim"
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-twim
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_twim
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_TWIM
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_compatible_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000, compatible, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000, compatible, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_compatible_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_compatible_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_reg {40960 /* 0xa000 */, 4096 /* 0x1000 */}
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_reg_IDX_0 40960
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_reg_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_reg_IDX_1 4096
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_reg_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_reg_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_interrupts {10 /* 0xa */, 1 /* 0x1 */}
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_interrupts_IDX_0 10
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_interrupts_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_interrupts_IDX_1 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_interrupts_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_interrupts_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_zephyr_deferred_init 0
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_zephyr_deferred_init_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_clock_frequency 400000
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_clock_frequency_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_sq_size 4
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_sq_size_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_cq_size 4
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_cq_size_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_pinctrl_0_IDX_0 DT_N_S_pin_controller_S_i2c2_default
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_pinctrl_0_IDX_0_PH DT_N_S_pin_controller_S_i2c2_default
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_pinctrl_0_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_pinctrl_0_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000, pinctrl_0, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_pinctrl_0_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000, pinctrl_0, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_pinctrl_0_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000, pinctrl_0, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_pinctrl_0_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000, pinctrl_0, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_pinctrl_0_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_pinctrl_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_pinctrl_1_IDX_0 DT_N_S_pin_controller_S_i2c2_sleep
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_pinctrl_1_IDX_0_PH DT_N_S_pin_controller_S_i2c2_sleep
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_pinctrl_1_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_pinctrl_1_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000, pinctrl_1, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_pinctrl_1_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000, pinctrl_1, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_pinctrl_1_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000, pinctrl_1, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_pinctrl_1_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000, pinctrl_1, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_pinctrl_1_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_pinctrl_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_pinctrl_names {"default", "sleep"}
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_pinctrl_names_IDX_0 "default"
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_pinctrl_names_IDX_0_STRING_UNQUOTED default
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_pinctrl_names_IDX_0_STRING_TOKEN default
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_pinctrl_names_IDX_0_STRING_UPPER_TOKEN DEFAULT
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_pinctrl_names_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_pinctrl_names_IDX_1 "sleep"
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_pinctrl_names_IDX_1_STRING_UNQUOTED sleep
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_pinctrl_names_IDX_1_STRING_TOKEN sleep
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_pinctrl_names_IDX_1_STRING_UPPER_TOKEN SLEEP
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_pinctrl_names_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_pinctrl_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000, pinctrl_names, 0) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000, pinctrl_names, 1)
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_pinctrl_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000, pinctrl_names, 0) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000, pinctrl_names, 1)
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_pinctrl_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000, pinctrl_names, 0, __VA_ARGS__) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000, pinctrl_names, 1, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_pinctrl_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000, pinctrl_names, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000, pinctrl_names, 1, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_pinctrl_names_LEN 2
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_pinctrl_names_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_easydma_maxcnt_bits 13
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_easydma_maxcnt_bits_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_zephyr_concat_buf_size 16
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_zephyr_concat_buf_size_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_zephyr_flash_buf_max_size 16
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_P_zephyr_flash_buf_max_size_EXISTS 1
+
+/*
+ * Devicetree node: /soc/peripheral@50000000/i2c@a000/pcal6408a@21
+ *
+ * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21
+ *
+ * Binding (compatible = nxp,pcal6408a):
+ *   $ZEPHYR_BASE/dts/bindings/gpio/nxp,pcal6408a.yaml
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21_PATH "/soc/peripheral@50000000/i2c@a000/pcal6408a@21"
+
+/* Node's name with unit-address: */
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21_FULL_NAME "pcal6408a@21"
+
+/* Node parent (/soc/peripheral@50000000/i2c@a000) identifier: */
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21_PARENT DT_N_S_soc_S_peripheral_50000000_S_i2c_a000
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21_CHILD_IDX 0
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21_CHILD_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21_CHILD_NUM_STATUS_OKAY 0
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21_FOREACH_CHILD(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21_FOREACH_CHILD_SEP(fn, sep) 
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21_FOREACH_CHILD_VARGS(fn, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21_FOREACH_CHILD_STATUS_OKAY(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 
+
+/* Node's dependency ordinal: */
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21_ORD 108
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21_ORD_STR_SORTABLE 00108
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21_REQUIRES_ORDS \
+	10, /* /soc/peripheral@50000000/gpio@842500 */ \
+	107, /* /soc/peripheral@50000000/i2c@a000 */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21_SUPPORTS_ORDS /* nothing */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21_EXISTS 1
+#define DT_N_INST_0_nxp_pcal6408a DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21
+#define DT_N_NODELABEL_pcal6408a  DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21
+
+/* Bus info (controller: '/soc/peripheral@50000000/i2c@a000', type: '['i2c']') */
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21_BUS_i2c 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21_BUS DT_N_S_soc_S_peripheral_50000000_S_i2c_a000
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21_REG_NUM 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21_REG_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21_REG_IDX_0_VAL_ADDRESS 33 /* 0x21 */
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21_RANGES_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21_FOREACH_RANGE(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21_IRQ_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21_IRQ_LEVEL 0
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21_COMPAT_MATCHES_nxp_pcal6408a 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21_COMPAT_VENDOR_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21_COMPAT_VENDOR_IDX_0 "NXP Semiconductors"
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21_COMPAT_MODEL_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21_COMPAT_MODEL_IDX_0 "pcal6408a"
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21_STATUS_disabled 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21_PINCTRL_NUM 0
+
+/* Generic property macros: */
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21_P_wakeup_source 0
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21_P_wakeup_source_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21_P_zephyr_pm_device_runtime_auto 0
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21_P_zephyr_pm_device_runtime_auto_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21_P_status "disabled"
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21_P_status_STRING_UNQUOTED disabled
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21_P_status_STRING_TOKEN disabled
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21_P_status_STRING_UPPER_TOKEN DISABLED
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21_P_status_IDX_0 "disabled"
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21_P_status_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21_P_status_ENUM_IDX 2
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21_P_status_ENUM_VAL_disabled_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21_P_status_ENUM_TOKEN disabled
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21_P_status_ENUM_UPPER_TOKEN DISABLED
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21, status, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21, status, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21_P_status_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21_P_status_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21_P_compatible {"nxp,pcal6408a"}
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21_P_compatible_IDX_0 "nxp,pcal6408a"
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21_P_compatible_IDX_0_STRING_UNQUOTED nxp,pcal6408a
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21_P_compatible_IDX_0_STRING_TOKEN nxp_pcal6408a
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21_P_compatible_IDX_0_STRING_UPPER_TOKEN NXP_PCAL6408A
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21_P_compatible_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21, compatible, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21, compatible, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21_P_compatible_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21_P_compatible_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21_P_reg {33 /* 0x21 */}
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21_P_reg_IDX_0 33
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21_P_reg_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21_P_reg_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21_P_zephyr_deferred_init 0
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21_P_zephyr_deferred_init_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21_P_gpio_controller 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21_P_gpio_controller_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21_P_ngpios 8
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21_P_ngpios_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21_P_int_gpios_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21_P_int_gpios_IDX_0_PH DT_N_S_soc_S_peripheral_50000000_S_gpio_842500
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21_P_int_gpios_IDX_0_VAL_pin 19
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21_P_int_gpios_IDX_0_VAL_pin_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21_P_int_gpios_IDX_0_VAL_flags 17
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21_P_int_gpios_IDX_0_VAL_flags_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21_P_int_gpios_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21, int_gpios, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21_P_int_gpios_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21, int_gpios, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21_P_int_gpios_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21, int_gpios, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21_P_int_gpios_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21, int_gpios, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21_P_int_gpios_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21_P_int_gpios_EXISTS 1
+
+/*
+ * Devicetree node: /soc/peripheral@50000000/power@5000
+ *
+ * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_power_5000
+ *
+ * Binding (compatible = nordic,nrf-power):
+ *   $ZEPHYR_BASE/dts/bindings/power/nordic,nrf-power.yaml
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_PATH "/soc/peripheral@50000000/power@5000"
+
+/* Node's name with unit-address: */
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_FULL_NAME "power@5000"
+
+/* Node parent (/soc/peripheral@50000000) identifier: */
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_PARENT DT_N_S_soc_S_peripheral_50000000
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_CHILD_IDX 35
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_CHILD_NUM 2
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_CHILD_NUM_STATUS_OKAY 2
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_FOREACH_CHILD(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520)
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520)
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520)
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520)
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520, __VA_ARGS__)
+
+/* Node's dependency ordinal: */
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_ORD 109
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_ORD_STR_SORTABLE 00109
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_REQUIRES_ORDS \
+	7, /* /soc/interrupt-controller@e000e100 */ \
+	9, /* /soc/peripheral@50000000 */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_SUPPORTS_ORDS \
+	110, /* /soc/peripheral@50000000/power@5000/gpregret1@51c */ \
+	111, /* /soc/peripheral@50000000/power@5000/gpregret2@520 */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_EXISTS 1
+#define DT_N_INST_0_nordic_nrf_power DT_N_S_soc_S_peripheral_50000000_S_power_5000
+#define DT_N_NODELABEL_power         DT_N_S_soc_S_peripheral_50000000_S_power_5000
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_REG_NUM 1
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_REG_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_REG_IDX_0_VAL_ADDRESS 1342197760 /* 0x50005000 */
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_RANGES_NUM 1
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_RANGES_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_RANGES_IDX_0_VAL_CHILD_BUS_ADDRESS 0 /* 0x0 */
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_RANGES_IDX_0_VAL_PARENT_BUS_ADDRESS 20480 /* 0x5000 */
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_RANGES_IDX_0_VAL_LENGTH 4096 /* 0x1000 */
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_FOREACH_RANGE(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_IRQ_NUM 1
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_IRQ_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_IRQ_IDX_0_VAL_irq 5
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_IRQ_IDX_0_VAL_irq_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_IRQ_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_IRQ_IDX_0_VAL_priority 1
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_IRQ_IDX_0_VAL_priority_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_IRQ_LEVEL 1
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_COMPAT_MATCHES_nordic_nrf_power 1
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_COMPAT_VENDOR_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_COMPAT_MODEL_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_COMPAT_MODEL_IDX_0 "nrf-power"
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_STATUS_okay 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_PINCTRL_NUM 0
+
+/* Generic property macros: */
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_P_wakeup_source 0
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_P_wakeup_source_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_P_zephyr_pm_device_runtime_auto 0
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_P_zephyr_pm_device_runtime_auto_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_P_status "okay"
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_P_status_STRING_UNQUOTED okay
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_P_status_STRING_TOKEN okay
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_P_status_STRING_UPPER_TOKEN OKAY
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_P_status_IDX_0 "okay"
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_P_status_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_P_status_ENUM_IDX 1
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_P_status_ENUM_VAL_okay_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_P_status_ENUM_TOKEN okay
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_P_status_ENUM_UPPER_TOKEN OKAY
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000, status, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000, status, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_P_status_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_P_status_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_P_compatible {"nordic,nrf-power"}
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_P_compatible_IDX_0 "nordic,nrf-power"
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-power
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_power
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_POWER
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_P_compatible_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000, compatible, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000, compatible, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_P_compatible_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_P_compatible_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_P_reg {20480 /* 0x5000 */, 4096 /* 0x1000 */}
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_P_reg_IDX_0 20480
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_P_reg_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_P_reg_IDX_1 4096
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_P_reg_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_P_reg_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_P_interrupts {5 /* 0x5 */, 1 /* 0x1 */}
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_P_interrupts_IDX_0 5
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_P_interrupts_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_P_interrupts_IDX_1 1
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_P_interrupts_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_P_interrupts_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_P_zephyr_deferred_init 0
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_P_zephyr_deferred_init_EXISTS 1
+
+/*
+ * Devicetree node: /soc/peripheral@50000000/power@5000/gpregret1@51c
+ *
+ * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c
+ *
+ * Binding (compatible = nordic,nrf-gpregret):
+ *   $ZEPHYR_BASE/dts/bindings/retained_mem/nordic,nrf-gpreget.yaml
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_PATH "/soc/peripheral@50000000/power@5000/gpregret1@51c"
+
+/* Node's name with unit-address: */
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_FULL_NAME "gpregret1@51c"
+
+/* Node parent (/soc/peripheral@50000000/power@5000) identifier: */
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_PARENT DT_N_S_soc_S_peripheral_50000000_S_power_5000
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_CHILD_IDX 0
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_CHILD_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_CHILD_NUM_STATUS_OKAY 0
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_FOREACH_CHILD(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_FOREACH_CHILD_SEP(fn, sep) 
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_FOREACH_CHILD_VARGS(fn, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_FOREACH_CHILD_STATUS_OKAY(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 
+
+/* Node's dependency ordinal: */
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_ORD 110
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_ORD_STR_SORTABLE 00110
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_REQUIRES_ORDS \
+	109, /* /soc/peripheral@50000000/power@5000 */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_SUPPORTS_ORDS /* nothing */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_EXISTS 1
+#define DT_N_INST_0_nordic_nrf_gpregret DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c
+#define DT_N_NODELABEL_gpregret1        DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_REG_NUM 1
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_REG_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_REG_IDX_0_VAL_ADDRESS 1342199068 /* 0x5000551c */
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_REG_IDX_0_VAL_SIZE 1 /* 0x1 */
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_RANGES_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_FOREACH_RANGE(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_IRQ_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_IRQ_LEVEL 0
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_COMPAT_MATCHES_nordic_nrf_gpregret 1
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_COMPAT_VENDOR_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_COMPAT_MODEL_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_COMPAT_MODEL_IDX_0 "nrf-gpregret"
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_STATUS_okay 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_PINCTRL_NUM 0
+
+/* Generic property macros: */
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_P_wakeup_source 0
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_P_wakeup_source_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_P_zephyr_pm_device_runtime_auto 0
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_P_zephyr_pm_device_runtime_auto_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_P_status "okay"
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_P_status_STRING_UNQUOTED okay
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_P_status_STRING_TOKEN okay
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_P_status_STRING_UPPER_TOKEN OKAY
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_P_status_IDX_0 "okay"
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_P_status_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_P_status_ENUM_IDX 1
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_P_status_ENUM_VAL_okay_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_P_status_ENUM_TOKEN okay
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_P_status_ENUM_UPPER_TOKEN OKAY
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c, status, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c, status, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_P_status_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_P_status_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_P_compatible {"nordic,nrf-gpregret"}
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_P_compatible_IDX_0 "nordic,nrf-gpregret"
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-gpregret
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_gpregret
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_GPREGRET
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_P_compatible_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c, compatible, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c, compatible, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_P_compatible_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_P_compatible_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_P_reg {1308 /* 0x51c */, 1 /* 0x1 */}
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_P_reg_IDX_0 1308
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_P_reg_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_P_reg_IDX_1 1
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_P_reg_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_P_reg_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_P_zephyr_deferred_init 0
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c_P_zephyr_deferred_init_EXISTS 1
+
+/*
+ * Devicetree node: /soc/peripheral@50000000/power@5000/gpregret2@520
+ *
+ * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520
+ *
+ * Binding (compatible = nordic,nrf-gpregret):
+ *   $ZEPHYR_BASE/dts/bindings/retained_mem/nordic,nrf-gpreget.yaml
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_PATH "/soc/peripheral@50000000/power@5000/gpregret2@520"
+
+/* Node's name with unit-address: */
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_FULL_NAME "gpregret2@520"
+
+/* Node parent (/soc/peripheral@50000000/power@5000) identifier: */
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_PARENT DT_N_S_soc_S_peripheral_50000000_S_power_5000
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_CHILD_IDX 1
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_CHILD_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_CHILD_NUM_STATUS_OKAY 0
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_FOREACH_CHILD(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_FOREACH_CHILD_SEP(fn, sep) 
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_FOREACH_CHILD_VARGS(fn, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_FOREACH_CHILD_STATUS_OKAY(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 
+
+/* Node's dependency ordinal: */
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_ORD 111
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_ORD_STR_SORTABLE 00111
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_REQUIRES_ORDS \
+	109, /* /soc/peripheral@50000000/power@5000 */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_SUPPORTS_ORDS /* nothing */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_EXISTS 1
+#define DT_N_INST_1_nordic_nrf_gpregret DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520
+#define DT_N_NODELABEL_gpregret2        DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_REG_NUM 1
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_REG_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_REG_IDX_0_VAL_ADDRESS 1342199072 /* 0x50005520 */
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_REG_IDX_0_VAL_SIZE 1 /* 0x1 */
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_RANGES_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_FOREACH_RANGE(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_IRQ_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_IRQ_LEVEL 0
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_COMPAT_MATCHES_nordic_nrf_gpregret 1
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_COMPAT_VENDOR_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_COMPAT_MODEL_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_COMPAT_MODEL_IDX_0 "nrf-gpregret"
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_STATUS_okay 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_PINCTRL_NUM 0
+
+/* Generic property macros: */
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_P_wakeup_source 0
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_P_wakeup_source_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_P_zephyr_pm_device_runtime_auto 0
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_P_zephyr_pm_device_runtime_auto_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_P_status "okay"
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_P_status_STRING_UNQUOTED okay
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_P_status_STRING_TOKEN okay
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_P_status_STRING_UPPER_TOKEN OKAY
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_P_status_IDX_0 "okay"
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_P_status_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_P_status_ENUM_IDX 1
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_P_status_ENUM_VAL_okay_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_P_status_ENUM_TOKEN okay
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_P_status_ENUM_UPPER_TOKEN OKAY
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520, status, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520, status, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_P_status_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_P_status_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_P_compatible {"nordic,nrf-gpregret"}
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_P_compatible_IDX_0 "nordic,nrf-gpregret"
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-gpregret
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_gpregret
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_GPREGRET
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_P_compatible_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520, compatible, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520, compatible, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_P_compatible_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_P_compatible_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_P_reg {1312 /* 0x520 */, 1 /* 0x1 */}
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_P_reg_IDX_0 1312
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_P_reg_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_P_reg_IDX_1 1
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_P_reg_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_P_reg_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_P_zephyr_deferred_init 0
+#define DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520_P_zephyr_deferred_init_EXISTS 1
+
+/*
+ * Devicetree node: /soc/peripheral@50000000/spi@b000
+ *
+ * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_spi_b000
+ *
+ * Binding (compatible = nordic,nrf-spim):
+ *   $ZEPHYR_BASE/dts/bindings/spi/nordic,nrf-spim.yaml
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_PATH "/soc/peripheral@50000000/spi@b000"
+
+/* Node's name with unit-address: */
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_FULL_NAME "spi@b000"
+
+/* Node parent (/soc/peripheral@50000000) identifier: */
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_PARENT DT_N_S_soc_S_peripheral_50000000
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_CHILD_IDX 26
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_CHILD_NUM 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_CHILD_NUM_STATUS_OKAY 0
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_FOREACH_CHILD(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1)
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1)
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_FOREACH_CHILD_STATUS_OKAY(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 
+
+/* Node's dependency ordinal: */
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_ORD 112
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_ORD_STR_SORTABLE 00112
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_REQUIRES_ORDS \
+	7, /* /soc/interrupt-controller@e000e100 */ \
+	9, /* /soc/peripheral@50000000 */ \
+	10, /* /soc/peripheral@50000000/gpio@842500 */ \
+	36, /* /pin-controller/spi3_default */ \
+	38, /* /pin-controller/spi3_sleep */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_SUPPORTS_ORDS \
+	113, /* /soc/peripheral@50000000/spi@b000/gd25wb256e3ir@1 */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_EXISTS 1
+#define DT_N_INST_0_nordic_nrf_spim DT_N_S_soc_S_peripheral_50000000_S_spi_b000
+#define DT_N_NODELABEL_spi3         DT_N_S_soc_S_peripheral_50000000_S_spi_b000
+#define DT_N_NODELABEL_arduino_spi  DT_N_S_soc_S_peripheral_50000000_S_spi_b000
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_REG_NUM 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_REG_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_REG_IDX_0_VAL_ADDRESS 1342222336 /* 0x5000b000 */
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_RANGES_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_FOREACH_RANGE(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_IRQ_NUM 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_IRQ_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_IRQ_IDX_0_VAL_irq 11
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_IRQ_IDX_0_VAL_irq_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_IRQ_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_IRQ_IDX_0_VAL_priority 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_IRQ_IDX_0_VAL_priority_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_IRQ_LEVEL 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_COMPAT_MATCHES_nordic_nrf_spim 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_COMPAT_VENDOR_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_COMPAT_MODEL_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_COMPAT_MODEL_IDX_0 "nrf-spim"
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_STATUS_okay 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_PINCTRL_NUM 2
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_PINCTRL_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_PINCTRL_IDX_0_TOKEN default
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_PINCTRL_IDX_0_UPPER_TOKEN DEFAULT
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_PINCTRL_NAME_default_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_PINCTRL_NAME_default_IDX 0
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_PINCTRL_NAME_default_IDX_0_PH DT_N_S_pin_controller_S_spi3_default
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_PINCTRL_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_PINCTRL_IDX_1_TOKEN sleep
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_PINCTRL_IDX_1_UPPER_TOKEN SLEEP
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_PINCTRL_NAME_sleep_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_PINCTRL_NAME_sleep_IDX 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_PINCTRL_NAME_sleep_IDX_0_PH DT_N_S_pin_controller_S_spi3_sleep
+
+/* Generic property macros: */
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_wakeup_source 0
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_wakeup_source_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_zephyr_pm_device_runtime_auto 0
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_zephyr_pm_device_runtime_auto_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_status "okay"
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_status_STRING_UNQUOTED okay
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_status_STRING_TOKEN okay
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_status_STRING_UPPER_TOKEN OKAY
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_status_IDX_0 "okay"
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_status_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_status_ENUM_IDX 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_status_ENUM_VAL_okay_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_status_ENUM_TOKEN okay
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_status_ENUM_UPPER_TOKEN OKAY
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000, status, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000, status, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_status_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_status_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_compatible {"nordic,nrf-spim"}
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_compatible_IDX_0 "nordic,nrf-spim"
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-spim
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_spim
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_SPIM
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_compatible_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000, compatible, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000, compatible, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_compatible_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_compatible_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_reg {45056 /* 0xb000 */, 4096 /* 0x1000 */}
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_reg_IDX_0 45056
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_reg_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_reg_IDX_1 4096
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_reg_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_reg_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_interrupts {11 /* 0xb */, 1 /* 0x1 */}
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_interrupts_IDX_0 11
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_interrupts_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_interrupts_IDX_1 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_interrupts_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_interrupts_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_zephyr_deferred_init 0
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_zephyr_deferred_init_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_cs_gpios_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_cs_gpios_IDX_0_PH DT_N_S_soc_S_peripheral_50000000_S_gpio_842500
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_cs_gpios_IDX_0_VAL_pin 10
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_cs_gpios_IDX_0_VAL_pin_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_cs_gpios_IDX_0_VAL_flags 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_cs_gpios_IDX_0_VAL_flags_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_cs_gpios_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_cs_gpios_IDX_1_PH DT_N_S_soc_S_peripheral_50000000_S_gpio_842500
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_cs_gpios_IDX_1_VAL_pin 20
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_cs_gpios_IDX_1_VAL_pin_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_cs_gpios_IDX_1_VAL_flags 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_cs_gpios_IDX_1_VAL_flags_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_cs_gpios_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000, cs_gpios, 0) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000, cs_gpios, 1)
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_cs_gpios_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000, cs_gpios, 0) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000, cs_gpios, 1)
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_cs_gpios_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000, cs_gpios, 0, __VA_ARGS__) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000, cs_gpios, 1, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_cs_gpios_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000, cs_gpios, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000, cs_gpios, 1, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_cs_gpios_LEN 2
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_cs_gpios_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_pinctrl_0_IDX_0 DT_N_S_pin_controller_S_spi3_default
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_pinctrl_0_IDX_0_PH DT_N_S_pin_controller_S_spi3_default
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_pinctrl_0_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_pinctrl_0_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000, pinctrl_0, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_pinctrl_0_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000, pinctrl_0, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_pinctrl_0_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000, pinctrl_0, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_pinctrl_0_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000, pinctrl_0, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_pinctrl_0_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_pinctrl_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_pinctrl_1_IDX_0 DT_N_S_pin_controller_S_spi3_sleep
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_pinctrl_1_IDX_0_PH DT_N_S_pin_controller_S_spi3_sleep
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_pinctrl_1_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_pinctrl_1_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000, pinctrl_1, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_pinctrl_1_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000, pinctrl_1, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_pinctrl_1_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000, pinctrl_1, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_pinctrl_1_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000, pinctrl_1, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_pinctrl_1_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_pinctrl_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_pinctrl_names {"default", "sleep"}
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_pinctrl_names_IDX_0 "default"
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_pinctrl_names_IDX_0_STRING_UNQUOTED default
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_pinctrl_names_IDX_0_STRING_TOKEN default
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_pinctrl_names_IDX_0_STRING_UPPER_TOKEN DEFAULT
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_pinctrl_names_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_pinctrl_names_IDX_1 "sleep"
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_pinctrl_names_IDX_1_STRING_UNQUOTED sleep
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_pinctrl_names_IDX_1_STRING_TOKEN sleep
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_pinctrl_names_IDX_1_STRING_UPPER_TOKEN SLEEP
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_pinctrl_names_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_pinctrl_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000, pinctrl_names, 0) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000, pinctrl_names, 1)
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_pinctrl_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000, pinctrl_names, 0) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000, pinctrl_names, 1)
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_pinctrl_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000, pinctrl_names, 0, __VA_ARGS__) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000, pinctrl_names, 1, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_pinctrl_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000, pinctrl_names, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000, pinctrl_names, 1, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_pinctrl_names_LEN 2
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_pinctrl_names_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_max_frequency 8000000
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_max_frequency_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_overrun_character 255
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_overrun_character_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_easydma_maxcnt_bits 13
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_easydma_maxcnt_bits_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_anomaly_58_workaround 0
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_anomaly_58_workaround_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_rx_delay_supported 0
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_P_rx_delay_supported_EXISTS 1
+
+/*
+ * Devicetree node: /soc/peripheral@50000000/spi@b000/gd25wb256e3ir@1
+ *
+ * Node identifier: DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1
+ *
+ * Binding (compatible = jedec,spi-nor):
+ *   $ZEPHYR_BASE/dts/bindings/mtd/jedec,spi-nor.yaml
+ *
+ * (Descriptions have moved to the Devicetree Bindings Index
+ * in the documentation.)
+ */
+
+/* Node's full path: */
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_PATH "/soc/peripheral@50000000/spi@b000/gd25wb256e3ir@1"
+
+/* Node's name with unit-address: */
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_FULL_NAME "gd25wb256e3ir@1"
+
+/* Node parent (/soc/peripheral@50000000/spi@b000) identifier: */
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_PARENT DT_N_S_soc_S_peripheral_50000000_S_spi_b000
+
+/* Node's index in its parent's list of children: */
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_CHILD_IDX 0
+
+/* Helper macros for child nodes of this node. */
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_CHILD_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_CHILD_NUM_STATUS_OKAY 0
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_FOREACH_CHILD(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_FOREACH_CHILD_SEP(fn, sep) 
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_FOREACH_CHILD_VARGS(fn, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_FOREACH_CHILD_STATUS_OKAY(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 
+
+/* Node's dependency ordinal: */
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_ORD 113
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_ORD_STR_SORTABLE 00113
+
+/* Ordinals for what this node depends on directly: */
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_REQUIRES_ORDS \
+	112, /* /soc/peripheral@50000000/spi@b000 */
+
+/* Ordinals for what depends directly on this node: */
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_SUPPORTS_ORDS /* nothing */
+
+/* Existence and alternate IDs: */
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_EXISTS 1
+#define DT_N_ALIAS_spi_flash0     DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1
+#define DT_N_INST_0_jedec_spi_nor DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1
+#define DT_N_NODELABEL_gd25wb256  DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1
+
+/* Bus info (controller: '/soc/peripheral@50000000/spi@b000', type: '['spi']') */
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_BUS_spi 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_BUS DT_N_S_soc_S_peripheral_50000000_S_spi_b000
+
+/* Macros for properties that are special in the specification: */
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_REG_NUM 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_REG_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_REG_IDX_0_VAL_ADDRESS 1 /* 0x1 */
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_RANGES_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_FOREACH_RANGE(fn) 
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_IRQ_NUM 0
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_IRQ_LEVEL 0
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_COMPAT_MATCHES_jedec_spi_nor 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_COMPAT_VENDOR_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_COMPAT_VENDOR_IDX_0 "JEDEC Solid State Technology Association"
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_COMPAT_MODEL_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_COMPAT_MODEL_IDX_0 "spi-nor"
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_STATUS_disabled 1
+
+/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_PINCTRL_NUM 0
+
+/* Generic property macros: */
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_wakeup_source 0
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_wakeup_source_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_zephyr_pm_device_runtime_auto 0
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_zephyr_pm_device_runtime_auto_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_status "disabled"
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_status_STRING_UNQUOTED disabled
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_status_STRING_TOKEN disabled
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_status_STRING_UPPER_TOKEN DISABLED
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_status_IDX_0 "disabled"
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_status_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_status_ENUM_IDX 2
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_status_ENUM_VAL_disabled_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_status_ENUM_TOKEN disabled
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_status_ENUM_UPPER_TOKEN DISABLED
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, status, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, status, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, status, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_status_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_status_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_compatible {"jedec,spi-nor"}
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_compatible_IDX_0 "jedec,spi-nor"
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_compatible_IDX_0_STRING_UNQUOTED jedec,spi-nor
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_compatible_IDX_0_STRING_TOKEN jedec_spi_nor
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_compatible_IDX_0_STRING_UPPER_TOKEN JEDEC_SPI_NOR
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_compatible_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, compatible, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, compatible, 0)
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, compatible, 0, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_compatible_LEN 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_compatible_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_reg {1 /* 0x1 */}
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_reg_IDX_0 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_reg_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_reg_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_zephyr_deferred_init 0
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_zephyr_deferred_init_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_spi_max_frequency 8000000
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_spi_max_frequency_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_duplex 0
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_duplex_ENUM_IDX 0
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_duplex_ENUM_VAL_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_duplex_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_frame_format 0
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_frame_format_ENUM_IDX 0
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_frame_format_ENUM_VAL_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_frame_format_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_spi_cpol 0
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_spi_cpol_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_spi_cpha 0
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_spi_cpha_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_spi_hold_cs 0
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_spi_hold_cs_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_jedec_id {200 /* 0xc8 */, 101 /* 0x65 */, 25 /* 0x19 */}
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_jedec_id_IDX_0 200
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_jedec_id_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_jedec_id_IDX_1 101
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_jedec_id_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_jedec_id_IDX_2 25
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_jedec_id_IDX_2_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_jedec_id_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, jedec_id, 0) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, jedec_id, 1) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, jedec_id, 2)
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_jedec_id_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, jedec_id, 0) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, jedec_id, 1) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, jedec_id, 2)
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_jedec_id_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, jedec_id, 0, __VA_ARGS__) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, jedec_id, 1, __VA_ARGS__) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, jedec_id, 2, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_jedec_id_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, jedec_id, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, jedec_id, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, jedec_id, 2, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_jedec_id_LEN 3
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_jedec_id_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_size 268435456
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_size_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp {229 /* 0xe5 */, 32 /* 0x20 */, 243 /* 0xf3 */, 255 /* 0xff */, 255 /* 0xff */, 255 /* 0xff */, 255 /* 0xff */, 15 /* 0xf */, 68 /* 0x44 */, 235 /* 0xeb */, 8 /* 0x8 */, 107 /* 0x6b */, 8 /* 0x8 */, 59 /* 0x3b */, 66 /* 0x42 */, 187 /* 0xbb */, 238 /* 0xee */, 255 /* 0xff */, 255 /* 0xff */, 255 /* 0xff */, 255 /* 0xff */, 255 /* 0xff */, 0 /* 0x0 */, 255 /* 0xff */, 255 /* 0xff */, 255 /* 0xff */, 0 /* 0x0 */, 255 /* 0xff */, 12 /* 0xc */, 32 /* 0x20 */, 15 /* 0xf */, 82 /* 0x52 */, 16 /* 0x10 */, 216 /* 0xd8 */, 0 /* 0x0 */, 255 /* 0xff */, 68 /* 0x44 */, 122 /* 0x7a */, 201 /* 0xc9 */, 254 /* 0xfe */, 131 /* 0x83 */, 103 /* 0x67 */, 38 /* 0x26 */, 98 /* 0x62 */, 236 /* 0xec */, 130 /* 0x82 */, 24 /* 0x18 */, 68 /* 0x44 */, 122 /* 0x7a */, 117 /* 0x75 */, 122 /* 0x7a */, 117 /* 0x75 */, 4 /* 0x4 */, 196 /* 0xc4 */, 213 /* 0xd5 */, 92 /* 0x5c */, 0 /* 0x0 */, 6 /* 0x6 */, 116 /* 0x74 */, 0 /* 0x0 */, 8 /* 0x8 */, 80 /* 0x50 */, 0 /* 0x0 */, 1 /* 0x1 */}
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_0 229
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_0_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_1 32
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_1_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_2 243
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_2_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_3 255
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_3_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_4 255
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_4_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_5 255
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_5_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_6 255
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_6_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_7 15
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_7_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_8 68
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_8_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_9 235
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_9_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_10 8
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_10_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_11 107
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_11_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_12 8
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_12_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_13 59
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_13_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_14 66
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_14_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_15 187
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_15_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_16 238
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_16_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_17 255
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_17_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_18 255
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_18_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_19 255
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_19_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_20 255
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_20_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_21 255
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_21_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_22 0
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_22_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_23 255
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_23_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_24 255
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_24_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_25 255
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_25_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_26 0
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_26_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_27 255
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_27_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_28 12
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_28_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_29 32
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_29_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_30 15
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_30_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_31 82
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_31_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_32 16
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_32_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_33 216
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_33_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_34 0
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_34_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_35 255
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_35_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_36 68
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_36_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_37 122
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_37_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_38 201
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_38_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_39 254
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_39_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_40 131
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_40_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_41 103
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_41_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_42 38
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_42_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_43 98
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_43_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_44 236
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_44_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_45 130
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_45_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_46 24
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_46_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_47 68
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_47_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_48 122
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_48_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_49 117
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_49_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_50 122
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_50_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_51 117
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_51_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_52 4
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_52_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_53 196
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_53_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_54 213
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_54_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_55 92
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_55_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_56 0
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_56_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_57 6
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_57_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_58 116
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_58_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_59 0
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_59_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_60 8
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_60_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_61 80
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_61_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_62 0
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_62_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_63 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_IDX_63_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 0) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 1) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 2) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 3) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 4) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 5) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 6) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 7) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 8) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 9) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 10) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 11) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 12) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 13) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 14) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 15) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 16) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 17) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 18) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 19) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 20) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 21) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 22) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 23) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 24) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 25) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 26) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 27) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 28) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 29) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 30) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 31) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 32) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 33) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 34) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 35) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 36) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 37) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 38) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 39) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 40) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 41) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 42) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 43) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 44) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 45) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 46) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 47) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 48) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 49) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 50) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 51) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 52) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 53) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 54) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 55) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 56) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 57) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 58) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 59) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 60) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 61) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 62) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 63)
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 0) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 1) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 2) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 3) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 4) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 5) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 6) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 7) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 8) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 9) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 10) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 11) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 12) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 13) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 14) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 15) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 16) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 17) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 18) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 19) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 20) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 21) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 22) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 23) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 24) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 25) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 26) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 27) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 28) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 29) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 30) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 31) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 32) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 33) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 34) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 35) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 36) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 37) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 38) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 39) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 40) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 41) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 42) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 43) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 44) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 45) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 46) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 47) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 48) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 49) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 50) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 51) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 52) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 53) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 54) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 55) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 56) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 57) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 58) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 59) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 60) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 61) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 62) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 63)
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 0, __VA_ARGS__) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 1, __VA_ARGS__) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 2, __VA_ARGS__) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 3, __VA_ARGS__) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 4, __VA_ARGS__) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 5, __VA_ARGS__) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 6, __VA_ARGS__) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 7, __VA_ARGS__) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 8, __VA_ARGS__) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 9, __VA_ARGS__) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 10, __VA_ARGS__) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 11, __VA_ARGS__) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 12, __VA_ARGS__) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 13, __VA_ARGS__) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 14, __VA_ARGS__) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 15, __VA_ARGS__) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 16, __VA_ARGS__) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 17, __VA_ARGS__) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 18, __VA_ARGS__) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 19, __VA_ARGS__) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 20, __VA_ARGS__) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 21, __VA_ARGS__) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 22, __VA_ARGS__) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 23, __VA_ARGS__) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 24, __VA_ARGS__) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 25, __VA_ARGS__) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 26, __VA_ARGS__) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 27, __VA_ARGS__) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 28, __VA_ARGS__) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 29, __VA_ARGS__) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 30, __VA_ARGS__) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 31, __VA_ARGS__) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 32, __VA_ARGS__) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 33, __VA_ARGS__) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 34, __VA_ARGS__) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 35, __VA_ARGS__) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 36, __VA_ARGS__) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 37, __VA_ARGS__) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 38, __VA_ARGS__) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 39, __VA_ARGS__) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 40, __VA_ARGS__) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 41, __VA_ARGS__) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 42, __VA_ARGS__) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 43, __VA_ARGS__) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 44, __VA_ARGS__) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 45, __VA_ARGS__) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 46, __VA_ARGS__) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 47, __VA_ARGS__) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 48, __VA_ARGS__) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 49, __VA_ARGS__) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 50, __VA_ARGS__) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 51, __VA_ARGS__) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 52, __VA_ARGS__) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 53, __VA_ARGS__) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 54, __VA_ARGS__) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 55, __VA_ARGS__) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 56, __VA_ARGS__) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 57, __VA_ARGS__) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 58, __VA_ARGS__) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 59, __VA_ARGS__) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 60, __VA_ARGS__) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 61, __VA_ARGS__) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 62, __VA_ARGS__) \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 63, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 3, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 4, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 5, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 6, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 7, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 8, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 9, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 10, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 11, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 12, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 13, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 14, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 15, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 16, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 17, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 18, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 19, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 20, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 21, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 22, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 23, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 24, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 25, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 26, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 27, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 28, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 29, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 30, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 31, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 32, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 33, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 34, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 35, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 36, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 37, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 38, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 39, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 40, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 41, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 42, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 43, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 44, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 45, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 46, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 47, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 48, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 49, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 50, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 51, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 52, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 53, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 54, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 55, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 56, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 57, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 58, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 59, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 60, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 61, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 62, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
+	fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, sfdp_bfp, 63, __VA_ARGS__)
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_LEN 64
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_sfdp_bfp_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_requires_ulbpr 0
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_requires_ulbpr_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_has_dpd 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_has_dpd_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_t_enter_dpd 3000
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_t_enter_dpd_EXISTS 1
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_t_exit_dpd 40000
+#define DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1_P_t_exit_dpd_EXISTS 1
+
+/*
+ * Chosen nodes
+ */
+#define DT_CHOSEN_zephyr_entropy                          DT_N_S_soc_S_crypto_50840000
+#define DT_CHOSEN_zephyr_entropy_EXISTS                   1
+#define DT_CHOSEN_zephyr_flash_controller                 DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000
+#define DT_CHOSEN_zephyr_flash_controller_EXISTS          1
+#define DT_CHOSEN_zephyr_console                          DT_N_S_soc_S_peripheral_50000000_S_uart_8000
+#define DT_CHOSEN_zephyr_console_EXISTS                   1
+#define DT_CHOSEN_zephyr_shell_uart                       DT_N_S_soc_S_peripheral_50000000_S_uart_8000
+#define DT_CHOSEN_zephyr_shell_uart_EXISTS                1
+#define DT_CHOSEN_zephyr_uart_mcumgr                      DT_N_S_soc_S_peripheral_50000000_S_uart_8000
+#define DT_CHOSEN_zephyr_uart_mcumgr_EXISTS               1
+#define DT_CHOSEN_zephyr_sram                             DT_N_S_reserved_memory_S_image_s_20000000
+#define DT_CHOSEN_zephyr_sram_EXISTS                      1
+#define DT_CHOSEN_zephyr_flash                            DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0
+#define DT_CHOSEN_zephyr_flash_EXISTS                     1
+#define DT_CHOSEN_zephyr_code_partition                   DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0
+#define DT_CHOSEN_zephyr_code_partition_EXISTS            1
+#define DT_CHOSEN_zephyr_sram_secure_partition            DT_N_S_reserved_memory_S_image_s_20000000
+#define DT_CHOSEN_zephyr_sram_secure_partition_EXISTS     1
+#define DT_CHOSEN_zephyr_sram_non_secure_partition        DT_N_S_reserved_memory_S_image_ns_20020000
+#define DT_CHOSEN_zephyr_sram_non_secure_partition_EXISTS 1
+
+/* Macros for iterating over all nodes and enabled nodes */
+#define DT_FOREACH_HELPER(fn) fn(DT_N) fn(DT_N_S_chosen) fn(DT_N_S_aliases) fn(DT_N_S_soc) fn(DT_N_S_soc_S_interrupt_controller_e000e100) fn(DT_N_S_soc_S_timer_e000e010) fn(DT_N_S_soc_S_memory_20000000) fn(DT_N_S_soc_S_peripheral_50000000) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_85000) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c5000) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000) fn(DT_N_S_soc_S_peripheral_50000000_S_adc_e000) fn(DT_N_S_soc_S_peripheral_50000000_S_dppic_17000) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1b000) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1c000) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1d000) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1e000) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1f000) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_20000) fn(DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000) fn(DT_N_S_soc_S_peripheral_50000000_S_i2s_28000) fn(DT_N_S_soc_S_peripheral_50000000_S_kmu_39000) fn(DT_N_S_soc_S_peripheral_50000000_S_pdm_26000) fn(DT_N_S_soc_S_peripheral_50000000_S_regulator_4000) fn(DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_8000) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_9000) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_a000) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_b000) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_8000) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_9000) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_b000) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_8000) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_9000) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_a000) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_21000) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_22000) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_23000) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_24000) fn(DT_N_S_soc_S_peripheral_50000000_S_gpio_842500) fn(DT_N_S_soc_S_peripheral_50000000_S_rtc_14000) fn(DT_N_S_soc_S_peripheral_50000000_S_rtc_15000) fn(DT_N_S_soc_S_peripheral_50000000_S_clock_5000) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520) fn(DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000) fn(DT_N_S_soc_S_peripheral_50000000_S_timer_f000) fn(DT_N_S_soc_S_peripheral_50000000_S_timer_10000) fn(DT_N_S_soc_S_peripheral_50000000_S_timer_11000) fn(DT_N_S_soc_S_crypto_50840000) fn(DT_N_S_soc_S_ctrlap_50006000) fn(DT_N_S_soc_S_gpiote_5000d000) fn(DT_N_S_soc_S_gpiote_40031000) fn(DT_N_S_soc_S_spu_50003000) fn(DT_N_S_soc_S_ficr_ff0000) fn(DT_N_S_soc_S_uicr_ff8000) fn(DT_N_S_pin_controller) fn(DT_N_S_pin_controller_S_uart0_default) fn(DT_N_S_pin_controller_S_uart0_default_S_group1) fn(DT_N_S_pin_controller_S_uart0_default_S_group2) fn(DT_N_S_pin_controller_S_uart0_sleep) fn(DT_N_S_pin_controller_S_uart0_sleep_S_group1) fn(DT_N_S_pin_controller_S_uart1_default) fn(DT_N_S_pin_controller_S_uart1_default_S_group1) fn(DT_N_S_pin_controller_S_uart1_default_S_group2) fn(DT_N_S_pin_controller_S_uart1_sleep) fn(DT_N_S_pin_controller_S_uart1_sleep_S_group1) fn(DT_N_S_pin_controller_S_i2c2_default) fn(DT_N_S_pin_controller_S_i2c2_default_S_group1) fn(DT_N_S_pin_controller_S_i2c2_sleep) fn(DT_N_S_pin_controller_S_i2c2_sleep_S_group1) fn(DT_N_S_pin_controller_S_pwm0_default) fn(DT_N_S_pin_controller_S_pwm0_default_S_group1) fn(DT_N_S_pin_controller_S_pwm0_sleep) fn(DT_N_S_pin_controller_S_pwm0_sleep_S_group1) fn(DT_N_S_pin_controller_S_spi3_default) fn(DT_N_S_pin_controller_S_spi3_default_S_group1) fn(DT_N_S_pin_controller_S_spi3_sleep) fn(DT_N_S_pin_controller_S_spi3_sleep_S_group1) fn(DT_N_S_entropy_bt_hci) fn(DT_N_S_sw_pwm) fn(DT_N_S_cpus) fn(DT_N_S_cpus_S_cpu_0) fn(DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90) fn(DT_N_S_leds) fn(DT_N_S_leds_S_led_0) fn(DT_N_S_leds_S_led_1) fn(DT_N_S_leds_S_led_2) fn(DT_N_S_leds_S_led_3) fn(DT_N_S_pwmleds) fn(DT_N_S_pwmleds_S_pwm_led_0) fn(DT_N_S_buttons) fn(DT_N_S_buttons_S_button_0) fn(DT_N_S_buttons_S_button_1) fn(DT_N_S_buttons_S_button_2) fn(DT_N_S_buttons_S_button_3) fn(DT_N_S_gpio_reset) fn(DT_N_S_connector) fn(DT_N_S_analog_connector) fn(DT_N_S_reserved_memory) fn(DT_N_S_reserved_memory_S_image_s_20000000) fn(DT_N_S_reserved_memory_S_image_modem_20016000) fn(DT_N_S_reserved_memory_S_image_ns_20020000)
+#define DT_FOREACH_OKAY_HELPER(fn) fn(DT_N) fn(DT_N_S_chosen) fn(DT_N_S_aliases) fn(DT_N_S_soc) fn(DT_N_S_soc_S_interrupt_controller_e000e100) fn(DT_N_S_soc_S_memory_20000000) fn(DT_N_S_soc_S_peripheral_50000000) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_85000) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c5000) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000) fn(DT_N_S_soc_S_peripheral_50000000_S_adc_e000) fn(DT_N_S_soc_S_peripheral_50000000_S_dppic_17000) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1b000) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1c000) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1d000) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1e000) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1f000) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_20000) fn(DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000) fn(DT_N_S_soc_S_peripheral_50000000_S_kmu_39000) fn(DT_N_S_soc_S_peripheral_50000000_S_regulator_4000) fn(DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_8000) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_9000) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_21000) fn(DT_N_S_soc_S_peripheral_50000000_S_gpio_842500) fn(DT_N_S_soc_S_peripheral_50000000_S_clock_5000) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520) fn(DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000) fn(DT_N_S_soc_S_crypto_50840000) fn(DT_N_S_soc_S_ctrlap_50006000) fn(DT_N_S_soc_S_gpiote_5000d000) fn(DT_N_S_soc_S_spu_50003000) fn(DT_N_S_soc_S_ficr_ff0000) fn(DT_N_S_soc_S_uicr_ff8000) fn(DT_N_S_pin_controller) fn(DT_N_S_pin_controller_S_uart0_default) fn(DT_N_S_pin_controller_S_uart0_default_S_group1) fn(DT_N_S_pin_controller_S_uart0_default_S_group2) fn(DT_N_S_pin_controller_S_uart0_sleep) fn(DT_N_S_pin_controller_S_uart0_sleep_S_group1) fn(DT_N_S_pin_controller_S_uart1_default) fn(DT_N_S_pin_controller_S_uart1_default_S_group1) fn(DT_N_S_pin_controller_S_uart1_default_S_group2) fn(DT_N_S_pin_controller_S_uart1_sleep) fn(DT_N_S_pin_controller_S_uart1_sleep_S_group1) fn(DT_N_S_pin_controller_S_i2c2_default) fn(DT_N_S_pin_controller_S_i2c2_default_S_group1) fn(DT_N_S_pin_controller_S_i2c2_sleep) fn(DT_N_S_pin_controller_S_i2c2_sleep_S_group1) fn(DT_N_S_pin_controller_S_pwm0_default) fn(DT_N_S_pin_controller_S_pwm0_default_S_group1) fn(DT_N_S_pin_controller_S_pwm0_sleep) fn(DT_N_S_pin_controller_S_pwm0_sleep_S_group1) fn(DT_N_S_pin_controller_S_spi3_default) fn(DT_N_S_pin_controller_S_spi3_default_S_group1) fn(DT_N_S_pin_controller_S_spi3_sleep) fn(DT_N_S_pin_controller_S_spi3_sleep_S_group1) fn(DT_N_S_entropy_bt_hci) fn(DT_N_S_cpus) fn(DT_N_S_cpus_S_cpu_0) fn(DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90) fn(DT_N_S_leds) fn(DT_N_S_leds_S_led_0) fn(DT_N_S_leds_S_led_1) fn(DT_N_S_leds_S_led_2) fn(DT_N_S_leds_S_led_3) fn(DT_N_S_pwmleds) fn(DT_N_S_pwmleds_S_pwm_led_0) fn(DT_N_S_buttons) fn(DT_N_S_buttons_S_button_0) fn(DT_N_S_buttons_S_button_1) fn(DT_N_S_buttons_S_button_2) fn(DT_N_S_buttons_S_button_3) fn(DT_N_S_connector) fn(DT_N_S_analog_connector) fn(DT_N_S_reserved_memory) fn(DT_N_S_reserved_memory_S_image_s_20000000) fn(DT_N_S_reserved_memory_S_image_modem_20016000) fn(DT_N_S_reserved_memory_S_image_ns_20020000)
+#define DT_FOREACH_VARGS_HELPER(fn, ...) fn(DT_N, __VA_ARGS__) fn(DT_N_S_chosen, __VA_ARGS__) fn(DT_N_S_aliases, __VA_ARGS__) fn(DT_N_S_soc, __VA_ARGS__) fn(DT_N_S_soc_S_interrupt_controller_e000e100, __VA_ARGS__) fn(DT_N_S_soc_S_timer_e000e010, __VA_ARGS__) fn(DT_N_S_soc_S_memory_20000000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_85000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c5000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_adc_e000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_dppic_17000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1b000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1c000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1d000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1e000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1f000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_20000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_i2s_28000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_kmu_39000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_pdm_26000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_regulator_4000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_8000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_9000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_a000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_b000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_8000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_9000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000_S_pcal6408a_21, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_b000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_8000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_9000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_a000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000_S_gd25wb256e3ir_1, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_21000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_22000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_23000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_24000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_gpio_842500, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_rtc_14000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_rtc_15000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_clock_5000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_timer_f000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_timer_10000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_timer_11000, __VA_ARGS__) fn(DT_N_S_soc_S_crypto_50840000, __VA_ARGS__) fn(DT_N_S_soc_S_ctrlap_50006000, __VA_ARGS__) fn(DT_N_S_soc_S_gpiote_5000d000, __VA_ARGS__) fn(DT_N_S_soc_S_gpiote_40031000, __VA_ARGS__) fn(DT_N_S_soc_S_spu_50003000, __VA_ARGS__) fn(DT_N_S_soc_S_ficr_ff0000, __VA_ARGS__) fn(DT_N_S_soc_S_uicr_ff8000, __VA_ARGS__) fn(DT_N_S_pin_controller, __VA_ARGS__) fn(DT_N_S_pin_controller_S_uart0_default, __VA_ARGS__) fn(DT_N_S_pin_controller_S_uart0_default_S_group1, __VA_ARGS__) fn(DT_N_S_pin_controller_S_uart0_default_S_group2, __VA_ARGS__) fn(DT_N_S_pin_controller_S_uart0_sleep, __VA_ARGS__) fn(DT_N_S_pin_controller_S_uart0_sleep_S_group1, __VA_ARGS__) fn(DT_N_S_pin_controller_S_uart1_default, __VA_ARGS__) fn(DT_N_S_pin_controller_S_uart1_default_S_group1, __VA_ARGS__) fn(DT_N_S_pin_controller_S_uart1_default_S_group2, __VA_ARGS__) fn(DT_N_S_pin_controller_S_uart1_sleep, __VA_ARGS__) fn(DT_N_S_pin_controller_S_uart1_sleep_S_group1, __VA_ARGS__) fn(DT_N_S_pin_controller_S_i2c2_default, __VA_ARGS__) fn(DT_N_S_pin_controller_S_i2c2_default_S_group1, __VA_ARGS__) fn(DT_N_S_pin_controller_S_i2c2_sleep, __VA_ARGS__) fn(DT_N_S_pin_controller_S_i2c2_sleep_S_group1, __VA_ARGS__) fn(DT_N_S_pin_controller_S_pwm0_default, __VA_ARGS__) fn(DT_N_S_pin_controller_S_pwm0_default_S_group1, __VA_ARGS__) fn(DT_N_S_pin_controller_S_pwm0_sleep, __VA_ARGS__) fn(DT_N_S_pin_controller_S_pwm0_sleep_S_group1, __VA_ARGS__) fn(DT_N_S_pin_controller_S_spi3_default, __VA_ARGS__) fn(DT_N_S_pin_controller_S_spi3_default_S_group1, __VA_ARGS__) fn(DT_N_S_pin_controller_S_spi3_sleep, __VA_ARGS__) fn(DT_N_S_pin_controller_S_spi3_sleep_S_group1, __VA_ARGS__) fn(DT_N_S_entropy_bt_hci, __VA_ARGS__) fn(DT_N_S_sw_pwm, __VA_ARGS__) fn(DT_N_S_cpus, __VA_ARGS__) fn(DT_N_S_cpus_S_cpu_0, __VA_ARGS__) fn(DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90, __VA_ARGS__) fn(DT_N_S_leds, __VA_ARGS__) fn(DT_N_S_leds_S_led_0, __VA_ARGS__) fn(DT_N_S_leds_S_led_1, __VA_ARGS__) fn(DT_N_S_leds_S_led_2, __VA_ARGS__) fn(DT_N_S_leds_S_led_3, __VA_ARGS__) fn(DT_N_S_pwmleds, __VA_ARGS__) fn(DT_N_S_pwmleds_S_pwm_led_0, __VA_ARGS__) fn(DT_N_S_buttons, __VA_ARGS__) fn(DT_N_S_buttons_S_button_0, __VA_ARGS__) fn(DT_N_S_buttons_S_button_1, __VA_ARGS__) fn(DT_N_S_buttons_S_button_2, __VA_ARGS__) fn(DT_N_S_buttons_S_button_3, __VA_ARGS__) fn(DT_N_S_gpio_reset, __VA_ARGS__) fn(DT_N_S_connector, __VA_ARGS__) fn(DT_N_S_analog_connector, __VA_ARGS__) fn(DT_N_S_reserved_memory, __VA_ARGS__) fn(DT_N_S_reserved_memory_S_image_s_20000000, __VA_ARGS__) fn(DT_N_S_reserved_memory_S_image_modem_20016000, __VA_ARGS__) fn(DT_N_S_reserved_memory_S_image_ns_20020000, __VA_ARGS__)
+#define DT_FOREACH_OKAY_VARGS_HELPER(fn, ...) fn(DT_N, __VA_ARGS__) fn(DT_N_S_chosen, __VA_ARGS__) fn(DT_N_S_aliases, __VA_ARGS__) fn(DT_N_S_soc, __VA_ARGS__) fn(DT_N_S_soc_S_interrupt_controller_e000e100, __VA_ARGS__) fn(DT_N_S_soc_S_memory_20000000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_85000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c5000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_adc_e000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_dppic_17000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1b000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1c000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1d000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1e000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1f000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_20000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_kmu_39000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_regulator_4000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_8000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_9000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_21000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_gpio_842500, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_clock_5000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000, __VA_ARGS__) fn(DT_N_S_soc_S_crypto_50840000, __VA_ARGS__) fn(DT_N_S_soc_S_ctrlap_50006000, __VA_ARGS__) fn(DT_N_S_soc_S_gpiote_5000d000, __VA_ARGS__) fn(DT_N_S_soc_S_spu_50003000, __VA_ARGS__) fn(DT_N_S_soc_S_ficr_ff0000, __VA_ARGS__) fn(DT_N_S_soc_S_uicr_ff8000, __VA_ARGS__) fn(DT_N_S_pin_controller, __VA_ARGS__) fn(DT_N_S_pin_controller_S_uart0_default, __VA_ARGS__) fn(DT_N_S_pin_controller_S_uart0_default_S_group1, __VA_ARGS__) fn(DT_N_S_pin_controller_S_uart0_default_S_group2, __VA_ARGS__) fn(DT_N_S_pin_controller_S_uart0_sleep, __VA_ARGS__) fn(DT_N_S_pin_controller_S_uart0_sleep_S_group1, __VA_ARGS__) fn(DT_N_S_pin_controller_S_uart1_default, __VA_ARGS__) fn(DT_N_S_pin_controller_S_uart1_default_S_group1, __VA_ARGS__) fn(DT_N_S_pin_controller_S_uart1_default_S_group2, __VA_ARGS__) fn(DT_N_S_pin_controller_S_uart1_sleep, __VA_ARGS__) fn(DT_N_S_pin_controller_S_uart1_sleep_S_group1, __VA_ARGS__) fn(DT_N_S_pin_controller_S_i2c2_default, __VA_ARGS__) fn(DT_N_S_pin_controller_S_i2c2_default_S_group1, __VA_ARGS__) fn(DT_N_S_pin_controller_S_i2c2_sleep, __VA_ARGS__) fn(DT_N_S_pin_controller_S_i2c2_sleep_S_group1, __VA_ARGS__) fn(DT_N_S_pin_controller_S_pwm0_default, __VA_ARGS__) fn(DT_N_S_pin_controller_S_pwm0_default_S_group1, __VA_ARGS__) fn(DT_N_S_pin_controller_S_pwm0_sleep, __VA_ARGS__) fn(DT_N_S_pin_controller_S_pwm0_sleep_S_group1, __VA_ARGS__) fn(DT_N_S_pin_controller_S_spi3_default, __VA_ARGS__) fn(DT_N_S_pin_controller_S_spi3_default_S_group1, __VA_ARGS__) fn(DT_N_S_pin_controller_S_spi3_sleep, __VA_ARGS__) fn(DT_N_S_pin_controller_S_spi3_sleep_S_group1, __VA_ARGS__) fn(DT_N_S_entropy_bt_hci, __VA_ARGS__) fn(DT_N_S_cpus, __VA_ARGS__) fn(DT_N_S_cpus_S_cpu_0, __VA_ARGS__) fn(DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90, __VA_ARGS__) fn(DT_N_S_leds, __VA_ARGS__) fn(DT_N_S_leds_S_led_0, __VA_ARGS__) fn(DT_N_S_leds_S_led_1, __VA_ARGS__) fn(DT_N_S_leds_S_led_2, __VA_ARGS__) fn(DT_N_S_leds_S_led_3, __VA_ARGS__) fn(DT_N_S_pwmleds, __VA_ARGS__) fn(DT_N_S_pwmleds_S_pwm_led_0, __VA_ARGS__) fn(DT_N_S_buttons, __VA_ARGS__) fn(DT_N_S_buttons_S_button_0, __VA_ARGS__) fn(DT_N_S_buttons_S_button_1, __VA_ARGS__) fn(DT_N_S_buttons_S_button_2, __VA_ARGS__) fn(DT_N_S_buttons_S_button_3, __VA_ARGS__) fn(DT_N_S_connector, __VA_ARGS__) fn(DT_N_S_analog_connector, __VA_ARGS__) fn(DT_N_S_reserved_memory, __VA_ARGS__) fn(DT_N_S_reserved_memory_S_image_s_20000000, __VA_ARGS__) fn(DT_N_S_reserved_memory_S_image_modem_20016000, __VA_ARGS__) fn(DT_N_S_reserved_memory_S_image_ns_20020000, __VA_ARGS__)
+#define DT_COMPAT_fixed_partitions_LABEL_mcuboot DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_0
+#define DT_COMPAT_fixed_partitions_LABEL_mcuboot_EXISTS 1
+#define DT_COMPAT_fixed_partitions_LABEL_image_0 DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_10000
+#define DT_COMPAT_fixed_partitions_LABEL_image_0_EXISTS 1
+#define DT_COMPAT_fixed_partitions_LABEL_image_0_nonsecure DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_50000
+#define DT_COMPAT_fixed_partitions_LABEL_image_0_nonsecure_EXISTS 1
+#define DT_COMPAT_fixed_partitions_LABEL_image_1 DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_85000
+#define DT_COMPAT_fixed_partitions_LABEL_image_1_EXISTS 1
+#define DT_COMPAT_fixed_partitions_LABEL_image_1_nonsecure DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_c5000
+#define DT_COMPAT_fixed_partitions_LABEL_image_1_nonsecure_EXISTS 1
+#define DT_COMPAT_fixed_partitions_LABEL_storage DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions_S_partition_fa000
+#define DT_COMPAT_fixed_partitions_LABEL_storage_EXISTS 1
+
+/*
+ * Macros for compatibles with status "okay" nodes
+ */
+#define DT_COMPAT_HAS_OKAY_nordic_nrf9161_dk_nrf9161 1
+#define DT_COMPAT_HAS_OKAY_nordic_nrf9161_laca 1
+#define DT_COMPAT_HAS_OKAY_nordic_nrf9120 1
+#define DT_COMPAT_HAS_OKAY_nordic_nrf91 1
+#define DT_COMPAT_HAS_OKAY_simple_bus 1
+#define DT_COMPAT_HAS_OKAY_arm_v8m_nvic 1
+#define DT_COMPAT_HAS_OKAY_mmio_sram 1
+#define DT_COMPAT_HAS_OKAY_nordic_nrf91_flash_controller 1
+#define DT_COMPAT_HAS_OKAY_soc_nv_flash 1
+#define DT_COMPAT_HAS_OKAY_fixed_partitions 1
+#define DT_COMPAT_HAS_OKAY_nordic_nrf_saadc 1
+#define DT_COMPAT_HAS_OKAY_nordic_nrf_dppic 1
+#define DT_COMPAT_HAS_OKAY_nordic_nrf_egu 1
+#define DT_COMPAT_HAS_OKAY_nordic_nrf_ipc 1
+#define DT_COMPAT_HAS_OKAY_nordic_nrf_kmu 1
+#define DT_COMPAT_HAS_OKAY_nordic_nrf_regulators 1
+#define DT_COMPAT_HAS_OKAY_nordic_nrf_vmc 1
+#define DT_COMPAT_HAS_OKAY_nordic_nrf_uarte 1
+#define DT_COMPAT_HAS_OKAY_nordic_nrf_twim 1
+#define DT_COMPAT_HAS_OKAY_nordic_nrf_spim 1
+#define DT_COMPAT_HAS_OKAY_nordic_nrf_pwm 1
+#define DT_COMPAT_HAS_OKAY_nordic_nrf_gpio 1
+#define DT_COMPAT_HAS_OKAY_nordic_nrf_clock 1
+#define DT_COMPAT_HAS_OKAY_nordic_nrf_power 1
+#define DT_COMPAT_HAS_OKAY_nordic_nrf_gpregret 1
+#define DT_COMPAT_HAS_OKAY_nordic_nrf_wdt 1
+#define DT_COMPAT_HAS_OKAY_nordic_cryptocell 1
+#define DT_COMPAT_HAS_OKAY_arm_cryptocell_310 1
+#define DT_COMPAT_HAS_OKAY_nordic_nrf_ctrlapperi 1
+#define DT_COMPAT_HAS_OKAY_nordic_nrf_gpiote 1
+#define DT_COMPAT_HAS_OKAY_nordic_nrf_spu 1
+#define DT_COMPAT_HAS_OKAY_nordic_nrf_ficr 1
+#define DT_COMPAT_HAS_OKAY_nordic_nrf_uicr 1
+#define DT_COMPAT_HAS_OKAY_nordic_nrf_pinctrl 1
+#define DT_COMPAT_HAS_OKAY_zephyr_bt_hci_entropy 1
+#define DT_COMPAT_HAS_OKAY_arm_cortex_m33f 1
+#define DT_COMPAT_HAS_OKAY_arm_armv8m_mpu 1
+#define DT_COMPAT_HAS_OKAY_gpio_leds 1
+#define DT_COMPAT_HAS_OKAY_pwm_leds 1
+#define DT_COMPAT_HAS_OKAY_gpio_keys 1
+#define DT_COMPAT_HAS_OKAY_arduino_header_r3 1
+#define DT_COMPAT_HAS_OKAY_arduino_uno_adc 1
+
+/*
+ * Macros for status "okay" instances of each compatible
+ */
+#define DT_N_INST_nordic_nrf9161_dk_nrf9161_NUM_OKAY 1
+#define DT_N_INST_nordic_nrf9161_laca_NUM_OKAY 1
+#define DT_N_INST_nordic_nrf9120_NUM_OKAY 1
+#define DT_N_INST_nordic_nrf91_NUM_OKAY 1
+#define DT_N_INST_simple_bus_NUM_OKAY 1
+#define DT_N_INST_arm_v8m_nvic_NUM_OKAY 1
+#define DT_N_INST_mmio_sram_NUM_OKAY 1
+#define DT_N_INST_nordic_nrf91_flash_controller_NUM_OKAY 1
+#define DT_N_INST_soc_nv_flash_NUM_OKAY 1
+#define DT_N_INST_fixed_partitions_NUM_OKAY 1
+#define DT_N_INST_nordic_nrf_saadc_NUM_OKAY 1
+#define DT_N_INST_nordic_nrf_dppic_NUM_OKAY 1
+#define DT_N_INST_nordic_nrf_egu_NUM_OKAY 6
+#define DT_N_INST_nordic_nrf_ipc_NUM_OKAY 1
+#define DT_N_INST_nordic_nrf_kmu_NUM_OKAY 1
+#define DT_N_INST_nordic_nrf_regulators_NUM_OKAY 1
+#define DT_N_INST_nordic_nrf_vmc_NUM_OKAY 1
+#define DT_N_INST_nordic_nrf_uarte_NUM_OKAY 2
+#define DT_N_INST_nordic_nrf_twim_NUM_OKAY 1
+#define DT_N_INST_nordic_nrf_spim_NUM_OKAY 1
+#define DT_N_INST_nordic_nrf_pwm_NUM_OKAY 1
+#define DT_N_INST_nordic_nrf_gpio_NUM_OKAY 1
+#define DT_N_INST_nordic_nrf_clock_NUM_OKAY 1
+#define DT_N_INST_nordic_nrf_power_NUM_OKAY 1
+#define DT_N_INST_nordic_nrf_gpregret_NUM_OKAY 2
+#define DT_N_INST_nordic_nrf_wdt_NUM_OKAY 1
+#define DT_N_INST_nordic_cryptocell_NUM_OKAY 1
+#define DT_N_INST_arm_cryptocell_310_NUM_OKAY 1
+#define DT_N_INST_nordic_nrf_ctrlapperi_NUM_OKAY 1
+#define DT_N_INST_nordic_nrf_gpiote_NUM_OKAY 1
+#define DT_N_INST_nordic_nrf_spu_NUM_OKAY 1
+#define DT_N_INST_nordic_nrf_ficr_NUM_OKAY 1
+#define DT_N_INST_nordic_nrf_uicr_NUM_OKAY 1
+#define DT_N_INST_nordic_nrf_pinctrl_NUM_OKAY 1
+#define DT_N_INST_zephyr_bt_hci_entropy_NUM_OKAY 1
+#define DT_N_INST_arm_cortex_m33f_NUM_OKAY 1
+#define DT_N_INST_arm_armv8m_mpu_NUM_OKAY 1
+#define DT_N_INST_gpio_leds_NUM_OKAY 1
+#define DT_N_INST_pwm_leds_NUM_OKAY 1
+#define DT_N_INST_gpio_keys_NUM_OKAY 1
+#define DT_N_INST_arduino_header_r3_NUM_OKAY 1
+#define DT_N_INST_arduino_uno_adc_NUM_OKAY 1
+#define DT_FOREACH_OKAY_nordic_nrf9161_dk_nrf9161(fn) fn(DT_N)
+#define DT_FOREACH_OKAY_VARGS_nordic_nrf9161_dk_nrf9161(fn, ...) fn(DT_N, __VA_ARGS__)
+#define DT_FOREACH_OKAY_INST_nordic_nrf9161_dk_nrf9161(fn) fn(0)
+#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf9161_dk_nrf9161(fn, ...) fn(0, __VA_ARGS__)
+#define DT_FOREACH_OKAY_nordic_nrf9161_laca(fn) fn(DT_N_S_soc)
+#define DT_FOREACH_OKAY_VARGS_nordic_nrf9161_laca(fn, ...) fn(DT_N_S_soc, __VA_ARGS__)
+#define DT_FOREACH_OKAY_INST_nordic_nrf9161_laca(fn) fn(0)
+#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf9161_laca(fn, ...) fn(0, __VA_ARGS__)
+#define DT_FOREACH_OKAY_nordic_nrf9120(fn) fn(DT_N_S_soc)
+#define DT_FOREACH_OKAY_VARGS_nordic_nrf9120(fn, ...) fn(DT_N_S_soc, __VA_ARGS__)
+#define DT_FOREACH_OKAY_INST_nordic_nrf9120(fn) fn(0)
+#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf9120(fn, ...) fn(0, __VA_ARGS__)
+#define DT_FOREACH_OKAY_nordic_nrf91(fn) fn(DT_N_S_soc)
+#define DT_FOREACH_OKAY_VARGS_nordic_nrf91(fn, ...) fn(DT_N_S_soc, __VA_ARGS__)
+#define DT_FOREACH_OKAY_INST_nordic_nrf91(fn) fn(0)
+#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf91(fn, ...) fn(0, __VA_ARGS__)
+#define DT_FOREACH_OKAY_simple_bus(fn) fn(DT_N_S_soc)
+#define DT_FOREACH_OKAY_VARGS_simple_bus(fn, ...) fn(DT_N_S_soc, __VA_ARGS__)
+#define DT_FOREACH_OKAY_INST_simple_bus(fn) fn(0)
+#define DT_FOREACH_OKAY_INST_VARGS_simple_bus(fn, ...) fn(0, __VA_ARGS__)
+#define DT_FOREACH_OKAY_arm_v8m_nvic(fn) fn(DT_N_S_soc_S_interrupt_controller_e000e100)
+#define DT_FOREACH_OKAY_VARGS_arm_v8m_nvic(fn, ...) fn(DT_N_S_soc_S_interrupt_controller_e000e100, __VA_ARGS__)
+#define DT_FOREACH_OKAY_INST_arm_v8m_nvic(fn) fn(0)
+#define DT_FOREACH_OKAY_INST_VARGS_arm_v8m_nvic(fn, ...) fn(0, __VA_ARGS__)
+#define DT_FOREACH_OKAY_mmio_sram(fn) fn(DT_N_S_soc_S_memory_20000000)
+#define DT_FOREACH_OKAY_VARGS_mmio_sram(fn, ...) fn(DT_N_S_soc_S_memory_20000000, __VA_ARGS__)
+#define DT_FOREACH_OKAY_INST_mmio_sram(fn) fn(0)
+#define DT_FOREACH_OKAY_INST_VARGS_mmio_sram(fn, ...) fn(0, __VA_ARGS__)
+#define DT_FOREACH_OKAY_nordic_nrf91_flash_controller(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000)
+#define DT_FOREACH_OKAY_VARGS_nordic_nrf91_flash_controller(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000, __VA_ARGS__)
+#define DT_FOREACH_OKAY_INST_nordic_nrf91_flash_controller(fn) fn(0)
+#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf91_flash_controller(fn, ...) fn(0, __VA_ARGS__)
+#define DT_FOREACH_OKAY_soc_nv_flash(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0)
+#define DT_FOREACH_OKAY_VARGS_soc_nv_flash(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0, __VA_ARGS__)
+#define DT_FOREACH_OKAY_INST_soc_nv_flash(fn) fn(0)
+#define DT_FOREACH_OKAY_INST_VARGS_soc_nv_flash(fn, ...) fn(0, __VA_ARGS__)
+#define DT_FOREACH_OKAY_fixed_partitions(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions)
+#define DT_FOREACH_OKAY_VARGS_fixed_partitions(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_flash_controller_39000_S_flash_0_S_partitions, __VA_ARGS__)
+#define DT_FOREACH_OKAY_INST_fixed_partitions(fn) fn(0)
+#define DT_FOREACH_OKAY_INST_VARGS_fixed_partitions(fn, ...) fn(0, __VA_ARGS__)
+#define DT_FOREACH_OKAY_nordic_nrf_saadc(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_adc_e000)
+#define DT_FOREACH_OKAY_VARGS_nordic_nrf_saadc(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_adc_e000, __VA_ARGS__)
+#define DT_FOREACH_OKAY_INST_nordic_nrf_saadc(fn) fn(0)
+#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf_saadc(fn, ...) fn(0, __VA_ARGS__)
+#define DT_FOREACH_OKAY_nordic_nrf_dppic(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_dppic_17000)
+#define DT_FOREACH_OKAY_VARGS_nordic_nrf_dppic(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_dppic_17000, __VA_ARGS__)
+#define DT_FOREACH_OKAY_INST_nordic_nrf_dppic(fn) fn(0)
+#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf_dppic(fn, ...) fn(0, __VA_ARGS__)
+#define DT_FOREACH_OKAY_nordic_nrf_egu(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1b000) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1c000) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1d000) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1e000) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1f000) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_20000)
+#define DT_FOREACH_OKAY_VARGS_nordic_nrf_egu(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1b000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1c000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1d000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1e000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_1f000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_egu_20000, __VA_ARGS__)
+#define DT_FOREACH_OKAY_INST_nordic_nrf_egu(fn) fn(0) fn(1) fn(2) fn(3) fn(4) fn(5)
+#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf_egu(fn, ...) fn(0, __VA_ARGS__) fn(1, __VA_ARGS__) fn(2, __VA_ARGS__) fn(3, __VA_ARGS__) fn(4, __VA_ARGS__) fn(5, __VA_ARGS__)
+#define DT_FOREACH_OKAY_nordic_nrf_ipc(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000)
+#define DT_FOREACH_OKAY_VARGS_nordic_nrf_ipc(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_ipc_2a000, __VA_ARGS__)
+#define DT_FOREACH_OKAY_INST_nordic_nrf_ipc(fn) fn(0)
+#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf_ipc(fn, ...) fn(0, __VA_ARGS__)
+#define DT_FOREACH_OKAY_nordic_nrf_kmu(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_kmu_39000)
+#define DT_FOREACH_OKAY_VARGS_nordic_nrf_kmu(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_kmu_39000, __VA_ARGS__)
+#define DT_FOREACH_OKAY_INST_nordic_nrf_kmu(fn) fn(0)
+#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf_kmu(fn, ...) fn(0, __VA_ARGS__)
+#define DT_FOREACH_OKAY_nordic_nrf_regulators(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_regulator_4000)
+#define DT_FOREACH_OKAY_VARGS_nordic_nrf_regulators(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_regulator_4000, __VA_ARGS__)
+#define DT_FOREACH_OKAY_INST_nordic_nrf_regulators(fn) fn(0)
+#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf_regulators(fn, ...) fn(0, __VA_ARGS__)
+#define DT_FOREACH_OKAY_nordic_nrf_vmc(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000)
+#define DT_FOREACH_OKAY_VARGS_nordic_nrf_vmc(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_vmc_3a000, __VA_ARGS__)
+#define DT_FOREACH_OKAY_INST_nordic_nrf_vmc(fn) fn(0)
+#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf_vmc(fn, ...) fn(0, __VA_ARGS__)
+#define DT_FOREACH_OKAY_nordic_nrf_uarte(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_8000) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_9000)
+#define DT_FOREACH_OKAY_VARGS_nordic_nrf_uarte(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_8000, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_uart_9000, __VA_ARGS__)
+#define DT_FOREACH_OKAY_INST_nordic_nrf_uarte(fn) fn(0) fn(1)
+#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf_uarte(fn, ...) fn(0, __VA_ARGS__) fn(1, __VA_ARGS__)
+#define DT_FOREACH_OKAY_nordic_nrf_twim(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000)
+#define DT_FOREACH_OKAY_VARGS_nordic_nrf_twim(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_i2c_a000, __VA_ARGS__)
+#define DT_FOREACH_OKAY_INST_nordic_nrf_twim(fn) fn(0)
+#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf_twim(fn, ...) fn(0, __VA_ARGS__)
+#define DT_FOREACH_OKAY_nordic_nrf_spim(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000)
+#define DT_FOREACH_OKAY_VARGS_nordic_nrf_spim(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_spi_b000, __VA_ARGS__)
+#define DT_FOREACH_OKAY_INST_nordic_nrf_spim(fn) fn(0)
+#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf_spim(fn, ...) fn(0, __VA_ARGS__)
+#define DT_FOREACH_OKAY_nordic_nrf_pwm(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_21000)
+#define DT_FOREACH_OKAY_VARGS_nordic_nrf_pwm(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_pwm_21000, __VA_ARGS__)
+#define DT_FOREACH_OKAY_INST_nordic_nrf_pwm(fn) fn(0)
+#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf_pwm(fn, ...) fn(0, __VA_ARGS__)
+#define DT_FOREACH_OKAY_nordic_nrf_gpio(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_gpio_842500)
+#define DT_FOREACH_OKAY_VARGS_nordic_nrf_gpio(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_gpio_842500, __VA_ARGS__)
+#define DT_FOREACH_OKAY_INST_nordic_nrf_gpio(fn) fn(0)
+#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf_gpio(fn, ...) fn(0, __VA_ARGS__)
+#define DT_FOREACH_OKAY_nordic_nrf_clock(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_clock_5000)
+#define DT_FOREACH_OKAY_VARGS_nordic_nrf_clock(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_clock_5000, __VA_ARGS__)
+#define DT_FOREACH_OKAY_INST_nordic_nrf_clock(fn) fn(0)
+#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf_clock(fn, ...) fn(0, __VA_ARGS__)
+#define DT_FOREACH_OKAY_nordic_nrf_power(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000)
+#define DT_FOREACH_OKAY_VARGS_nordic_nrf_power(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000, __VA_ARGS__)
+#define DT_FOREACH_OKAY_INST_nordic_nrf_power(fn) fn(0)
+#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf_power(fn, ...) fn(0, __VA_ARGS__)
+#define DT_FOREACH_OKAY_nordic_nrf_gpregret(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520)
+#define DT_FOREACH_OKAY_VARGS_nordic_nrf_gpregret(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret1_51c, __VA_ARGS__) fn(DT_N_S_soc_S_peripheral_50000000_S_power_5000_S_gpregret2_520, __VA_ARGS__)
+#define DT_FOREACH_OKAY_INST_nordic_nrf_gpregret(fn) fn(0) fn(1)
+#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf_gpregret(fn, ...) fn(0, __VA_ARGS__) fn(1, __VA_ARGS__)
+#define DT_FOREACH_OKAY_nordic_nrf_wdt(fn) fn(DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000)
+#define DT_FOREACH_OKAY_VARGS_nordic_nrf_wdt(fn, ...) fn(DT_N_S_soc_S_peripheral_50000000_S_watchdog_18000, __VA_ARGS__)
+#define DT_FOREACH_OKAY_INST_nordic_nrf_wdt(fn) fn(0)
+#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf_wdt(fn, ...) fn(0, __VA_ARGS__)
+#define DT_FOREACH_OKAY_nordic_cryptocell(fn) fn(DT_N_S_soc_S_crypto_50840000)
+#define DT_FOREACH_OKAY_VARGS_nordic_cryptocell(fn, ...) fn(DT_N_S_soc_S_crypto_50840000, __VA_ARGS__)
+#define DT_FOREACH_OKAY_INST_nordic_cryptocell(fn) fn(0)
+#define DT_FOREACH_OKAY_INST_VARGS_nordic_cryptocell(fn, ...) fn(0, __VA_ARGS__)
+#define DT_FOREACH_OKAY_arm_cryptocell_310(fn) fn(DT_N_S_soc_S_crypto_50840000)
+#define DT_FOREACH_OKAY_VARGS_arm_cryptocell_310(fn, ...) fn(DT_N_S_soc_S_crypto_50840000, __VA_ARGS__)
+#define DT_FOREACH_OKAY_INST_arm_cryptocell_310(fn) fn(0)
+#define DT_FOREACH_OKAY_INST_VARGS_arm_cryptocell_310(fn, ...) fn(0, __VA_ARGS__)
+#define DT_FOREACH_OKAY_nordic_nrf_ctrlapperi(fn) fn(DT_N_S_soc_S_ctrlap_50006000)
+#define DT_FOREACH_OKAY_VARGS_nordic_nrf_ctrlapperi(fn, ...) fn(DT_N_S_soc_S_ctrlap_50006000, __VA_ARGS__)
+#define DT_FOREACH_OKAY_INST_nordic_nrf_ctrlapperi(fn) fn(0)
+#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf_ctrlapperi(fn, ...) fn(0, __VA_ARGS__)
+#define DT_FOREACH_OKAY_nordic_nrf_gpiote(fn) fn(DT_N_S_soc_S_gpiote_5000d000)
+#define DT_FOREACH_OKAY_VARGS_nordic_nrf_gpiote(fn, ...) fn(DT_N_S_soc_S_gpiote_5000d000, __VA_ARGS__)
+#define DT_FOREACH_OKAY_INST_nordic_nrf_gpiote(fn) fn(0)
+#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf_gpiote(fn, ...) fn(0, __VA_ARGS__)
+#define DT_FOREACH_OKAY_nordic_nrf_spu(fn) fn(DT_N_S_soc_S_spu_50003000)
+#define DT_FOREACH_OKAY_VARGS_nordic_nrf_spu(fn, ...) fn(DT_N_S_soc_S_spu_50003000, __VA_ARGS__)
+#define DT_FOREACH_OKAY_INST_nordic_nrf_spu(fn) fn(0)
+#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf_spu(fn, ...) fn(0, __VA_ARGS__)
+#define DT_FOREACH_OKAY_nordic_nrf_ficr(fn) fn(DT_N_S_soc_S_ficr_ff0000)
+#define DT_FOREACH_OKAY_VARGS_nordic_nrf_ficr(fn, ...) fn(DT_N_S_soc_S_ficr_ff0000, __VA_ARGS__)
+#define DT_FOREACH_OKAY_INST_nordic_nrf_ficr(fn) fn(0)
+#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf_ficr(fn, ...) fn(0, __VA_ARGS__)
+#define DT_FOREACH_OKAY_nordic_nrf_uicr(fn) fn(DT_N_S_soc_S_uicr_ff8000)
+#define DT_FOREACH_OKAY_VARGS_nordic_nrf_uicr(fn, ...) fn(DT_N_S_soc_S_uicr_ff8000, __VA_ARGS__)
+#define DT_FOREACH_OKAY_INST_nordic_nrf_uicr(fn) fn(0)
+#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf_uicr(fn, ...) fn(0, __VA_ARGS__)
+#define DT_FOREACH_OKAY_nordic_nrf_pinctrl(fn) fn(DT_N_S_pin_controller)
+#define DT_FOREACH_OKAY_VARGS_nordic_nrf_pinctrl(fn, ...) fn(DT_N_S_pin_controller, __VA_ARGS__)
+#define DT_FOREACH_OKAY_INST_nordic_nrf_pinctrl(fn) fn(0)
+#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf_pinctrl(fn, ...) fn(0, __VA_ARGS__)
+#define DT_FOREACH_OKAY_zephyr_bt_hci_entropy(fn) fn(DT_N_S_entropy_bt_hci)
+#define DT_FOREACH_OKAY_VARGS_zephyr_bt_hci_entropy(fn, ...) fn(DT_N_S_entropy_bt_hci, __VA_ARGS__)
+#define DT_FOREACH_OKAY_INST_zephyr_bt_hci_entropy(fn) fn(0)
+#define DT_FOREACH_OKAY_INST_VARGS_zephyr_bt_hci_entropy(fn, ...) fn(0, __VA_ARGS__)
+#define DT_FOREACH_OKAY_arm_cortex_m33f(fn) fn(DT_N_S_cpus_S_cpu_0)
+#define DT_FOREACH_OKAY_VARGS_arm_cortex_m33f(fn, ...) fn(DT_N_S_cpus_S_cpu_0, __VA_ARGS__)
+#define DT_FOREACH_OKAY_INST_arm_cortex_m33f(fn) fn(0)
+#define DT_FOREACH_OKAY_INST_VARGS_arm_cortex_m33f(fn, ...) fn(0, __VA_ARGS__)
+#define DT_FOREACH_OKAY_arm_armv8m_mpu(fn) fn(DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90)
+#define DT_FOREACH_OKAY_VARGS_arm_armv8m_mpu(fn, ...) fn(DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90, __VA_ARGS__)
+#define DT_FOREACH_OKAY_INST_arm_armv8m_mpu(fn) fn(0)
+#define DT_FOREACH_OKAY_INST_VARGS_arm_armv8m_mpu(fn, ...) fn(0, __VA_ARGS__)
+#define DT_FOREACH_OKAY_gpio_leds(fn) fn(DT_N_S_leds)
+#define DT_FOREACH_OKAY_VARGS_gpio_leds(fn, ...) fn(DT_N_S_leds, __VA_ARGS__)
+#define DT_FOREACH_OKAY_INST_gpio_leds(fn) fn(0)
+#define DT_FOREACH_OKAY_INST_VARGS_gpio_leds(fn, ...) fn(0, __VA_ARGS__)
+#define DT_FOREACH_OKAY_pwm_leds(fn) fn(DT_N_S_pwmleds)
+#define DT_FOREACH_OKAY_VARGS_pwm_leds(fn, ...) fn(DT_N_S_pwmleds, __VA_ARGS__)
+#define DT_FOREACH_OKAY_INST_pwm_leds(fn) fn(0)
+#define DT_FOREACH_OKAY_INST_VARGS_pwm_leds(fn, ...) fn(0, __VA_ARGS__)
+#define DT_FOREACH_OKAY_gpio_keys(fn) fn(DT_N_S_buttons)
+#define DT_FOREACH_OKAY_VARGS_gpio_keys(fn, ...) fn(DT_N_S_buttons, __VA_ARGS__)
+#define DT_FOREACH_OKAY_INST_gpio_keys(fn) fn(0)
+#define DT_FOREACH_OKAY_INST_VARGS_gpio_keys(fn, ...) fn(0, __VA_ARGS__)
+#define DT_FOREACH_OKAY_arduino_header_r3(fn) fn(DT_N_S_connector)
+#define DT_FOREACH_OKAY_VARGS_arduino_header_r3(fn, ...) fn(DT_N_S_connector, __VA_ARGS__)
+#define DT_FOREACH_OKAY_INST_arduino_header_r3(fn) fn(0)
+#define DT_FOREACH_OKAY_INST_VARGS_arduino_header_r3(fn, ...) fn(0, __VA_ARGS__)
+#define DT_FOREACH_OKAY_arduino_uno_adc(fn) fn(DT_N_S_analog_connector)
+#define DT_FOREACH_OKAY_VARGS_arduino_uno_adc(fn, ...) fn(DT_N_S_analog_connector, __VA_ARGS__)
+#define DT_FOREACH_OKAY_INST_arduino_uno_adc(fn) fn(0)
+#define DT_FOREACH_OKAY_INST_VARGS_arduino_uno_adc(fn, ...) fn(0, __VA_ARGS__)
+
+/*
+ * Bus information for status "okay" nodes of each compatible
+ */
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/driver-validation.h b/nrfdemo/builddk/mcuboot/zephyr/include/generated/driver-validation.h
new file mode 100644
index 0000000..8784a8c
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/driver-validation.h
@@ -0,0 +1,158 @@
+#ifndef DRIVER_VALIDATION_GEN_H
+#define DRIVER_VALIDATION_GEN_H
+#define K_SYSCALL_DRIVER_GEN(ptr, op, driver_lower_case, driver_upper_case) \
+		(K_SYSCALL_OBJ(ptr, K_OBJ_DRIVER_##driver_upper_case) || \
+		 K_SYSCALL_DRIVER_OP(ptr, driver_lower_case##_driver_api, op))
+                
+#define K_SYSCALL_DRIVER_FLASH(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, flash, FLASH)
+
+#define K_SYSCALL_DRIVER_GPIO(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, gpio, GPIO)
+
+#define K_SYSCALL_DRIVER_UART(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, uart, UART)
+
+#define K_SYSCALL_DRIVER_SHARED_IRQ(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, shared_irq, SHARED_IRQ)
+
+#define K_SYSCALL_DRIVER_CRYPTO(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, crypto, CRYPTO)
+
+#define K_SYSCALL_DRIVER_ADC(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, adc, ADC)
+
+#define K_SYSCALL_DRIVER_AUXDISPLAY(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, auxdisplay, AUXDISPLAY)
+
+#define K_SYSCALL_DRIVER_BBRAM(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, bbram, BBRAM)
+
+#define K_SYSCALL_DRIVER_CAN(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, can, CAN)
+
+#define K_SYSCALL_DRIVER_CELLULAR(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, cellular, CELLULAR)
+
+#define K_SYSCALL_DRIVER_CHARGER(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, charger, CHARGER)
+
+#define K_SYSCALL_DRIVER_CLOCK_CONTROL(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, clock_control, CLOCK_CONTROL)
+
+#define K_SYSCALL_DRIVER_COREDUMP(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, coredump, COREDUMP)
+
+#define K_SYSCALL_DRIVER_COUNTER(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, counter, COUNTER)
+
+#define K_SYSCALL_DRIVER_DAC(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, dac, DAC)
+
+#define K_SYSCALL_DRIVER_DAI(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, dai, DAI)
+
+#define K_SYSCALL_DRIVER_DISPLAY(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, display, DISPLAY)
+
+#define K_SYSCALL_DRIVER_DMA(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, dma, DMA)
+
+#define K_SYSCALL_DRIVER_EDAC(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, edac, EDAC)
+
+#define K_SYSCALL_DRIVER_EEPROM(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, eeprom, EEPROM)
+
+#define K_SYSCALL_DRIVER_EMUL_BBRAM(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, emul_bbram, EMUL_BBRAM)
+
+#define K_SYSCALL_DRIVER_FUEL_GAUGE_EMUL(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, fuel_gauge_emul, FUEL_GAUGE_EMUL)
+
+#define K_SYSCALL_DRIVER_EMUL_SENSOR(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, emul_sensor, EMUL_SENSOR)
+
+#define K_SYSCALL_DRIVER_ENTROPY(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, entropy, ENTROPY)
+
+#define K_SYSCALL_DRIVER_ESPI(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, espi, ESPI)
+
+#define K_SYSCALL_DRIVER_ESPI_SAF(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, espi_saf, ESPI_SAF)
+
+#define K_SYSCALL_DRIVER_FPGA(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, fpga, FPGA)
+
+#define K_SYSCALL_DRIVER_FUEL_GAUGE(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, fuel_gauge, FUEL_GAUGE)
+
+#define K_SYSCALL_DRIVER_GNSS(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, gnss, GNSS)
+
+#define K_SYSCALL_DRIVER_HWSPINLOCK(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, hwspinlock, HWSPINLOCK)
+
+#define K_SYSCALL_DRIVER_I2C(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, i2c, I2C)
+
+#define K_SYSCALL_DRIVER_I2C_TARGET(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, i2c_target, I2C_TARGET)
+
+#define K_SYSCALL_DRIVER_I2S(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, i2s, I2S)
+
+#define K_SYSCALL_DRIVER_I3C(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, i3c, I3C)
+
+#define K_SYSCALL_DRIVER_IPM(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, ipm, IPM)
+
+#define K_SYSCALL_DRIVER_KSCAN(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, kscan, KSCAN)
+
+#define K_SYSCALL_DRIVER_LED(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, led, LED)
+
+#define K_SYSCALL_DRIVER_LED_STRIP(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, led_strip, LED_STRIP)
+
+#define K_SYSCALL_DRIVER_LORA(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, lora, LORA)
+
+#define K_SYSCALL_DRIVER_MBOX(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, mbox, MBOX)
+
+#define K_SYSCALL_DRIVER_MDIO(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, mdio, MDIO)
+
+#define K_SYSCALL_DRIVER_MIPI_DBI(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, mipi_dbi, MIPI_DBI)
+
+#define K_SYSCALL_DRIVER_MIPI_DSI(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, mipi_dsi, MIPI_DSI)
+
+#define K_SYSCALL_DRIVER_PECI(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, peci, PECI)
+
+#define K_SYSCALL_DRIVER_PS2(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, ps2, PS2)
+
+#define K_SYSCALL_DRIVER_PTP_CLOCK(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, ptp_clock, PTP_CLOCK)
+
+#define K_SYSCALL_DRIVER_PWM(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, pwm, PWM)
+
+#define K_SYSCALL_DRIVER_REGULATOR_PARENT(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, regulator_parent, REGULATOR_PARENT)
+
+#define K_SYSCALL_DRIVER_REGULATOR(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, regulator, REGULATOR)
+
+#define K_SYSCALL_DRIVER_RESET(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, reset, RESET)
+
+#define K_SYSCALL_DRIVER_RETAINED_MEM(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, retained_mem, RETAINED_MEM)
+
+#define K_SYSCALL_DRIVER_RTC(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, rtc, RTC)
+
+#define K_SYSCALL_DRIVER_SDHC(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, sdhc, SDHC)
+
+#define K_SYSCALL_DRIVER_SENSOR(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, sensor, SENSOR)
+
+#define K_SYSCALL_DRIVER_SMBUS(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, smbus, SMBUS)
+
+#define K_SYSCALL_DRIVER_SPI(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, spi, SPI)
+
+#define K_SYSCALL_DRIVER_SYSCON(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, syscon, SYSCON)
+
+#define K_SYSCALL_DRIVER_VIDEO(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, video, VIDEO)
+
+#define K_SYSCALL_DRIVER_W1(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, w1, W1)
+
+#define K_SYSCALL_DRIVER_WDT(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, wdt, WDT)
+
+#define K_SYSCALL_DRIVER_CAN_TRANSCEIVER(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, can_transceiver, CAN_TRANSCEIVER)
+
+#define K_SYSCALL_DRIVER_UART_MUX(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, uart_mux, UART_MUX)
+
+#define K_SYSCALL_DRIVER_I3C_TARGET(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, i3c_target, I3C_TARGET)
+
+#define K_SYSCALL_DRIVER_ITS(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, its, ITS)
+
+#define K_SYSCALL_DRIVER_VTD(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, vtd, VTD)
+
+#define K_SYSCALL_DRIVER_TGPIO(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, tgpio, TGPIO)
+
+#define K_SYSCALL_DRIVER_PCIE_CTRL(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, pcie_ctrl, PCIE_CTRL)
+
+#define K_SYSCALL_DRIVER_PCIE_EP(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, pcie_ep, PCIE_EP)
+
+#define K_SYSCALL_DRIVER_SVC(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, svc, SVC)
+
+#define K_SYSCALL_DRIVER_BC12_EMUL(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, bc12_emul, BC12_EMUL)
+
+#define K_SYSCALL_DRIVER_BC12(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, bc12, BC12)
+
+#define K_SYSCALL_DRIVER_USBC_PPC(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, usbc_ppc, USBC_PPC)
+
+#define K_SYSCALL_DRIVER_TCPC(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, tcpc, TCPC)
+
+#define K_SYSCALL_DRIVER_USBC_VBUS(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, usbc_vbus, USBC_VBUS)
+
+#define K_SYSCALL_DRIVER_IVSHMEM(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, ivshmem, IVSHMEM)
+
+#define K_SYSCALL_DRIVER_ETHPHY(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, ethphy, ETHPHY)
+#endif /* DRIVER_VALIDATION_GEN_H */
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/kobj-types-enum.h b/nrfdemo/builddk/mcuboot/zephyr/include/generated/kobj-types-enum.h
new file mode 100644
index 0000000..90debd4
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/kobj-types-enum.h
@@ -0,0 +1,118 @@
+/* Core kernel objects */
+K_OBJ_MEM_SLAB,
+K_OBJ_MSGQ,
+K_OBJ_MUTEX,
+K_OBJ_PIPE,
+K_OBJ_QUEUE,
+K_OBJ_POLL_SIGNAL,
+K_OBJ_SEM,
+K_OBJ_STACK,
+K_OBJ_THREAD,
+K_OBJ_TIMER,
+K_OBJ_THREAD_STACK_ELEMENT,
+K_OBJ_NET_SOCKET,
+K_OBJ_NET_IF,
+K_OBJ_SYS_MUTEX,
+K_OBJ_FUTEX,
+K_OBJ_CONDVAR,
+#ifdef CONFIG_EVENTS
+K_OBJ_EVENT,
+#endif
+#ifdef CONFIG_ZTEST
+K_OBJ_ZTEST_SUITE_NODE,
+#endif
+#ifdef CONFIG_ZTEST
+K_OBJ_ZTEST_SUITE_STATS,
+#endif
+#ifdef CONFIG_ZTEST
+K_OBJ_ZTEST_UNIT_TEST,
+#endif
+#ifdef CONFIG_ZTEST
+K_OBJ_ZTEST_TEST_RULE,
+#endif
+#ifdef CONFIG_RTIO
+K_OBJ_RTIO,
+#endif
+#ifdef CONFIG_RTIO
+K_OBJ_RTIO_IODEV,
+#endif
+#ifdef CONFIG_SENSOR_ASYNC_API
+K_OBJ_SENSOR_DECODER_API,
+#endif
+/* Driver subsystems */
+K_OBJ_DRIVER_FLASH,
+K_OBJ_DRIVER_GPIO,
+K_OBJ_DRIVER_UART,
+K_OBJ_DRIVER_SHARED_IRQ,
+K_OBJ_DRIVER_CRYPTO,
+K_OBJ_DRIVER_ADC,
+K_OBJ_DRIVER_AUXDISPLAY,
+K_OBJ_DRIVER_BBRAM,
+K_OBJ_DRIVER_CAN,
+K_OBJ_DRIVER_CELLULAR,
+K_OBJ_DRIVER_CHARGER,
+K_OBJ_DRIVER_CLOCK_CONTROL,
+K_OBJ_DRIVER_COREDUMP,
+K_OBJ_DRIVER_COUNTER,
+K_OBJ_DRIVER_DAC,
+K_OBJ_DRIVER_DAI,
+K_OBJ_DRIVER_DISPLAY,
+K_OBJ_DRIVER_DMA,
+K_OBJ_DRIVER_EDAC,
+K_OBJ_DRIVER_EEPROM,
+K_OBJ_DRIVER_EMUL_BBRAM,
+K_OBJ_DRIVER_FUEL_GAUGE_EMUL,
+K_OBJ_DRIVER_EMUL_SENSOR,
+K_OBJ_DRIVER_ENTROPY,
+K_OBJ_DRIVER_ESPI,
+K_OBJ_DRIVER_ESPI_SAF,
+K_OBJ_DRIVER_FPGA,
+K_OBJ_DRIVER_FUEL_GAUGE,
+K_OBJ_DRIVER_GNSS,
+K_OBJ_DRIVER_HWSPINLOCK,
+K_OBJ_DRIVER_I2C,
+K_OBJ_DRIVER_I2C_TARGET,
+K_OBJ_DRIVER_I2S,
+K_OBJ_DRIVER_I3C,
+K_OBJ_DRIVER_IPM,
+K_OBJ_DRIVER_KSCAN,
+K_OBJ_DRIVER_LED,
+K_OBJ_DRIVER_LED_STRIP,
+K_OBJ_DRIVER_LORA,
+K_OBJ_DRIVER_MBOX,
+K_OBJ_DRIVER_MDIO,
+K_OBJ_DRIVER_MIPI_DBI,
+K_OBJ_DRIVER_MIPI_DSI,
+K_OBJ_DRIVER_PECI,
+K_OBJ_DRIVER_PS2,
+K_OBJ_DRIVER_PTP_CLOCK,
+K_OBJ_DRIVER_PWM,
+K_OBJ_DRIVER_REGULATOR_PARENT,
+K_OBJ_DRIVER_REGULATOR,
+K_OBJ_DRIVER_RESET,
+K_OBJ_DRIVER_RETAINED_MEM,
+K_OBJ_DRIVER_RTC,
+K_OBJ_DRIVER_SDHC,
+K_OBJ_DRIVER_SENSOR,
+K_OBJ_DRIVER_SMBUS,
+K_OBJ_DRIVER_SPI,
+K_OBJ_DRIVER_SYSCON,
+K_OBJ_DRIVER_VIDEO,
+K_OBJ_DRIVER_W1,
+K_OBJ_DRIVER_WDT,
+K_OBJ_DRIVER_CAN_TRANSCEIVER,
+K_OBJ_DRIVER_UART_MUX,
+K_OBJ_DRIVER_I3C_TARGET,
+K_OBJ_DRIVER_ITS,
+K_OBJ_DRIVER_VTD,
+K_OBJ_DRIVER_TGPIO,
+K_OBJ_DRIVER_PCIE_CTRL,
+K_OBJ_DRIVER_PCIE_EP,
+K_OBJ_DRIVER_SVC,
+K_OBJ_DRIVER_BC12_EMUL,
+K_OBJ_DRIVER_BC12,
+K_OBJ_DRIVER_USBC_PPC,
+K_OBJ_DRIVER_TCPC,
+K_OBJ_DRIVER_USBC_VBUS,
+K_OBJ_DRIVER_IVSHMEM,
+K_OBJ_DRIVER_ETHPHY,
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/libc/minimal/strerror_table.h b/nrfdemo/builddk/mcuboot/zephyr/include/generated/libc/minimal/strerror_table.h
new file mode 100644
index 0000000..cd64fb4
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/libc/minimal/strerror_table.h
@@ -0,0 +1,174 @@
+
+/*
+ * This file generated by /home/mike/Documents/ncs/v2.7.0/zephyr/scripts/build/gen_strerror_table.py
+ */
+
+#include <errno.h>
+#include <stdint.h>
+#include <string.h>
+
+#include <zephyr/sys/util.h>
+
+#define sys_nerr 141
+static const char *const sys_errlist[sys_nerr] = {
+[0] = "Success",
+[EPERM] = "Not owner",
+[ENOENT] = "No such file or directory",
+[ESRCH] = "No such context",
+[EINTR] = "Interrupted system call",
+[EIO] = "I/O error",
+[ENXIO] = "No such device or address",
+[ENOEXEC] = "Exec format error",
+[EBADF] = "Bad file number",
+[ECHILD] = "No children",
+[EAGAIN] = "No more contexts",
+[ENOMEM] = "Not enough core",
+[EACCES] = "Permission denied",
+[EFAULT] = "Bad address",
+[ENOTBLK] = "Block device required",
+[EBUSY] = "Mount device busy",
+[EEXIST] = "File exists",
+[EXDEV] = "Cross-device link",
+[ENODEV] = "No such device",
+[ENOTDIR] = "Not a directory",
+[EISDIR] = "Is a directory",
+[EINVAL] = "Invalid argument",
+[ENFILE] = "File table overflow",
+[EMFILE] = "Too many open files",
+[ENOTTY] = "Not a typewriter",
+[ETXTBSY] = "Text file busy",
+[EFBIG] = "File too large",
+[ENOSPC] = "No space left on device",
+[ESPIPE] = "Illegal seek",
+[EROFS] = "Read-only file system",
+[EMLINK] = "Too many links",
+[EPIPE] = "Broken pipe",
+[EDOM] = "Argument too large",
+[ERANGE] = "Result too large",
+[ENOMSG] = "Unexpected message type",
+[EDEADLK] = "Resource deadlock avoided",
+[ENOLCK] = "No locks available",
+[ENOSTR] = "STREAMS device required",
+[ENODATA] = "Missing expected message data",
+[ETIME] = "STREAMS timeout occurred",
+[ENOSR] = "Insufficient memory",
+[EPROTO] = "Generic STREAMS error",
+[EBADMSG] = "Invalid STREAMS message",
+[ENOSYS] = "Function not implemented",
+[ENOTEMPTY] = "Directory not empty",
+[ENAMETOOLONG] = "File name too long",
+[ELOOP] = "Too many levels of symbolic links",
+[EOPNOTSUPP] = "Operation not supported on socket",
+[EPFNOSUPPORT] = "Protocol family not supported",
+[ECONNRESET] = "Connection reset by peer",
+[ENOBUFS] = "No buffer space available",
+[EAFNOSUPPORT] = "Addr family not supported",
+[EPROTOTYPE] = "Protocol wrong type for socket",
+[ENOTSOCK] = "Socket operation on non-socket",
+[ENOPROTOOPT] = "Protocol not available",
+[ESHUTDOWN] = "Can't send after socket shutdown",
+[ECONNREFUSED] = "Connection refused",
+[EADDRINUSE] = "Address already in use",
+[ECONNABORTED] = "Software caused connection abort",
+[ENETUNREACH] = "Network is unreachable",
+[ENETDOWN] = "Network is down",
+[ETIMEDOUT] = "Connection timed out",
+[EHOSTDOWN] = "Host is down",
+[EHOSTUNREACH] = "No route to host",
+[EINPROGRESS] = "Operation now in progress",
+[EALREADY] = "Operation already in progress",
+[EDESTADDRREQ] = "Destination address required",
+[EMSGSIZE] = "Message size",
+[EPROTONOSUPPORT] = "Protocol not supported",
+[ESOCKTNOSUPPORT] = "Socket type not supported",
+[EADDRNOTAVAIL] = "Can't assign requested address",
+[ENETRESET] = "Network dropped connection on reset",
+[EISCONN] = "Socket is already connected",
+[ENOTCONN] = "Socket is not connected",
+[ETOOMANYREFS] = "Too many references: can't splice",
+[ENOTSUP] = "Unsupported value",
+[EILSEQ] = "Illegal byte sequence",
+[EOVERFLOW] = "Value overflow",
+[ECANCELED] = "Operation canceled",
+};
+static const uint8_t sys_errlen[sys_nerr] = {
+[0] = 8,
+[EPERM] = 10,
+[ENOENT] = 26,
+[ESRCH] = 16,
+[EINTR] = 24,
+[EIO] = 10,
+[ENXIO] = 26,
+[ENOEXEC] = 18,
+[EBADF] = 16,
+[ECHILD] = 12,
+[EAGAIN] = 17,
+[ENOMEM] = 16,
+[EACCES] = 18,
+[EFAULT] = 12,
+[ENOTBLK] = 22,
+[EBUSY] = 18,
+[EEXIST] = 12,
+[EXDEV] = 18,
+[ENODEV] = 15,
+[ENOTDIR] = 16,
+[EISDIR] = 15,
+[EINVAL] = 17,
+[ENFILE] = 20,
+[EMFILE] = 20,
+[ENOTTY] = 17,
+[ETXTBSY] = 15,
+[EFBIG] = 15,
+[ENOSPC] = 24,
+[ESPIPE] = 13,
+[EROFS] = 22,
+[EMLINK] = 15,
+[EPIPE] = 12,
+[EDOM] = 19,
+[ERANGE] = 17,
+[ENOMSG] = 24,
+[EDEADLK] = 26,
+[ENOLCK] = 19,
+[ENOSTR] = 24,
+[ENODATA] = 30,
+[ETIME] = 25,
+[ENOSR] = 20,
+[EPROTO] = 22,
+[EBADMSG] = 24,
+[ENOSYS] = 25,
+[ENOTEMPTY] = 20,
+[ENAMETOOLONG] = 19,
+[ELOOP] = 34,
+[EOPNOTSUPP] = 34,
+[EPFNOSUPPORT] = 30,
+[ECONNRESET] = 25,
+[ENOBUFS] = 26,
+[EAFNOSUPPORT] = 26,
+[EPROTOTYPE] = 31,
+[ENOTSOCK] = 31,
+[ENOPROTOOPT] = 23,
+[ESHUTDOWN] = 33,
+[ECONNREFUSED] = 19,
+[EADDRINUSE] = 23,
+[ECONNABORTED] = 33,
+[ENETUNREACH] = 23,
+[ENETDOWN] = 16,
+[ETIMEDOUT] = 21,
+[EHOSTDOWN] = 13,
+[EHOSTUNREACH] = 17,
+[EINPROGRESS] = 26,
+[EALREADY] = 30,
+[EDESTADDRREQ] = 29,
+[EMSGSIZE] = 13,
+[EPROTONOSUPPORT] = 23,
+[ESOCKTNOSUPPORT] = 26,
+[EADDRNOTAVAIL] = 31,
+[ENETRESET] = 36,
+[EISCONN] = 28,
+[ENOTCONN] = 24,
+[ETOOMANYREFS] = 34,
+[ENOTSUP] = 18,
+[EILSEQ] = 22,
+[EOVERFLOW] = 15,
+[ECANCELED] = 19,
+};
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/ncs_commit.h b/nrfdemo/builddk/mcuboot/zephyr/include/generated/ncs_commit.h
new file mode 100644
index 0000000..475b51b
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/ncs_commit.h
@@ -0,0 +1,12 @@
+#ifndef _NCS_COMMIT_H_
+#define _NCS_COMMIT_H_
+
+/*  values come from cmake/version.cmake
+ * BUILD_COMMIT related  values will be 'git rev-parse',
+ * alternatively user defined BUILD_VERSION.
+ */
+
+#define NCS_COMMIT                   5cb85570ca43
+#define NCS_COMMIT_STRING            "5cb85570ca43"
+
+#endif /* _NCS_COMMIT_H_ */
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/ncs_version.h b/nrfdemo/builddk/mcuboot/zephyr/include/generated/ncs_version.h
new file mode 100644
index 0000000..5470c0a
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/ncs_version.h
@@ -0,0 +1,25 @@
+#ifndef _NCS_VERSION_H_
+#define _NCS_VERSION_H_
+
+/*  values come from cmake/version.cmake
+ * BUILD_VERSION related  values will be 'git describe',
+ * alternatively user defined BUILD_VERSION.
+ */
+
+/* #undef ZEPHYR_VERSION_CODE */
+/* #undef ZEPHYR_VERSION */
+
+#define NCSVERSION                   
+#define NCS_VERSION_NUMBER           0x20700
+#define NCS_VERSION_MAJOR            2
+#define NCS_VERSION_MINOR            7
+#define NCS_PATCHLEVEL               0
+#define NCS_TWEAK                    
+#define NCS_VERSION_STRING           "2.7.0"
+#define NCS_VERSION_EXTENDED_STRING  ""
+#define NCS_VERSION_TWEAK_STRING     ""
+
+#define NCS_BUILD_VERSION v2.7.0
+
+
+#endif /* _NCS_VERSION_H_ */
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/offsets.h b/nrfdemo/builddk/mcuboot/zephyr/include/generated/offsets.h
new file mode 100644
index 0000000..2b00b2b
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/offsets.h
@@ -0,0 +1,33 @@
+/* THIS FILE IS AUTO GENERATED.  PLEASE DO NOT EDIT.
+ *
+ * This header file provides macros for the offsets of various structure
+ * members.  These offset macros are primarily intended to be used in
+ * assembly code.
+ */
+
+#ifndef __GEN_OFFSETS_H__
+#define __GEN_OFFSETS_H__
+
+#define ___cpu_t_current_OFFSET 0x8
+#define ___cpu_t_nested_OFFSET 0x0
+#define ___cpu_t_irq_stack_OFFSET 0x4
+#define ___cpu_t_arch_OFFSET 0x11
+#define ___kernel_t_cpus_OFFSET 0x0
+#define ___kernel_t_ready_q_OFFSET 0x14
+#define ___ready_q_t_cache_OFFSET 0x0
+#define ___thread_base_t_user_options_OFFSET 0xc
+#define ___thread_t_base_OFFSET 0x0
+#define ___thread_t_callee_saved_OFFSET 0x30
+#define ___thread_t_arch_OFFSET 0x74
+#define ___thread_t_stack_info_OFFSET 0x64
+#define __z_interrupt_stack_SIZEOF 0x800
+#define _PM_DEVICE_STRUCT_FLAGS_OFFSET 0x0
+#define ___thread_arch_t_basepri_OFFSET 0x0
+#define ___thread_arch_t_swap_return_value_OFFSET 0x4
+#define ___basic_sf_t_pc_OFFSET 0x18
+#define ___basic_sf_t_xpsr_OFFSET 0x1c
+#define ___esf_t_SIZEOF 0x20
+#define ___callee_saved_t_SIZEOF 0x24
+#define ___thread_stack_info_t_start_OFFSET 0x0
+
+#endif /* __GEN_OFFSETS_H__ */
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/otype-to-size.h b/nrfdemo/builddk/mcuboot/zephyr/include/generated/otype-to-size.h
new file mode 100644
index 0000000..5ae6675
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/otype-to-size.h
@@ -0,0 +1,15 @@
+/* Non device/stack objects */
+case K_OBJ_MEM_SLAB: ret = sizeof(struct k_mem_slab); break;
+case K_OBJ_MSGQ: ret = sizeof(struct k_msgq); break;
+case K_OBJ_MUTEX: ret = sizeof(struct k_mutex); break;
+case K_OBJ_PIPE: ret = sizeof(struct k_pipe); break;
+case K_OBJ_QUEUE: ret = sizeof(struct k_queue); break;
+case K_OBJ_POLL_SIGNAL: ret = sizeof(struct k_poll_signal); break;
+case K_OBJ_SEM: ret = sizeof(struct k_sem); break;
+case K_OBJ_STACK: ret = sizeof(struct k_stack); break;
+case K_OBJ_THREAD: ret = sizeof(struct k_thread); break;
+case K_OBJ_TIMER: ret = sizeof(struct k_timer); break;
+case K_OBJ_CONDVAR: ret = sizeof(struct k_condvar); break;
+#ifdef CONFIG_EVENTS
+case K_OBJ_EVENT: ret = sizeof(struct k_event); break;
+#endif
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/otype-to-str.h b/nrfdemo/builddk/mcuboot/zephyr/include/generated/otype-to-str.h
new file mode 100644
index 0000000..1c88c48
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/otype-to-str.h
@@ -0,0 +1,118 @@
+/* Core kernel objects */
+case K_OBJ_MEM_SLAB: ret = "k_mem_slab"; break;
+case K_OBJ_MSGQ: ret = "k_msgq"; break;
+case K_OBJ_MUTEX: ret = "k_mutex"; break;
+case K_OBJ_PIPE: ret = "k_pipe"; break;
+case K_OBJ_QUEUE: ret = "k_queue"; break;
+case K_OBJ_POLL_SIGNAL: ret = "k_poll_signal"; break;
+case K_OBJ_SEM: ret = "k_sem"; break;
+case K_OBJ_STACK: ret = "k_stack"; break;
+case K_OBJ_THREAD: ret = "k_thread"; break;
+case K_OBJ_TIMER: ret = "k_timer"; break;
+case K_OBJ_THREAD_STACK_ELEMENT: ret = "z_thread_stack_element"; break;
+case K_OBJ_NET_SOCKET: ret = "NET_SOCKET"; break;
+case K_OBJ_NET_IF: ret = "net_if"; break;
+case K_OBJ_SYS_MUTEX: ret = "sys_mutex"; break;
+case K_OBJ_FUTEX: ret = "k_futex"; break;
+case K_OBJ_CONDVAR: ret = "k_condvar"; break;
+#ifdef CONFIG_EVENTS
+case K_OBJ_EVENT: ret = "k_event"; break;
+#endif
+#ifdef CONFIG_ZTEST
+case K_OBJ_ZTEST_SUITE_NODE: ret = "ztest_suite_node"; break;
+#endif
+#ifdef CONFIG_ZTEST
+case K_OBJ_ZTEST_SUITE_STATS: ret = "ztest_suite_stats"; break;
+#endif
+#ifdef CONFIG_ZTEST
+case K_OBJ_ZTEST_UNIT_TEST: ret = "ztest_unit_test"; break;
+#endif
+#ifdef CONFIG_ZTEST
+case K_OBJ_ZTEST_TEST_RULE: ret = "ztest_test_rule"; break;
+#endif
+#ifdef CONFIG_RTIO
+case K_OBJ_RTIO: ret = "rtio"; break;
+#endif
+#ifdef CONFIG_RTIO
+case K_OBJ_RTIO_IODEV: ret = "rtio_iodev"; break;
+#endif
+#ifdef CONFIG_SENSOR_ASYNC_API
+case K_OBJ_SENSOR_DECODER_API: ret = "sensor_decoder_api"; break;
+#endif
+/* Driver subsystems */
+case K_OBJ_DRIVER_FLASH: ret = "flash driver"; break;
+case K_OBJ_DRIVER_GPIO: ret = "gpio driver"; break;
+case K_OBJ_DRIVER_UART: ret = "uart driver"; break;
+case K_OBJ_DRIVER_SHARED_IRQ: ret = "shared_irq driver"; break;
+case K_OBJ_DRIVER_CRYPTO: ret = "crypto driver"; break;
+case K_OBJ_DRIVER_ADC: ret = "adc driver"; break;
+case K_OBJ_DRIVER_AUXDISPLAY: ret = "auxdisplay driver"; break;
+case K_OBJ_DRIVER_BBRAM: ret = "bbram driver"; break;
+case K_OBJ_DRIVER_CAN: ret = "can driver"; break;
+case K_OBJ_DRIVER_CELLULAR: ret = "cellular driver"; break;
+case K_OBJ_DRIVER_CHARGER: ret = "charger driver"; break;
+case K_OBJ_DRIVER_CLOCK_CONTROL: ret = "clock_control driver"; break;
+case K_OBJ_DRIVER_COREDUMP: ret = "coredump driver"; break;
+case K_OBJ_DRIVER_COUNTER: ret = "counter driver"; break;
+case K_OBJ_DRIVER_DAC: ret = "dac driver"; break;
+case K_OBJ_DRIVER_DAI: ret = "dai driver"; break;
+case K_OBJ_DRIVER_DISPLAY: ret = "display driver"; break;
+case K_OBJ_DRIVER_DMA: ret = "dma driver"; break;
+case K_OBJ_DRIVER_EDAC: ret = "edac driver"; break;
+case K_OBJ_DRIVER_EEPROM: ret = "eeprom driver"; break;
+case K_OBJ_DRIVER_EMUL_BBRAM: ret = "emul_bbram driver"; break;
+case K_OBJ_DRIVER_FUEL_GAUGE_EMUL: ret = "fuel_gauge_emul driver"; break;
+case K_OBJ_DRIVER_EMUL_SENSOR: ret = "emul_sensor driver"; break;
+case K_OBJ_DRIVER_ENTROPY: ret = "entropy driver"; break;
+case K_OBJ_DRIVER_ESPI: ret = "espi driver"; break;
+case K_OBJ_DRIVER_ESPI_SAF: ret = "espi_saf driver"; break;
+case K_OBJ_DRIVER_FPGA: ret = "fpga driver"; break;
+case K_OBJ_DRIVER_FUEL_GAUGE: ret = "fuel_gauge driver"; break;
+case K_OBJ_DRIVER_GNSS: ret = "gnss driver"; break;
+case K_OBJ_DRIVER_HWSPINLOCK: ret = "hwspinlock driver"; break;
+case K_OBJ_DRIVER_I2C: ret = "i2c driver"; break;
+case K_OBJ_DRIVER_I2C_TARGET: ret = "i2c_target driver"; break;
+case K_OBJ_DRIVER_I2S: ret = "i2s driver"; break;
+case K_OBJ_DRIVER_I3C: ret = "i3c driver"; break;
+case K_OBJ_DRIVER_IPM: ret = "ipm driver"; break;
+case K_OBJ_DRIVER_KSCAN: ret = "kscan driver"; break;
+case K_OBJ_DRIVER_LED: ret = "led driver"; break;
+case K_OBJ_DRIVER_LED_STRIP: ret = "led_strip driver"; break;
+case K_OBJ_DRIVER_LORA: ret = "lora driver"; break;
+case K_OBJ_DRIVER_MBOX: ret = "mbox driver"; break;
+case K_OBJ_DRIVER_MDIO: ret = "mdio driver"; break;
+case K_OBJ_DRIVER_MIPI_DBI: ret = "mipi_dbi driver"; break;
+case K_OBJ_DRIVER_MIPI_DSI: ret = "mipi_dsi driver"; break;
+case K_OBJ_DRIVER_PECI: ret = "peci driver"; break;
+case K_OBJ_DRIVER_PS2: ret = "ps2 driver"; break;
+case K_OBJ_DRIVER_PTP_CLOCK: ret = "ptp_clock driver"; break;
+case K_OBJ_DRIVER_PWM: ret = "pwm driver"; break;
+case K_OBJ_DRIVER_REGULATOR_PARENT: ret = "regulator_parent driver"; break;
+case K_OBJ_DRIVER_REGULATOR: ret = "regulator driver"; break;
+case K_OBJ_DRIVER_RESET: ret = "reset driver"; break;
+case K_OBJ_DRIVER_RETAINED_MEM: ret = "retained_mem driver"; break;
+case K_OBJ_DRIVER_RTC: ret = "rtc driver"; break;
+case K_OBJ_DRIVER_SDHC: ret = "sdhc driver"; break;
+case K_OBJ_DRIVER_SENSOR: ret = "sensor driver"; break;
+case K_OBJ_DRIVER_SMBUS: ret = "smbus driver"; break;
+case K_OBJ_DRIVER_SPI: ret = "spi driver"; break;
+case K_OBJ_DRIVER_SYSCON: ret = "syscon driver"; break;
+case K_OBJ_DRIVER_VIDEO: ret = "video driver"; break;
+case K_OBJ_DRIVER_W1: ret = "w1 driver"; break;
+case K_OBJ_DRIVER_WDT: ret = "wdt driver"; break;
+case K_OBJ_DRIVER_CAN_TRANSCEIVER: ret = "can_transceiver driver"; break;
+case K_OBJ_DRIVER_UART_MUX: ret = "uart_mux driver"; break;
+case K_OBJ_DRIVER_I3C_TARGET: ret = "i3c_target driver"; break;
+case K_OBJ_DRIVER_ITS: ret = "its driver"; break;
+case K_OBJ_DRIVER_VTD: ret = "vtd driver"; break;
+case K_OBJ_DRIVER_TGPIO: ret = "tgpio driver"; break;
+case K_OBJ_DRIVER_PCIE_CTRL: ret = "pcie_ctrl driver"; break;
+case K_OBJ_DRIVER_PCIE_EP: ret = "pcie_ep driver"; break;
+case K_OBJ_DRIVER_SVC: ret = "svc driver"; break;
+case K_OBJ_DRIVER_BC12_EMUL: ret = "bc12_emul driver"; break;
+case K_OBJ_DRIVER_BC12: ret = "bc12 driver"; break;
+case K_OBJ_DRIVER_USBC_PPC: ret = "usbc_ppc driver"; break;
+case K_OBJ_DRIVER_TCPC: ret = "tcpc driver"; break;
+case K_OBJ_DRIVER_USBC_VBUS: ret = "usbc_vbus driver"; break;
+case K_OBJ_DRIVER_IVSHMEM: ret = "ivshmem driver"; break;
+case K_OBJ_DRIVER_ETHPHY: ret = "ethphy driver"; break;
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/pm.yml b/nrfdemo/builddk/mcuboot/zephyr/include/generated/pm.yml
new file mode 100644
index 0000000..7d26fac
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/pm.yml
@@ -0,0 +1,27 @@
+mcuboot:
+  size: 0xc000
+  placement:
+    before: [mcuboot_primary]
+mcuboot_primary_app:
+  # All images to be placed in MCUboot's slot 0 should be placed in this
+  # partition
+  span: [app]
+mcuboot_primary:
+  span: [mcuboot_pad, mcuboot_primary_app]
+# Partition for secondary slot is not created if building in single application
+# slot configuration.
+mcuboot_secondary:
+  share_size: [mcuboot_primary]
+  placement:
+    align: {start: 0x8000}
+    align_next: 0x8000 # Ensure that the next partition does not interfere with this image
+    after: mcuboot_primary
+# Padding placed before image to boot. This reserves space for the MCUboot image header
+# and it ensures that the boot image gets linked with the correct address offset in flash.
+mcuboot_pad:
+    # MCUboot pad must be placed before the primary application partition.
+    # The primary application partition includes the secure firmware if present.
+  size: 0x200
+  placement:
+    before: [mcuboot_primary_app]
+    align: {start: 0x8000}
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/pm_config.h b/nrfdemo/builddk/mcuboot/zephyr/include/generated/pm_config.h
new file mode 100644
index 0000000..b1de502
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/pm_config.h
@@ -0,0 +1,170 @@
+/* File generated by /home/mike/Documents/ncs/v2.7.0/nrf/scripts/partition_manager_output.py, do not modify */
+#ifndef PM_CONFIG_H__
+#define PM_CONFIG_H__
+#define PM_MCUBOOT_OFFSET 0x0
+#define PM_MCUBOOT_ADDRESS 0x0
+#define PM_MCUBOOT_END_ADDRESS 0xc000
+#define PM_MCUBOOT_SIZE 0xc000
+#define PM_MCUBOOT_NAME mcuboot
+#define PM_MCUBOOT_ID 0
+#define PM_mcuboot_ID PM_MCUBOOT_ID
+#define PM_mcuboot_IS_ENABLED 1
+#define PM_0_LABEL MCUBOOT
+#define PM_MCUBOOT_DEV flash_controller
+#define PM_MCUBOOT_DEFAULT_DRIVER_KCONFIG CONFIG_SOC_FLASH_NRF
+#define PM_EMPTY_0_OFFSET 0xc000
+#define PM_EMPTY_0_ADDRESS 0xc000
+#define PM_EMPTY_0_END_ADDRESS 0x10000
+#define PM_EMPTY_0_SIZE 0x4000
+#define PM_EMPTY_0_NAME EMPTY_0
+#define PM_EMPTY_0_ID 1
+#define PM_empty_0_ID PM_EMPTY_0_ID
+#define PM_empty_0_IS_ENABLED 1
+#define PM_1_LABEL EMPTY_0
+#define PM_EMPTY_0_DEV flash_controller
+#define PM_EMPTY_0_DEFAULT_DRIVER_KCONFIG CONFIG_SOC_FLASH_NRF
+#define PM_MCUBOOT_PAD_OFFSET 0x10000
+#define PM_MCUBOOT_PAD_ADDRESS 0x10000
+#define PM_MCUBOOT_PAD_END_ADDRESS 0x10200
+#define PM_MCUBOOT_PAD_SIZE 0x200
+#define PM_MCUBOOT_PAD_NAME mcuboot_pad
+#define PM_MCUBOOT_PAD_ID 2
+#define PM_mcuboot_pad_ID PM_MCUBOOT_PAD_ID
+#define PM_mcuboot_pad_IS_ENABLED 1
+#define PM_2_LABEL MCUBOOT_PAD
+#define PM_MCUBOOT_PAD_DEV flash_controller
+#define PM_MCUBOOT_PAD_DEFAULT_DRIVER_KCONFIG CONFIG_SOC_FLASH_NRF
+#define PM_MCUBOOT_PRIMARY_OFFSET 0x10000
+#define PM_MCUBOOT_PRIMARY_ADDRESS 0x10000
+#define PM_MCUBOOT_PRIMARY_END_ADDRESS 0x88000
+#define PM_MCUBOOT_PRIMARY_SIZE 0x78000
+#define PM_MCUBOOT_PRIMARY_NAME mcuboot_primary
+#define PM_MCUBOOT_PRIMARY_ID 3
+#define PM_mcuboot_primary_ID PM_MCUBOOT_PRIMARY_ID
+#define PM_mcuboot_primary_IS_ENABLED 1
+#define PM_3_LABEL MCUBOOT_PRIMARY
+#define PM_MCUBOOT_PRIMARY_DEV flash_controller
+#define PM_MCUBOOT_PRIMARY_DEFAULT_DRIVER_KCONFIG CONFIG_SOC_FLASH_NRF
+#define PM_TFM_SECURE_OFFSET 0x10000
+#define PM_TFM_SECURE_ADDRESS 0x10000
+#define PM_TFM_SECURE_END_ADDRESS 0x18000
+#define PM_TFM_SECURE_SIZE 0x8000
+#define PM_TFM_SECURE_NAME tfm_secure
+#define PM_TFM_SECURE_ID 4
+#define PM_tfm_secure_ID PM_TFM_SECURE_ID
+#define PM_tfm_secure_IS_ENABLED 1
+#define PM_4_LABEL TFM_SECURE
+#define PM_TFM_SECURE_DEV flash_controller
+#define PM_TFM_SECURE_DEFAULT_DRIVER_KCONFIG CONFIG_SOC_FLASH_NRF
+#define PM_MCUBOOT_PRIMARY_APP_OFFSET 0x10200
+#define PM_MCUBOOT_PRIMARY_APP_ADDRESS 0x10200
+#define PM_MCUBOOT_PRIMARY_APP_END_ADDRESS 0x88000
+#define PM_MCUBOOT_PRIMARY_APP_SIZE 0x77e00
+#define PM_MCUBOOT_PRIMARY_APP_NAME mcuboot_primary_app
+#define PM_MCUBOOT_PRIMARY_APP_ID 5
+#define PM_mcuboot_primary_app_ID PM_MCUBOOT_PRIMARY_APP_ID
+#define PM_mcuboot_primary_app_IS_ENABLED 1
+#define PM_5_LABEL MCUBOOT_PRIMARY_APP
+#define PM_MCUBOOT_PRIMARY_APP_DEV flash_controller
+#define PM_MCUBOOT_PRIMARY_APP_DEFAULT_DRIVER_KCONFIG CONFIG_SOC_FLASH_NRF
+#define PM_TFM_OFFSET 0x10200
+#define PM_TFM_ADDRESS 0x10200
+#define PM_TFM_END_ADDRESS 0x18000
+#define PM_TFM_SIZE 0x7e00
+#define PM_TFM_NAME tfm
+#define PM_TFM_ID 6
+#define PM_tfm_ID PM_TFM_ID
+#define PM_tfm_IS_ENABLED 1
+#define PM_6_LABEL TFM
+#define PM_TFM_DEV flash_controller
+#define PM_TFM_DEFAULT_DRIVER_KCONFIG CONFIG_SOC_FLASH_NRF
+#define PM_APP_OFFSET 0x18000
+#define PM_APP_ADDRESS 0x18000
+#define PM_APP_END_ADDRESS 0x88000
+#define PM_APP_SIZE 0x70000
+#define PM_APP_NAME app
+#define PM_APP_ID 7
+#define PM_app_ID PM_APP_ID
+#define PM_app_IS_ENABLED 1
+#define PM_7_LABEL APP
+#define PM_APP_DEV flash_controller
+#define PM_APP_DEFAULT_DRIVER_KCONFIG CONFIG_SOC_FLASH_NRF
+#define PM_TFM_NONSECURE_OFFSET 0x18000
+#define PM_TFM_NONSECURE_ADDRESS 0x18000
+#define PM_TFM_NONSECURE_END_ADDRESS 0x88000
+#define PM_TFM_NONSECURE_SIZE 0x70000
+#define PM_TFM_NONSECURE_NAME tfm_nonsecure
+#define PM_TFM_NONSECURE_ID 8
+#define PM_tfm_nonsecure_ID PM_TFM_NONSECURE_ID
+#define PM_tfm_nonsecure_IS_ENABLED 1
+#define PM_8_LABEL TFM_NONSECURE
+#define PM_TFM_NONSECURE_DEV flash_controller
+#define PM_TFM_NONSECURE_DEFAULT_DRIVER_KCONFIG CONFIG_SOC_FLASH_NRF
+#define PM_MCUBOOT_SECONDARY_OFFSET 0x88000
+#define PM_MCUBOOT_SECONDARY_ADDRESS 0x88000
+#define PM_MCUBOOT_SECONDARY_END_ADDRESS 0x100000
+#define PM_MCUBOOT_SECONDARY_SIZE 0x78000
+#define PM_MCUBOOT_SECONDARY_NAME mcuboot_secondary
+#define PM_MCUBOOT_SECONDARY_ID 9
+#define PM_mcuboot_secondary_ID PM_MCUBOOT_SECONDARY_ID
+#define PM_mcuboot_secondary_IS_ENABLED 1
+#define PM_9_LABEL MCUBOOT_SECONDARY
+#define PM_MCUBOOT_SECONDARY_DEV flash_controller
+#define PM_MCUBOOT_SECONDARY_DEFAULT_DRIVER_KCONFIG CONFIG_SOC_FLASH_NRF
+#define PM_OTP_OFFSET 0x0
+#define PM_OTP_ADDRESS 0xff8108
+#define PM_OTP_END_ADDRESS 0xff83fc
+#define PM_OTP_SIZE 0x2f4
+#define PM_OTP_NAME otp
+#define PM_MCUBOOT_SRAM_OFFSET 0x0
+#define PM_MCUBOOT_SRAM_ADDRESS 0x20000000
+#define PM_MCUBOOT_SRAM_END_ADDRESS 0x20008000
+#define PM_MCUBOOT_SRAM_SIZE 0x8000
+#define PM_MCUBOOT_SRAM_NAME mcuboot_sram
+#define PM_SRAM_SECURE_OFFSET 0x0
+#define PM_SRAM_SECURE_ADDRESS 0x20000000
+#define PM_SRAM_SECURE_END_ADDRESS 0x20008000
+#define PM_SRAM_SECURE_SIZE 0x8000
+#define PM_SRAM_SECURE_NAME sram_secure
+#define PM_TFM_SRAM_OFFSET 0x0
+#define PM_TFM_SRAM_ADDRESS 0x20000000
+#define PM_TFM_SRAM_END_ADDRESS 0x20008000
+#define PM_TFM_SRAM_SIZE 0x8000
+#define PM_TFM_SRAM_NAME tfm_sram
+#define PM_NRF_MODEM_LIB_CTRL_OFFSET 0x8000
+#define PM_NRF_MODEM_LIB_CTRL_ADDRESS 0x20008000
+#define PM_NRF_MODEM_LIB_CTRL_END_ADDRESS 0x200084e8
+#define PM_NRF_MODEM_LIB_CTRL_SIZE 0x4e8
+#define PM_NRF_MODEM_LIB_CTRL_NAME nrf_modem_lib_ctrl
+#define PM_NRF_MODEM_LIB_SRAM_OFFSET 0x8000
+#define PM_NRF_MODEM_LIB_SRAM_ADDRESS 0x20008000
+#define PM_NRF_MODEM_LIB_SRAM_END_ADDRESS 0x2000c568
+#define PM_NRF_MODEM_LIB_SRAM_SIZE 0x4568
+#define PM_NRF_MODEM_LIB_SRAM_NAME nrf_modem_lib_sram
+#define PM_SRAM_NONSECURE_OFFSET 0x8000
+#define PM_SRAM_NONSECURE_ADDRESS 0x20008000
+#define PM_SRAM_NONSECURE_END_ADDRESS 0x20040000
+#define PM_SRAM_NONSECURE_SIZE 0x38000
+#define PM_SRAM_NONSECURE_NAME sram_nonsecure
+#define PM_NRF_MODEM_LIB_TX_OFFSET 0x84e8
+#define PM_NRF_MODEM_LIB_TX_ADDRESS 0x200084e8
+#define PM_NRF_MODEM_LIB_TX_END_ADDRESS 0x2000a568
+#define PM_NRF_MODEM_LIB_TX_SIZE 0x2080
+#define PM_NRF_MODEM_LIB_TX_NAME nrf_modem_lib_tx
+#define PM_NRF_MODEM_LIB_RX_OFFSET 0xa568
+#define PM_NRF_MODEM_LIB_RX_ADDRESS 0x2000a568
+#define PM_NRF_MODEM_LIB_RX_END_ADDRESS 0x2000c568
+#define PM_NRF_MODEM_LIB_RX_SIZE 0x2000
+#define PM_NRF_MODEM_LIB_RX_NAME nrf_modem_lib_rx
+#define PM_SRAM_PRIMARY_OFFSET 0xc568
+#define PM_SRAM_PRIMARY_ADDRESS 0x2000c568
+#define PM_SRAM_PRIMARY_END_ADDRESS 0x20040000
+#define PM_SRAM_PRIMARY_SIZE 0x33a98
+#define PM_SRAM_PRIMARY_NAME sram_primary
+#define PM_NUM 10
+#define PM_ALL_BY_SIZE "mcuboot_pad otp nrf_modem_lib_ctrl nrf_modem_lib_rx nrf_modem_lib_tx EMPTY_0 nrf_modem_lib_sram tfm tfm_sram mcuboot_sram sram_secure tfm_secure mcuboot sram_primary sram_nonsecure app tfm_nonsecure mcuboot_primary_app mcuboot_secondary mcuboot_primary"
+#define PM_ADDRESS 0x0
+#define PM_SIZE 0xc000
+#define PM_SRAM_ADDRESS 0x20000000
+#define PM_SRAM_SIZE 0x8000
+#endif /* PM_CONFIG_H__ */
\ No newline at end of file
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/snippets-data-sections.ld b/nrfdemo/builddk/mcuboot/zephyr/include/generated/snippets-data-sections.ld
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/snippets-data-sections.ld
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/snippets-dtcm-section.ld b/nrfdemo/builddk/mcuboot/zephyr/include/generated/snippets-dtcm-section.ld
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/snippets-dtcm-section.ld
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/snippets-itcm-section.ld b/nrfdemo/builddk/mcuboot/zephyr/include/generated/snippets-itcm-section.ld
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/snippets-itcm-section.ld
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/snippets-nocache-section.ld b/nrfdemo/builddk/mcuboot/zephyr/include/generated/snippets-nocache-section.ld
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/snippets-nocache-section.ld
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/snippets-noinit.ld b/nrfdemo/builddk/mcuboot/zephyr/include/generated/snippets-noinit.ld
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/snippets-noinit.ld
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/snippets-pinned-data-sections.ld b/nrfdemo/builddk/mcuboot/zephyr/include/generated/snippets-pinned-data-sections.ld
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/snippets-pinned-data-sections.ld
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/snippets-pinned-ram-sections.ld b/nrfdemo/builddk/mcuboot/zephyr/include/generated/snippets-pinned-ram-sections.ld
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/snippets-pinned-ram-sections.ld
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/snippets-pinned-rodata.ld b/nrfdemo/builddk/mcuboot/zephyr/include/generated/snippets-pinned-rodata.ld
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/snippets-pinned-rodata.ld
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/snippets-ram-sections.ld b/nrfdemo/builddk/mcuboot/zephyr/include/generated/snippets-ram-sections.ld
new file mode 100644
index 0000000..74bd87f
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/snippets-ram-sections.ld
@@ -0,0 +1 @@
+/* Sort key: "default" */#include "../arch/common/ramfunc.ld"
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/snippets-ramfunc-section.ld b/nrfdemo/builddk/mcuboot/zephyr/include/generated/snippets-ramfunc-section.ld
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/snippets-ramfunc-section.ld
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/snippets-rodata.ld b/nrfdemo/builddk/mcuboot/zephyr/include/generated/snippets-rodata.ld
new file mode 100644
index 0000000..27b783f
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/snippets-rodata.ld
@@ -0,0 +1 @@
+/* Sort key: "default" */#include "../arch/arm/core/swi_tables.ld"
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/snippets-rom-start.ld b/nrfdemo/builddk/mcuboot/zephyr/include/generated/snippets-rom-start.ld
new file mode 100644
index 0000000..4f6d2e6
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/snippets-rom-start.ld
@@ -0,0 +1,6 @@
+/* Sort key: "!" */#include "../arch/common/rom_start_address.ld"
+/* Sort key: "$" */#include "../arch/common/fill_with_zeros.ld"
+/* Sort key: "0x0" */#include "../arch/common/rom_start_offset.ld"
+/* Sort key: "0x0vectors" */#include "../arch/arm/core/vector_table.ld"
+/* Sort key: "0x0vectors" */#include "zephyr/linker/irq-vector-table-section.ld"
+/* Sort key: "0x1vectors" */#include "../arch/arm/core/cortex_m/vector_table_pad.ld"
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/snippets-rwdata.ld b/nrfdemo/builddk/mcuboot/zephyr/include/generated/snippets-rwdata.ld
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/snippets-rwdata.ld
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/snippets-sections.ld b/nrfdemo/builddk/mcuboot/zephyr/include/generated/snippets-sections.ld
new file mode 100644
index 0000000..d66bc33
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/snippets-sections.ld
@@ -0,0 +1,2 @@
+/* Sort key: "default" */#include "../soc/nordic/common/arm_platform_init.ld"
+/* Sort key: "default" */#include "zephyr/linker/intlist.ld"
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscall_dispatch.c b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscall_dispatch.c
new file mode 100644
index 0000000..3144bfe
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscall_dispatch.c
@@ -0,0 +1,802 @@
+/* auto-generated by gen_syscalls.py, don't edit */
+
+#include <zephyr/llext/symbol.h>
+
+/* Weak handler functions that get replaced by the real ones unless a system
+ * call is not implemented due to kernel configuration.
+ */
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_zephyr_read_stdin(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_zephyr_write_stdout(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_zephyr_fputc(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_zephyr_fwrite(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh___posix_clock_get_base(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_z_sys_mutex_kernel_lock(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_z_sys_mutex_kernel_unlock(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_z_log_msg_simple_create_0(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_z_log_msg_simple_create_1(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_z_log_msg_simple_create_2(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_z_log_msg_static_create(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_log_panic(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_log_process(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_log_buffered_cnt(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_log_filter_set(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_log_frontend_filter_set(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_flash_read(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_flash_write(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_flash_erase(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_flash_get_page_info_by_offs(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_flash_get_page_info_by_idx(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_flash_get_page_count(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_flash_sfdp_read(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_flash_read_jedec_id(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_flash_get_write_block_size(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_flash_get_parameters(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_flash_ex_op(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_gpio_pin_interrupt_configure(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_gpio_pin_configure(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_gpio_port_get_direction(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_gpio_pin_get_config(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_gpio_port_get_raw(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_gpio_port_set_masked_raw(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_gpio_port_set_bits_raw(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_gpio_port_clear_bits_raw(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_gpio_port_toggle_bits(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_gpio_get_pending_int(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_uart_err_check(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_uart_poll_in(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_uart_poll_in_u16(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_uart_poll_out(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_uart_poll_out_u16(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_uart_configure(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_uart_config_get(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_uart_irq_tx_enable(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_uart_irq_tx_disable(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_uart_irq_rx_enable(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_uart_irq_rx_disable(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_uart_irq_err_enable(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_uart_irq_err_disable(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_uart_irq_is_pending(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_uart_irq_update(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_uart_tx(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_uart_tx_u16(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_uart_tx_abort(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_uart_rx_enable(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_uart_rx_enable_u16(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_uart_rx_disable(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_uart_line_ctrl_set(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_uart_line_ctrl_get(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_uart_drv_cmd(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_device_get_binding(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_device_is_ready(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_device_init(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_k_thread_stack_alloc(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_k_thread_stack_free(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_k_thread_create(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_k_thread_stack_space_get(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_k_thread_join(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_k_sleep(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_k_usleep(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_k_busy_wait(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_k_yield(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_k_wakeup(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_k_sched_current_thread_query(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_k_thread_abort(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_k_thread_start(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_k_thread_timeout_expires_ticks(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_k_thread_timeout_remaining_ticks(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_k_thread_priority_get(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_k_thread_priority_set(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_k_thread_deadline_set(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_k_thread_suspend(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_k_thread_resume(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_k_is_preempt_thread(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_k_thread_custom_data_set(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_k_thread_custom_data_get(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_k_thread_name_set(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_k_thread_name_copy(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_k_timer_start(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_k_timer_stop(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_k_timer_status_get(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_k_timer_status_sync(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_k_timer_expires_ticks(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_k_timer_remaining_ticks(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_k_timer_user_data_set(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_k_timer_user_data_get(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_k_uptime_ticks(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_k_queue_init(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_k_queue_cancel_wait(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_k_queue_alloc_append(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_k_queue_alloc_prepend(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_k_queue_get(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_k_queue_is_empty(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_k_queue_peek_head(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_k_queue_peek_tail(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_k_futex_wait(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_k_futex_wake(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_k_event_init(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_k_event_post(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_k_event_set(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_k_event_set_masked(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_k_event_clear(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_k_event_wait(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_k_event_wait_all(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_k_stack_alloc_init(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_k_stack_push(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_k_stack_pop(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_k_mutex_init(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_k_mutex_lock(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_k_mutex_unlock(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_k_condvar_init(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_k_condvar_signal(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_k_condvar_broadcast(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_k_condvar_wait(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_k_sem_init(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_k_sem_take(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_k_sem_give(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_k_sem_reset(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_k_sem_count_get(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_k_msgq_alloc_init(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_k_msgq_put(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_k_msgq_get(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_k_msgq_peek(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_k_msgq_peek_at(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_k_msgq_purge(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_k_msgq_num_free_get(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_k_msgq_get_attrs(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_k_msgq_num_used_get(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_k_pipe_alloc_init(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_k_pipe_put(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_k_pipe_get(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_k_pipe_read_avail(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_k_pipe_write_avail(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_k_pipe_flush(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_k_pipe_buffer_flush(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_k_poll(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_k_poll_signal_init(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_k_poll_signal_reset(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_k_poll_signal_check(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_k_poll_signal_raise(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_k_str_out(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_k_float_disable(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_k_float_enable(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_k_object_alloc_size(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_sys_clock_hw_cycles_per_sec_runtime_get(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+__weak ALIAS_OF(handler_no_syscall)
+uintptr_t z_mrsh_z_errno(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3,
+         uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+extern uintptr_t z_mrsh_k_object_release(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+extern uintptr_t z_mrsh_k_object_access_grant(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+extern uintptr_t z_mrsh_k_object_alloc(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, void *ssf);
+
+const _k_syscall_handler_t _k_syscall_table[K_SYSCALL_LIMIT] = {
+	[K_SYSCALL_ZEPHYR_READ_STDIN] = z_mrsh_zephyr_read_stdin,
+	[K_SYSCALL_ZEPHYR_WRITE_STDOUT] = z_mrsh_zephyr_write_stdout,
+	[K_SYSCALL_ZEPHYR_FPUTC] = z_mrsh_zephyr_fputc,
+	[K_SYSCALL_ZEPHYR_FWRITE] = z_mrsh_zephyr_fwrite,
+	[K_SYSCALL___POSIX_CLOCK_GET_BASE] = z_mrsh___posix_clock_get_base,
+	[K_SYSCALL_Z_SYS_MUTEX_KERNEL_LOCK] = z_mrsh_z_sys_mutex_kernel_lock,
+	[K_SYSCALL_Z_SYS_MUTEX_KERNEL_UNLOCK] = z_mrsh_z_sys_mutex_kernel_unlock,
+	[K_SYSCALL_Z_LOG_MSG_SIMPLE_CREATE_0] = z_mrsh_z_log_msg_simple_create_0,
+	[K_SYSCALL_Z_LOG_MSG_SIMPLE_CREATE_1] = z_mrsh_z_log_msg_simple_create_1,
+	[K_SYSCALL_Z_LOG_MSG_SIMPLE_CREATE_2] = z_mrsh_z_log_msg_simple_create_2,
+	[K_SYSCALL_Z_LOG_MSG_STATIC_CREATE] = z_mrsh_z_log_msg_static_create,
+	[K_SYSCALL_LOG_PANIC] = z_mrsh_log_panic,
+	[K_SYSCALL_LOG_PROCESS] = z_mrsh_log_process,
+	[K_SYSCALL_LOG_BUFFERED_CNT] = z_mrsh_log_buffered_cnt,
+	[K_SYSCALL_LOG_FILTER_SET] = z_mrsh_log_filter_set,
+	[K_SYSCALL_LOG_FRONTEND_FILTER_SET] = z_mrsh_log_frontend_filter_set,
+	[K_SYSCALL_FLASH_READ] = z_mrsh_flash_read,
+	[K_SYSCALL_FLASH_WRITE] = z_mrsh_flash_write,
+	[K_SYSCALL_FLASH_ERASE] = z_mrsh_flash_erase,
+	[K_SYSCALL_FLASH_GET_PAGE_INFO_BY_OFFS] = z_mrsh_flash_get_page_info_by_offs,
+	[K_SYSCALL_FLASH_GET_PAGE_INFO_BY_IDX] = z_mrsh_flash_get_page_info_by_idx,
+	[K_SYSCALL_FLASH_GET_PAGE_COUNT] = z_mrsh_flash_get_page_count,
+	[K_SYSCALL_FLASH_SFDP_READ] = z_mrsh_flash_sfdp_read,
+	[K_SYSCALL_FLASH_READ_JEDEC_ID] = z_mrsh_flash_read_jedec_id,
+	[K_SYSCALL_FLASH_GET_WRITE_BLOCK_SIZE] = z_mrsh_flash_get_write_block_size,
+	[K_SYSCALL_FLASH_GET_PARAMETERS] = z_mrsh_flash_get_parameters,
+	[K_SYSCALL_FLASH_EX_OP] = z_mrsh_flash_ex_op,
+	[K_SYSCALL_GPIO_PIN_INTERRUPT_CONFIGURE] = z_mrsh_gpio_pin_interrupt_configure,
+	[K_SYSCALL_GPIO_PIN_CONFIGURE] = z_mrsh_gpio_pin_configure,
+	[K_SYSCALL_GPIO_PORT_GET_DIRECTION] = z_mrsh_gpio_port_get_direction,
+	[K_SYSCALL_GPIO_PIN_GET_CONFIG] = z_mrsh_gpio_pin_get_config,
+	[K_SYSCALL_GPIO_PORT_GET_RAW] = z_mrsh_gpio_port_get_raw,
+	[K_SYSCALL_GPIO_PORT_SET_MASKED_RAW] = z_mrsh_gpio_port_set_masked_raw,
+	[K_SYSCALL_GPIO_PORT_SET_BITS_RAW] = z_mrsh_gpio_port_set_bits_raw,
+	[K_SYSCALL_GPIO_PORT_CLEAR_BITS_RAW] = z_mrsh_gpio_port_clear_bits_raw,
+	[K_SYSCALL_GPIO_PORT_TOGGLE_BITS] = z_mrsh_gpio_port_toggle_bits,
+	[K_SYSCALL_GPIO_GET_PENDING_INT] = z_mrsh_gpio_get_pending_int,
+	[K_SYSCALL_UART_ERR_CHECK] = z_mrsh_uart_err_check,
+	[K_SYSCALL_UART_POLL_IN] = z_mrsh_uart_poll_in,
+	[K_SYSCALL_UART_POLL_IN_U16] = z_mrsh_uart_poll_in_u16,
+	[K_SYSCALL_UART_POLL_OUT] = z_mrsh_uart_poll_out,
+	[K_SYSCALL_UART_POLL_OUT_U16] = z_mrsh_uart_poll_out_u16,
+	[K_SYSCALL_UART_CONFIGURE] = z_mrsh_uart_configure,
+	[K_SYSCALL_UART_CONFIG_GET] = z_mrsh_uart_config_get,
+	[K_SYSCALL_UART_IRQ_TX_ENABLE] = z_mrsh_uart_irq_tx_enable,
+	[K_SYSCALL_UART_IRQ_TX_DISABLE] = z_mrsh_uart_irq_tx_disable,
+	[K_SYSCALL_UART_IRQ_RX_ENABLE] = z_mrsh_uart_irq_rx_enable,
+	[K_SYSCALL_UART_IRQ_RX_DISABLE] = z_mrsh_uart_irq_rx_disable,
+	[K_SYSCALL_UART_IRQ_ERR_ENABLE] = z_mrsh_uart_irq_err_enable,
+	[K_SYSCALL_UART_IRQ_ERR_DISABLE] = z_mrsh_uart_irq_err_disable,
+	[K_SYSCALL_UART_IRQ_IS_PENDING] = z_mrsh_uart_irq_is_pending,
+	[K_SYSCALL_UART_IRQ_UPDATE] = z_mrsh_uart_irq_update,
+	[K_SYSCALL_UART_TX] = z_mrsh_uart_tx,
+	[K_SYSCALL_UART_TX_U16] = z_mrsh_uart_tx_u16,
+	[K_SYSCALL_UART_TX_ABORT] = z_mrsh_uart_tx_abort,
+	[K_SYSCALL_UART_RX_ENABLE] = z_mrsh_uart_rx_enable,
+	[K_SYSCALL_UART_RX_ENABLE_U16] = z_mrsh_uart_rx_enable_u16,
+	[K_SYSCALL_UART_RX_DISABLE] = z_mrsh_uart_rx_disable,
+	[K_SYSCALL_UART_LINE_CTRL_SET] = z_mrsh_uart_line_ctrl_set,
+	[K_SYSCALL_UART_LINE_CTRL_GET] = z_mrsh_uart_line_ctrl_get,
+	[K_SYSCALL_UART_DRV_CMD] = z_mrsh_uart_drv_cmd,
+	[K_SYSCALL_DEVICE_GET_BINDING] = z_mrsh_device_get_binding,
+	[K_SYSCALL_DEVICE_IS_READY] = z_mrsh_device_is_ready,
+	[K_SYSCALL_DEVICE_INIT] = z_mrsh_device_init,
+	[K_SYSCALL_K_THREAD_STACK_ALLOC] = z_mrsh_k_thread_stack_alloc,
+	[K_SYSCALL_K_THREAD_STACK_FREE] = z_mrsh_k_thread_stack_free,
+	[K_SYSCALL_K_THREAD_CREATE] = z_mrsh_k_thread_create,
+	[K_SYSCALL_K_THREAD_STACK_SPACE_GET] = z_mrsh_k_thread_stack_space_get,
+	[K_SYSCALL_K_THREAD_JOIN] = z_mrsh_k_thread_join,
+	[K_SYSCALL_K_SLEEP] = z_mrsh_k_sleep,
+	[K_SYSCALL_K_USLEEP] = z_mrsh_k_usleep,
+	[K_SYSCALL_K_BUSY_WAIT] = z_mrsh_k_busy_wait,
+	[K_SYSCALL_K_YIELD] = z_mrsh_k_yield,
+	[K_SYSCALL_K_WAKEUP] = z_mrsh_k_wakeup,
+	[K_SYSCALL_K_SCHED_CURRENT_THREAD_QUERY] = z_mrsh_k_sched_current_thread_query,
+	[K_SYSCALL_K_THREAD_ABORT] = z_mrsh_k_thread_abort,
+	[K_SYSCALL_K_THREAD_START] = z_mrsh_k_thread_start,
+	[K_SYSCALL_K_THREAD_TIMEOUT_EXPIRES_TICKS] = z_mrsh_k_thread_timeout_expires_ticks,
+	[K_SYSCALL_K_THREAD_TIMEOUT_REMAINING_TICKS] = z_mrsh_k_thread_timeout_remaining_ticks,
+	[K_SYSCALL_K_THREAD_PRIORITY_GET] = z_mrsh_k_thread_priority_get,
+	[K_SYSCALL_K_THREAD_PRIORITY_SET] = z_mrsh_k_thread_priority_set,
+	[K_SYSCALL_K_THREAD_DEADLINE_SET] = z_mrsh_k_thread_deadline_set,
+	[K_SYSCALL_K_THREAD_SUSPEND] = z_mrsh_k_thread_suspend,
+	[K_SYSCALL_K_THREAD_RESUME] = z_mrsh_k_thread_resume,
+	[K_SYSCALL_K_IS_PREEMPT_THREAD] = z_mrsh_k_is_preempt_thread,
+	[K_SYSCALL_K_THREAD_CUSTOM_DATA_SET] = z_mrsh_k_thread_custom_data_set,
+	[K_SYSCALL_K_THREAD_CUSTOM_DATA_GET] = z_mrsh_k_thread_custom_data_get,
+	[K_SYSCALL_K_THREAD_NAME_SET] = z_mrsh_k_thread_name_set,
+	[K_SYSCALL_K_THREAD_NAME_COPY] = z_mrsh_k_thread_name_copy,
+	[K_SYSCALL_K_TIMER_START] = z_mrsh_k_timer_start,
+	[K_SYSCALL_K_TIMER_STOP] = z_mrsh_k_timer_stop,
+	[K_SYSCALL_K_TIMER_STATUS_GET] = z_mrsh_k_timer_status_get,
+	[K_SYSCALL_K_TIMER_STATUS_SYNC] = z_mrsh_k_timer_status_sync,
+	[K_SYSCALL_K_TIMER_EXPIRES_TICKS] = z_mrsh_k_timer_expires_ticks,
+	[K_SYSCALL_K_TIMER_REMAINING_TICKS] = z_mrsh_k_timer_remaining_ticks,
+	[K_SYSCALL_K_TIMER_USER_DATA_SET] = z_mrsh_k_timer_user_data_set,
+	[K_SYSCALL_K_TIMER_USER_DATA_GET] = z_mrsh_k_timer_user_data_get,
+	[K_SYSCALL_K_UPTIME_TICKS] = z_mrsh_k_uptime_ticks,
+	[K_SYSCALL_K_QUEUE_INIT] = z_mrsh_k_queue_init,
+	[K_SYSCALL_K_QUEUE_CANCEL_WAIT] = z_mrsh_k_queue_cancel_wait,
+	[K_SYSCALL_K_QUEUE_ALLOC_APPEND] = z_mrsh_k_queue_alloc_append,
+	[K_SYSCALL_K_QUEUE_ALLOC_PREPEND] = z_mrsh_k_queue_alloc_prepend,
+	[K_SYSCALL_K_QUEUE_GET] = z_mrsh_k_queue_get,
+	[K_SYSCALL_K_QUEUE_IS_EMPTY] = z_mrsh_k_queue_is_empty,
+	[K_SYSCALL_K_QUEUE_PEEK_HEAD] = z_mrsh_k_queue_peek_head,
+	[K_SYSCALL_K_QUEUE_PEEK_TAIL] = z_mrsh_k_queue_peek_tail,
+	[K_SYSCALL_K_FUTEX_WAIT] = z_mrsh_k_futex_wait,
+	[K_SYSCALL_K_FUTEX_WAKE] = z_mrsh_k_futex_wake,
+	[K_SYSCALL_K_EVENT_INIT] = z_mrsh_k_event_init,
+	[K_SYSCALL_K_EVENT_POST] = z_mrsh_k_event_post,
+	[K_SYSCALL_K_EVENT_SET] = z_mrsh_k_event_set,
+	[K_SYSCALL_K_EVENT_SET_MASKED] = z_mrsh_k_event_set_masked,
+	[K_SYSCALL_K_EVENT_CLEAR] = z_mrsh_k_event_clear,
+	[K_SYSCALL_K_EVENT_WAIT] = z_mrsh_k_event_wait,
+	[K_SYSCALL_K_EVENT_WAIT_ALL] = z_mrsh_k_event_wait_all,
+	[K_SYSCALL_K_STACK_ALLOC_INIT] = z_mrsh_k_stack_alloc_init,
+	[K_SYSCALL_K_STACK_PUSH] = z_mrsh_k_stack_push,
+	[K_SYSCALL_K_STACK_POP] = z_mrsh_k_stack_pop,
+	[K_SYSCALL_K_MUTEX_INIT] = z_mrsh_k_mutex_init,
+	[K_SYSCALL_K_MUTEX_LOCK] = z_mrsh_k_mutex_lock,
+	[K_SYSCALL_K_MUTEX_UNLOCK] = z_mrsh_k_mutex_unlock,
+	[K_SYSCALL_K_CONDVAR_INIT] = z_mrsh_k_condvar_init,
+	[K_SYSCALL_K_CONDVAR_SIGNAL] = z_mrsh_k_condvar_signal,
+	[K_SYSCALL_K_CONDVAR_BROADCAST] = z_mrsh_k_condvar_broadcast,
+	[K_SYSCALL_K_CONDVAR_WAIT] = z_mrsh_k_condvar_wait,
+	[K_SYSCALL_K_SEM_INIT] = z_mrsh_k_sem_init,
+	[K_SYSCALL_K_SEM_TAKE] = z_mrsh_k_sem_take,
+	[K_SYSCALL_K_SEM_GIVE] = z_mrsh_k_sem_give,
+	[K_SYSCALL_K_SEM_RESET] = z_mrsh_k_sem_reset,
+	[K_SYSCALL_K_SEM_COUNT_GET] = z_mrsh_k_sem_count_get,
+	[K_SYSCALL_K_MSGQ_ALLOC_INIT] = z_mrsh_k_msgq_alloc_init,
+	[K_SYSCALL_K_MSGQ_PUT] = z_mrsh_k_msgq_put,
+	[K_SYSCALL_K_MSGQ_GET] = z_mrsh_k_msgq_get,
+	[K_SYSCALL_K_MSGQ_PEEK] = z_mrsh_k_msgq_peek,
+	[K_SYSCALL_K_MSGQ_PEEK_AT] = z_mrsh_k_msgq_peek_at,
+	[K_SYSCALL_K_MSGQ_PURGE] = z_mrsh_k_msgq_purge,
+	[K_SYSCALL_K_MSGQ_NUM_FREE_GET] = z_mrsh_k_msgq_num_free_get,
+	[K_SYSCALL_K_MSGQ_GET_ATTRS] = z_mrsh_k_msgq_get_attrs,
+	[K_SYSCALL_K_MSGQ_NUM_USED_GET] = z_mrsh_k_msgq_num_used_get,
+	[K_SYSCALL_K_PIPE_ALLOC_INIT] = z_mrsh_k_pipe_alloc_init,
+	[K_SYSCALL_K_PIPE_PUT] = z_mrsh_k_pipe_put,
+	[K_SYSCALL_K_PIPE_GET] = z_mrsh_k_pipe_get,
+	[K_SYSCALL_K_PIPE_READ_AVAIL] = z_mrsh_k_pipe_read_avail,
+	[K_SYSCALL_K_PIPE_WRITE_AVAIL] = z_mrsh_k_pipe_write_avail,
+	[K_SYSCALL_K_PIPE_FLUSH] = z_mrsh_k_pipe_flush,
+	[K_SYSCALL_K_PIPE_BUFFER_FLUSH] = z_mrsh_k_pipe_buffer_flush,
+	[K_SYSCALL_K_POLL] = z_mrsh_k_poll,
+	[K_SYSCALL_K_POLL_SIGNAL_INIT] = z_mrsh_k_poll_signal_init,
+	[K_SYSCALL_K_POLL_SIGNAL_RESET] = z_mrsh_k_poll_signal_reset,
+	[K_SYSCALL_K_POLL_SIGNAL_CHECK] = z_mrsh_k_poll_signal_check,
+	[K_SYSCALL_K_POLL_SIGNAL_RAISE] = z_mrsh_k_poll_signal_raise,
+	[K_SYSCALL_K_STR_OUT] = z_mrsh_k_str_out,
+	[K_SYSCALL_K_FLOAT_DISABLE] = z_mrsh_k_float_disable,
+	[K_SYSCALL_K_FLOAT_ENABLE] = z_mrsh_k_float_enable,
+	[K_SYSCALL_K_OBJECT_ACCESS_GRANT] = z_mrsh_k_object_access_grant,
+	[K_SYSCALL_K_OBJECT_RELEASE] = z_mrsh_k_object_release,
+	[K_SYSCALL_K_OBJECT_ALLOC] = z_mrsh_k_object_alloc,
+	[K_SYSCALL_K_OBJECT_ALLOC_SIZE] = z_mrsh_k_object_alloc_size,
+	[K_SYSCALL_SYS_CLOCK_HW_CYCLES_PER_SEC_RUNTIME_GET] = z_mrsh_sys_clock_hw_cycles_per_sec_runtime_get,
+	[K_SYSCALL_Z_ERRNO] = z_mrsh_z_errno,
+	[K_SYSCALL_BAD] = handler_bad_syscall
+};
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscall_export_llext.c b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscall_export_llext.c
new file mode 100644
index 0000000..df8d3fb
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscall_export_llext.c
@@ -0,0 +1,329 @@
+
+/* Export syscalls for extensions */
+static void * const no_handler = NULL;
+
+/* Weak references, if something is not found by the linker, it will be NULL
+ * and simply fail during extension load
+ */
+extern __weak ALIAS_OF(no_handler) void * const z_impl_zephyr_read_stdin;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_zephyr_write_stdout;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_zephyr_fputc;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_zephyr_fwrite;
+extern __weak ALIAS_OF(no_handler) void * const z_impl___posix_clock_get_base;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_z_sys_mutex_kernel_lock;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_z_sys_mutex_kernel_unlock;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_z_log_msg_simple_create_0;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_z_log_msg_simple_create_1;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_z_log_msg_simple_create_2;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_z_log_msg_static_create;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_log_panic;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_log_process;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_log_buffered_cnt;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_log_filter_set;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_log_frontend_filter_set;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_flash_read;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_flash_write;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_flash_erase;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_flash_get_page_info_by_offs;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_flash_get_page_info_by_idx;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_flash_get_page_count;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_flash_sfdp_read;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_flash_read_jedec_id;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_flash_get_write_block_size;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_flash_get_parameters;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_flash_ex_op;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_gpio_pin_interrupt_configure;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_gpio_pin_configure;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_gpio_port_get_direction;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_gpio_pin_get_config;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_gpio_port_get_raw;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_gpio_port_set_masked_raw;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_gpio_port_set_bits_raw;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_gpio_port_clear_bits_raw;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_gpio_port_toggle_bits;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_gpio_get_pending_int;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_uart_err_check;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_uart_poll_in;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_uart_poll_in_u16;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_uart_poll_out;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_uart_poll_out_u16;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_uart_configure;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_uart_config_get;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_uart_irq_tx_enable;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_uart_irq_tx_disable;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_uart_irq_rx_enable;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_uart_irq_rx_disable;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_uart_irq_err_enable;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_uart_irq_err_disable;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_uart_irq_is_pending;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_uart_irq_update;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_uart_tx;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_uart_tx_u16;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_uart_tx_abort;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_uart_rx_enable;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_uart_rx_enable_u16;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_uart_rx_disable;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_uart_line_ctrl_set;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_uart_line_ctrl_get;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_uart_drv_cmd;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_device_get_binding;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_device_is_ready;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_device_init;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_k_thread_stack_alloc;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_k_thread_stack_free;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_k_thread_create;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_k_thread_stack_space_get;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_k_thread_join;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_k_sleep;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_k_usleep;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_k_busy_wait;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_k_yield;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_k_wakeup;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_k_sched_current_thread_query;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_k_thread_abort;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_k_thread_start;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_k_thread_timeout_expires_ticks;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_k_thread_timeout_remaining_ticks;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_k_thread_priority_get;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_k_thread_priority_set;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_k_thread_deadline_set;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_k_thread_suspend;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_k_thread_resume;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_k_is_preempt_thread;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_k_thread_custom_data_set;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_k_thread_custom_data_get;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_k_thread_name_set;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_k_thread_name_copy;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_k_timer_start;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_k_timer_stop;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_k_timer_status_get;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_k_timer_status_sync;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_k_timer_expires_ticks;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_k_timer_remaining_ticks;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_k_timer_user_data_set;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_k_timer_user_data_get;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_k_uptime_ticks;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_k_queue_init;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_k_queue_cancel_wait;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_k_queue_alloc_append;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_k_queue_alloc_prepend;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_k_queue_get;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_k_queue_is_empty;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_k_queue_peek_head;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_k_queue_peek_tail;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_k_futex_wait;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_k_futex_wake;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_k_event_init;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_k_event_post;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_k_event_set;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_k_event_set_masked;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_k_event_clear;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_k_event_wait;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_k_event_wait_all;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_k_stack_alloc_init;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_k_stack_push;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_k_stack_pop;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_k_mutex_init;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_k_mutex_lock;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_k_mutex_unlock;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_k_condvar_init;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_k_condvar_signal;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_k_condvar_broadcast;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_k_condvar_wait;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_k_sem_init;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_k_sem_take;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_k_sem_give;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_k_sem_reset;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_k_sem_count_get;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_k_msgq_alloc_init;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_k_msgq_put;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_k_msgq_get;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_k_msgq_peek;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_k_msgq_peek_at;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_k_msgq_purge;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_k_msgq_num_free_get;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_k_msgq_get_attrs;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_k_msgq_num_used_get;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_k_pipe_alloc_init;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_k_pipe_put;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_k_pipe_get;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_k_pipe_read_avail;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_k_pipe_write_avail;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_k_pipe_flush;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_k_pipe_buffer_flush;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_k_poll;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_k_poll_signal_init;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_k_poll_signal_reset;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_k_poll_signal_check;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_k_poll_signal_raise;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_k_str_out;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_k_float_disable;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_k_float_enable;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_k_object_access_grant;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_k_object_release;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_k_object_alloc;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_k_object_alloc_size;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_sys_clock_hw_cycles_per_sec_runtime_get;
+extern __weak ALIAS_OF(no_handler) void * const z_impl_z_errno;
+
+/* Exported symbols */
+EXPORT_SYMBOL(z_impl_zephyr_read_stdin);
+EXPORT_SYMBOL(z_impl_zephyr_write_stdout);
+EXPORT_SYMBOL(z_impl_zephyr_fputc);
+EXPORT_SYMBOL(z_impl_zephyr_fwrite);
+EXPORT_SYMBOL(z_impl___posix_clock_get_base);
+EXPORT_SYMBOL(z_impl_z_sys_mutex_kernel_lock);
+EXPORT_SYMBOL(z_impl_z_sys_mutex_kernel_unlock);
+EXPORT_SYMBOL(z_impl_z_log_msg_simple_create_0);
+EXPORT_SYMBOL(z_impl_z_log_msg_simple_create_1);
+EXPORT_SYMBOL(z_impl_z_log_msg_simple_create_2);
+EXPORT_SYMBOL(z_impl_z_log_msg_static_create);
+EXPORT_SYMBOL(z_impl_log_panic);
+EXPORT_SYMBOL(z_impl_log_process);
+EXPORT_SYMBOL(z_impl_log_buffered_cnt);
+EXPORT_SYMBOL(z_impl_log_filter_set);
+EXPORT_SYMBOL(z_impl_log_frontend_filter_set);
+EXPORT_SYMBOL(z_impl_flash_read);
+EXPORT_SYMBOL(z_impl_flash_write);
+EXPORT_SYMBOL(z_impl_flash_erase);
+EXPORT_SYMBOL(z_impl_flash_get_page_info_by_offs);
+EXPORT_SYMBOL(z_impl_flash_get_page_info_by_idx);
+EXPORT_SYMBOL(z_impl_flash_get_page_count);
+EXPORT_SYMBOL(z_impl_flash_sfdp_read);
+EXPORT_SYMBOL(z_impl_flash_read_jedec_id);
+EXPORT_SYMBOL(z_impl_flash_get_write_block_size);
+EXPORT_SYMBOL(z_impl_flash_get_parameters);
+EXPORT_SYMBOL(z_impl_flash_ex_op);
+EXPORT_SYMBOL(z_impl_gpio_pin_interrupt_configure);
+EXPORT_SYMBOL(z_impl_gpio_pin_configure);
+EXPORT_SYMBOL(z_impl_gpio_port_get_direction);
+EXPORT_SYMBOL(z_impl_gpio_pin_get_config);
+EXPORT_SYMBOL(z_impl_gpio_port_get_raw);
+EXPORT_SYMBOL(z_impl_gpio_port_set_masked_raw);
+EXPORT_SYMBOL(z_impl_gpio_port_set_bits_raw);
+EXPORT_SYMBOL(z_impl_gpio_port_clear_bits_raw);
+EXPORT_SYMBOL(z_impl_gpio_port_toggle_bits);
+EXPORT_SYMBOL(z_impl_gpio_get_pending_int);
+EXPORT_SYMBOL(z_impl_uart_err_check);
+EXPORT_SYMBOL(z_impl_uart_poll_in);
+EXPORT_SYMBOL(z_impl_uart_poll_in_u16);
+EXPORT_SYMBOL(z_impl_uart_poll_out);
+EXPORT_SYMBOL(z_impl_uart_poll_out_u16);
+EXPORT_SYMBOL(z_impl_uart_configure);
+EXPORT_SYMBOL(z_impl_uart_config_get);
+EXPORT_SYMBOL(z_impl_uart_irq_tx_enable);
+EXPORT_SYMBOL(z_impl_uart_irq_tx_disable);
+EXPORT_SYMBOL(z_impl_uart_irq_rx_enable);
+EXPORT_SYMBOL(z_impl_uart_irq_rx_disable);
+EXPORT_SYMBOL(z_impl_uart_irq_err_enable);
+EXPORT_SYMBOL(z_impl_uart_irq_err_disable);
+EXPORT_SYMBOL(z_impl_uart_irq_is_pending);
+EXPORT_SYMBOL(z_impl_uart_irq_update);
+EXPORT_SYMBOL(z_impl_uart_tx);
+EXPORT_SYMBOL(z_impl_uart_tx_u16);
+EXPORT_SYMBOL(z_impl_uart_tx_abort);
+EXPORT_SYMBOL(z_impl_uart_rx_enable);
+EXPORT_SYMBOL(z_impl_uart_rx_enable_u16);
+EXPORT_SYMBOL(z_impl_uart_rx_disable);
+EXPORT_SYMBOL(z_impl_uart_line_ctrl_set);
+EXPORT_SYMBOL(z_impl_uart_line_ctrl_get);
+EXPORT_SYMBOL(z_impl_uart_drv_cmd);
+EXPORT_SYMBOL(z_impl_device_get_binding);
+EXPORT_SYMBOL(z_impl_device_is_ready);
+EXPORT_SYMBOL(z_impl_device_init);
+EXPORT_SYMBOL(z_impl_k_thread_stack_alloc);
+EXPORT_SYMBOL(z_impl_k_thread_stack_free);
+EXPORT_SYMBOL(z_impl_k_thread_create);
+EXPORT_SYMBOL(z_impl_k_thread_stack_space_get);
+EXPORT_SYMBOL(z_impl_k_thread_join);
+EXPORT_SYMBOL(z_impl_k_sleep);
+EXPORT_SYMBOL(z_impl_k_usleep);
+EXPORT_SYMBOL(z_impl_k_busy_wait);
+EXPORT_SYMBOL(z_impl_k_yield);
+EXPORT_SYMBOL(z_impl_k_wakeup);
+EXPORT_SYMBOL(z_impl_k_sched_current_thread_query);
+EXPORT_SYMBOL(z_impl_k_thread_abort);
+EXPORT_SYMBOL(z_impl_k_thread_start);
+EXPORT_SYMBOL(z_impl_k_thread_timeout_expires_ticks);
+EXPORT_SYMBOL(z_impl_k_thread_timeout_remaining_ticks);
+EXPORT_SYMBOL(z_impl_k_thread_priority_get);
+EXPORT_SYMBOL(z_impl_k_thread_priority_set);
+EXPORT_SYMBOL(z_impl_k_thread_deadline_set);
+EXPORT_SYMBOL(z_impl_k_thread_suspend);
+EXPORT_SYMBOL(z_impl_k_thread_resume);
+EXPORT_SYMBOL(z_impl_k_is_preempt_thread);
+EXPORT_SYMBOL(z_impl_k_thread_custom_data_set);
+EXPORT_SYMBOL(z_impl_k_thread_custom_data_get);
+EXPORT_SYMBOL(z_impl_k_thread_name_set);
+EXPORT_SYMBOL(z_impl_k_thread_name_copy);
+EXPORT_SYMBOL(z_impl_k_timer_start);
+EXPORT_SYMBOL(z_impl_k_timer_stop);
+EXPORT_SYMBOL(z_impl_k_timer_status_get);
+EXPORT_SYMBOL(z_impl_k_timer_status_sync);
+EXPORT_SYMBOL(z_impl_k_timer_expires_ticks);
+EXPORT_SYMBOL(z_impl_k_timer_remaining_ticks);
+EXPORT_SYMBOL(z_impl_k_timer_user_data_set);
+EXPORT_SYMBOL(z_impl_k_timer_user_data_get);
+EXPORT_SYMBOL(z_impl_k_uptime_ticks);
+EXPORT_SYMBOL(z_impl_k_queue_init);
+EXPORT_SYMBOL(z_impl_k_queue_cancel_wait);
+EXPORT_SYMBOL(z_impl_k_queue_alloc_append);
+EXPORT_SYMBOL(z_impl_k_queue_alloc_prepend);
+EXPORT_SYMBOL(z_impl_k_queue_get);
+EXPORT_SYMBOL(z_impl_k_queue_is_empty);
+EXPORT_SYMBOL(z_impl_k_queue_peek_head);
+EXPORT_SYMBOL(z_impl_k_queue_peek_tail);
+EXPORT_SYMBOL(z_impl_k_futex_wait);
+EXPORT_SYMBOL(z_impl_k_futex_wake);
+EXPORT_SYMBOL(z_impl_k_event_init);
+EXPORT_SYMBOL(z_impl_k_event_post);
+EXPORT_SYMBOL(z_impl_k_event_set);
+EXPORT_SYMBOL(z_impl_k_event_set_masked);
+EXPORT_SYMBOL(z_impl_k_event_clear);
+EXPORT_SYMBOL(z_impl_k_event_wait);
+EXPORT_SYMBOL(z_impl_k_event_wait_all);
+EXPORT_SYMBOL(z_impl_k_stack_alloc_init);
+EXPORT_SYMBOL(z_impl_k_stack_push);
+EXPORT_SYMBOL(z_impl_k_stack_pop);
+EXPORT_SYMBOL(z_impl_k_mutex_init);
+EXPORT_SYMBOL(z_impl_k_mutex_lock);
+EXPORT_SYMBOL(z_impl_k_mutex_unlock);
+EXPORT_SYMBOL(z_impl_k_condvar_init);
+EXPORT_SYMBOL(z_impl_k_condvar_signal);
+EXPORT_SYMBOL(z_impl_k_condvar_broadcast);
+EXPORT_SYMBOL(z_impl_k_condvar_wait);
+EXPORT_SYMBOL(z_impl_k_sem_init);
+EXPORT_SYMBOL(z_impl_k_sem_take);
+EXPORT_SYMBOL(z_impl_k_sem_give);
+EXPORT_SYMBOL(z_impl_k_sem_reset);
+EXPORT_SYMBOL(z_impl_k_sem_count_get);
+EXPORT_SYMBOL(z_impl_k_msgq_alloc_init);
+EXPORT_SYMBOL(z_impl_k_msgq_put);
+EXPORT_SYMBOL(z_impl_k_msgq_get);
+EXPORT_SYMBOL(z_impl_k_msgq_peek);
+EXPORT_SYMBOL(z_impl_k_msgq_peek_at);
+EXPORT_SYMBOL(z_impl_k_msgq_purge);
+EXPORT_SYMBOL(z_impl_k_msgq_num_free_get);
+EXPORT_SYMBOL(z_impl_k_msgq_get_attrs);
+EXPORT_SYMBOL(z_impl_k_msgq_num_used_get);
+EXPORT_SYMBOL(z_impl_k_pipe_alloc_init);
+EXPORT_SYMBOL(z_impl_k_pipe_put);
+EXPORT_SYMBOL(z_impl_k_pipe_get);
+EXPORT_SYMBOL(z_impl_k_pipe_read_avail);
+EXPORT_SYMBOL(z_impl_k_pipe_write_avail);
+EXPORT_SYMBOL(z_impl_k_pipe_flush);
+EXPORT_SYMBOL(z_impl_k_pipe_buffer_flush);
+EXPORT_SYMBOL(z_impl_k_poll);
+EXPORT_SYMBOL(z_impl_k_poll_signal_init);
+EXPORT_SYMBOL(z_impl_k_poll_signal_reset);
+EXPORT_SYMBOL(z_impl_k_poll_signal_check);
+EXPORT_SYMBOL(z_impl_k_poll_signal_raise);
+EXPORT_SYMBOL(z_impl_k_str_out);
+EXPORT_SYMBOL(z_impl_k_float_disable);
+EXPORT_SYMBOL(z_impl_k_float_enable);
+EXPORT_SYMBOL(z_impl_k_object_access_grant);
+EXPORT_SYMBOL(z_impl_k_object_release);
+EXPORT_SYMBOL(z_impl_k_object_alloc);
+EXPORT_SYMBOL(z_impl_k_object_alloc_size);
+EXPORT_SYMBOL(z_impl_sys_clock_hw_cycles_per_sec_runtime_get);
+EXPORT_SYMBOL(z_impl_z_errno);
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscall_list.h b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscall_list.h
new file mode 100644
index 0000000..6082a2d
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscall_list.h
@@ -0,0 +1,550 @@
+/* auto-generated by gen_syscalls.py, don't edit */
+
+#ifndef ZEPHYR_SYSCALL_LIST_H
+#define ZEPHYR_SYSCALL_LIST_H
+
+#define K_SYSCALL_DEVICE_GET_BINDING 0
+#define K_SYSCALL_DEVICE_INIT 1
+#define K_SYSCALL_DEVICE_IS_READY 2
+#define K_SYSCALL_FLASH_ERASE 3
+#define K_SYSCALL_FLASH_EX_OP 4
+#define K_SYSCALL_FLASH_GET_PAGE_COUNT 5
+#define K_SYSCALL_FLASH_GET_PAGE_INFO_BY_IDX 6
+#define K_SYSCALL_FLASH_GET_PAGE_INFO_BY_OFFS 7
+#define K_SYSCALL_FLASH_GET_PARAMETERS 8
+#define K_SYSCALL_FLASH_GET_WRITE_BLOCK_SIZE 9
+#define K_SYSCALL_FLASH_READ 10
+#define K_SYSCALL_FLASH_READ_JEDEC_ID 11
+#define K_SYSCALL_FLASH_SFDP_READ 12
+#define K_SYSCALL_FLASH_WRITE 13
+#define K_SYSCALL_GPIO_GET_PENDING_INT 14
+#define K_SYSCALL_GPIO_PIN_CONFIGURE 15
+#define K_SYSCALL_GPIO_PIN_GET_CONFIG 16
+#define K_SYSCALL_GPIO_PIN_INTERRUPT_CONFIGURE 17
+#define K_SYSCALL_GPIO_PORT_CLEAR_BITS_RAW 18
+#define K_SYSCALL_GPIO_PORT_GET_DIRECTION 19
+#define K_SYSCALL_GPIO_PORT_GET_RAW 20
+#define K_SYSCALL_GPIO_PORT_SET_BITS_RAW 21
+#define K_SYSCALL_GPIO_PORT_SET_MASKED_RAW 22
+#define K_SYSCALL_GPIO_PORT_TOGGLE_BITS 23
+#define K_SYSCALL_K_BUSY_WAIT 24
+#define K_SYSCALL_K_CONDVAR_BROADCAST 25
+#define K_SYSCALL_K_CONDVAR_INIT 26
+#define K_SYSCALL_K_CONDVAR_SIGNAL 27
+#define K_SYSCALL_K_CONDVAR_WAIT 28
+#define K_SYSCALL_K_EVENT_CLEAR 29
+#define K_SYSCALL_K_EVENT_INIT 30
+#define K_SYSCALL_K_EVENT_POST 31
+#define K_SYSCALL_K_EVENT_SET 32
+#define K_SYSCALL_K_EVENT_SET_MASKED 33
+#define K_SYSCALL_K_EVENT_WAIT 34
+#define K_SYSCALL_K_EVENT_WAIT_ALL 35
+#define K_SYSCALL_K_FLOAT_DISABLE 36
+#define K_SYSCALL_K_FLOAT_ENABLE 37
+#define K_SYSCALL_K_FUTEX_WAIT 38
+#define K_SYSCALL_K_FUTEX_WAKE 39
+#define K_SYSCALL_K_IS_PREEMPT_THREAD 40
+#define K_SYSCALL_K_MSGQ_ALLOC_INIT 41
+#define K_SYSCALL_K_MSGQ_GET 42
+#define K_SYSCALL_K_MSGQ_GET_ATTRS 43
+#define K_SYSCALL_K_MSGQ_NUM_FREE_GET 44
+#define K_SYSCALL_K_MSGQ_NUM_USED_GET 45
+#define K_SYSCALL_K_MSGQ_PEEK 46
+#define K_SYSCALL_K_MSGQ_PEEK_AT 47
+#define K_SYSCALL_K_MSGQ_PURGE 48
+#define K_SYSCALL_K_MSGQ_PUT 49
+#define K_SYSCALL_K_MUTEX_INIT 50
+#define K_SYSCALL_K_MUTEX_LOCK 51
+#define K_SYSCALL_K_MUTEX_UNLOCK 52
+#define K_SYSCALL_K_OBJECT_ACCESS_GRANT 53
+#define K_SYSCALL_K_OBJECT_ALLOC 54
+#define K_SYSCALL_K_OBJECT_ALLOC_SIZE 55
+#define K_SYSCALL_K_OBJECT_RELEASE 56
+#define K_SYSCALL_K_PIPE_ALLOC_INIT 57
+#define K_SYSCALL_K_PIPE_BUFFER_FLUSH 58
+#define K_SYSCALL_K_PIPE_FLUSH 59
+#define K_SYSCALL_K_PIPE_GET 60
+#define K_SYSCALL_K_PIPE_PUT 61
+#define K_SYSCALL_K_PIPE_READ_AVAIL 62
+#define K_SYSCALL_K_PIPE_WRITE_AVAIL 63
+#define K_SYSCALL_K_POLL 64
+#define K_SYSCALL_K_POLL_SIGNAL_CHECK 65
+#define K_SYSCALL_K_POLL_SIGNAL_INIT 66
+#define K_SYSCALL_K_POLL_SIGNAL_RAISE 67
+#define K_SYSCALL_K_POLL_SIGNAL_RESET 68
+#define K_SYSCALL_K_QUEUE_ALLOC_APPEND 69
+#define K_SYSCALL_K_QUEUE_ALLOC_PREPEND 70
+#define K_SYSCALL_K_QUEUE_CANCEL_WAIT 71
+#define K_SYSCALL_K_QUEUE_GET 72
+#define K_SYSCALL_K_QUEUE_INIT 73
+#define K_SYSCALL_K_QUEUE_IS_EMPTY 74
+#define K_SYSCALL_K_QUEUE_PEEK_HEAD 75
+#define K_SYSCALL_K_QUEUE_PEEK_TAIL 76
+#define K_SYSCALL_K_SCHED_CURRENT_THREAD_QUERY 77
+#define K_SYSCALL_K_SEM_COUNT_GET 78
+#define K_SYSCALL_K_SEM_GIVE 79
+#define K_SYSCALL_K_SEM_INIT 80
+#define K_SYSCALL_K_SEM_RESET 81
+#define K_SYSCALL_K_SEM_TAKE 82
+#define K_SYSCALL_K_SLEEP 83
+#define K_SYSCALL_K_STACK_ALLOC_INIT 84
+#define K_SYSCALL_K_STACK_POP 85
+#define K_SYSCALL_K_STACK_PUSH 86
+#define K_SYSCALL_K_STR_OUT 87
+#define K_SYSCALL_K_THREAD_ABORT 88
+#define K_SYSCALL_K_THREAD_CREATE 89
+#define K_SYSCALL_K_THREAD_CUSTOM_DATA_GET 90
+#define K_SYSCALL_K_THREAD_CUSTOM_DATA_SET 91
+#define K_SYSCALL_K_THREAD_DEADLINE_SET 92
+#define K_SYSCALL_K_THREAD_JOIN 93
+#define K_SYSCALL_K_THREAD_NAME_COPY 94
+#define K_SYSCALL_K_THREAD_NAME_SET 95
+#define K_SYSCALL_K_THREAD_PRIORITY_GET 96
+#define K_SYSCALL_K_THREAD_PRIORITY_SET 97
+#define K_SYSCALL_K_THREAD_RESUME 98
+#define K_SYSCALL_K_THREAD_STACK_ALLOC 99
+#define K_SYSCALL_K_THREAD_STACK_FREE 100
+#define K_SYSCALL_K_THREAD_STACK_SPACE_GET 101
+#define K_SYSCALL_K_THREAD_START 102
+#define K_SYSCALL_K_THREAD_SUSPEND 103
+#define K_SYSCALL_K_THREAD_TIMEOUT_EXPIRES_TICKS 104
+#define K_SYSCALL_K_THREAD_TIMEOUT_REMAINING_TICKS 105
+#define K_SYSCALL_K_TIMER_EXPIRES_TICKS 106
+#define K_SYSCALL_K_TIMER_REMAINING_TICKS 107
+#define K_SYSCALL_K_TIMER_START 108
+#define K_SYSCALL_K_TIMER_STATUS_GET 109
+#define K_SYSCALL_K_TIMER_STATUS_SYNC 110
+#define K_SYSCALL_K_TIMER_STOP 111
+#define K_SYSCALL_K_TIMER_USER_DATA_GET 112
+#define K_SYSCALL_K_TIMER_USER_DATA_SET 113
+#define K_SYSCALL_K_UPTIME_TICKS 114
+#define K_SYSCALL_K_USLEEP 115
+#define K_SYSCALL_K_WAKEUP 116
+#define K_SYSCALL_K_YIELD 117
+#define K_SYSCALL_LOG_BUFFERED_CNT 118
+#define K_SYSCALL_LOG_FILTER_SET 119
+#define K_SYSCALL_LOG_FRONTEND_FILTER_SET 120
+#define K_SYSCALL_LOG_PANIC 121
+#define K_SYSCALL_LOG_PROCESS 122
+#define K_SYSCALL_SYS_CLOCK_HW_CYCLES_PER_SEC_RUNTIME_GET 123
+#define K_SYSCALL_UART_CONFIGURE 124
+#define K_SYSCALL_UART_CONFIG_GET 125
+#define K_SYSCALL_UART_DRV_CMD 126
+#define K_SYSCALL_UART_ERR_CHECK 127
+#define K_SYSCALL_UART_IRQ_ERR_DISABLE 128
+#define K_SYSCALL_UART_IRQ_ERR_ENABLE 129
+#define K_SYSCALL_UART_IRQ_IS_PENDING 130
+#define K_SYSCALL_UART_IRQ_RX_DISABLE 131
+#define K_SYSCALL_UART_IRQ_RX_ENABLE 132
+#define K_SYSCALL_UART_IRQ_TX_DISABLE 133
+#define K_SYSCALL_UART_IRQ_TX_ENABLE 134
+#define K_SYSCALL_UART_IRQ_UPDATE 135
+#define K_SYSCALL_UART_LINE_CTRL_GET 136
+#define K_SYSCALL_UART_LINE_CTRL_SET 137
+#define K_SYSCALL_UART_POLL_IN 138
+#define K_SYSCALL_UART_POLL_IN_U16 139
+#define K_SYSCALL_UART_POLL_OUT 140
+#define K_SYSCALL_UART_POLL_OUT_U16 141
+#define K_SYSCALL_UART_RX_DISABLE 142
+#define K_SYSCALL_UART_RX_ENABLE 143
+#define K_SYSCALL_UART_RX_ENABLE_U16 144
+#define K_SYSCALL_UART_TX 145
+#define K_SYSCALL_UART_TX_ABORT 146
+#define K_SYSCALL_UART_TX_U16 147
+#define K_SYSCALL_ZEPHYR_FPUTC 148
+#define K_SYSCALL_ZEPHYR_FWRITE 149
+#define K_SYSCALL_ZEPHYR_READ_STDIN 150
+#define K_SYSCALL_ZEPHYR_WRITE_STDOUT 151
+#define K_SYSCALL_Z_ERRNO 152
+#define K_SYSCALL_Z_LOG_MSG_SIMPLE_CREATE_0 153
+#define K_SYSCALL_Z_LOG_MSG_SIMPLE_CREATE_1 154
+#define K_SYSCALL_Z_LOG_MSG_SIMPLE_CREATE_2 155
+#define K_SYSCALL_Z_LOG_MSG_STATIC_CREATE 156
+#define K_SYSCALL_Z_SYS_MUTEX_KERNEL_LOCK 157
+#define K_SYSCALL_Z_SYS_MUTEX_KERNEL_UNLOCK 158
+#define K_SYSCALL___POSIX_CLOCK_GET_BASE 159
+#define K_SYSCALL_BAD 160
+#define K_SYSCALL_LIMIT 161
+
+
+/* Following syscalls are not used in image */
+#define K_SYSCALL_ADC_CHANNEL_SETUP 162
+#define K_SYSCALL_ADC_READ 163
+#define K_SYSCALL_ADC_READ_ASYNC 164
+#define K_SYSCALL_ATOMIC_ADD 165
+#define K_SYSCALL_ATOMIC_AND 166
+#define K_SYSCALL_ATOMIC_CAS 167
+#define K_SYSCALL_ATOMIC_NAND 168
+#define K_SYSCALL_ATOMIC_OR 169
+#define K_SYSCALL_ATOMIC_PTR_CAS 170
+#define K_SYSCALL_ATOMIC_PTR_SET 171
+#define K_SYSCALL_ATOMIC_SET 172
+#define K_SYSCALL_ATOMIC_SUB 173
+#define K_SYSCALL_ATOMIC_XOR 174
+#define K_SYSCALL_AUXDISPLAY_BACKLIGHT_GET 175
+#define K_SYSCALL_AUXDISPLAY_BACKLIGHT_SET 176
+#define K_SYSCALL_AUXDISPLAY_BRIGHTNESS_GET 177
+#define K_SYSCALL_AUXDISPLAY_BRIGHTNESS_SET 178
+#define K_SYSCALL_AUXDISPLAY_CAPABILITIES_GET 179
+#define K_SYSCALL_AUXDISPLAY_CLEAR 180
+#define K_SYSCALL_AUXDISPLAY_CURSOR_POSITION_GET 181
+#define K_SYSCALL_AUXDISPLAY_CURSOR_POSITION_SET 182
+#define K_SYSCALL_AUXDISPLAY_CURSOR_SET_ENABLED 183
+#define K_SYSCALL_AUXDISPLAY_CURSOR_SHIFT_SET 184
+#define K_SYSCALL_AUXDISPLAY_CUSTOM_CHARACTER_SET 185
+#define K_SYSCALL_AUXDISPLAY_CUSTOM_COMMAND 186
+#define K_SYSCALL_AUXDISPLAY_DISPLAY_OFF 187
+#define K_SYSCALL_AUXDISPLAY_DISPLAY_ON 188
+#define K_SYSCALL_AUXDISPLAY_DISPLAY_POSITION_GET 189
+#define K_SYSCALL_AUXDISPLAY_DISPLAY_POSITION_SET 190
+#define K_SYSCALL_AUXDISPLAY_IS_BUSY 191
+#define K_SYSCALL_AUXDISPLAY_POSITION_BLINKING_SET_ENABLED 192
+#define K_SYSCALL_AUXDISPLAY_WRITE 193
+#define K_SYSCALL_BBRAM_CHECK_INVALID 194
+#define K_SYSCALL_BBRAM_CHECK_POWER 195
+#define K_SYSCALL_BBRAM_CHECK_STANDBY_POWER 196
+#define K_SYSCALL_BBRAM_GET_SIZE 197
+#define K_SYSCALL_BBRAM_READ 198
+#define K_SYSCALL_BBRAM_WRITE 199
+#define K_SYSCALL_BC12_SET_RESULT_CB 200
+#define K_SYSCALL_BC12_SET_ROLE 201
+#define K_SYSCALL_CAN_ADD_RX_FILTER_MSGQ 202
+#define K_SYSCALL_CAN_CALC_TIMING 203
+#define K_SYSCALL_CAN_CALC_TIMING_DATA 204
+#define K_SYSCALL_CAN_GET_BITRATE_MAX 205
+#define K_SYSCALL_CAN_GET_BITRATE_MIN 206
+#define K_SYSCALL_CAN_GET_CAPABILITIES 207
+#define K_SYSCALL_CAN_GET_CORE_CLOCK 208
+#define K_SYSCALL_CAN_GET_MAX_FILTERS 209
+#define K_SYSCALL_CAN_GET_MODE 210
+#define K_SYSCALL_CAN_GET_STATE 211
+#define K_SYSCALL_CAN_GET_TIMING_DATA_MAX 212
+#define K_SYSCALL_CAN_GET_TIMING_DATA_MIN 213
+#define K_SYSCALL_CAN_GET_TIMING_MAX 214
+#define K_SYSCALL_CAN_GET_TIMING_MIN 215
+#define K_SYSCALL_CAN_GET_TRANSCEIVER 216
+#define K_SYSCALL_CAN_RECOVER 217
+#define K_SYSCALL_CAN_REMOVE_RX_FILTER 218
+#define K_SYSCALL_CAN_SEND 219
+#define K_SYSCALL_CAN_SET_BITRATE 220
+#define K_SYSCALL_CAN_SET_BITRATE_DATA 221
+#define K_SYSCALL_CAN_SET_MODE 222
+#define K_SYSCALL_CAN_SET_TIMING 223
+#define K_SYSCALL_CAN_SET_TIMING_DATA 224
+#define K_SYSCALL_CAN_START 225
+#define K_SYSCALL_CAN_STATS_GET_ACK_ERRORS 226
+#define K_SYSCALL_CAN_STATS_GET_BIT0_ERRORS 227
+#define K_SYSCALL_CAN_STATS_GET_BIT1_ERRORS 228
+#define K_SYSCALL_CAN_STATS_GET_BIT_ERRORS 229
+#define K_SYSCALL_CAN_STATS_GET_CRC_ERRORS 230
+#define K_SYSCALL_CAN_STATS_GET_FORM_ERRORS 231
+#define K_SYSCALL_CAN_STATS_GET_RX_OVERRUNS 232
+#define K_SYSCALL_CAN_STATS_GET_STUFF_ERRORS 233
+#define K_SYSCALL_CAN_STOP 234
+#define K_SYSCALL_CHARGER_CHARGE_ENABLE 235
+#define K_SYSCALL_CHARGER_GET_PROP 236
+#define K_SYSCALL_CHARGER_SET_PROP 237
+#define K_SYSCALL_COUNTER_CANCEL_CHANNEL_ALARM 238
+#define K_SYSCALL_COUNTER_GET_FREQUENCY 239
+#define K_SYSCALL_COUNTER_GET_GUARD_PERIOD 240
+#define K_SYSCALL_COUNTER_GET_MAX_TOP_VALUE 241
+#define K_SYSCALL_COUNTER_GET_NUM_OF_CHANNELS 242
+#define K_SYSCALL_COUNTER_GET_PENDING_INT 243
+#define K_SYSCALL_COUNTER_GET_TOP_VALUE 244
+#define K_SYSCALL_COUNTER_GET_VALUE 245
+#define K_SYSCALL_COUNTER_GET_VALUE_64 246
+#define K_SYSCALL_COUNTER_IS_COUNTING_UP 247
+#define K_SYSCALL_COUNTER_SET_CHANNEL_ALARM 248
+#define K_SYSCALL_COUNTER_SET_GUARD_PERIOD 249
+#define K_SYSCALL_COUNTER_SET_TOP_VALUE 250
+#define K_SYSCALL_COUNTER_START 251
+#define K_SYSCALL_COUNTER_STOP 252
+#define K_SYSCALL_COUNTER_TICKS_TO_US 253
+#define K_SYSCALL_COUNTER_US_TO_TICKS 254
+#define K_SYSCALL_DAC_CHANNEL_SETUP 255
+#define K_SYSCALL_DAC_WRITE_VALUE 256
+#define K_SYSCALL_DEVMUX_SELECT_GET 257
+#define K_SYSCALL_DEVMUX_SELECT_SET 258
+#define K_SYSCALL_DMA_CHAN_FILTER 259
+#define K_SYSCALL_DMA_RELEASE_CHANNEL 260
+#define K_SYSCALL_DMA_REQUEST_CHANNEL 261
+#define K_SYSCALL_DMA_RESUME 262
+#define K_SYSCALL_DMA_START 263
+#define K_SYSCALL_DMA_STOP 264
+#define K_SYSCALL_DMA_SUSPEND 265
+#define K_SYSCALL_EEPROM_GET_SIZE 266
+#define K_SYSCALL_EEPROM_READ 267
+#define K_SYSCALL_EEPROM_WRITE 268
+#define K_SYSCALL_EMUL_FUEL_GAUGE_IS_BATTERY_CUTOFF 269
+#define K_SYSCALL_EMUL_FUEL_GAUGE_SET_BATTERY_CHARGING 270
+#define K_SYSCALL_ENTROPY_GET_ENTROPY 271
+#define K_SYSCALL_ESPI_CONFIG 272
+#define K_SYSCALL_ESPI_FLASH_ERASE 273
+#define K_SYSCALL_ESPI_GET_CHANNEL_STATUS 274
+#define K_SYSCALL_ESPI_READ_FLASH 275
+#define K_SYSCALL_ESPI_READ_LPC_REQUEST 276
+#define K_SYSCALL_ESPI_READ_REQUEST 277
+#define K_SYSCALL_ESPI_RECEIVE_OOB 278
+#define K_SYSCALL_ESPI_RECEIVE_VWIRE 279
+#define K_SYSCALL_ESPI_SAF_ACTIVATE 280
+#define K_SYSCALL_ESPI_SAF_CONFIG 281
+#define K_SYSCALL_ESPI_SAF_FLASH_ERASE 282
+#define K_SYSCALL_ESPI_SAF_FLASH_READ 283
+#define K_SYSCALL_ESPI_SAF_FLASH_UNSUCCESS 284
+#define K_SYSCALL_ESPI_SAF_FLASH_WRITE 285
+#define K_SYSCALL_ESPI_SAF_GET_CHANNEL_STATUS 286
+#define K_SYSCALL_ESPI_SAF_SET_PROTECTION_REGIONS 287
+#define K_SYSCALL_ESPI_SEND_OOB 288
+#define K_SYSCALL_ESPI_SEND_VWIRE 289
+#define K_SYSCALL_ESPI_WRITE_FLASH 290
+#define K_SYSCALL_ESPI_WRITE_LPC_REQUEST 291
+#define K_SYSCALL_ESPI_WRITE_REQUEST 292
+#define K_SYSCALL_FLASH_SIMULATOR_GET_MEMORY 293
+#define K_SYSCALL_FUEL_GAUGE_BATTERY_CUTOFF 294
+#define K_SYSCALL_FUEL_GAUGE_GET_BUFFER_PROP 295
+#define K_SYSCALL_FUEL_GAUGE_GET_PROP 296
+#define K_SYSCALL_FUEL_GAUGE_GET_PROPS 297
+#define K_SYSCALL_FUEL_GAUGE_SET_PROP 298
+#define K_SYSCALL_FUEL_GAUGE_SET_PROPS 299
+#define K_SYSCALL_GNSS_GET_ENABLED_SYSTEMS 300
+#define K_SYSCALL_GNSS_GET_FIX_RATE 301
+#define K_SYSCALL_GNSS_GET_NAVIGATION_MODE 302
+#define K_SYSCALL_GNSS_GET_PERIODIC_CONFIG 303
+#define K_SYSCALL_GNSS_GET_SUPPORTED_SYSTEMS 304
+#define K_SYSCALL_GNSS_SET_ENABLED_SYSTEMS 305
+#define K_SYSCALL_GNSS_SET_FIX_RATE 306
+#define K_SYSCALL_GNSS_SET_NAVIGATION_MODE 307
+#define K_SYSCALL_GNSS_SET_PERIODIC_CONFIG 308
+#define K_SYSCALL_HWINFO_CLEAR_RESET_CAUSE 309
+#define K_SYSCALL_HWINFO_GET_DEVICE_EUI64 310
+#define K_SYSCALL_HWINFO_GET_DEVICE_ID 311
+#define K_SYSCALL_HWINFO_GET_RESET_CAUSE 312
+#define K_SYSCALL_HWINFO_GET_SUPPORTED_RESET_CAUSE 313
+#define K_SYSCALL_HWSPINLOCK_GET_MAX_ID 314
+#define K_SYSCALL_HWSPINLOCK_LOCK 315
+#define K_SYSCALL_HWSPINLOCK_TRYLOCK 316
+#define K_SYSCALL_HWSPINLOCK_UNLOCK 317
+#define K_SYSCALL_I2C_CONFIGURE 318
+#define K_SYSCALL_I2C_GET_CONFIG 319
+#define K_SYSCALL_I2C_RECOVER_BUS 320
+#define K_SYSCALL_I2C_TARGET_DRIVER_REGISTER 321
+#define K_SYSCALL_I2C_TARGET_DRIVER_UNREGISTER 322
+#define K_SYSCALL_I2C_TRANSFER 323
+#define K_SYSCALL_I2S_BUF_READ 324
+#define K_SYSCALL_I2S_BUF_WRITE 325
+#define K_SYSCALL_I2S_CONFIGURE 326
+#define K_SYSCALL_I2S_TRIGGER 327
+#define K_SYSCALL_I3C_DO_CCC 328
+#define K_SYSCALL_I3C_TRANSFER 329
+#define K_SYSCALL_IPM_COMPLETE 330
+#define K_SYSCALL_IPM_MAX_DATA_SIZE_GET 331
+#define K_SYSCALL_IPM_MAX_ID_VAL_GET 332
+#define K_SYSCALL_IPM_SEND 333
+#define K_SYSCALL_IPM_SET_ENABLED 334
+#define K_SYSCALL_IVSHMEM_ENABLE_INTERRUPTS 335
+#define K_SYSCALL_IVSHMEM_GET_ID 336
+#define K_SYSCALL_IVSHMEM_GET_MAX_PEERS 337
+#define K_SYSCALL_IVSHMEM_GET_MEM 338
+#define K_SYSCALL_IVSHMEM_GET_OUTPUT_MEM_SECTION 339
+#define K_SYSCALL_IVSHMEM_GET_PROTOCOL 340
+#define K_SYSCALL_IVSHMEM_GET_RW_MEM_SECTION 341
+#define K_SYSCALL_IVSHMEM_GET_STATE 342
+#define K_SYSCALL_IVSHMEM_GET_VECTORS 343
+#define K_SYSCALL_IVSHMEM_INT_PEER 344
+#define K_SYSCALL_IVSHMEM_REGISTER_HANDLER 345
+#define K_SYSCALL_IVSHMEM_SET_STATE 346
+#define K_SYSCALL_KSCAN_CONFIG 347
+#define K_SYSCALL_KSCAN_DISABLE_CALLBACK 348
+#define K_SYSCALL_KSCAN_ENABLE_CALLBACK 349
+#define K_SYSCALL_K_MEM_PAGING_HISTOGRAM_BACKING_STORE_PAGE_IN_GET 350
+#define K_SYSCALL_K_MEM_PAGING_HISTOGRAM_BACKING_STORE_PAGE_OUT_GET 351
+#define K_SYSCALL_K_MEM_PAGING_HISTOGRAM_EVICTION_GET 352
+#define K_SYSCALL_K_MEM_PAGING_STATS_GET 353
+#define K_SYSCALL_K_MEM_PAGING_THREAD_STATS_GET 354
+#define K_SYSCALL_LED_BLINK 355
+#define K_SYSCALL_LED_GET_INFO 356
+#define K_SYSCALL_LED_OFF 357
+#define K_SYSCALL_LED_ON 358
+#define K_SYSCALL_LED_SET_BRIGHTNESS 359
+#define K_SYSCALL_LED_SET_CHANNEL 360
+#define K_SYSCALL_LED_SET_COLOR 361
+#define K_SYSCALL_LED_WRITE_CHANNELS 362
+#define K_SYSCALL_MAXIM_DS3231_GET_SYNCPOINT 363
+#define K_SYSCALL_MAXIM_DS3231_REQ_SYNCPOINT 364
+#define K_SYSCALL_MBOX_MAX_CHANNELS_GET 365
+#define K_SYSCALL_MBOX_MTU_GET 366
+#define K_SYSCALL_MBOX_SEND 367
+#define K_SYSCALL_MBOX_SET_ENABLED 368
+#define K_SYSCALL_MDIO_BUS_DISABLE 369
+#define K_SYSCALL_MDIO_BUS_ENABLE 370
+#define K_SYSCALL_MDIO_READ 371
+#define K_SYSCALL_MDIO_READ_C45 372
+#define K_SYSCALL_MDIO_WRITE 373
+#define K_SYSCALL_MDIO_WRITE_C45 374
+#define K_SYSCALL_NET_ADDR_NTOP 375
+#define K_SYSCALL_NET_ADDR_PTON 376
+#define K_SYSCALL_NET_ETH_GET_PTP_CLOCK_BY_INDEX 377
+#define K_SYSCALL_NET_IF_GET_BY_INDEX 378
+#define K_SYSCALL_NET_IF_IPV4_ADDR_ADD_BY_INDEX 379
+#define K_SYSCALL_NET_IF_IPV4_ADDR_LOOKUP_BY_INDEX 380
+#define K_SYSCALL_NET_IF_IPV4_ADDR_RM_BY_INDEX 381
+#define K_SYSCALL_NET_IF_IPV4_SET_GW_BY_INDEX 382
+#define K_SYSCALL_NET_IF_IPV4_SET_NETMASK_BY_ADDR_BY_INDEX 383
+#define K_SYSCALL_NET_IF_IPV4_SET_NETMASK_BY_INDEX 384
+#define K_SYSCALL_NET_IF_IPV6_ADDR_ADD_BY_INDEX 385
+#define K_SYSCALL_NET_IF_IPV6_ADDR_LOOKUP_BY_INDEX 386
+#define K_SYSCALL_NET_IF_IPV6_ADDR_RM_BY_INDEX 387
+#define K_SYSCALL_NET_SOCKET_SERVICE_REGISTER 388
+#define K_SYSCALL_NRF_QSPI_NOR_XIP_ENABLE 389
+#define K_SYSCALL_PECI_CONFIG 390
+#define K_SYSCALL_PECI_DISABLE 391
+#define K_SYSCALL_PECI_ENABLE 392
+#define K_SYSCALL_PECI_TRANSFER 393
+#define K_SYSCALL_PS2_CONFIG 394
+#define K_SYSCALL_PS2_DISABLE_CALLBACK 395
+#define K_SYSCALL_PS2_ENABLE_CALLBACK 396
+#define K_SYSCALL_PS2_READ 397
+#define K_SYSCALL_PS2_WRITE 398
+#define K_SYSCALL_PTP_CLOCK_GET 399
+#define K_SYSCALL_PWM_CAPTURE_CYCLES 400
+#define K_SYSCALL_PWM_DISABLE_CAPTURE 401
+#define K_SYSCALL_PWM_ENABLE_CAPTURE 402
+#define K_SYSCALL_PWM_GET_CYCLES_PER_SEC 403
+#define K_SYSCALL_PWM_SET_CYCLES 404
+#define K_SYSCALL_RESET_LINE_ASSERT 405
+#define K_SYSCALL_RESET_LINE_DEASSERT 406
+#define K_SYSCALL_RESET_LINE_TOGGLE 407
+#define K_SYSCALL_RESET_STATUS 408
+#define K_SYSCALL_RETAINED_MEM_CLEAR 409
+#define K_SYSCALL_RETAINED_MEM_READ 410
+#define K_SYSCALL_RETAINED_MEM_SIZE 411
+#define K_SYSCALL_RETAINED_MEM_WRITE 412
+#define K_SYSCALL_RTC_ALARM_GET_SUPPORTED_FIELDS 413
+#define K_SYSCALL_RTC_ALARM_GET_TIME 414
+#define K_SYSCALL_RTC_ALARM_IS_PENDING 415
+#define K_SYSCALL_RTC_ALARM_SET_CALLBACK 416
+#define K_SYSCALL_RTC_ALARM_SET_TIME 417
+#define K_SYSCALL_RTC_GET_CALIBRATION 418
+#define K_SYSCALL_RTC_GET_TIME 419
+#define K_SYSCALL_RTC_SET_CALIBRATION 420
+#define K_SYSCALL_RTC_SET_TIME 421
+#define K_SYSCALL_RTC_UPDATE_SET_CALLBACK 422
+#define K_SYSCALL_RTIO_CQE_COPY_OUT 423
+#define K_SYSCALL_RTIO_CQE_GET_MEMPOOL_BUFFER 424
+#define K_SYSCALL_RTIO_RELEASE_BUFFER 425
+#define K_SYSCALL_RTIO_SQE_CANCEL 426
+#define K_SYSCALL_RTIO_SQE_COPY_IN_GET_HANDLES 427
+#define K_SYSCALL_RTIO_SUBMIT 428
+#define K_SYSCALL_SDHC_CARD_BUSY 429
+#define K_SYSCALL_SDHC_CARD_PRESENT 430
+#define K_SYSCALL_SDHC_DISABLE_INTERRUPT 431
+#define K_SYSCALL_SDHC_ENABLE_INTERRUPT 432
+#define K_SYSCALL_SDHC_EXECUTE_TUNING 433
+#define K_SYSCALL_SDHC_GET_HOST_PROPS 434
+#define K_SYSCALL_SDHC_HW_RESET 435
+#define K_SYSCALL_SDHC_REQUEST 436
+#define K_SYSCALL_SDHC_SET_IO 437
+#define K_SYSCALL_SENSOR_ATTR_GET 438
+#define K_SYSCALL_SENSOR_ATTR_SET 439
+#define K_SYSCALL_SENSOR_CHANNEL_GET 440
+#define K_SYSCALL_SENSOR_GET_DECODER 441
+#define K_SYSCALL_SENSOR_RECONFIGURE_READ_IODEV 442
+#define K_SYSCALL_SENSOR_SAMPLE_FETCH 443
+#define K_SYSCALL_SENSOR_SAMPLE_FETCH_CHAN 444
+#define K_SYSCALL_SIP_SUPERVISORY_CALL 445
+#define K_SYSCALL_SIP_SVC_PLAT_ASYNC_RES_REQ 446
+#define K_SYSCALL_SIP_SVC_PLAT_ASYNC_RES_RES 447
+#define K_SYSCALL_SIP_SVC_PLAT_FORMAT_TRANS_ID 448
+#define K_SYSCALL_SIP_SVC_PLAT_FREE_ASYNC_MEMORY 449
+#define K_SYSCALL_SIP_SVC_PLAT_FUNC_ID_VALID 450
+#define K_SYSCALL_SIP_SVC_PLAT_GET_ERROR_CODE 451
+#define K_SYSCALL_SIP_SVC_PLAT_GET_TRANS_IDX 452
+#define K_SYSCALL_SIP_SVC_PLAT_UPDATE_TRANS_ID 453
+#define K_SYSCALL_SMBUS_BLOCK_PCALL 454
+#define K_SYSCALL_SMBUS_BLOCK_READ 455
+#define K_SYSCALL_SMBUS_BLOCK_WRITE 456
+#define K_SYSCALL_SMBUS_BYTE_DATA_READ 457
+#define K_SYSCALL_SMBUS_BYTE_DATA_WRITE 458
+#define K_SYSCALL_SMBUS_BYTE_READ 459
+#define K_SYSCALL_SMBUS_BYTE_WRITE 460
+#define K_SYSCALL_SMBUS_CONFIGURE 461
+#define K_SYSCALL_SMBUS_GET_CONFIG 462
+#define K_SYSCALL_SMBUS_HOST_NOTIFY_REMOVE_CB 463
+#define K_SYSCALL_SMBUS_PCALL 464
+#define K_SYSCALL_SMBUS_QUICK 465
+#define K_SYSCALL_SMBUS_SMBALERT_REMOVE_CB 466
+#define K_SYSCALL_SMBUS_WORD_DATA_READ 467
+#define K_SYSCALL_SMBUS_WORD_DATA_WRITE 468
+#define K_SYSCALL_SPI_RELEASE 469
+#define K_SYSCALL_SPI_TRANSCEIVE 470
+#define K_SYSCALL_SYSCON_GET_BASE 471
+#define K_SYSCALL_SYSCON_GET_SIZE 472
+#define K_SYSCALL_SYSCON_READ_REG 473
+#define K_SYSCALL_SYSCON_WRITE_REG 474
+#define K_SYSCALL_SYS_CACHE_DATA_FLUSH_AND_INVD_RANGE 475
+#define K_SYSCALL_SYS_CACHE_DATA_FLUSH_RANGE 476
+#define K_SYSCALL_SYS_CACHE_DATA_INVD_RANGE 477
+#define K_SYSCALL_SYS_CSRAND_GET 478
+#define K_SYSCALL_SYS_RAND_GET 479
+#define K_SYSCALL_TGPIO_PIN_CONFIG_EXT_TIMESTAMP 480
+#define K_SYSCALL_TGPIO_PIN_DISABLE 481
+#define K_SYSCALL_TGPIO_PIN_PERIODIC_OUTPUT 482
+#define K_SYSCALL_TGPIO_PIN_READ_TS_EC 483
+#define K_SYSCALL_TGPIO_PORT_GET_CYCLES_PER_SECOND 484
+#define K_SYSCALL_TGPIO_PORT_GET_TIME 485
+#define K_SYSCALL_UART_MUX_FIND 486
+#define K_SYSCALL_UPDATEHUB_AUTOHANDLER 487
+#define K_SYSCALL_UPDATEHUB_CONFIRM 488
+#define K_SYSCALL_UPDATEHUB_PROBE 489
+#define K_SYSCALL_UPDATEHUB_REBOOT 490
+#define K_SYSCALL_UPDATEHUB_UPDATE 491
+#define K_SYSCALL_USER_FAULT 492
+#define K_SYSCALL_W1_CHANGE_BUS_LOCK 493
+#define K_SYSCALL_W1_CONFIGURE 494
+#define K_SYSCALL_W1_GET_SLAVE_COUNT 495
+#define K_SYSCALL_W1_READ_BIT 496
+#define K_SYSCALL_W1_READ_BLOCK 497
+#define K_SYSCALL_W1_READ_BYTE 498
+#define K_SYSCALL_W1_RESET_BUS 499
+#define K_SYSCALL_W1_SEARCH_BUS 500
+#define K_SYSCALL_W1_WRITE_BIT 501
+#define K_SYSCALL_W1_WRITE_BLOCK 502
+#define K_SYSCALL_W1_WRITE_BYTE 503
+#define K_SYSCALL_WDT_DISABLE 504
+#define K_SYSCALL_WDT_FEED 505
+#define K_SYSCALL_WDT_SETUP 506
+#define K_SYSCALL_XTENSA_USER_FAULT 507
+#define K_SYSCALL_ZSOCK_ACCEPT 508
+#define K_SYSCALL_ZSOCK_BIND 509
+#define K_SYSCALL_ZSOCK_CLOSE 510
+#define K_SYSCALL_ZSOCK_CONNECT 511
+#define K_SYSCALL_ZSOCK_FCNTL_IMPL 512
+#define K_SYSCALL_ZSOCK_GETHOSTNAME 513
+#define K_SYSCALL_ZSOCK_GETPEERNAME 514
+#define K_SYSCALL_ZSOCK_GETSOCKNAME 515
+#define K_SYSCALL_ZSOCK_GETSOCKOPT 516
+#define K_SYSCALL_ZSOCK_GET_CONTEXT_OBJECT 517
+#define K_SYSCALL_ZSOCK_INET_PTON 518
+#define K_SYSCALL_ZSOCK_IOCTL_IMPL 519
+#define K_SYSCALL_ZSOCK_LISTEN 520
+#define K_SYSCALL_ZSOCK_POLL 521
+#define K_SYSCALL_ZSOCK_RECVFROM 522
+#define K_SYSCALL_ZSOCK_RECVMSG 523
+#define K_SYSCALL_ZSOCK_SELECT 524
+#define K_SYSCALL_ZSOCK_SENDMSG 525
+#define K_SYSCALL_ZSOCK_SENDTO 526
+#define K_SYSCALL_ZSOCK_SETSOCKOPT 527
+#define K_SYSCALL_ZSOCK_SHUTDOWN 528
+#define K_SYSCALL_ZSOCK_SOCKET 529
+#define K_SYSCALL_ZSOCK_SOCKETPAIR 530
+#define K_SYSCALL_Z_ZSOCK_GETADDRINFO_INTERNAL 531
+
+
+#ifndef _ASMLANGUAGE
+
+#include <stdarg.h>
+#include <stdint.h>
+
+#endif /* _ASMLANGUAGE */
+
+#endif /* ZEPHYR_SYSCALL_LIST_H */
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/adc.h b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/adc.h
new file mode 100644
index 0000000..8384742
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/adc.h
@@ -0,0 +1,101 @@
+/* auto-generated by gen_syscalls.py, don't edit */
+
+#ifndef Z_INCLUDE_SYSCALLS_ADC_H
+#define Z_INCLUDE_SYSCALLS_ADC_H
+
+
+#include <zephyr/tracing/tracing_syscall.h>
+
+#ifndef _ASMLANGUAGE
+
+#include <stdarg.h>
+
+#include <syscall_list.h>
+#include <zephyr/syscall.h>
+
+#include <zephyr/linker/sections.h>
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern int z_impl_adc_channel_setup(const struct device * dev, const struct adc_channel_cfg * channel_cfg);
+
+__pinned_func
+static inline int adc_channel_setup(const struct device * dev, const struct adc_channel_cfg * channel_cfg)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; const struct adc_channel_cfg * val; } parm1 = { .val = channel_cfg };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_ADC_CHANNEL_SETUP);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_adc_channel_setup(dev, channel_cfg);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define adc_channel_setup(dev, channel_cfg) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_ADC_CHANNEL_SETUP, adc_channel_setup, dev, channel_cfg); 	syscall__retval = adc_channel_setup(dev, channel_cfg); 	sys_port_trace_syscall_exit(K_SYSCALL_ADC_CHANNEL_SETUP, adc_channel_setup, dev, channel_cfg, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_adc_read(const struct device * dev, const struct adc_sequence * sequence);
+
+__pinned_func
+static inline int adc_read(const struct device * dev, const struct adc_sequence * sequence)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; const struct adc_sequence * val; } parm1 = { .val = sequence };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_ADC_READ);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_adc_read(dev, sequence);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define adc_read(dev, sequence) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_ADC_READ, adc_read, dev, sequence); 	syscall__retval = adc_read(dev, sequence); 	sys_port_trace_syscall_exit(K_SYSCALL_ADC_READ, adc_read, dev, sequence, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_adc_read_async(const struct device * dev, const struct adc_sequence * sequence, struct k_poll_signal * async);
+
+__pinned_func
+static inline int adc_read_async(const struct device * dev, const struct adc_sequence * sequence, struct k_poll_signal * async)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; const struct adc_sequence * val; } parm1 = { .val = sequence };
+		union { uintptr_t x; struct k_poll_signal * val; } parm2 = { .val = async };
+		return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_ADC_READ_ASYNC);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_adc_read_async(dev, sequence, async);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define adc_read_async(dev, sequence, async) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_ADC_READ_ASYNC, adc_read_async, dev, sequence, async); 	syscall__retval = adc_read_async(dev, sequence, async); 	sys_port_trace_syscall_exit(K_SYSCALL_ADC_READ_ASYNC, adc_read_async, dev, sequence, async, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif /* include guard */
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/arch.h b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/arch.h
new file mode 100644
index 0000000..2a0836d
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/arch.h
@@ -0,0 +1,52 @@
+/* auto-generated by gen_syscalls.py, don't edit */
+
+#ifndef Z_INCLUDE_SYSCALLS_ARCH_H
+#define Z_INCLUDE_SYSCALLS_ARCH_H
+
+
+#include <zephyr/tracing/tracing_syscall.h>
+
+#ifndef _ASMLANGUAGE
+
+#include <stdarg.h>
+
+#include <syscall_list.h>
+#include <zephyr/syscall.h>
+
+#include <zephyr/linker/sections.h>
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern void z_impl_xtensa_user_fault(unsigned int reason);
+
+__pinned_func
+static inline void xtensa_user_fault(unsigned int reason)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; unsigned int val; } parm0 = { .val = reason };
+		(void) arch_syscall_invoke1(parm0.x, K_SYSCALL_XTENSA_USER_FAULT);
+		return;
+	}
+#endif
+	compiler_barrier();
+	z_impl_xtensa_user_fault(reason);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define xtensa_user_fault(reason) do { 	sys_port_trace_syscall_enter(K_SYSCALL_XTENSA_USER_FAULT, xtensa_user_fault, reason); 	xtensa_user_fault(reason); 	sys_port_trace_syscall_exit(K_SYSCALL_XTENSA_USER_FAULT, xtensa_user_fault, reason); } while(false)
+#endif
+#endif
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif /* include guard */
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/atomic_c.h b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/atomic_c.h
new file mode 100644
index 0000000..9ddb691
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/atomic_c.h
@@ -0,0 +1,270 @@
+/* auto-generated by gen_syscalls.py, don't edit */
+
+#ifndef Z_INCLUDE_SYSCALLS_ATOMIC_C_H
+#define Z_INCLUDE_SYSCALLS_ATOMIC_C_H
+
+
+#include <zephyr/tracing/tracing_syscall.h>
+
+#ifndef _ASMLANGUAGE
+
+#include <stdarg.h>
+
+#include <syscall_list.h>
+#include <zephyr/syscall.h>
+
+#include <zephyr/linker/sections.h>
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern bool z_impl_atomic_cas(atomic_t * target, atomic_val_t old_value, atomic_val_t new_value);
+
+__pinned_func
+static inline bool atomic_cas(atomic_t * target, atomic_val_t old_value, atomic_val_t new_value)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; atomic_t * val; } parm0 = { .val = target };
+		union { uintptr_t x; atomic_val_t val; } parm1 = { .val = old_value };
+		union { uintptr_t x; atomic_val_t val; } parm2 = { .val = new_value };
+		return (bool) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_ATOMIC_CAS);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_atomic_cas(target, old_value, new_value);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define atomic_cas(target, old_value, new_value) ({ 	bool syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_ATOMIC_CAS, atomic_cas, target, old_value, new_value); 	syscall__retval = atomic_cas(target, old_value, new_value); 	sys_port_trace_syscall_exit(K_SYSCALL_ATOMIC_CAS, atomic_cas, target, old_value, new_value, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern bool z_impl_atomic_ptr_cas(atomic_ptr_t * target, atomic_ptr_val_t old_value, atomic_ptr_val_t new_value);
+
+__pinned_func
+static inline bool atomic_ptr_cas(atomic_ptr_t * target, atomic_ptr_val_t old_value, atomic_ptr_val_t new_value)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; atomic_ptr_t * val; } parm0 = { .val = target };
+		union { uintptr_t x; atomic_ptr_val_t val; } parm1 = { .val = old_value };
+		union { uintptr_t x; atomic_ptr_val_t val; } parm2 = { .val = new_value };
+		return (bool) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_ATOMIC_PTR_CAS);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_atomic_ptr_cas(target, old_value, new_value);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define atomic_ptr_cas(target, old_value, new_value) ({ 	bool syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_ATOMIC_PTR_CAS, atomic_ptr_cas, target, old_value, new_value); 	syscall__retval = atomic_ptr_cas(target, old_value, new_value); 	sys_port_trace_syscall_exit(K_SYSCALL_ATOMIC_PTR_CAS, atomic_ptr_cas, target, old_value, new_value, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern atomic_val_t z_impl_atomic_add(atomic_t * target, atomic_val_t value);
+
+__pinned_func
+static inline atomic_val_t atomic_add(atomic_t * target, atomic_val_t value)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; atomic_t * val; } parm0 = { .val = target };
+		union { uintptr_t x; atomic_val_t val; } parm1 = { .val = value };
+		return (atomic_val_t) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_ATOMIC_ADD);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_atomic_add(target, value);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define atomic_add(target, value) ({ 	atomic_val_t syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_ATOMIC_ADD, atomic_add, target, value); 	syscall__retval = atomic_add(target, value); 	sys_port_trace_syscall_exit(K_SYSCALL_ATOMIC_ADD, atomic_add, target, value, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern atomic_val_t z_impl_atomic_sub(atomic_t * target, atomic_val_t value);
+
+__pinned_func
+static inline atomic_val_t atomic_sub(atomic_t * target, atomic_val_t value)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; atomic_t * val; } parm0 = { .val = target };
+		union { uintptr_t x; atomic_val_t val; } parm1 = { .val = value };
+		return (atomic_val_t) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_ATOMIC_SUB);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_atomic_sub(target, value);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define atomic_sub(target, value) ({ 	atomic_val_t syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_ATOMIC_SUB, atomic_sub, target, value); 	syscall__retval = atomic_sub(target, value); 	sys_port_trace_syscall_exit(K_SYSCALL_ATOMIC_SUB, atomic_sub, target, value, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern atomic_val_t z_impl_atomic_set(atomic_t * target, atomic_val_t value);
+
+__pinned_func
+static inline atomic_val_t atomic_set(atomic_t * target, atomic_val_t value)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; atomic_t * val; } parm0 = { .val = target };
+		union { uintptr_t x; atomic_val_t val; } parm1 = { .val = value };
+		return (atomic_val_t) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_ATOMIC_SET);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_atomic_set(target, value);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define atomic_set(target, value) ({ 	atomic_val_t syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_ATOMIC_SET, atomic_set, target, value); 	syscall__retval = atomic_set(target, value); 	sys_port_trace_syscall_exit(K_SYSCALL_ATOMIC_SET, atomic_set, target, value, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern atomic_ptr_val_t z_impl_atomic_ptr_set(atomic_ptr_t * target, atomic_ptr_val_t value);
+
+__pinned_func
+static inline atomic_ptr_val_t atomic_ptr_set(atomic_ptr_t * target, atomic_ptr_val_t value)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; atomic_ptr_t * val; } parm0 = { .val = target };
+		union { uintptr_t x; atomic_ptr_val_t val; } parm1 = { .val = value };
+		return (atomic_ptr_val_t) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_ATOMIC_PTR_SET);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_atomic_ptr_set(target, value);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define atomic_ptr_set(target, value) ({ 	atomic_ptr_val_t syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_ATOMIC_PTR_SET, atomic_ptr_set, target, value); 	syscall__retval = atomic_ptr_set(target, value); 	sys_port_trace_syscall_exit(K_SYSCALL_ATOMIC_PTR_SET, atomic_ptr_set, target, value, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern atomic_val_t z_impl_atomic_or(atomic_t * target, atomic_val_t value);
+
+__pinned_func
+static inline atomic_val_t atomic_or(atomic_t * target, atomic_val_t value)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; atomic_t * val; } parm0 = { .val = target };
+		union { uintptr_t x; atomic_val_t val; } parm1 = { .val = value };
+		return (atomic_val_t) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_ATOMIC_OR);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_atomic_or(target, value);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define atomic_or(target, value) ({ 	atomic_val_t syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_ATOMIC_OR, atomic_or, target, value); 	syscall__retval = atomic_or(target, value); 	sys_port_trace_syscall_exit(K_SYSCALL_ATOMIC_OR, atomic_or, target, value, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern atomic_val_t z_impl_atomic_xor(atomic_t * target, atomic_val_t value);
+
+__pinned_func
+static inline atomic_val_t atomic_xor(atomic_t * target, atomic_val_t value)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; atomic_t * val; } parm0 = { .val = target };
+		union { uintptr_t x; atomic_val_t val; } parm1 = { .val = value };
+		return (atomic_val_t) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_ATOMIC_XOR);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_atomic_xor(target, value);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define atomic_xor(target, value) ({ 	atomic_val_t syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_ATOMIC_XOR, atomic_xor, target, value); 	syscall__retval = atomic_xor(target, value); 	sys_port_trace_syscall_exit(K_SYSCALL_ATOMIC_XOR, atomic_xor, target, value, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern atomic_val_t z_impl_atomic_and(atomic_t * target, atomic_val_t value);
+
+__pinned_func
+static inline atomic_val_t atomic_and(atomic_t * target, atomic_val_t value)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; atomic_t * val; } parm0 = { .val = target };
+		union { uintptr_t x; atomic_val_t val; } parm1 = { .val = value };
+		return (atomic_val_t) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_ATOMIC_AND);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_atomic_and(target, value);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define atomic_and(target, value) ({ 	atomic_val_t syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_ATOMIC_AND, atomic_and, target, value); 	syscall__retval = atomic_and(target, value); 	sys_port_trace_syscall_exit(K_SYSCALL_ATOMIC_AND, atomic_and, target, value, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern atomic_val_t z_impl_atomic_nand(atomic_t * target, atomic_val_t value);
+
+__pinned_func
+static inline atomic_val_t atomic_nand(atomic_t * target, atomic_val_t value)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; atomic_t * val; } parm0 = { .val = target };
+		union { uintptr_t x; atomic_val_t val; } parm1 = { .val = value };
+		return (atomic_val_t) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_ATOMIC_NAND);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_atomic_nand(target, value);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define atomic_nand(target, value) ({ 	atomic_val_t syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_ATOMIC_NAND, atomic_nand, target, value); 	syscall__retval = atomic_nand(target, value); 	sys_port_trace_syscall_exit(K_SYSCALL_ATOMIC_NAND, atomic_nand, target, value, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif /* include guard */
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/auxdisplay.h b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/auxdisplay.h
new file mode 100644
index 0000000..1cdfadf
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/auxdisplay.h
@@ -0,0 +1,488 @@
+/* auto-generated by gen_syscalls.py, don't edit */
+
+#ifndef Z_INCLUDE_SYSCALLS_AUXDISPLAY_H
+#define Z_INCLUDE_SYSCALLS_AUXDISPLAY_H
+
+
+#include <zephyr/tracing/tracing_syscall.h>
+
+#ifndef _ASMLANGUAGE
+
+#include <stdarg.h>
+
+#include <syscall_list.h>
+#include <zephyr/syscall.h>
+
+#include <zephyr/linker/sections.h>
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern int z_impl_auxdisplay_display_on(const struct device * dev);
+
+__pinned_func
+static inline int auxdisplay_display_on(const struct device * dev)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_AUXDISPLAY_DISPLAY_ON);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_auxdisplay_display_on(dev);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define auxdisplay_display_on(dev) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_AUXDISPLAY_DISPLAY_ON, auxdisplay_display_on, dev); 	syscall__retval = auxdisplay_display_on(dev); 	sys_port_trace_syscall_exit(K_SYSCALL_AUXDISPLAY_DISPLAY_ON, auxdisplay_display_on, dev, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_auxdisplay_display_off(const struct device * dev);
+
+__pinned_func
+static inline int auxdisplay_display_off(const struct device * dev)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_AUXDISPLAY_DISPLAY_OFF);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_auxdisplay_display_off(dev);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define auxdisplay_display_off(dev) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_AUXDISPLAY_DISPLAY_OFF, auxdisplay_display_off, dev); 	syscall__retval = auxdisplay_display_off(dev); 	sys_port_trace_syscall_exit(K_SYSCALL_AUXDISPLAY_DISPLAY_OFF, auxdisplay_display_off, dev, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_auxdisplay_cursor_set_enabled(const struct device * dev, bool enabled);
+
+__pinned_func
+static inline int auxdisplay_cursor_set_enabled(const struct device * dev, bool enabled)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; bool val; } parm1 = { .val = enabled };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_AUXDISPLAY_CURSOR_SET_ENABLED);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_auxdisplay_cursor_set_enabled(dev, enabled);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define auxdisplay_cursor_set_enabled(dev, enabled) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_AUXDISPLAY_CURSOR_SET_ENABLED, auxdisplay_cursor_set_enabled, dev, enabled); 	syscall__retval = auxdisplay_cursor_set_enabled(dev, enabled); 	sys_port_trace_syscall_exit(K_SYSCALL_AUXDISPLAY_CURSOR_SET_ENABLED, auxdisplay_cursor_set_enabled, dev, enabled, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_auxdisplay_position_blinking_set_enabled(const struct device * dev, bool enabled);
+
+__pinned_func
+static inline int auxdisplay_position_blinking_set_enabled(const struct device * dev, bool enabled)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; bool val; } parm1 = { .val = enabled };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_AUXDISPLAY_POSITION_BLINKING_SET_ENABLED);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_auxdisplay_position_blinking_set_enabled(dev, enabled);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define auxdisplay_position_blinking_set_enabled(dev, enabled) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_AUXDISPLAY_POSITION_BLINKING_SET_ENABLED, auxdisplay_position_blinking_set_enabled, dev, enabled); 	syscall__retval = auxdisplay_position_blinking_set_enabled(dev, enabled); 	sys_port_trace_syscall_exit(K_SYSCALL_AUXDISPLAY_POSITION_BLINKING_SET_ENABLED, auxdisplay_position_blinking_set_enabled, dev, enabled, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_auxdisplay_cursor_shift_set(const struct device * dev, uint8_t direction, bool display_shift);
+
+__pinned_func
+static inline int auxdisplay_cursor_shift_set(const struct device * dev, uint8_t direction, bool display_shift)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uint8_t val; } parm1 = { .val = direction };
+		union { uintptr_t x; bool val; } parm2 = { .val = display_shift };
+		return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_AUXDISPLAY_CURSOR_SHIFT_SET);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_auxdisplay_cursor_shift_set(dev, direction, display_shift);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define auxdisplay_cursor_shift_set(dev, direction, display_shift) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_AUXDISPLAY_CURSOR_SHIFT_SET, auxdisplay_cursor_shift_set, dev, direction, display_shift); 	syscall__retval = auxdisplay_cursor_shift_set(dev, direction, display_shift); 	sys_port_trace_syscall_exit(K_SYSCALL_AUXDISPLAY_CURSOR_SHIFT_SET, auxdisplay_cursor_shift_set, dev, direction, display_shift, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_auxdisplay_cursor_position_set(const struct device * dev, enum auxdisplay_position type, int16_t x, int16_t y);
+
+__pinned_func
+static inline int auxdisplay_cursor_position_set(const struct device * dev, enum auxdisplay_position type, int16_t x, int16_t y)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; enum auxdisplay_position val; } parm1 = { .val = type };
+		union { uintptr_t x; int16_t val; } parm2 = { .val = x };
+		union { uintptr_t x; int16_t val; } parm3 = { .val = y };
+		return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_AUXDISPLAY_CURSOR_POSITION_SET);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_auxdisplay_cursor_position_set(dev, type, x, y);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define auxdisplay_cursor_position_set(dev, type, x, y) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_AUXDISPLAY_CURSOR_POSITION_SET, auxdisplay_cursor_position_set, dev, type, x, y); 	syscall__retval = auxdisplay_cursor_position_set(dev, type, x, y); 	sys_port_trace_syscall_exit(K_SYSCALL_AUXDISPLAY_CURSOR_POSITION_SET, auxdisplay_cursor_position_set, dev, type, x, y, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_auxdisplay_cursor_position_get(const struct device * dev, int16_t * x, int16_t * y);
+
+__pinned_func
+static inline int auxdisplay_cursor_position_get(const struct device * dev, int16_t * x, int16_t * y)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; int16_t * val; } parm1 = { .val = x };
+		union { uintptr_t x; int16_t * val; } parm2 = { .val = y };
+		return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_AUXDISPLAY_CURSOR_POSITION_GET);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_auxdisplay_cursor_position_get(dev, x, y);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define auxdisplay_cursor_position_get(dev, x, y) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_AUXDISPLAY_CURSOR_POSITION_GET, auxdisplay_cursor_position_get, dev, x, y); 	syscall__retval = auxdisplay_cursor_position_get(dev, x, y); 	sys_port_trace_syscall_exit(K_SYSCALL_AUXDISPLAY_CURSOR_POSITION_GET, auxdisplay_cursor_position_get, dev, x, y, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_auxdisplay_display_position_set(const struct device * dev, enum auxdisplay_position type, int16_t x, int16_t y);
+
+__pinned_func
+static inline int auxdisplay_display_position_set(const struct device * dev, enum auxdisplay_position type, int16_t x, int16_t y)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; enum auxdisplay_position val; } parm1 = { .val = type };
+		union { uintptr_t x; int16_t val; } parm2 = { .val = x };
+		union { uintptr_t x; int16_t val; } parm3 = { .val = y };
+		return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_AUXDISPLAY_DISPLAY_POSITION_SET);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_auxdisplay_display_position_set(dev, type, x, y);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define auxdisplay_display_position_set(dev, type, x, y) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_AUXDISPLAY_DISPLAY_POSITION_SET, auxdisplay_display_position_set, dev, type, x, y); 	syscall__retval = auxdisplay_display_position_set(dev, type, x, y); 	sys_port_trace_syscall_exit(K_SYSCALL_AUXDISPLAY_DISPLAY_POSITION_SET, auxdisplay_display_position_set, dev, type, x, y, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_auxdisplay_display_position_get(const struct device * dev, int16_t * x, int16_t * y);
+
+__pinned_func
+static inline int auxdisplay_display_position_get(const struct device * dev, int16_t * x, int16_t * y)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; int16_t * val; } parm1 = { .val = x };
+		union { uintptr_t x; int16_t * val; } parm2 = { .val = y };
+		return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_AUXDISPLAY_DISPLAY_POSITION_GET);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_auxdisplay_display_position_get(dev, x, y);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define auxdisplay_display_position_get(dev, x, y) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_AUXDISPLAY_DISPLAY_POSITION_GET, auxdisplay_display_position_get, dev, x, y); 	syscall__retval = auxdisplay_display_position_get(dev, x, y); 	sys_port_trace_syscall_exit(K_SYSCALL_AUXDISPLAY_DISPLAY_POSITION_GET, auxdisplay_display_position_get, dev, x, y, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_auxdisplay_capabilities_get(const struct device * dev, struct auxdisplay_capabilities * capabilities);
+
+__pinned_func
+static inline int auxdisplay_capabilities_get(const struct device * dev, struct auxdisplay_capabilities * capabilities)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; struct auxdisplay_capabilities * val; } parm1 = { .val = capabilities };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_AUXDISPLAY_CAPABILITIES_GET);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_auxdisplay_capabilities_get(dev, capabilities);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define auxdisplay_capabilities_get(dev, capabilities) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_AUXDISPLAY_CAPABILITIES_GET, auxdisplay_capabilities_get, dev, capabilities); 	syscall__retval = auxdisplay_capabilities_get(dev, capabilities); 	sys_port_trace_syscall_exit(K_SYSCALL_AUXDISPLAY_CAPABILITIES_GET, auxdisplay_capabilities_get, dev, capabilities, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_auxdisplay_clear(const struct device * dev);
+
+__pinned_func
+static inline int auxdisplay_clear(const struct device * dev)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_AUXDISPLAY_CLEAR);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_auxdisplay_clear(dev);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define auxdisplay_clear(dev) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_AUXDISPLAY_CLEAR, auxdisplay_clear, dev); 	syscall__retval = auxdisplay_clear(dev); 	sys_port_trace_syscall_exit(K_SYSCALL_AUXDISPLAY_CLEAR, auxdisplay_clear, dev, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_auxdisplay_brightness_get(const struct device * dev, uint8_t * brightness);
+
+__pinned_func
+static inline int auxdisplay_brightness_get(const struct device * dev, uint8_t * brightness)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uint8_t * val; } parm1 = { .val = brightness };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_AUXDISPLAY_BRIGHTNESS_GET);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_auxdisplay_brightness_get(dev, brightness);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define auxdisplay_brightness_get(dev, brightness) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_AUXDISPLAY_BRIGHTNESS_GET, auxdisplay_brightness_get, dev, brightness); 	syscall__retval = auxdisplay_brightness_get(dev, brightness); 	sys_port_trace_syscall_exit(K_SYSCALL_AUXDISPLAY_BRIGHTNESS_GET, auxdisplay_brightness_get, dev, brightness, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_auxdisplay_brightness_set(const struct device * dev, uint8_t brightness);
+
+__pinned_func
+static inline int auxdisplay_brightness_set(const struct device * dev, uint8_t brightness)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uint8_t val; } parm1 = { .val = brightness };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_AUXDISPLAY_BRIGHTNESS_SET);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_auxdisplay_brightness_set(dev, brightness);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define auxdisplay_brightness_set(dev, brightness) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_AUXDISPLAY_BRIGHTNESS_SET, auxdisplay_brightness_set, dev, brightness); 	syscall__retval = auxdisplay_brightness_set(dev, brightness); 	sys_port_trace_syscall_exit(K_SYSCALL_AUXDISPLAY_BRIGHTNESS_SET, auxdisplay_brightness_set, dev, brightness, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_auxdisplay_backlight_get(const struct device * dev, uint8_t * backlight);
+
+__pinned_func
+static inline int auxdisplay_backlight_get(const struct device * dev, uint8_t * backlight)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uint8_t * val; } parm1 = { .val = backlight };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_AUXDISPLAY_BACKLIGHT_GET);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_auxdisplay_backlight_get(dev, backlight);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define auxdisplay_backlight_get(dev, backlight) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_AUXDISPLAY_BACKLIGHT_GET, auxdisplay_backlight_get, dev, backlight); 	syscall__retval = auxdisplay_backlight_get(dev, backlight); 	sys_port_trace_syscall_exit(K_SYSCALL_AUXDISPLAY_BACKLIGHT_GET, auxdisplay_backlight_get, dev, backlight, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_auxdisplay_backlight_set(const struct device * dev, uint8_t backlight);
+
+__pinned_func
+static inline int auxdisplay_backlight_set(const struct device * dev, uint8_t backlight)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uint8_t val; } parm1 = { .val = backlight };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_AUXDISPLAY_BACKLIGHT_SET);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_auxdisplay_backlight_set(dev, backlight);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define auxdisplay_backlight_set(dev, backlight) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_AUXDISPLAY_BACKLIGHT_SET, auxdisplay_backlight_set, dev, backlight); 	syscall__retval = auxdisplay_backlight_set(dev, backlight); 	sys_port_trace_syscall_exit(K_SYSCALL_AUXDISPLAY_BACKLIGHT_SET, auxdisplay_backlight_set, dev, backlight, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_auxdisplay_is_busy(const struct device * dev);
+
+__pinned_func
+static inline int auxdisplay_is_busy(const struct device * dev)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_AUXDISPLAY_IS_BUSY);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_auxdisplay_is_busy(dev);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define auxdisplay_is_busy(dev) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_AUXDISPLAY_IS_BUSY, auxdisplay_is_busy, dev); 	syscall__retval = auxdisplay_is_busy(dev); 	sys_port_trace_syscall_exit(K_SYSCALL_AUXDISPLAY_IS_BUSY, auxdisplay_is_busy, dev, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_auxdisplay_custom_character_set(const struct device * dev, struct auxdisplay_character * character);
+
+__pinned_func
+static inline int auxdisplay_custom_character_set(const struct device * dev, struct auxdisplay_character * character)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; struct auxdisplay_character * val; } parm1 = { .val = character };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_AUXDISPLAY_CUSTOM_CHARACTER_SET);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_auxdisplay_custom_character_set(dev, character);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define auxdisplay_custom_character_set(dev, character) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_AUXDISPLAY_CUSTOM_CHARACTER_SET, auxdisplay_custom_character_set, dev, character); 	syscall__retval = auxdisplay_custom_character_set(dev, character); 	sys_port_trace_syscall_exit(K_SYSCALL_AUXDISPLAY_CUSTOM_CHARACTER_SET, auxdisplay_custom_character_set, dev, character, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_auxdisplay_write(const struct device * dev, const uint8_t * data, uint16_t len);
+
+__pinned_func
+static inline int auxdisplay_write(const struct device * dev, const uint8_t * data, uint16_t len)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; const uint8_t * val; } parm1 = { .val = data };
+		union { uintptr_t x; uint16_t val; } parm2 = { .val = len };
+		return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_AUXDISPLAY_WRITE);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_auxdisplay_write(dev, data, len);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define auxdisplay_write(dev, data, len) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_AUXDISPLAY_WRITE, auxdisplay_write, dev, data, len); 	syscall__retval = auxdisplay_write(dev, data, len); 	sys_port_trace_syscall_exit(K_SYSCALL_AUXDISPLAY_WRITE, auxdisplay_write, dev, data, len, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_auxdisplay_custom_command(const struct device * dev, struct auxdisplay_custom_data * data);
+
+__pinned_func
+static inline int auxdisplay_custom_command(const struct device * dev, struct auxdisplay_custom_data * data)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; struct auxdisplay_custom_data * val; } parm1 = { .val = data };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_AUXDISPLAY_CUSTOM_COMMAND);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_auxdisplay_custom_command(dev, data);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define auxdisplay_custom_command(dev, data) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_AUXDISPLAY_CUSTOM_COMMAND, auxdisplay_custom_command, dev, data); 	syscall__retval = auxdisplay_custom_command(dev, data); 	sys_port_trace_syscall_exit(K_SYSCALL_AUXDISPLAY_CUSTOM_COMMAND, auxdisplay_custom_command, dev, data, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif /* include guard */
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/bbram.h b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/bbram.h
new file mode 100644
index 0000000..2dc492d
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/bbram.h
@@ -0,0 +1,173 @@
+/* auto-generated by gen_syscalls.py, don't edit */
+
+#ifndef Z_INCLUDE_SYSCALLS_BBRAM_H
+#define Z_INCLUDE_SYSCALLS_BBRAM_H
+
+
+#include <zephyr/tracing/tracing_syscall.h>
+
+#ifndef _ASMLANGUAGE
+
+#include <stdarg.h>
+
+#include <syscall_list.h>
+#include <zephyr/syscall.h>
+
+#include <zephyr/linker/sections.h>
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern int z_impl_bbram_check_invalid(const struct device * dev);
+
+__pinned_func
+static inline int bbram_check_invalid(const struct device * dev)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_BBRAM_CHECK_INVALID);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_bbram_check_invalid(dev);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define bbram_check_invalid(dev) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_BBRAM_CHECK_INVALID, bbram_check_invalid, dev); 	syscall__retval = bbram_check_invalid(dev); 	sys_port_trace_syscall_exit(K_SYSCALL_BBRAM_CHECK_INVALID, bbram_check_invalid, dev, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_bbram_check_standby_power(const struct device * dev);
+
+__pinned_func
+static inline int bbram_check_standby_power(const struct device * dev)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_BBRAM_CHECK_STANDBY_POWER);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_bbram_check_standby_power(dev);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define bbram_check_standby_power(dev) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_BBRAM_CHECK_STANDBY_POWER, bbram_check_standby_power, dev); 	syscall__retval = bbram_check_standby_power(dev); 	sys_port_trace_syscall_exit(K_SYSCALL_BBRAM_CHECK_STANDBY_POWER, bbram_check_standby_power, dev, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_bbram_check_power(const struct device * dev);
+
+__pinned_func
+static inline int bbram_check_power(const struct device * dev)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_BBRAM_CHECK_POWER);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_bbram_check_power(dev);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define bbram_check_power(dev) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_BBRAM_CHECK_POWER, bbram_check_power, dev); 	syscall__retval = bbram_check_power(dev); 	sys_port_trace_syscall_exit(K_SYSCALL_BBRAM_CHECK_POWER, bbram_check_power, dev, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_bbram_get_size(const struct device * dev, size_t * size);
+
+__pinned_func
+static inline int bbram_get_size(const struct device * dev, size_t * size)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; size_t * val; } parm1 = { .val = size };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_BBRAM_GET_SIZE);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_bbram_get_size(dev, size);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define bbram_get_size(dev, size) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_BBRAM_GET_SIZE, bbram_get_size, dev, size); 	syscall__retval = bbram_get_size(dev, size); 	sys_port_trace_syscall_exit(K_SYSCALL_BBRAM_GET_SIZE, bbram_get_size, dev, size, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_bbram_read(const struct device * dev, size_t offset, size_t size, uint8_t * data);
+
+__pinned_func
+static inline int bbram_read(const struct device * dev, size_t offset, size_t size, uint8_t * data)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; size_t val; } parm1 = { .val = offset };
+		union { uintptr_t x; size_t val; } parm2 = { .val = size };
+		union { uintptr_t x; uint8_t * val; } parm3 = { .val = data };
+		return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_BBRAM_READ);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_bbram_read(dev, offset, size, data);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define bbram_read(dev, offset, size, data) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_BBRAM_READ, bbram_read, dev, offset, size, data); 	syscall__retval = bbram_read(dev, offset, size, data); 	sys_port_trace_syscall_exit(K_SYSCALL_BBRAM_READ, bbram_read, dev, offset, size, data, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_bbram_write(const struct device * dev, size_t offset, size_t size, const uint8_t * data);
+
+__pinned_func
+static inline int bbram_write(const struct device * dev, size_t offset, size_t size, const uint8_t * data)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; size_t val; } parm1 = { .val = offset };
+		union { uintptr_t x; size_t val; } parm2 = { .val = size };
+		union { uintptr_t x; const uint8_t * val; } parm3 = { .val = data };
+		return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_BBRAM_WRITE);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_bbram_write(dev, offset, size, data);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define bbram_write(dev, offset, size, data) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_BBRAM_WRITE, bbram_write, dev, offset, size, data); 	syscall__retval = bbram_write(dev, offset, size, data); 	sys_port_trace_syscall_exit(K_SYSCALL_BBRAM_WRITE, bbram_write, dev, offset, size, data, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif /* include guard */
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/cache.h b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/cache.h
new file mode 100644
index 0000000..a942cfc
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/cache.h
@@ -0,0 +1,100 @@
+/* auto-generated by gen_syscalls.py, don't edit */
+
+#ifndef Z_INCLUDE_SYSCALLS_CACHE_H
+#define Z_INCLUDE_SYSCALLS_CACHE_H
+
+
+#include <zephyr/tracing/tracing_syscall.h>
+
+#ifndef _ASMLANGUAGE
+
+#include <stdarg.h>
+
+#include <syscall_list.h>
+#include <zephyr/syscall.h>
+
+#include <zephyr/linker/sections.h>
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern int z_impl_sys_cache_data_flush_range(void * addr, size_t size);
+
+__pinned_func
+static inline int sys_cache_data_flush_range(void * addr, size_t size)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; void * val; } parm0 = { .val = addr };
+		union { uintptr_t x; size_t val; } parm1 = { .val = size };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_SYS_CACHE_DATA_FLUSH_RANGE);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_sys_cache_data_flush_range(addr, size);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define sys_cache_data_flush_range(addr, size) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_SYS_CACHE_DATA_FLUSH_RANGE, sys_cache_data_flush_range, addr, size); 	syscall__retval = sys_cache_data_flush_range(addr, size); 	sys_port_trace_syscall_exit(K_SYSCALL_SYS_CACHE_DATA_FLUSH_RANGE, sys_cache_data_flush_range, addr, size, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_sys_cache_data_invd_range(void * addr, size_t size);
+
+__pinned_func
+static inline int sys_cache_data_invd_range(void * addr, size_t size)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; void * val; } parm0 = { .val = addr };
+		union { uintptr_t x; size_t val; } parm1 = { .val = size };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_SYS_CACHE_DATA_INVD_RANGE);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_sys_cache_data_invd_range(addr, size);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define sys_cache_data_invd_range(addr, size) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_SYS_CACHE_DATA_INVD_RANGE, sys_cache_data_invd_range, addr, size); 	syscall__retval = sys_cache_data_invd_range(addr, size); 	sys_port_trace_syscall_exit(K_SYSCALL_SYS_CACHE_DATA_INVD_RANGE, sys_cache_data_invd_range, addr, size, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_sys_cache_data_flush_and_invd_range(void * addr, size_t size);
+
+__pinned_func
+static inline int sys_cache_data_flush_and_invd_range(void * addr, size_t size)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; void * val; } parm0 = { .val = addr };
+		union { uintptr_t x; size_t val; } parm1 = { .val = size };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_SYS_CACHE_DATA_FLUSH_AND_INVD_RANGE);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_sys_cache_data_flush_and_invd_range(addr, size);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define sys_cache_data_flush_and_invd_range(addr, size) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_SYS_CACHE_DATA_FLUSH_AND_INVD_RANGE, sys_cache_data_flush_and_invd_range, addr, size); 	syscall__retval = sys_cache_data_flush_and_invd_range(addr, size); 	sys_port_trace_syscall_exit(K_SYSCALL_SYS_CACHE_DATA_FLUSH_AND_INVD_RANGE, sys_cache_data_flush_and_invd_range, addr, size, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif /* include guard */
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/can.h b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/can.h
new file mode 100644
index 0000000..ad0c301
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/can.h
@@ -0,0 +1,812 @@
+/* auto-generated by gen_syscalls.py, don't edit */
+
+#ifndef Z_INCLUDE_SYSCALLS_CAN_H
+#define Z_INCLUDE_SYSCALLS_CAN_H
+
+
+#include <zephyr/tracing/tracing_syscall.h>
+
+#ifndef _ASMLANGUAGE
+
+#include <stdarg.h>
+
+#include <syscall_list.h>
+#include <zephyr/syscall.h>
+
+#include <zephyr/linker/sections.h>
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern int z_impl_can_get_core_clock(const struct device * dev, uint32_t * rate);
+
+__pinned_func
+static inline int can_get_core_clock(const struct device * dev, uint32_t * rate)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uint32_t * val; } parm1 = { .val = rate };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_CAN_GET_CORE_CLOCK);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_can_get_core_clock(dev, rate);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define can_get_core_clock(dev, rate) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_CAN_GET_CORE_CLOCK, can_get_core_clock, dev, rate); 	syscall__retval = can_get_core_clock(dev, rate); 	sys_port_trace_syscall_exit(K_SYSCALL_CAN_GET_CORE_CLOCK, can_get_core_clock, dev, rate, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern uint32_t z_impl_can_get_bitrate_min(const struct device * dev);
+
+__pinned_func
+static inline uint32_t can_get_bitrate_min(const struct device * dev)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		return (uint32_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_CAN_GET_BITRATE_MIN);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_can_get_bitrate_min(dev);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define can_get_bitrate_min(dev) ({ 	uint32_t syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_CAN_GET_BITRATE_MIN, can_get_bitrate_min, dev); 	syscall__retval = can_get_bitrate_min(dev); 	sys_port_trace_syscall_exit(K_SYSCALL_CAN_GET_BITRATE_MIN, can_get_bitrate_min, dev, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern uint32_t z_impl_can_get_bitrate_max(const struct device * dev);
+
+__pinned_func
+static inline uint32_t can_get_bitrate_max(const struct device * dev)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		return (uint32_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_CAN_GET_BITRATE_MAX);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_can_get_bitrate_max(dev);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define can_get_bitrate_max(dev) ({ 	uint32_t syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_CAN_GET_BITRATE_MAX, can_get_bitrate_max, dev); 	syscall__retval = can_get_bitrate_max(dev); 	sys_port_trace_syscall_exit(K_SYSCALL_CAN_GET_BITRATE_MAX, can_get_bitrate_max, dev, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern const struct can_timing * z_impl_can_get_timing_min(const struct device * dev);
+
+__pinned_func
+static inline const struct can_timing * can_get_timing_min(const struct device * dev)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		return (const struct can_timing *) arch_syscall_invoke1(parm0.x, K_SYSCALL_CAN_GET_TIMING_MIN);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_can_get_timing_min(dev);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define can_get_timing_min(dev) ({ 	const struct can_timing * syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_CAN_GET_TIMING_MIN, can_get_timing_min, dev); 	syscall__retval = can_get_timing_min(dev); 	sys_port_trace_syscall_exit(K_SYSCALL_CAN_GET_TIMING_MIN, can_get_timing_min, dev, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern const struct can_timing * z_impl_can_get_timing_max(const struct device * dev);
+
+__pinned_func
+static inline const struct can_timing * can_get_timing_max(const struct device * dev)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		return (const struct can_timing *) arch_syscall_invoke1(parm0.x, K_SYSCALL_CAN_GET_TIMING_MAX);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_can_get_timing_max(dev);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define can_get_timing_max(dev) ({ 	const struct can_timing * syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_CAN_GET_TIMING_MAX, can_get_timing_max, dev); 	syscall__retval = can_get_timing_max(dev); 	sys_port_trace_syscall_exit(K_SYSCALL_CAN_GET_TIMING_MAX, can_get_timing_max, dev, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_can_calc_timing(const struct device * dev, struct can_timing * res, uint32_t bitrate, uint16_t sample_pnt);
+
+__pinned_func
+static inline int can_calc_timing(const struct device * dev, struct can_timing * res, uint32_t bitrate, uint16_t sample_pnt)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; struct can_timing * val; } parm1 = { .val = res };
+		union { uintptr_t x; uint32_t val; } parm2 = { .val = bitrate };
+		union { uintptr_t x; uint16_t val; } parm3 = { .val = sample_pnt };
+		return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_CAN_CALC_TIMING);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_can_calc_timing(dev, res, bitrate, sample_pnt);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define can_calc_timing(dev, res, bitrate, sample_pnt) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_CAN_CALC_TIMING, can_calc_timing, dev, res, bitrate, sample_pnt); 	syscall__retval = can_calc_timing(dev, res, bitrate, sample_pnt); 	sys_port_trace_syscall_exit(K_SYSCALL_CAN_CALC_TIMING, can_calc_timing, dev, res, bitrate, sample_pnt, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern const struct can_timing * z_impl_can_get_timing_data_min(const struct device * dev);
+
+__pinned_func
+static inline const struct can_timing * can_get_timing_data_min(const struct device * dev)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		return (const struct can_timing *) arch_syscall_invoke1(parm0.x, K_SYSCALL_CAN_GET_TIMING_DATA_MIN);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_can_get_timing_data_min(dev);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define can_get_timing_data_min(dev) ({ 	const struct can_timing * syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_CAN_GET_TIMING_DATA_MIN, can_get_timing_data_min, dev); 	syscall__retval = can_get_timing_data_min(dev); 	sys_port_trace_syscall_exit(K_SYSCALL_CAN_GET_TIMING_DATA_MIN, can_get_timing_data_min, dev, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern const struct can_timing * z_impl_can_get_timing_data_max(const struct device * dev);
+
+__pinned_func
+static inline const struct can_timing * can_get_timing_data_max(const struct device * dev)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		return (const struct can_timing *) arch_syscall_invoke1(parm0.x, K_SYSCALL_CAN_GET_TIMING_DATA_MAX);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_can_get_timing_data_max(dev);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define can_get_timing_data_max(dev) ({ 	const struct can_timing * syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_CAN_GET_TIMING_DATA_MAX, can_get_timing_data_max, dev); 	syscall__retval = can_get_timing_data_max(dev); 	sys_port_trace_syscall_exit(K_SYSCALL_CAN_GET_TIMING_DATA_MAX, can_get_timing_data_max, dev, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_can_calc_timing_data(const struct device * dev, struct can_timing * res, uint32_t bitrate, uint16_t sample_pnt);
+
+__pinned_func
+static inline int can_calc_timing_data(const struct device * dev, struct can_timing * res, uint32_t bitrate, uint16_t sample_pnt)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; struct can_timing * val; } parm1 = { .val = res };
+		union { uintptr_t x; uint32_t val; } parm2 = { .val = bitrate };
+		union { uintptr_t x; uint16_t val; } parm3 = { .val = sample_pnt };
+		return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_CAN_CALC_TIMING_DATA);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_can_calc_timing_data(dev, res, bitrate, sample_pnt);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define can_calc_timing_data(dev, res, bitrate, sample_pnt) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_CAN_CALC_TIMING_DATA, can_calc_timing_data, dev, res, bitrate, sample_pnt); 	syscall__retval = can_calc_timing_data(dev, res, bitrate, sample_pnt); 	sys_port_trace_syscall_exit(K_SYSCALL_CAN_CALC_TIMING_DATA, can_calc_timing_data, dev, res, bitrate, sample_pnt, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_can_set_timing_data(const struct device * dev, const struct can_timing * timing_data);
+
+__pinned_func
+static inline int can_set_timing_data(const struct device * dev, const struct can_timing * timing_data)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; const struct can_timing * val; } parm1 = { .val = timing_data };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_CAN_SET_TIMING_DATA);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_can_set_timing_data(dev, timing_data);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define can_set_timing_data(dev, timing_data) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_CAN_SET_TIMING_DATA, can_set_timing_data, dev, timing_data); 	syscall__retval = can_set_timing_data(dev, timing_data); 	sys_port_trace_syscall_exit(K_SYSCALL_CAN_SET_TIMING_DATA, can_set_timing_data, dev, timing_data, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_can_set_bitrate_data(const struct device * dev, uint32_t bitrate_data);
+
+__pinned_func
+static inline int can_set_bitrate_data(const struct device * dev, uint32_t bitrate_data)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uint32_t val; } parm1 = { .val = bitrate_data };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_CAN_SET_BITRATE_DATA);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_can_set_bitrate_data(dev, bitrate_data);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define can_set_bitrate_data(dev, bitrate_data) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_CAN_SET_BITRATE_DATA, can_set_bitrate_data, dev, bitrate_data); 	syscall__retval = can_set_bitrate_data(dev, bitrate_data); 	sys_port_trace_syscall_exit(K_SYSCALL_CAN_SET_BITRATE_DATA, can_set_bitrate_data, dev, bitrate_data, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_can_set_timing(const struct device * dev, const struct can_timing * timing);
+
+__pinned_func
+static inline int can_set_timing(const struct device * dev, const struct can_timing * timing)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; const struct can_timing * val; } parm1 = { .val = timing };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_CAN_SET_TIMING);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_can_set_timing(dev, timing);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define can_set_timing(dev, timing) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_CAN_SET_TIMING, can_set_timing, dev, timing); 	syscall__retval = can_set_timing(dev, timing); 	sys_port_trace_syscall_exit(K_SYSCALL_CAN_SET_TIMING, can_set_timing, dev, timing, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_can_get_capabilities(const struct device * dev, can_mode_t * cap);
+
+__pinned_func
+static inline int can_get_capabilities(const struct device * dev, can_mode_t * cap)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; can_mode_t * val; } parm1 = { .val = cap };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_CAN_GET_CAPABILITIES);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_can_get_capabilities(dev, cap);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define can_get_capabilities(dev, cap) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_CAN_GET_CAPABILITIES, can_get_capabilities, dev, cap); 	syscall__retval = can_get_capabilities(dev, cap); 	sys_port_trace_syscall_exit(K_SYSCALL_CAN_GET_CAPABILITIES, can_get_capabilities, dev, cap, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern const struct device * z_impl_can_get_transceiver(const struct device * dev);
+
+__pinned_func
+static inline const struct device * can_get_transceiver(const struct device * dev)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		return (const struct device *) arch_syscall_invoke1(parm0.x, K_SYSCALL_CAN_GET_TRANSCEIVER);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_can_get_transceiver(dev);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define can_get_transceiver(dev) ({ 	const struct device * syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_CAN_GET_TRANSCEIVER, can_get_transceiver, dev); 	syscall__retval = can_get_transceiver(dev); 	sys_port_trace_syscall_exit(K_SYSCALL_CAN_GET_TRANSCEIVER, can_get_transceiver, dev, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_can_start(const struct device * dev);
+
+__pinned_func
+static inline int can_start(const struct device * dev)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_CAN_START);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_can_start(dev);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define can_start(dev) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_CAN_START, can_start, dev); 	syscall__retval = can_start(dev); 	sys_port_trace_syscall_exit(K_SYSCALL_CAN_START, can_start, dev, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_can_stop(const struct device * dev);
+
+__pinned_func
+static inline int can_stop(const struct device * dev)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_CAN_STOP);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_can_stop(dev);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define can_stop(dev) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_CAN_STOP, can_stop, dev); 	syscall__retval = can_stop(dev); 	sys_port_trace_syscall_exit(K_SYSCALL_CAN_STOP, can_stop, dev, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_can_set_mode(const struct device * dev, can_mode_t mode);
+
+__pinned_func
+static inline int can_set_mode(const struct device * dev, can_mode_t mode)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; can_mode_t val; } parm1 = { .val = mode };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_CAN_SET_MODE);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_can_set_mode(dev, mode);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define can_set_mode(dev, mode) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_CAN_SET_MODE, can_set_mode, dev, mode); 	syscall__retval = can_set_mode(dev, mode); 	sys_port_trace_syscall_exit(K_SYSCALL_CAN_SET_MODE, can_set_mode, dev, mode, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern can_mode_t z_impl_can_get_mode(const struct device * dev);
+
+__pinned_func
+static inline can_mode_t can_get_mode(const struct device * dev)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		return (can_mode_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_CAN_GET_MODE);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_can_get_mode(dev);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define can_get_mode(dev) ({ 	can_mode_t syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_CAN_GET_MODE, can_get_mode, dev); 	syscall__retval = can_get_mode(dev); 	sys_port_trace_syscall_exit(K_SYSCALL_CAN_GET_MODE, can_get_mode, dev, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_can_set_bitrate(const struct device * dev, uint32_t bitrate);
+
+__pinned_func
+static inline int can_set_bitrate(const struct device * dev, uint32_t bitrate)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uint32_t val; } parm1 = { .val = bitrate };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_CAN_SET_BITRATE);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_can_set_bitrate(dev, bitrate);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define can_set_bitrate(dev, bitrate) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_CAN_SET_BITRATE, can_set_bitrate, dev, bitrate); 	syscall__retval = can_set_bitrate(dev, bitrate); 	sys_port_trace_syscall_exit(K_SYSCALL_CAN_SET_BITRATE, can_set_bitrate, dev, bitrate, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_can_send(const struct device * dev, const struct can_frame * frame, k_timeout_t timeout, can_tx_callback_t callback, void * user_data);
+
+__pinned_func
+static inline int can_send(const struct device * dev, const struct can_frame * frame, k_timeout_t timeout, can_tx_callback_t callback, void * user_data)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; const struct can_frame * val; } parm1 = { .val = frame };
+		union { struct { uintptr_t lo, hi; } split; k_timeout_t val; } parm2 = { .val = timeout };
+		union { uintptr_t x; can_tx_callback_t val; } parm3 = { .val = callback };
+		union { uintptr_t x; void * val; } parm4 = { .val = user_data };
+		return (int) arch_syscall_invoke6(parm0.x, parm1.x, parm2.split.lo, parm2.split.hi, parm3.x, parm4.x, K_SYSCALL_CAN_SEND);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_can_send(dev, frame, timeout, callback, user_data);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define can_send(dev, frame, timeout, callback, user_data) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_CAN_SEND, can_send, dev, frame, timeout, callback, user_data); 	syscall__retval = can_send(dev, frame, timeout, callback, user_data); 	sys_port_trace_syscall_exit(K_SYSCALL_CAN_SEND, can_send, dev, frame, timeout, callback, user_data, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_can_add_rx_filter_msgq(const struct device * dev, struct k_msgq * msgq, const struct can_filter * filter);
+
+__pinned_func
+static inline int can_add_rx_filter_msgq(const struct device * dev, struct k_msgq * msgq, const struct can_filter * filter)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; struct k_msgq * val; } parm1 = { .val = msgq };
+		union { uintptr_t x; const struct can_filter * val; } parm2 = { .val = filter };
+		return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_CAN_ADD_RX_FILTER_MSGQ);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_can_add_rx_filter_msgq(dev, msgq, filter);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define can_add_rx_filter_msgq(dev, msgq, filter) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_CAN_ADD_RX_FILTER_MSGQ, can_add_rx_filter_msgq, dev, msgq, filter); 	syscall__retval = can_add_rx_filter_msgq(dev, msgq, filter); 	sys_port_trace_syscall_exit(K_SYSCALL_CAN_ADD_RX_FILTER_MSGQ, can_add_rx_filter_msgq, dev, msgq, filter, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern void z_impl_can_remove_rx_filter(const struct device * dev, int filter_id);
+
+__pinned_func
+static inline void can_remove_rx_filter(const struct device * dev, int filter_id)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; int val; } parm1 = { .val = filter_id };
+		(void) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_CAN_REMOVE_RX_FILTER);
+		return;
+	}
+#endif
+	compiler_barrier();
+	z_impl_can_remove_rx_filter(dev, filter_id);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define can_remove_rx_filter(dev, filter_id) do { 	sys_port_trace_syscall_enter(K_SYSCALL_CAN_REMOVE_RX_FILTER, can_remove_rx_filter, dev, filter_id); 	can_remove_rx_filter(dev, filter_id); 	sys_port_trace_syscall_exit(K_SYSCALL_CAN_REMOVE_RX_FILTER, can_remove_rx_filter, dev, filter_id); } while(false)
+#endif
+#endif
+
+
+extern int z_impl_can_get_max_filters(const struct device * dev, bool ide);
+
+__pinned_func
+static inline int can_get_max_filters(const struct device * dev, bool ide)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; bool val; } parm1 = { .val = ide };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_CAN_GET_MAX_FILTERS);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_can_get_max_filters(dev, ide);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define can_get_max_filters(dev, ide) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_CAN_GET_MAX_FILTERS, can_get_max_filters, dev, ide); 	syscall__retval = can_get_max_filters(dev, ide); 	sys_port_trace_syscall_exit(K_SYSCALL_CAN_GET_MAX_FILTERS, can_get_max_filters, dev, ide, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_can_get_state(const struct device * dev, enum can_state * state, struct can_bus_err_cnt * err_cnt);
+
+__pinned_func
+static inline int can_get_state(const struct device * dev, enum can_state * state, struct can_bus_err_cnt * err_cnt)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; enum can_state * val; } parm1 = { .val = state };
+		union { uintptr_t x; struct can_bus_err_cnt * val; } parm2 = { .val = err_cnt };
+		return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_CAN_GET_STATE);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_can_get_state(dev, state, err_cnt);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define can_get_state(dev, state, err_cnt) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_CAN_GET_STATE, can_get_state, dev, state, err_cnt); 	syscall__retval = can_get_state(dev, state, err_cnt); 	sys_port_trace_syscall_exit(K_SYSCALL_CAN_GET_STATE, can_get_state, dev, state, err_cnt, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_can_recover(const struct device * dev, k_timeout_t timeout);
+
+__pinned_func
+static inline int can_recover(const struct device * dev, k_timeout_t timeout)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { struct { uintptr_t lo, hi; } split; k_timeout_t val; } parm1 = { .val = timeout };
+		return (int) arch_syscall_invoke3(parm0.x, parm1.split.lo, parm1.split.hi, K_SYSCALL_CAN_RECOVER);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_can_recover(dev, timeout);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define can_recover(dev, timeout) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_CAN_RECOVER, can_recover, dev, timeout); 	syscall__retval = can_recover(dev, timeout); 	sys_port_trace_syscall_exit(K_SYSCALL_CAN_RECOVER, can_recover, dev, timeout, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern uint32_t z_impl_can_stats_get_bit_errors(const struct device * dev);
+
+__pinned_func
+static inline uint32_t can_stats_get_bit_errors(const struct device * dev)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		return (uint32_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_CAN_STATS_GET_BIT_ERRORS);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_can_stats_get_bit_errors(dev);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define can_stats_get_bit_errors(dev) ({ 	uint32_t syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_CAN_STATS_GET_BIT_ERRORS, can_stats_get_bit_errors, dev); 	syscall__retval = can_stats_get_bit_errors(dev); 	sys_port_trace_syscall_exit(K_SYSCALL_CAN_STATS_GET_BIT_ERRORS, can_stats_get_bit_errors, dev, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern uint32_t z_impl_can_stats_get_bit0_errors(const struct device * dev);
+
+__pinned_func
+static inline uint32_t can_stats_get_bit0_errors(const struct device * dev)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		return (uint32_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_CAN_STATS_GET_BIT0_ERRORS);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_can_stats_get_bit0_errors(dev);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define can_stats_get_bit0_errors(dev) ({ 	uint32_t syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_CAN_STATS_GET_BIT0_ERRORS, can_stats_get_bit0_errors, dev); 	syscall__retval = can_stats_get_bit0_errors(dev); 	sys_port_trace_syscall_exit(K_SYSCALL_CAN_STATS_GET_BIT0_ERRORS, can_stats_get_bit0_errors, dev, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern uint32_t z_impl_can_stats_get_bit1_errors(const struct device * dev);
+
+__pinned_func
+static inline uint32_t can_stats_get_bit1_errors(const struct device * dev)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		return (uint32_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_CAN_STATS_GET_BIT1_ERRORS);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_can_stats_get_bit1_errors(dev);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define can_stats_get_bit1_errors(dev) ({ 	uint32_t syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_CAN_STATS_GET_BIT1_ERRORS, can_stats_get_bit1_errors, dev); 	syscall__retval = can_stats_get_bit1_errors(dev); 	sys_port_trace_syscall_exit(K_SYSCALL_CAN_STATS_GET_BIT1_ERRORS, can_stats_get_bit1_errors, dev, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern uint32_t z_impl_can_stats_get_stuff_errors(const struct device * dev);
+
+__pinned_func
+static inline uint32_t can_stats_get_stuff_errors(const struct device * dev)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		return (uint32_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_CAN_STATS_GET_STUFF_ERRORS);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_can_stats_get_stuff_errors(dev);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define can_stats_get_stuff_errors(dev) ({ 	uint32_t syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_CAN_STATS_GET_STUFF_ERRORS, can_stats_get_stuff_errors, dev); 	syscall__retval = can_stats_get_stuff_errors(dev); 	sys_port_trace_syscall_exit(K_SYSCALL_CAN_STATS_GET_STUFF_ERRORS, can_stats_get_stuff_errors, dev, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern uint32_t z_impl_can_stats_get_crc_errors(const struct device * dev);
+
+__pinned_func
+static inline uint32_t can_stats_get_crc_errors(const struct device * dev)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		return (uint32_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_CAN_STATS_GET_CRC_ERRORS);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_can_stats_get_crc_errors(dev);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define can_stats_get_crc_errors(dev) ({ 	uint32_t syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_CAN_STATS_GET_CRC_ERRORS, can_stats_get_crc_errors, dev); 	syscall__retval = can_stats_get_crc_errors(dev); 	sys_port_trace_syscall_exit(K_SYSCALL_CAN_STATS_GET_CRC_ERRORS, can_stats_get_crc_errors, dev, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern uint32_t z_impl_can_stats_get_form_errors(const struct device * dev);
+
+__pinned_func
+static inline uint32_t can_stats_get_form_errors(const struct device * dev)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		return (uint32_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_CAN_STATS_GET_FORM_ERRORS);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_can_stats_get_form_errors(dev);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define can_stats_get_form_errors(dev) ({ 	uint32_t syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_CAN_STATS_GET_FORM_ERRORS, can_stats_get_form_errors, dev); 	syscall__retval = can_stats_get_form_errors(dev); 	sys_port_trace_syscall_exit(K_SYSCALL_CAN_STATS_GET_FORM_ERRORS, can_stats_get_form_errors, dev, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern uint32_t z_impl_can_stats_get_ack_errors(const struct device * dev);
+
+__pinned_func
+static inline uint32_t can_stats_get_ack_errors(const struct device * dev)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		return (uint32_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_CAN_STATS_GET_ACK_ERRORS);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_can_stats_get_ack_errors(dev);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define can_stats_get_ack_errors(dev) ({ 	uint32_t syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_CAN_STATS_GET_ACK_ERRORS, can_stats_get_ack_errors, dev); 	syscall__retval = can_stats_get_ack_errors(dev); 	sys_port_trace_syscall_exit(K_SYSCALL_CAN_STATS_GET_ACK_ERRORS, can_stats_get_ack_errors, dev, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern uint32_t z_impl_can_stats_get_rx_overruns(const struct device * dev);
+
+__pinned_func
+static inline uint32_t can_stats_get_rx_overruns(const struct device * dev)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		return (uint32_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_CAN_STATS_GET_RX_OVERRUNS);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_can_stats_get_rx_overruns(dev);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define can_stats_get_rx_overruns(dev) ({ 	uint32_t syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_CAN_STATS_GET_RX_OVERRUNS, can_stats_get_rx_overruns, dev); 	syscall__retval = can_stats_get_rx_overruns(dev); 	sys_port_trace_syscall_exit(K_SYSCALL_CAN_STATS_GET_RX_OVERRUNS, can_stats_get_rx_overruns, dev, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif /* include guard */
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/charger.h b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/charger.h
new file mode 100644
index 0000000..c61582f
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/charger.h
@@ -0,0 +1,102 @@
+/* auto-generated by gen_syscalls.py, don't edit */
+
+#ifndef Z_INCLUDE_SYSCALLS_CHARGER_H
+#define Z_INCLUDE_SYSCALLS_CHARGER_H
+
+
+#include <zephyr/tracing/tracing_syscall.h>
+
+#ifndef _ASMLANGUAGE
+
+#include <stdarg.h>
+
+#include <syscall_list.h>
+#include <zephyr/syscall.h>
+
+#include <zephyr/linker/sections.h>
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern int z_impl_charger_get_prop(const struct device * dev, const charger_prop_t prop, union charger_propval * val);
+
+__pinned_func
+static inline int charger_get_prop(const struct device * dev, const charger_prop_t prop, union charger_propval * val)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; const charger_prop_t val; } parm1 = { .val = prop };
+		union { uintptr_t x; union charger_propval * val; } parm2 = { .val = val };
+		return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_CHARGER_GET_PROP);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_charger_get_prop(dev, prop, val);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define charger_get_prop(dev, prop, val) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_CHARGER_GET_PROP, charger_get_prop, dev, prop, val); 	syscall__retval = charger_get_prop(dev, prop, val); 	sys_port_trace_syscall_exit(K_SYSCALL_CHARGER_GET_PROP, charger_get_prop, dev, prop, val, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_charger_set_prop(const struct device * dev, const charger_prop_t prop, const union charger_propval * val);
+
+__pinned_func
+static inline int charger_set_prop(const struct device * dev, const charger_prop_t prop, const union charger_propval * val)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; const charger_prop_t val; } parm1 = { .val = prop };
+		union { uintptr_t x; const union charger_propval * val; } parm2 = { .val = val };
+		return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_CHARGER_SET_PROP);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_charger_set_prop(dev, prop, val);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define charger_set_prop(dev, prop, val) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_CHARGER_SET_PROP, charger_set_prop, dev, prop, val); 	syscall__retval = charger_set_prop(dev, prop, val); 	sys_port_trace_syscall_exit(K_SYSCALL_CHARGER_SET_PROP, charger_set_prop, dev, prop, val, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_charger_charge_enable(const struct device * dev, const bool enable);
+
+__pinned_func
+static inline int charger_charge_enable(const struct device * dev, const bool enable)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; const bool val; } parm1 = { .val = enable };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_CHARGER_CHARGE_ENABLE);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_charger_charge_enable(dev, enable);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define charger_charge_enable(dev, enable) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_CHARGER_CHARGE_ENABLE, charger_charge_enable, dev, enable); 	syscall__retval = charger_charge_enable(dev, enable); 	sys_port_trace_syscall_exit(K_SYSCALL_CHARGER_CHARGE_ENABLE, charger_charge_enable, dev, enable, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif /* include guard */
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/counter.h b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/counter.h
new file mode 100644
index 0000000..6fe95d7
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/counter.h
@@ -0,0 +1,432 @@
+/* auto-generated by gen_syscalls.py, don't edit */
+
+#ifndef Z_INCLUDE_SYSCALLS_COUNTER_H
+#define Z_INCLUDE_SYSCALLS_COUNTER_H
+
+
+#include <zephyr/tracing/tracing_syscall.h>
+
+#ifndef _ASMLANGUAGE
+
+#include <stdarg.h>
+
+#include <syscall_list.h>
+#include <zephyr/syscall.h>
+
+#include <zephyr/linker/sections.h>
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern bool z_impl_counter_is_counting_up(const struct device * dev);
+
+__pinned_func
+static inline bool counter_is_counting_up(const struct device * dev)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		return (bool) arch_syscall_invoke1(parm0.x, K_SYSCALL_COUNTER_IS_COUNTING_UP);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_counter_is_counting_up(dev);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define counter_is_counting_up(dev) ({ 	bool syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_COUNTER_IS_COUNTING_UP, counter_is_counting_up, dev); 	syscall__retval = counter_is_counting_up(dev); 	sys_port_trace_syscall_exit(K_SYSCALL_COUNTER_IS_COUNTING_UP, counter_is_counting_up, dev, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern uint8_t z_impl_counter_get_num_of_channels(const struct device * dev);
+
+__pinned_func
+static inline uint8_t counter_get_num_of_channels(const struct device * dev)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		return (uint8_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_COUNTER_GET_NUM_OF_CHANNELS);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_counter_get_num_of_channels(dev);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define counter_get_num_of_channels(dev) ({ 	uint8_t syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_COUNTER_GET_NUM_OF_CHANNELS, counter_get_num_of_channels, dev); 	syscall__retval = counter_get_num_of_channels(dev); 	sys_port_trace_syscall_exit(K_SYSCALL_COUNTER_GET_NUM_OF_CHANNELS, counter_get_num_of_channels, dev, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern uint32_t z_impl_counter_get_frequency(const struct device * dev);
+
+__pinned_func
+static inline uint32_t counter_get_frequency(const struct device * dev)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		return (uint32_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_COUNTER_GET_FREQUENCY);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_counter_get_frequency(dev);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define counter_get_frequency(dev) ({ 	uint32_t syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_COUNTER_GET_FREQUENCY, counter_get_frequency, dev); 	syscall__retval = counter_get_frequency(dev); 	sys_port_trace_syscall_exit(K_SYSCALL_COUNTER_GET_FREQUENCY, counter_get_frequency, dev, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern uint32_t z_impl_counter_us_to_ticks(const struct device * dev, uint64_t us);
+
+__pinned_func
+static inline uint32_t counter_us_to_ticks(const struct device * dev, uint64_t us)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { struct { uintptr_t lo, hi; } split; uint64_t val; } parm1 = { .val = us };
+		return (uint32_t) arch_syscall_invoke3(parm0.x, parm1.split.lo, parm1.split.hi, K_SYSCALL_COUNTER_US_TO_TICKS);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_counter_us_to_ticks(dev, us);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define counter_us_to_ticks(dev, us) ({ 	uint32_t syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_COUNTER_US_TO_TICKS, counter_us_to_ticks, dev, us); 	syscall__retval = counter_us_to_ticks(dev, us); 	sys_port_trace_syscall_exit(K_SYSCALL_COUNTER_US_TO_TICKS, counter_us_to_ticks, dev, us, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern uint64_t z_impl_counter_ticks_to_us(const struct device * dev, uint32_t ticks);
+
+__pinned_func
+static inline uint64_t counter_ticks_to_us(const struct device * dev, uint32_t ticks)
+{
+#ifdef CONFIG_USERSPACE
+	uint64_t ret64;
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uint32_t val; } parm1 = { .val = ticks };
+		(void) arch_syscall_invoke3(parm0.x, parm1.x, (uintptr_t)&ret64, K_SYSCALL_COUNTER_TICKS_TO_US);
+		return (uint64_t) ret64;
+	}
+#endif
+	compiler_barrier();
+	return z_impl_counter_ticks_to_us(dev, ticks);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define counter_ticks_to_us(dev, ticks) ({ 	uint64_t syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_COUNTER_TICKS_TO_US, counter_ticks_to_us, dev, ticks); 	syscall__retval = counter_ticks_to_us(dev, ticks); 	sys_port_trace_syscall_exit(K_SYSCALL_COUNTER_TICKS_TO_US, counter_ticks_to_us, dev, ticks, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern uint32_t z_impl_counter_get_max_top_value(const struct device * dev);
+
+__pinned_func
+static inline uint32_t counter_get_max_top_value(const struct device * dev)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		return (uint32_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_COUNTER_GET_MAX_TOP_VALUE);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_counter_get_max_top_value(dev);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define counter_get_max_top_value(dev) ({ 	uint32_t syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_COUNTER_GET_MAX_TOP_VALUE, counter_get_max_top_value, dev); 	syscall__retval = counter_get_max_top_value(dev); 	sys_port_trace_syscall_exit(K_SYSCALL_COUNTER_GET_MAX_TOP_VALUE, counter_get_max_top_value, dev, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_counter_start(const struct device * dev);
+
+__pinned_func
+static inline int counter_start(const struct device * dev)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_COUNTER_START);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_counter_start(dev);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define counter_start(dev) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_COUNTER_START, counter_start, dev); 	syscall__retval = counter_start(dev); 	sys_port_trace_syscall_exit(K_SYSCALL_COUNTER_START, counter_start, dev, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_counter_stop(const struct device * dev);
+
+__pinned_func
+static inline int counter_stop(const struct device * dev)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_COUNTER_STOP);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_counter_stop(dev);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define counter_stop(dev) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_COUNTER_STOP, counter_stop, dev); 	syscall__retval = counter_stop(dev); 	sys_port_trace_syscall_exit(K_SYSCALL_COUNTER_STOP, counter_stop, dev, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_counter_get_value(const struct device * dev, uint32_t * ticks);
+
+__pinned_func
+static inline int counter_get_value(const struct device * dev, uint32_t * ticks)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uint32_t * val; } parm1 = { .val = ticks };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_COUNTER_GET_VALUE);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_counter_get_value(dev, ticks);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define counter_get_value(dev, ticks) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_COUNTER_GET_VALUE, counter_get_value, dev, ticks); 	syscall__retval = counter_get_value(dev, ticks); 	sys_port_trace_syscall_exit(K_SYSCALL_COUNTER_GET_VALUE, counter_get_value, dev, ticks, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_counter_get_value_64(const struct device * dev, uint64_t * ticks);
+
+__pinned_func
+static inline int counter_get_value_64(const struct device * dev, uint64_t * ticks)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uint64_t * val; } parm1 = { .val = ticks };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_COUNTER_GET_VALUE_64);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_counter_get_value_64(dev, ticks);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define counter_get_value_64(dev, ticks) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_COUNTER_GET_VALUE_64, counter_get_value_64, dev, ticks); 	syscall__retval = counter_get_value_64(dev, ticks); 	sys_port_trace_syscall_exit(K_SYSCALL_COUNTER_GET_VALUE_64, counter_get_value_64, dev, ticks, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_counter_set_channel_alarm(const struct device * dev, uint8_t chan_id, const struct counter_alarm_cfg * alarm_cfg);
+
+__pinned_func
+static inline int counter_set_channel_alarm(const struct device * dev, uint8_t chan_id, const struct counter_alarm_cfg * alarm_cfg)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uint8_t val; } parm1 = { .val = chan_id };
+		union { uintptr_t x; const struct counter_alarm_cfg * val; } parm2 = { .val = alarm_cfg };
+		return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_COUNTER_SET_CHANNEL_ALARM);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_counter_set_channel_alarm(dev, chan_id, alarm_cfg);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define counter_set_channel_alarm(dev, chan_id, alarm_cfg) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_COUNTER_SET_CHANNEL_ALARM, counter_set_channel_alarm, dev, chan_id, alarm_cfg); 	syscall__retval = counter_set_channel_alarm(dev, chan_id, alarm_cfg); 	sys_port_trace_syscall_exit(K_SYSCALL_COUNTER_SET_CHANNEL_ALARM, counter_set_channel_alarm, dev, chan_id, alarm_cfg, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_counter_cancel_channel_alarm(const struct device * dev, uint8_t chan_id);
+
+__pinned_func
+static inline int counter_cancel_channel_alarm(const struct device * dev, uint8_t chan_id)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uint8_t val; } parm1 = { .val = chan_id };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_COUNTER_CANCEL_CHANNEL_ALARM);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_counter_cancel_channel_alarm(dev, chan_id);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define counter_cancel_channel_alarm(dev, chan_id) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_COUNTER_CANCEL_CHANNEL_ALARM, counter_cancel_channel_alarm, dev, chan_id); 	syscall__retval = counter_cancel_channel_alarm(dev, chan_id); 	sys_port_trace_syscall_exit(K_SYSCALL_COUNTER_CANCEL_CHANNEL_ALARM, counter_cancel_channel_alarm, dev, chan_id, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_counter_set_top_value(const struct device * dev, const struct counter_top_cfg * cfg);
+
+__pinned_func
+static inline int counter_set_top_value(const struct device * dev, const struct counter_top_cfg * cfg)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; const struct counter_top_cfg * val; } parm1 = { .val = cfg };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_COUNTER_SET_TOP_VALUE);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_counter_set_top_value(dev, cfg);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define counter_set_top_value(dev, cfg) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_COUNTER_SET_TOP_VALUE, counter_set_top_value, dev, cfg); 	syscall__retval = counter_set_top_value(dev, cfg); 	sys_port_trace_syscall_exit(K_SYSCALL_COUNTER_SET_TOP_VALUE, counter_set_top_value, dev, cfg, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_counter_get_pending_int(const struct device * dev);
+
+__pinned_func
+static inline int counter_get_pending_int(const struct device * dev)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_COUNTER_GET_PENDING_INT);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_counter_get_pending_int(dev);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define counter_get_pending_int(dev) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_COUNTER_GET_PENDING_INT, counter_get_pending_int, dev); 	syscall__retval = counter_get_pending_int(dev); 	sys_port_trace_syscall_exit(K_SYSCALL_COUNTER_GET_PENDING_INT, counter_get_pending_int, dev, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern uint32_t z_impl_counter_get_top_value(const struct device * dev);
+
+__pinned_func
+static inline uint32_t counter_get_top_value(const struct device * dev)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		return (uint32_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_COUNTER_GET_TOP_VALUE);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_counter_get_top_value(dev);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define counter_get_top_value(dev) ({ 	uint32_t syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_COUNTER_GET_TOP_VALUE, counter_get_top_value, dev); 	syscall__retval = counter_get_top_value(dev); 	sys_port_trace_syscall_exit(K_SYSCALL_COUNTER_GET_TOP_VALUE, counter_get_top_value, dev, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_counter_set_guard_period(const struct device * dev, uint32_t ticks, uint32_t flags);
+
+__pinned_func
+static inline int counter_set_guard_period(const struct device * dev, uint32_t ticks, uint32_t flags)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uint32_t val; } parm1 = { .val = ticks };
+		union { uintptr_t x; uint32_t val; } parm2 = { .val = flags };
+		return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_COUNTER_SET_GUARD_PERIOD);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_counter_set_guard_period(dev, ticks, flags);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define counter_set_guard_period(dev, ticks, flags) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_COUNTER_SET_GUARD_PERIOD, counter_set_guard_period, dev, ticks, flags); 	syscall__retval = counter_set_guard_period(dev, ticks, flags); 	sys_port_trace_syscall_exit(K_SYSCALL_COUNTER_SET_GUARD_PERIOD, counter_set_guard_period, dev, ticks, flags, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern uint32_t z_impl_counter_get_guard_period(const struct device * dev, uint32_t flags);
+
+__pinned_func
+static inline uint32_t counter_get_guard_period(const struct device * dev, uint32_t flags)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uint32_t val; } parm1 = { .val = flags };
+		return (uint32_t) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_COUNTER_GET_GUARD_PERIOD);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_counter_get_guard_period(dev, flags);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define counter_get_guard_period(dev, flags) ({ 	uint32_t syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_COUNTER_GET_GUARD_PERIOD, counter_get_guard_period, dev, flags); 	syscall__retval = counter_get_guard_period(dev, flags); 	sys_port_trace_syscall_exit(K_SYSCALL_COUNTER_GET_GUARD_PERIOD, counter_get_guard_period, dev, flags, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif /* include guard */
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/dac.h b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/dac.h
new file mode 100644
index 0000000..9a23aae
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/dac.h
@@ -0,0 +1,77 @@
+/* auto-generated by gen_syscalls.py, don't edit */
+
+#ifndef Z_INCLUDE_SYSCALLS_DAC_H
+#define Z_INCLUDE_SYSCALLS_DAC_H
+
+
+#include <zephyr/tracing/tracing_syscall.h>
+
+#ifndef _ASMLANGUAGE
+
+#include <stdarg.h>
+
+#include <syscall_list.h>
+#include <zephyr/syscall.h>
+
+#include <zephyr/linker/sections.h>
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern int z_impl_dac_channel_setup(const struct device * dev, const struct dac_channel_cfg * channel_cfg);
+
+__pinned_func
+static inline int dac_channel_setup(const struct device * dev, const struct dac_channel_cfg * channel_cfg)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; const struct dac_channel_cfg * val; } parm1 = { .val = channel_cfg };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_DAC_CHANNEL_SETUP);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_dac_channel_setup(dev, channel_cfg);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define dac_channel_setup(dev, channel_cfg) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_DAC_CHANNEL_SETUP, dac_channel_setup, dev, channel_cfg); 	syscall__retval = dac_channel_setup(dev, channel_cfg); 	sys_port_trace_syscall_exit(K_SYSCALL_DAC_CHANNEL_SETUP, dac_channel_setup, dev, channel_cfg, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_dac_write_value(const struct device * dev, uint8_t channel, uint32_t value);
+
+__pinned_func
+static inline int dac_write_value(const struct device * dev, uint8_t channel, uint32_t value)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uint8_t val; } parm1 = { .val = channel };
+		union { uintptr_t x; uint32_t val; } parm2 = { .val = value };
+		return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_DAC_WRITE_VALUE);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_dac_write_value(dev, channel, value);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define dac_write_value(dev, channel, value) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_DAC_WRITE_VALUE, dac_write_value, dev, channel, value); 	syscall__retval = dac_write_value(dev, channel, value); 	sys_port_trace_syscall_exit(K_SYSCALL_DAC_WRITE_VALUE, dac_write_value, dev, channel, value, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif /* include guard */
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/demand_paging.h b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/demand_paging.h
new file mode 100644
index 0000000..15eb89c
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/demand_paging.h
@@ -0,0 +1,149 @@
+/* auto-generated by gen_syscalls.py, don't edit */
+
+#ifndef Z_INCLUDE_SYSCALLS_DEMAND_PAGING_H
+#define Z_INCLUDE_SYSCALLS_DEMAND_PAGING_H
+
+
+#include <zephyr/tracing/tracing_syscall.h>
+
+#ifndef _ASMLANGUAGE
+
+#include <stdarg.h>
+
+#include <syscall_list.h>
+#include <zephyr/syscall.h>
+
+#include <zephyr/linker/sections.h>
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern void z_impl_k_mem_paging_stats_get(struct k_mem_paging_stats_t * stats);
+
+__pinned_func
+static inline void k_mem_paging_stats_get(struct k_mem_paging_stats_t * stats)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; struct k_mem_paging_stats_t * val; } parm0 = { .val = stats };
+		(void) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_MEM_PAGING_STATS_GET);
+		return;
+	}
+#endif
+	compiler_barrier();
+	z_impl_k_mem_paging_stats_get(stats);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define k_mem_paging_stats_get(stats) do { 	sys_port_trace_syscall_enter(K_SYSCALL_K_MEM_PAGING_STATS_GET, k_mem_paging_stats_get, stats); 	k_mem_paging_stats_get(stats); 	sys_port_trace_syscall_exit(K_SYSCALL_K_MEM_PAGING_STATS_GET, k_mem_paging_stats_get, stats); } while(false)
+#endif
+#endif
+
+
+extern void z_impl_k_mem_paging_thread_stats_get(struct k_thread * thread, struct k_mem_paging_stats_t * stats);
+
+__pinned_func
+static inline void k_mem_paging_thread_stats_get(struct k_thread * thread, struct k_mem_paging_stats_t * stats)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; struct k_thread * val; } parm0 = { .val = thread };
+		union { uintptr_t x; struct k_mem_paging_stats_t * val; } parm1 = { .val = stats };
+		(void) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_K_MEM_PAGING_THREAD_STATS_GET);
+		return;
+	}
+#endif
+	compiler_barrier();
+	z_impl_k_mem_paging_thread_stats_get(thread, stats);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define k_mem_paging_thread_stats_get(thread, stats) do { 	sys_port_trace_syscall_enter(K_SYSCALL_K_MEM_PAGING_THREAD_STATS_GET, k_mem_paging_thread_stats_get, thread, stats); 	k_mem_paging_thread_stats_get(thread, stats); 	sys_port_trace_syscall_exit(K_SYSCALL_K_MEM_PAGING_THREAD_STATS_GET, k_mem_paging_thread_stats_get, thread, stats); } while(false)
+#endif
+#endif
+
+
+extern void z_impl_k_mem_paging_histogram_eviction_get(struct k_mem_paging_histogram_t * hist);
+
+__pinned_func
+static inline void k_mem_paging_histogram_eviction_get(struct k_mem_paging_histogram_t * hist)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; struct k_mem_paging_histogram_t * val; } parm0 = { .val = hist };
+		(void) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_MEM_PAGING_HISTOGRAM_EVICTION_GET);
+		return;
+	}
+#endif
+	compiler_barrier();
+	z_impl_k_mem_paging_histogram_eviction_get(hist);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define k_mem_paging_histogram_eviction_get(hist) do { 	sys_port_trace_syscall_enter(K_SYSCALL_K_MEM_PAGING_HISTOGRAM_EVICTION_GET, k_mem_paging_histogram_eviction_get, hist); 	k_mem_paging_histogram_eviction_get(hist); 	sys_port_trace_syscall_exit(K_SYSCALL_K_MEM_PAGING_HISTOGRAM_EVICTION_GET, k_mem_paging_histogram_eviction_get, hist); } while(false)
+#endif
+#endif
+
+
+extern void z_impl_k_mem_paging_histogram_backing_store_page_in_get(struct k_mem_paging_histogram_t * hist);
+
+__pinned_func
+static inline void k_mem_paging_histogram_backing_store_page_in_get(struct k_mem_paging_histogram_t * hist)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; struct k_mem_paging_histogram_t * val; } parm0 = { .val = hist };
+		(void) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_MEM_PAGING_HISTOGRAM_BACKING_STORE_PAGE_IN_GET);
+		return;
+	}
+#endif
+	compiler_barrier();
+	z_impl_k_mem_paging_histogram_backing_store_page_in_get(hist);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define k_mem_paging_histogram_backing_store_page_in_get(hist) do { 	sys_port_trace_syscall_enter(K_SYSCALL_K_MEM_PAGING_HISTOGRAM_BACKING_STORE_PAGE_IN_GET, k_mem_paging_histogram_backing_store_page_in_get, hist); 	k_mem_paging_histogram_backing_store_page_in_get(hist); 	sys_port_trace_syscall_exit(K_SYSCALL_K_MEM_PAGING_HISTOGRAM_BACKING_STORE_PAGE_IN_GET, k_mem_paging_histogram_backing_store_page_in_get, hist); } while(false)
+#endif
+#endif
+
+
+extern void z_impl_k_mem_paging_histogram_backing_store_page_out_get(struct k_mem_paging_histogram_t * hist);
+
+__pinned_func
+static inline void k_mem_paging_histogram_backing_store_page_out_get(struct k_mem_paging_histogram_t * hist)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; struct k_mem_paging_histogram_t * val; } parm0 = { .val = hist };
+		(void) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_MEM_PAGING_HISTOGRAM_BACKING_STORE_PAGE_OUT_GET);
+		return;
+	}
+#endif
+	compiler_barrier();
+	z_impl_k_mem_paging_histogram_backing_store_page_out_get(hist);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define k_mem_paging_histogram_backing_store_page_out_get(hist) do { 	sys_port_trace_syscall_enter(K_SYSCALL_K_MEM_PAGING_HISTOGRAM_BACKING_STORE_PAGE_OUT_GET, k_mem_paging_histogram_backing_store_page_out_get, hist); 	k_mem_paging_histogram_backing_store_page_out_get(hist); 	sys_port_trace_syscall_exit(K_SYSCALL_K_MEM_PAGING_HISTOGRAM_BACKING_STORE_PAGE_OUT_GET, k_mem_paging_histogram_backing_store_page_out_get, hist); } while(false)
+#endif
+#endif
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif /* include guard */
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/device.h b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/device.h
new file mode 100644
index 0000000..9912bd3
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/device.h
@@ -0,0 +1,97 @@
+/* auto-generated by gen_syscalls.py, don't edit */
+
+#ifndef Z_INCLUDE_SYSCALLS_DEVICE_H
+#define Z_INCLUDE_SYSCALLS_DEVICE_H
+
+
+#include <zephyr/tracing/tracing_syscall.h>
+
+#ifndef _ASMLANGUAGE
+
+#include <stdarg.h>
+
+#include <syscall_list.h>
+#include <zephyr/syscall.h>
+
+#include <zephyr/linker/sections.h>
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern const struct device * z_impl_device_get_binding(const char * name);
+
+__pinned_func
+static inline const struct device * device_get_binding(const char * name)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const char * val; } parm0 = { .val = name };
+		return (const struct device *) arch_syscall_invoke1(parm0.x, K_SYSCALL_DEVICE_GET_BINDING);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_device_get_binding(name);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define device_get_binding(name) ({ 	const struct device * syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_DEVICE_GET_BINDING, device_get_binding, name); 	syscall__retval = device_get_binding(name); 	sys_port_trace_syscall_exit(K_SYSCALL_DEVICE_GET_BINDING, device_get_binding, name, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern bool z_impl_device_is_ready(const struct device * dev);
+
+__pinned_func
+static inline bool device_is_ready(const struct device * dev)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		return (bool) arch_syscall_invoke1(parm0.x, K_SYSCALL_DEVICE_IS_READY);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_device_is_ready(dev);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define device_is_ready(dev) ({ 	bool syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_DEVICE_IS_READY, device_is_ready, dev); 	syscall__retval = device_is_ready(dev); 	sys_port_trace_syscall_exit(K_SYSCALL_DEVICE_IS_READY, device_is_ready, dev, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_device_init(const struct device * dev);
+
+__pinned_func
+static inline int device_init(const struct device * dev)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_DEVICE_INIT);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_device_init(dev);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define device_init(dev) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_DEVICE_INIT, device_init, dev); 	syscall__retval = device_init(dev); 	sys_port_trace_syscall_exit(K_SYSCALL_DEVICE_INIT, device_init, dev, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif /* include guard */
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/devmux.h b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/devmux.h
new file mode 100644
index 0000000..0b14ab2
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/devmux.h
@@ -0,0 +1,75 @@
+/* auto-generated by gen_syscalls.py, don't edit */
+
+#ifndef Z_INCLUDE_SYSCALLS_DEVMUX_H
+#define Z_INCLUDE_SYSCALLS_DEVMUX_H
+
+
+#include <zephyr/tracing/tracing_syscall.h>
+
+#ifndef _ASMLANGUAGE
+
+#include <stdarg.h>
+
+#include <syscall_list.h>
+#include <zephyr/syscall.h>
+
+#include <zephyr/linker/sections.h>
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern ssize_t z_impl_devmux_select_get(const struct device * dev);
+
+__pinned_func
+static inline ssize_t devmux_select_get(const struct device * dev)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		return (ssize_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_DEVMUX_SELECT_GET);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_devmux_select_get(dev);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define devmux_select_get(dev) ({ 	ssize_t syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_DEVMUX_SELECT_GET, devmux_select_get, dev); 	syscall__retval = devmux_select_get(dev); 	sys_port_trace_syscall_exit(K_SYSCALL_DEVMUX_SELECT_GET, devmux_select_get, dev, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_devmux_select_set(struct device * dev, size_t index);
+
+__pinned_func
+static inline int devmux_select_set(struct device * dev, size_t index)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; size_t val; } parm1 = { .val = index };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_DEVMUX_SELECT_SET);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_devmux_select_set(dev, index);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define devmux_select_set(dev, index) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_DEVMUX_SELECT_SET, devmux_select_set, dev, index); 	syscall__retval = devmux_select_set(dev, index); 	sys_port_trace_syscall_exit(K_SYSCALL_DEVMUX_SELECT_SET, devmux_select_set, dev, index, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif /* include guard */
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/dma.h b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/dma.h
new file mode 100644
index 0000000..7bb093f
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/dma.h
@@ -0,0 +1,198 @@
+/* auto-generated by gen_syscalls.py, don't edit */
+
+#ifndef Z_INCLUDE_SYSCALLS_DMA_H
+#define Z_INCLUDE_SYSCALLS_DMA_H
+
+
+#include <zephyr/tracing/tracing_syscall.h>
+
+#ifndef _ASMLANGUAGE
+
+#include <stdarg.h>
+
+#include <syscall_list.h>
+#include <zephyr/syscall.h>
+
+#include <zephyr/linker/sections.h>
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern int z_impl_dma_start(const struct device * dev, uint32_t channel);
+
+__pinned_func
+static inline int dma_start(const struct device * dev, uint32_t channel)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uint32_t val; } parm1 = { .val = channel };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_DMA_START);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_dma_start(dev, channel);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define dma_start(dev, channel) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_DMA_START, dma_start, dev, channel); 	syscall__retval = dma_start(dev, channel); 	sys_port_trace_syscall_exit(K_SYSCALL_DMA_START, dma_start, dev, channel, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_dma_stop(const struct device * dev, uint32_t channel);
+
+__pinned_func
+static inline int dma_stop(const struct device * dev, uint32_t channel)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uint32_t val; } parm1 = { .val = channel };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_DMA_STOP);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_dma_stop(dev, channel);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define dma_stop(dev, channel) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_DMA_STOP, dma_stop, dev, channel); 	syscall__retval = dma_stop(dev, channel); 	sys_port_trace_syscall_exit(K_SYSCALL_DMA_STOP, dma_stop, dev, channel, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_dma_suspend(const struct device * dev, uint32_t channel);
+
+__pinned_func
+static inline int dma_suspend(const struct device * dev, uint32_t channel)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uint32_t val; } parm1 = { .val = channel };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_DMA_SUSPEND);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_dma_suspend(dev, channel);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define dma_suspend(dev, channel) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_DMA_SUSPEND, dma_suspend, dev, channel); 	syscall__retval = dma_suspend(dev, channel); 	sys_port_trace_syscall_exit(K_SYSCALL_DMA_SUSPEND, dma_suspend, dev, channel, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_dma_resume(const struct device * dev, uint32_t channel);
+
+__pinned_func
+static inline int dma_resume(const struct device * dev, uint32_t channel)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uint32_t val; } parm1 = { .val = channel };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_DMA_RESUME);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_dma_resume(dev, channel);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define dma_resume(dev, channel) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_DMA_RESUME, dma_resume, dev, channel); 	syscall__retval = dma_resume(dev, channel); 	sys_port_trace_syscall_exit(K_SYSCALL_DMA_RESUME, dma_resume, dev, channel, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_dma_request_channel(const struct device * dev, void * filter_param);
+
+__pinned_func
+static inline int dma_request_channel(const struct device * dev, void * filter_param)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; void * val; } parm1 = { .val = filter_param };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_DMA_REQUEST_CHANNEL);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_dma_request_channel(dev, filter_param);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define dma_request_channel(dev, filter_param) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_DMA_REQUEST_CHANNEL, dma_request_channel, dev, filter_param); 	syscall__retval = dma_request_channel(dev, filter_param); 	sys_port_trace_syscall_exit(K_SYSCALL_DMA_REQUEST_CHANNEL, dma_request_channel, dev, filter_param, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern void z_impl_dma_release_channel(const struct device * dev, uint32_t channel);
+
+__pinned_func
+static inline void dma_release_channel(const struct device * dev, uint32_t channel)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uint32_t val; } parm1 = { .val = channel };
+		(void) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_DMA_RELEASE_CHANNEL);
+		return;
+	}
+#endif
+	compiler_barrier();
+	z_impl_dma_release_channel(dev, channel);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define dma_release_channel(dev, channel) do { 	sys_port_trace_syscall_enter(K_SYSCALL_DMA_RELEASE_CHANNEL, dma_release_channel, dev, channel); 	dma_release_channel(dev, channel); 	sys_port_trace_syscall_exit(K_SYSCALL_DMA_RELEASE_CHANNEL, dma_release_channel, dev, channel); } while(false)
+#endif
+#endif
+
+
+extern int z_impl_dma_chan_filter(const struct device * dev, int channel, void * filter_param);
+
+__pinned_func
+static inline int dma_chan_filter(const struct device * dev, int channel, void * filter_param)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; int val; } parm1 = { .val = channel };
+		union { uintptr_t x; void * val; } parm2 = { .val = filter_param };
+		return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_DMA_CHAN_FILTER);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_dma_chan_filter(dev, channel, filter_param);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define dma_chan_filter(dev, channel, filter_param) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_DMA_CHAN_FILTER, dma_chan_filter, dev, channel, filter_param); 	syscall__retval = dma_chan_filter(dev, channel, filter_param); 	sys_port_trace_syscall_exit(K_SYSCALL_DMA_CHAN_FILTER, dma_chan_filter, dev, channel, filter_param, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif /* include guard */
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/eeprom.h b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/eeprom.h
new file mode 100644
index 0000000..70ea3e0
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/eeprom.h
@@ -0,0 +1,103 @@
+/* auto-generated by gen_syscalls.py, don't edit */
+
+#ifndef Z_INCLUDE_SYSCALLS_EEPROM_H
+#define Z_INCLUDE_SYSCALLS_EEPROM_H
+
+
+#include <zephyr/tracing/tracing_syscall.h>
+
+#ifndef _ASMLANGUAGE
+
+#include <stdarg.h>
+
+#include <syscall_list.h>
+#include <zephyr/syscall.h>
+
+#include <zephyr/linker/sections.h>
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern int z_impl_eeprom_read(const struct device * dev, off_t offset, void * data, size_t len);
+
+__pinned_func
+static inline int eeprom_read(const struct device * dev, off_t offset, void * data, size_t len)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; off_t val; } parm1 = { .val = offset };
+		union { uintptr_t x; void * val; } parm2 = { .val = data };
+		union { uintptr_t x; size_t val; } parm3 = { .val = len };
+		return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_EEPROM_READ);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_eeprom_read(dev, offset, data, len);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define eeprom_read(dev, offset, data, len) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_EEPROM_READ, eeprom_read, dev, offset, data, len); 	syscall__retval = eeprom_read(dev, offset, data, len); 	sys_port_trace_syscall_exit(K_SYSCALL_EEPROM_READ, eeprom_read, dev, offset, data, len, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_eeprom_write(const struct device * dev, off_t offset, const void * data, size_t len);
+
+__pinned_func
+static inline int eeprom_write(const struct device * dev, off_t offset, const void * data, size_t len)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; off_t val; } parm1 = { .val = offset };
+		union { uintptr_t x; const void * val; } parm2 = { .val = data };
+		union { uintptr_t x; size_t val; } parm3 = { .val = len };
+		return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_EEPROM_WRITE);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_eeprom_write(dev, offset, data, len);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define eeprom_write(dev, offset, data, len) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_EEPROM_WRITE, eeprom_write, dev, offset, data, len); 	syscall__retval = eeprom_write(dev, offset, data, len); 	sys_port_trace_syscall_exit(K_SYSCALL_EEPROM_WRITE, eeprom_write, dev, offset, data, len, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern size_t z_impl_eeprom_get_size(const struct device * dev);
+
+__pinned_func
+static inline size_t eeprom_get_size(const struct device * dev)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		return (size_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_EEPROM_GET_SIZE);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_eeprom_get_size(dev);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define eeprom_get_size(dev) ({ 	size_t syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_EEPROM_GET_SIZE, eeprom_get_size, dev); 	syscall__retval = eeprom_get_size(dev); 	sys_port_trace_syscall_exit(K_SYSCALL_EEPROM_GET_SIZE, eeprom_get_size, dev, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif /* include guard */
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/emul_fuel_gauge.h b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/emul_fuel_gauge.h
new file mode 100644
index 0000000..54b754c
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/emul_fuel_gauge.h
@@ -0,0 +1,77 @@
+/* auto-generated by gen_syscalls.py, don't edit */
+
+#ifndef Z_INCLUDE_SYSCALLS_EMUL_FUEL_GAUGE_H
+#define Z_INCLUDE_SYSCALLS_EMUL_FUEL_GAUGE_H
+
+
+#include <zephyr/tracing/tracing_syscall.h>
+
+#ifndef _ASMLANGUAGE
+
+#include <stdarg.h>
+
+#include <syscall_list.h>
+#include <zephyr/syscall.h>
+
+#include <zephyr/linker/sections.h>
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern int z_impl_emul_fuel_gauge_set_battery_charging(const struct emul * target, uint32_t uV, int uA);
+
+__pinned_func
+static inline int emul_fuel_gauge_set_battery_charging(const struct emul * target, uint32_t uV, int uA)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct emul * val; } parm0 = { .val = target };
+		union { uintptr_t x; uint32_t val; } parm1 = { .val = uV };
+		union { uintptr_t x; int val; } parm2 = { .val = uA };
+		return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_EMUL_FUEL_GAUGE_SET_BATTERY_CHARGING);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_emul_fuel_gauge_set_battery_charging(target, uV, uA);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define emul_fuel_gauge_set_battery_charging(target, uV, uA) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_EMUL_FUEL_GAUGE_SET_BATTERY_CHARGING, emul_fuel_gauge_set_battery_charging, target, uV, uA); 	syscall__retval = emul_fuel_gauge_set_battery_charging(target, uV, uA); 	sys_port_trace_syscall_exit(K_SYSCALL_EMUL_FUEL_GAUGE_SET_BATTERY_CHARGING, emul_fuel_gauge_set_battery_charging, target, uV, uA, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_emul_fuel_gauge_is_battery_cutoff(const struct emul * target, bool * cutoff);
+
+__pinned_func
+static inline int emul_fuel_gauge_is_battery_cutoff(const struct emul * target, bool * cutoff)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct emul * val; } parm0 = { .val = target };
+		union { uintptr_t x; bool * val; } parm1 = { .val = cutoff };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_EMUL_FUEL_GAUGE_IS_BATTERY_CUTOFF);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_emul_fuel_gauge_is_battery_cutoff(target, cutoff);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define emul_fuel_gauge_is_battery_cutoff(target, cutoff) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_EMUL_FUEL_GAUGE_IS_BATTERY_CUTOFF, emul_fuel_gauge_is_battery_cutoff, target, cutoff); 	syscall__retval = emul_fuel_gauge_is_battery_cutoff(target, cutoff); 	sys_port_trace_syscall_exit(K_SYSCALL_EMUL_FUEL_GAUGE_IS_BATTERY_CUTOFF, emul_fuel_gauge_is_battery_cutoff, target, cutoff, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif /* include guard */
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/entropy.h b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/entropy.h
new file mode 100644
index 0000000..e44cf95
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/entropy.h
@@ -0,0 +1,53 @@
+/* auto-generated by gen_syscalls.py, don't edit */
+
+#ifndef Z_INCLUDE_SYSCALLS_ENTROPY_H
+#define Z_INCLUDE_SYSCALLS_ENTROPY_H
+
+
+#include <zephyr/tracing/tracing_syscall.h>
+
+#ifndef _ASMLANGUAGE
+
+#include <stdarg.h>
+
+#include <syscall_list.h>
+#include <zephyr/syscall.h>
+
+#include <zephyr/linker/sections.h>
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern int z_impl_entropy_get_entropy(const struct device * dev, uint8_t * buffer, uint16_t length);
+
+__pinned_func
+static inline int entropy_get_entropy(const struct device * dev, uint8_t * buffer, uint16_t length)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uint8_t * val; } parm1 = { .val = buffer };
+		union { uintptr_t x; uint16_t val; } parm2 = { .val = length };
+		return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_ENTROPY_GET_ENTROPY);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_entropy_get_entropy(dev, buffer, length);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define entropy_get_entropy(dev, buffer, length) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_ENTROPY_GET_ENTROPY, entropy_get_entropy, dev, buffer, length); 	syscall__retval = entropy_get_entropy(dev, buffer, length); 	sys_port_trace_syscall_exit(K_SYSCALL_ENTROPY_GET_ENTROPY, entropy_get_entropy, dev, buffer, length, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif /* include guard */
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/errno_private.h b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/errno_private.h
new file mode 100644
index 0000000..28a8029
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/errno_private.h
@@ -0,0 +1,43 @@
+/* auto-generated by gen_syscalls.py, don't edit */
+
+#ifndef Z_INCLUDE_SYSCALLS_ERRNO_PRIVATE_H
+#define Z_INCLUDE_SYSCALLS_ERRNO_PRIVATE_H
+
+
+
+
+#ifndef _ASMLANGUAGE
+
+#include <stdarg.h>
+
+#include <syscall_list.h>
+#include <zephyr/syscall.h>
+
+#include <zephyr/linker/sections.h>
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern int * z_impl_z_errno(void);
+
+__pinned_func
+static inline int * z_errno(void)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		return (int *) arch_syscall_invoke0(K_SYSCALL_Z_ERRNO);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_z_errno();
+}
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif /* include guard */
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/error.h b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/error.h
new file mode 100644
index 0000000..2a1cc57
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/error.h
@@ -0,0 +1,52 @@
+/* auto-generated by gen_syscalls.py, don't edit */
+
+#ifndef Z_INCLUDE_SYSCALLS_ERROR_H
+#define Z_INCLUDE_SYSCALLS_ERROR_H
+
+
+#include <zephyr/tracing/tracing_syscall.h>
+
+#ifndef _ASMLANGUAGE
+
+#include <stdarg.h>
+
+#include <syscall_list.h>
+#include <zephyr/syscall.h>
+
+#include <zephyr/linker/sections.h>
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern void z_impl_user_fault(unsigned int reason);
+
+__pinned_func
+static inline void user_fault(unsigned int reason)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; unsigned int val; } parm0 = { .val = reason };
+		(void) arch_syscall_invoke1(parm0.x, K_SYSCALL_USER_FAULT);
+		return;
+	}
+#endif
+	compiler_barrier();
+	z_impl_user_fault(reason);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define user_fault(reason) do { 	sys_port_trace_syscall_enter(K_SYSCALL_USER_FAULT, user_fault, reason); 	user_fault(reason); 	sys_port_trace_syscall_exit(K_SYSCALL_USER_FAULT, user_fault, reason); } while(false)
+#endif
+#endif
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif /* include guard */
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/espi.h b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/espi.h
new file mode 100644
index 0000000..f1db415
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/espi.h
@@ -0,0 +1,344 @@
+/* auto-generated by gen_syscalls.py, don't edit */
+
+#ifndef Z_INCLUDE_SYSCALLS_ESPI_H
+#define Z_INCLUDE_SYSCALLS_ESPI_H
+
+
+#include <zephyr/tracing/tracing_syscall.h>
+
+#ifndef _ASMLANGUAGE
+
+#include <stdarg.h>
+
+#include <syscall_list.h>
+#include <zephyr/syscall.h>
+
+#include <zephyr/linker/sections.h>
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern int z_impl_espi_config(const struct device * dev, struct espi_cfg * cfg);
+
+__pinned_func
+static inline int espi_config(const struct device * dev, struct espi_cfg * cfg)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; struct espi_cfg * val; } parm1 = { .val = cfg };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_ESPI_CONFIG);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_espi_config(dev, cfg);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define espi_config(dev, cfg) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_ESPI_CONFIG, espi_config, dev, cfg); 	syscall__retval = espi_config(dev, cfg); 	sys_port_trace_syscall_exit(K_SYSCALL_ESPI_CONFIG, espi_config, dev, cfg, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern bool z_impl_espi_get_channel_status(const struct device * dev, enum espi_channel ch);
+
+__pinned_func
+static inline bool espi_get_channel_status(const struct device * dev, enum espi_channel ch)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; enum espi_channel val; } parm1 = { .val = ch };
+		return (bool) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_ESPI_GET_CHANNEL_STATUS);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_espi_get_channel_status(dev, ch);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define espi_get_channel_status(dev, ch) ({ 	bool syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_ESPI_GET_CHANNEL_STATUS, espi_get_channel_status, dev, ch); 	syscall__retval = espi_get_channel_status(dev, ch); 	sys_port_trace_syscall_exit(K_SYSCALL_ESPI_GET_CHANNEL_STATUS, espi_get_channel_status, dev, ch, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_espi_read_request(const struct device * dev, struct espi_request_packet * req);
+
+__pinned_func
+static inline int espi_read_request(const struct device * dev, struct espi_request_packet * req)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; struct espi_request_packet * val; } parm1 = { .val = req };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_ESPI_READ_REQUEST);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_espi_read_request(dev, req);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define espi_read_request(dev, req) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_ESPI_READ_REQUEST, espi_read_request, dev, req); 	syscall__retval = espi_read_request(dev, req); 	sys_port_trace_syscall_exit(K_SYSCALL_ESPI_READ_REQUEST, espi_read_request, dev, req, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_espi_write_request(const struct device * dev, struct espi_request_packet * req);
+
+__pinned_func
+static inline int espi_write_request(const struct device * dev, struct espi_request_packet * req)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; struct espi_request_packet * val; } parm1 = { .val = req };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_ESPI_WRITE_REQUEST);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_espi_write_request(dev, req);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define espi_write_request(dev, req) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_ESPI_WRITE_REQUEST, espi_write_request, dev, req); 	syscall__retval = espi_write_request(dev, req); 	sys_port_trace_syscall_exit(K_SYSCALL_ESPI_WRITE_REQUEST, espi_write_request, dev, req, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_espi_read_lpc_request(const struct device * dev, enum lpc_peripheral_opcode op, uint32_t * data);
+
+__pinned_func
+static inline int espi_read_lpc_request(const struct device * dev, enum lpc_peripheral_opcode op, uint32_t * data)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; enum lpc_peripheral_opcode val; } parm1 = { .val = op };
+		union { uintptr_t x; uint32_t * val; } parm2 = { .val = data };
+		return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_ESPI_READ_LPC_REQUEST);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_espi_read_lpc_request(dev, op, data);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define espi_read_lpc_request(dev, op, data) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_ESPI_READ_LPC_REQUEST, espi_read_lpc_request, dev, op, data); 	syscall__retval = espi_read_lpc_request(dev, op, data); 	sys_port_trace_syscall_exit(K_SYSCALL_ESPI_READ_LPC_REQUEST, espi_read_lpc_request, dev, op, data, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_espi_write_lpc_request(const struct device * dev, enum lpc_peripheral_opcode op, uint32_t * data);
+
+__pinned_func
+static inline int espi_write_lpc_request(const struct device * dev, enum lpc_peripheral_opcode op, uint32_t * data)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; enum lpc_peripheral_opcode val; } parm1 = { .val = op };
+		union { uintptr_t x; uint32_t * val; } parm2 = { .val = data };
+		return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_ESPI_WRITE_LPC_REQUEST);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_espi_write_lpc_request(dev, op, data);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define espi_write_lpc_request(dev, op, data) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_ESPI_WRITE_LPC_REQUEST, espi_write_lpc_request, dev, op, data); 	syscall__retval = espi_write_lpc_request(dev, op, data); 	sys_port_trace_syscall_exit(K_SYSCALL_ESPI_WRITE_LPC_REQUEST, espi_write_lpc_request, dev, op, data, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_espi_send_vwire(const struct device * dev, enum espi_vwire_signal signal, uint8_t level);
+
+__pinned_func
+static inline int espi_send_vwire(const struct device * dev, enum espi_vwire_signal signal, uint8_t level)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; enum espi_vwire_signal val; } parm1 = { .val = signal };
+		union { uintptr_t x; uint8_t val; } parm2 = { .val = level };
+		return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_ESPI_SEND_VWIRE);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_espi_send_vwire(dev, signal, level);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define espi_send_vwire(dev, signal, level) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_ESPI_SEND_VWIRE, espi_send_vwire, dev, signal, level); 	syscall__retval = espi_send_vwire(dev, signal, level); 	sys_port_trace_syscall_exit(K_SYSCALL_ESPI_SEND_VWIRE, espi_send_vwire, dev, signal, level, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_espi_receive_vwire(const struct device * dev, enum espi_vwire_signal signal, uint8_t * level);
+
+__pinned_func
+static inline int espi_receive_vwire(const struct device * dev, enum espi_vwire_signal signal, uint8_t * level)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; enum espi_vwire_signal val; } parm1 = { .val = signal };
+		union { uintptr_t x; uint8_t * val; } parm2 = { .val = level };
+		return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_ESPI_RECEIVE_VWIRE);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_espi_receive_vwire(dev, signal, level);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define espi_receive_vwire(dev, signal, level) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_ESPI_RECEIVE_VWIRE, espi_receive_vwire, dev, signal, level); 	syscall__retval = espi_receive_vwire(dev, signal, level); 	sys_port_trace_syscall_exit(K_SYSCALL_ESPI_RECEIVE_VWIRE, espi_receive_vwire, dev, signal, level, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_espi_send_oob(const struct device * dev, struct espi_oob_packet * pckt);
+
+__pinned_func
+static inline int espi_send_oob(const struct device * dev, struct espi_oob_packet * pckt)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; struct espi_oob_packet * val; } parm1 = { .val = pckt };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_ESPI_SEND_OOB);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_espi_send_oob(dev, pckt);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define espi_send_oob(dev, pckt) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_ESPI_SEND_OOB, espi_send_oob, dev, pckt); 	syscall__retval = espi_send_oob(dev, pckt); 	sys_port_trace_syscall_exit(K_SYSCALL_ESPI_SEND_OOB, espi_send_oob, dev, pckt, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_espi_receive_oob(const struct device * dev, struct espi_oob_packet * pckt);
+
+__pinned_func
+static inline int espi_receive_oob(const struct device * dev, struct espi_oob_packet * pckt)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; struct espi_oob_packet * val; } parm1 = { .val = pckt };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_ESPI_RECEIVE_OOB);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_espi_receive_oob(dev, pckt);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define espi_receive_oob(dev, pckt) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_ESPI_RECEIVE_OOB, espi_receive_oob, dev, pckt); 	syscall__retval = espi_receive_oob(dev, pckt); 	sys_port_trace_syscall_exit(K_SYSCALL_ESPI_RECEIVE_OOB, espi_receive_oob, dev, pckt, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_espi_read_flash(const struct device * dev, struct espi_flash_packet * pckt);
+
+__pinned_func
+static inline int espi_read_flash(const struct device * dev, struct espi_flash_packet * pckt)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; struct espi_flash_packet * val; } parm1 = { .val = pckt };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_ESPI_READ_FLASH);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_espi_read_flash(dev, pckt);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define espi_read_flash(dev, pckt) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_ESPI_READ_FLASH, espi_read_flash, dev, pckt); 	syscall__retval = espi_read_flash(dev, pckt); 	sys_port_trace_syscall_exit(K_SYSCALL_ESPI_READ_FLASH, espi_read_flash, dev, pckt, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_espi_write_flash(const struct device * dev, struct espi_flash_packet * pckt);
+
+__pinned_func
+static inline int espi_write_flash(const struct device * dev, struct espi_flash_packet * pckt)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; struct espi_flash_packet * val; } parm1 = { .val = pckt };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_ESPI_WRITE_FLASH);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_espi_write_flash(dev, pckt);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define espi_write_flash(dev, pckt) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_ESPI_WRITE_FLASH, espi_write_flash, dev, pckt); 	syscall__retval = espi_write_flash(dev, pckt); 	sys_port_trace_syscall_exit(K_SYSCALL_ESPI_WRITE_FLASH, espi_write_flash, dev, pckt, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_espi_flash_erase(const struct device * dev, struct espi_flash_packet * pckt);
+
+__pinned_func
+static inline int espi_flash_erase(const struct device * dev, struct espi_flash_packet * pckt)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; struct espi_flash_packet * val; } parm1 = { .val = pckt };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_ESPI_FLASH_ERASE);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_espi_flash_erase(dev, pckt);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define espi_flash_erase(dev, pckt) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_ESPI_FLASH_ERASE, espi_flash_erase, dev, pckt); 	syscall__retval = espi_flash_erase(dev, pckt); 	sys_port_trace_syscall_exit(K_SYSCALL_ESPI_FLASH_ERASE, espi_flash_erase, dev, pckt, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif /* include guard */
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/espi_saf.h b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/espi_saf.h
new file mode 100644
index 0000000..40bb004
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/espi_saf.h
@@ -0,0 +1,218 @@
+/* auto-generated by gen_syscalls.py, don't edit */
+
+#ifndef Z_INCLUDE_SYSCALLS_ESPI_SAF_H
+#define Z_INCLUDE_SYSCALLS_ESPI_SAF_H
+
+
+#include <zephyr/tracing/tracing_syscall.h>
+
+#ifndef _ASMLANGUAGE
+
+#include <stdarg.h>
+
+#include <syscall_list.h>
+#include <zephyr/syscall.h>
+
+#include <zephyr/linker/sections.h>
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern int z_impl_espi_saf_config(const struct device * dev, const struct espi_saf_cfg * cfg);
+
+__pinned_func
+static inline int espi_saf_config(const struct device * dev, const struct espi_saf_cfg * cfg)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; const struct espi_saf_cfg * val; } parm1 = { .val = cfg };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_ESPI_SAF_CONFIG);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_espi_saf_config(dev, cfg);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define espi_saf_config(dev, cfg) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_ESPI_SAF_CONFIG, espi_saf_config, dev, cfg); 	syscall__retval = espi_saf_config(dev, cfg); 	sys_port_trace_syscall_exit(K_SYSCALL_ESPI_SAF_CONFIG, espi_saf_config, dev, cfg, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_espi_saf_set_protection_regions(const struct device * dev, const struct espi_saf_protection * pr);
+
+__pinned_func
+static inline int espi_saf_set_protection_regions(const struct device * dev, const struct espi_saf_protection * pr)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; const struct espi_saf_protection * val; } parm1 = { .val = pr };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_ESPI_SAF_SET_PROTECTION_REGIONS);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_espi_saf_set_protection_regions(dev, pr);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define espi_saf_set_protection_regions(dev, pr) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_ESPI_SAF_SET_PROTECTION_REGIONS, espi_saf_set_protection_regions, dev, pr); 	syscall__retval = espi_saf_set_protection_regions(dev, pr); 	sys_port_trace_syscall_exit(K_SYSCALL_ESPI_SAF_SET_PROTECTION_REGIONS, espi_saf_set_protection_regions, dev, pr, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_espi_saf_activate(const struct device * dev);
+
+__pinned_func
+static inline int espi_saf_activate(const struct device * dev)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_ESPI_SAF_ACTIVATE);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_espi_saf_activate(dev);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define espi_saf_activate(dev) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_ESPI_SAF_ACTIVATE, espi_saf_activate, dev); 	syscall__retval = espi_saf_activate(dev); 	sys_port_trace_syscall_exit(K_SYSCALL_ESPI_SAF_ACTIVATE, espi_saf_activate, dev, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern bool z_impl_espi_saf_get_channel_status(const struct device * dev);
+
+__pinned_func
+static inline bool espi_saf_get_channel_status(const struct device * dev)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		return (bool) arch_syscall_invoke1(parm0.x, K_SYSCALL_ESPI_SAF_GET_CHANNEL_STATUS);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_espi_saf_get_channel_status(dev);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define espi_saf_get_channel_status(dev) ({ 	bool syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_ESPI_SAF_GET_CHANNEL_STATUS, espi_saf_get_channel_status, dev); 	syscall__retval = espi_saf_get_channel_status(dev); 	sys_port_trace_syscall_exit(K_SYSCALL_ESPI_SAF_GET_CHANNEL_STATUS, espi_saf_get_channel_status, dev, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_espi_saf_flash_read(const struct device * dev, struct espi_saf_packet * pckt);
+
+__pinned_func
+static inline int espi_saf_flash_read(const struct device * dev, struct espi_saf_packet * pckt)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; struct espi_saf_packet * val; } parm1 = { .val = pckt };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_ESPI_SAF_FLASH_READ);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_espi_saf_flash_read(dev, pckt);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define espi_saf_flash_read(dev, pckt) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_ESPI_SAF_FLASH_READ, espi_saf_flash_read, dev, pckt); 	syscall__retval = espi_saf_flash_read(dev, pckt); 	sys_port_trace_syscall_exit(K_SYSCALL_ESPI_SAF_FLASH_READ, espi_saf_flash_read, dev, pckt, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_espi_saf_flash_write(const struct device * dev, struct espi_saf_packet * pckt);
+
+__pinned_func
+static inline int espi_saf_flash_write(const struct device * dev, struct espi_saf_packet * pckt)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; struct espi_saf_packet * val; } parm1 = { .val = pckt };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_ESPI_SAF_FLASH_WRITE);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_espi_saf_flash_write(dev, pckt);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define espi_saf_flash_write(dev, pckt) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_ESPI_SAF_FLASH_WRITE, espi_saf_flash_write, dev, pckt); 	syscall__retval = espi_saf_flash_write(dev, pckt); 	sys_port_trace_syscall_exit(K_SYSCALL_ESPI_SAF_FLASH_WRITE, espi_saf_flash_write, dev, pckt, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_espi_saf_flash_erase(const struct device * dev, struct espi_saf_packet * pckt);
+
+__pinned_func
+static inline int espi_saf_flash_erase(const struct device * dev, struct espi_saf_packet * pckt)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; struct espi_saf_packet * val; } parm1 = { .val = pckt };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_ESPI_SAF_FLASH_ERASE);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_espi_saf_flash_erase(dev, pckt);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define espi_saf_flash_erase(dev, pckt) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_ESPI_SAF_FLASH_ERASE, espi_saf_flash_erase, dev, pckt); 	syscall__retval = espi_saf_flash_erase(dev, pckt); 	sys_port_trace_syscall_exit(K_SYSCALL_ESPI_SAF_FLASH_ERASE, espi_saf_flash_erase, dev, pckt, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_espi_saf_flash_unsuccess(const struct device * dev, struct espi_saf_packet * pckt);
+
+__pinned_func
+static inline int espi_saf_flash_unsuccess(const struct device * dev, struct espi_saf_packet * pckt)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; struct espi_saf_packet * val; } parm1 = { .val = pckt };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_ESPI_SAF_FLASH_UNSUCCESS);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_espi_saf_flash_unsuccess(dev, pckt);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define espi_saf_flash_unsuccess(dev, pckt) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_ESPI_SAF_FLASH_UNSUCCESS, espi_saf_flash_unsuccess, dev, pckt); 	syscall__retval = espi_saf_flash_unsuccess(dev, pckt); 	sys_port_trace_syscall_exit(K_SYSCALL_ESPI_SAF_FLASH_UNSUCCESS, espi_saf_flash_unsuccess, dev, pckt, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif /* include guard */
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/ethernet.h b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/ethernet.h
new file mode 100644
index 0000000..33b6431
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/ethernet.h
@@ -0,0 +1,51 @@
+/* auto-generated by gen_syscalls.py, don't edit */
+
+#ifndef Z_INCLUDE_SYSCALLS_ETHERNET_H
+#define Z_INCLUDE_SYSCALLS_ETHERNET_H
+
+
+#include <zephyr/tracing/tracing_syscall.h>
+
+#ifndef _ASMLANGUAGE
+
+#include <stdarg.h>
+
+#include <syscall_list.h>
+#include <zephyr/syscall.h>
+
+#include <zephyr/linker/sections.h>
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern const struct device * z_impl_net_eth_get_ptp_clock_by_index(int index);
+
+__pinned_func
+static inline const struct device * net_eth_get_ptp_clock_by_index(int index)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; int val; } parm0 = { .val = index };
+		return (const struct device *) arch_syscall_invoke1(parm0.x, K_SYSCALL_NET_ETH_GET_PTP_CLOCK_BY_INDEX);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_net_eth_get_ptp_clock_by_index(index);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define net_eth_get_ptp_clock_by_index(index) ({ 	const struct device * syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_NET_ETH_GET_PTP_CLOCK_BY_INDEX, net_eth_get_ptp_clock_by_index, index); 	syscall__retval = net_eth_get_ptp_clock_by_index(index); 	sys_port_trace_syscall_exit(K_SYSCALL_NET_ETH_GET_PTP_CLOCK_BY_INDEX, net_eth_get_ptp_clock_by_index, index, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif /* include guard */
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/flash.h b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/flash.h
new file mode 100644
index 0000000..4536ec2
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/flash.h
@@ -0,0 +1,300 @@
+/* auto-generated by gen_syscalls.py, don't edit */
+
+#ifndef Z_INCLUDE_SYSCALLS_FLASH_H
+#define Z_INCLUDE_SYSCALLS_FLASH_H
+
+
+#include <zephyr/tracing/tracing_syscall.h>
+
+#ifndef _ASMLANGUAGE
+
+#include <stdarg.h>
+
+#include <syscall_list.h>
+#include <zephyr/syscall.h>
+
+#include <zephyr/linker/sections.h>
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern int z_impl_flash_read(const struct device * dev, off_t offset, void * data, size_t len);
+
+__pinned_func
+static inline int flash_read(const struct device * dev, off_t offset, void * data, size_t len)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; off_t val; } parm1 = { .val = offset };
+		union { uintptr_t x; void * val; } parm2 = { .val = data };
+		union { uintptr_t x; size_t val; } parm3 = { .val = len };
+		return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_FLASH_READ);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_flash_read(dev, offset, data, len);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define flash_read(dev, offset, data, len) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_FLASH_READ, flash_read, dev, offset, data, len); 	syscall__retval = flash_read(dev, offset, data, len); 	sys_port_trace_syscall_exit(K_SYSCALL_FLASH_READ, flash_read, dev, offset, data, len, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_flash_write(const struct device * dev, off_t offset, const void * data, size_t len);
+
+__pinned_func
+static inline int flash_write(const struct device * dev, off_t offset, const void * data, size_t len)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; off_t val; } parm1 = { .val = offset };
+		union { uintptr_t x; const void * val; } parm2 = { .val = data };
+		union { uintptr_t x; size_t val; } parm3 = { .val = len };
+		return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_FLASH_WRITE);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_flash_write(dev, offset, data, len);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define flash_write(dev, offset, data, len) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_FLASH_WRITE, flash_write, dev, offset, data, len); 	syscall__retval = flash_write(dev, offset, data, len); 	sys_port_trace_syscall_exit(K_SYSCALL_FLASH_WRITE, flash_write, dev, offset, data, len, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_flash_erase(const struct device * dev, off_t offset, size_t size);
+
+__pinned_func
+static inline int flash_erase(const struct device * dev, off_t offset, size_t size)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; off_t val; } parm1 = { .val = offset };
+		union { uintptr_t x; size_t val; } parm2 = { .val = size };
+		return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_FLASH_ERASE);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_flash_erase(dev, offset, size);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define flash_erase(dev, offset, size) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_FLASH_ERASE, flash_erase, dev, offset, size); 	syscall__retval = flash_erase(dev, offset, size); 	sys_port_trace_syscall_exit(K_SYSCALL_FLASH_ERASE, flash_erase, dev, offset, size, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_flash_get_page_info_by_offs(const struct device * dev, off_t offset, struct flash_pages_info * info);
+
+__pinned_func
+static inline int flash_get_page_info_by_offs(const struct device * dev, off_t offset, struct flash_pages_info * info)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; off_t val; } parm1 = { .val = offset };
+		union { uintptr_t x; struct flash_pages_info * val; } parm2 = { .val = info };
+		return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_FLASH_GET_PAGE_INFO_BY_OFFS);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_flash_get_page_info_by_offs(dev, offset, info);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define flash_get_page_info_by_offs(dev, offset, info) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_FLASH_GET_PAGE_INFO_BY_OFFS, flash_get_page_info_by_offs, dev, offset, info); 	syscall__retval = flash_get_page_info_by_offs(dev, offset, info); 	sys_port_trace_syscall_exit(K_SYSCALL_FLASH_GET_PAGE_INFO_BY_OFFS, flash_get_page_info_by_offs, dev, offset, info, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_flash_get_page_info_by_idx(const struct device * dev, uint32_t page_index, struct flash_pages_info * info);
+
+__pinned_func
+static inline int flash_get_page_info_by_idx(const struct device * dev, uint32_t page_index, struct flash_pages_info * info)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uint32_t val; } parm1 = { .val = page_index };
+		union { uintptr_t x; struct flash_pages_info * val; } parm2 = { .val = info };
+		return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_FLASH_GET_PAGE_INFO_BY_IDX);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_flash_get_page_info_by_idx(dev, page_index, info);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define flash_get_page_info_by_idx(dev, page_index, info) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_FLASH_GET_PAGE_INFO_BY_IDX, flash_get_page_info_by_idx, dev, page_index, info); 	syscall__retval = flash_get_page_info_by_idx(dev, page_index, info); 	sys_port_trace_syscall_exit(K_SYSCALL_FLASH_GET_PAGE_INFO_BY_IDX, flash_get_page_info_by_idx, dev, page_index, info, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern size_t z_impl_flash_get_page_count(const struct device * dev);
+
+__pinned_func
+static inline size_t flash_get_page_count(const struct device * dev)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		return (size_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_FLASH_GET_PAGE_COUNT);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_flash_get_page_count(dev);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define flash_get_page_count(dev) ({ 	size_t syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_FLASH_GET_PAGE_COUNT, flash_get_page_count, dev); 	syscall__retval = flash_get_page_count(dev); 	sys_port_trace_syscall_exit(K_SYSCALL_FLASH_GET_PAGE_COUNT, flash_get_page_count, dev, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_flash_sfdp_read(const struct device * dev, off_t offset, void * data, size_t len);
+
+__pinned_func
+static inline int flash_sfdp_read(const struct device * dev, off_t offset, void * data, size_t len)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; off_t val; } parm1 = { .val = offset };
+		union { uintptr_t x; void * val; } parm2 = { .val = data };
+		union { uintptr_t x; size_t val; } parm3 = { .val = len };
+		return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_FLASH_SFDP_READ);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_flash_sfdp_read(dev, offset, data, len);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define flash_sfdp_read(dev, offset, data, len) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_FLASH_SFDP_READ, flash_sfdp_read, dev, offset, data, len); 	syscall__retval = flash_sfdp_read(dev, offset, data, len); 	sys_port_trace_syscall_exit(K_SYSCALL_FLASH_SFDP_READ, flash_sfdp_read, dev, offset, data, len, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_flash_read_jedec_id(const struct device * dev, uint8_t * id);
+
+__pinned_func
+static inline int flash_read_jedec_id(const struct device * dev, uint8_t * id)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uint8_t * val; } parm1 = { .val = id };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_FLASH_READ_JEDEC_ID);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_flash_read_jedec_id(dev, id);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define flash_read_jedec_id(dev, id) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_FLASH_READ_JEDEC_ID, flash_read_jedec_id, dev, id); 	syscall__retval = flash_read_jedec_id(dev, id); 	sys_port_trace_syscall_exit(K_SYSCALL_FLASH_READ_JEDEC_ID, flash_read_jedec_id, dev, id, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern size_t z_impl_flash_get_write_block_size(const struct device * dev);
+
+__pinned_func
+static inline size_t flash_get_write_block_size(const struct device * dev)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		return (size_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_FLASH_GET_WRITE_BLOCK_SIZE);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_flash_get_write_block_size(dev);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define flash_get_write_block_size(dev) ({ 	size_t syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_FLASH_GET_WRITE_BLOCK_SIZE, flash_get_write_block_size, dev); 	syscall__retval = flash_get_write_block_size(dev); 	sys_port_trace_syscall_exit(K_SYSCALL_FLASH_GET_WRITE_BLOCK_SIZE, flash_get_write_block_size, dev, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern const struct flash_parameters * z_impl_flash_get_parameters(const struct device * dev);
+
+__pinned_func
+static inline const struct flash_parameters * flash_get_parameters(const struct device * dev)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		return (const struct flash_parameters *) arch_syscall_invoke1(parm0.x, K_SYSCALL_FLASH_GET_PARAMETERS);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_flash_get_parameters(dev);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define flash_get_parameters(dev) ({ 	const struct flash_parameters * syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_FLASH_GET_PARAMETERS, flash_get_parameters, dev); 	syscall__retval = flash_get_parameters(dev); 	sys_port_trace_syscall_exit(K_SYSCALL_FLASH_GET_PARAMETERS, flash_get_parameters, dev, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_flash_ex_op(const struct device * dev, uint16_t code, const uintptr_t in, void * out);
+
+__pinned_func
+static inline int flash_ex_op(const struct device * dev, uint16_t code, const uintptr_t in, void * out)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uint16_t val; } parm1 = { .val = code };
+		union { uintptr_t x; const uintptr_t val; } parm2 = { .val = in };
+		union { uintptr_t x; void * val; } parm3 = { .val = out };
+		return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_FLASH_EX_OP);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_flash_ex_op(dev, code, in, out);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define flash_ex_op(dev, code, in, out) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_FLASH_EX_OP, flash_ex_op, dev, code, in, out); 	syscall__retval = flash_ex_op(dev, code, in, out); 	sys_port_trace_syscall_exit(K_SYSCALL_FLASH_EX_OP, flash_ex_op, dev, code, in, out, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif /* include guard */
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/flash_simulator.h b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/flash_simulator.h
new file mode 100644
index 0000000..d1f1fa6
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/flash_simulator.h
@@ -0,0 +1,52 @@
+/* auto-generated by gen_syscalls.py, don't edit */
+
+#ifndef Z_INCLUDE_SYSCALLS_FLASH_SIMULATOR_H
+#define Z_INCLUDE_SYSCALLS_FLASH_SIMULATOR_H
+
+
+#include <zephyr/tracing/tracing_syscall.h>
+
+#ifndef _ASMLANGUAGE
+
+#include <stdarg.h>
+
+#include <syscall_list.h>
+#include <zephyr/syscall.h>
+
+#include <zephyr/linker/sections.h>
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern void * z_impl_flash_simulator_get_memory(const struct device * dev, size_t * mock_size);
+
+__pinned_func
+static inline void * flash_simulator_get_memory(const struct device * dev, size_t * mock_size)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; size_t * val; } parm1 = { .val = mock_size };
+		return (void *) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_FLASH_SIMULATOR_GET_MEMORY);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_flash_simulator_get_memory(dev, mock_size);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define flash_simulator_get_memory(dev, mock_size) ({ 	void * syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_FLASH_SIMULATOR_GET_MEMORY, flash_simulator_get_memory, dev, mock_size); 	syscall__retval = flash_simulator_get_memory(dev, mock_size); 	sys_port_trace_syscall_exit(K_SYSCALL_FLASH_SIMULATOR_GET_MEMORY, flash_simulator_get_memory, dev, mock_size, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif /* include guard */
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/fuel_gauge.h b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/fuel_gauge.h
new file mode 100644
index 0000000..d2567a5
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/fuel_gauge.h
@@ -0,0 +1,179 @@
+/* auto-generated by gen_syscalls.py, don't edit */
+
+#ifndef Z_INCLUDE_SYSCALLS_FUEL_GAUGE_H
+#define Z_INCLUDE_SYSCALLS_FUEL_GAUGE_H
+
+
+#include <zephyr/tracing/tracing_syscall.h>
+
+#ifndef _ASMLANGUAGE
+
+#include <stdarg.h>
+
+#include <syscall_list.h>
+#include <zephyr/syscall.h>
+
+#include <zephyr/linker/sections.h>
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern int z_impl_fuel_gauge_get_prop(const struct device * dev, fuel_gauge_prop_t prop, union fuel_gauge_prop_val * val);
+
+__pinned_func
+static inline int fuel_gauge_get_prop(const struct device * dev, fuel_gauge_prop_t prop, union fuel_gauge_prop_val * val)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; fuel_gauge_prop_t val; } parm1 = { .val = prop };
+		union { uintptr_t x; union fuel_gauge_prop_val * val; } parm2 = { .val = val };
+		return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_FUEL_GAUGE_GET_PROP);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_fuel_gauge_get_prop(dev, prop, val);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define fuel_gauge_get_prop(dev, prop, val) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_FUEL_GAUGE_GET_PROP, fuel_gauge_get_prop, dev, prop, val); 	syscall__retval = fuel_gauge_get_prop(dev, prop, val); 	sys_port_trace_syscall_exit(K_SYSCALL_FUEL_GAUGE_GET_PROP, fuel_gauge_get_prop, dev, prop, val, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_fuel_gauge_get_props(const struct device * dev, fuel_gauge_prop_t * props, union fuel_gauge_prop_val * vals, size_t len);
+
+__pinned_func
+static inline int fuel_gauge_get_props(const struct device * dev, fuel_gauge_prop_t * props, union fuel_gauge_prop_val * vals, size_t len)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; fuel_gauge_prop_t * val; } parm1 = { .val = props };
+		union { uintptr_t x; union fuel_gauge_prop_val * val; } parm2 = { .val = vals };
+		union { uintptr_t x; size_t val; } parm3 = { .val = len };
+		return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_FUEL_GAUGE_GET_PROPS);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_fuel_gauge_get_props(dev, props, vals, len);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define fuel_gauge_get_props(dev, props, vals, len) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_FUEL_GAUGE_GET_PROPS, fuel_gauge_get_props, dev, props, vals, len); 	syscall__retval = fuel_gauge_get_props(dev, props, vals, len); 	sys_port_trace_syscall_exit(K_SYSCALL_FUEL_GAUGE_GET_PROPS, fuel_gauge_get_props, dev, props, vals, len, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_fuel_gauge_set_prop(const struct device * dev, fuel_gauge_prop_t prop, union fuel_gauge_prop_val val);
+
+__pinned_func
+static inline int fuel_gauge_set_prop(const struct device * dev, fuel_gauge_prop_t prop, union fuel_gauge_prop_val val)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; fuel_gauge_prop_t val; } parm1 = { .val = prop };
+		union { uintptr_t x; union fuel_gauge_prop_val val; } parm2 = { .val = val };
+		return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_FUEL_GAUGE_SET_PROP);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_fuel_gauge_set_prop(dev, prop, val);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define fuel_gauge_set_prop(dev, prop, val) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_FUEL_GAUGE_SET_PROP, fuel_gauge_set_prop, dev, prop, val); 	syscall__retval = fuel_gauge_set_prop(dev, prop, val); 	sys_port_trace_syscall_exit(K_SYSCALL_FUEL_GAUGE_SET_PROP, fuel_gauge_set_prop, dev, prop, val, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_fuel_gauge_set_props(const struct device * dev, fuel_gauge_prop_t * props, union fuel_gauge_prop_val * vals, size_t len);
+
+__pinned_func
+static inline int fuel_gauge_set_props(const struct device * dev, fuel_gauge_prop_t * props, union fuel_gauge_prop_val * vals, size_t len)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; fuel_gauge_prop_t * val; } parm1 = { .val = props };
+		union { uintptr_t x; union fuel_gauge_prop_val * val; } parm2 = { .val = vals };
+		union { uintptr_t x; size_t val; } parm3 = { .val = len };
+		return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_FUEL_GAUGE_SET_PROPS);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_fuel_gauge_set_props(dev, props, vals, len);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define fuel_gauge_set_props(dev, props, vals, len) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_FUEL_GAUGE_SET_PROPS, fuel_gauge_set_props, dev, props, vals, len); 	syscall__retval = fuel_gauge_set_props(dev, props, vals, len); 	sys_port_trace_syscall_exit(K_SYSCALL_FUEL_GAUGE_SET_PROPS, fuel_gauge_set_props, dev, props, vals, len, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_fuel_gauge_get_buffer_prop(const struct device * dev, fuel_gauge_prop_t prop_type, void * dst, size_t dst_len);
+
+__pinned_func
+static inline int fuel_gauge_get_buffer_prop(const struct device * dev, fuel_gauge_prop_t prop_type, void * dst, size_t dst_len)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; fuel_gauge_prop_t val; } parm1 = { .val = prop_type };
+		union { uintptr_t x; void * val; } parm2 = { .val = dst };
+		union { uintptr_t x; size_t val; } parm3 = { .val = dst_len };
+		return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_FUEL_GAUGE_GET_BUFFER_PROP);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_fuel_gauge_get_buffer_prop(dev, prop_type, dst, dst_len);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define fuel_gauge_get_buffer_prop(dev, prop_type, dst, dst_len) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_FUEL_GAUGE_GET_BUFFER_PROP, fuel_gauge_get_buffer_prop, dev, prop_type, dst, dst_len); 	syscall__retval = fuel_gauge_get_buffer_prop(dev, prop_type, dst, dst_len); 	sys_port_trace_syscall_exit(K_SYSCALL_FUEL_GAUGE_GET_BUFFER_PROP, fuel_gauge_get_buffer_prop, dev, prop_type, dst, dst_len, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_fuel_gauge_battery_cutoff(const struct device * dev);
+
+__pinned_func
+static inline int fuel_gauge_battery_cutoff(const struct device * dev)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_FUEL_GAUGE_BATTERY_CUTOFF);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_fuel_gauge_battery_cutoff(dev);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define fuel_gauge_battery_cutoff(dev) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_FUEL_GAUGE_BATTERY_CUTOFF, fuel_gauge_battery_cutoff, dev); 	syscall__retval = fuel_gauge_battery_cutoff(dev); 	sys_port_trace_syscall_exit(K_SYSCALL_FUEL_GAUGE_BATTERY_CUTOFF, fuel_gauge_battery_cutoff, dev, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif /* include guard */
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/gnss.h b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/gnss.h
new file mode 100644
index 0000000..e7cc7e9
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/gnss.h
@@ -0,0 +1,244 @@
+/* auto-generated by gen_syscalls.py, don't edit */
+
+#ifndef Z_INCLUDE_SYSCALLS_GNSS_H
+#define Z_INCLUDE_SYSCALLS_GNSS_H
+
+
+#include <zephyr/tracing/tracing_syscall.h>
+
+#ifndef _ASMLANGUAGE
+
+#include <stdarg.h>
+
+#include <syscall_list.h>
+#include <zephyr/syscall.h>
+
+#include <zephyr/linker/sections.h>
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern int z_impl_gnss_set_fix_rate(const struct device * dev, uint32_t fix_interval_ms);
+
+__pinned_func
+static inline int gnss_set_fix_rate(const struct device * dev, uint32_t fix_interval_ms)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uint32_t val; } parm1 = { .val = fix_interval_ms };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_GNSS_SET_FIX_RATE);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_gnss_set_fix_rate(dev, fix_interval_ms);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define gnss_set_fix_rate(dev, fix_interval_ms) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_GNSS_SET_FIX_RATE, gnss_set_fix_rate, dev, fix_interval_ms); 	syscall__retval = gnss_set_fix_rate(dev, fix_interval_ms); 	sys_port_trace_syscall_exit(K_SYSCALL_GNSS_SET_FIX_RATE, gnss_set_fix_rate, dev, fix_interval_ms, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_gnss_get_fix_rate(const struct device * dev, uint32_t * fix_interval_ms);
+
+__pinned_func
+static inline int gnss_get_fix_rate(const struct device * dev, uint32_t * fix_interval_ms)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uint32_t * val; } parm1 = { .val = fix_interval_ms };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_GNSS_GET_FIX_RATE);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_gnss_get_fix_rate(dev, fix_interval_ms);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define gnss_get_fix_rate(dev, fix_interval_ms) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_GNSS_GET_FIX_RATE, gnss_get_fix_rate, dev, fix_interval_ms); 	syscall__retval = gnss_get_fix_rate(dev, fix_interval_ms); 	sys_port_trace_syscall_exit(K_SYSCALL_GNSS_GET_FIX_RATE, gnss_get_fix_rate, dev, fix_interval_ms, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_gnss_set_periodic_config(const struct device * dev, const struct gnss_periodic_config * config);
+
+__pinned_func
+static inline int gnss_set_periodic_config(const struct device * dev, const struct gnss_periodic_config * config)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; const struct gnss_periodic_config * val; } parm1 = { .val = config };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_GNSS_SET_PERIODIC_CONFIG);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_gnss_set_periodic_config(dev, config);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define gnss_set_periodic_config(dev, config) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_GNSS_SET_PERIODIC_CONFIG, gnss_set_periodic_config, dev, config); 	syscall__retval = gnss_set_periodic_config(dev, config); 	sys_port_trace_syscall_exit(K_SYSCALL_GNSS_SET_PERIODIC_CONFIG, gnss_set_periodic_config, dev, config, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_gnss_get_periodic_config(const struct device * dev, struct gnss_periodic_config * config);
+
+__pinned_func
+static inline int gnss_get_periodic_config(const struct device * dev, struct gnss_periodic_config * config)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; struct gnss_periodic_config * val; } parm1 = { .val = config };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_GNSS_GET_PERIODIC_CONFIG);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_gnss_get_periodic_config(dev, config);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define gnss_get_periodic_config(dev, config) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_GNSS_GET_PERIODIC_CONFIG, gnss_get_periodic_config, dev, config); 	syscall__retval = gnss_get_periodic_config(dev, config); 	sys_port_trace_syscall_exit(K_SYSCALL_GNSS_GET_PERIODIC_CONFIG, gnss_get_periodic_config, dev, config, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_gnss_set_navigation_mode(const struct device * dev, enum gnss_navigation_mode mode);
+
+__pinned_func
+static inline int gnss_set_navigation_mode(const struct device * dev, enum gnss_navigation_mode mode)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; enum gnss_navigation_mode val; } parm1 = { .val = mode };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_GNSS_SET_NAVIGATION_MODE);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_gnss_set_navigation_mode(dev, mode);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define gnss_set_navigation_mode(dev, mode) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_GNSS_SET_NAVIGATION_MODE, gnss_set_navigation_mode, dev, mode); 	syscall__retval = gnss_set_navigation_mode(dev, mode); 	sys_port_trace_syscall_exit(K_SYSCALL_GNSS_SET_NAVIGATION_MODE, gnss_set_navigation_mode, dev, mode, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_gnss_get_navigation_mode(const struct device * dev, enum gnss_navigation_mode * mode);
+
+__pinned_func
+static inline int gnss_get_navigation_mode(const struct device * dev, enum gnss_navigation_mode * mode)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; enum gnss_navigation_mode * val; } parm1 = { .val = mode };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_GNSS_GET_NAVIGATION_MODE);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_gnss_get_navigation_mode(dev, mode);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define gnss_get_navigation_mode(dev, mode) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_GNSS_GET_NAVIGATION_MODE, gnss_get_navigation_mode, dev, mode); 	syscall__retval = gnss_get_navigation_mode(dev, mode); 	sys_port_trace_syscall_exit(K_SYSCALL_GNSS_GET_NAVIGATION_MODE, gnss_get_navigation_mode, dev, mode, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_gnss_set_enabled_systems(const struct device * dev, gnss_systems_t systems);
+
+__pinned_func
+static inline int gnss_set_enabled_systems(const struct device * dev, gnss_systems_t systems)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; gnss_systems_t val; } parm1 = { .val = systems };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_GNSS_SET_ENABLED_SYSTEMS);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_gnss_set_enabled_systems(dev, systems);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define gnss_set_enabled_systems(dev, systems) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_GNSS_SET_ENABLED_SYSTEMS, gnss_set_enabled_systems, dev, systems); 	syscall__retval = gnss_set_enabled_systems(dev, systems); 	sys_port_trace_syscall_exit(K_SYSCALL_GNSS_SET_ENABLED_SYSTEMS, gnss_set_enabled_systems, dev, systems, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_gnss_get_enabled_systems(const struct device * dev, gnss_systems_t * systems);
+
+__pinned_func
+static inline int gnss_get_enabled_systems(const struct device * dev, gnss_systems_t * systems)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; gnss_systems_t * val; } parm1 = { .val = systems };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_GNSS_GET_ENABLED_SYSTEMS);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_gnss_get_enabled_systems(dev, systems);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define gnss_get_enabled_systems(dev, systems) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_GNSS_GET_ENABLED_SYSTEMS, gnss_get_enabled_systems, dev, systems); 	syscall__retval = gnss_get_enabled_systems(dev, systems); 	sys_port_trace_syscall_exit(K_SYSCALL_GNSS_GET_ENABLED_SYSTEMS, gnss_get_enabled_systems, dev, systems, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_gnss_get_supported_systems(const struct device * dev, gnss_systems_t * systems);
+
+__pinned_func
+static inline int gnss_get_supported_systems(const struct device * dev, gnss_systems_t * systems)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; gnss_systems_t * val; } parm1 = { .val = systems };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_GNSS_GET_SUPPORTED_SYSTEMS);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_gnss_get_supported_systems(dev, systems);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define gnss_get_supported_systems(dev, systems) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_GNSS_GET_SUPPORTED_SYSTEMS, gnss_get_supported_systems, dev, systems); 	syscall__retval = gnss_get_supported_systems(dev, systems); 	sys_port_trace_syscall_exit(K_SYSCALL_GNSS_GET_SUPPORTED_SYSTEMS, gnss_get_supported_systems, dev, systems, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif /* include guard */
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/gpio.h b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/gpio.h
new file mode 100644
index 0000000..4f0f4a4
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/gpio.h
@@ -0,0 +1,273 @@
+/* auto-generated by gen_syscalls.py, don't edit */
+
+#ifndef Z_INCLUDE_SYSCALLS_GPIO_H
+#define Z_INCLUDE_SYSCALLS_GPIO_H
+
+
+#include <zephyr/tracing/tracing_syscall.h>
+
+#ifndef _ASMLANGUAGE
+
+#include <stdarg.h>
+
+#include <syscall_list.h>
+#include <zephyr/syscall.h>
+
+#include <zephyr/linker/sections.h>
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern int z_impl_gpio_pin_interrupt_configure(const struct device * port, gpio_pin_t pin, gpio_flags_t flags);
+
+__pinned_func
+static inline int gpio_pin_interrupt_configure(const struct device * port, gpio_pin_t pin, gpio_flags_t flags)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = port };
+		union { uintptr_t x; gpio_pin_t val; } parm1 = { .val = pin };
+		union { uintptr_t x; gpio_flags_t val; } parm2 = { .val = flags };
+		return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_GPIO_PIN_INTERRUPT_CONFIGURE);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_gpio_pin_interrupt_configure(port, pin, flags);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define gpio_pin_interrupt_configure(port, pin, flags) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_GPIO_PIN_INTERRUPT_CONFIGURE, gpio_pin_interrupt_configure, port, pin, flags); 	syscall__retval = gpio_pin_interrupt_configure(port, pin, flags); 	sys_port_trace_syscall_exit(K_SYSCALL_GPIO_PIN_INTERRUPT_CONFIGURE, gpio_pin_interrupt_configure, port, pin, flags, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_gpio_pin_configure(const struct device * port, gpio_pin_t pin, gpio_flags_t flags);
+
+__pinned_func
+static inline int gpio_pin_configure(const struct device * port, gpio_pin_t pin, gpio_flags_t flags)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = port };
+		union { uintptr_t x; gpio_pin_t val; } parm1 = { .val = pin };
+		union { uintptr_t x; gpio_flags_t val; } parm2 = { .val = flags };
+		return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_GPIO_PIN_CONFIGURE);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_gpio_pin_configure(port, pin, flags);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define gpio_pin_configure(port, pin, flags) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_GPIO_PIN_CONFIGURE, gpio_pin_configure, port, pin, flags); 	syscall__retval = gpio_pin_configure(port, pin, flags); 	sys_port_trace_syscall_exit(K_SYSCALL_GPIO_PIN_CONFIGURE, gpio_pin_configure, port, pin, flags, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_gpio_port_get_direction(const struct device * port, gpio_port_pins_t map, gpio_port_pins_t * inputs, gpio_port_pins_t * outputs);
+
+__pinned_func
+static inline int gpio_port_get_direction(const struct device * port, gpio_port_pins_t map, gpio_port_pins_t * inputs, gpio_port_pins_t * outputs)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = port };
+		union { uintptr_t x; gpio_port_pins_t val; } parm1 = { .val = map };
+		union { uintptr_t x; gpio_port_pins_t * val; } parm2 = { .val = inputs };
+		union { uintptr_t x; gpio_port_pins_t * val; } parm3 = { .val = outputs };
+		return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_GPIO_PORT_GET_DIRECTION);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_gpio_port_get_direction(port, map, inputs, outputs);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define gpio_port_get_direction(port, map, inputs, outputs) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_GPIO_PORT_GET_DIRECTION, gpio_port_get_direction, port, map, inputs, outputs); 	syscall__retval = gpio_port_get_direction(port, map, inputs, outputs); 	sys_port_trace_syscall_exit(K_SYSCALL_GPIO_PORT_GET_DIRECTION, gpio_port_get_direction, port, map, inputs, outputs, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_gpio_pin_get_config(const struct device * port, gpio_pin_t pin, gpio_flags_t * flags);
+
+__pinned_func
+static inline int gpio_pin_get_config(const struct device * port, gpio_pin_t pin, gpio_flags_t * flags)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = port };
+		union { uintptr_t x; gpio_pin_t val; } parm1 = { .val = pin };
+		union { uintptr_t x; gpio_flags_t * val; } parm2 = { .val = flags };
+		return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_GPIO_PIN_GET_CONFIG);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_gpio_pin_get_config(port, pin, flags);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define gpio_pin_get_config(port, pin, flags) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_GPIO_PIN_GET_CONFIG, gpio_pin_get_config, port, pin, flags); 	syscall__retval = gpio_pin_get_config(port, pin, flags); 	sys_port_trace_syscall_exit(K_SYSCALL_GPIO_PIN_GET_CONFIG, gpio_pin_get_config, port, pin, flags, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_gpio_port_get_raw(const struct device * port, gpio_port_value_t * value);
+
+__pinned_func
+static inline int gpio_port_get_raw(const struct device * port, gpio_port_value_t * value)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = port };
+		union { uintptr_t x; gpio_port_value_t * val; } parm1 = { .val = value };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_GPIO_PORT_GET_RAW);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_gpio_port_get_raw(port, value);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define gpio_port_get_raw(port, value) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_GPIO_PORT_GET_RAW, gpio_port_get_raw, port, value); 	syscall__retval = gpio_port_get_raw(port, value); 	sys_port_trace_syscall_exit(K_SYSCALL_GPIO_PORT_GET_RAW, gpio_port_get_raw, port, value, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_gpio_port_set_masked_raw(const struct device * port, gpio_port_pins_t mask, gpio_port_value_t value);
+
+__pinned_func
+static inline int gpio_port_set_masked_raw(const struct device * port, gpio_port_pins_t mask, gpio_port_value_t value)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = port };
+		union { uintptr_t x; gpio_port_pins_t val; } parm1 = { .val = mask };
+		union { uintptr_t x; gpio_port_value_t val; } parm2 = { .val = value };
+		return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_GPIO_PORT_SET_MASKED_RAW);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_gpio_port_set_masked_raw(port, mask, value);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define gpio_port_set_masked_raw(port, mask, value) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_GPIO_PORT_SET_MASKED_RAW, gpio_port_set_masked_raw, port, mask, value); 	syscall__retval = gpio_port_set_masked_raw(port, mask, value); 	sys_port_trace_syscall_exit(K_SYSCALL_GPIO_PORT_SET_MASKED_RAW, gpio_port_set_masked_raw, port, mask, value, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_gpio_port_set_bits_raw(const struct device * port, gpio_port_pins_t pins);
+
+__pinned_func
+static inline int gpio_port_set_bits_raw(const struct device * port, gpio_port_pins_t pins)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = port };
+		union { uintptr_t x; gpio_port_pins_t val; } parm1 = { .val = pins };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_GPIO_PORT_SET_BITS_RAW);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_gpio_port_set_bits_raw(port, pins);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define gpio_port_set_bits_raw(port, pins) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_GPIO_PORT_SET_BITS_RAW, gpio_port_set_bits_raw, port, pins); 	syscall__retval = gpio_port_set_bits_raw(port, pins); 	sys_port_trace_syscall_exit(K_SYSCALL_GPIO_PORT_SET_BITS_RAW, gpio_port_set_bits_raw, port, pins, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_gpio_port_clear_bits_raw(const struct device * port, gpio_port_pins_t pins);
+
+__pinned_func
+static inline int gpio_port_clear_bits_raw(const struct device * port, gpio_port_pins_t pins)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = port };
+		union { uintptr_t x; gpio_port_pins_t val; } parm1 = { .val = pins };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_GPIO_PORT_CLEAR_BITS_RAW);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_gpio_port_clear_bits_raw(port, pins);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define gpio_port_clear_bits_raw(port, pins) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_GPIO_PORT_CLEAR_BITS_RAW, gpio_port_clear_bits_raw, port, pins); 	syscall__retval = gpio_port_clear_bits_raw(port, pins); 	sys_port_trace_syscall_exit(K_SYSCALL_GPIO_PORT_CLEAR_BITS_RAW, gpio_port_clear_bits_raw, port, pins, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_gpio_port_toggle_bits(const struct device * port, gpio_port_pins_t pins);
+
+__pinned_func
+static inline int gpio_port_toggle_bits(const struct device * port, gpio_port_pins_t pins)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = port };
+		union { uintptr_t x; gpio_port_pins_t val; } parm1 = { .val = pins };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_GPIO_PORT_TOGGLE_BITS);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_gpio_port_toggle_bits(port, pins);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define gpio_port_toggle_bits(port, pins) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_GPIO_PORT_TOGGLE_BITS, gpio_port_toggle_bits, port, pins); 	syscall__retval = gpio_port_toggle_bits(port, pins); 	sys_port_trace_syscall_exit(K_SYSCALL_GPIO_PORT_TOGGLE_BITS, gpio_port_toggle_bits, port, pins, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_gpio_get_pending_int(const struct device * dev);
+
+__pinned_func
+static inline int gpio_get_pending_int(const struct device * dev)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_GPIO_GET_PENDING_INT);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_gpio_get_pending_int(dev);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define gpio_get_pending_int(dev) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_GPIO_GET_PENDING_INT, gpio_get_pending_int, dev); 	syscall__retval = gpio_get_pending_int(dev); 	sys_port_trace_syscall_exit(K_SYSCALL_GPIO_GET_PENDING_INT, gpio_get_pending_int, dev, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif /* include guard */
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/hwinfo.h b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/hwinfo.h
new file mode 100644
index 0000000..e6fd1a0
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/hwinfo.h
@@ -0,0 +1,143 @@
+/* auto-generated by gen_syscalls.py, don't edit */
+
+#ifndef Z_INCLUDE_SYSCALLS_HWINFO_H
+#define Z_INCLUDE_SYSCALLS_HWINFO_H
+
+
+#include <zephyr/tracing/tracing_syscall.h>
+
+#ifndef _ASMLANGUAGE
+
+#include <stdarg.h>
+
+#include <syscall_list.h>
+#include <zephyr/syscall.h>
+
+#include <zephyr/linker/sections.h>
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern ssize_t z_impl_hwinfo_get_device_id(uint8_t * buffer, size_t length);
+
+__pinned_func
+static inline ssize_t hwinfo_get_device_id(uint8_t * buffer, size_t length)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; uint8_t * val; } parm0 = { .val = buffer };
+		union { uintptr_t x; size_t val; } parm1 = { .val = length };
+		return (ssize_t) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_HWINFO_GET_DEVICE_ID);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_hwinfo_get_device_id(buffer, length);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define hwinfo_get_device_id(buffer, length) ({ 	ssize_t syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_HWINFO_GET_DEVICE_ID, hwinfo_get_device_id, buffer, length); 	syscall__retval = hwinfo_get_device_id(buffer, length); 	sys_port_trace_syscall_exit(K_SYSCALL_HWINFO_GET_DEVICE_ID, hwinfo_get_device_id, buffer, length, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_hwinfo_get_device_eui64(uint8_t * buffer);
+
+__pinned_func
+static inline int hwinfo_get_device_eui64(uint8_t * buffer)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; uint8_t * val; } parm0 = { .val = buffer };
+		return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_HWINFO_GET_DEVICE_EUI64);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_hwinfo_get_device_eui64(buffer);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define hwinfo_get_device_eui64(buffer) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_HWINFO_GET_DEVICE_EUI64, hwinfo_get_device_eui64, buffer); 	syscall__retval = hwinfo_get_device_eui64(buffer); 	sys_port_trace_syscall_exit(K_SYSCALL_HWINFO_GET_DEVICE_EUI64, hwinfo_get_device_eui64, buffer, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_hwinfo_get_reset_cause(uint32_t * cause);
+
+__pinned_func
+static inline int hwinfo_get_reset_cause(uint32_t * cause)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; uint32_t * val; } parm0 = { .val = cause };
+		return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_HWINFO_GET_RESET_CAUSE);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_hwinfo_get_reset_cause(cause);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define hwinfo_get_reset_cause(cause) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_HWINFO_GET_RESET_CAUSE, hwinfo_get_reset_cause, cause); 	syscall__retval = hwinfo_get_reset_cause(cause); 	sys_port_trace_syscall_exit(K_SYSCALL_HWINFO_GET_RESET_CAUSE, hwinfo_get_reset_cause, cause, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_hwinfo_clear_reset_cause(void);
+
+__pinned_func
+static inline int hwinfo_clear_reset_cause(void)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		return (int) arch_syscall_invoke0(K_SYSCALL_HWINFO_CLEAR_RESET_CAUSE);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_hwinfo_clear_reset_cause();
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define hwinfo_clear_reset_cause() ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_HWINFO_CLEAR_RESET_CAUSE, hwinfo_clear_reset_cause); 	syscall__retval = hwinfo_clear_reset_cause(); 	sys_port_trace_syscall_exit(K_SYSCALL_HWINFO_CLEAR_RESET_CAUSE, hwinfo_clear_reset_cause, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_hwinfo_get_supported_reset_cause(uint32_t * supported);
+
+__pinned_func
+static inline int hwinfo_get_supported_reset_cause(uint32_t * supported)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; uint32_t * val; } parm0 = { .val = supported };
+		return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_HWINFO_GET_SUPPORTED_RESET_CAUSE);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_hwinfo_get_supported_reset_cause(supported);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define hwinfo_get_supported_reset_cause(supported) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_HWINFO_GET_SUPPORTED_RESET_CAUSE, hwinfo_get_supported_reset_cause, supported); 	syscall__retval = hwinfo_get_supported_reset_cause(supported); 	sys_port_trace_syscall_exit(K_SYSCALL_HWINFO_GET_SUPPORTED_RESET_CAUSE, hwinfo_get_supported_reset_cause, supported, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif /* include guard */
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/hwspinlock.h b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/hwspinlock.h
new file mode 100644
index 0000000..283fc5e
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/hwspinlock.h
@@ -0,0 +1,125 @@
+/* auto-generated by gen_syscalls.py, don't edit */
+
+#ifndef Z_INCLUDE_SYSCALLS_HWSPINLOCK_H
+#define Z_INCLUDE_SYSCALLS_HWSPINLOCK_H
+
+
+#include <zephyr/tracing/tracing_syscall.h>
+
+#ifndef _ASMLANGUAGE
+
+#include <stdarg.h>
+
+#include <syscall_list.h>
+#include <zephyr/syscall.h>
+
+#include <zephyr/linker/sections.h>
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern int z_impl_hwspinlock_trylock(const struct device * dev, uint32_t id);
+
+__pinned_func
+static inline int hwspinlock_trylock(const struct device * dev, uint32_t id)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uint32_t val; } parm1 = { .val = id };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_HWSPINLOCK_TRYLOCK);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_hwspinlock_trylock(dev, id);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define hwspinlock_trylock(dev, id) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_HWSPINLOCK_TRYLOCK, hwspinlock_trylock, dev, id); 	syscall__retval = hwspinlock_trylock(dev, id); 	sys_port_trace_syscall_exit(K_SYSCALL_HWSPINLOCK_TRYLOCK, hwspinlock_trylock, dev, id, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern void z_impl_hwspinlock_lock(const struct device * dev, uint32_t id);
+
+__pinned_func
+static inline void hwspinlock_lock(const struct device * dev, uint32_t id)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uint32_t val; } parm1 = { .val = id };
+		(void) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_HWSPINLOCK_LOCK);
+		return;
+	}
+#endif
+	compiler_barrier();
+	z_impl_hwspinlock_lock(dev, id);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define hwspinlock_lock(dev, id) do { 	sys_port_trace_syscall_enter(K_SYSCALL_HWSPINLOCK_LOCK, hwspinlock_lock, dev, id); 	hwspinlock_lock(dev, id); 	sys_port_trace_syscall_exit(K_SYSCALL_HWSPINLOCK_LOCK, hwspinlock_lock, dev, id); } while(false)
+#endif
+#endif
+
+
+extern void z_impl_hwspinlock_unlock(const struct device * dev, uint32_t id);
+
+__pinned_func
+static inline void hwspinlock_unlock(const struct device * dev, uint32_t id)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uint32_t val; } parm1 = { .val = id };
+		(void) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_HWSPINLOCK_UNLOCK);
+		return;
+	}
+#endif
+	compiler_barrier();
+	z_impl_hwspinlock_unlock(dev, id);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define hwspinlock_unlock(dev, id) do { 	sys_port_trace_syscall_enter(K_SYSCALL_HWSPINLOCK_UNLOCK, hwspinlock_unlock, dev, id); 	hwspinlock_unlock(dev, id); 	sys_port_trace_syscall_exit(K_SYSCALL_HWSPINLOCK_UNLOCK, hwspinlock_unlock, dev, id); } while(false)
+#endif
+#endif
+
+
+extern uint32_t z_impl_hwspinlock_get_max_id(const struct device * dev);
+
+__pinned_func
+static inline uint32_t hwspinlock_get_max_id(const struct device * dev)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		return (uint32_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_HWSPINLOCK_GET_MAX_ID);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_hwspinlock_get_max_id(dev);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define hwspinlock_get_max_id(dev) ({ 	uint32_t syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_HWSPINLOCK_GET_MAX_ID, hwspinlock_get_max_id, dev); 	syscall__retval = hwspinlock_get_max_id(dev); 	sys_port_trace_syscall_exit(K_SYSCALL_HWSPINLOCK_GET_MAX_ID, hwspinlock_get_max_id, dev, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif /* include guard */
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/i2c.h b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/i2c.h
new file mode 100644
index 0000000..494e68e
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/i2c.h
@@ -0,0 +1,171 @@
+/* auto-generated by gen_syscalls.py, don't edit */
+
+#ifndef Z_INCLUDE_SYSCALLS_I2C_H
+#define Z_INCLUDE_SYSCALLS_I2C_H
+
+
+#include <zephyr/tracing/tracing_syscall.h>
+
+#ifndef _ASMLANGUAGE
+
+#include <stdarg.h>
+
+#include <syscall_list.h>
+#include <zephyr/syscall.h>
+
+#include <zephyr/linker/sections.h>
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern int z_impl_i2c_configure(const struct device * dev, uint32_t dev_config);
+
+__pinned_func
+static inline int i2c_configure(const struct device * dev, uint32_t dev_config)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uint32_t val; } parm1 = { .val = dev_config };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_I2C_CONFIGURE);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_i2c_configure(dev, dev_config);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define i2c_configure(dev, dev_config) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_I2C_CONFIGURE, i2c_configure, dev, dev_config); 	syscall__retval = i2c_configure(dev, dev_config); 	sys_port_trace_syscall_exit(K_SYSCALL_I2C_CONFIGURE, i2c_configure, dev, dev_config, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_i2c_get_config(const struct device * dev, uint32_t * dev_config);
+
+__pinned_func
+static inline int i2c_get_config(const struct device * dev, uint32_t * dev_config)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uint32_t * val; } parm1 = { .val = dev_config };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_I2C_GET_CONFIG);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_i2c_get_config(dev, dev_config);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define i2c_get_config(dev, dev_config) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_I2C_GET_CONFIG, i2c_get_config, dev, dev_config); 	syscall__retval = i2c_get_config(dev, dev_config); 	sys_port_trace_syscall_exit(K_SYSCALL_I2C_GET_CONFIG, i2c_get_config, dev, dev_config, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_i2c_transfer(const struct device * dev, struct i2c_msg * msgs, uint8_t num_msgs, uint16_t addr);
+
+__pinned_func
+static inline int i2c_transfer(const struct device * dev, struct i2c_msg * msgs, uint8_t num_msgs, uint16_t addr)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; struct i2c_msg * val; } parm1 = { .val = msgs };
+		union { uintptr_t x; uint8_t val; } parm2 = { .val = num_msgs };
+		union { uintptr_t x; uint16_t val; } parm3 = { .val = addr };
+		return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_I2C_TRANSFER);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_i2c_transfer(dev, msgs, num_msgs, addr);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define i2c_transfer(dev, msgs, num_msgs, addr) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_I2C_TRANSFER, i2c_transfer, dev, msgs, num_msgs, addr); 	syscall__retval = i2c_transfer(dev, msgs, num_msgs, addr); 	sys_port_trace_syscall_exit(K_SYSCALL_I2C_TRANSFER, i2c_transfer, dev, msgs, num_msgs, addr, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_i2c_recover_bus(const struct device * dev);
+
+__pinned_func
+static inline int i2c_recover_bus(const struct device * dev)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_I2C_RECOVER_BUS);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_i2c_recover_bus(dev);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define i2c_recover_bus(dev) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_I2C_RECOVER_BUS, i2c_recover_bus, dev); 	syscall__retval = i2c_recover_bus(dev); 	sys_port_trace_syscall_exit(K_SYSCALL_I2C_RECOVER_BUS, i2c_recover_bus, dev, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_i2c_target_driver_register(const struct device * dev);
+
+__pinned_func
+static inline int i2c_target_driver_register(const struct device * dev)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_I2C_TARGET_DRIVER_REGISTER);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_i2c_target_driver_register(dev);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define i2c_target_driver_register(dev) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_I2C_TARGET_DRIVER_REGISTER, i2c_target_driver_register, dev); 	syscall__retval = i2c_target_driver_register(dev); 	sys_port_trace_syscall_exit(K_SYSCALL_I2C_TARGET_DRIVER_REGISTER, i2c_target_driver_register, dev, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_i2c_target_driver_unregister(const struct device * dev);
+
+__pinned_func
+static inline int i2c_target_driver_unregister(const struct device * dev)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_I2C_TARGET_DRIVER_UNREGISTER);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_i2c_target_driver_unregister(dev);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define i2c_target_driver_unregister(dev) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_I2C_TARGET_DRIVER_UNREGISTER, i2c_target_driver_unregister, dev); 	syscall__retval = i2c_target_driver_unregister(dev); 	sys_port_trace_syscall_exit(K_SYSCALL_I2C_TARGET_DRIVER_UNREGISTER, i2c_target_driver_unregister, dev, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif /* include guard */
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/i2s.h b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/i2s.h
new file mode 100644
index 0000000..28460ba
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/i2s.h
@@ -0,0 +1,128 @@
+/* auto-generated by gen_syscalls.py, don't edit */
+
+#ifndef Z_INCLUDE_SYSCALLS_I2S_H
+#define Z_INCLUDE_SYSCALLS_I2S_H
+
+
+#include <zephyr/tracing/tracing_syscall.h>
+
+#ifndef _ASMLANGUAGE
+
+#include <stdarg.h>
+
+#include <syscall_list.h>
+#include <zephyr/syscall.h>
+
+#include <zephyr/linker/sections.h>
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern int z_impl_i2s_configure(const struct device * dev, enum i2s_dir dir, const struct i2s_config * cfg);
+
+__pinned_func
+static inline int i2s_configure(const struct device * dev, enum i2s_dir dir, const struct i2s_config * cfg)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; enum i2s_dir val; } parm1 = { .val = dir };
+		union { uintptr_t x; const struct i2s_config * val; } parm2 = { .val = cfg };
+		return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_I2S_CONFIGURE);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_i2s_configure(dev, dir, cfg);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define i2s_configure(dev, dir, cfg) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_I2S_CONFIGURE, i2s_configure, dev, dir, cfg); 	syscall__retval = i2s_configure(dev, dir, cfg); 	sys_port_trace_syscall_exit(K_SYSCALL_I2S_CONFIGURE, i2s_configure, dev, dir, cfg, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_i2s_buf_read(const struct device * dev, void * buf, size_t * size);
+
+__pinned_func
+static inline int i2s_buf_read(const struct device * dev, void * buf, size_t * size)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; void * val; } parm1 = { .val = buf };
+		union { uintptr_t x; size_t * val; } parm2 = { .val = size };
+		return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_I2S_BUF_READ);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_i2s_buf_read(dev, buf, size);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define i2s_buf_read(dev, buf, size) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_I2S_BUF_READ, i2s_buf_read, dev, buf, size); 	syscall__retval = i2s_buf_read(dev, buf, size); 	sys_port_trace_syscall_exit(K_SYSCALL_I2S_BUF_READ, i2s_buf_read, dev, buf, size, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_i2s_buf_write(const struct device * dev, void * buf, size_t size);
+
+__pinned_func
+static inline int i2s_buf_write(const struct device * dev, void * buf, size_t size)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; void * val; } parm1 = { .val = buf };
+		union { uintptr_t x; size_t val; } parm2 = { .val = size };
+		return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_I2S_BUF_WRITE);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_i2s_buf_write(dev, buf, size);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define i2s_buf_write(dev, buf, size) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_I2S_BUF_WRITE, i2s_buf_write, dev, buf, size); 	syscall__retval = i2s_buf_write(dev, buf, size); 	sys_port_trace_syscall_exit(K_SYSCALL_I2S_BUF_WRITE, i2s_buf_write, dev, buf, size, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_i2s_trigger(const struct device * dev, enum i2s_dir dir, enum i2s_trigger_cmd cmd);
+
+__pinned_func
+static inline int i2s_trigger(const struct device * dev, enum i2s_dir dir, enum i2s_trigger_cmd cmd)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; enum i2s_dir val; } parm1 = { .val = dir };
+		union { uintptr_t x; enum i2s_trigger_cmd val; } parm2 = { .val = cmd };
+		return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_I2S_TRIGGER);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_i2s_trigger(dev, dir, cmd);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define i2s_trigger(dev, dir, cmd) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_I2S_TRIGGER, i2s_trigger, dev, dir, cmd); 	syscall__retval = i2s_trigger(dev, dir, cmd); 	sys_port_trace_syscall_exit(K_SYSCALL_I2S_TRIGGER, i2s_trigger, dev, dir, cmd, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif /* include guard */
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/i3c.h b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/i3c.h
new file mode 100644
index 0000000..ef9430b
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/i3c.h
@@ -0,0 +1,77 @@
+/* auto-generated by gen_syscalls.py, don't edit */
+
+#ifndef Z_INCLUDE_SYSCALLS_I3C_H
+#define Z_INCLUDE_SYSCALLS_I3C_H
+
+
+#include <zephyr/tracing/tracing_syscall.h>
+
+#ifndef _ASMLANGUAGE
+
+#include <stdarg.h>
+
+#include <syscall_list.h>
+#include <zephyr/syscall.h>
+
+#include <zephyr/linker/sections.h>
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern int z_impl_i3c_do_ccc(const struct device * dev, struct i3c_ccc_payload * payload);
+
+__pinned_func
+static inline int i3c_do_ccc(const struct device * dev, struct i3c_ccc_payload * payload)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; struct i3c_ccc_payload * val; } parm1 = { .val = payload };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_I3C_DO_CCC);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_i3c_do_ccc(dev, payload);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define i3c_do_ccc(dev, payload) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_I3C_DO_CCC, i3c_do_ccc, dev, payload); 	syscall__retval = i3c_do_ccc(dev, payload); 	sys_port_trace_syscall_exit(K_SYSCALL_I3C_DO_CCC, i3c_do_ccc, dev, payload, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_i3c_transfer(struct i3c_device_desc * target, struct i3c_msg * msgs, uint8_t num_msgs);
+
+__pinned_func
+static inline int i3c_transfer(struct i3c_device_desc * target, struct i3c_msg * msgs, uint8_t num_msgs)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; struct i3c_device_desc * val; } parm0 = { .val = target };
+		union { uintptr_t x; struct i3c_msg * val; } parm1 = { .val = msgs };
+		union { uintptr_t x; uint8_t val; } parm2 = { .val = num_msgs };
+		return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_I3C_TRANSFER);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_i3c_transfer(target, msgs, num_msgs);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define i3c_transfer(target, msgs, num_msgs) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_I3C_TRANSFER, i3c_transfer, target, msgs, num_msgs); 	syscall__retval = i3c_transfer(target, msgs, num_msgs); 	sys_port_trace_syscall_exit(K_SYSCALL_I3C_TRANSFER, i3c_transfer, target, msgs, num_msgs, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif /* include guard */
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/ipm.h b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/ipm.h
new file mode 100644
index 0000000..ff340ea
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/ipm.h
@@ -0,0 +1,149 @@
+/* auto-generated by gen_syscalls.py, don't edit */
+
+#ifndef Z_INCLUDE_SYSCALLS_IPM_H
+#define Z_INCLUDE_SYSCALLS_IPM_H
+
+
+#include <zephyr/tracing/tracing_syscall.h>
+
+#ifndef _ASMLANGUAGE
+
+#include <stdarg.h>
+
+#include <syscall_list.h>
+#include <zephyr/syscall.h>
+
+#include <zephyr/linker/sections.h>
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern int z_impl_ipm_send(const struct device * ipmdev, int wait, uint32_t id, const void * data, int size);
+
+__pinned_func
+static inline int ipm_send(const struct device * ipmdev, int wait, uint32_t id, const void * data, int size)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = ipmdev };
+		union { uintptr_t x; int val; } parm1 = { .val = wait };
+		union { uintptr_t x; uint32_t val; } parm2 = { .val = id };
+		union { uintptr_t x; const void * val; } parm3 = { .val = data };
+		union { uintptr_t x; int val; } parm4 = { .val = size };
+		return (int) arch_syscall_invoke5(parm0.x, parm1.x, parm2.x, parm3.x, parm4.x, K_SYSCALL_IPM_SEND);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_ipm_send(ipmdev, wait, id, data, size);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define ipm_send(ipmdev, wait, id, data, size) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_IPM_SEND, ipm_send, ipmdev, wait, id, data, size); 	syscall__retval = ipm_send(ipmdev, wait, id, data, size); 	sys_port_trace_syscall_exit(K_SYSCALL_IPM_SEND, ipm_send, ipmdev, wait, id, data, size, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_ipm_max_data_size_get(const struct device * ipmdev);
+
+__pinned_func
+static inline int ipm_max_data_size_get(const struct device * ipmdev)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = ipmdev };
+		return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_IPM_MAX_DATA_SIZE_GET);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_ipm_max_data_size_get(ipmdev);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define ipm_max_data_size_get(ipmdev) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_IPM_MAX_DATA_SIZE_GET, ipm_max_data_size_get, ipmdev); 	syscall__retval = ipm_max_data_size_get(ipmdev); 	sys_port_trace_syscall_exit(K_SYSCALL_IPM_MAX_DATA_SIZE_GET, ipm_max_data_size_get, ipmdev, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern uint32_t z_impl_ipm_max_id_val_get(const struct device * ipmdev);
+
+__pinned_func
+static inline uint32_t ipm_max_id_val_get(const struct device * ipmdev)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = ipmdev };
+		return (uint32_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_IPM_MAX_ID_VAL_GET);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_ipm_max_id_val_get(ipmdev);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define ipm_max_id_val_get(ipmdev) ({ 	uint32_t syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_IPM_MAX_ID_VAL_GET, ipm_max_id_val_get, ipmdev); 	syscall__retval = ipm_max_id_val_get(ipmdev); 	sys_port_trace_syscall_exit(K_SYSCALL_IPM_MAX_ID_VAL_GET, ipm_max_id_val_get, ipmdev, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_ipm_set_enabled(const struct device * ipmdev, int enable);
+
+__pinned_func
+static inline int ipm_set_enabled(const struct device * ipmdev, int enable)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = ipmdev };
+		union { uintptr_t x; int val; } parm1 = { .val = enable };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_IPM_SET_ENABLED);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_ipm_set_enabled(ipmdev, enable);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define ipm_set_enabled(ipmdev, enable) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_IPM_SET_ENABLED, ipm_set_enabled, ipmdev, enable); 	syscall__retval = ipm_set_enabled(ipmdev, enable); 	sys_port_trace_syscall_exit(K_SYSCALL_IPM_SET_ENABLED, ipm_set_enabled, ipmdev, enable, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern void z_impl_ipm_complete(const struct device * ipmdev);
+
+__pinned_func
+static inline void ipm_complete(const struct device * ipmdev)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = ipmdev };
+		(void) arch_syscall_invoke1(parm0.x, K_SYSCALL_IPM_COMPLETE);
+		return;
+	}
+#endif
+	compiler_barrier();
+	z_impl_ipm_complete(ipmdev);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define ipm_complete(ipmdev) do { 	sys_port_trace_syscall_enter(K_SYSCALL_IPM_COMPLETE, ipm_complete, ipmdev); 	ipm_complete(ipmdev); 	sys_port_trace_syscall_exit(K_SYSCALL_IPM_COMPLETE, ipm_complete, ipmdev); } while(false)
+#endif
+#endif
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif /* include guard */
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/ivshmem.h b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/ivshmem.h
new file mode 100644
index 0000000..8f51cb3
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/ivshmem.h
@@ -0,0 +1,315 @@
+/* auto-generated by gen_syscalls.py, don't edit */
+
+#ifndef Z_INCLUDE_SYSCALLS_IVSHMEM_H
+#define Z_INCLUDE_SYSCALLS_IVSHMEM_H
+
+
+#include <zephyr/tracing/tracing_syscall.h>
+
+#ifndef _ASMLANGUAGE
+
+#include <stdarg.h>
+
+#include <syscall_list.h>
+#include <zephyr/syscall.h>
+
+#include <zephyr/linker/sections.h>
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern size_t z_impl_ivshmem_get_mem(const struct device * dev, uintptr_t * memmap);
+
+__pinned_func
+static inline size_t ivshmem_get_mem(const struct device * dev, uintptr_t * memmap)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uintptr_t * val; } parm1 = { .val = memmap };
+		return (size_t) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_IVSHMEM_GET_MEM);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_ivshmem_get_mem(dev, memmap);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define ivshmem_get_mem(dev, memmap) ({ 	size_t syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_IVSHMEM_GET_MEM, ivshmem_get_mem, dev, memmap); 	syscall__retval = ivshmem_get_mem(dev, memmap); 	sys_port_trace_syscall_exit(K_SYSCALL_IVSHMEM_GET_MEM, ivshmem_get_mem, dev, memmap, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern uint32_t z_impl_ivshmem_get_id(const struct device * dev);
+
+__pinned_func
+static inline uint32_t ivshmem_get_id(const struct device * dev)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		return (uint32_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_IVSHMEM_GET_ID);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_ivshmem_get_id(dev);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define ivshmem_get_id(dev) ({ 	uint32_t syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_IVSHMEM_GET_ID, ivshmem_get_id, dev); 	syscall__retval = ivshmem_get_id(dev); 	sys_port_trace_syscall_exit(K_SYSCALL_IVSHMEM_GET_ID, ivshmem_get_id, dev, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern uint16_t z_impl_ivshmem_get_vectors(const struct device * dev);
+
+__pinned_func
+static inline uint16_t ivshmem_get_vectors(const struct device * dev)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		return (uint16_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_IVSHMEM_GET_VECTORS);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_ivshmem_get_vectors(dev);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define ivshmem_get_vectors(dev) ({ 	uint16_t syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_IVSHMEM_GET_VECTORS, ivshmem_get_vectors, dev); 	syscall__retval = ivshmem_get_vectors(dev); 	sys_port_trace_syscall_exit(K_SYSCALL_IVSHMEM_GET_VECTORS, ivshmem_get_vectors, dev, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_ivshmem_int_peer(const struct device * dev, uint32_t peer_id, uint16_t vector);
+
+__pinned_func
+static inline int ivshmem_int_peer(const struct device * dev, uint32_t peer_id, uint16_t vector)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uint32_t val; } parm1 = { .val = peer_id };
+		union { uintptr_t x; uint16_t val; } parm2 = { .val = vector };
+		return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_IVSHMEM_INT_PEER);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_ivshmem_int_peer(dev, peer_id, vector);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define ivshmem_int_peer(dev, peer_id, vector) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_IVSHMEM_INT_PEER, ivshmem_int_peer, dev, peer_id, vector); 	syscall__retval = ivshmem_int_peer(dev, peer_id, vector); 	sys_port_trace_syscall_exit(K_SYSCALL_IVSHMEM_INT_PEER, ivshmem_int_peer, dev, peer_id, vector, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_ivshmem_register_handler(const struct device * dev, struct k_poll_signal * signal, uint16_t vector);
+
+__pinned_func
+static inline int ivshmem_register_handler(const struct device * dev, struct k_poll_signal * signal, uint16_t vector)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; struct k_poll_signal * val; } parm1 = { .val = signal };
+		union { uintptr_t x; uint16_t val; } parm2 = { .val = vector };
+		return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_IVSHMEM_REGISTER_HANDLER);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_ivshmem_register_handler(dev, signal, vector);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define ivshmem_register_handler(dev, signal, vector) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_IVSHMEM_REGISTER_HANDLER, ivshmem_register_handler, dev, signal, vector); 	syscall__retval = ivshmem_register_handler(dev, signal, vector); 	sys_port_trace_syscall_exit(K_SYSCALL_IVSHMEM_REGISTER_HANDLER, ivshmem_register_handler, dev, signal, vector, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern size_t z_impl_ivshmem_get_rw_mem_section(const struct device * dev, uintptr_t * memmap);
+
+__pinned_func
+static inline size_t ivshmem_get_rw_mem_section(const struct device * dev, uintptr_t * memmap)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uintptr_t * val; } parm1 = { .val = memmap };
+		return (size_t) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_IVSHMEM_GET_RW_MEM_SECTION);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_ivshmem_get_rw_mem_section(dev, memmap);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define ivshmem_get_rw_mem_section(dev, memmap) ({ 	size_t syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_IVSHMEM_GET_RW_MEM_SECTION, ivshmem_get_rw_mem_section, dev, memmap); 	syscall__retval = ivshmem_get_rw_mem_section(dev, memmap); 	sys_port_trace_syscall_exit(K_SYSCALL_IVSHMEM_GET_RW_MEM_SECTION, ivshmem_get_rw_mem_section, dev, memmap, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern size_t z_impl_ivshmem_get_output_mem_section(const struct device * dev, uint32_t peer_id, uintptr_t * memmap);
+
+__pinned_func
+static inline size_t ivshmem_get_output_mem_section(const struct device * dev, uint32_t peer_id, uintptr_t * memmap)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uint32_t val; } parm1 = { .val = peer_id };
+		union { uintptr_t x; uintptr_t * val; } parm2 = { .val = memmap };
+		return (size_t) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_IVSHMEM_GET_OUTPUT_MEM_SECTION);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_ivshmem_get_output_mem_section(dev, peer_id, memmap);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define ivshmem_get_output_mem_section(dev, peer_id, memmap) ({ 	size_t syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_IVSHMEM_GET_OUTPUT_MEM_SECTION, ivshmem_get_output_mem_section, dev, peer_id, memmap); 	syscall__retval = ivshmem_get_output_mem_section(dev, peer_id, memmap); 	sys_port_trace_syscall_exit(K_SYSCALL_IVSHMEM_GET_OUTPUT_MEM_SECTION, ivshmem_get_output_mem_section, dev, peer_id, memmap, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern uint32_t z_impl_ivshmem_get_state(const struct device * dev, uint32_t peer_id);
+
+__pinned_func
+static inline uint32_t ivshmem_get_state(const struct device * dev, uint32_t peer_id)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uint32_t val; } parm1 = { .val = peer_id };
+		return (uint32_t) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_IVSHMEM_GET_STATE);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_ivshmem_get_state(dev, peer_id);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define ivshmem_get_state(dev, peer_id) ({ 	uint32_t syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_IVSHMEM_GET_STATE, ivshmem_get_state, dev, peer_id); 	syscall__retval = ivshmem_get_state(dev, peer_id); 	sys_port_trace_syscall_exit(K_SYSCALL_IVSHMEM_GET_STATE, ivshmem_get_state, dev, peer_id, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_ivshmem_set_state(const struct device * dev, uint32_t state);
+
+__pinned_func
+static inline int ivshmem_set_state(const struct device * dev, uint32_t state)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uint32_t val; } parm1 = { .val = state };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_IVSHMEM_SET_STATE);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_ivshmem_set_state(dev, state);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define ivshmem_set_state(dev, state) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_IVSHMEM_SET_STATE, ivshmem_set_state, dev, state); 	syscall__retval = ivshmem_set_state(dev, state); 	sys_port_trace_syscall_exit(K_SYSCALL_IVSHMEM_SET_STATE, ivshmem_set_state, dev, state, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern uint32_t z_impl_ivshmem_get_max_peers(const struct device * dev);
+
+__pinned_func
+static inline uint32_t ivshmem_get_max_peers(const struct device * dev)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		return (uint32_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_IVSHMEM_GET_MAX_PEERS);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_ivshmem_get_max_peers(dev);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define ivshmem_get_max_peers(dev) ({ 	uint32_t syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_IVSHMEM_GET_MAX_PEERS, ivshmem_get_max_peers, dev); 	syscall__retval = ivshmem_get_max_peers(dev); 	sys_port_trace_syscall_exit(K_SYSCALL_IVSHMEM_GET_MAX_PEERS, ivshmem_get_max_peers, dev, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern uint16_t z_impl_ivshmem_get_protocol(const struct device * dev);
+
+__pinned_func
+static inline uint16_t ivshmem_get_protocol(const struct device * dev)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		return (uint16_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_IVSHMEM_GET_PROTOCOL);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_ivshmem_get_protocol(dev);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define ivshmem_get_protocol(dev) ({ 	uint16_t syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_IVSHMEM_GET_PROTOCOL, ivshmem_get_protocol, dev); 	syscall__retval = ivshmem_get_protocol(dev); 	sys_port_trace_syscall_exit(K_SYSCALL_IVSHMEM_GET_PROTOCOL, ivshmem_get_protocol, dev, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_ivshmem_enable_interrupts(const struct device * dev, bool enable);
+
+__pinned_func
+static inline int ivshmem_enable_interrupts(const struct device * dev, bool enable)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; bool val; } parm1 = { .val = enable };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_IVSHMEM_ENABLE_INTERRUPTS);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_ivshmem_enable_interrupts(dev, enable);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define ivshmem_enable_interrupts(dev, enable) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_IVSHMEM_ENABLE_INTERRUPTS, ivshmem_enable_interrupts, dev, enable); 	syscall__retval = ivshmem_enable_interrupts(dev, enable); 	sys_port_trace_syscall_exit(K_SYSCALL_IVSHMEM_ENABLE_INTERRUPTS, ivshmem_enable_interrupts, dev, enable, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif /* include guard */
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/kernel.h b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/kernel.h
new file mode 100644
index 0000000..3c5e56b
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/kernel.h
@@ -0,0 +1,1590 @@
+/* auto-generated by gen_syscalls.py, don't edit */
+
+#ifndef Z_INCLUDE_SYSCALLS_KERNEL_H
+#define Z_INCLUDE_SYSCALLS_KERNEL_H
+
+
+
+
+#ifndef _ASMLANGUAGE
+
+#include <stdarg.h>
+
+#include <syscall_list.h>
+#include <zephyr/syscall.h>
+
+#include <zephyr/linker/sections.h>
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern k_thread_stack_t * z_impl_k_thread_stack_alloc(size_t size, int flags);
+
+__pinned_func
+static inline k_thread_stack_t * k_thread_stack_alloc(size_t size, int flags)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; size_t val; } parm0 = { .val = size };
+		union { uintptr_t x; int val; } parm1 = { .val = flags };
+		return (k_thread_stack_t *) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_K_THREAD_STACK_ALLOC);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_k_thread_stack_alloc(size, flags);
+}
+
+
+extern int z_impl_k_thread_stack_free(k_thread_stack_t * stack);
+
+__pinned_func
+static inline int k_thread_stack_free(k_thread_stack_t * stack)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; k_thread_stack_t * val; } parm0 = { .val = stack };
+		return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_THREAD_STACK_FREE);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_k_thread_stack_free(stack);
+}
+
+
+extern k_tid_t z_impl_k_thread_create(struct k_thread * new_thread, k_thread_stack_t * stack, size_t stack_size, k_thread_entry_t entry, void * p1, void * p2, void * p3, int prio, uint32_t options, k_timeout_t delay);
+
+__pinned_func
+static inline k_tid_t k_thread_create(struct k_thread * new_thread, k_thread_stack_t * stack, size_t stack_size, k_thread_entry_t entry, void * p1, void * p2, void * p3, int prio, uint32_t options, k_timeout_t delay)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; struct k_thread * val; } parm0 = { .val = new_thread };
+		union { uintptr_t x; k_thread_stack_t * val; } parm1 = { .val = stack };
+		union { uintptr_t x; size_t val; } parm2 = { .val = stack_size };
+		union { uintptr_t x; k_thread_entry_t val; } parm3 = { .val = entry };
+		union { uintptr_t x; void * val; } parm4 = { .val = p1 };
+		union { uintptr_t x; void * val; } parm5 = { .val = p2 };
+		union { uintptr_t x; void * val; } parm6 = { .val = p3 };
+		union { uintptr_t x; int val; } parm7 = { .val = prio };
+		union { uintptr_t x; uint32_t val; } parm8 = { .val = options };
+		union { struct { uintptr_t lo, hi; } split; k_timeout_t val; } parm9 = { .val = delay };
+		uintptr_t more[] = {
+			parm5.x,
+			parm6.x,
+			parm7.x,
+			parm8.x,
+			parm9.split.lo,
+			parm9.split.hi
+		};
+		return (k_tid_t) arch_syscall_invoke6(parm0.x, parm1.x, parm2.x, parm3.x, parm4.x, (uintptr_t) &more, K_SYSCALL_K_THREAD_CREATE);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_k_thread_create(new_thread, stack, stack_size, entry, p1, p2, p3, prio, options, delay);
+}
+
+
+extern int z_impl_k_thread_stack_space_get(const struct k_thread * thread, size_t * unused_ptr);
+
+__pinned_func
+static inline int k_thread_stack_space_get(const struct k_thread * thread, size_t * unused_ptr)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct k_thread * val; } parm0 = { .val = thread };
+		union { uintptr_t x; size_t * val; } parm1 = { .val = unused_ptr };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_K_THREAD_STACK_SPACE_GET);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_k_thread_stack_space_get(thread, unused_ptr);
+}
+
+
+extern int z_impl_k_thread_join(struct k_thread * thread, k_timeout_t timeout);
+
+__pinned_func
+static inline int k_thread_join(struct k_thread * thread, k_timeout_t timeout)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; struct k_thread * val; } parm0 = { .val = thread };
+		union { struct { uintptr_t lo, hi; } split; k_timeout_t val; } parm1 = { .val = timeout };
+		return (int) arch_syscall_invoke3(parm0.x, parm1.split.lo, parm1.split.hi, K_SYSCALL_K_THREAD_JOIN);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_k_thread_join(thread, timeout);
+}
+
+
+extern int32_t z_impl_k_sleep(k_timeout_t timeout);
+
+__pinned_func
+static inline int32_t k_sleep(k_timeout_t timeout)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { struct { uintptr_t lo, hi; } split; k_timeout_t val; } parm0 = { .val = timeout };
+		return (int32_t) arch_syscall_invoke2(parm0.split.lo, parm0.split.hi, K_SYSCALL_K_SLEEP);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_k_sleep(timeout);
+}
+
+
+extern int32_t z_impl_k_usleep(int32_t us);
+
+__pinned_func
+static inline int32_t k_usleep(int32_t us)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; int32_t val; } parm0 = { .val = us };
+		return (int32_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_USLEEP);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_k_usleep(us);
+}
+
+
+extern void z_impl_k_busy_wait(uint32_t usec_to_wait);
+
+__pinned_func
+static inline void k_busy_wait(uint32_t usec_to_wait)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; uint32_t val; } parm0 = { .val = usec_to_wait };
+		(void) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_BUSY_WAIT);
+		return;
+	}
+#endif
+	compiler_barrier();
+	z_impl_k_busy_wait(usec_to_wait);
+}
+
+
+extern void z_impl_k_yield(void);
+
+__pinned_func
+static inline void k_yield(void)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		(void) arch_syscall_invoke0(K_SYSCALL_K_YIELD);
+		return;
+	}
+#endif
+	compiler_barrier();
+	z_impl_k_yield();
+}
+
+
+extern void z_impl_k_wakeup(k_tid_t thread);
+
+__pinned_func
+static inline void k_wakeup(k_tid_t thread)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; k_tid_t val; } parm0 = { .val = thread };
+		(void) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_WAKEUP);
+		return;
+	}
+#endif
+	compiler_barrier();
+	z_impl_k_wakeup(thread);
+}
+
+
+extern k_tid_t z_impl_k_sched_current_thread_query(void);
+
+__pinned_func
+static inline k_tid_t k_sched_current_thread_query(void)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		return (k_tid_t) arch_syscall_invoke0(K_SYSCALL_K_SCHED_CURRENT_THREAD_QUERY);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_k_sched_current_thread_query();
+}
+
+
+extern void z_impl_k_thread_abort(k_tid_t thread);
+
+__pinned_func
+static inline void k_thread_abort(k_tid_t thread)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; k_tid_t val; } parm0 = { .val = thread };
+		(void) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_THREAD_ABORT);
+		return;
+	}
+#endif
+	compiler_barrier();
+	z_impl_k_thread_abort(thread);
+}
+
+
+extern void z_impl_k_thread_start(k_tid_t thread);
+
+__pinned_func
+static inline void k_thread_start(k_tid_t thread)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; k_tid_t val; } parm0 = { .val = thread };
+		(void) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_THREAD_START);
+		return;
+	}
+#endif
+	compiler_barrier();
+	z_impl_k_thread_start(thread);
+}
+
+
+extern k_ticks_t z_impl_k_thread_timeout_expires_ticks(const struct k_thread * thread);
+
+__pinned_func
+static inline k_ticks_t k_thread_timeout_expires_ticks(const struct k_thread * thread)
+{
+#ifdef CONFIG_USERSPACE
+	uint64_t ret64;
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct k_thread * val; } parm0 = { .val = thread };
+		(void) arch_syscall_invoke2(parm0.x, (uintptr_t)&ret64, K_SYSCALL_K_THREAD_TIMEOUT_EXPIRES_TICKS);
+		return (k_ticks_t) ret64;
+	}
+#endif
+	compiler_barrier();
+	return z_impl_k_thread_timeout_expires_ticks(thread);
+}
+
+
+extern k_ticks_t z_impl_k_thread_timeout_remaining_ticks(const struct k_thread * thread);
+
+__pinned_func
+static inline k_ticks_t k_thread_timeout_remaining_ticks(const struct k_thread * thread)
+{
+#ifdef CONFIG_USERSPACE
+	uint64_t ret64;
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct k_thread * val; } parm0 = { .val = thread };
+		(void) arch_syscall_invoke2(parm0.x, (uintptr_t)&ret64, K_SYSCALL_K_THREAD_TIMEOUT_REMAINING_TICKS);
+		return (k_ticks_t) ret64;
+	}
+#endif
+	compiler_barrier();
+	return z_impl_k_thread_timeout_remaining_ticks(thread);
+}
+
+
+extern int z_impl_k_thread_priority_get(k_tid_t thread);
+
+__pinned_func
+static inline int k_thread_priority_get(k_tid_t thread)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; k_tid_t val; } parm0 = { .val = thread };
+		return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_THREAD_PRIORITY_GET);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_k_thread_priority_get(thread);
+}
+
+
+extern void z_impl_k_thread_priority_set(k_tid_t thread, int prio);
+
+__pinned_func
+static inline void k_thread_priority_set(k_tid_t thread, int prio)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; k_tid_t val; } parm0 = { .val = thread };
+		union { uintptr_t x; int val; } parm1 = { .val = prio };
+		(void) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_K_THREAD_PRIORITY_SET);
+		return;
+	}
+#endif
+	compiler_barrier();
+	z_impl_k_thread_priority_set(thread, prio);
+}
+
+
+extern void z_impl_k_thread_deadline_set(k_tid_t thread, int deadline);
+
+__pinned_func
+static inline void k_thread_deadline_set(k_tid_t thread, int deadline)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; k_tid_t val; } parm0 = { .val = thread };
+		union { uintptr_t x; int val; } parm1 = { .val = deadline };
+		(void) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_K_THREAD_DEADLINE_SET);
+		return;
+	}
+#endif
+	compiler_barrier();
+	z_impl_k_thread_deadline_set(thread, deadline);
+}
+
+
+extern void z_impl_k_thread_suspend(k_tid_t thread);
+
+__pinned_func
+static inline void k_thread_suspend(k_tid_t thread)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; k_tid_t val; } parm0 = { .val = thread };
+		(void) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_THREAD_SUSPEND);
+		return;
+	}
+#endif
+	compiler_barrier();
+	z_impl_k_thread_suspend(thread);
+}
+
+
+extern void z_impl_k_thread_resume(k_tid_t thread);
+
+__pinned_func
+static inline void k_thread_resume(k_tid_t thread)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; k_tid_t val; } parm0 = { .val = thread };
+		(void) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_THREAD_RESUME);
+		return;
+	}
+#endif
+	compiler_barrier();
+	z_impl_k_thread_resume(thread);
+}
+
+
+extern int z_impl_k_is_preempt_thread(void);
+
+__pinned_func
+static inline int k_is_preempt_thread(void)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		return (int) arch_syscall_invoke0(K_SYSCALL_K_IS_PREEMPT_THREAD);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_k_is_preempt_thread();
+}
+
+
+extern void z_impl_k_thread_custom_data_set(void * value);
+
+__pinned_func
+static inline void k_thread_custom_data_set(void * value)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; void * val; } parm0 = { .val = value };
+		(void) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_THREAD_CUSTOM_DATA_SET);
+		return;
+	}
+#endif
+	compiler_barrier();
+	z_impl_k_thread_custom_data_set(value);
+}
+
+
+extern void * z_impl_k_thread_custom_data_get(void);
+
+__pinned_func
+static inline void * k_thread_custom_data_get(void)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		return (void *) arch_syscall_invoke0(K_SYSCALL_K_THREAD_CUSTOM_DATA_GET);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_k_thread_custom_data_get();
+}
+
+
+extern int z_impl_k_thread_name_set(k_tid_t thread, const char * str);
+
+__pinned_func
+static inline int k_thread_name_set(k_tid_t thread, const char * str)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; k_tid_t val; } parm0 = { .val = thread };
+		union { uintptr_t x; const char * val; } parm1 = { .val = str };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_K_THREAD_NAME_SET);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_k_thread_name_set(thread, str);
+}
+
+
+extern int z_impl_k_thread_name_copy(k_tid_t thread, char * buf, size_t size);
+
+__pinned_func
+static inline int k_thread_name_copy(k_tid_t thread, char * buf, size_t size)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; k_tid_t val; } parm0 = { .val = thread };
+		union { uintptr_t x; char * val; } parm1 = { .val = buf };
+		union { uintptr_t x; size_t val; } parm2 = { .val = size };
+		return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_K_THREAD_NAME_COPY);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_k_thread_name_copy(thread, buf, size);
+}
+
+
+extern void z_impl_k_timer_start(struct k_timer * timer, k_timeout_t duration, k_timeout_t period);
+
+__pinned_func
+static inline void k_timer_start(struct k_timer * timer, k_timeout_t duration, k_timeout_t period)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; struct k_timer * val; } parm0 = { .val = timer };
+		union { struct { uintptr_t lo, hi; } split; k_timeout_t val; } parm1 = { .val = duration };
+		union { struct { uintptr_t lo, hi; } split; k_timeout_t val; } parm2 = { .val = period };
+		(void) arch_syscall_invoke5(parm0.x, parm1.split.lo, parm1.split.hi, parm2.split.lo, parm2.split.hi, K_SYSCALL_K_TIMER_START);
+		return;
+	}
+#endif
+	compiler_barrier();
+	z_impl_k_timer_start(timer, duration, period);
+}
+
+
+extern void z_impl_k_timer_stop(struct k_timer * timer);
+
+__pinned_func
+static inline void k_timer_stop(struct k_timer * timer)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; struct k_timer * val; } parm0 = { .val = timer };
+		(void) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_TIMER_STOP);
+		return;
+	}
+#endif
+	compiler_barrier();
+	z_impl_k_timer_stop(timer);
+}
+
+
+extern uint32_t z_impl_k_timer_status_get(struct k_timer * timer);
+
+__pinned_func
+static inline uint32_t k_timer_status_get(struct k_timer * timer)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; struct k_timer * val; } parm0 = { .val = timer };
+		return (uint32_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_TIMER_STATUS_GET);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_k_timer_status_get(timer);
+}
+
+
+extern uint32_t z_impl_k_timer_status_sync(struct k_timer * timer);
+
+__pinned_func
+static inline uint32_t k_timer_status_sync(struct k_timer * timer)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; struct k_timer * val; } parm0 = { .val = timer };
+		return (uint32_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_TIMER_STATUS_SYNC);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_k_timer_status_sync(timer);
+}
+
+
+extern k_ticks_t z_impl_k_timer_expires_ticks(const struct k_timer * timer);
+
+__pinned_func
+static inline k_ticks_t k_timer_expires_ticks(const struct k_timer * timer)
+{
+#ifdef CONFIG_USERSPACE
+	uint64_t ret64;
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct k_timer * val; } parm0 = { .val = timer };
+		(void) arch_syscall_invoke2(parm0.x, (uintptr_t)&ret64, K_SYSCALL_K_TIMER_EXPIRES_TICKS);
+		return (k_ticks_t) ret64;
+	}
+#endif
+	compiler_barrier();
+	return z_impl_k_timer_expires_ticks(timer);
+}
+
+
+extern k_ticks_t z_impl_k_timer_remaining_ticks(const struct k_timer * timer);
+
+__pinned_func
+static inline k_ticks_t k_timer_remaining_ticks(const struct k_timer * timer)
+{
+#ifdef CONFIG_USERSPACE
+	uint64_t ret64;
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct k_timer * val; } parm0 = { .val = timer };
+		(void) arch_syscall_invoke2(parm0.x, (uintptr_t)&ret64, K_SYSCALL_K_TIMER_REMAINING_TICKS);
+		return (k_ticks_t) ret64;
+	}
+#endif
+	compiler_barrier();
+	return z_impl_k_timer_remaining_ticks(timer);
+}
+
+
+extern void z_impl_k_timer_user_data_set(struct k_timer * timer, void * user_data);
+
+__pinned_func
+static inline void k_timer_user_data_set(struct k_timer * timer, void * user_data)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; struct k_timer * val; } parm0 = { .val = timer };
+		union { uintptr_t x; void * val; } parm1 = { .val = user_data };
+		(void) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_K_TIMER_USER_DATA_SET);
+		return;
+	}
+#endif
+	compiler_barrier();
+	z_impl_k_timer_user_data_set(timer, user_data);
+}
+
+
+extern void * z_impl_k_timer_user_data_get(const struct k_timer * timer);
+
+__pinned_func
+static inline void * k_timer_user_data_get(const struct k_timer * timer)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct k_timer * val; } parm0 = { .val = timer };
+		return (void *) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_TIMER_USER_DATA_GET);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_k_timer_user_data_get(timer);
+}
+
+
+extern int64_t z_impl_k_uptime_ticks(void);
+
+__pinned_func
+static inline int64_t k_uptime_ticks(void)
+{
+#ifdef CONFIG_USERSPACE
+	uint64_t ret64;
+	if (z_syscall_trap()) {
+		(void) arch_syscall_invoke1((uintptr_t)&ret64, K_SYSCALL_K_UPTIME_TICKS);
+		return (int64_t) ret64;
+	}
+#endif
+	compiler_barrier();
+	return z_impl_k_uptime_ticks();
+}
+
+
+extern void z_impl_k_queue_init(struct k_queue * queue);
+
+__pinned_func
+static inline void k_queue_init(struct k_queue * queue)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; struct k_queue * val; } parm0 = { .val = queue };
+		(void) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_QUEUE_INIT);
+		return;
+	}
+#endif
+	compiler_barrier();
+	z_impl_k_queue_init(queue);
+}
+
+
+extern void z_impl_k_queue_cancel_wait(struct k_queue * queue);
+
+__pinned_func
+static inline void k_queue_cancel_wait(struct k_queue * queue)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; struct k_queue * val; } parm0 = { .val = queue };
+		(void) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_QUEUE_CANCEL_WAIT);
+		return;
+	}
+#endif
+	compiler_barrier();
+	z_impl_k_queue_cancel_wait(queue);
+}
+
+
+extern int32_t z_impl_k_queue_alloc_append(struct k_queue * queue, void * data);
+
+__pinned_func
+static inline int32_t k_queue_alloc_append(struct k_queue * queue, void * data)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; struct k_queue * val; } parm0 = { .val = queue };
+		union { uintptr_t x; void * val; } parm1 = { .val = data };
+		return (int32_t) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_K_QUEUE_ALLOC_APPEND);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_k_queue_alloc_append(queue, data);
+}
+
+
+extern int32_t z_impl_k_queue_alloc_prepend(struct k_queue * queue, void * data);
+
+__pinned_func
+static inline int32_t k_queue_alloc_prepend(struct k_queue * queue, void * data)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; struct k_queue * val; } parm0 = { .val = queue };
+		union { uintptr_t x; void * val; } parm1 = { .val = data };
+		return (int32_t) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_K_QUEUE_ALLOC_PREPEND);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_k_queue_alloc_prepend(queue, data);
+}
+
+
+extern void * z_impl_k_queue_get(struct k_queue * queue, k_timeout_t timeout);
+
+__pinned_func
+static inline void * k_queue_get(struct k_queue * queue, k_timeout_t timeout)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; struct k_queue * val; } parm0 = { .val = queue };
+		union { struct { uintptr_t lo, hi; } split; k_timeout_t val; } parm1 = { .val = timeout };
+		return (void *) arch_syscall_invoke3(parm0.x, parm1.split.lo, parm1.split.hi, K_SYSCALL_K_QUEUE_GET);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_k_queue_get(queue, timeout);
+}
+
+
+extern int z_impl_k_queue_is_empty(struct k_queue * queue);
+
+__pinned_func
+static inline int k_queue_is_empty(struct k_queue * queue)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; struct k_queue * val; } parm0 = { .val = queue };
+		return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_QUEUE_IS_EMPTY);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_k_queue_is_empty(queue);
+}
+
+
+extern void * z_impl_k_queue_peek_head(struct k_queue * queue);
+
+__pinned_func
+static inline void * k_queue_peek_head(struct k_queue * queue)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; struct k_queue * val; } parm0 = { .val = queue };
+		return (void *) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_QUEUE_PEEK_HEAD);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_k_queue_peek_head(queue);
+}
+
+
+extern void * z_impl_k_queue_peek_tail(struct k_queue * queue);
+
+__pinned_func
+static inline void * k_queue_peek_tail(struct k_queue * queue)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; struct k_queue * val; } parm0 = { .val = queue };
+		return (void *) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_QUEUE_PEEK_TAIL);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_k_queue_peek_tail(queue);
+}
+
+
+extern int z_impl_k_futex_wait(struct k_futex * futex, int expected, k_timeout_t timeout);
+
+__pinned_func
+static inline int k_futex_wait(struct k_futex * futex, int expected, k_timeout_t timeout)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; struct k_futex * val; } parm0 = { .val = futex };
+		union { uintptr_t x; int val; } parm1 = { .val = expected };
+		union { struct { uintptr_t lo, hi; } split; k_timeout_t val; } parm2 = { .val = timeout };
+		return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.split.lo, parm2.split.hi, K_SYSCALL_K_FUTEX_WAIT);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_k_futex_wait(futex, expected, timeout);
+}
+
+
+extern int z_impl_k_futex_wake(struct k_futex * futex, bool wake_all);
+
+__pinned_func
+static inline int k_futex_wake(struct k_futex * futex, bool wake_all)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; struct k_futex * val; } parm0 = { .val = futex };
+		union { uintptr_t x; bool val; } parm1 = { .val = wake_all };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_K_FUTEX_WAKE);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_k_futex_wake(futex, wake_all);
+}
+
+
+extern void z_impl_k_event_init(struct k_event * event);
+
+__pinned_func
+static inline void k_event_init(struct k_event * event)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; struct k_event * val; } parm0 = { .val = event };
+		(void) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_EVENT_INIT);
+		return;
+	}
+#endif
+	compiler_barrier();
+	z_impl_k_event_init(event);
+}
+
+
+extern uint32_t z_impl_k_event_post(struct k_event * event, uint32_t events);
+
+__pinned_func
+static inline uint32_t k_event_post(struct k_event * event, uint32_t events)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; struct k_event * val; } parm0 = { .val = event };
+		union { uintptr_t x; uint32_t val; } parm1 = { .val = events };
+		return (uint32_t) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_K_EVENT_POST);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_k_event_post(event, events);
+}
+
+
+extern uint32_t z_impl_k_event_set(struct k_event * event, uint32_t events);
+
+__pinned_func
+static inline uint32_t k_event_set(struct k_event * event, uint32_t events)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; struct k_event * val; } parm0 = { .val = event };
+		union { uintptr_t x; uint32_t val; } parm1 = { .val = events };
+		return (uint32_t) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_K_EVENT_SET);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_k_event_set(event, events);
+}
+
+
+extern uint32_t z_impl_k_event_set_masked(struct k_event * event, uint32_t events, uint32_t events_mask);
+
+__pinned_func
+static inline uint32_t k_event_set_masked(struct k_event * event, uint32_t events, uint32_t events_mask)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; struct k_event * val; } parm0 = { .val = event };
+		union { uintptr_t x; uint32_t val; } parm1 = { .val = events };
+		union { uintptr_t x; uint32_t val; } parm2 = { .val = events_mask };
+		return (uint32_t) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_K_EVENT_SET_MASKED);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_k_event_set_masked(event, events, events_mask);
+}
+
+
+extern uint32_t z_impl_k_event_clear(struct k_event * event, uint32_t events);
+
+__pinned_func
+static inline uint32_t k_event_clear(struct k_event * event, uint32_t events)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; struct k_event * val; } parm0 = { .val = event };
+		union { uintptr_t x; uint32_t val; } parm1 = { .val = events };
+		return (uint32_t) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_K_EVENT_CLEAR);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_k_event_clear(event, events);
+}
+
+
+extern uint32_t z_impl_k_event_wait(struct k_event * event, uint32_t events, bool reset, k_timeout_t timeout);
+
+__pinned_func
+static inline uint32_t k_event_wait(struct k_event * event, uint32_t events, bool reset, k_timeout_t timeout)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; struct k_event * val; } parm0 = { .val = event };
+		union { uintptr_t x; uint32_t val; } parm1 = { .val = events };
+		union { uintptr_t x; bool val; } parm2 = { .val = reset };
+		union { struct { uintptr_t lo, hi; } split; k_timeout_t val; } parm3 = { .val = timeout };
+		return (uint32_t) arch_syscall_invoke5(parm0.x, parm1.x, parm2.x, parm3.split.lo, parm3.split.hi, K_SYSCALL_K_EVENT_WAIT);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_k_event_wait(event, events, reset, timeout);
+}
+
+
+extern uint32_t z_impl_k_event_wait_all(struct k_event * event, uint32_t events, bool reset, k_timeout_t timeout);
+
+__pinned_func
+static inline uint32_t k_event_wait_all(struct k_event * event, uint32_t events, bool reset, k_timeout_t timeout)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; struct k_event * val; } parm0 = { .val = event };
+		union { uintptr_t x; uint32_t val; } parm1 = { .val = events };
+		union { uintptr_t x; bool val; } parm2 = { .val = reset };
+		union { struct { uintptr_t lo, hi; } split; k_timeout_t val; } parm3 = { .val = timeout };
+		return (uint32_t) arch_syscall_invoke5(parm0.x, parm1.x, parm2.x, parm3.split.lo, parm3.split.hi, K_SYSCALL_K_EVENT_WAIT_ALL);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_k_event_wait_all(event, events, reset, timeout);
+}
+
+
+extern int32_t z_impl_k_stack_alloc_init(struct k_stack * stack, uint32_t num_entries);
+
+__pinned_func
+static inline int32_t k_stack_alloc_init(struct k_stack * stack, uint32_t num_entries)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; struct k_stack * val; } parm0 = { .val = stack };
+		union { uintptr_t x; uint32_t val; } parm1 = { .val = num_entries };
+		return (int32_t) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_K_STACK_ALLOC_INIT);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_k_stack_alloc_init(stack, num_entries);
+}
+
+
+extern int z_impl_k_stack_push(struct k_stack * stack, stack_data_t data);
+
+__pinned_func
+static inline int k_stack_push(struct k_stack * stack, stack_data_t data)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; struct k_stack * val; } parm0 = { .val = stack };
+		union { uintptr_t x; stack_data_t val; } parm1 = { .val = data };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_K_STACK_PUSH);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_k_stack_push(stack, data);
+}
+
+
+extern int z_impl_k_stack_pop(struct k_stack * stack, stack_data_t * data, k_timeout_t timeout);
+
+__pinned_func
+static inline int k_stack_pop(struct k_stack * stack, stack_data_t * data, k_timeout_t timeout)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; struct k_stack * val; } parm0 = { .val = stack };
+		union { uintptr_t x; stack_data_t * val; } parm1 = { .val = data };
+		union { struct { uintptr_t lo, hi; } split; k_timeout_t val; } parm2 = { .val = timeout };
+		return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.split.lo, parm2.split.hi, K_SYSCALL_K_STACK_POP);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_k_stack_pop(stack, data, timeout);
+}
+
+
+extern int z_impl_k_mutex_init(struct k_mutex * mutex);
+
+__pinned_func
+static inline int k_mutex_init(struct k_mutex * mutex)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; struct k_mutex * val; } parm0 = { .val = mutex };
+		return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_MUTEX_INIT);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_k_mutex_init(mutex);
+}
+
+
+extern int z_impl_k_mutex_lock(struct k_mutex * mutex, k_timeout_t timeout);
+
+__pinned_func
+static inline int k_mutex_lock(struct k_mutex * mutex, k_timeout_t timeout)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; struct k_mutex * val; } parm0 = { .val = mutex };
+		union { struct { uintptr_t lo, hi; } split; k_timeout_t val; } parm1 = { .val = timeout };
+		return (int) arch_syscall_invoke3(parm0.x, parm1.split.lo, parm1.split.hi, K_SYSCALL_K_MUTEX_LOCK);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_k_mutex_lock(mutex, timeout);
+}
+
+
+extern int z_impl_k_mutex_unlock(struct k_mutex * mutex);
+
+__pinned_func
+static inline int k_mutex_unlock(struct k_mutex * mutex)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; struct k_mutex * val; } parm0 = { .val = mutex };
+		return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_MUTEX_UNLOCK);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_k_mutex_unlock(mutex);
+}
+
+
+extern int z_impl_k_condvar_init(struct k_condvar * condvar);
+
+__pinned_func
+static inline int k_condvar_init(struct k_condvar * condvar)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; struct k_condvar * val; } parm0 = { .val = condvar };
+		return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_CONDVAR_INIT);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_k_condvar_init(condvar);
+}
+
+
+extern int z_impl_k_condvar_signal(struct k_condvar * condvar);
+
+__pinned_func
+static inline int k_condvar_signal(struct k_condvar * condvar)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; struct k_condvar * val; } parm0 = { .val = condvar };
+		return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_CONDVAR_SIGNAL);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_k_condvar_signal(condvar);
+}
+
+
+extern int z_impl_k_condvar_broadcast(struct k_condvar * condvar);
+
+__pinned_func
+static inline int k_condvar_broadcast(struct k_condvar * condvar)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; struct k_condvar * val; } parm0 = { .val = condvar };
+		return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_CONDVAR_BROADCAST);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_k_condvar_broadcast(condvar);
+}
+
+
+extern int z_impl_k_condvar_wait(struct k_condvar * condvar, struct k_mutex * mutex, k_timeout_t timeout);
+
+__pinned_func
+static inline int k_condvar_wait(struct k_condvar * condvar, struct k_mutex * mutex, k_timeout_t timeout)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; struct k_condvar * val; } parm0 = { .val = condvar };
+		union { uintptr_t x; struct k_mutex * val; } parm1 = { .val = mutex };
+		union { struct { uintptr_t lo, hi; } split; k_timeout_t val; } parm2 = { .val = timeout };
+		return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.split.lo, parm2.split.hi, K_SYSCALL_K_CONDVAR_WAIT);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_k_condvar_wait(condvar, mutex, timeout);
+}
+
+
+extern int z_impl_k_sem_init(struct k_sem * sem, unsigned int initial_count, unsigned int limit);
+
+__pinned_func
+static inline int k_sem_init(struct k_sem * sem, unsigned int initial_count, unsigned int limit)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; struct k_sem * val; } parm0 = { .val = sem };
+		union { uintptr_t x; unsigned int val; } parm1 = { .val = initial_count };
+		union { uintptr_t x; unsigned int val; } parm2 = { .val = limit };
+		return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_K_SEM_INIT);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_k_sem_init(sem, initial_count, limit);
+}
+
+
+extern int z_impl_k_sem_take(struct k_sem * sem, k_timeout_t timeout);
+
+__pinned_func
+static inline int k_sem_take(struct k_sem * sem, k_timeout_t timeout)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; struct k_sem * val; } parm0 = { .val = sem };
+		union { struct { uintptr_t lo, hi; } split; k_timeout_t val; } parm1 = { .val = timeout };
+		return (int) arch_syscall_invoke3(parm0.x, parm1.split.lo, parm1.split.hi, K_SYSCALL_K_SEM_TAKE);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_k_sem_take(sem, timeout);
+}
+
+
+extern void z_impl_k_sem_give(struct k_sem * sem);
+
+__pinned_func
+static inline void k_sem_give(struct k_sem * sem)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; struct k_sem * val; } parm0 = { .val = sem };
+		(void) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_SEM_GIVE);
+		return;
+	}
+#endif
+	compiler_barrier();
+	z_impl_k_sem_give(sem);
+}
+
+
+extern void z_impl_k_sem_reset(struct k_sem * sem);
+
+__pinned_func
+static inline void k_sem_reset(struct k_sem * sem)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; struct k_sem * val; } parm0 = { .val = sem };
+		(void) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_SEM_RESET);
+		return;
+	}
+#endif
+	compiler_barrier();
+	z_impl_k_sem_reset(sem);
+}
+
+
+extern unsigned int z_impl_k_sem_count_get(struct k_sem * sem);
+
+__pinned_func
+static inline unsigned int k_sem_count_get(struct k_sem * sem)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; struct k_sem * val; } parm0 = { .val = sem };
+		return (unsigned int) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_SEM_COUNT_GET);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_k_sem_count_get(sem);
+}
+
+
+extern int z_impl_k_msgq_alloc_init(struct k_msgq * msgq, size_t msg_size, uint32_t max_msgs);
+
+__pinned_func
+static inline int k_msgq_alloc_init(struct k_msgq * msgq, size_t msg_size, uint32_t max_msgs)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; struct k_msgq * val; } parm0 = { .val = msgq };
+		union { uintptr_t x; size_t val; } parm1 = { .val = msg_size };
+		union { uintptr_t x; uint32_t val; } parm2 = { .val = max_msgs };
+		return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_K_MSGQ_ALLOC_INIT);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_k_msgq_alloc_init(msgq, msg_size, max_msgs);
+}
+
+
+extern int z_impl_k_msgq_put(struct k_msgq * msgq, const void * data, k_timeout_t timeout);
+
+__pinned_func
+static inline int k_msgq_put(struct k_msgq * msgq, const void * data, k_timeout_t timeout)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; struct k_msgq * val; } parm0 = { .val = msgq };
+		union { uintptr_t x; const void * val; } parm1 = { .val = data };
+		union { struct { uintptr_t lo, hi; } split; k_timeout_t val; } parm2 = { .val = timeout };
+		return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.split.lo, parm2.split.hi, K_SYSCALL_K_MSGQ_PUT);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_k_msgq_put(msgq, data, timeout);
+}
+
+
+extern int z_impl_k_msgq_get(struct k_msgq * msgq, void * data, k_timeout_t timeout);
+
+__pinned_func
+static inline int k_msgq_get(struct k_msgq * msgq, void * data, k_timeout_t timeout)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; struct k_msgq * val; } parm0 = { .val = msgq };
+		union { uintptr_t x; void * val; } parm1 = { .val = data };
+		union { struct { uintptr_t lo, hi; } split; k_timeout_t val; } parm2 = { .val = timeout };
+		return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.split.lo, parm2.split.hi, K_SYSCALL_K_MSGQ_GET);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_k_msgq_get(msgq, data, timeout);
+}
+
+
+extern int z_impl_k_msgq_peek(struct k_msgq * msgq, void * data);
+
+__pinned_func
+static inline int k_msgq_peek(struct k_msgq * msgq, void * data)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; struct k_msgq * val; } parm0 = { .val = msgq };
+		union { uintptr_t x; void * val; } parm1 = { .val = data };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_K_MSGQ_PEEK);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_k_msgq_peek(msgq, data);
+}
+
+
+extern int z_impl_k_msgq_peek_at(struct k_msgq * msgq, void * data, uint32_t idx);
+
+__pinned_func
+static inline int k_msgq_peek_at(struct k_msgq * msgq, void * data, uint32_t idx)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; struct k_msgq * val; } parm0 = { .val = msgq };
+		union { uintptr_t x; void * val; } parm1 = { .val = data };
+		union { uintptr_t x; uint32_t val; } parm2 = { .val = idx };
+		return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_K_MSGQ_PEEK_AT);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_k_msgq_peek_at(msgq, data, idx);
+}
+
+
+extern void z_impl_k_msgq_purge(struct k_msgq * msgq);
+
+__pinned_func
+static inline void k_msgq_purge(struct k_msgq * msgq)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; struct k_msgq * val; } parm0 = { .val = msgq };
+		(void) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_MSGQ_PURGE);
+		return;
+	}
+#endif
+	compiler_barrier();
+	z_impl_k_msgq_purge(msgq);
+}
+
+
+extern uint32_t z_impl_k_msgq_num_free_get(struct k_msgq * msgq);
+
+__pinned_func
+static inline uint32_t k_msgq_num_free_get(struct k_msgq * msgq)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; struct k_msgq * val; } parm0 = { .val = msgq };
+		return (uint32_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_MSGQ_NUM_FREE_GET);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_k_msgq_num_free_get(msgq);
+}
+
+
+extern void z_impl_k_msgq_get_attrs(struct k_msgq * msgq, struct k_msgq_attrs * attrs);
+
+__pinned_func
+static inline void k_msgq_get_attrs(struct k_msgq * msgq, struct k_msgq_attrs * attrs)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; struct k_msgq * val; } parm0 = { .val = msgq };
+		union { uintptr_t x; struct k_msgq_attrs * val; } parm1 = { .val = attrs };
+		(void) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_K_MSGQ_GET_ATTRS);
+		return;
+	}
+#endif
+	compiler_barrier();
+	z_impl_k_msgq_get_attrs(msgq, attrs);
+}
+
+
+extern uint32_t z_impl_k_msgq_num_used_get(struct k_msgq * msgq);
+
+__pinned_func
+static inline uint32_t k_msgq_num_used_get(struct k_msgq * msgq)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; struct k_msgq * val; } parm0 = { .val = msgq };
+		return (uint32_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_MSGQ_NUM_USED_GET);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_k_msgq_num_used_get(msgq);
+}
+
+
+extern int z_impl_k_pipe_alloc_init(struct k_pipe * pipe, size_t size);
+
+__pinned_func
+static inline int k_pipe_alloc_init(struct k_pipe * pipe, size_t size)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; struct k_pipe * val; } parm0 = { .val = pipe };
+		union { uintptr_t x; size_t val; } parm1 = { .val = size };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_K_PIPE_ALLOC_INIT);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_k_pipe_alloc_init(pipe, size);
+}
+
+
+extern int z_impl_k_pipe_put(struct k_pipe * pipe, const void * data, size_t bytes_to_write, size_t * bytes_written, size_t min_xfer, k_timeout_t timeout);
+
+__pinned_func
+static inline int k_pipe_put(struct k_pipe * pipe, const void * data, size_t bytes_to_write, size_t * bytes_written, size_t min_xfer, k_timeout_t timeout)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; struct k_pipe * val; } parm0 = { .val = pipe };
+		union { uintptr_t x; const void * val; } parm1 = { .val = data };
+		union { uintptr_t x; size_t val; } parm2 = { .val = bytes_to_write };
+		union { uintptr_t x; size_t * val; } parm3 = { .val = bytes_written };
+		union { uintptr_t x; size_t val; } parm4 = { .val = min_xfer };
+		union { struct { uintptr_t lo, hi; } split; k_timeout_t val; } parm5 = { .val = timeout };
+		uintptr_t more[] = {
+			parm5.split.lo,
+			parm5.split.hi
+		};
+		return (int) arch_syscall_invoke6(parm0.x, parm1.x, parm2.x, parm3.x, parm4.x, (uintptr_t) &more, K_SYSCALL_K_PIPE_PUT);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_k_pipe_put(pipe, data, bytes_to_write, bytes_written, min_xfer, timeout);
+}
+
+
+extern int z_impl_k_pipe_get(struct k_pipe * pipe, void * data, size_t bytes_to_read, size_t * bytes_read, size_t min_xfer, k_timeout_t timeout);
+
+__pinned_func
+static inline int k_pipe_get(struct k_pipe * pipe, void * data, size_t bytes_to_read, size_t * bytes_read, size_t min_xfer, k_timeout_t timeout)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; struct k_pipe * val; } parm0 = { .val = pipe };
+		union { uintptr_t x; void * val; } parm1 = { .val = data };
+		union { uintptr_t x; size_t val; } parm2 = { .val = bytes_to_read };
+		union { uintptr_t x; size_t * val; } parm3 = { .val = bytes_read };
+		union { uintptr_t x; size_t val; } parm4 = { .val = min_xfer };
+		union { struct { uintptr_t lo, hi; } split; k_timeout_t val; } parm5 = { .val = timeout };
+		uintptr_t more[] = {
+			parm5.split.lo,
+			parm5.split.hi
+		};
+		return (int) arch_syscall_invoke6(parm0.x, parm1.x, parm2.x, parm3.x, parm4.x, (uintptr_t) &more, K_SYSCALL_K_PIPE_GET);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_k_pipe_get(pipe, data, bytes_to_read, bytes_read, min_xfer, timeout);
+}
+
+
+extern size_t z_impl_k_pipe_read_avail(struct k_pipe * pipe);
+
+__pinned_func
+static inline size_t k_pipe_read_avail(struct k_pipe * pipe)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; struct k_pipe * val; } parm0 = { .val = pipe };
+		return (size_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_PIPE_READ_AVAIL);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_k_pipe_read_avail(pipe);
+}
+
+
+extern size_t z_impl_k_pipe_write_avail(struct k_pipe * pipe);
+
+__pinned_func
+static inline size_t k_pipe_write_avail(struct k_pipe * pipe)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; struct k_pipe * val; } parm0 = { .val = pipe };
+		return (size_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_PIPE_WRITE_AVAIL);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_k_pipe_write_avail(pipe);
+}
+
+
+extern void z_impl_k_pipe_flush(struct k_pipe * pipe);
+
+__pinned_func
+static inline void k_pipe_flush(struct k_pipe * pipe)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; struct k_pipe * val; } parm0 = { .val = pipe };
+		(void) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_PIPE_FLUSH);
+		return;
+	}
+#endif
+	compiler_barrier();
+	z_impl_k_pipe_flush(pipe);
+}
+
+
+extern void z_impl_k_pipe_buffer_flush(struct k_pipe * pipe);
+
+__pinned_func
+static inline void k_pipe_buffer_flush(struct k_pipe * pipe)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; struct k_pipe * val; } parm0 = { .val = pipe };
+		(void) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_PIPE_BUFFER_FLUSH);
+		return;
+	}
+#endif
+	compiler_barrier();
+	z_impl_k_pipe_buffer_flush(pipe);
+}
+
+
+extern int z_impl_k_poll(struct k_poll_event * events, int num_events, k_timeout_t timeout);
+
+__pinned_func
+static inline int k_poll(struct k_poll_event * events, int num_events, k_timeout_t timeout)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; struct k_poll_event * val; } parm0 = { .val = events };
+		union { uintptr_t x; int val; } parm1 = { .val = num_events };
+		union { struct { uintptr_t lo, hi; } split; k_timeout_t val; } parm2 = { .val = timeout };
+		return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.split.lo, parm2.split.hi, K_SYSCALL_K_POLL);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_k_poll(events, num_events, timeout);
+}
+
+
+extern void z_impl_k_poll_signal_init(struct k_poll_signal * sig);
+
+__pinned_func
+static inline void k_poll_signal_init(struct k_poll_signal * sig)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; struct k_poll_signal * val; } parm0 = { .val = sig };
+		(void) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_POLL_SIGNAL_INIT);
+		return;
+	}
+#endif
+	compiler_barrier();
+	z_impl_k_poll_signal_init(sig);
+}
+
+
+extern void z_impl_k_poll_signal_reset(struct k_poll_signal * sig);
+
+__pinned_func
+static inline void k_poll_signal_reset(struct k_poll_signal * sig)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; struct k_poll_signal * val; } parm0 = { .val = sig };
+		(void) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_POLL_SIGNAL_RESET);
+		return;
+	}
+#endif
+	compiler_barrier();
+	z_impl_k_poll_signal_reset(sig);
+}
+
+
+extern void z_impl_k_poll_signal_check(struct k_poll_signal * sig, unsigned int * signaled, int * result);
+
+__pinned_func
+static inline void k_poll_signal_check(struct k_poll_signal * sig, unsigned int * signaled, int * result)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; struct k_poll_signal * val; } parm0 = { .val = sig };
+		union { uintptr_t x; unsigned int * val; } parm1 = { .val = signaled };
+		union { uintptr_t x; int * val; } parm2 = { .val = result };
+		(void) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_K_POLL_SIGNAL_CHECK);
+		return;
+	}
+#endif
+	compiler_barrier();
+	z_impl_k_poll_signal_check(sig, signaled, result);
+}
+
+
+extern int z_impl_k_poll_signal_raise(struct k_poll_signal * sig, int result);
+
+__pinned_func
+static inline int k_poll_signal_raise(struct k_poll_signal * sig, int result)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; struct k_poll_signal * val; } parm0 = { .val = sig };
+		union { uintptr_t x; int val; } parm1 = { .val = result };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_K_POLL_SIGNAL_RAISE);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_k_poll_signal_raise(sig, result);
+}
+
+
+extern void z_impl_k_str_out(char * c, size_t n);
+
+__pinned_func
+static inline void k_str_out(char * c, size_t n)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; char * val; } parm0 = { .val = c };
+		union { uintptr_t x; size_t val; } parm1 = { .val = n };
+		(void) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_K_STR_OUT);
+		return;
+	}
+#endif
+	compiler_barrier();
+	z_impl_k_str_out(c, n);
+}
+
+
+extern int z_impl_k_float_disable(struct k_thread * thread);
+
+__pinned_func
+static inline int k_float_disable(struct k_thread * thread)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; struct k_thread * val; } parm0 = { .val = thread };
+		return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_FLOAT_DISABLE);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_k_float_disable(thread);
+}
+
+
+extern int z_impl_k_float_enable(struct k_thread * thread, unsigned int options);
+
+__pinned_func
+static inline int k_float_enable(struct k_thread * thread, unsigned int options)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; struct k_thread * val; } parm0 = { .val = thread };
+		union { uintptr_t x; unsigned int val; } parm1 = { .val = options };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_K_FLOAT_ENABLE);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_k_float_enable(thread, options);
+}
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif /* include guard */
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/kobject.h b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/kobject.h
new file mode 100644
index 0000000..6de4eac
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/kobject.h
@@ -0,0 +1,124 @@
+/* auto-generated by gen_syscalls.py, don't edit */
+
+#ifndef Z_INCLUDE_SYSCALLS_KOBJECT_H
+#define Z_INCLUDE_SYSCALLS_KOBJECT_H
+
+
+#include <zephyr/tracing/tracing_syscall.h>
+
+#ifndef _ASMLANGUAGE
+
+#include <stdarg.h>
+
+#include <syscall_list.h>
+#include <zephyr/syscall.h>
+
+#include <zephyr/linker/sections.h>
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern void z_impl_k_object_access_grant(const void * object, struct k_thread * thread);
+
+__pinned_func
+static inline void k_object_access_grant(const void * object, struct k_thread * thread)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const void * val; } parm0 = { .val = object };
+		union { uintptr_t x; struct k_thread * val; } parm1 = { .val = thread };
+		(void) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_K_OBJECT_ACCESS_GRANT);
+		return;
+	}
+#endif
+	compiler_barrier();
+	z_impl_k_object_access_grant(object, thread);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define k_object_access_grant(object, thread) do { 	sys_port_trace_syscall_enter(K_SYSCALL_K_OBJECT_ACCESS_GRANT, k_object_access_grant, object, thread); 	k_object_access_grant(object, thread); 	sys_port_trace_syscall_exit(K_SYSCALL_K_OBJECT_ACCESS_GRANT, k_object_access_grant, object, thread); } while(false)
+#endif
+#endif
+
+
+extern void z_impl_k_object_release(const void * object);
+
+__pinned_func
+static inline void k_object_release(const void * object)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const void * val; } parm0 = { .val = object };
+		(void) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_OBJECT_RELEASE);
+		return;
+	}
+#endif
+	compiler_barrier();
+	z_impl_k_object_release(object);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define k_object_release(object) do { 	sys_port_trace_syscall_enter(K_SYSCALL_K_OBJECT_RELEASE, k_object_release, object); 	k_object_release(object); 	sys_port_trace_syscall_exit(K_SYSCALL_K_OBJECT_RELEASE, k_object_release, object); } while(false)
+#endif
+#endif
+
+
+extern void * z_impl_k_object_alloc(enum k_objects otype);
+
+__pinned_func
+static inline void * k_object_alloc(enum k_objects otype)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; enum k_objects val; } parm0 = { .val = otype };
+		return (void *) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_OBJECT_ALLOC);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_k_object_alloc(otype);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define k_object_alloc(otype) ({ 	void * syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_K_OBJECT_ALLOC, k_object_alloc, otype); 	syscall__retval = k_object_alloc(otype); 	sys_port_trace_syscall_exit(K_SYSCALL_K_OBJECT_ALLOC, k_object_alloc, otype, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern void * z_impl_k_object_alloc_size(enum k_objects otype, size_t size);
+
+__pinned_func
+static inline void * k_object_alloc_size(enum k_objects otype, size_t size)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; enum k_objects val; } parm0 = { .val = otype };
+		union { uintptr_t x; size_t val; } parm1 = { .val = size };
+		return (void *) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_K_OBJECT_ALLOC_SIZE);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_k_object_alloc_size(otype, size);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define k_object_alloc_size(otype, size) ({ 	void * syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_K_OBJECT_ALLOC_SIZE, k_object_alloc_size, otype, size); 	syscall__retval = k_object_alloc_size(otype, size); 	sys_port_trace_syscall_exit(K_SYSCALL_K_OBJECT_ALLOC_SIZE, k_object_alloc_size, otype, size, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif /* include guard */
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/kscan.h b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/kscan.h
new file mode 100644
index 0000000..4077382
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/kscan.h
@@ -0,0 +1,98 @@
+/* auto-generated by gen_syscalls.py, don't edit */
+
+#ifndef Z_INCLUDE_SYSCALLS_KSCAN_H
+#define Z_INCLUDE_SYSCALLS_KSCAN_H
+
+
+#include <zephyr/tracing/tracing_syscall.h>
+
+#ifndef _ASMLANGUAGE
+
+#include <stdarg.h>
+
+#include <syscall_list.h>
+#include <zephyr/syscall.h>
+
+#include <zephyr/linker/sections.h>
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern int z_impl_kscan_config(const struct device * dev, kscan_callback_t callback);
+
+__pinned_func
+static inline int kscan_config(const struct device * dev, kscan_callback_t callback)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; kscan_callback_t val; } parm1 = { .val = callback };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_KSCAN_CONFIG);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_kscan_config(dev, callback);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define kscan_config(dev, callback) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_KSCAN_CONFIG, kscan_config, dev, callback); 	syscall__retval = kscan_config(dev, callback); 	sys_port_trace_syscall_exit(K_SYSCALL_KSCAN_CONFIG, kscan_config, dev, callback, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_kscan_enable_callback(const struct device * dev);
+
+__pinned_func
+static inline int kscan_enable_callback(const struct device * dev)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_KSCAN_ENABLE_CALLBACK);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_kscan_enable_callback(dev);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define kscan_enable_callback(dev) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_KSCAN_ENABLE_CALLBACK, kscan_enable_callback, dev); 	syscall__retval = kscan_enable_callback(dev); 	sys_port_trace_syscall_exit(K_SYSCALL_KSCAN_ENABLE_CALLBACK, kscan_enable_callback, dev, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_kscan_disable_callback(const struct device * dev);
+
+__pinned_func
+static inline int kscan_disable_callback(const struct device * dev)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_KSCAN_DISABLE_CALLBACK);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_kscan_disable_callback(dev);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define kscan_disable_callback(dev) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_KSCAN_DISABLE_CALLBACK, kscan_disable_callback, dev); 	syscall__retval = kscan_disable_callback(dev); 	sys_port_trace_syscall_exit(K_SYSCALL_KSCAN_DISABLE_CALLBACK, kscan_disable_callback, dev, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif /* include guard */
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/led.h b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/led.h
new file mode 100644
index 0000000..4eef880
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/led.h
@@ -0,0 +1,229 @@
+/* auto-generated by gen_syscalls.py, don't edit */
+
+#ifndef Z_INCLUDE_SYSCALLS_LED_H
+#define Z_INCLUDE_SYSCALLS_LED_H
+
+
+#include <zephyr/tracing/tracing_syscall.h>
+
+#ifndef _ASMLANGUAGE
+
+#include <stdarg.h>
+
+#include <syscall_list.h>
+#include <zephyr/syscall.h>
+
+#include <zephyr/linker/sections.h>
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern int z_impl_led_blink(const struct device * dev, uint32_t led, uint32_t delay_on, uint32_t delay_off);
+
+__pinned_func
+static inline int led_blink(const struct device * dev, uint32_t led, uint32_t delay_on, uint32_t delay_off)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uint32_t val; } parm1 = { .val = led };
+		union { uintptr_t x; uint32_t val; } parm2 = { .val = delay_on };
+		union { uintptr_t x; uint32_t val; } parm3 = { .val = delay_off };
+		return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_LED_BLINK);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_led_blink(dev, led, delay_on, delay_off);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define led_blink(dev, led, delay_on, delay_off) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_LED_BLINK, led_blink, dev, led, delay_on, delay_off); 	syscall__retval = led_blink(dev, led, delay_on, delay_off); 	sys_port_trace_syscall_exit(K_SYSCALL_LED_BLINK, led_blink, dev, led, delay_on, delay_off, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_led_get_info(const struct device * dev, uint32_t led, const struct led_info ** info);
+
+__pinned_func
+static inline int led_get_info(const struct device * dev, uint32_t led, const struct led_info ** info)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uint32_t val; } parm1 = { .val = led };
+		union { uintptr_t x; const struct led_info ** val; } parm2 = { .val = info };
+		return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_LED_GET_INFO);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_led_get_info(dev, led, info);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define led_get_info(dev, led, info) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_LED_GET_INFO, led_get_info, dev, led, info); 	syscall__retval = led_get_info(dev, led, info); 	sys_port_trace_syscall_exit(K_SYSCALL_LED_GET_INFO, led_get_info, dev, led, info, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_led_set_brightness(const struct device * dev, uint32_t led, uint8_t value);
+
+__pinned_func
+static inline int led_set_brightness(const struct device * dev, uint32_t led, uint8_t value)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uint32_t val; } parm1 = { .val = led };
+		union { uintptr_t x; uint8_t val; } parm2 = { .val = value };
+		return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_LED_SET_BRIGHTNESS);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_led_set_brightness(dev, led, value);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define led_set_brightness(dev, led, value) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_LED_SET_BRIGHTNESS, led_set_brightness, dev, led, value); 	syscall__retval = led_set_brightness(dev, led, value); 	sys_port_trace_syscall_exit(K_SYSCALL_LED_SET_BRIGHTNESS, led_set_brightness, dev, led, value, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_led_write_channels(const struct device * dev, uint32_t start_channel, uint32_t num_channels, const uint8_t * buf);
+
+__pinned_func
+static inline int led_write_channels(const struct device * dev, uint32_t start_channel, uint32_t num_channels, const uint8_t * buf)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uint32_t val; } parm1 = { .val = start_channel };
+		union { uintptr_t x; uint32_t val; } parm2 = { .val = num_channels };
+		union { uintptr_t x; const uint8_t * val; } parm3 = { .val = buf };
+		return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_LED_WRITE_CHANNELS);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_led_write_channels(dev, start_channel, num_channels, buf);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define led_write_channels(dev, start_channel, num_channels, buf) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_LED_WRITE_CHANNELS, led_write_channels, dev, start_channel, num_channels, buf); 	syscall__retval = led_write_channels(dev, start_channel, num_channels, buf); 	sys_port_trace_syscall_exit(K_SYSCALL_LED_WRITE_CHANNELS, led_write_channels, dev, start_channel, num_channels, buf, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_led_set_channel(const struct device * dev, uint32_t channel, uint8_t value);
+
+__pinned_func
+static inline int led_set_channel(const struct device * dev, uint32_t channel, uint8_t value)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uint32_t val; } parm1 = { .val = channel };
+		union { uintptr_t x; uint8_t val; } parm2 = { .val = value };
+		return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_LED_SET_CHANNEL);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_led_set_channel(dev, channel, value);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define led_set_channel(dev, channel, value) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_LED_SET_CHANNEL, led_set_channel, dev, channel, value); 	syscall__retval = led_set_channel(dev, channel, value); 	sys_port_trace_syscall_exit(K_SYSCALL_LED_SET_CHANNEL, led_set_channel, dev, channel, value, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_led_set_color(const struct device * dev, uint32_t led, uint8_t num_colors, const uint8_t * color);
+
+__pinned_func
+static inline int led_set_color(const struct device * dev, uint32_t led, uint8_t num_colors, const uint8_t * color)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uint32_t val; } parm1 = { .val = led };
+		union { uintptr_t x; uint8_t val; } parm2 = { .val = num_colors };
+		union { uintptr_t x; const uint8_t * val; } parm3 = { .val = color };
+		return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_LED_SET_COLOR);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_led_set_color(dev, led, num_colors, color);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define led_set_color(dev, led, num_colors, color) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_LED_SET_COLOR, led_set_color, dev, led, num_colors, color); 	syscall__retval = led_set_color(dev, led, num_colors, color); 	sys_port_trace_syscall_exit(K_SYSCALL_LED_SET_COLOR, led_set_color, dev, led, num_colors, color, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_led_on(const struct device * dev, uint32_t led);
+
+__pinned_func
+static inline int led_on(const struct device * dev, uint32_t led)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uint32_t val; } parm1 = { .val = led };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_LED_ON);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_led_on(dev, led);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define led_on(dev, led) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_LED_ON, led_on, dev, led); 	syscall__retval = led_on(dev, led); 	sys_port_trace_syscall_exit(K_SYSCALL_LED_ON, led_on, dev, led, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_led_off(const struct device * dev, uint32_t led);
+
+__pinned_func
+static inline int led_off(const struct device * dev, uint32_t led)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uint32_t val; } parm1 = { .val = led };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_LED_OFF);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_led_off(dev, led);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define led_off(dev, led) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_LED_OFF, led_off, dev, led); 	syscall__retval = led_off(dev, led); 	sys_port_trace_syscall_exit(K_SYSCALL_LED_OFF, led_off, dev, led, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif /* include guard */
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/libc-hooks.h b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/libc-hooks.h
new file mode 100644
index 0000000..c90ad63
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/libc-hooks.h
@@ -0,0 +1,126 @@
+/* auto-generated by gen_syscalls.py, don't edit */
+
+#ifndef Z_INCLUDE_SYSCALLS_LIBC_HOOKS_H
+#define Z_INCLUDE_SYSCALLS_LIBC_HOOKS_H
+
+
+#include <zephyr/tracing/tracing_syscall.h>
+
+#ifndef _ASMLANGUAGE
+
+#include <stdarg.h>
+
+#include <syscall_list.h>
+#include <zephyr/syscall.h>
+
+#include <zephyr/linker/sections.h>
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern int z_impl_zephyr_read_stdin(char * buf, int nbytes);
+
+__pinned_func
+static inline int zephyr_read_stdin(char * buf, int nbytes)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; char * val; } parm0 = { .val = buf };
+		union { uintptr_t x; int val; } parm1 = { .val = nbytes };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_ZEPHYR_READ_STDIN);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_zephyr_read_stdin(buf, nbytes);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define zephyr_read_stdin(buf, nbytes) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_ZEPHYR_READ_STDIN, zephyr_read_stdin, buf, nbytes); 	syscall__retval = zephyr_read_stdin(buf, nbytes); 	sys_port_trace_syscall_exit(K_SYSCALL_ZEPHYR_READ_STDIN, zephyr_read_stdin, buf, nbytes, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_zephyr_write_stdout(const void * buf, int nbytes);
+
+__pinned_func
+static inline int zephyr_write_stdout(const void * buf, int nbytes)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const void * val; } parm0 = { .val = buf };
+		union { uintptr_t x; int val; } parm1 = { .val = nbytes };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_ZEPHYR_WRITE_STDOUT);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_zephyr_write_stdout(buf, nbytes);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define zephyr_write_stdout(buf, nbytes) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_ZEPHYR_WRITE_STDOUT, zephyr_write_stdout, buf, nbytes); 	syscall__retval = zephyr_write_stdout(buf, nbytes); 	sys_port_trace_syscall_exit(K_SYSCALL_ZEPHYR_WRITE_STDOUT, zephyr_write_stdout, buf, nbytes, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_zephyr_fputc(int c, FILE * stream);
+
+__pinned_func
+static inline int zephyr_fputc(int c, FILE * stream)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; int val; } parm0 = { .val = c };
+		union { uintptr_t x; FILE * val; } parm1 = { .val = stream };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_ZEPHYR_FPUTC);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_zephyr_fputc(c, stream);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define zephyr_fputc(c, stream) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_ZEPHYR_FPUTC, zephyr_fputc, c, stream); 	syscall__retval = zephyr_fputc(c, stream); 	sys_port_trace_syscall_exit(K_SYSCALL_ZEPHYR_FPUTC, zephyr_fputc, c, stream, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern size_t z_impl_zephyr_fwrite(const void *ZRESTRICT ptr, size_t size, size_t nitems, FILE *ZRESTRICT stream);
+
+__pinned_func
+static inline size_t zephyr_fwrite(const void *ZRESTRICT ptr, size_t size, size_t nitems, FILE *ZRESTRICT stream)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const void *ZRESTRICT val; } parm0 = { .val = ptr };
+		union { uintptr_t x; size_t val; } parm1 = { .val = size };
+		union { uintptr_t x; size_t val; } parm2 = { .val = nitems };
+		union { uintptr_t x; FILE *ZRESTRICT val; } parm3 = { .val = stream };
+		return (size_t) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_ZEPHYR_FWRITE);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_zephyr_fwrite(ptr, size, nitems, stream);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define zephyr_fwrite(ptr, size, nitems, stream) ({ 	size_t syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_ZEPHYR_FWRITE, zephyr_fwrite, ptr, size, nitems, stream); 	syscall__retval = zephyr_fwrite(ptr, size, nitems, stream); 	sys_port_trace_syscall_exit(K_SYSCALL_ZEPHYR_FWRITE, zephyr_fwrite, ptr, size, nitems, stream, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif /* include guard */
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/log_ctrl.h b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/log_ctrl.h
new file mode 100644
index 0000000..f4df429
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/log_ctrl.h
@@ -0,0 +1,145 @@
+/* auto-generated by gen_syscalls.py, don't edit */
+
+#ifndef Z_INCLUDE_SYSCALLS_LOG_CTRL_H
+#define Z_INCLUDE_SYSCALLS_LOG_CTRL_H
+
+
+#include <zephyr/tracing/tracing_syscall.h>
+
+#ifndef _ASMLANGUAGE
+
+#include <stdarg.h>
+
+#include <syscall_list.h>
+#include <zephyr/syscall.h>
+
+#include <zephyr/linker/sections.h>
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern void z_impl_log_panic(void);
+
+__pinned_func
+static inline void log_panic(void)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		(void) arch_syscall_invoke0(K_SYSCALL_LOG_PANIC);
+		return;
+	}
+#endif
+	compiler_barrier();
+	z_impl_log_panic();
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define log_panic() do { 	sys_port_trace_syscall_enter(K_SYSCALL_LOG_PANIC, log_panic); 	log_panic(); 	sys_port_trace_syscall_exit(K_SYSCALL_LOG_PANIC, log_panic); } while(false)
+#endif
+#endif
+
+
+extern bool z_impl_log_process(void);
+
+__pinned_func
+static inline bool log_process(void)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		return (bool) arch_syscall_invoke0(K_SYSCALL_LOG_PROCESS);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_log_process();
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define log_process() ({ 	bool syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_LOG_PROCESS, log_process); 	syscall__retval = log_process(); 	sys_port_trace_syscall_exit(K_SYSCALL_LOG_PROCESS, log_process, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern uint32_t z_impl_log_buffered_cnt(void);
+
+__pinned_func
+static inline uint32_t log_buffered_cnt(void)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		return (uint32_t) arch_syscall_invoke0(K_SYSCALL_LOG_BUFFERED_CNT);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_log_buffered_cnt();
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define log_buffered_cnt() ({ 	uint32_t syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_LOG_BUFFERED_CNT, log_buffered_cnt); 	syscall__retval = log_buffered_cnt(); 	sys_port_trace_syscall_exit(K_SYSCALL_LOG_BUFFERED_CNT, log_buffered_cnt, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern uint32_t z_impl_log_filter_set(struct log_backend const *const backend, uint32_t domain_id, int16_t source_id, uint32_t level);
+
+__pinned_func
+static inline uint32_t log_filter_set(struct log_backend const *const backend, uint32_t domain_id, int16_t source_id, uint32_t level)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; struct log_backend const *const val; } parm0 = { .val = backend };
+		union { uintptr_t x; uint32_t val; } parm1 = { .val = domain_id };
+		union { uintptr_t x; int16_t val; } parm2 = { .val = source_id };
+		union { uintptr_t x; uint32_t val; } parm3 = { .val = level };
+		return (uint32_t) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_LOG_FILTER_SET);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_log_filter_set(backend, domain_id, source_id, level);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define log_filter_set(backend, domain_id, source_id, level) ({ 	uint32_t syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_LOG_FILTER_SET, log_filter_set, backend, domain_id, source_id, level); 	syscall__retval = log_filter_set(backend, domain_id, source_id, level); 	sys_port_trace_syscall_exit(K_SYSCALL_LOG_FILTER_SET, log_filter_set, backend, domain_id, source_id, level, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern uint32_t z_impl_log_frontend_filter_set(int16_t source_id, uint32_t level);
+
+__pinned_func
+static inline uint32_t log_frontend_filter_set(int16_t source_id, uint32_t level)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; int16_t val; } parm0 = { .val = source_id };
+		union { uintptr_t x; uint32_t val; } parm1 = { .val = level };
+		return (uint32_t) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_LOG_FRONTEND_FILTER_SET);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_log_frontend_filter_set(source_id, level);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define log_frontend_filter_set(source_id, level) ({ 	uint32_t syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_LOG_FRONTEND_FILTER_SET, log_frontend_filter_set, source_id, level); 	syscall__retval = log_frontend_filter_set(source_id, level); 	sys_port_trace_syscall_exit(K_SYSCALL_LOG_FRONTEND_FILTER_SET, log_frontend_filter_set, source_id, level, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif /* include guard */
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/log_msg.h b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/log_msg.h
new file mode 100644
index 0000000..24e13c8
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/log_msg.h
@@ -0,0 +1,136 @@
+/* auto-generated by gen_syscalls.py, don't edit */
+
+#ifndef Z_INCLUDE_SYSCALLS_LOG_MSG_H
+#define Z_INCLUDE_SYSCALLS_LOG_MSG_H
+
+
+#include <zephyr/tracing/tracing_syscall.h>
+
+#ifndef _ASMLANGUAGE
+
+#include <stdarg.h>
+
+#include <syscall_list.h>
+#include <zephyr/syscall.h>
+
+#include <zephyr/linker/sections.h>
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern void z_impl_z_log_msg_simple_create_0(const void * source, uint32_t level, const char * fmt);
+
+__pinned_func
+static inline void z_log_msg_simple_create_0(const void * source, uint32_t level, const char * fmt)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const void * val; } parm0 = { .val = source };
+		union { uintptr_t x; uint32_t val; } parm1 = { .val = level };
+		union { uintptr_t x; const char * val; } parm2 = { .val = fmt };
+		(void) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_Z_LOG_MSG_SIMPLE_CREATE_0);
+		return;
+	}
+#endif
+	compiler_barrier();
+	z_impl_z_log_msg_simple_create_0(source, level, fmt);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define z_log_msg_simple_create_0(source, level, fmt) do { 	sys_port_trace_syscall_enter(K_SYSCALL_Z_LOG_MSG_SIMPLE_CREATE_0, z_log_msg_simple_create_0, source, level, fmt); 	z_log_msg_simple_create_0(source, level, fmt); 	sys_port_trace_syscall_exit(K_SYSCALL_Z_LOG_MSG_SIMPLE_CREATE_0, z_log_msg_simple_create_0, source, level, fmt); } while(false)
+#endif
+#endif
+
+
+extern void z_impl_z_log_msg_simple_create_1(const void * source, uint32_t level, const char * fmt, uint32_t arg);
+
+__pinned_func
+static inline void z_log_msg_simple_create_1(const void * source, uint32_t level, const char * fmt, uint32_t arg)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const void * val; } parm0 = { .val = source };
+		union { uintptr_t x; uint32_t val; } parm1 = { .val = level };
+		union { uintptr_t x; const char * val; } parm2 = { .val = fmt };
+		union { uintptr_t x; uint32_t val; } parm3 = { .val = arg };
+		(void) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_Z_LOG_MSG_SIMPLE_CREATE_1);
+		return;
+	}
+#endif
+	compiler_barrier();
+	z_impl_z_log_msg_simple_create_1(source, level, fmt, arg);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define z_log_msg_simple_create_1(source, level, fmt, arg) do { 	sys_port_trace_syscall_enter(K_SYSCALL_Z_LOG_MSG_SIMPLE_CREATE_1, z_log_msg_simple_create_1, source, level, fmt, arg); 	z_log_msg_simple_create_1(source, level, fmt, arg); 	sys_port_trace_syscall_exit(K_SYSCALL_Z_LOG_MSG_SIMPLE_CREATE_1, z_log_msg_simple_create_1, source, level, fmt, arg); } while(false)
+#endif
+#endif
+
+
+extern void z_impl_z_log_msg_simple_create_2(const void * source, uint32_t level, const char * fmt, uint32_t arg0, uint32_t arg1);
+
+__pinned_func
+static inline void z_log_msg_simple_create_2(const void * source, uint32_t level, const char * fmt, uint32_t arg0, uint32_t arg1)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const void * val; } parm0 = { .val = source };
+		union { uintptr_t x; uint32_t val; } parm1 = { .val = level };
+		union { uintptr_t x; const char * val; } parm2 = { .val = fmt };
+		union { uintptr_t x; uint32_t val; } parm3 = { .val = arg0 };
+		union { uintptr_t x; uint32_t val; } parm4 = { .val = arg1 };
+		(void) arch_syscall_invoke5(parm0.x, parm1.x, parm2.x, parm3.x, parm4.x, K_SYSCALL_Z_LOG_MSG_SIMPLE_CREATE_2);
+		return;
+	}
+#endif
+	compiler_barrier();
+	z_impl_z_log_msg_simple_create_2(source, level, fmt, arg0, arg1);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define z_log_msg_simple_create_2(source, level, fmt, arg0, arg1) do { 	sys_port_trace_syscall_enter(K_SYSCALL_Z_LOG_MSG_SIMPLE_CREATE_2, z_log_msg_simple_create_2, source, level, fmt, arg0, arg1); 	z_log_msg_simple_create_2(source, level, fmt, arg0, arg1); 	sys_port_trace_syscall_exit(K_SYSCALL_Z_LOG_MSG_SIMPLE_CREATE_2, z_log_msg_simple_create_2, source, level, fmt, arg0, arg1); } while(false)
+#endif
+#endif
+
+
+extern void z_impl_z_log_msg_static_create(const void * source, const struct log_msg_desc desc, uint8_t * package, const void * data);
+
+__pinned_func
+static inline void z_log_msg_static_create(const void * source, const struct log_msg_desc desc, uint8_t * package, const void * data)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const void * val; } parm0 = { .val = source };
+		union { uintptr_t x; const struct log_msg_desc val; } parm1 = { .val = desc };
+		union { uintptr_t x; uint8_t * val; } parm2 = { .val = package };
+		union { uintptr_t x; const void * val; } parm3 = { .val = data };
+		(void) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_Z_LOG_MSG_STATIC_CREATE);
+		return;
+	}
+#endif
+	compiler_barrier();
+	z_impl_z_log_msg_static_create(source, desc, package, data);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define z_log_msg_static_create(source, desc, package, data) do { 	sys_port_trace_syscall_enter(K_SYSCALL_Z_LOG_MSG_STATIC_CREATE, z_log_msg_static_create, source, desc, package, data); 	z_log_msg_static_create(source, desc, package, data); 	sys_port_trace_syscall_exit(K_SYSCALL_Z_LOG_MSG_STATIC_CREATE, z_log_msg_static_create, source, desc, package, data); } while(false)
+#endif
+#endif
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif /* include guard */
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/maxim_ds3231.h b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/maxim_ds3231.h
new file mode 100644
index 0000000..7a656a4
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/maxim_ds3231.h
@@ -0,0 +1,76 @@
+/* auto-generated by gen_syscalls.py, don't edit */
+
+#ifndef Z_INCLUDE_SYSCALLS_MAXIM_DS3231_H
+#define Z_INCLUDE_SYSCALLS_MAXIM_DS3231_H
+
+
+#include <zephyr/tracing/tracing_syscall.h>
+
+#ifndef _ASMLANGUAGE
+
+#include <stdarg.h>
+
+#include <syscall_list.h>
+#include <zephyr/syscall.h>
+
+#include <zephyr/linker/sections.h>
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern int z_impl_maxim_ds3231_req_syncpoint(const struct device * dev, struct k_poll_signal * signal);
+
+__pinned_func
+static inline int maxim_ds3231_req_syncpoint(const struct device * dev, struct k_poll_signal * signal)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; struct k_poll_signal * val; } parm1 = { .val = signal };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_MAXIM_DS3231_REQ_SYNCPOINT);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_maxim_ds3231_req_syncpoint(dev, signal);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define maxim_ds3231_req_syncpoint(dev, signal) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_MAXIM_DS3231_REQ_SYNCPOINT, maxim_ds3231_req_syncpoint, dev, signal); 	syscall__retval = maxim_ds3231_req_syncpoint(dev, signal); 	sys_port_trace_syscall_exit(K_SYSCALL_MAXIM_DS3231_REQ_SYNCPOINT, maxim_ds3231_req_syncpoint, dev, signal, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_maxim_ds3231_get_syncpoint(const struct device * dev, struct maxim_ds3231_syncpoint * syncpoint);
+
+__pinned_func
+static inline int maxim_ds3231_get_syncpoint(const struct device * dev, struct maxim_ds3231_syncpoint * syncpoint)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; struct maxim_ds3231_syncpoint * val; } parm1 = { .val = syncpoint };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_MAXIM_DS3231_GET_SYNCPOINT);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_maxim_ds3231_get_syncpoint(dev, syncpoint);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define maxim_ds3231_get_syncpoint(dev, syncpoint) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_MAXIM_DS3231_GET_SYNCPOINT, maxim_ds3231_get_syncpoint, dev, syncpoint); 	syscall__retval = maxim_ds3231_get_syncpoint(dev, syncpoint); 	sys_port_trace_syscall_exit(K_SYSCALL_MAXIM_DS3231_GET_SYNCPOINT, maxim_ds3231_get_syncpoint, dev, syncpoint, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif /* include guard */
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/mbox.h b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/mbox.h
new file mode 100644
index 0000000..c8b4ae5
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/mbox.h
@@ -0,0 +1,124 @@
+/* auto-generated by gen_syscalls.py, don't edit */
+
+#ifndef Z_INCLUDE_SYSCALLS_MBOX_H
+#define Z_INCLUDE_SYSCALLS_MBOX_H
+
+
+#include <zephyr/tracing/tracing_syscall.h>
+
+#ifndef _ASMLANGUAGE
+
+#include <stdarg.h>
+
+#include <syscall_list.h>
+#include <zephyr/syscall.h>
+
+#include <zephyr/linker/sections.h>
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern int z_impl_mbox_send(const struct device * dev, mbox_channel_id_t channel_id, const struct mbox_msg * msg);
+
+__pinned_func
+static inline int mbox_send(const struct device * dev, mbox_channel_id_t channel_id, const struct mbox_msg * msg)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; mbox_channel_id_t val; } parm1 = { .val = channel_id };
+		union { uintptr_t x; const struct mbox_msg * val; } parm2 = { .val = msg };
+		return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_MBOX_SEND);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_mbox_send(dev, channel_id, msg);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define mbox_send(dev, channel_id, msg) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_MBOX_SEND, mbox_send, dev, channel_id, msg); 	syscall__retval = mbox_send(dev, channel_id, msg); 	sys_port_trace_syscall_exit(K_SYSCALL_MBOX_SEND, mbox_send, dev, channel_id, msg, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_mbox_mtu_get(const struct device * dev);
+
+__pinned_func
+static inline int mbox_mtu_get(const struct device * dev)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_MBOX_MTU_GET);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_mbox_mtu_get(dev);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define mbox_mtu_get(dev) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_MBOX_MTU_GET, mbox_mtu_get, dev); 	syscall__retval = mbox_mtu_get(dev); 	sys_port_trace_syscall_exit(K_SYSCALL_MBOX_MTU_GET, mbox_mtu_get, dev, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_mbox_set_enabled(const struct device * dev, mbox_channel_id_t channel_id, bool enabled);
+
+__pinned_func
+static inline int mbox_set_enabled(const struct device * dev, mbox_channel_id_t channel_id, bool enabled)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; mbox_channel_id_t val; } parm1 = { .val = channel_id };
+		union { uintptr_t x; bool val; } parm2 = { .val = enabled };
+		return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_MBOX_SET_ENABLED);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_mbox_set_enabled(dev, channel_id, enabled);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define mbox_set_enabled(dev, channel_id, enabled) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_MBOX_SET_ENABLED, mbox_set_enabled, dev, channel_id, enabled); 	syscall__retval = mbox_set_enabled(dev, channel_id, enabled); 	sys_port_trace_syscall_exit(K_SYSCALL_MBOX_SET_ENABLED, mbox_set_enabled, dev, channel_id, enabled, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern uint32_t z_impl_mbox_max_channels_get(const struct device * dev);
+
+__pinned_func
+static inline uint32_t mbox_max_channels_get(const struct device * dev)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		return (uint32_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_MBOX_MAX_CHANNELS_GET);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_mbox_max_channels_get(dev);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define mbox_max_channels_get(dev) ({ 	uint32_t syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_MBOX_MAX_CHANNELS_GET, mbox_max_channels_get, dev); 	syscall__retval = mbox_max_channels_get(dev); 	sys_port_trace_syscall_exit(K_SYSCALL_MBOX_MAX_CHANNELS_GET, mbox_max_channels_get, dev, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif /* include guard */
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/mdio.h b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/mdio.h
new file mode 100644
index 0000000..0e96369
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/mdio.h
@@ -0,0 +1,182 @@
+/* auto-generated by gen_syscalls.py, don't edit */
+
+#ifndef Z_INCLUDE_SYSCALLS_MDIO_H
+#define Z_INCLUDE_SYSCALLS_MDIO_H
+
+
+#include <zephyr/tracing/tracing_syscall.h>
+
+#ifndef _ASMLANGUAGE
+
+#include <stdarg.h>
+
+#include <syscall_list.h>
+#include <zephyr/syscall.h>
+
+#include <zephyr/linker/sections.h>
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern void z_impl_mdio_bus_enable(const struct device * dev);
+
+__pinned_func
+static inline void mdio_bus_enable(const struct device * dev)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		(void) arch_syscall_invoke1(parm0.x, K_SYSCALL_MDIO_BUS_ENABLE);
+		return;
+	}
+#endif
+	compiler_barrier();
+	z_impl_mdio_bus_enable(dev);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define mdio_bus_enable(dev) do { 	sys_port_trace_syscall_enter(K_SYSCALL_MDIO_BUS_ENABLE, mdio_bus_enable, dev); 	mdio_bus_enable(dev); 	sys_port_trace_syscall_exit(K_SYSCALL_MDIO_BUS_ENABLE, mdio_bus_enable, dev); } while(false)
+#endif
+#endif
+
+
+extern void z_impl_mdio_bus_disable(const struct device * dev);
+
+__pinned_func
+static inline void mdio_bus_disable(const struct device * dev)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		(void) arch_syscall_invoke1(parm0.x, K_SYSCALL_MDIO_BUS_DISABLE);
+		return;
+	}
+#endif
+	compiler_barrier();
+	z_impl_mdio_bus_disable(dev);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define mdio_bus_disable(dev) do { 	sys_port_trace_syscall_enter(K_SYSCALL_MDIO_BUS_DISABLE, mdio_bus_disable, dev); 	mdio_bus_disable(dev); 	sys_port_trace_syscall_exit(K_SYSCALL_MDIO_BUS_DISABLE, mdio_bus_disable, dev); } while(false)
+#endif
+#endif
+
+
+extern int z_impl_mdio_read(const struct device * dev, uint8_t prtad, uint8_t regad, uint16_t * data);
+
+__pinned_func
+static inline int mdio_read(const struct device * dev, uint8_t prtad, uint8_t regad, uint16_t * data)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uint8_t val; } parm1 = { .val = prtad };
+		union { uintptr_t x; uint8_t val; } parm2 = { .val = regad };
+		union { uintptr_t x; uint16_t * val; } parm3 = { .val = data };
+		return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_MDIO_READ);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_mdio_read(dev, prtad, regad, data);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define mdio_read(dev, prtad, regad, data) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_MDIO_READ, mdio_read, dev, prtad, regad, data); 	syscall__retval = mdio_read(dev, prtad, regad, data); 	sys_port_trace_syscall_exit(K_SYSCALL_MDIO_READ, mdio_read, dev, prtad, regad, data, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_mdio_write(const struct device * dev, uint8_t prtad, uint8_t regad, uint16_t data);
+
+__pinned_func
+static inline int mdio_write(const struct device * dev, uint8_t prtad, uint8_t regad, uint16_t data)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uint8_t val; } parm1 = { .val = prtad };
+		union { uintptr_t x; uint8_t val; } parm2 = { .val = regad };
+		union { uintptr_t x; uint16_t val; } parm3 = { .val = data };
+		return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_MDIO_WRITE);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_mdio_write(dev, prtad, regad, data);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define mdio_write(dev, prtad, regad, data) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_MDIO_WRITE, mdio_write, dev, prtad, regad, data); 	syscall__retval = mdio_write(dev, prtad, regad, data); 	sys_port_trace_syscall_exit(K_SYSCALL_MDIO_WRITE, mdio_write, dev, prtad, regad, data, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_mdio_read_c45(const struct device * dev, uint8_t prtad, uint8_t devad, uint16_t regad, uint16_t * data);
+
+__pinned_func
+static inline int mdio_read_c45(const struct device * dev, uint8_t prtad, uint8_t devad, uint16_t regad, uint16_t * data)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uint8_t val; } parm1 = { .val = prtad };
+		union { uintptr_t x; uint8_t val; } parm2 = { .val = devad };
+		union { uintptr_t x; uint16_t val; } parm3 = { .val = regad };
+		union { uintptr_t x; uint16_t * val; } parm4 = { .val = data };
+		return (int) arch_syscall_invoke5(parm0.x, parm1.x, parm2.x, parm3.x, parm4.x, K_SYSCALL_MDIO_READ_C45);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_mdio_read_c45(dev, prtad, devad, regad, data);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define mdio_read_c45(dev, prtad, devad, regad, data) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_MDIO_READ_C45, mdio_read_c45, dev, prtad, devad, regad, data); 	syscall__retval = mdio_read_c45(dev, prtad, devad, regad, data); 	sys_port_trace_syscall_exit(K_SYSCALL_MDIO_READ_C45, mdio_read_c45, dev, prtad, devad, regad, data, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_mdio_write_c45(const struct device * dev, uint8_t prtad, uint8_t devad, uint16_t regad, uint16_t data);
+
+__pinned_func
+static inline int mdio_write_c45(const struct device * dev, uint8_t prtad, uint8_t devad, uint16_t regad, uint16_t data)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uint8_t val; } parm1 = { .val = prtad };
+		union { uintptr_t x; uint8_t val; } parm2 = { .val = devad };
+		union { uintptr_t x; uint16_t val; } parm3 = { .val = regad };
+		union { uintptr_t x; uint16_t val; } parm4 = { .val = data };
+		return (int) arch_syscall_invoke5(parm0.x, parm1.x, parm2.x, parm3.x, parm4.x, K_SYSCALL_MDIO_WRITE_C45);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_mdio_write_c45(dev, prtad, devad, regad, data);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define mdio_write_c45(dev, prtad, devad, regad, data) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_MDIO_WRITE_C45, mdio_write_c45, dev, prtad, devad, regad, data); 	syscall__retval = mdio_write_c45(dev, prtad, devad, regad, data); 	sys_port_trace_syscall_exit(K_SYSCALL_MDIO_WRITE_C45, mdio_write_c45, dev, prtad, devad, regad, data, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif /* include guard */
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/mutex.h b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/mutex.h
new file mode 100644
index 0000000..c529133
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/mutex.h
@@ -0,0 +1,75 @@
+/* auto-generated by gen_syscalls.py, don't edit */
+
+#ifndef Z_INCLUDE_SYSCALLS_MUTEX_H
+#define Z_INCLUDE_SYSCALLS_MUTEX_H
+
+
+#include <zephyr/tracing/tracing_syscall.h>
+
+#ifndef _ASMLANGUAGE
+
+#include <stdarg.h>
+
+#include <syscall_list.h>
+#include <zephyr/syscall.h>
+
+#include <zephyr/linker/sections.h>
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern int z_impl_z_sys_mutex_kernel_lock(struct sys_mutex * mutex, k_timeout_t timeout);
+
+__pinned_func
+static inline int z_sys_mutex_kernel_lock(struct sys_mutex * mutex, k_timeout_t timeout)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; struct sys_mutex * val; } parm0 = { .val = mutex };
+		union { struct { uintptr_t lo, hi; } split; k_timeout_t val; } parm1 = { .val = timeout };
+		return (int) arch_syscall_invoke3(parm0.x, parm1.split.lo, parm1.split.hi, K_SYSCALL_Z_SYS_MUTEX_KERNEL_LOCK);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_z_sys_mutex_kernel_lock(mutex, timeout);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define z_sys_mutex_kernel_lock(mutex, timeout) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_Z_SYS_MUTEX_KERNEL_LOCK, z_sys_mutex_kernel_lock, mutex, timeout); 	syscall__retval = z_sys_mutex_kernel_lock(mutex, timeout); 	sys_port_trace_syscall_exit(K_SYSCALL_Z_SYS_MUTEX_KERNEL_LOCK, z_sys_mutex_kernel_lock, mutex, timeout, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_z_sys_mutex_kernel_unlock(struct sys_mutex * mutex);
+
+__pinned_func
+static inline int z_sys_mutex_kernel_unlock(struct sys_mutex * mutex)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; struct sys_mutex * val; } parm0 = { .val = mutex };
+		return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_Z_SYS_MUTEX_KERNEL_UNLOCK);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_z_sys_mutex_kernel_unlock(mutex);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define z_sys_mutex_kernel_unlock(mutex) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_Z_SYS_MUTEX_KERNEL_UNLOCK, z_sys_mutex_kernel_unlock, mutex); 	syscall__retval = z_sys_mutex_kernel_unlock(mutex); 	sys_port_trace_syscall_exit(K_SYSCALL_Z_SYS_MUTEX_KERNEL_UNLOCK, z_sys_mutex_kernel_unlock, mutex, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif /* include guard */
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/net_if.h b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/net_if.h
new file mode 100644
index 0000000..74fe947
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/net_if.h
@@ -0,0 +1,270 @@
+/* auto-generated by gen_syscalls.py, don't edit */
+
+#ifndef Z_INCLUDE_SYSCALLS_NET_IF_H
+#define Z_INCLUDE_SYSCALLS_NET_IF_H
+
+
+#include <zephyr/tracing/tracing_syscall.h>
+
+#ifndef _ASMLANGUAGE
+
+#include <stdarg.h>
+
+#include <syscall_list.h>
+#include <zephyr/syscall.h>
+
+#include <zephyr/linker/sections.h>
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern int z_impl_net_if_ipv6_addr_lookup_by_index(const struct in6_addr * addr);
+
+__pinned_func
+static inline int net_if_ipv6_addr_lookup_by_index(const struct in6_addr * addr)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct in6_addr * val; } parm0 = { .val = addr };
+		return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_NET_IF_IPV6_ADDR_LOOKUP_BY_INDEX);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_net_if_ipv6_addr_lookup_by_index(addr);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define net_if_ipv6_addr_lookup_by_index(addr) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_NET_IF_IPV6_ADDR_LOOKUP_BY_INDEX, net_if_ipv6_addr_lookup_by_index, addr); 	syscall__retval = net_if_ipv6_addr_lookup_by_index(addr); 	sys_port_trace_syscall_exit(K_SYSCALL_NET_IF_IPV6_ADDR_LOOKUP_BY_INDEX, net_if_ipv6_addr_lookup_by_index, addr, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern bool z_impl_net_if_ipv6_addr_add_by_index(int index, struct in6_addr * addr, enum net_addr_type addr_type, uint32_t vlifetime);
+
+__pinned_func
+static inline bool net_if_ipv6_addr_add_by_index(int index, struct in6_addr * addr, enum net_addr_type addr_type, uint32_t vlifetime)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; int val; } parm0 = { .val = index };
+		union { uintptr_t x; struct in6_addr * val; } parm1 = { .val = addr };
+		union { uintptr_t x; enum net_addr_type val; } parm2 = { .val = addr_type };
+		union { uintptr_t x; uint32_t val; } parm3 = { .val = vlifetime };
+		return (bool) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_NET_IF_IPV6_ADDR_ADD_BY_INDEX);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_net_if_ipv6_addr_add_by_index(index, addr, addr_type, vlifetime);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define net_if_ipv6_addr_add_by_index(index, addr, addr_type, vlifetime) ({ 	bool syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_NET_IF_IPV6_ADDR_ADD_BY_INDEX, net_if_ipv6_addr_add_by_index, index, addr, addr_type, vlifetime); 	syscall__retval = net_if_ipv6_addr_add_by_index(index, addr, addr_type, vlifetime); 	sys_port_trace_syscall_exit(K_SYSCALL_NET_IF_IPV6_ADDR_ADD_BY_INDEX, net_if_ipv6_addr_add_by_index, index, addr, addr_type, vlifetime, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern bool z_impl_net_if_ipv6_addr_rm_by_index(int index, const struct in6_addr * addr);
+
+__pinned_func
+static inline bool net_if_ipv6_addr_rm_by_index(int index, const struct in6_addr * addr)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; int val; } parm0 = { .val = index };
+		union { uintptr_t x; const struct in6_addr * val; } parm1 = { .val = addr };
+		return (bool) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_NET_IF_IPV6_ADDR_RM_BY_INDEX);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_net_if_ipv6_addr_rm_by_index(index, addr);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define net_if_ipv6_addr_rm_by_index(index, addr) ({ 	bool syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_NET_IF_IPV6_ADDR_RM_BY_INDEX, net_if_ipv6_addr_rm_by_index, index, addr); 	syscall__retval = net_if_ipv6_addr_rm_by_index(index, addr); 	sys_port_trace_syscall_exit(K_SYSCALL_NET_IF_IPV6_ADDR_RM_BY_INDEX, net_if_ipv6_addr_rm_by_index, index, addr, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_net_if_ipv4_addr_lookup_by_index(const struct in_addr * addr);
+
+__pinned_func
+static inline int net_if_ipv4_addr_lookup_by_index(const struct in_addr * addr)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct in_addr * val; } parm0 = { .val = addr };
+		return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_NET_IF_IPV4_ADDR_LOOKUP_BY_INDEX);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_net_if_ipv4_addr_lookup_by_index(addr);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define net_if_ipv4_addr_lookup_by_index(addr) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_NET_IF_IPV4_ADDR_LOOKUP_BY_INDEX, net_if_ipv4_addr_lookup_by_index, addr); 	syscall__retval = net_if_ipv4_addr_lookup_by_index(addr); 	sys_port_trace_syscall_exit(K_SYSCALL_NET_IF_IPV4_ADDR_LOOKUP_BY_INDEX, net_if_ipv4_addr_lookup_by_index, addr, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern bool z_impl_net_if_ipv4_addr_add_by_index(int index, struct in_addr * addr, enum net_addr_type addr_type, uint32_t vlifetime);
+
+__pinned_func
+static inline bool net_if_ipv4_addr_add_by_index(int index, struct in_addr * addr, enum net_addr_type addr_type, uint32_t vlifetime)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; int val; } parm0 = { .val = index };
+		union { uintptr_t x; struct in_addr * val; } parm1 = { .val = addr };
+		union { uintptr_t x; enum net_addr_type val; } parm2 = { .val = addr_type };
+		union { uintptr_t x; uint32_t val; } parm3 = { .val = vlifetime };
+		return (bool) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_NET_IF_IPV4_ADDR_ADD_BY_INDEX);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_net_if_ipv4_addr_add_by_index(index, addr, addr_type, vlifetime);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define net_if_ipv4_addr_add_by_index(index, addr, addr_type, vlifetime) ({ 	bool syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_NET_IF_IPV4_ADDR_ADD_BY_INDEX, net_if_ipv4_addr_add_by_index, index, addr, addr_type, vlifetime); 	syscall__retval = net_if_ipv4_addr_add_by_index(index, addr, addr_type, vlifetime); 	sys_port_trace_syscall_exit(K_SYSCALL_NET_IF_IPV4_ADDR_ADD_BY_INDEX, net_if_ipv4_addr_add_by_index, index, addr, addr_type, vlifetime, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern bool z_impl_net_if_ipv4_addr_rm_by_index(int index, const struct in_addr * addr);
+
+__pinned_func
+static inline bool net_if_ipv4_addr_rm_by_index(int index, const struct in_addr * addr)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; int val; } parm0 = { .val = index };
+		union { uintptr_t x; const struct in_addr * val; } parm1 = { .val = addr };
+		return (bool) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_NET_IF_IPV4_ADDR_RM_BY_INDEX);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_net_if_ipv4_addr_rm_by_index(index, addr);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define net_if_ipv4_addr_rm_by_index(index, addr) ({ 	bool syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_NET_IF_IPV4_ADDR_RM_BY_INDEX, net_if_ipv4_addr_rm_by_index, index, addr); 	syscall__retval = net_if_ipv4_addr_rm_by_index(index, addr); 	sys_port_trace_syscall_exit(K_SYSCALL_NET_IF_IPV4_ADDR_RM_BY_INDEX, net_if_ipv4_addr_rm_by_index, index, addr, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern bool z_impl_net_if_ipv4_set_netmask_by_index(int index, const struct in_addr * netmask);
+
+__pinned_func
+static inline bool net_if_ipv4_set_netmask_by_index(int index, const struct in_addr * netmask)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; int val; } parm0 = { .val = index };
+		union { uintptr_t x; const struct in_addr * val; } parm1 = { .val = netmask };
+		return (bool) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_NET_IF_IPV4_SET_NETMASK_BY_INDEX);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_net_if_ipv4_set_netmask_by_index(index, netmask);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define net_if_ipv4_set_netmask_by_index(index, netmask) ({ 	bool syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_NET_IF_IPV4_SET_NETMASK_BY_INDEX, net_if_ipv4_set_netmask_by_index, index, netmask); 	syscall__retval = net_if_ipv4_set_netmask_by_index(index, netmask); 	sys_port_trace_syscall_exit(K_SYSCALL_NET_IF_IPV4_SET_NETMASK_BY_INDEX, net_if_ipv4_set_netmask_by_index, index, netmask, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern bool z_impl_net_if_ipv4_set_netmask_by_addr_by_index(int index, const struct in_addr * addr, const struct in_addr * netmask);
+
+__pinned_func
+static inline bool net_if_ipv4_set_netmask_by_addr_by_index(int index, const struct in_addr * addr, const struct in_addr * netmask)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; int val; } parm0 = { .val = index };
+		union { uintptr_t x; const struct in_addr * val; } parm1 = { .val = addr };
+		union { uintptr_t x; const struct in_addr * val; } parm2 = { .val = netmask };
+		return (bool) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_NET_IF_IPV4_SET_NETMASK_BY_ADDR_BY_INDEX);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_net_if_ipv4_set_netmask_by_addr_by_index(index, addr, netmask);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define net_if_ipv4_set_netmask_by_addr_by_index(index, addr, netmask) ({ 	bool syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_NET_IF_IPV4_SET_NETMASK_BY_ADDR_BY_INDEX, net_if_ipv4_set_netmask_by_addr_by_index, index, addr, netmask); 	syscall__retval = net_if_ipv4_set_netmask_by_addr_by_index(index, addr, netmask); 	sys_port_trace_syscall_exit(K_SYSCALL_NET_IF_IPV4_SET_NETMASK_BY_ADDR_BY_INDEX, net_if_ipv4_set_netmask_by_addr_by_index, index, addr, netmask, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern bool z_impl_net_if_ipv4_set_gw_by_index(int index, const struct in_addr * gw);
+
+__pinned_func
+static inline bool net_if_ipv4_set_gw_by_index(int index, const struct in_addr * gw)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; int val; } parm0 = { .val = index };
+		union { uintptr_t x; const struct in_addr * val; } parm1 = { .val = gw };
+		return (bool) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_NET_IF_IPV4_SET_GW_BY_INDEX);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_net_if_ipv4_set_gw_by_index(index, gw);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define net_if_ipv4_set_gw_by_index(index, gw) ({ 	bool syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_NET_IF_IPV4_SET_GW_BY_INDEX, net_if_ipv4_set_gw_by_index, index, gw); 	syscall__retval = net_if_ipv4_set_gw_by_index(index, gw); 	sys_port_trace_syscall_exit(K_SYSCALL_NET_IF_IPV4_SET_GW_BY_INDEX, net_if_ipv4_set_gw_by_index, index, gw, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern struct net_if * z_impl_net_if_get_by_index(int index);
+
+__pinned_func
+static inline struct net_if * net_if_get_by_index(int index)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; int val; } parm0 = { .val = index };
+		return (struct net_if *) arch_syscall_invoke1(parm0.x, K_SYSCALL_NET_IF_GET_BY_INDEX);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_net_if_get_by_index(index);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define net_if_get_by_index(index) ({ 	struct net_if * syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_NET_IF_GET_BY_INDEX, net_if_get_by_index, index); 	syscall__retval = net_if_get_by_index(index); 	sys_port_trace_syscall_exit(K_SYSCALL_NET_IF_GET_BY_INDEX, net_if_get_by_index, index, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif /* include guard */
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/net_ip.h b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/net_ip.h
new file mode 100644
index 0000000..6659cd4
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/net_ip.h
@@ -0,0 +1,79 @@
+/* auto-generated by gen_syscalls.py, don't edit */
+
+#ifndef Z_INCLUDE_SYSCALLS_NET_IP_H
+#define Z_INCLUDE_SYSCALLS_NET_IP_H
+
+
+#include <zephyr/tracing/tracing_syscall.h>
+
+#ifndef _ASMLANGUAGE
+
+#include <stdarg.h>
+
+#include <syscall_list.h>
+#include <zephyr/syscall.h>
+
+#include <zephyr/linker/sections.h>
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern int z_impl_net_addr_pton(sa_family_t family, const char * src, void * dst);
+
+__pinned_func
+static inline int net_addr_pton(sa_family_t family, const char * src, void * dst)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; sa_family_t val; } parm0 = { .val = family };
+		union { uintptr_t x; const char * val; } parm1 = { .val = src };
+		union { uintptr_t x; void * val; } parm2 = { .val = dst };
+		return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_NET_ADDR_PTON);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_net_addr_pton(family, src, dst);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define net_addr_pton(family, src, dst) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_NET_ADDR_PTON, net_addr_pton, family, src, dst); 	syscall__retval = net_addr_pton(family, src, dst); 	sys_port_trace_syscall_exit(K_SYSCALL_NET_ADDR_PTON, net_addr_pton, family, src, dst, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern char * z_impl_net_addr_ntop(sa_family_t family, const void * src, char * dst, size_t size);
+
+__pinned_func
+static inline char * net_addr_ntop(sa_family_t family, const void * src, char * dst, size_t size)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; sa_family_t val; } parm0 = { .val = family };
+		union { uintptr_t x; const void * val; } parm1 = { .val = src };
+		union { uintptr_t x; char * val; } parm2 = { .val = dst };
+		union { uintptr_t x; size_t val; } parm3 = { .val = size };
+		return (char *) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_NET_ADDR_NTOP);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_net_addr_ntop(family, src, dst, size);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define net_addr_ntop(family, src, dst, size) ({ 	char * syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_NET_ADDR_NTOP, net_addr_ntop, family, src, dst, size); 	syscall__retval = net_addr_ntop(family, src, dst, size); 	sys_port_trace_syscall_exit(K_SYSCALL_NET_ADDR_NTOP, net_addr_ntop, family, src, dst, size, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif /* include guard */
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/nrf_qspi_nor.h b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/nrf_qspi_nor.h
new file mode 100644
index 0000000..0caf244
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/nrf_qspi_nor.h
@@ -0,0 +1,53 @@
+/* auto-generated by gen_syscalls.py, don't edit */
+
+#ifndef Z_INCLUDE_SYSCALLS_NRF_QSPI_NOR_H
+#define Z_INCLUDE_SYSCALLS_NRF_QSPI_NOR_H
+
+
+#include <zephyr/tracing/tracing_syscall.h>
+
+#ifndef _ASMLANGUAGE
+
+#include <stdarg.h>
+
+#include <syscall_list.h>
+#include <zephyr/syscall.h>
+
+#include <zephyr/linker/sections.h>
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern void z_impl_nrf_qspi_nor_xip_enable(const struct device * dev, bool enable);
+
+__pinned_func
+static inline void nrf_qspi_nor_xip_enable(const struct device * dev, bool enable)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; bool val; } parm1 = { .val = enable };
+		(void) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_NRF_QSPI_NOR_XIP_ENABLE);
+		return;
+	}
+#endif
+	compiler_barrier();
+	z_impl_nrf_qspi_nor_xip_enable(dev, enable);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define nrf_qspi_nor_xip_enable(dev, enable) do { 	sys_port_trace_syscall_enter(K_SYSCALL_NRF_QSPI_NOR_XIP_ENABLE, nrf_qspi_nor_xip_enable, dev, enable); 	nrf_qspi_nor_xip_enable(dev, enable); 	sys_port_trace_syscall_exit(K_SYSCALL_NRF_QSPI_NOR_XIP_ENABLE, nrf_qspi_nor_xip_enable, dev, enable); } while(false)
+#endif
+#endif
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif /* include guard */
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/peci.h b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/peci.h
new file mode 100644
index 0000000..6d3a15a
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/peci.h
@@ -0,0 +1,122 @@
+/* auto-generated by gen_syscalls.py, don't edit */
+
+#ifndef Z_INCLUDE_SYSCALLS_PECI_H
+#define Z_INCLUDE_SYSCALLS_PECI_H
+
+
+#include <zephyr/tracing/tracing_syscall.h>
+
+#ifndef _ASMLANGUAGE
+
+#include <stdarg.h>
+
+#include <syscall_list.h>
+#include <zephyr/syscall.h>
+
+#include <zephyr/linker/sections.h>
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern int z_impl_peci_config(const struct device * dev, uint32_t bitrate);
+
+__pinned_func
+static inline int peci_config(const struct device * dev, uint32_t bitrate)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uint32_t val; } parm1 = { .val = bitrate };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_PECI_CONFIG);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_peci_config(dev, bitrate);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define peci_config(dev, bitrate) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_PECI_CONFIG, peci_config, dev, bitrate); 	syscall__retval = peci_config(dev, bitrate); 	sys_port_trace_syscall_exit(K_SYSCALL_PECI_CONFIG, peci_config, dev, bitrate, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_peci_enable(const struct device * dev);
+
+__pinned_func
+static inline int peci_enable(const struct device * dev)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_PECI_ENABLE);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_peci_enable(dev);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define peci_enable(dev) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_PECI_ENABLE, peci_enable, dev); 	syscall__retval = peci_enable(dev); 	sys_port_trace_syscall_exit(K_SYSCALL_PECI_ENABLE, peci_enable, dev, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_peci_disable(const struct device * dev);
+
+__pinned_func
+static inline int peci_disable(const struct device * dev)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_PECI_DISABLE);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_peci_disable(dev);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define peci_disable(dev) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_PECI_DISABLE, peci_disable, dev); 	syscall__retval = peci_disable(dev); 	sys_port_trace_syscall_exit(K_SYSCALL_PECI_DISABLE, peci_disable, dev, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_peci_transfer(const struct device * dev, struct peci_msg * msg);
+
+__pinned_func
+static inline int peci_transfer(const struct device * dev, struct peci_msg * msg)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; struct peci_msg * val; } parm1 = { .val = msg };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_PECI_TRANSFER);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_peci_transfer(dev, msg);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define peci_transfer(dev, msg) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_PECI_TRANSFER, peci_transfer, dev, msg); 	syscall__retval = peci_transfer(dev, msg); 	sys_port_trace_syscall_exit(K_SYSCALL_PECI_TRANSFER, peci_transfer, dev, msg, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif /* include guard */
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/posix_clock.h b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/posix_clock.h
new file mode 100644
index 0000000..0227397
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/posix_clock.h
@@ -0,0 +1,52 @@
+/* auto-generated by gen_syscalls.py, don't edit */
+
+#ifndef Z_INCLUDE_SYSCALLS_POSIX_CLOCK_H
+#define Z_INCLUDE_SYSCALLS_POSIX_CLOCK_H
+
+
+#include <zephyr/tracing/tracing_syscall.h>
+
+#ifndef _ASMLANGUAGE
+
+#include <stdarg.h>
+
+#include <syscall_list.h>
+#include <zephyr/syscall.h>
+
+#include <zephyr/linker/sections.h>
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern int z_impl___posix_clock_get_base(clockid_t clock_id, struct timespec * ts);
+
+__pinned_func
+static inline int __posix_clock_get_base(clockid_t clock_id, struct timespec * ts)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; clockid_t val; } parm0 = { .val = clock_id };
+		union { uintptr_t x; struct timespec * val; } parm1 = { .val = ts };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL___POSIX_CLOCK_GET_BASE);
+	}
+#endif
+	compiler_barrier();
+	return z_impl___posix_clock_get_base(clock_id, ts);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define __posix_clock_get_base(clock_id, ts) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL___POSIX_CLOCK_GET_BASE, __posix_clock_get_base, clock_id, ts); 	syscall__retval = __posix_clock_get_base(clock_id, ts); 	sys_port_trace_syscall_exit(K_SYSCALL___POSIX_CLOCK_GET_BASE, __posix_clock_get_base, clock_id, ts, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif /* include guard */
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/ps2.h b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/ps2.h
new file mode 100644
index 0000000..53ee99b
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/ps2.h
@@ -0,0 +1,146 @@
+/* auto-generated by gen_syscalls.py, don't edit */
+
+#ifndef Z_INCLUDE_SYSCALLS_PS2_H
+#define Z_INCLUDE_SYSCALLS_PS2_H
+
+
+#include <zephyr/tracing/tracing_syscall.h>
+
+#ifndef _ASMLANGUAGE
+
+#include <stdarg.h>
+
+#include <syscall_list.h>
+#include <zephyr/syscall.h>
+
+#include <zephyr/linker/sections.h>
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern int z_impl_ps2_config(const struct device * dev, ps2_callback_t callback_isr);
+
+__pinned_func
+static inline int ps2_config(const struct device * dev, ps2_callback_t callback_isr)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; ps2_callback_t val; } parm1 = { .val = callback_isr };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_PS2_CONFIG);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_ps2_config(dev, callback_isr);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define ps2_config(dev, callback_isr) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_PS2_CONFIG, ps2_config, dev, callback_isr); 	syscall__retval = ps2_config(dev, callback_isr); 	sys_port_trace_syscall_exit(K_SYSCALL_PS2_CONFIG, ps2_config, dev, callback_isr, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_ps2_write(const struct device * dev, uint8_t value);
+
+__pinned_func
+static inline int ps2_write(const struct device * dev, uint8_t value)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uint8_t val; } parm1 = { .val = value };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_PS2_WRITE);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_ps2_write(dev, value);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define ps2_write(dev, value) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_PS2_WRITE, ps2_write, dev, value); 	syscall__retval = ps2_write(dev, value); 	sys_port_trace_syscall_exit(K_SYSCALL_PS2_WRITE, ps2_write, dev, value, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_ps2_read(const struct device * dev, uint8_t * value);
+
+__pinned_func
+static inline int ps2_read(const struct device * dev, uint8_t * value)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uint8_t * val; } parm1 = { .val = value };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_PS2_READ);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_ps2_read(dev, value);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define ps2_read(dev, value) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_PS2_READ, ps2_read, dev, value); 	syscall__retval = ps2_read(dev, value); 	sys_port_trace_syscall_exit(K_SYSCALL_PS2_READ, ps2_read, dev, value, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_ps2_enable_callback(const struct device * dev);
+
+__pinned_func
+static inline int ps2_enable_callback(const struct device * dev)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_PS2_ENABLE_CALLBACK);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_ps2_enable_callback(dev);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define ps2_enable_callback(dev) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_PS2_ENABLE_CALLBACK, ps2_enable_callback, dev); 	syscall__retval = ps2_enable_callback(dev); 	sys_port_trace_syscall_exit(K_SYSCALL_PS2_ENABLE_CALLBACK, ps2_enable_callback, dev, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_ps2_disable_callback(const struct device * dev);
+
+__pinned_func
+static inline int ps2_disable_callback(const struct device * dev)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_PS2_DISABLE_CALLBACK);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_ps2_disable_callback(dev);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define ps2_disable_callback(dev) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_PS2_DISABLE_CALLBACK, ps2_disable_callback, dev); 	syscall__retval = ps2_disable_callback(dev); 	sys_port_trace_syscall_exit(K_SYSCALL_PS2_DISABLE_CALLBACK, ps2_disable_callback, dev, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif /* include guard */
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/ptp_clock.h b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/ptp_clock.h
new file mode 100644
index 0000000..c852ef2
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/ptp_clock.h
@@ -0,0 +1,52 @@
+/* auto-generated by gen_syscalls.py, don't edit */
+
+#ifndef Z_INCLUDE_SYSCALLS_PTP_CLOCK_H
+#define Z_INCLUDE_SYSCALLS_PTP_CLOCK_H
+
+
+#include <zephyr/tracing/tracing_syscall.h>
+
+#ifndef _ASMLANGUAGE
+
+#include <stdarg.h>
+
+#include <syscall_list.h>
+#include <zephyr/syscall.h>
+
+#include <zephyr/linker/sections.h>
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern int z_impl_ptp_clock_get(const struct device * dev, struct net_ptp_time * tm);
+
+__pinned_func
+static inline int ptp_clock_get(const struct device * dev, struct net_ptp_time * tm)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; struct net_ptp_time * val; } parm1 = { .val = tm };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_PTP_CLOCK_GET);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_ptp_clock_get(dev, tm);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define ptp_clock_get(dev, tm) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_PTP_CLOCK_GET, ptp_clock_get, dev, tm); 	syscall__retval = ptp_clock_get(dev, tm); 	sys_port_trace_syscall_exit(K_SYSCALL_PTP_CLOCK_GET, ptp_clock_get, dev, tm, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif /* include guard */
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/pwm.h b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/pwm.h
new file mode 100644
index 0000000..5c27060
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/pwm.h
@@ -0,0 +1,160 @@
+/* auto-generated by gen_syscalls.py, don't edit */
+
+#ifndef Z_INCLUDE_SYSCALLS_PWM_H
+#define Z_INCLUDE_SYSCALLS_PWM_H
+
+
+#include <zephyr/tracing/tracing_syscall.h>
+
+#ifndef _ASMLANGUAGE
+
+#include <stdarg.h>
+
+#include <syscall_list.h>
+#include <zephyr/syscall.h>
+
+#include <zephyr/linker/sections.h>
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern int z_impl_pwm_set_cycles(const struct device * dev, uint32_t channel, uint32_t period, uint32_t pulse, pwm_flags_t flags);
+
+__pinned_func
+static inline int pwm_set_cycles(const struct device * dev, uint32_t channel, uint32_t period, uint32_t pulse, pwm_flags_t flags)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uint32_t val; } parm1 = { .val = channel };
+		union { uintptr_t x; uint32_t val; } parm2 = { .val = period };
+		union { uintptr_t x; uint32_t val; } parm3 = { .val = pulse };
+		union { uintptr_t x; pwm_flags_t val; } parm4 = { .val = flags };
+		return (int) arch_syscall_invoke5(parm0.x, parm1.x, parm2.x, parm3.x, parm4.x, K_SYSCALL_PWM_SET_CYCLES);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_pwm_set_cycles(dev, channel, period, pulse, flags);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define pwm_set_cycles(dev, channel, period, pulse, flags) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_PWM_SET_CYCLES, pwm_set_cycles, dev, channel, period, pulse, flags); 	syscall__retval = pwm_set_cycles(dev, channel, period, pulse, flags); 	sys_port_trace_syscall_exit(K_SYSCALL_PWM_SET_CYCLES, pwm_set_cycles, dev, channel, period, pulse, flags, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_pwm_get_cycles_per_sec(const struct device * dev, uint32_t channel, uint64_t * cycles);
+
+__pinned_func
+static inline int pwm_get_cycles_per_sec(const struct device * dev, uint32_t channel, uint64_t * cycles)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uint32_t val; } parm1 = { .val = channel };
+		union { uintptr_t x; uint64_t * val; } parm2 = { .val = cycles };
+		return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_PWM_GET_CYCLES_PER_SEC);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_pwm_get_cycles_per_sec(dev, channel, cycles);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define pwm_get_cycles_per_sec(dev, channel, cycles) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_PWM_GET_CYCLES_PER_SEC, pwm_get_cycles_per_sec, dev, channel, cycles); 	syscall__retval = pwm_get_cycles_per_sec(dev, channel, cycles); 	sys_port_trace_syscall_exit(K_SYSCALL_PWM_GET_CYCLES_PER_SEC, pwm_get_cycles_per_sec, dev, channel, cycles, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_pwm_enable_capture(const struct device * dev, uint32_t channel);
+
+__pinned_func
+static inline int pwm_enable_capture(const struct device * dev, uint32_t channel)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uint32_t val; } parm1 = { .val = channel };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_PWM_ENABLE_CAPTURE);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_pwm_enable_capture(dev, channel);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define pwm_enable_capture(dev, channel) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_PWM_ENABLE_CAPTURE, pwm_enable_capture, dev, channel); 	syscall__retval = pwm_enable_capture(dev, channel); 	sys_port_trace_syscall_exit(K_SYSCALL_PWM_ENABLE_CAPTURE, pwm_enable_capture, dev, channel, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_pwm_disable_capture(const struct device * dev, uint32_t channel);
+
+__pinned_func
+static inline int pwm_disable_capture(const struct device * dev, uint32_t channel)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uint32_t val; } parm1 = { .val = channel };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_PWM_DISABLE_CAPTURE);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_pwm_disable_capture(dev, channel);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define pwm_disable_capture(dev, channel) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_PWM_DISABLE_CAPTURE, pwm_disable_capture, dev, channel); 	syscall__retval = pwm_disable_capture(dev, channel); 	sys_port_trace_syscall_exit(K_SYSCALL_PWM_DISABLE_CAPTURE, pwm_disable_capture, dev, channel, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_pwm_capture_cycles(const struct device * dev, uint32_t channel, pwm_flags_t flags, uint32_t * period, uint32_t * pulse, k_timeout_t timeout);
+
+__pinned_func
+static inline int pwm_capture_cycles(const struct device * dev, uint32_t channel, pwm_flags_t flags, uint32_t * period, uint32_t * pulse, k_timeout_t timeout)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uint32_t val; } parm1 = { .val = channel };
+		union { uintptr_t x; pwm_flags_t val; } parm2 = { .val = flags };
+		union { uintptr_t x; uint32_t * val; } parm3 = { .val = period };
+		union { uintptr_t x; uint32_t * val; } parm4 = { .val = pulse };
+		union { struct { uintptr_t lo, hi; } split; k_timeout_t val; } parm5 = { .val = timeout };
+		uintptr_t more[] = {
+			parm5.split.lo,
+			parm5.split.hi
+		};
+		return (int) arch_syscall_invoke6(parm0.x, parm1.x, parm2.x, parm3.x, parm4.x, (uintptr_t) &more, K_SYSCALL_PWM_CAPTURE_CYCLES);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_pwm_capture_cycles(dev, channel, flags, period, pulse, timeout);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define pwm_capture_cycles(dev, channel, flags, period, pulse, timeout) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_PWM_CAPTURE_CYCLES, pwm_capture_cycles, dev, channel, flags, period, pulse, timeout); 	syscall__retval = pwm_capture_cycles(dev, channel, flags, period, pulse, timeout); 	sys_port_trace_syscall_exit(K_SYSCALL_PWM_CAPTURE_CYCLES, pwm_capture_cycles, dev, channel, flags, period, pulse, timeout, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif /* include guard */
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/random.h b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/random.h
new file mode 100644
index 0000000..839bd2f
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/random.h
@@ -0,0 +1,77 @@
+/* auto-generated by gen_syscalls.py, don't edit */
+
+#ifndef Z_INCLUDE_SYSCALLS_RANDOM_H
+#define Z_INCLUDE_SYSCALLS_RANDOM_H
+
+
+#include <zephyr/tracing/tracing_syscall.h>
+
+#ifndef _ASMLANGUAGE
+
+#include <stdarg.h>
+
+#include <syscall_list.h>
+#include <zephyr/syscall.h>
+
+#include <zephyr/linker/sections.h>
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern void z_impl_sys_rand_get(void * dst, size_t len);
+
+__pinned_func
+static inline void sys_rand_get(void * dst, size_t len)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; void * val; } parm0 = { .val = dst };
+		union { uintptr_t x; size_t val; } parm1 = { .val = len };
+		(void) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_SYS_RAND_GET);
+		return;
+	}
+#endif
+	compiler_barrier();
+	z_impl_sys_rand_get(dst, len);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define sys_rand_get(dst, len) do { 	sys_port_trace_syscall_enter(K_SYSCALL_SYS_RAND_GET, sys_rand_get, dst, len); 	sys_rand_get(dst, len); 	sys_port_trace_syscall_exit(K_SYSCALL_SYS_RAND_GET, sys_rand_get, dst, len); } while(false)
+#endif
+#endif
+
+
+extern int z_impl_sys_csrand_get(void * dst, size_t len);
+
+__pinned_func
+static inline int sys_csrand_get(void * dst, size_t len)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; void * val; } parm0 = { .val = dst };
+		union { uintptr_t x; size_t val; } parm1 = { .val = len };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_SYS_CSRAND_GET);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_sys_csrand_get(dst, len);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define sys_csrand_get(dst, len) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_SYS_CSRAND_GET, sys_csrand_get, dst, len); 	syscall__retval = sys_csrand_get(dst, len); 	sys_port_trace_syscall_exit(K_SYSCALL_SYS_CSRAND_GET, sys_csrand_get, dst, len, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif /* include guard */
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/reset.h b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/reset.h
new file mode 100644
index 0000000..4da372c
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/reset.h
@@ -0,0 +1,125 @@
+/* auto-generated by gen_syscalls.py, don't edit */
+
+#ifndef Z_INCLUDE_SYSCALLS_RESET_H
+#define Z_INCLUDE_SYSCALLS_RESET_H
+
+
+#include <zephyr/tracing/tracing_syscall.h>
+
+#ifndef _ASMLANGUAGE
+
+#include <stdarg.h>
+
+#include <syscall_list.h>
+#include <zephyr/syscall.h>
+
+#include <zephyr/linker/sections.h>
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern int z_impl_reset_status(const struct device * dev, uint32_t id, uint8_t * status);
+
+__pinned_func
+static inline int reset_status(const struct device * dev, uint32_t id, uint8_t * status)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uint32_t val; } parm1 = { .val = id };
+		union { uintptr_t x; uint8_t * val; } parm2 = { .val = status };
+		return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_RESET_STATUS);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_reset_status(dev, id, status);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define reset_status(dev, id, status) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_RESET_STATUS, reset_status, dev, id, status); 	syscall__retval = reset_status(dev, id, status); 	sys_port_trace_syscall_exit(K_SYSCALL_RESET_STATUS, reset_status, dev, id, status, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_reset_line_assert(const struct device * dev, uint32_t id);
+
+__pinned_func
+static inline int reset_line_assert(const struct device * dev, uint32_t id)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uint32_t val; } parm1 = { .val = id };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_RESET_LINE_ASSERT);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_reset_line_assert(dev, id);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define reset_line_assert(dev, id) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_RESET_LINE_ASSERT, reset_line_assert, dev, id); 	syscall__retval = reset_line_assert(dev, id); 	sys_port_trace_syscall_exit(K_SYSCALL_RESET_LINE_ASSERT, reset_line_assert, dev, id, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_reset_line_deassert(const struct device * dev, uint32_t id);
+
+__pinned_func
+static inline int reset_line_deassert(const struct device * dev, uint32_t id)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uint32_t val; } parm1 = { .val = id };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_RESET_LINE_DEASSERT);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_reset_line_deassert(dev, id);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define reset_line_deassert(dev, id) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_RESET_LINE_DEASSERT, reset_line_deassert, dev, id); 	syscall__retval = reset_line_deassert(dev, id); 	sys_port_trace_syscall_exit(K_SYSCALL_RESET_LINE_DEASSERT, reset_line_deassert, dev, id, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_reset_line_toggle(const struct device * dev, uint32_t id);
+
+__pinned_func
+static inline int reset_line_toggle(const struct device * dev, uint32_t id)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uint32_t val; } parm1 = { .val = id };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_RESET_LINE_TOGGLE);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_reset_line_toggle(dev, id);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define reset_line_toggle(dev, id) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_RESET_LINE_TOGGLE, reset_line_toggle, dev, id); 	syscall__retval = reset_line_toggle(dev, id); 	sys_port_trace_syscall_exit(K_SYSCALL_RESET_LINE_TOGGLE, reset_line_toggle, dev, id, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif /* include guard */
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/retained_mem.h b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/retained_mem.h
new file mode 100644
index 0000000..5495846
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/retained_mem.h
@@ -0,0 +1,126 @@
+/* auto-generated by gen_syscalls.py, don't edit */
+
+#ifndef Z_INCLUDE_SYSCALLS_RETAINED_MEM_H
+#define Z_INCLUDE_SYSCALLS_RETAINED_MEM_H
+
+
+#include <zephyr/tracing/tracing_syscall.h>
+
+#ifndef _ASMLANGUAGE
+
+#include <stdarg.h>
+
+#include <syscall_list.h>
+#include <zephyr/syscall.h>
+
+#include <zephyr/linker/sections.h>
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern ssize_t z_impl_retained_mem_size(const struct device * dev);
+
+__pinned_func
+static inline ssize_t retained_mem_size(const struct device * dev)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		return (ssize_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_RETAINED_MEM_SIZE);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_retained_mem_size(dev);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define retained_mem_size(dev) ({ 	ssize_t syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_RETAINED_MEM_SIZE, retained_mem_size, dev); 	syscall__retval = retained_mem_size(dev); 	sys_port_trace_syscall_exit(K_SYSCALL_RETAINED_MEM_SIZE, retained_mem_size, dev, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_retained_mem_read(const struct device * dev, off_t offset, uint8_t * buffer, size_t size);
+
+__pinned_func
+static inline int retained_mem_read(const struct device * dev, off_t offset, uint8_t * buffer, size_t size)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; off_t val; } parm1 = { .val = offset };
+		union { uintptr_t x; uint8_t * val; } parm2 = { .val = buffer };
+		union { uintptr_t x; size_t val; } parm3 = { .val = size };
+		return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_RETAINED_MEM_READ);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_retained_mem_read(dev, offset, buffer, size);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define retained_mem_read(dev, offset, buffer, size) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_RETAINED_MEM_READ, retained_mem_read, dev, offset, buffer, size); 	syscall__retval = retained_mem_read(dev, offset, buffer, size); 	sys_port_trace_syscall_exit(K_SYSCALL_RETAINED_MEM_READ, retained_mem_read, dev, offset, buffer, size, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_retained_mem_write(const struct device * dev, off_t offset, const uint8_t * buffer, size_t size);
+
+__pinned_func
+static inline int retained_mem_write(const struct device * dev, off_t offset, const uint8_t * buffer, size_t size)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; off_t val; } parm1 = { .val = offset };
+		union { uintptr_t x; const uint8_t * val; } parm2 = { .val = buffer };
+		union { uintptr_t x; size_t val; } parm3 = { .val = size };
+		return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_RETAINED_MEM_WRITE);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_retained_mem_write(dev, offset, buffer, size);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define retained_mem_write(dev, offset, buffer, size) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_RETAINED_MEM_WRITE, retained_mem_write, dev, offset, buffer, size); 	syscall__retval = retained_mem_write(dev, offset, buffer, size); 	sys_port_trace_syscall_exit(K_SYSCALL_RETAINED_MEM_WRITE, retained_mem_write, dev, offset, buffer, size, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_retained_mem_clear(const struct device * dev);
+
+__pinned_func
+static inline int retained_mem_clear(const struct device * dev)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_RETAINED_MEM_CLEAR);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_retained_mem_clear(dev);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define retained_mem_clear(dev) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_RETAINED_MEM_CLEAR, retained_mem_clear, dev); 	syscall__retval = retained_mem_clear(dev); 	sys_port_trace_syscall_exit(K_SYSCALL_RETAINED_MEM_CLEAR, retained_mem_clear, dev, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif /* include guard */
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/rtc.h b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/rtc.h
new file mode 100644
index 0000000..038f1b7
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/rtc.h
@@ -0,0 +1,276 @@
+/* auto-generated by gen_syscalls.py, don't edit */
+
+#ifndef Z_INCLUDE_SYSCALLS_RTC_H
+#define Z_INCLUDE_SYSCALLS_RTC_H
+
+
+#include <zephyr/tracing/tracing_syscall.h>
+
+#ifndef _ASMLANGUAGE
+
+#include <stdarg.h>
+
+#include <syscall_list.h>
+#include <zephyr/syscall.h>
+
+#include <zephyr/linker/sections.h>
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern int z_impl_rtc_set_time(const struct device * dev, const struct rtc_time * timeptr);
+
+__pinned_func
+static inline int rtc_set_time(const struct device * dev, const struct rtc_time * timeptr)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; const struct rtc_time * val; } parm1 = { .val = timeptr };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_RTC_SET_TIME);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_rtc_set_time(dev, timeptr);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define rtc_set_time(dev, timeptr) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_RTC_SET_TIME, rtc_set_time, dev, timeptr); 	syscall__retval = rtc_set_time(dev, timeptr); 	sys_port_trace_syscall_exit(K_SYSCALL_RTC_SET_TIME, rtc_set_time, dev, timeptr, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_rtc_get_time(const struct device * dev, struct rtc_time * timeptr);
+
+__pinned_func
+static inline int rtc_get_time(const struct device * dev, struct rtc_time * timeptr)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; struct rtc_time * val; } parm1 = { .val = timeptr };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_RTC_GET_TIME);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_rtc_get_time(dev, timeptr);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define rtc_get_time(dev, timeptr) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_RTC_GET_TIME, rtc_get_time, dev, timeptr); 	syscall__retval = rtc_get_time(dev, timeptr); 	sys_port_trace_syscall_exit(K_SYSCALL_RTC_GET_TIME, rtc_get_time, dev, timeptr, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_rtc_alarm_get_supported_fields(const struct device * dev, uint16_t id, uint16_t * mask);
+
+__pinned_func
+static inline int rtc_alarm_get_supported_fields(const struct device * dev, uint16_t id, uint16_t * mask)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uint16_t val; } parm1 = { .val = id };
+		union { uintptr_t x; uint16_t * val; } parm2 = { .val = mask };
+		return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_RTC_ALARM_GET_SUPPORTED_FIELDS);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_rtc_alarm_get_supported_fields(dev, id, mask);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define rtc_alarm_get_supported_fields(dev, id, mask) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_RTC_ALARM_GET_SUPPORTED_FIELDS, rtc_alarm_get_supported_fields, dev, id, mask); 	syscall__retval = rtc_alarm_get_supported_fields(dev, id, mask); 	sys_port_trace_syscall_exit(K_SYSCALL_RTC_ALARM_GET_SUPPORTED_FIELDS, rtc_alarm_get_supported_fields, dev, id, mask, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_rtc_alarm_set_time(const struct device * dev, uint16_t id, uint16_t mask, const struct rtc_time * timeptr);
+
+__pinned_func
+static inline int rtc_alarm_set_time(const struct device * dev, uint16_t id, uint16_t mask, const struct rtc_time * timeptr)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uint16_t val; } parm1 = { .val = id };
+		union { uintptr_t x; uint16_t val; } parm2 = { .val = mask };
+		union { uintptr_t x; const struct rtc_time * val; } parm3 = { .val = timeptr };
+		return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_RTC_ALARM_SET_TIME);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_rtc_alarm_set_time(dev, id, mask, timeptr);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define rtc_alarm_set_time(dev, id, mask, timeptr) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_RTC_ALARM_SET_TIME, rtc_alarm_set_time, dev, id, mask, timeptr); 	syscall__retval = rtc_alarm_set_time(dev, id, mask, timeptr); 	sys_port_trace_syscall_exit(K_SYSCALL_RTC_ALARM_SET_TIME, rtc_alarm_set_time, dev, id, mask, timeptr, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_rtc_alarm_get_time(const struct device * dev, uint16_t id, uint16_t * mask, struct rtc_time * timeptr);
+
+__pinned_func
+static inline int rtc_alarm_get_time(const struct device * dev, uint16_t id, uint16_t * mask, struct rtc_time * timeptr)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uint16_t val; } parm1 = { .val = id };
+		union { uintptr_t x; uint16_t * val; } parm2 = { .val = mask };
+		union { uintptr_t x; struct rtc_time * val; } parm3 = { .val = timeptr };
+		return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_RTC_ALARM_GET_TIME);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_rtc_alarm_get_time(dev, id, mask, timeptr);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define rtc_alarm_get_time(dev, id, mask, timeptr) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_RTC_ALARM_GET_TIME, rtc_alarm_get_time, dev, id, mask, timeptr); 	syscall__retval = rtc_alarm_get_time(dev, id, mask, timeptr); 	sys_port_trace_syscall_exit(K_SYSCALL_RTC_ALARM_GET_TIME, rtc_alarm_get_time, dev, id, mask, timeptr, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_rtc_alarm_is_pending(const struct device * dev, uint16_t id);
+
+__pinned_func
+static inline int rtc_alarm_is_pending(const struct device * dev, uint16_t id)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uint16_t val; } parm1 = { .val = id };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_RTC_ALARM_IS_PENDING);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_rtc_alarm_is_pending(dev, id);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define rtc_alarm_is_pending(dev, id) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_RTC_ALARM_IS_PENDING, rtc_alarm_is_pending, dev, id); 	syscall__retval = rtc_alarm_is_pending(dev, id); 	sys_port_trace_syscall_exit(K_SYSCALL_RTC_ALARM_IS_PENDING, rtc_alarm_is_pending, dev, id, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_rtc_alarm_set_callback(const struct device * dev, uint16_t id, rtc_alarm_callback callback, void * user_data);
+
+__pinned_func
+static inline int rtc_alarm_set_callback(const struct device * dev, uint16_t id, rtc_alarm_callback callback, void * user_data)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uint16_t val; } parm1 = { .val = id };
+		union { uintptr_t x; rtc_alarm_callback val; } parm2 = { .val = callback };
+		union { uintptr_t x; void * val; } parm3 = { .val = user_data };
+		return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_RTC_ALARM_SET_CALLBACK);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_rtc_alarm_set_callback(dev, id, callback, user_data);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define rtc_alarm_set_callback(dev, id, callback, user_data) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_RTC_ALARM_SET_CALLBACK, rtc_alarm_set_callback, dev, id, callback, user_data); 	syscall__retval = rtc_alarm_set_callback(dev, id, callback, user_data); 	sys_port_trace_syscall_exit(K_SYSCALL_RTC_ALARM_SET_CALLBACK, rtc_alarm_set_callback, dev, id, callback, user_data, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_rtc_update_set_callback(const struct device * dev, rtc_update_callback callback, void * user_data);
+
+__pinned_func
+static inline int rtc_update_set_callback(const struct device * dev, rtc_update_callback callback, void * user_data)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; rtc_update_callback val; } parm1 = { .val = callback };
+		union { uintptr_t x; void * val; } parm2 = { .val = user_data };
+		return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_RTC_UPDATE_SET_CALLBACK);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_rtc_update_set_callback(dev, callback, user_data);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define rtc_update_set_callback(dev, callback, user_data) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_RTC_UPDATE_SET_CALLBACK, rtc_update_set_callback, dev, callback, user_data); 	syscall__retval = rtc_update_set_callback(dev, callback, user_data); 	sys_port_trace_syscall_exit(K_SYSCALL_RTC_UPDATE_SET_CALLBACK, rtc_update_set_callback, dev, callback, user_data, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_rtc_set_calibration(const struct device * dev, int32_t calibration);
+
+__pinned_func
+static inline int rtc_set_calibration(const struct device * dev, int32_t calibration)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; int32_t val; } parm1 = { .val = calibration };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_RTC_SET_CALIBRATION);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_rtc_set_calibration(dev, calibration);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define rtc_set_calibration(dev, calibration) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_RTC_SET_CALIBRATION, rtc_set_calibration, dev, calibration); 	syscall__retval = rtc_set_calibration(dev, calibration); 	sys_port_trace_syscall_exit(K_SYSCALL_RTC_SET_CALIBRATION, rtc_set_calibration, dev, calibration, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_rtc_get_calibration(const struct device * dev, int32_t * calibration);
+
+__pinned_func
+static inline int rtc_get_calibration(const struct device * dev, int32_t * calibration)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; int32_t * val; } parm1 = { .val = calibration };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_RTC_GET_CALIBRATION);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_rtc_get_calibration(dev, calibration);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define rtc_get_calibration(dev, calibration) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_RTC_GET_CALIBRATION, rtc_get_calibration, dev, calibration); 	syscall__retval = rtc_get_calibration(dev, calibration); 	sys_port_trace_syscall_exit(K_SYSCALL_RTC_GET_CALIBRATION, rtc_get_calibration, dev, calibration, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif /* include guard */
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/rtio.h b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/rtio.h
new file mode 100644
index 0000000..2f53a5f
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/rtio.h
@@ -0,0 +1,179 @@
+/* auto-generated by gen_syscalls.py, don't edit */
+
+#ifndef Z_INCLUDE_SYSCALLS_RTIO_H
+#define Z_INCLUDE_SYSCALLS_RTIO_H
+
+
+#include <zephyr/tracing/tracing_syscall.h>
+
+#ifndef _ASMLANGUAGE
+
+#include <stdarg.h>
+
+#include <syscall_list.h>
+#include <zephyr/syscall.h>
+
+#include <zephyr/linker/sections.h>
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern int z_impl_rtio_cqe_get_mempool_buffer(const struct rtio * r, struct rtio_cqe * cqe, uint8_t ** buff, uint32_t * buff_len);
+
+__pinned_func
+static inline int rtio_cqe_get_mempool_buffer(const struct rtio * r, struct rtio_cqe * cqe, uint8_t ** buff, uint32_t * buff_len)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct rtio * val; } parm0 = { .val = r };
+		union { uintptr_t x; struct rtio_cqe * val; } parm1 = { .val = cqe };
+		union { uintptr_t x; uint8_t ** val; } parm2 = { .val = buff };
+		union { uintptr_t x; uint32_t * val; } parm3 = { .val = buff_len };
+		return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_RTIO_CQE_GET_MEMPOOL_BUFFER);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_rtio_cqe_get_mempool_buffer(r, cqe, buff, buff_len);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define rtio_cqe_get_mempool_buffer(r, cqe, buff, buff_len) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_RTIO_CQE_GET_MEMPOOL_BUFFER, rtio_cqe_get_mempool_buffer, r, cqe, buff, buff_len); 	syscall__retval = rtio_cqe_get_mempool_buffer(r, cqe, buff, buff_len); 	sys_port_trace_syscall_exit(K_SYSCALL_RTIO_CQE_GET_MEMPOOL_BUFFER, rtio_cqe_get_mempool_buffer, r, cqe, buff, buff_len, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern void z_impl_rtio_release_buffer(struct rtio * r, void * buff, uint32_t buff_len);
+
+__pinned_func
+static inline void rtio_release_buffer(struct rtio * r, void * buff, uint32_t buff_len)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; struct rtio * val; } parm0 = { .val = r };
+		union { uintptr_t x; void * val; } parm1 = { .val = buff };
+		union { uintptr_t x; uint32_t val; } parm2 = { .val = buff_len };
+		(void) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_RTIO_RELEASE_BUFFER);
+		return;
+	}
+#endif
+	compiler_barrier();
+	z_impl_rtio_release_buffer(r, buff, buff_len);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define rtio_release_buffer(r, buff, buff_len) do { 	sys_port_trace_syscall_enter(K_SYSCALL_RTIO_RELEASE_BUFFER, rtio_release_buffer, r, buff, buff_len); 	rtio_release_buffer(r, buff, buff_len); 	sys_port_trace_syscall_exit(K_SYSCALL_RTIO_RELEASE_BUFFER, rtio_release_buffer, r, buff, buff_len); } while(false)
+#endif
+#endif
+
+
+extern int z_impl_rtio_sqe_cancel(struct rtio_sqe * sqe);
+
+__pinned_func
+static inline int rtio_sqe_cancel(struct rtio_sqe * sqe)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; struct rtio_sqe * val; } parm0 = { .val = sqe };
+		return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_RTIO_SQE_CANCEL);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_rtio_sqe_cancel(sqe);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define rtio_sqe_cancel(sqe) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_RTIO_SQE_CANCEL, rtio_sqe_cancel, sqe); 	syscall__retval = rtio_sqe_cancel(sqe); 	sys_port_trace_syscall_exit(K_SYSCALL_RTIO_SQE_CANCEL, rtio_sqe_cancel, sqe, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_rtio_sqe_copy_in_get_handles(struct rtio * r, const struct rtio_sqe * sqes, struct rtio_sqe ** handle, size_t sqe_count);
+
+__pinned_func
+static inline int rtio_sqe_copy_in_get_handles(struct rtio * r, const struct rtio_sqe * sqes, struct rtio_sqe ** handle, size_t sqe_count)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; struct rtio * val; } parm0 = { .val = r };
+		union { uintptr_t x; const struct rtio_sqe * val; } parm1 = { .val = sqes };
+		union { uintptr_t x; struct rtio_sqe ** val; } parm2 = { .val = handle };
+		union { uintptr_t x; size_t val; } parm3 = { .val = sqe_count };
+		return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_RTIO_SQE_COPY_IN_GET_HANDLES);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_rtio_sqe_copy_in_get_handles(r, sqes, handle, sqe_count);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define rtio_sqe_copy_in_get_handles(r, sqes, handle, sqe_count) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_RTIO_SQE_COPY_IN_GET_HANDLES, rtio_sqe_copy_in_get_handles, r, sqes, handle, sqe_count); 	syscall__retval = rtio_sqe_copy_in_get_handles(r, sqes, handle, sqe_count); 	sys_port_trace_syscall_exit(K_SYSCALL_RTIO_SQE_COPY_IN_GET_HANDLES, rtio_sqe_copy_in_get_handles, r, sqes, handle, sqe_count, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_rtio_cqe_copy_out(struct rtio * r, struct rtio_cqe * cqes, size_t cqe_count, k_timeout_t timeout);
+
+__pinned_func
+static inline int rtio_cqe_copy_out(struct rtio * r, struct rtio_cqe * cqes, size_t cqe_count, k_timeout_t timeout)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; struct rtio * val; } parm0 = { .val = r };
+		union { uintptr_t x; struct rtio_cqe * val; } parm1 = { .val = cqes };
+		union { uintptr_t x; size_t val; } parm2 = { .val = cqe_count };
+		union { struct { uintptr_t lo, hi; } split; k_timeout_t val; } parm3 = { .val = timeout };
+		return (int) arch_syscall_invoke5(parm0.x, parm1.x, parm2.x, parm3.split.lo, parm3.split.hi, K_SYSCALL_RTIO_CQE_COPY_OUT);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_rtio_cqe_copy_out(r, cqes, cqe_count, timeout);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define rtio_cqe_copy_out(r, cqes, cqe_count, timeout) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_RTIO_CQE_COPY_OUT, rtio_cqe_copy_out, r, cqes, cqe_count, timeout); 	syscall__retval = rtio_cqe_copy_out(r, cqes, cqe_count, timeout); 	sys_port_trace_syscall_exit(K_SYSCALL_RTIO_CQE_COPY_OUT, rtio_cqe_copy_out, r, cqes, cqe_count, timeout, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_rtio_submit(struct rtio * r, uint32_t wait_count);
+
+__pinned_func
+static inline int rtio_submit(struct rtio * r, uint32_t wait_count)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; struct rtio * val; } parm0 = { .val = r };
+		union { uintptr_t x; uint32_t val; } parm1 = { .val = wait_count };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_RTIO_SUBMIT);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_rtio_submit(r, wait_count);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define rtio_submit(r, wait_count) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_RTIO_SUBMIT, rtio_submit, r, wait_count); 	syscall__retval = rtio_submit(r, wait_count); 	sys_port_trace_syscall_exit(K_SYSCALL_RTIO_SUBMIT, rtio_submit, r, wait_count, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif /* include guard */
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/sdhc.h b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/sdhc.h
new file mode 100644
index 0000000..fe27319
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/sdhc.h
@@ -0,0 +1,243 @@
+/* auto-generated by gen_syscalls.py, don't edit */
+
+#ifndef Z_INCLUDE_SYSCALLS_SDHC_H
+#define Z_INCLUDE_SYSCALLS_SDHC_H
+
+
+#include <zephyr/tracing/tracing_syscall.h>
+
+#ifndef _ASMLANGUAGE
+
+#include <stdarg.h>
+
+#include <syscall_list.h>
+#include <zephyr/syscall.h>
+
+#include <zephyr/linker/sections.h>
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern int z_impl_sdhc_hw_reset(const struct device * dev);
+
+__pinned_func
+static inline int sdhc_hw_reset(const struct device * dev)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_SDHC_HW_RESET);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_sdhc_hw_reset(dev);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define sdhc_hw_reset(dev) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_SDHC_HW_RESET, sdhc_hw_reset, dev); 	syscall__retval = sdhc_hw_reset(dev); 	sys_port_trace_syscall_exit(K_SYSCALL_SDHC_HW_RESET, sdhc_hw_reset, dev, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_sdhc_request(const struct device * dev, struct sdhc_command * cmd, struct sdhc_data * data);
+
+__pinned_func
+static inline int sdhc_request(const struct device * dev, struct sdhc_command * cmd, struct sdhc_data * data)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; struct sdhc_command * val; } parm1 = { .val = cmd };
+		union { uintptr_t x; struct sdhc_data * val; } parm2 = { .val = data };
+		return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_SDHC_REQUEST);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_sdhc_request(dev, cmd, data);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define sdhc_request(dev, cmd, data) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_SDHC_REQUEST, sdhc_request, dev, cmd, data); 	syscall__retval = sdhc_request(dev, cmd, data); 	sys_port_trace_syscall_exit(K_SYSCALL_SDHC_REQUEST, sdhc_request, dev, cmd, data, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_sdhc_set_io(const struct device * dev, struct sdhc_io * io);
+
+__pinned_func
+static inline int sdhc_set_io(const struct device * dev, struct sdhc_io * io)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; struct sdhc_io * val; } parm1 = { .val = io };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_SDHC_SET_IO);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_sdhc_set_io(dev, io);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define sdhc_set_io(dev, io) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_SDHC_SET_IO, sdhc_set_io, dev, io); 	syscall__retval = sdhc_set_io(dev, io); 	sys_port_trace_syscall_exit(K_SYSCALL_SDHC_SET_IO, sdhc_set_io, dev, io, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_sdhc_card_present(const struct device * dev);
+
+__pinned_func
+static inline int sdhc_card_present(const struct device * dev)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_SDHC_CARD_PRESENT);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_sdhc_card_present(dev);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define sdhc_card_present(dev) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_SDHC_CARD_PRESENT, sdhc_card_present, dev); 	syscall__retval = sdhc_card_present(dev); 	sys_port_trace_syscall_exit(K_SYSCALL_SDHC_CARD_PRESENT, sdhc_card_present, dev, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_sdhc_execute_tuning(const struct device * dev);
+
+__pinned_func
+static inline int sdhc_execute_tuning(const struct device * dev)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_SDHC_EXECUTE_TUNING);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_sdhc_execute_tuning(dev);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define sdhc_execute_tuning(dev) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_SDHC_EXECUTE_TUNING, sdhc_execute_tuning, dev); 	syscall__retval = sdhc_execute_tuning(dev); 	sys_port_trace_syscall_exit(K_SYSCALL_SDHC_EXECUTE_TUNING, sdhc_execute_tuning, dev, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_sdhc_card_busy(const struct device * dev);
+
+__pinned_func
+static inline int sdhc_card_busy(const struct device * dev)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_SDHC_CARD_BUSY);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_sdhc_card_busy(dev);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define sdhc_card_busy(dev) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_SDHC_CARD_BUSY, sdhc_card_busy, dev); 	syscall__retval = sdhc_card_busy(dev); 	sys_port_trace_syscall_exit(K_SYSCALL_SDHC_CARD_BUSY, sdhc_card_busy, dev, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_sdhc_get_host_props(const struct device * dev, struct sdhc_host_props * props);
+
+__pinned_func
+static inline int sdhc_get_host_props(const struct device * dev, struct sdhc_host_props * props)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; struct sdhc_host_props * val; } parm1 = { .val = props };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_SDHC_GET_HOST_PROPS);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_sdhc_get_host_props(dev, props);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define sdhc_get_host_props(dev, props) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_SDHC_GET_HOST_PROPS, sdhc_get_host_props, dev, props); 	syscall__retval = sdhc_get_host_props(dev, props); 	sys_port_trace_syscall_exit(K_SYSCALL_SDHC_GET_HOST_PROPS, sdhc_get_host_props, dev, props, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_sdhc_enable_interrupt(const struct device * dev, sdhc_interrupt_cb_t callback, int sources, void * user_data);
+
+__pinned_func
+static inline int sdhc_enable_interrupt(const struct device * dev, sdhc_interrupt_cb_t callback, int sources, void * user_data)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; sdhc_interrupt_cb_t val; } parm1 = { .val = callback };
+		union { uintptr_t x; int val; } parm2 = { .val = sources };
+		union { uintptr_t x; void * val; } parm3 = { .val = user_data };
+		return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_SDHC_ENABLE_INTERRUPT);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_sdhc_enable_interrupt(dev, callback, sources, user_data);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define sdhc_enable_interrupt(dev, callback, sources, user_data) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_SDHC_ENABLE_INTERRUPT, sdhc_enable_interrupt, dev, callback, sources, user_data); 	syscall__retval = sdhc_enable_interrupt(dev, callback, sources, user_data); 	sys_port_trace_syscall_exit(K_SYSCALL_SDHC_ENABLE_INTERRUPT, sdhc_enable_interrupt, dev, callback, sources, user_data, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_sdhc_disable_interrupt(const struct device * dev, int sources);
+
+__pinned_func
+static inline int sdhc_disable_interrupt(const struct device * dev, int sources)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; int val; } parm1 = { .val = sources };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_SDHC_DISABLE_INTERRUPT);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_sdhc_disable_interrupt(dev, sources);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define sdhc_disable_interrupt(dev, sources) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_SDHC_DISABLE_INTERRUPT, sdhc_disable_interrupt, dev, sources); 	syscall__retval = sdhc_disable_interrupt(dev, sources); 	sys_port_trace_syscall_exit(K_SYSCALL_SDHC_DISABLE_INTERRUPT, sdhc_disable_interrupt, dev, sources, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif /* include guard */
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/sensor.h b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/sensor.h
new file mode 100644
index 0000000..0837868
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/sensor.h
@@ -0,0 +1,202 @@
+/* auto-generated by gen_syscalls.py, don't edit */
+
+#ifndef Z_INCLUDE_SYSCALLS_SENSOR_H
+#define Z_INCLUDE_SYSCALLS_SENSOR_H
+
+
+#include <zephyr/tracing/tracing_syscall.h>
+
+#ifndef _ASMLANGUAGE
+
+#include <stdarg.h>
+
+#include <syscall_list.h>
+#include <zephyr/syscall.h>
+
+#include <zephyr/linker/sections.h>
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern int z_impl_sensor_attr_set(const struct device * dev, enum sensor_channel chan, enum sensor_attribute attr, const struct sensor_value * val);
+
+__pinned_func
+static inline int sensor_attr_set(const struct device * dev, enum sensor_channel chan, enum sensor_attribute attr, const struct sensor_value * val)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; enum sensor_channel val; } parm1 = { .val = chan };
+		union { uintptr_t x; enum sensor_attribute val; } parm2 = { .val = attr };
+		union { uintptr_t x; const struct sensor_value * val; } parm3 = { .val = val };
+		return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_SENSOR_ATTR_SET);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_sensor_attr_set(dev, chan, attr, val);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define sensor_attr_set(dev, chan, attr, val) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_SENSOR_ATTR_SET, sensor_attr_set, dev, chan, attr, val); 	syscall__retval = sensor_attr_set(dev, chan, attr, val); 	sys_port_trace_syscall_exit(K_SYSCALL_SENSOR_ATTR_SET, sensor_attr_set, dev, chan, attr, val, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_sensor_attr_get(const struct device * dev, enum sensor_channel chan, enum sensor_attribute attr, struct sensor_value * val);
+
+__pinned_func
+static inline int sensor_attr_get(const struct device * dev, enum sensor_channel chan, enum sensor_attribute attr, struct sensor_value * val)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; enum sensor_channel val; } parm1 = { .val = chan };
+		union { uintptr_t x; enum sensor_attribute val; } parm2 = { .val = attr };
+		union { uintptr_t x; struct sensor_value * val; } parm3 = { .val = val };
+		return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_SENSOR_ATTR_GET);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_sensor_attr_get(dev, chan, attr, val);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define sensor_attr_get(dev, chan, attr, val) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_SENSOR_ATTR_GET, sensor_attr_get, dev, chan, attr, val); 	syscall__retval = sensor_attr_get(dev, chan, attr, val); 	sys_port_trace_syscall_exit(K_SYSCALL_SENSOR_ATTR_GET, sensor_attr_get, dev, chan, attr, val, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_sensor_sample_fetch(const struct device * dev);
+
+__pinned_func
+static inline int sensor_sample_fetch(const struct device * dev)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_SENSOR_SAMPLE_FETCH);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_sensor_sample_fetch(dev);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define sensor_sample_fetch(dev) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_SENSOR_SAMPLE_FETCH, sensor_sample_fetch, dev); 	syscall__retval = sensor_sample_fetch(dev); 	sys_port_trace_syscall_exit(K_SYSCALL_SENSOR_SAMPLE_FETCH, sensor_sample_fetch, dev, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_sensor_sample_fetch_chan(const struct device * dev, enum sensor_channel type);
+
+__pinned_func
+static inline int sensor_sample_fetch_chan(const struct device * dev, enum sensor_channel type)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; enum sensor_channel val; } parm1 = { .val = type };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_SENSOR_SAMPLE_FETCH_CHAN);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_sensor_sample_fetch_chan(dev, type);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define sensor_sample_fetch_chan(dev, type) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_SENSOR_SAMPLE_FETCH_CHAN, sensor_sample_fetch_chan, dev, type); 	syscall__retval = sensor_sample_fetch_chan(dev, type); 	sys_port_trace_syscall_exit(K_SYSCALL_SENSOR_SAMPLE_FETCH_CHAN, sensor_sample_fetch_chan, dev, type, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_sensor_channel_get(const struct device * dev, enum sensor_channel chan, struct sensor_value * val);
+
+__pinned_func
+static inline int sensor_channel_get(const struct device * dev, enum sensor_channel chan, struct sensor_value * val)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; enum sensor_channel val; } parm1 = { .val = chan };
+		union { uintptr_t x; struct sensor_value * val; } parm2 = { .val = val };
+		return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_SENSOR_CHANNEL_GET);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_sensor_channel_get(dev, chan, val);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define sensor_channel_get(dev, chan, val) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_SENSOR_CHANNEL_GET, sensor_channel_get, dev, chan, val); 	syscall__retval = sensor_channel_get(dev, chan, val); 	sys_port_trace_syscall_exit(K_SYSCALL_SENSOR_CHANNEL_GET, sensor_channel_get, dev, chan, val, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_sensor_get_decoder(const struct device * dev, const struct sensor_decoder_api ** decoder);
+
+__pinned_func
+static inline int sensor_get_decoder(const struct device * dev, const struct sensor_decoder_api ** decoder)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; const struct sensor_decoder_api ** val; } parm1 = { .val = decoder };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_SENSOR_GET_DECODER);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_sensor_get_decoder(dev, decoder);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define sensor_get_decoder(dev, decoder) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_SENSOR_GET_DECODER, sensor_get_decoder, dev, decoder); 	syscall__retval = sensor_get_decoder(dev, decoder); 	sys_port_trace_syscall_exit(K_SYSCALL_SENSOR_GET_DECODER, sensor_get_decoder, dev, decoder, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_sensor_reconfigure_read_iodev(struct rtio_iodev * iodev, const struct device * sensor, const struct sensor_chan_spec * channels, size_t num_channels);
+
+__pinned_func
+static inline int sensor_reconfigure_read_iodev(struct rtio_iodev * iodev, const struct device * sensor, const struct sensor_chan_spec * channels, size_t num_channels)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; struct rtio_iodev * val; } parm0 = { .val = iodev };
+		union { uintptr_t x; const struct device * val; } parm1 = { .val = sensor };
+		union { uintptr_t x; const struct sensor_chan_spec * val; } parm2 = { .val = channels };
+		union { uintptr_t x; size_t val; } parm3 = { .val = num_channels };
+		return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_SENSOR_RECONFIGURE_READ_IODEV);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_sensor_reconfigure_read_iodev(iodev, sensor, channels, num_channels);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define sensor_reconfigure_read_iodev(iodev, sensor, channels, num_channels) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_SENSOR_RECONFIGURE_READ_IODEV, sensor_reconfigure_read_iodev, iodev, sensor, channels, num_channels); 	syscall__retval = sensor_reconfigure_read_iodev(iodev, sensor, channels, num_channels); 	sys_port_trace_syscall_exit(K_SYSCALL_SENSOR_RECONFIGURE_READ_IODEV, sensor_reconfigure_read_iodev, iodev, sensor, channels, num_channels, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif /* include guard */
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/sip_svc_driver.h b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/sip_svc_driver.h
new file mode 100644
index 0000000..e4004ed
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/sip_svc_driver.h
@@ -0,0 +1,285 @@
+/* auto-generated by gen_syscalls.py, don't edit */
+
+#ifndef Z_INCLUDE_SYSCALLS_SIP_SVC_DRIVER_H
+#define Z_INCLUDE_SYSCALLS_SIP_SVC_DRIVER_H
+
+
+#include <zephyr/tracing/tracing_syscall.h>
+
+#ifndef _ASMLANGUAGE
+
+#include <stdarg.h>
+
+#include <syscall_list.h>
+#include <zephyr/syscall.h>
+
+#include <zephyr/linker/sections.h>
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern void z_impl_sip_supervisory_call(const struct device * dev, unsigned long function_id, unsigned long arg0, unsigned long arg1, unsigned long arg2, unsigned long arg3, unsigned long arg4, unsigned long arg5, unsigned long arg6, struct arm_smccc_res * res);
+
+__pinned_func
+static inline void sip_supervisory_call(const struct device * dev, unsigned long function_id, unsigned long arg0, unsigned long arg1, unsigned long arg2, unsigned long arg3, unsigned long arg4, unsigned long arg5, unsigned long arg6, struct arm_smccc_res * res)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; unsigned long val; } parm1 = { .val = function_id };
+		union { uintptr_t x; unsigned long val; } parm2 = { .val = arg0 };
+		union { uintptr_t x; unsigned long val; } parm3 = { .val = arg1 };
+		union { uintptr_t x; unsigned long val; } parm4 = { .val = arg2 };
+		union { uintptr_t x; unsigned long val; } parm5 = { .val = arg3 };
+		union { uintptr_t x; unsigned long val; } parm6 = { .val = arg4 };
+		union { uintptr_t x; unsigned long val; } parm7 = { .val = arg5 };
+		union { uintptr_t x; unsigned long val; } parm8 = { .val = arg6 };
+		union { uintptr_t x; struct arm_smccc_res * val; } parm9 = { .val = res };
+		uintptr_t more[] = {
+			parm5.x,
+			parm6.x,
+			parm7.x,
+			parm8.x,
+			parm9.x
+		};
+		(void) arch_syscall_invoke6(parm0.x, parm1.x, parm2.x, parm3.x, parm4.x, (uintptr_t) &more, K_SYSCALL_SIP_SUPERVISORY_CALL);
+		return;
+	}
+#endif
+	compiler_barrier();
+	z_impl_sip_supervisory_call(dev, function_id, arg0, arg1, arg2, arg3, arg4, arg5, arg6, res);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define sip_supervisory_call(dev, function_id, arg0, arg1, arg2, arg3, arg4, arg5, arg6, res) do { 	sys_port_trace_syscall_enter(K_SYSCALL_SIP_SUPERVISORY_CALL, sip_supervisory_call, dev, function_id, arg0, arg1, arg2, arg3, arg4, arg5, arg6, res); 	sip_supervisory_call(dev, function_id, arg0, arg1, arg2, arg3, arg4, arg5, arg6, res); 	sys_port_trace_syscall_exit(K_SYSCALL_SIP_SUPERVISORY_CALL, sip_supervisory_call, dev, function_id, arg0, arg1, arg2, arg3, arg4, arg5, arg6, res); } while(false)
+#endif
+#endif
+
+
+extern bool z_impl_sip_svc_plat_func_id_valid(const struct device * dev, uint32_t command, uint32_t func_id);
+
+__pinned_func
+static inline bool sip_svc_plat_func_id_valid(const struct device * dev, uint32_t command, uint32_t func_id)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uint32_t val; } parm1 = { .val = command };
+		union { uintptr_t x; uint32_t val; } parm2 = { .val = func_id };
+		return (bool) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_SIP_SVC_PLAT_FUNC_ID_VALID);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_sip_svc_plat_func_id_valid(dev, command, func_id);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define sip_svc_plat_func_id_valid(dev, command, func_id) ({ 	bool syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_SIP_SVC_PLAT_FUNC_ID_VALID, sip_svc_plat_func_id_valid, dev, command, func_id); 	syscall__retval = sip_svc_plat_func_id_valid(dev, command, func_id); 	sys_port_trace_syscall_exit(K_SYSCALL_SIP_SVC_PLAT_FUNC_ID_VALID, sip_svc_plat_func_id_valid, dev, command, func_id, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern uint32_t z_impl_sip_svc_plat_format_trans_id(const struct device * dev, uint32_t client_idx, uint32_t trans_idx);
+
+__pinned_func
+static inline uint32_t sip_svc_plat_format_trans_id(const struct device * dev, uint32_t client_idx, uint32_t trans_idx)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uint32_t val; } parm1 = { .val = client_idx };
+		union { uintptr_t x; uint32_t val; } parm2 = { .val = trans_idx };
+		return (uint32_t) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_SIP_SVC_PLAT_FORMAT_TRANS_ID);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_sip_svc_plat_format_trans_id(dev, client_idx, trans_idx);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define sip_svc_plat_format_trans_id(dev, client_idx, trans_idx) ({ 	uint32_t syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_SIP_SVC_PLAT_FORMAT_TRANS_ID, sip_svc_plat_format_trans_id, dev, client_idx, trans_idx); 	syscall__retval = sip_svc_plat_format_trans_id(dev, client_idx, trans_idx); 	sys_port_trace_syscall_exit(K_SYSCALL_SIP_SVC_PLAT_FORMAT_TRANS_ID, sip_svc_plat_format_trans_id, dev, client_idx, trans_idx, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern uint32_t z_impl_sip_svc_plat_get_trans_idx(const struct device * dev, uint32_t trans_id);
+
+__pinned_func
+static inline uint32_t sip_svc_plat_get_trans_idx(const struct device * dev, uint32_t trans_id)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uint32_t val; } parm1 = { .val = trans_id };
+		return (uint32_t) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_SIP_SVC_PLAT_GET_TRANS_IDX);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_sip_svc_plat_get_trans_idx(dev, trans_id);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define sip_svc_plat_get_trans_idx(dev, trans_id) ({ 	uint32_t syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_SIP_SVC_PLAT_GET_TRANS_IDX, sip_svc_plat_get_trans_idx, dev, trans_id); 	syscall__retval = sip_svc_plat_get_trans_idx(dev, trans_id); 	sys_port_trace_syscall_exit(K_SYSCALL_SIP_SVC_PLAT_GET_TRANS_IDX, sip_svc_plat_get_trans_idx, dev, trans_id, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern void z_impl_sip_svc_plat_update_trans_id(const struct device * dev, struct sip_svc_request * request, uint32_t trans_id);
+
+__pinned_func
+static inline void sip_svc_plat_update_trans_id(const struct device * dev, struct sip_svc_request * request, uint32_t trans_id)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; struct sip_svc_request * val; } parm1 = { .val = request };
+		union { uintptr_t x; uint32_t val; } parm2 = { .val = trans_id };
+		(void) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_SIP_SVC_PLAT_UPDATE_TRANS_ID);
+		return;
+	}
+#endif
+	compiler_barrier();
+	z_impl_sip_svc_plat_update_trans_id(dev, request, trans_id);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define sip_svc_plat_update_trans_id(dev, request, trans_id) do { 	sys_port_trace_syscall_enter(K_SYSCALL_SIP_SVC_PLAT_UPDATE_TRANS_ID, sip_svc_plat_update_trans_id, dev, request, trans_id); 	sip_svc_plat_update_trans_id(dev, request, trans_id); 	sys_port_trace_syscall_exit(K_SYSCALL_SIP_SVC_PLAT_UPDATE_TRANS_ID, sip_svc_plat_update_trans_id, dev, request, trans_id); } while(false)
+#endif
+#endif
+
+
+extern uint32_t z_impl_sip_svc_plat_get_error_code(const struct device * dev, struct arm_smccc_res * res);
+
+__pinned_func
+static inline uint32_t sip_svc_plat_get_error_code(const struct device * dev, struct arm_smccc_res * res)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; struct arm_smccc_res * val; } parm1 = { .val = res };
+		return (uint32_t) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_SIP_SVC_PLAT_GET_ERROR_CODE);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_sip_svc_plat_get_error_code(dev, res);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define sip_svc_plat_get_error_code(dev, res) ({ 	uint32_t syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_SIP_SVC_PLAT_GET_ERROR_CODE, sip_svc_plat_get_error_code, dev, res); 	syscall__retval = sip_svc_plat_get_error_code(dev, res); 	sys_port_trace_syscall_exit(K_SYSCALL_SIP_SVC_PLAT_GET_ERROR_CODE, sip_svc_plat_get_error_code, dev, res, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_sip_svc_plat_async_res_req(const struct device * dev, unsigned long * a0, unsigned long * a1, unsigned long * a2, unsigned long * a3, unsigned long * a4, unsigned long * a5, unsigned long * a6, unsigned long * a7, char * buf, size_t size);
+
+__pinned_func
+static inline int sip_svc_plat_async_res_req(const struct device * dev, unsigned long * a0, unsigned long * a1, unsigned long * a2, unsigned long * a3, unsigned long * a4, unsigned long * a5, unsigned long * a6, unsigned long * a7, char * buf, size_t size)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; unsigned long * val; } parm1 = { .val = a0 };
+		union { uintptr_t x; unsigned long * val; } parm2 = { .val = a1 };
+		union { uintptr_t x; unsigned long * val; } parm3 = { .val = a2 };
+		union { uintptr_t x; unsigned long * val; } parm4 = { .val = a3 };
+		union { uintptr_t x; unsigned long * val; } parm5 = { .val = a4 };
+		union { uintptr_t x; unsigned long * val; } parm6 = { .val = a5 };
+		union { uintptr_t x; unsigned long * val; } parm7 = { .val = a6 };
+		union { uintptr_t x; unsigned long * val; } parm8 = { .val = a7 };
+		union { uintptr_t x; char * val; } parm9 = { .val = buf };
+		union { uintptr_t x; size_t val; } parm10 = { .val = size };
+		uintptr_t more[] = {
+			parm5.x,
+			parm6.x,
+			parm7.x,
+			parm8.x,
+			parm9.x,
+			parm10.x
+		};
+		return (int) arch_syscall_invoke6(parm0.x, parm1.x, parm2.x, parm3.x, parm4.x, (uintptr_t) &more, K_SYSCALL_SIP_SVC_PLAT_ASYNC_RES_REQ);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_sip_svc_plat_async_res_req(dev, a0, a1, a2, a3, a4, a5, a6, a7, buf, size);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define sip_svc_plat_async_res_req(dev, a0, a1, a2, a3, a4, a5, a6, a7, buf, size) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_SIP_SVC_PLAT_ASYNC_RES_REQ, sip_svc_plat_async_res_req, dev, a0, a1, a2, a3, a4, a5, a6, a7, buf, size); 	syscall__retval = sip_svc_plat_async_res_req(dev, a0, a1, a2, a3, a4, a5, a6, a7, buf, size); 	sys_port_trace_syscall_exit(K_SYSCALL_SIP_SVC_PLAT_ASYNC_RES_REQ, sip_svc_plat_async_res_req, dev, a0, a1, a2, a3, a4, a5, a6, a7, buf, size, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_sip_svc_plat_async_res_res(const struct device * dev, struct arm_smccc_res * res, char * buf, size_t * size, uint32_t * trans_id);
+
+__pinned_func
+static inline int sip_svc_plat_async_res_res(const struct device * dev, struct arm_smccc_res * res, char * buf, size_t * size, uint32_t * trans_id)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; struct arm_smccc_res * val; } parm1 = { .val = res };
+		union { uintptr_t x; char * val; } parm2 = { .val = buf };
+		union { uintptr_t x; size_t * val; } parm3 = { .val = size };
+		union { uintptr_t x; uint32_t * val; } parm4 = { .val = trans_id };
+		return (int) arch_syscall_invoke5(parm0.x, parm1.x, parm2.x, parm3.x, parm4.x, K_SYSCALL_SIP_SVC_PLAT_ASYNC_RES_RES);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_sip_svc_plat_async_res_res(dev, res, buf, size, trans_id);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define sip_svc_plat_async_res_res(dev, res, buf, size, trans_id) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_SIP_SVC_PLAT_ASYNC_RES_RES, sip_svc_plat_async_res_res, dev, res, buf, size, trans_id); 	syscall__retval = sip_svc_plat_async_res_res(dev, res, buf, size, trans_id); 	sys_port_trace_syscall_exit(K_SYSCALL_SIP_SVC_PLAT_ASYNC_RES_RES, sip_svc_plat_async_res_res, dev, res, buf, size, trans_id, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern void z_impl_sip_svc_plat_free_async_memory(const struct device * dev, struct sip_svc_request * request);
+
+__pinned_func
+static inline void sip_svc_plat_free_async_memory(const struct device * dev, struct sip_svc_request * request)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; struct sip_svc_request * val; } parm1 = { .val = request };
+		(void) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_SIP_SVC_PLAT_FREE_ASYNC_MEMORY);
+		return;
+	}
+#endif
+	compiler_barrier();
+	z_impl_sip_svc_plat_free_async_memory(dev, request);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define sip_svc_plat_free_async_memory(dev, request) do { 	sys_port_trace_syscall_enter(K_SYSCALL_SIP_SVC_PLAT_FREE_ASYNC_MEMORY, sip_svc_plat_free_async_memory, dev, request); 	sip_svc_plat_free_async_memory(dev, request); 	sys_port_trace_syscall_exit(K_SYSCALL_SIP_SVC_PLAT_FREE_ASYNC_MEMORY, sip_svc_plat_free_async_memory, dev, request); } while(false)
+#endif
+#endif
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif /* include guard */
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/smbus.h b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/smbus.h
new file mode 100644
index 0000000..9fbabbd
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/smbus.h
@@ -0,0 +1,417 @@
+/* auto-generated by gen_syscalls.py, don't edit */
+
+#ifndef Z_INCLUDE_SYSCALLS_SMBUS_H
+#define Z_INCLUDE_SYSCALLS_SMBUS_H
+
+
+#include <zephyr/tracing/tracing_syscall.h>
+
+#ifndef _ASMLANGUAGE
+
+#include <stdarg.h>
+
+#include <syscall_list.h>
+#include <zephyr/syscall.h>
+
+#include <zephyr/linker/sections.h>
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern int z_impl_smbus_configure(const struct device * dev, uint32_t dev_config);
+
+__pinned_func
+static inline int smbus_configure(const struct device * dev, uint32_t dev_config)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uint32_t val; } parm1 = { .val = dev_config };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_SMBUS_CONFIGURE);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_smbus_configure(dev, dev_config);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define smbus_configure(dev, dev_config) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_SMBUS_CONFIGURE, smbus_configure, dev, dev_config); 	syscall__retval = smbus_configure(dev, dev_config); 	sys_port_trace_syscall_exit(K_SYSCALL_SMBUS_CONFIGURE, smbus_configure, dev, dev_config, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_smbus_get_config(const struct device * dev, uint32_t * dev_config);
+
+__pinned_func
+static inline int smbus_get_config(const struct device * dev, uint32_t * dev_config)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uint32_t * val; } parm1 = { .val = dev_config };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_SMBUS_GET_CONFIG);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_smbus_get_config(dev, dev_config);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define smbus_get_config(dev, dev_config) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_SMBUS_GET_CONFIG, smbus_get_config, dev, dev_config); 	syscall__retval = smbus_get_config(dev, dev_config); 	sys_port_trace_syscall_exit(K_SYSCALL_SMBUS_GET_CONFIG, smbus_get_config, dev, dev_config, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_smbus_smbalert_remove_cb(const struct device * dev, struct smbus_callback * cb);
+
+__pinned_func
+static inline int smbus_smbalert_remove_cb(const struct device * dev, struct smbus_callback * cb)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; struct smbus_callback * val; } parm1 = { .val = cb };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_SMBUS_SMBALERT_REMOVE_CB);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_smbus_smbalert_remove_cb(dev, cb);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define smbus_smbalert_remove_cb(dev, cb) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_SMBUS_SMBALERT_REMOVE_CB, smbus_smbalert_remove_cb, dev, cb); 	syscall__retval = smbus_smbalert_remove_cb(dev, cb); 	sys_port_trace_syscall_exit(K_SYSCALL_SMBUS_SMBALERT_REMOVE_CB, smbus_smbalert_remove_cb, dev, cb, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_smbus_host_notify_remove_cb(const struct device * dev, struct smbus_callback * cb);
+
+__pinned_func
+static inline int smbus_host_notify_remove_cb(const struct device * dev, struct smbus_callback * cb)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; struct smbus_callback * val; } parm1 = { .val = cb };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_SMBUS_HOST_NOTIFY_REMOVE_CB);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_smbus_host_notify_remove_cb(dev, cb);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define smbus_host_notify_remove_cb(dev, cb) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_SMBUS_HOST_NOTIFY_REMOVE_CB, smbus_host_notify_remove_cb, dev, cb); 	syscall__retval = smbus_host_notify_remove_cb(dev, cb); 	sys_port_trace_syscall_exit(K_SYSCALL_SMBUS_HOST_NOTIFY_REMOVE_CB, smbus_host_notify_remove_cb, dev, cb, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_smbus_quick(const struct device * dev, uint16_t addr, enum smbus_direction direction);
+
+__pinned_func
+static inline int smbus_quick(const struct device * dev, uint16_t addr, enum smbus_direction direction)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uint16_t val; } parm1 = { .val = addr };
+		union { uintptr_t x; enum smbus_direction val; } parm2 = { .val = direction };
+		return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_SMBUS_QUICK);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_smbus_quick(dev, addr, direction);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define smbus_quick(dev, addr, direction) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_SMBUS_QUICK, smbus_quick, dev, addr, direction); 	syscall__retval = smbus_quick(dev, addr, direction); 	sys_port_trace_syscall_exit(K_SYSCALL_SMBUS_QUICK, smbus_quick, dev, addr, direction, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_smbus_byte_write(const struct device * dev, uint16_t addr, uint8_t byte);
+
+__pinned_func
+static inline int smbus_byte_write(const struct device * dev, uint16_t addr, uint8_t byte)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uint16_t val; } parm1 = { .val = addr };
+		union { uintptr_t x; uint8_t val; } parm2 = { .val = byte };
+		return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_SMBUS_BYTE_WRITE);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_smbus_byte_write(dev, addr, byte);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define smbus_byte_write(dev, addr, byte) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_SMBUS_BYTE_WRITE, smbus_byte_write, dev, addr, byte); 	syscall__retval = smbus_byte_write(dev, addr, byte); 	sys_port_trace_syscall_exit(K_SYSCALL_SMBUS_BYTE_WRITE, smbus_byte_write, dev, addr, byte, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_smbus_byte_read(const struct device * dev, uint16_t addr, uint8_t * byte);
+
+__pinned_func
+static inline int smbus_byte_read(const struct device * dev, uint16_t addr, uint8_t * byte)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uint16_t val; } parm1 = { .val = addr };
+		union { uintptr_t x; uint8_t * val; } parm2 = { .val = byte };
+		return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_SMBUS_BYTE_READ);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_smbus_byte_read(dev, addr, byte);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define smbus_byte_read(dev, addr, byte) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_SMBUS_BYTE_READ, smbus_byte_read, dev, addr, byte); 	syscall__retval = smbus_byte_read(dev, addr, byte); 	sys_port_trace_syscall_exit(K_SYSCALL_SMBUS_BYTE_READ, smbus_byte_read, dev, addr, byte, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_smbus_byte_data_write(const struct device * dev, uint16_t addr, uint8_t cmd, uint8_t byte);
+
+__pinned_func
+static inline int smbus_byte_data_write(const struct device * dev, uint16_t addr, uint8_t cmd, uint8_t byte)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uint16_t val; } parm1 = { .val = addr };
+		union { uintptr_t x; uint8_t val; } parm2 = { .val = cmd };
+		union { uintptr_t x; uint8_t val; } parm3 = { .val = byte };
+		return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_SMBUS_BYTE_DATA_WRITE);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_smbus_byte_data_write(dev, addr, cmd, byte);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define smbus_byte_data_write(dev, addr, cmd, byte) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_SMBUS_BYTE_DATA_WRITE, smbus_byte_data_write, dev, addr, cmd, byte); 	syscall__retval = smbus_byte_data_write(dev, addr, cmd, byte); 	sys_port_trace_syscall_exit(K_SYSCALL_SMBUS_BYTE_DATA_WRITE, smbus_byte_data_write, dev, addr, cmd, byte, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_smbus_byte_data_read(const struct device * dev, uint16_t addr, uint8_t cmd, uint8_t * byte);
+
+__pinned_func
+static inline int smbus_byte_data_read(const struct device * dev, uint16_t addr, uint8_t cmd, uint8_t * byte)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uint16_t val; } parm1 = { .val = addr };
+		union { uintptr_t x; uint8_t val; } parm2 = { .val = cmd };
+		union { uintptr_t x; uint8_t * val; } parm3 = { .val = byte };
+		return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_SMBUS_BYTE_DATA_READ);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_smbus_byte_data_read(dev, addr, cmd, byte);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define smbus_byte_data_read(dev, addr, cmd, byte) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_SMBUS_BYTE_DATA_READ, smbus_byte_data_read, dev, addr, cmd, byte); 	syscall__retval = smbus_byte_data_read(dev, addr, cmd, byte); 	sys_port_trace_syscall_exit(K_SYSCALL_SMBUS_BYTE_DATA_READ, smbus_byte_data_read, dev, addr, cmd, byte, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_smbus_word_data_write(const struct device * dev, uint16_t addr, uint8_t cmd, uint16_t word);
+
+__pinned_func
+static inline int smbus_word_data_write(const struct device * dev, uint16_t addr, uint8_t cmd, uint16_t word)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uint16_t val; } parm1 = { .val = addr };
+		union { uintptr_t x; uint8_t val; } parm2 = { .val = cmd };
+		union { uintptr_t x; uint16_t val; } parm3 = { .val = word };
+		return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_SMBUS_WORD_DATA_WRITE);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_smbus_word_data_write(dev, addr, cmd, word);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define smbus_word_data_write(dev, addr, cmd, word) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_SMBUS_WORD_DATA_WRITE, smbus_word_data_write, dev, addr, cmd, word); 	syscall__retval = smbus_word_data_write(dev, addr, cmd, word); 	sys_port_trace_syscall_exit(K_SYSCALL_SMBUS_WORD_DATA_WRITE, smbus_word_data_write, dev, addr, cmd, word, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_smbus_word_data_read(const struct device * dev, uint16_t addr, uint8_t cmd, uint16_t * word);
+
+__pinned_func
+static inline int smbus_word_data_read(const struct device * dev, uint16_t addr, uint8_t cmd, uint16_t * word)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uint16_t val; } parm1 = { .val = addr };
+		union { uintptr_t x; uint8_t val; } parm2 = { .val = cmd };
+		union { uintptr_t x; uint16_t * val; } parm3 = { .val = word };
+		return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_SMBUS_WORD_DATA_READ);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_smbus_word_data_read(dev, addr, cmd, word);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define smbus_word_data_read(dev, addr, cmd, word) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_SMBUS_WORD_DATA_READ, smbus_word_data_read, dev, addr, cmd, word); 	syscall__retval = smbus_word_data_read(dev, addr, cmd, word); 	sys_port_trace_syscall_exit(K_SYSCALL_SMBUS_WORD_DATA_READ, smbus_word_data_read, dev, addr, cmd, word, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_smbus_pcall(const struct device * dev, uint16_t addr, uint8_t cmd, uint16_t send_word, uint16_t * recv_word);
+
+__pinned_func
+static inline int smbus_pcall(const struct device * dev, uint16_t addr, uint8_t cmd, uint16_t send_word, uint16_t * recv_word)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uint16_t val; } parm1 = { .val = addr };
+		union { uintptr_t x; uint8_t val; } parm2 = { .val = cmd };
+		union { uintptr_t x; uint16_t val; } parm3 = { .val = send_word };
+		union { uintptr_t x; uint16_t * val; } parm4 = { .val = recv_word };
+		return (int) arch_syscall_invoke5(parm0.x, parm1.x, parm2.x, parm3.x, parm4.x, K_SYSCALL_SMBUS_PCALL);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_smbus_pcall(dev, addr, cmd, send_word, recv_word);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define smbus_pcall(dev, addr, cmd, send_word, recv_word) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_SMBUS_PCALL, smbus_pcall, dev, addr, cmd, send_word, recv_word); 	syscall__retval = smbus_pcall(dev, addr, cmd, send_word, recv_word); 	sys_port_trace_syscall_exit(K_SYSCALL_SMBUS_PCALL, smbus_pcall, dev, addr, cmd, send_word, recv_word, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_smbus_block_write(const struct device * dev, uint16_t addr, uint8_t cmd, uint8_t count, uint8_t * buf);
+
+__pinned_func
+static inline int smbus_block_write(const struct device * dev, uint16_t addr, uint8_t cmd, uint8_t count, uint8_t * buf)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uint16_t val; } parm1 = { .val = addr };
+		union { uintptr_t x; uint8_t val; } parm2 = { .val = cmd };
+		union { uintptr_t x; uint8_t val; } parm3 = { .val = count };
+		union { uintptr_t x; uint8_t * val; } parm4 = { .val = buf };
+		return (int) arch_syscall_invoke5(parm0.x, parm1.x, parm2.x, parm3.x, parm4.x, K_SYSCALL_SMBUS_BLOCK_WRITE);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_smbus_block_write(dev, addr, cmd, count, buf);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define smbus_block_write(dev, addr, cmd, count, buf) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_SMBUS_BLOCK_WRITE, smbus_block_write, dev, addr, cmd, count, buf); 	syscall__retval = smbus_block_write(dev, addr, cmd, count, buf); 	sys_port_trace_syscall_exit(K_SYSCALL_SMBUS_BLOCK_WRITE, smbus_block_write, dev, addr, cmd, count, buf, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_smbus_block_read(const struct device * dev, uint16_t addr, uint8_t cmd, uint8_t * count, uint8_t * buf);
+
+__pinned_func
+static inline int smbus_block_read(const struct device * dev, uint16_t addr, uint8_t cmd, uint8_t * count, uint8_t * buf)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uint16_t val; } parm1 = { .val = addr };
+		union { uintptr_t x; uint8_t val; } parm2 = { .val = cmd };
+		union { uintptr_t x; uint8_t * val; } parm3 = { .val = count };
+		union { uintptr_t x; uint8_t * val; } parm4 = { .val = buf };
+		return (int) arch_syscall_invoke5(parm0.x, parm1.x, parm2.x, parm3.x, parm4.x, K_SYSCALL_SMBUS_BLOCK_READ);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_smbus_block_read(dev, addr, cmd, count, buf);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define smbus_block_read(dev, addr, cmd, count, buf) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_SMBUS_BLOCK_READ, smbus_block_read, dev, addr, cmd, count, buf); 	syscall__retval = smbus_block_read(dev, addr, cmd, count, buf); 	sys_port_trace_syscall_exit(K_SYSCALL_SMBUS_BLOCK_READ, smbus_block_read, dev, addr, cmd, count, buf, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_smbus_block_pcall(const struct device * dev, uint16_t addr, uint8_t cmd, uint8_t snd_count, uint8_t * snd_buf, uint8_t * rcv_count, uint8_t * rcv_buf);
+
+__pinned_func
+static inline int smbus_block_pcall(const struct device * dev, uint16_t addr, uint8_t cmd, uint8_t snd_count, uint8_t * snd_buf, uint8_t * rcv_count, uint8_t * rcv_buf)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uint16_t val; } parm1 = { .val = addr };
+		union { uintptr_t x; uint8_t val; } parm2 = { .val = cmd };
+		union { uintptr_t x; uint8_t val; } parm3 = { .val = snd_count };
+		union { uintptr_t x; uint8_t * val; } parm4 = { .val = snd_buf };
+		union { uintptr_t x; uint8_t * val; } parm5 = { .val = rcv_count };
+		union { uintptr_t x; uint8_t * val; } parm6 = { .val = rcv_buf };
+		uintptr_t more[] = {
+			parm5.x,
+			parm6.x
+		};
+		return (int) arch_syscall_invoke6(parm0.x, parm1.x, parm2.x, parm3.x, parm4.x, (uintptr_t) &more, K_SYSCALL_SMBUS_BLOCK_PCALL);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_smbus_block_pcall(dev, addr, cmd, snd_count, snd_buf, rcv_count, rcv_buf);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define smbus_block_pcall(dev, addr, cmd, snd_count, snd_buf, rcv_count, rcv_buf) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_SMBUS_BLOCK_PCALL, smbus_block_pcall, dev, addr, cmd, snd_count, snd_buf, rcv_count, rcv_buf); 	syscall__retval = smbus_block_pcall(dev, addr, cmd, snd_count, snd_buf, rcv_count, rcv_buf); 	sys_port_trace_syscall_exit(K_SYSCALL_SMBUS_BLOCK_PCALL, smbus_block_pcall, dev, addr, cmd, snd_count, snd_buf, rcv_count, rcv_buf, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif /* include guard */
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/socket.h b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/socket.h
new file mode 100644
index 0000000..3623d3c
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/socket.h
@@ -0,0 +1,611 @@
+/* auto-generated by gen_syscalls.py, don't edit */
+
+#ifndef Z_INCLUDE_SYSCALLS_SOCKET_H
+#define Z_INCLUDE_SYSCALLS_SOCKET_H
+
+
+#include <zephyr/tracing/tracing_syscall.h>
+
+#ifndef _ASMLANGUAGE
+
+#include <stdarg.h>
+
+#include <syscall_list.h>
+#include <zephyr/syscall.h>
+
+#include <zephyr/linker/sections.h>
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern void * z_impl_zsock_get_context_object(int sock);
+
+__pinned_func
+static inline void * zsock_get_context_object(int sock)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; int val; } parm0 = { .val = sock };
+		return (void *) arch_syscall_invoke1(parm0.x, K_SYSCALL_ZSOCK_GET_CONTEXT_OBJECT);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_zsock_get_context_object(sock);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define zsock_get_context_object(sock) ({ 	void * syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_ZSOCK_GET_CONTEXT_OBJECT, zsock_get_context_object, sock); 	syscall__retval = zsock_get_context_object(sock); 	sys_port_trace_syscall_exit(K_SYSCALL_ZSOCK_GET_CONTEXT_OBJECT, zsock_get_context_object, sock, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_zsock_socket(int family, int type, int proto);
+
+__pinned_func
+static inline int zsock_socket(int family, int type, int proto)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; int val; } parm0 = { .val = family };
+		union { uintptr_t x; int val; } parm1 = { .val = type };
+		union { uintptr_t x; int val; } parm2 = { .val = proto };
+		return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_ZSOCK_SOCKET);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_zsock_socket(family, type, proto);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define zsock_socket(family, type, proto) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_ZSOCK_SOCKET, zsock_socket, family, type, proto); 	syscall__retval = zsock_socket(family, type, proto); 	sys_port_trace_syscall_exit(K_SYSCALL_ZSOCK_SOCKET, zsock_socket, family, type, proto, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_zsock_socketpair(int family, int type, int proto, int * sv);
+
+__pinned_func
+static inline int zsock_socketpair(int family, int type, int proto, int * sv)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; int val; } parm0 = { .val = family };
+		union { uintptr_t x; int val; } parm1 = { .val = type };
+		union { uintptr_t x; int val; } parm2 = { .val = proto };
+		union { uintptr_t x; int * val; } parm3 = { .val = sv };
+		return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_ZSOCK_SOCKETPAIR);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_zsock_socketpair(family, type, proto, sv);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define zsock_socketpair(family, type, proto, sv) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_ZSOCK_SOCKETPAIR, zsock_socketpair, family, type, proto, sv); 	syscall__retval = zsock_socketpair(family, type, proto, sv); 	sys_port_trace_syscall_exit(K_SYSCALL_ZSOCK_SOCKETPAIR, zsock_socketpair, family, type, proto, sv, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_zsock_close(int sock);
+
+__pinned_func
+static inline int zsock_close(int sock)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; int val; } parm0 = { .val = sock };
+		return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_ZSOCK_CLOSE);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_zsock_close(sock);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define zsock_close(sock) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_ZSOCK_CLOSE, zsock_close, sock); 	syscall__retval = zsock_close(sock); 	sys_port_trace_syscall_exit(K_SYSCALL_ZSOCK_CLOSE, zsock_close, sock, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_zsock_shutdown(int sock, int how);
+
+__pinned_func
+static inline int zsock_shutdown(int sock, int how)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; int val; } parm0 = { .val = sock };
+		union { uintptr_t x; int val; } parm1 = { .val = how };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_ZSOCK_SHUTDOWN);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_zsock_shutdown(sock, how);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define zsock_shutdown(sock, how) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_ZSOCK_SHUTDOWN, zsock_shutdown, sock, how); 	syscall__retval = zsock_shutdown(sock, how); 	sys_port_trace_syscall_exit(K_SYSCALL_ZSOCK_SHUTDOWN, zsock_shutdown, sock, how, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_zsock_bind(int sock, const struct sockaddr * addr, socklen_t addrlen);
+
+__pinned_func
+static inline int zsock_bind(int sock, const struct sockaddr * addr, socklen_t addrlen)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; int val; } parm0 = { .val = sock };
+		union { uintptr_t x; const struct sockaddr * val; } parm1 = { .val = addr };
+		union { uintptr_t x; socklen_t val; } parm2 = { .val = addrlen };
+		return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_ZSOCK_BIND);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_zsock_bind(sock, addr, addrlen);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define zsock_bind(sock, addr, addrlen) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_ZSOCK_BIND, zsock_bind, sock, addr, addrlen); 	syscall__retval = zsock_bind(sock, addr, addrlen); 	sys_port_trace_syscall_exit(K_SYSCALL_ZSOCK_BIND, zsock_bind, sock, addr, addrlen, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_zsock_connect(int sock, const struct sockaddr * addr, socklen_t addrlen);
+
+__pinned_func
+static inline int zsock_connect(int sock, const struct sockaddr * addr, socklen_t addrlen)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; int val; } parm0 = { .val = sock };
+		union { uintptr_t x; const struct sockaddr * val; } parm1 = { .val = addr };
+		union { uintptr_t x; socklen_t val; } parm2 = { .val = addrlen };
+		return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_ZSOCK_CONNECT);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_zsock_connect(sock, addr, addrlen);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define zsock_connect(sock, addr, addrlen) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_ZSOCK_CONNECT, zsock_connect, sock, addr, addrlen); 	syscall__retval = zsock_connect(sock, addr, addrlen); 	sys_port_trace_syscall_exit(K_SYSCALL_ZSOCK_CONNECT, zsock_connect, sock, addr, addrlen, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_zsock_listen(int sock, int backlog);
+
+__pinned_func
+static inline int zsock_listen(int sock, int backlog)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; int val; } parm0 = { .val = sock };
+		union { uintptr_t x; int val; } parm1 = { .val = backlog };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_ZSOCK_LISTEN);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_zsock_listen(sock, backlog);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define zsock_listen(sock, backlog) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_ZSOCK_LISTEN, zsock_listen, sock, backlog); 	syscall__retval = zsock_listen(sock, backlog); 	sys_port_trace_syscall_exit(K_SYSCALL_ZSOCK_LISTEN, zsock_listen, sock, backlog, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_zsock_accept(int sock, struct sockaddr * addr, socklen_t * addrlen);
+
+__pinned_func
+static inline int zsock_accept(int sock, struct sockaddr * addr, socklen_t * addrlen)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; int val; } parm0 = { .val = sock };
+		union { uintptr_t x; struct sockaddr * val; } parm1 = { .val = addr };
+		union { uintptr_t x; socklen_t * val; } parm2 = { .val = addrlen };
+		return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_ZSOCK_ACCEPT);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_zsock_accept(sock, addr, addrlen);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define zsock_accept(sock, addr, addrlen) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_ZSOCK_ACCEPT, zsock_accept, sock, addr, addrlen); 	syscall__retval = zsock_accept(sock, addr, addrlen); 	sys_port_trace_syscall_exit(K_SYSCALL_ZSOCK_ACCEPT, zsock_accept, sock, addr, addrlen, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern ssize_t z_impl_zsock_sendto(int sock, const void * buf, size_t len, int flags, const struct sockaddr * dest_addr, socklen_t addrlen);
+
+__pinned_func
+static inline ssize_t zsock_sendto(int sock, const void * buf, size_t len, int flags, const struct sockaddr * dest_addr, socklen_t addrlen)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; int val; } parm0 = { .val = sock };
+		union { uintptr_t x; const void * val; } parm1 = { .val = buf };
+		union { uintptr_t x; size_t val; } parm2 = { .val = len };
+		union { uintptr_t x; int val; } parm3 = { .val = flags };
+		union { uintptr_t x; const struct sockaddr * val; } parm4 = { .val = dest_addr };
+		union { uintptr_t x; socklen_t val; } parm5 = { .val = addrlen };
+		return (ssize_t) arch_syscall_invoke6(parm0.x, parm1.x, parm2.x, parm3.x, parm4.x, parm5.x, K_SYSCALL_ZSOCK_SENDTO);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_zsock_sendto(sock, buf, len, flags, dest_addr, addrlen);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define zsock_sendto(sock, buf, len, flags, dest_addr, addrlen) ({ 	ssize_t syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_ZSOCK_SENDTO, zsock_sendto, sock, buf, len, flags, dest_addr, addrlen); 	syscall__retval = zsock_sendto(sock, buf, len, flags, dest_addr, addrlen); 	sys_port_trace_syscall_exit(K_SYSCALL_ZSOCK_SENDTO, zsock_sendto, sock, buf, len, flags, dest_addr, addrlen, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern ssize_t z_impl_zsock_sendmsg(int sock, const struct msghdr * msg, int flags);
+
+__pinned_func
+static inline ssize_t zsock_sendmsg(int sock, const struct msghdr * msg, int flags)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; int val; } parm0 = { .val = sock };
+		union { uintptr_t x; const struct msghdr * val; } parm1 = { .val = msg };
+		union { uintptr_t x; int val; } parm2 = { .val = flags };
+		return (ssize_t) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_ZSOCK_SENDMSG);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_zsock_sendmsg(sock, msg, flags);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define zsock_sendmsg(sock, msg, flags) ({ 	ssize_t syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_ZSOCK_SENDMSG, zsock_sendmsg, sock, msg, flags); 	syscall__retval = zsock_sendmsg(sock, msg, flags); 	sys_port_trace_syscall_exit(K_SYSCALL_ZSOCK_SENDMSG, zsock_sendmsg, sock, msg, flags, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern ssize_t z_impl_zsock_recvfrom(int sock, void * buf, size_t max_len, int flags, struct sockaddr * src_addr, socklen_t * addrlen);
+
+__pinned_func
+static inline ssize_t zsock_recvfrom(int sock, void * buf, size_t max_len, int flags, struct sockaddr * src_addr, socklen_t * addrlen)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; int val; } parm0 = { .val = sock };
+		union { uintptr_t x; void * val; } parm1 = { .val = buf };
+		union { uintptr_t x; size_t val; } parm2 = { .val = max_len };
+		union { uintptr_t x; int val; } parm3 = { .val = flags };
+		union { uintptr_t x; struct sockaddr * val; } parm4 = { .val = src_addr };
+		union { uintptr_t x; socklen_t * val; } parm5 = { .val = addrlen };
+		return (ssize_t) arch_syscall_invoke6(parm0.x, parm1.x, parm2.x, parm3.x, parm4.x, parm5.x, K_SYSCALL_ZSOCK_RECVFROM);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_zsock_recvfrom(sock, buf, max_len, flags, src_addr, addrlen);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define zsock_recvfrom(sock, buf, max_len, flags, src_addr, addrlen) ({ 	ssize_t syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_ZSOCK_RECVFROM, zsock_recvfrom, sock, buf, max_len, flags, src_addr, addrlen); 	syscall__retval = zsock_recvfrom(sock, buf, max_len, flags, src_addr, addrlen); 	sys_port_trace_syscall_exit(K_SYSCALL_ZSOCK_RECVFROM, zsock_recvfrom, sock, buf, max_len, flags, src_addr, addrlen, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern ssize_t z_impl_zsock_recvmsg(int sock, struct msghdr * msg, int flags);
+
+__pinned_func
+static inline ssize_t zsock_recvmsg(int sock, struct msghdr * msg, int flags)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; int val; } parm0 = { .val = sock };
+		union { uintptr_t x; struct msghdr * val; } parm1 = { .val = msg };
+		union { uintptr_t x; int val; } parm2 = { .val = flags };
+		return (ssize_t) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_ZSOCK_RECVMSG);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_zsock_recvmsg(sock, msg, flags);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define zsock_recvmsg(sock, msg, flags) ({ 	ssize_t syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_ZSOCK_RECVMSG, zsock_recvmsg, sock, msg, flags); 	syscall__retval = zsock_recvmsg(sock, msg, flags); 	sys_port_trace_syscall_exit(K_SYSCALL_ZSOCK_RECVMSG, zsock_recvmsg, sock, msg, flags, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_zsock_fcntl_impl(int sock, int cmd, int flags);
+
+__pinned_func
+static inline int zsock_fcntl_impl(int sock, int cmd, int flags)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; int val; } parm0 = { .val = sock };
+		union { uintptr_t x; int val; } parm1 = { .val = cmd };
+		union { uintptr_t x; int val; } parm2 = { .val = flags };
+		return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_ZSOCK_FCNTL_IMPL);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_zsock_fcntl_impl(sock, cmd, flags);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define zsock_fcntl_impl(sock, cmd, flags) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_ZSOCK_FCNTL_IMPL, zsock_fcntl_impl, sock, cmd, flags); 	syscall__retval = zsock_fcntl_impl(sock, cmd, flags); 	sys_port_trace_syscall_exit(K_SYSCALL_ZSOCK_FCNTL_IMPL, zsock_fcntl_impl, sock, cmd, flags, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_zsock_ioctl_impl(int sock, unsigned long request, va_list ap);
+
+__pinned_func
+static inline int zsock_ioctl_impl(int sock, unsigned long request, va_list ap)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; int val; } parm0 = { .val = sock };
+		union { uintptr_t x; unsigned long val; } parm1 = { .val = request };
+		union { uintptr_t x; va_list val; } parm2;
+		va_copy(parm2.val, ap);
+		int invoke__retval = arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_ZSOCK_IOCTL_IMPL);
+		va_end(parm2.val);
+		return invoke__retval;
+	}
+#endif
+	compiler_barrier();
+	return z_impl_zsock_ioctl_impl(sock, request, ap);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define zsock_ioctl_impl(sock, request, ap) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_ZSOCK_IOCTL_IMPL, zsock_ioctl_impl, sock, request, ap); 	syscall__retval = zsock_ioctl_impl(sock, request, ap); 	sys_port_trace_syscall_exit(K_SYSCALL_ZSOCK_IOCTL_IMPL, zsock_ioctl_impl, sock, request, ap, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_zsock_poll(struct zsock_pollfd * fds, int nfds, int timeout);
+
+__pinned_func
+static inline int zsock_poll(struct zsock_pollfd * fds, int nfds, int timeout)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; struct zsock_pollfd * val; } parm0 = { .val = fds };
+		union { uintptr_t x; int val; } parm1 = { .val = nfds };
+		union { uintptr_t x; int val; } parm2 = { .val = timeout };
+		return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_ZSOCK_POLL);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_zsock_poll(fds, nfds, timeout);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define zsock_poll(fds, nfds, timeout) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_ZSOCK_POLL, zsock_poll, fds, nfds, timeout); 	syscall__retval = zsock_poll(fds, nfds, timeout); 	sys_port_trace_syscall_exit(K_SYSCALL_ZSOCK_POLL, zsock_poll, fds, nfds, timeout, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_zsock_getsockopt(int sock, int level, int optname, void * optval, socklen_t * optlen);
+
+__pinned_func
+static inline int zsock_getsockopt(int sock, int level, int optname, void * optval, socklen_t * optlen)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; int val; } parm0 = { .val = sock };
+		union { uintptr_t x; int val; } parm1 = { .val = level };
+		union { uintptr_t x; int val; } parm2 = { .val = optname };
+		union { uintptr_t x; void * val; } parm3 = { .val = optval };
+		union { uintptr_t x; socklen_t * val; } parm4 = { .val = optlen };
+		return (int) arch_syscall_invoke5(parm0.x, parm1.x, parm2.x, parm3.x, parm4.x, K_SYSCALL_ZSOCK_GETSOCKOPT);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_zsock_getsockopt(sock, level, optname, optval, optlen);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define zsock_getsockopt(sock, level, optname, optval, optlen) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_ZSOCK_GETSOCKOPT, zsock_getsockopt, sock, level, optname, optval, optlen); 	syscall__retval = zsock_getsockopt(sock, level, optname, optval, optlen); 	sys_port_trace_syscall_exit(K_SYSCALL_ZSOCK_GETSOCKOPT, zsock_getsockopt, sock, level, optname, optval, optlen, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_zsock_setsockopt(int sock, int level, int optname, const void * optval, socklen_t optlen);
+
+__pinned_func
+static inline int zsock_setsockopt(int sock, int level, int optname, const void * optval, socklen_t optlen)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; int val; } parm0 = { .val = sock };
+		union { uintptr_t x; int val; } parm1 = { .val = level };
+		union { uintptr_t x; int val; } parm2 = { .val = optname };
+		union { uintptr_t x; const void * val; } parm3 = { .val = optval };
+		union { uintptr_t x; socklen_t val; } parm4 = { .val = optlen };
+		return (int) arch_syscall_invoke5(parm0.x, parm1.x, parm2.x, parm3.x, parm4.x, K_SYSCALL_ZSOCK_SETSOCKOPT);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_zsock_setsockopt(sock, level, optname, optval, optlen);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define zsock_setsockopt(sock, level, optname, optval, optlen) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_ZSOCK_SETSOCKOPT, zsock_setsockopt, sock, level, optname, optval, optlen); 	syscall__retval = zsock_setsockopt(sock, level, optname, optval, optlen); 	sys_port_trace_syscall_exit(K_SYSCALL_ZSOCK_SETSOCKOPT, zsock_setsockopt, sock, level, optname, optval, optlen, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_zsock_getpeername(int sock, struct sockaddr * addr, socklen_t * addrlen);
+
+__pinned_func
+static inline int zsock_getpeername(int sock, struct sockaddr * addr, socklen_t * addrlen)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; int val; } parm0 = { .val = sock };
+		union { uintptr_t x; struct sockaddr * val; } parm1 = { .val = addr };
+		union { uintptr_t x; socklen_t * val; } parm2 = { .val = addrlen };
+		return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_ZSOCK_GETPEERNAME);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_zsock_getpeername(sock, addr, addrlen);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define zsock_getpeername(sock, addr, addrlen) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_ZSOCK_GETPEERNAME, zsock_getpeername, sock, addr, addrlen); 	syscall__retval = zsock_getpeername(sock, addr, addrlen); 	sys_port_trace_syscall_exit(K_SYSCALL_ZSOCK_GETPEERNAME, zsock_getpeername, sock, addr, addrlen, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_zsock_getsockname(int sock, struct sockaddr * addr, socklen_t * addrlen);
+
+__pinned_func
+static inline int zsock_getsockname(int sock, struct sockaddr * addr, socklen_t * addrlen)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; int val; } parm0 = { .val = sock };
+		union { uintptr_t x; struct sockaddr * val; } parm1 = { .val = addr };
+		union { uintptr_t x; socklen_t * val; } parm2 = { .val = addrlen };
+		return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_ZSOCK_GETSOCKNAME);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_zsock_getsockname(sock, addr, addrlen);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define zsock_getsockname(sock, addr, addrlen) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_ZSOCK_GETSOCKNAME, zsock_getsockname, sock, addr, addrlen); 	syscall__retval = zsock_getsockname(sock, addr, addrlen); 	sys_port_trace_syscall_exit(K_SYSCALL_ZSOCK_GETSOCKNAME, zsock_getsockname, sock, addr, addrlen, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_zsock_gethostname(char * buf, size_t len);
+
+__pinned_func
+static inline int zsock_gethostname(char * buf, size_t len)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; char * val; } parm0 = { .val = buf };
+		union { uintptr_t x; size_t val; } parm1 = { .val = len };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_ZSOCK_GETHOSTNAME);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_zsock_gethostname(buf, len);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define zsock_gethostname(buf, len) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_ZSOCK_GETHOSTNAME, zsock_gethostname, buf, len); 	syscall__retval = zsock_gethostname(buf, len); 	sys_port_trace_syscall_exit(K_SYSCALL_ZSOCK_GETHOSTNAME, zsock_gethostname, buf, len, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_zsock_inet_pton(sa_family_t family, const char * src, void * dst);
+
+__pinned_func
+static inline int zsock_inet_pton(sa_family_t family, const char * src, void * dst)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; sa_family_t val; } parm0 = { .val = family };
+		union { uintptr_t x; const char * val; } parm1 = { .val = src };
+		union { uintptr_t x; void * val; } parm2 = { .val = dst };
+		return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_ZSOCK_INET_PTON);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_zsock_inet_pton(family, src, dst);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define zsock_inet_pton(family, src, dst) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_ZSOCK_INET_PTON, zsock_inet_pton, family, src, dst); 	syscall__retval = zsock_inet_pton(family, src, dst); 	sys_port_trace_syscall_exit(K_SYSCALL_ZSOCK_INET_PTON, zsock_inet_pton, family, src, dst, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_z_zsock_getaddrinfo_internal(const char * host, const char * service, const struct zsock_addrinfo * hints, struct zsock_addrinfo * res);
+
+__pinned_func
+static inline int z_zsock_getaddrinfo_internal(const char * host, const char * service, const struct zsock_addrinfo * hints, struct zsock_addrinfo * res)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const char * val; } parm0 = { .val = host };
+		union { uintptr_t x; const char * val; } parm1 = { .val = service };
+		union { uintptr_t x; const struct zsock_addrinfo * val; } parm2 = { .val = hints };
+		union { uintptr_t x; struct zsock_addrinfo * val; } parm3 = { .val = res };
+		return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_Z_ZSOCK_GETADDRINFO_INTERNAL);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_z_zsock_getaddrinfo_internal(host, service, hints, res);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define z_zsock_getaddrinfo_internal(host, service, hints, res) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_Z_ZSOCK_GETADDRINFO_INTERNAL, z_zsock_getaddrinfo_internal, host, service, hints, res); 	syscall__retval = z_zsock_getaddrinfo_internal(host, service, hints, res); 	sys_port_trace_syscall_exit(K_SYSCALL_Z_ZSOCK_GETADDRINFO_INTERNAL, z_zsock_getaddrinfo_internal, host, service, hints, res, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif /* include guard */
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/socket_select.h b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/socket_select.h
new file mode 100644
index 0000000..1ebe088
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/socket_select.h
@@ -0,0 +1,55 @@
+/* auto-generated by gen_syscalls.py, don't edit */
+
+#ifndef Z_INCLUDE_SYSCALLS_SOCKET_SELECT_H
+#define Z_INCLUDE_SYSCALLS_SOCKET_SELECT_H
+
+
+#include <zephyr/tracing/tracing_syscall.h>
+
+#ifndef _ASMLANGUAGE
+
+#include <stdarg.h>
+
+#include <syscall_list.h>
+#include <zephyr/syscall.h>
+
+#include <zephyr/linker/sections.h>
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern int z_impl_zsock_select(int nfds, zsock_fd_set * readfds, zsock_fd_set * writefds, zsock_fd_set * exceptfds, struct zsock_timeval * timeout);
+
+__pinned_func
+static inline int zsock_select(int nfds, zsock_fd_set * readfds, zsock_fd_set * writefds, zsock_fd_set * exceptfds, struct zsock_timeval * timeout)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; int val; } parm0 = { .val = nfds };
+		union { uintptr_t x; zsock_fd_set * val; } parm1 = { .val = readfds };
+		union { uintptr_t x; zsock_fd_set * val; } parm2 = { .val = writefds };
+		union { uintptr_t x; zsock_fd_set * val; } parm3 = { .val = exceptfds };
+		union { uintptr_t x; struct zsock_timeval * val; } parm4 = { .val = timeout };
+		return (int) arch_syscall_invoke5(parm0.x, parm1.x, parm2.x, parm3.x, parm4.x, K_SYSCALL_ZSOCK_SELECT);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_zsock_select(nfds, readfds, writefds, exceptfds, timeout);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define zsock_select(nfds, readfds, writefds, exceptfds, timeout) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_ZSOCK_SELECT, zsock_select, nfds, readfds, writefds, exceptfds, timeout); 	syscall__retval = zsock_select(nfds, readfds, writefds, exceptfds, timeout); 	sys_port_trace_syscall_exit(K_SYSCALL_ZSOCK_SELECT, zsock_select, nfds, readfds, writefds, exceptfds, timeout, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif /* include guard */
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/socket_service.h b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/socket_service.h
new file mode 100644
index 0000000..55fb3a6
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/socket_service.h
@@ -0,0 +1,54 @@
+/* auto-generated by gen_syscalls.py, don't edit */
+
+#ifndef Z_INCLUDE_SYSCALLS_SOCKET_SERVICE_H
+#define Z_INCLUDE_SYSCALLS_SOCKET_SERVICE_H
+
+
+#include <zephyr/tracing/tracing_syscall.h>
+
+#ifndef _ASMLANGUAGE
+
+#include <stdarg.h>
+
+#include <syscall_list.h>
+#include <zephyr/syscall.h>
+
+#include <zephyr/linker/sections.h>
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern int z_impl_net_socket_service_register(const struct net_socket_service_desc * service, struct zsock_pollfd * fds, int len, void * user_data);
+
+__pinned_func
+static inline int net_socket_service_register(const struct net_socket_service_desc * service, struct zsock_pollfd * fds, int len, void * user_data)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct net_socket_service_desc * val; } parm0 = { .val = service };
+		union { uintptr_t x; struct zsock_pollfd * val; } parm1 = { .val = fds };
+		union { uintptr_t x; int val; } parm2 = { .val = len };
+		union { uintptr_t x; void * val; } parm3 = { .val = user_data };
+		return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_NET_SOCKET_SERVICE_REGISTER);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_net_socket_service_register(service, fds, len, user_data);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define net_socket_service_register(service, fds, len, user_data) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_NET_SOCKET_SERVICE_REGISTER, net_socket_service_register, service, fds, len, user_data); 	syscall__retval = net_socket_service_register(service, fds, len, user_data); 	sys_port_trace_syscall_exit(K_SYSCALL_NET_SOCKET_SERVICE_REGISTER, net_socket_service_register, service, fds, len, user_data, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif /* include guard */
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/spi.h b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/spi.h
new file mode 100644
index 0000000..3771ebc
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/spi.h
@@ -0,0 +1,78 @@
+/* auto-generated by gen_syscalls.py, don't edit */
+
+#ifndef Z_INCLUDE_SYSCALLS_SPI_H
+#define Z_INCLUDE_SYSCALLS_SPI_H
+
+
+#include <zephyr/tracing/tracing_syscall.h>
+
+#ifndef _ASMLANGUAGE
+
+#include <stdarg.h>
+
+#include <syscall_list.h>
+#include <zephyr/syscall.h>
+
+#include <zephyr/linker/sections.h>
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern int z_impl_spi_transceive(const struct device * dev, const struct spi_config * config, const struct spi_buf_set * tx_bufs, const struct spi_buf_set * rx_bufs);
+
+__pinned_func
+static inline int spi_transceive(const struct device * dev, const struct spi_config * config, const struct spi_buf_set * tx_bufs, const struct spi_buf_set * rx_bufs)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; const struct spi_config * val; } parm1 = { .val = config };
+		union { uintptr_t x; const struct spi_buf_set * val; } parm2 = { .val = tx_bufs };
+		union { uintptr_t x; const struct spi_buf_set * val; } parm3 = { .val = rx_bufs };
+		return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_SPI_TRANSCEIVE);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_spi_transceive(dev, config, tx_bufs, rx_bufs);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define spi_transceive(dev, config, tx_bufs, rx_bufs) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_SPI_TRANSCEIVE, spi_transceive, dev, config, tx_bufs, rx_bufs); 	syscall__retval = spi_transceive(dev, config, tx_bufs, rx_bufs); 	sys_port_trace_syscall_exit(K_SYSCALL_SPI_TRANSCEIVE, spi_transceive, dev, config, tx_bufs, rx_bufs, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_spi_release(const struct device * dev, const struct spi_config * config);
+
+__pinned_func
+static inline int spi_release(const struct device * dev, const struct spi_config * config)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; const struct spi_config * val; } parm1 = { .val = config };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_SPI_RELEASE);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_spi_release(dev, config);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define spi_release(dev, config) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_SPI_RELEASE, spi_release, dev, config); 	syscall__retval = spi_release(dev, config); 	sys_port_trace_syscall_exit(K_SYSCALL_SPI_RELEASE, spi_release, dev, config, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif /* include guard */
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/syscon.h b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/syscon.h
new file mode 100644
index 0000000..7d13d74
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/syscon.h
@@ -0,0 +1,126 @@
+/* auto-generated by gen_syscalls.py, don't edit */
+
+#ifndef Z_INCLUDE_SYSCALLS_SYSCON_H
+#define Z_INCLUDE_SYSCALLS_SYSCON_H
+
+
+#include <zephyr/tracing/tracing_syscall.h>
+
+#ifndef _ASMLANGUAGE
+
+#include <stdarg.h>
+
+#include <syscall_list.h>
+#include <zephyr/syscall.h>
+
+#include <zephyr/linker/sections.h>
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern int z_impl_syscon_get_base(const struct device * dev, uintptr_t * addr);
+
+__pinned_func
+static inline int syscon_get_base(const struct device * dev, uintptr_t * addr)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uintptr_t * val; } parm1 = { .val = addr };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_SYSCON_GET_BASE);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_syscon_get_base(dev, addr);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define syscon_get_base(dev, addr) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_SYSCON_GET_BASE, syscon_get_base, dev, addr); 	syscall__retval = syscon_get_base(dev, addr); 	sys_port_trace_syscall_exit(K_SYSCALL_SYSCON_GET_BASE, syscon_get_base, dev, addr, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_syscon_read_reg(const struct device * dev, uint16_t reg, uint32_t * val);
+
+__pinned_func
+static inline int syscon_read_reg(const struct device * dev, uint16_t reg, uint32_t * val)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uint16_t val; } parm1 = { .val = reg };
+		union { uintptr_t x; uint32_t * val; } parm2 = { .val = val };
+		return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_SYSCON_READ_REG);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_syscon_read_reg(dev, reg, val);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define syscon_read_reg(dev, reg, val) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_SYSCON_READ_REG, syscon_read_reg, dev, reg, val); 	syscall__retval = syscon_read_reg(dev, reg, val); 	sys_port_trace_syscall_exit(K_SYSCALL_SYSCON_READ_REG, syscon_read_reg, dev, reg, val, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_syscon_write_reg(const struct device * dev, uint16_t reg, uint32_t val);
+
+__pinned_func
+static inline int syscon_write_reg(const struct device * dev, uint16_t reg, uint32_t val)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uint16_t val; } parm1 = { .val = reg };
+		union { uintptr_t x; uint32_t val; } parm2 = { .val = val };
+		return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_SYSCON_WRITE_REG);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_syscon_write_reg(dev, reg, val);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define syscon_write_reg(dev, reg, val) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_SYSCON_WRITE_REG, syscon_write_reg, dev, reg, val); 	syscall__retval = syscon_write_reg(dev, reg, val); 	sys_port_trace_syscall_exit(K_SYSCALL_SYSCON_WRITE_REG, syscon_write_reg, dev, reg, val, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_syscon_get_size(const struct device * dev, size_t * size);
+
+__pinned_func
+static inline int syscon_get_size(const struct device * dev, size_t * size)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; size_t * val; } parm1 = { .val = size };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_SYSCON_GET_SIZE);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_syscon_get_size(dev, size);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define syscon_get_size(dev, size) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_SYSCON_GET_SIZE, syscon_get_size, dev, size); 	syscall__retval = syscon_get_size(dev, size); 	sys_port_trace_syscall_exit(K_SYSCALL_SYSCON_GET_SIZE, syscon_get_size, dev, size, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif /* include guard */
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/time_units.h b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/time_units.h
new file mode 100644
index 0000000..1d94e62
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/time_units.h
@@ -0,0 +1,50 @@
+/* auto-generated by gen_syscalls.py, don't edit */
+
+#ifndef Z_INCLUDE_SYSCALLS_TIME_UNITS_H
+#define Z_INCLUDE_SYSCALLS_TIME_UNITS_H
+
+
+#include <zephyr/tracing/tracing_syscall.h>
+
+#ifndef _ASMLANGUAGE
+
+#include <stdarg.h>
+
+#include <syscall_list.h>
+#include <zephyr/syscall.h>
+
+#include <zephyr/linker/sections.h>
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern int z_impl_sys_clock_hw_cycles_per_sec_runtime_get(void);
+
+__pinned_func
+static inline int sys_clock_hw_cycles_per_sec_runtime_get(void)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		return (int) arch_syscall_invoke0(K_SYSCALL_SYS_CLOCK_HW_CYCLES_PER_SEC_RUNTIME_GET);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_sys_clock_hw_cycles_per_sec_runtime_get();
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define sys_clock_hw_cycles_per_sec_runtime_get() ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_SYS_CLOCK_HW_CYCLES_PER_SEC_RUNTIME_GET, sys_clock_hw_cycles_per_sec_runtime_get); 	syscall__retval = sys_clock_hw_cycles_per_sec_runtime_get(); 	sys_port_trace_syscall_exit(K_SYSCALL_SYS_CLOCK_HW_CYCLES_PER_SEC_RUNTIME_GET, sys_clock_hw_cycles_per_sec_runtime_get, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif /* include guard */
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/timeaware_gpio.h b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/timeaware_gpio.h
new file mode 100644
index 0000000..db67411
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/timeaware_gpio.h
@@ -0,0 +1,182 @@
+/* auto-generated by gen_syscalls.py, don't edit */
+
+#ifndef Z_INCLUDE_SYSCALLS_TIMEAWARE_GPIO_H
+#define Z_INCLUDE_SYSCALLS_TIMEAWARE_GPIO_H
+
+
+#include <zephyr/tracing/tracing_syscall.h>
+
+#ifndef _ASMLANGUAGE
+
+#include <stdarg.h>
+
+#include <syscall_list.h>
+#include <zephyr/syscall.h>
+
+#include <zephyr/linker/sections.h>
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern int z_impl_tgpio_port_get_time(const struct device * dev, uint64_t * current_time);
+
+__pinned_func
+static inline int tgpio_port_get_time(const struct device * dev, uint64_t * current_time)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uint64_t * val; } parm1 = { .val = current_time };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_TGPIO_PORT_GET_TIME);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_tgpio_port_get_time(dev, current_time);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define tgpio_port_get_time(dev, current_time) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_TGPIO_PORT_GET_TIME, tgpio_port_get_time, dev, current_time); 	syscall__retval = tgpio_port_get_time(dev, current_time); 	sys_port_trace_syscall_exit(K_SYSCALL_TGPIO_PORT_GET_TIME, tgpio_port_get_time, dev, current_time, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_tgpio_port_get_cycles_per_second(const struct device * dev, uint32_t * cycles);
+
+__pinned_func
+static inline int tgpio_port_get_cycles_per_second(const struct device * dev, uint32_t * cycles)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uint32_t * val; } parm1 = { .val = cycles };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_TGPIO_PORT_GET_CYCLES_PER_SECOND);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_tgpio_port_get_cycles_per_second(dev, cycles);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define tgpio_port_get_cycles_per_second(dev, cycles) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_TGPIO_PORT_GET_CYCLES_PER_SECOND, tgpio_port_get_cycles_per_second, dev, cycles); 	syscall__retval = tgpio_port_get_cycles_per_second(dev, cycles); 	sys_port_trace_syscall_exit(K_SYSCALL_TGPIO_PORT_GET_CYCLES_PER_SECOND, tgpio_port_get_cycles_per_second, dev, cycles, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_tgpio_pin_disable(const struct device * dev, uint32_t pin);
+
+__pinned_func
+static inline int tgpio_pin_disable(const struct device * dev, uint32_t pin)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uint32_t val; } parm1 = { .val = pin };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_TGPIO_PIN_DISABLE);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_tgpio_pin_disable(dev, pin);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define tgpio_pin_disable(dev, pin) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_TGPIO_PIN_DISABLE, tgpio_pin_disable, dev, pin); 	syscall__retval = tgpio_pin_disable(dev, pin); 	sys_port_trace_syscall_exit(K_SYSCALL_TGPIO_PIN_DISABLE, tgpio_pin_disable, dev, pin, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_tgpio_pin_config_ext_timestamp(const struct device * dev, uint32_t pin, uint32_t event_polarity);
+
+__pinned_func
+static inline int tgpio_pin_config_ext_timestamp(const struct device * dev, uint32_t pin, uint32_t event_polarity)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uint32_t val; } parm1 = { .val = pin };
+		union { uintptr_t x; uint32_t val; } parm2 = { .val = event_polarity };
+		return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_TGPIO_PIN_CONFIG_EXT_TIMESTAMP);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_tgpio_pin_config_ext_timestamp(dev, pin, event_polarity);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define tgpio_pin_config_ext_timestamp(dev, pin, event_polarity) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_TGPIO_PIN_CONFIG_EXT_TIMESTAMP, tgpio_pin_config_ext_timestamp, dev, pin, event_polarity); 	syscall__retval = tgpio_pin_config_ext_timestamp(dev, pin, event_polarity); 	sys_port_trace_syscall_exit(K_SYSCALL_TGPIO_PIN_CONFIG_EXT_TIMESTAMP, tgpio_pin_config_ext_timestamp, dev, pin, event_polarity, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_tgpio_pin_periodic_output(const struct device * dev, uint32_t pin, uint64_t start_time, uint64_t repeat_interval, bool periodic_enable);
+
+__pinned_func
+static inline int tgpio_pin_periodic_output(const struct device * dev, uint32_t pin, uint64_t start_time, uint64_t repeat_interval, bool periodic_enable)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uint32_t val; } parm1 = { .val = pin };
+		union { struct { uintptr_t lo, hi; } split; uint64_t val; } parm2 = { .val = start_time };
+		union { struct { uintptr_t lo, hi; } split; uint64_t val; } parm3 = { .val = repeat_interval };
+		union { uintptr_t x; bool val; } parm4 = { .val = periodic_enable };
+		uintptr_t more[] = {
+			parm3.split.hi,
+			parm4.x
+		};
+		return (int) arch_syscall_invoke6(parm0.x, parm1.x, parm2.split.lo, parm2.split.hi, parm3.split.lo, (uintptr_t) &more, K_SYSCALL_TGPIO_PIN_PERIODIC_OUTPUT);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_tgpio_pin_periodic_output(dev, pin, start_time, repeat_interval, periodic_enable);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define tgpio_pin_periodic_output(dev, pin, start_time, repeat_interval, periodic_enable) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_TGPIO_PIN_PERIODIC_OUTPUT, tgpio_pin_periodic_output, dev, pin, start_time, repeat_interval, periodic_enable); 	syscall__retval = tgpio_pin_periodic_output(dev, pin, start_time, repeat_interval, periodic_enable); 	sys_port_trace_syscall_exit(K_SYSCALL_TGPIO_PIN_PERIODIC_OUTPUT, tgpio_pin_periodic_output, dev, pin, start_time, repeat_interval, periodic_enable, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_tgpio_pin_read_ts_ec(const struct device * dev, uint32_t pin, uint64_t * timestamp, uint64_t * event_count);
+
+__pinned_func
+static inline int tgpio_pin_read_ts_ec(const struct device * dev, uint32_t pin, uint64_t * timestamp, uint64_t * event_count)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uint32_t val; } parm1 = { .val = pin };
+		union { uintptr_t x; uint64_t * val; } parm2 = { .val = timestamp };
+		union { uintptr_t x; uint64_t * val; } parm3 = { .val = event_count };
+		return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_TGPIO_PIN_READ_TS_EC);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_tgpio_pin_read_ts_ec(dev, pin, timestamp, event_count);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define tgpio_pin_read_ts_ec(dev, pin, timestamp, event_count) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_TGPIO_PIN_READ_TS_EC, tgpio_pin_read_ts_ec, dev, pin, timestamp, event_count); 	syscall__retval = tgpio_pin_read_ts_ec(dev, pin, timestamp, event_count); 	sys_port_trace_syscall_exit(K_SYSCALL_TGPIO_PIN_READ_TS_EC, tgpio_pin_read_ts_ec, dev, pin, timestamp, event_count, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif /* include guard */
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/uart.h b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/uart.h
new file mode 100644
index 0000000..b3b9b91
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/uart.h
@@ -0,0 +1,612 @@
+/* auto-generated by gen_syscalls.py, don't edit */
+
+#ifndef Z_INCLUDE_SYSCALLS_UART_H
+#define Z_INCLUDE_SYSCALLS_UART_H
+
+
+#include <zephyr/tracing/tracing_syscall.h>
+
+#ifndef _ASMLANGUAGE
+
+#include <stdarg.h>
+
+#include <syscall_list.h>
+#include <zephyr/syscall.h>
+
+#include <zephyr/linker/sections.h>
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern int z_impl_uart_err_check(const struct device * dev);
+
+__pinned_func
+static inline int uart_err_check(const struct device * dev)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_UART_ERR_CHECK);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_uart_err_check(dev);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define uart_err_check(dev) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_UART_ERR_CHECK, uart_err_check, dev); 	syscall__retval = uart_err_check(dev); 	sys_port_trace_syscall_exit(K_SYSCALL_UART_ERR_CHECK, uart_err_check, dev, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_uart_poll_in(const struct device * dev, unsigned char * p_char);
+
+__pinned_func
+static inline int uart_poll_in(const struct device * dev, unsigned char * p_char)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; unsigned char * val; } parm1 = { .val = p_char };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_UART_POLL_IN);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_uart_poll_in(dev, p_char);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define uart_poll_in(dev, p_char) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_UART_POLL_IN, uart_poll_in, dev, p_char); 	syscall__retval = uart_poll_in(dev, p_char); 	sys_port_trace_syscall_exit(K_SYSCALL_UART_POLL_IN, uart_poll_in, dev, p_char, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_uart_poll_in_u16(const struct device * dev, uint16_t * p_u16);
+
+__pinned_func
+static inline int uart_poll_in_u16(const struct device * dev, uint16_t * p_u16)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uint16_t * val; } parm1 = { .val = p_u16 };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_UART_POLL_IN_U16);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_uart_poll_in_u16(dev, p_u16);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define uart_poll_in_u16(dev, p_u16) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_UART_POLL_IN_U16, uart_poll_in_u16, dev, p_u16); 	syscall__retval = uart_poll_in_u16(dev, p_u16); 	sys_port_trace_syscall_exit(K_SYSCALL_UART_POLL_IN_U16, uart_poll_in_u16, dev, p_u16, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern void z_impl_uart_poll_out(const struct device * dev, unsigned char out_char);
+
+__pinned_func
+static inline void uart_poll_out(const struct device * dev, unsigned char out_char)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; unsigned char val; } parm1 = { .val = out_char };
+		(void) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_UART_POLL_OUT);
+		return;
+	}
+#endif
+	compiler_barrier();
+	z_impl_uart_poll_out(dev, out_char);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define uart_poll_out(dev, out_char) do { 	sys_port_trace_syscall_enter(K_SYSCALL_UART_POLL_OUT, uart_poll_out, dev, out_char); 	uart_poll_out(dev, out_char); 	sys_port_trace_syscall_exit(K_SYSCALL_UART_POLL_OUT, uart_poll_out, dev, out_char); } while(false)
+#endif
+#endif
+
+
+extern void z_impl_uart_poll_out_u16(const struct device * dev, uint16_t out_u16);
+
+__pinned_func
+static inline void uart_poll_out_u16(const struct device * dev, uint16_t out_u16)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uint16_t val; } parm1 = { .val = out_u16 };
+		(void) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_UART_POLL_OUT_U16);
+		return;
+	}
+#endif
+	compiler_barrier();
+	z_impl_uart_poll_out_u16(dev, out_u16);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define uart_poll_out_u16(dev, out_u16) do { 	sys_port_trace_syscall_enter(K_SYSCALL_UART_POLL_OUT_U16, uart_poll_out_u16, dev, out_u16); 	uart_poll_out_u16(dev, out_u16); 	sys_port_trace_syscall_exit(K_SYSCALL_UART_POLL_OUT_U16, uart_poll_out_u16, dev, out_u16); } while(false)
+#endif
+#endif
+
+
+extern int z_impl_uart_configure(const struct device * dev, const struct uart_config * cfg);
+
+__pinned_func
+static inline int uart_configure(const struct device * dev, const struct uart_config * cfg)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; const struct uart_config * val; } parm1 = { .val = cfg };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_UART_CONFIGURE);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_uart_configure(dev, cfg);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define uart_configure(dev, cfg) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_UART_CONFIGURE, uart_configure, dev, cfg); 	syscall__retval = uart_configure(dev, cfg); 	sys_port_trace_syscall_exit(K_SYSCALL_UART_CONFIGURE, uart_configure, dev, cfg, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_uart_config_get(const struct device * dev, struct uart_config * cfg);
+
+__pinned_func
+static inline int uart_config_get(const struct device * dev, struct uart_config * cfg)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; struct uart_config * val; } parm1 = { .val = cfg };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_UART_CONFIG_GET);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_uart_config_get(dev, cfg);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define uart_config_get(dev, cfg) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_UART_CONFIG_GET, uart_config_get, dev, cfg); 	syscall__retval = uart_config_get(dev, cfg); 	sys_port_trace_syscall_exit(K_SYSCALL_UART_CONFIG_GET, uart_config_get, dev, cfg, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern void z_impl_uart_irq_tx_enable(const struct device * dev);
+
+__pinned_func
+static inline void uart_irq_tx_enable(const struct device * dev)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		(void) arch_syscall_invoke1(parm0.x, K_SYSCALL_UART_IRQ_TX_ENABLE);
+		return;
+	}
+#endif
+	compiler_barrier();
+	z_impl_uart_irq_tx_enable(dev);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define uart_irq_tx_enable(dev) do { 	sys_port_trace_syscall_enter(K_SYSCALL_UART_IRQ_TX_ENABLE, uart_irq_tx_enable, dev); 	uart_irq_tx_enable(dev); 	sys_port_trace_syscall_exit(K_SYSCALL_UART_IRQ_TX_ENABLE, uart_irq_tx_enable, dev); } while(false)
+#endif
+#endif
+
+
+extern void z_impl_uart_irq_tx_disable(const struct device * dev);
+
+__pinned_func
+static inline void uart_irq_tx_disable(const struct device * dev)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		(void) arch_syscall_invoke1(parm0.x, K_SYSCALL_UART_IRQ_TX_DISABLE);
+		return;
+	}
+#endif
+	compiler_barrier();
+	z_impl_uart_irq_tx_disable(dev);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define uart_irq_tx_disable(dev) do { 	sys_port_trace_syscall_enter(K_SYSCALL_UART_IRQ_TX_DISABLE, uart_irq_tx_disable, dev); 	uart_irq_tx_disable(dev); 	sys_port_trace_syscall_exit(K_SYSCALL_UART_IRQ_TX_DISABLE, uart_irq_tx_disable, dev); } while(false)
+#endif
+#endif
+
+
+extern void z_impl_uart_irq_rx_enable(const struct device * dev);
+
+__pinned_func
+static inline void uart_irq_rx_enable(const struct device * dev)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		(void) arch_syscall_invoke1(parm0.x, K_SYSCALL_UART_IRQ_RX_ENABLE);
+		return;
+	}
+#endif
+	compiler_barrier();
+	z_impl_uart_irq_rx_enable(dev);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define uart_irq_rx_enable(dev) do { 	sys_port_trace_syscall_enter(K_SYSCALL_UART_IRQ_RX_ENABLE, uart_irq_rx_enable, dev); 	uart_irq_rx_enable(dev); 	sys_port_trace_syscall_exit(K_SYSCALL_UART_IRQ_RX_ENABLE, uart_irq_rx_enable, dev); } while(false)
+#endif
+#endif
+
+
+extern void z_impl_uart_irq_rx_disable(const struct device * dev);
+
+__pinned_func
+static inline void uart_irq_rx_disable(const struct device * dev)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		(void) arch_syscall_invoke1(parm0.x, K_SYSCALL_UART_IRQ_RX_DISABLE);
+		return;
+	}
+#endif
+	compiler_barrier();
+	z_impl_uart_irq_rx_disable(dev);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define uart_irq_rx_disable(dev) do { 	sys_port_trace_syscall_enter(K_SYSCALL_UART_IRQ_RX_DISABLE, uart_irq_rx_disable, dev); 	uart_irq_rx_disable(dev); 	sys_port_trace_syscall_exit(K_SYSCALL_UART_IRQ_RX_DISABLE, uart_irq_rx_disable, dev); } while(false)
+#endif
+#endif
+
+
+extern void z_impl_uart_irq_err_enable(const struct device * dev);
+
+__pinned_func
+static inline void uart_irq_err_enable(const struct device * dev)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		(void) arch_syscall_invoke1(parm0.x, K_SYSCALL_UART_IRQ_ERR_ENABLE);
+		return;
+	}
+#endif
+	compiler_barrier();
+	z_impl_uart_irq_err_enable(dev);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define uart_irq_err_enable(dev) do { 	sys_port_trace_syscall_enter(K_SYSCALL_UART_IRQ_ERR_ENABLE, uart_irq_err_enable, dev); 	uart_irq_err_enable(dev); 	sys_port_trace_syscall_exit(K_SYSCALL_UART_IRQ_ERR_ENABLE, uart_irq_err_enable, dev); } while(false)
+#endif
+#endif
+
+
+extern void z_impl_uart_irq_err_disable(const struct device * dev);
+
+__pinned_func
+static inline void uart_irq_err_disable(const struct device * dev)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		(void) arch_syscall_invoke1(parm0.x, K_SYSCALL_UART_IRQ_ERR_DISABLE);
+		return;
+	}
+#endif
+	compiler_barrier();
+	z_impl_uart_irq_err_disable(dev);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define uart_irq_err_disable(dev) do { 	sys_port_trace_syscall_enter(K_SYSCALL_UART_IRQ_ERR_DISABLE, uart_irq_err_disable, dev); 	uart_irq_err_disable(dev); 	sys_port_trace_syscall_exit(K_SYSCALL_UART_IRQ_ERR_DISABLE, uart_irq_err_disable, dev); } while(false)
+#endif
+#endif
+
+
+extern int z_impl_uart_irq_is_pending(const struct device * dev);
+
+__pinned_func
+static inline int uart_irq_is_pending(const struct device * dev)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_UART_IRQ_IS_PENDING);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_uart_irq_is_pending(dev);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define uart_irq_is_pending(dev) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_UART_IRQ_IS_PENDING, uart_irq_is_pending, dev); 	syscall__retval = uart_irq_is_pending(dev); 	sys_port_trace_syscall_exit(K_SYSCALL_UART_IRQ_IS_PENDING, uart_irq_is_pending, dev, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_uart_irq_update(const struct device * dev);
+
+__pinned_func
+static inline int uart_irq_update(const struct device * dev)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_UART_IRQ_UPDATE);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_uart_irq_update(dev);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define uart_irq_update(dev) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_UART_IRQ_UPDATE, uart_irq_update, dev); 	syscall__retval = uart_irq_update(dev); 	sys_port_trace_syscall_exit(K_SYSCALL_UART_IRQ_UPDATE, uart_irq_update, dev, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_uart_tx(const struct device * dev, const uint8_t * buf, size_t len, int32_t timeout);
+
+__pinned_func
+static inline int uart_tx(const struct device * dev, const uint8_t * buf, size_t len, int32_t timeout)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; const uint8_t * val; } parm1 = { .val = buf };
+		union { uintptr_t x; size_t val; } parm2 = { .val = len };
+		union { uintptr_t x; int32_t val; } parm3 = { .val = timeout };
+		return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_UART_TX);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_uart_tx(dev, buf, len, timeout);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define uart_tx(dev, buf, len, timeout) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_UART_TX, uart_tx, dev, buf, len, timeout); 	syscall__retval = uart_tx(dev, buf, len, timeout); 	sys_port_trace_syscall_exit(K_SYSCALL_UART_TX, uart_tx, dev, buf, len, timeout, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_uart_tx_u16(const struct device * dev, const uint16_t * buf, size_t len, int32_t timeout);
+
+__pinned_func
+static inline int uart_tx_u16(const struct device * dev, const uint16_t * buf, size_t len, int32_t timeout)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; const uint16_t * val; } parm1 = { .val = buf };
+		union { uintptr_t x; size_t val; } parm2 = { .val = len };
+		union { uintptr_t x; int32_t val; } parm3 = { .val = timeout };
+		return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_UART_TX_U16);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_uart_tx_u16(dev, buf, len, timeout);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define uart_tx_u16(dev, buf, len, timeout) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_UART_TX_U16, uart_tx_u16, dev, buf, len, timeout); 	syscall__retval = uart_tx_u16(dev, buf, len, timeout); 	sys_port_trace_syscall_exit(K_SYSCALL_UART_TX_U16, uart_tx_u16, dev, buf, len, timeout, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_uart_tx_abort(const struct device * dev);
+
+__pinned_func
+static inline int uart_tx_abort(const struct device * dev)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_UART_TX_ABORT);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_uart_tx_abort(dev);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define uart_tx_abort(dev) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_UART_TX_ABORT, uart_tx_abort, dev); 	syscall__retval = uart_tx_abort(dev); 	sys_port_trace_syscall_exit(K_SYSCALL_UART_TX_ABORT, uart_tx_abort, dev, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_uart_rx_enable(const struct device * dev, uint8_t * buf, size_t len, int32_t timeout);
+
+__pinned_func
+static inline int uart_rx_enable(const struct device * dev, uint8_t * buf, size_t len, int32_t timeout)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uint8_t * val; } parm1 = { .val = buf };
+		union { uintptr_t x; size_t val; } parm2 = { .val = len };
+		union { uintptr_t x; int32_t val; } parm3 = { .val = timeout };
+		return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_UART_RX_ENABLE);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_uart_rx_enable(dev, buf, len, timeout);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define uart_rx_enable(dev, buf, len, timeout) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_UART_RX_ENABLE, uart_rx_enable, dev, buf, len, timeout); 	syscall__retval = uart_rx_enable(dev, buf, len, timeout); 	sys_port_trace_syscall_exit(K_SYSCALL_UART_RX_ENABLE, uart_rx_enable, dev, buf, len, timeout, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_uart_rx_enable_u16(const struct device * dev, uint16_t * buf, size_t len, int32_t timeout);
+
+__pinned_func
+static inline int uart_rx_enable_u16(const struct device * dev, uint16_t * buf, size_t len, int32_t timeout)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uint16_t * val; } parm1 = { .val = buf };
+		union { uintptr_t x; size_t val; } parm2 = { .val = len };
+		union { uintptr_t x; int32_t val; } parm3 = { .val = timeout };
+		return (int) arch_syscall_invoke4(parm0.x, parm1.x, parm2.x, parm3.x, K_SYSCALL_UART_RX_ENABLE_U16);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_uart_rx_enable_u16(dev, buf, len, timeout);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define uart_rx_enable_u16(dev, buf, len, timeout) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_UART_RX_ENABLE_U16, uart_rx_enable_u16, dev, buf, len, timeout); 	syscall__retval = uart_rx_enable_u16(dev, buf, len, timeout); 	sys_port_trace_syscall_exit(K_SYSCALL_UART_RX_ENABLE_U16, uart_rx_enable_u16, dev, buf, len, timeout, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_uart_rx_disable(const struct device * dev);
+
+__pinned_func
+static inline int uart_rx_disable(const struct device * dev)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_UART_RX_DISABLE);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_uart_rx_disable(dev);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define uart_rx_disable(dev) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_UART_RX_DISABLE, uart_rx_disable, dev); 	syscall__retval = uart_rx_disable(dev); 	sys_port_trace_syscall_exit(K_SYSCALL_UART_RX_DISABLE, uart_rx_disable, dev, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_uart_line_ctrl_set(const struct device * dev, uint32_t ctrl, uint32_t val);
+
+__pinned_func
+static inline int uart_line_ctrl_set(const struct device * dev, uint32_t ctrl, uint32_t val)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uint32_t val; } parm1 = { .val = ctrl };
+		union { uintptr_t x; uint32_t val; } parm2 = { .val = val };
+		return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_UART_LINE_CTRL_SET);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_uart_line_ctrl_set(dev, ctrl, val);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define uart_line_ctrl_set(dev, ctrl, val) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_UART_LINE_CTRL_SET, uart_line_ctrl_set, dev, ctrl, val); 	syscall__retval = uart_line_ctrl_set(dev, ctrl, val); 	sys_port_trace_syscall_exit(K_SYSCALL_UART_LINE_CTRL_SET, uart_line_ctrl_set, dev, ctrl, val, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_uart_line_ctrl_get(const struct device * dev, uint32_t ctrl, uint32_t * val);
+
+__pinned_func
+static inline int uart_line_ctrl_get(const struct device * dev, uint32_t ctrl, uint32_t * val)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uint32_t val; } parm1 = { .val = ctrl };
+		union { uintptr_t x; uint32_t * val; } parm2 = { .val = val };
+		return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_UART_LINE_CTRL_GET);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_uart_line_ctrl_get(dev, ctrl, val);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define uart_line_ctrl_get(dev, ctrl, val) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_UART_LINE_CTRL_GET, uart_line_ctrl_get, dev, ctrl, val); 	syscall__retval = uart_line_ctrl_get(dev, ctrl, val); 	sys_port_trace_syscall_exit(K_SYSCALL_UART_LINE_CTRL_GET, uart_line_ctrl_get, dev, ctrl, val, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_uart_drv_cmd(const struct device * dev, uint32_t cmd, uint32_t p);
+
+__pinned_func
+static inline int uart_drv_cmd(const struct device * dev, uint32_t cmd, uint32_t p)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uint32_t val; } parm1 = { .val = cmd };
+		union { uintptr_t x; uint32_t val; } parm2 = { .val = p };
+		return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_UART_DRV_CMD);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_uart_drv_cmd(dev, cmd, p);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define uart_drv_cmd(dev, cmd, p) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_UART_DRV_CMD, uart_drv_cmd, dev, cmd, p); 	syscall__retval = uart_drv_cmd(dev, cmd, p); 	sys_port_trace_syscall_exit(K_SYSCALL_UART_DRV_CMD, uart_drv_cmd, dev, cmd, p, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif /* include guard */
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/uart_mux.h b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/uart_mux.h
new file mode 100644
index 0000000..57a5939
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/uart_mux.h
@@ -0,0 +1,51 @@
+/* auto-generated by gen_syscalls.py, don't edit */
+
+#ifndef Z_INCLUDE_SYSCALLS_UART_MUX_H
+#define Z_INCLUDE_SYSCALLS_UART_MUX_H
+
+
+#include <zephyr/tracing/tracing_syscall.h>
+
+#ifndef _ASMLANGUAGE
+
+#include <stdarg.h>
+
+#include <syscall_list.h>
+#include <zephyr/syscall.h>
+
+#include <zephyr/linker/sections.h>
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern const struct device * z_impl_uart_mux_find(int dlci_address);
+
+__pinned_func
+static inline const struct device * uart_mux_find(int dlci_address)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; int val; } parm0 = { .val = dlci_address };
+		return (const struct device *) arch_syscall_invoke1(parm0.x, K_SYSCALL_UART_MUX_FIND);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_uart_mux_find(dlci_address);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define uart_mux_find(dlci_address) ({ 	const struct device * syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_UART_MUX_FIND, uart_mux_find, dlci_address); 	syscall__retval = uart_mux_find(dlci_address); 	sys_port_trace_syscall_exit(K_SYSCALL_UART_MUX_FIND, uart_mux_find, dlci_address, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif /* include guard */
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/updatehub.h b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/updatehub.h
new file mode 100644
index 0000000..4a99d6f
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/updatehub.h
@@ -0,0 +1,139 @@
+/* auto-generated by gen_syscalls.py, don't edit */
+
+#ifndef Z_INCLUDE_SYSCALLS_UPDATEHUB_H
+#define Z_INCLUDE_SYSCALLS_UPDATEHUB_H
+
+
+#include <zephyr/tracing/tracing_syscall.h>
+
+#ifndef _ASMLANGUAGE
+
+#include <stdarg.h>
+
+#include <syscall_list.h>
+#include <zephyr/syscall.h>
+
+#include <zephyr/linker/sections.h>
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern void z_impl_updatehub_autohandler(void);
+
+__pinned_func
+static inline void updatehub_autohandler(void)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		(void) arch_syscall_invoke0(K_SYSCALL_UPDATEHUB_AUTOHANDLER);
+		return;
+	}
+#endif
+	compiler_barrier();
+	z_impl_updatehub_autohandler();
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define updatehub_autohandler() do { 	sys_port_trace_syscall_enter(K_SYSCALL_UPDATEHUB_AUTOHANDLER, updatehub_autohandler); 	updatehub_autohandler(); 	sys_port_trace_syscall_exit(K_SYSCALL_UPDATEHUB_AUTOHANDLER, updatehub_autohandler); } while(false)
+#endif
+#endif
+
+
+extern enum updatehub_response z_impl_updatehub_probe(void);
+
+__pinned_func
+static inline enum updatehub_response updatehub_probe(void)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		return (enum updatehub_response) arch_syscall_invoke0(K_SYSCALL_UPDATEHUB_PROBE);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_updatehub_probe();
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define updatehub_probe() ({ 	enum updatehub_response syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_UPDATEHUB_PROBE, updatehub_probe); 	syscall__retval = updatehub_probe(); 	sys_port_trace_syscall_exit(K_SYSCALL_UPDATEHUB_PROBE, updatehub_probe, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern enum updatehub_response z_impl_updatehub_update(void);
+
+__pinned_func
+static inline enum updatehub_response updatehub_update(void)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		return (enum updatehub_response) arch_syscall_invoke0(K_SYSCALL_UPDATEHUB_UPDATE);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_updatehub_update();
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define updatehub_update() ({ 	enum updatehub_response syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_UPDATEHUB_UPDATE, updatehub_update); 	syscall__retval = updatehub_update(); 	sys_port_trace_syscall_exit(K_SYSCALL_UPDATEHUB_UPDATE, updatehub_update, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_updatehub_confirm(void);
+
+__pinned_func
+static inline int updatehub_confirm(void)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		return (int) arch_syscall_invoke0(K_SYSCALL_UPDATEHUB_CONFIRM);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_updatehub_confirm();
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define updatehub_confirm() ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_UPDATEHUB_CONFIRM, updatehub_confirm); 	syscall__retval = updatehub_confirm(); 	sys_port_trace_syscall_exit(K_SYSCALL_UPDATEHUB_CONFIRM, updatehub_confirm, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_updatehub_reboot(void);
+
+__pinned_func
+static inline int updatehub_reboot(void)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		return (int) arch_syscall_invoke0(K_SYSCALL_UPDATEHUB_REBOOT);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_updatehub_reboot();
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define updatehub_reboot() ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_UPDATEHUB_REBOOT, updatehub_reboot); 	syscall__retval = updatehub_reboot(); 	sys_port_trace_syscall_exit(K_SYSCALL_UPDATEHUB_REBOOT, updatehub_reboot, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif /* include guard */
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/usb_bc12.h b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/usb_bc12.h
new file mode 100644
index 0000000..3b93c9f
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/usb_bc12.h
@@ -0,0 +1,77 @@
+/* auto-generated by gen_syscalls.py, don't edit */
+
+#ifndef Z_INCLUDE_SYSCALLS_USB_BC12_H
+#define Z_INCLUDE_SYSCALLS_USB_BC12_H
+
+
+#include <zephyr/tracing/tracing_syscall.h>
+
+#ifndef _ASMLANGUAGE
+
+#include <stdarg.h>
+
+#include <syscall_list.h>
+#include <zephyr/syscall.h>
+
+#include <zephyr/linker/sections.h>
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern int z_impl_bc12_set_role(const struct device * dev, enum bc12_role role);
+
+__pinned_func
+static inline int bc12_set_role(const struct device * dev, enum bc12_role role)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; enum bc12_role val; } parm1 = { .val = role };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_BC12_SET_ROLE);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_bc12_set_role(dev, role);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define bc12_set_role(dev, role) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_BC12_SET_ROLE, bc12_set_role, dev, role); 	syscall__retval = bc12_set_role(dev, role); 	sys_port_trace_syscall_exit(K_SYSCALL_BC12_SET_ROLE, bc12_set_role, dev, role, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_bc12_set_result_cb(const struct device * dev, bc12_callback_t cb, void * user_data);
+
+__pinned_func
+static inline int bc12_set_result_cb(const struct device * dev, bc12_callback_t cb, void * user_data)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; bc12_callback_t val; } parm1 = { .val = cb };
+		union { uintptr_t x; void * val; } parm2 = { .val = user_data };
+		return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_BC12_SET_RESULT_CB);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_bc12_set_result_cb(dev, cb, user_data);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define bc12_set_result_cb(dev, cb, user_data) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_BC12_SET_RESULT_CB, bc12_set_result_cb, dev, cb, user_data); 	syscall__retval = bc12_set_result_cb(dev, cb, user_data); 	sys_port_trace_syscall_exit(K_SYSCALL_BC12_SET_RESULT_CB, bc12_set_result_cb, dev, cb, user_data, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif /* include guard */
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/w1.h b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/w1.h
new file mode 100644
index 0000000..6e913b4
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/w1.h
@@ -0,0 +1,294 @@
+/* auto-generated by gen_syscalls.py, don't edit */
+
+#ifndef Z_INCLUDE_SYSCALLS_W1_H
+#define Z_INCLUDE_SYSCALLS_W1_H
+
+
+#include <zephyr/tracing/tracing_syscall.h>
+
+#ifndef _ASMLANGUAGE
+
+#include <stdarg.h>
+
+#include <syscall_list.h>
+#include <zephyr/syscall.h>
+
+#include <zephyr/linker/sections.h>
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern int z_impl_w1_change_bus_lock(const struct device * dev, bool lock);
+
+__pinned_func
+static inline int w1_change_bus_lock(const struct device * dev, bool lock)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; bool val; } parm1 = { .val = lock };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_W1_CHANGE_BUS_LOCK);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_w1_change_bus_lock(dev, lock);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define w1_change_bus_lock(dev, lock) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_W1_CHANGE_BUS_LOCK, w1_change_bus_lock, dev, lock); 	syscall__retval = w1_change_bus_lock(dev, lock); 	sys_port_trace_syscall_exit(K_SYSCALL_W1_CHANGE_BUS_LOCK, w1_change_bus_lock, dev, lock, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_w1_reset_bus(const struct device * dev);
+
+__pinned_func
+static inline int w1_reset_bus(const struct device * dev)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_W1_RESET_BUS);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_w1_reset_bus(dev);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define w1_reset_bus(dev) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_W1_RESET_BUS, w1_reset_bus, dev); 	syscall__retval = w1_reset_bus(dev); 	sys_port_trace_syscall_exit(K_SYSCALL_W1_RESET_BUS, w1_reset_bus, dev, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_w1_read_bit(const struct device * dev);
+
+__pinned_func
+static inline int w1_read_bit(const struct device * dev)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_W1_READ_BIT);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_w1_read_bit(dev);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define w1_read_bit(dev) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_W1_READ_BIT, w1_read_bit, dev); 	syscall__retval = w1_read_bit(dev); 	sys_port_trace_syscall_exit(K_SYSCALL_W1_READ_BIT, w1_read_bit, dev, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_w1_write_bit(const struct device * dev, const bool bit);
+
+__pinned_func
+static inline int w1_write_bit(const struct device * dev, const bool bit)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; const bool val; } parm1 = { .val = bit };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_W1_WRITE_BIT);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_w1_write_bit(dev, bit);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define w1_write_bit(dev, bit) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_W1_WRITE_BIT, w1_write_bit, dev, bit); 	syscall__retval = w1_write_bit(dev, bit); 	sys_port_trace_syscall_exit(K_SYSCALL_W1_WRITE_BIT, w1_write_bit, dev, bit, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_w1_read_byte(const struct device * dev);
+
+__pinned_func
+static inline int w1_read_byte(const struct device * dev)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_W1_READ_BYTE);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_w1_read_byte(dev);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define w1_read_byte(dev) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_W1_READ_BYTE, w1_read_byte, dev); 	syscall__retval = w1_read_byte(dev); 	sys_port_trace_syscall_exit(K_SYSCALL_W1_READ_BYTE, w1_read_byte, dev, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_w1_write_byte(const struct device * dev, uint8_t byte);
+
+__pinned_func
+static inline int w1_write_byte(const struct device * dev, uint8_t byte)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uint8_t val; } parm1 = { .val = byte };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_W1_WRITE_BYTE);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_w1_write_byte(dev, byte);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define w1_write_byte(dev, byte) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_W1_WRITE_BYTE, w1_write_byte, dev, byte); 	syscall__retval = w1_write_byte(dev, byte); 	sys_port_trace_syscall_exit(K_SYSCALL_W1_WRITE_BYTE, w1_write_byte, dev, byte, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_w1_read_block(const struct device * dev, uint8_t * buffer, size_t len);
+
+__pinned_func
+static inline int w1_read_block(const struct device * dev, uint8_t * buffer, size_t len)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uint8_t * val; } parm1 = { .val = buffer };
+		union { uintptr_t x; size_t val; } parm2 = { .val = len };
+		return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_W1_READ_BLOCK);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_w1_read_block(dev, buffer, len);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define w1_read_block(dev, buffer, len) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_W1_READ_BLOCK, w1_read_block, dev, buffer, len); 	syscall__retval = w1_read_block(dev, buffer, len); 	sys_port_trace_syscall_exit(K_SYSCALL_W1_READ_BLOCK, w1_read_block, dev, buffer, len, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_w1_write_block(const struct device * dev, const uint8_t * buffer, size_t len);
+
+__pinned_func
+static inline int w1_write_block(const struct device * dev, const uint8_t * buffer, size_t len)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; const uint8_t * val; } parm1 = { .val = buffer };
+		union { uintptr_t x; size_t val; } parm2 = { .val = len };
+		return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_W1_WRITE_BLOCK);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_w1_write_block(dev, buffer, len);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define w1_write_block(dev, buffer, len) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_W1_WRITE_BLOCK, w1_write_block, dev, buffer, len); 	syscall__retval = w1_write_block(dev, buffer, len); 	sys_port_trace_syscall_exit(K_SYSCALL_W1_WRITE_BLOCK, w1_write_block, dev, buffer, len, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern size_t z_impl_w1_get_slave_count(const struct device * dev);
+
+__pinned_func
+static inline size_t w1_get_slave_count(const struct device * dev)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		return (size_t) arch_syscall_invoke1(parm0.x, K_SYSCALL_W1_GET_SLAVE_COUNT);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_w1_get_slave_count(dev);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define w1_get_slave_count(dev) ({ 	size_t syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_W1_GET_SLAVE_COUNT, w1_get_slave_count, dev); 	syscall__retval = w1_get_slave_count(dev); 	sys_port_trace_syscall_exit(K_SYSCALL_W1_GET_SLAVE_COUNT, w1_get_slave_count, dev, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_w1_configure(const struct device * dev, enum w1_settings_type type, uint32_t value);
+
+__pinned_func
+static inline int w1_configure(const struct device * dev, enum w1_settings_type type, uint32_t value)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; enum w1_settings_type val; } parm1 = { .val = type };
+		union { uintptr_t x; uint32_t val; } parm2 = { .val = value };
+		return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_W1_CONFIGURE);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_w1_configure(dev, type, value);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define w1_configure(dev, type, value) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_W1_CONFIGURE, w1_configure, dev, type, value); 	syscall__retval = w1_configure(dev, type, value); 	sys_port_trace_syscall_exit(K_SYSCALL_W1_CONFIGURE, w1_configure, dev, type, value, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_w1_search_bus(const struct device * dev, uint8_t command, uint8_t family, w1_search_callback_t callback, void * user_data);
+
+__pinned_func
+static inline int w1_search_bus(const struct device * dev, uint8_t command, uint8_t family, w1_search_callback_t callback, void * user_data)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uint8_t val; } parm1 = { .val = command };
+		union { uintptr_t x; uint8_t val; } parm2 = { .val = family };
+		union { uintptr_t x; w1_search_callback_t val; } parm3 = { .val = callback };
+		union { uintptr_t x; void * val; } parm4 = { .val = user_data };
+		return (int) arch_syscall_invoke5(parm0.x, parm1.x, parm2.x, parm3.x, parm4.x, K_SYSCALL_W1_SEARCH_BUS);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_w1_search_bus(dev, command, family, callback, user_data);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define w1_search_bus(dev, command, family, callback, user_data) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_W1_SEARCH_BUS, w1_search_bus, dev, command, family, callback, user_data); 	syscall__retval = w1_search_bus(dev, command, family, callback, user_data); 	sys_port_trace_syscall_exit(K_SYSCALL_W1_SEARCH_BUS, w1_search_bus, dev, command, family, callback, user_data, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif /* include guard */
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/watchdog.h b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/watchdog.h
new file mode 100644
index 0000000..c066ee5
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/syscalls/watchdog.h
@@ -0,0 +1,99 @@
+/* auto-generated by gen_syscalls.py, don't edit */
+
+#ifndef Z_INCLUDE_SYSCALLS_WATCHDOG_H
+#define Z_INCLUDE_SYSCALLS_WATCHDOG_H
+
+
+#include <zephyr/tracing/tracing_syscall.h>
+
+#ifndef _ASMLANGUAGE
+
+#include <stdarg.h>
+
+#include <syscall_list.h>
+#include <zephyr/syscall.h>
+
+#include <zephyr/linker/sections.h>
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern int z_impl_wdt_setup(const struct device * dev, uint8_t options);
+
+__pinned_func
+static inline int wdt_setup(const struct device * dev, uint8_t options)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; uint8_t val; } parm1 = { .val = options };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_WDT_SETUP);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_wdt_setup(dev, options);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define wdt_setup(dev, options) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_WDT_SETUP, wdt_setup, dev, options); 	syscall__retval = wdt_setup(dev, options); 	sys_port_trace_syscall_exit(K_SYSCALL_WDT_SETUP, wdt_setup, dev, options, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_wdt_disable(const struct device * dev);
+
+__pinned_func
+static inline int wdt_disable(const struct device * dev)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		return (int) arch_syscall_invoke1(parm0.x, K_SYSCALL_WDT_DISABLE);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_wdt_disable(dev);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define wdt_disable(dev) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_WDT_DISABLE, wdt_disable, dev); 	syscall__retval = wdt_disable(dev); 	sys_port_trace_syscall_exit(K_SYSCALL_WDT_DISABLE, wdt_disable, dev, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+extern int z_impl_wdt_feed(const struct device * dev, int channel_id);
+
+__pinned_func
+static inline int wdt_feed(const struct device * dev, int channel_id)
+{
+#ifdef CONFIG_USERSPACE
+	if (z_syscall_trap()) {
+		union { uintptr_t x; const struct device * val; } parm0 = { .val = dev };
+		union { uintptr_t x; int val; } parm1 = { .val = channel_id };
+		return (int) arch_syscall_invoke2(parm0.x, parm1.x, K_SYSCALL_WDT_FEED);
+	}
+#endif
+	compiler_barrier();
+	return z_impl_wdt_feed(dev, channel_id);
+}
+
+#if defined(CONFIG_TRACING_SYSCALL)
+#ifndef DISABLE_SYSCALL_TRACING
+
+#define wdt_feed(dev, channel_id) ({ 	int syscall__retval; 	sys_port_trace_syscall_enter(K_SYSCALL_WDT_FEED, wdt_feed, dev, channel_id); 	syscall__retval = wdt_feed(dev, channel_id); 	sys_port_trace_syscall_exit(K_SYSCALL_WDT_FEED, wdt_feed, dev, channel_id, syscall__retval); 	syscall__retval; })
+#endif
+#endif
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+#endif /* include guard */
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/version.h b/nrfdemo/builddk/mcuboot/zephyr/include/generated/version.h
new file mode 100644
index 0000000..e117e35
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/version.h
@@ -0,0 +1,25 @@
+#ifndef _KERNEL_VERSION_H_
+#define _KERNEL_VERSION_H_
+
+/*  values come from cmake/version.cmake
+ * BUILD_VERSION related  values will be 'git describe',
+ * alternatively user defined BUILD_VERSION.
+ */
+
+#define ZEPHYR_VERSION_CODE 198243
+#define ZEPHYR_VERSION(a,b,c) (((a) << 16) + ((b) << 8) + (c))
+
+#define KERNELVERSION                   0x3066300
+#define KERNEL_VERSION_NUMBER           0x30663
+#define KERNEL_VERSION_MAJOR            3
+#define KERNEL_VERSION_MINOR            6
+#define KERNEL_PATCHLEVEL               99
+#define KERNEL_TWEAK                    0
+#define KERNEL_VERSION_STRING           "3.6.99"
+#define KERNEL_VERSION_EXTENDED_STRING  "3.6.99+0"
+#define KERNEL_VERSION_TWEAK_STRING     "3.6.99+0"
+
+#define BUILD_VERSION v3.6.99-ncs2
+
+
+#endif /* _KERNEL_VERSION_H_ */
diff --git a/nrfdemo/builddk/mcuboot/zephyr/include/generated/zephyr_commit.h b/nrfdemo/builddk/mcuboot/zephyr/include/generated/zephyr_commit.h
new file mode 100644
index 0000000..6b04bef
--- /dev/null
+++ b/nrfdemo/builddk/mcuboot/zephyr/include/generated/zephyr_commit.h
@@ -0,0 +1,12 @@
+#ifndef _ZEPHYR_COMMIT_H_
+#define _ZEPHYR_COMMIT_H_
+
+/*  values come from cmake/version.cmake
+ * BUILD_COMMIT related  values will be 'git rev-parse',
+ * alternatively user defined BUILD_VERSION.
+ */
+
+#define ZEPHYR_COMMIT                   100befc70c74
+#define ZEPHYR_COMMIT_STRING            "100befc70c74"
+
+#endif /* _ZEPHYR_COMMIT_H_ */