diff options
Diffstat (limited to 'nrfdemo/builddk/tfm/api_ns/platform/common/nrf91')
6 files changed, 2184 insertions, 0 deletions
diff --git a/nrfdemo/builddk/tfm/api_ns/platform/common/nrf91/CMakeLists.txt b/nrfdemo/builddk/tfm/api_ns/platform/common/nrf91/CMakeLists.txt new file mode 100644 index 0000000..290d7f4 --- /dev/null +++ b/nrfdemo/builddk/tfm/api_ns/platform/common/nrf91/CMakeLists.txt @@ -0,0 +1,31 @@ +#------------------------------------------------------------------------------- +# Copyright (c) 2020-2022, Arm Limited. All rights reserved. +# Copyright (c) 2020, Nordic Semiconductor ASA. +# +# SPDX-License-Identifier: BSD-3-Clause +# +#------------------------------------------------------------------------------- + +cmake_policy(SET CMP0076 NEW) +set(CMAKE_CURRENT_SOURCE_DIR ${CMAKE_CURRENT_LIST_DIR}) + +set(target nrf91) +add_subdirectory(${CMAKE_CURRENT_LIST_DIR}/../core nrf_common) + +#========================= Platform Non-Secure ================================# + +target_include_directories(platform_ns + PUBLIC + . +) + +target_sources(platform_ns + PRIVATE + ${HAL_NORDIC_PATH}/nrfx/mdk/system_nrf91.c +) + +target_compile_definitions(platform_ns + PUBLIC + NRF_TRUSTZONE_NONSECURE + DOMAIN_NS=1 +) diff --git a/nrfdemo/builddk/tfm/api_ns/platform/common/nrf91/config.cmake b/nrfdemo/builddk/tfm/api_ns/platform/common/nrf91/config.cmake new file mode 100644 index 0000000..39740bc --- /dev/null +++ b/nrfdemo/builddk/tfm/api_ns/platform/common/nrf91/config.cmake @@ -0,0 +1,14 @@ +#------------------------------------------------------------------------------- +# Copyright (c) 2020, Nordic Semiconductor ASA. +# Copyright (c) 2020-2023, Arm Limited. All rights reserved. +# +# SPDX-License-Identifier: BSD-3-Clause +# +#------------------------------------------------------------------------------- + +include(${PLATFORM_PATH}/common/core/config.cmake) + +set(SECURE_UART1 ON CACHE BOOL "Enable secure UART1") +set(NRF_NS_STORAGE OFF CACHE BOOL "Enable non-secure storage partition") +set(BL2 ON CACHE BOOL "Whether to build BL2") +set(NRF_NS_SECONDARY ${BL2} CACHE BOOL "Enable non-secure secondary partition") diff --git a/nrfdemo/builddk/tfm/api_ns/platform/common/nrf91/nrfx_config_nrf91.h b/nrfdemo/builddk/tfm/api_ns/platform/common/nrf91/nrfx_config_nrf91.h new file mode 100644 index 0000000..e95f392 --- /dev/null +++ b/nrfdemo/builddk/tfm/api_ns/platform/common/nrf91/nrfx_config_nrf91.h @@ -0,0 +1,1657 @@ +/* + * Copyright (c) 2018 - 2020, Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef NRFX_CONFIG_NRF91_H__ +#define NRFX_CONFIG_NRF91_H__ + +#ifndef NRFX_CONFIG_H__ +#error "This file should not be included directly. Include nrfx_config.h instead." +#endif + +/* + * The MDK for nRF9120 used in the nRF9161 target doesn't define the Secure FPU + * as it doesn't exist, but for other platforms like the 9160 it has a dummy + * define. + * Therefore we define it here manually until it is fixed in the MDK. + * See: NCSDK-23046 + */ +#ifdef NRF9120_XXAA +#define NRF_FPU_S 1 +#endif + +#define NRF_CLOCK NRF_PERIPH(NRF_CLOCK) +#define NRF_DPPIC NRF_PERIPH(NRF_DPPIC) +#define NRF_EGU0 NRF_PERIPH(NRF_EGU0) +#define NRF_EGU1 NRF_PERIPH(NRF_EGU1) +#define NRF_EGU2 NRF_PERIPH(NRF_EGU2) +#define NRF_EGU3 NRF_PERIPH(NRF_EGU3) +#define NRF_EGU4 NRF_PERIPH(NRF_EGU4) +#define NRF_EGU5 NRF_PERIPH(NRF_EGU5) +#define NRF_FPU NRF_PERIPH(NRF_FPU) +#define NRF_IPC NRF_PERIPH(NRF_IPC) +#define NRF_I2S NRF_PERIPH(NRF_I2S) +#define NRF_KMU NRF_PERIPH(NRF_KMU) +#define NRF_NVMC NRF_PERIPH(NRF_NVMC) +#define NRF_P0 NRF_PERIPH(NRF_P0) +#define NRF_PDM NRF_PERIPH(NRF_PDM) +#define NRF_POWER NRF_PERIPH(NRF_POWER) +#define NRF_PWM0 NRF_PERIPH(NRF_PWM0) +#define NRF_PWM1 NRF_PERIPH(NRF_PWM1) +#define NRF_PWM2 NRF_PERIPH(NRF_PWM2) +#define NRF_PWM3 NRF_PERIPH(NRF_PWM3) +#define NRF_REGULATORS NRF_PERIPH(NRF_REGULATORS) +#define NRF_RTC0 NRF_PERIPH(NRF_RTC0) +#define NRF_RTC1 NRF_PERIPH(NRF_RTC1) +#define NRF_SAADC NRF_PERIPH(NRF_SAADC) +#define NRF_SPIM0 NRF_PERIPH(NRF_SPIM0) +#define NRF_SPIM1 NRF_PERIPH(NRF_SPIM1) +#define NRF_SPIM2 NRF_PERIPH(NRF_SPIM2) +#define NRF_SPIM3 NRF_PERIPH(NRF_SPIM3) +#define NRF_SPIS0 NRF_PERIPH(NRF_SPIS0) +#define NRF_SPIS1 NRF_PERIPH(NRF_SPIS1) +#define NRF_SPIS2 NRF_PERIPH(NRF_SPIS2) +#define NRF_SPIS3 NRF_PERIPH(NRF_SPIS3) +#define NRF_TIMER0 NRF_PERIPH(NRF_TIMER0) +#define NRF_TIMER1 NRF_PERIPH(NRF_TIMER1) +#define NRF_TIMER2 NRF_PERIPH(NRF_TIMER2) +#define NRF_TWIM0 NRF_PERIPH(NRF_TWIM0) +#define NRF_TWIM1 NRF_PERIPH(NRF_TWIM1) +#define NRF_TWIM2 NRF_PERIPH(NRF_TWIM2) +#define NRF_TWIM3 NRF_PERIPH(NRF_TWIM3) +#define NRF_TWIS0 NRF_PERIPH(NRF_TWIS0) +#define NRF_TWIS1 NRF_PERIPH(NRF_TWIS1) +#define NRF_TWIS2 NRF_PERIPH(NRF_TWIS2) +#define NRF_TWIS3 NRF_PERIPH(NRF_TWIS3) +#define NRF_UARTE0 NRF_PERIPH(NRF_UARTE0) +#define NRF_UARTE1 NRF_PERIPH(NRF_UARTE1) +#define NRF_UARTE2 NRF_PERIPH(NRF_UARTE2) +#define NRF_UARTE3 NRF_PERIPH(NRF_UARTE3) +#define NRF_VMC NRF_PERIPH(NRF_VMC) +#define NRF_WDT NRF_PERIPH(NRF_WDT) + +/* + * The following section provides the name translation for peripherals with + * only one type of access available. For these peripherals, you cannot choose + * between secure and non-secure mapping. + */ +#if defined(NRF_TRUSTZONE_NONSECURE) +#define NRF_GPIOTE1 NRF_GPIOTE1_NS +#else +#define NRF_CC_HOST_RGF NRF_CC_HOST_RGF_S +#define NRF_CRYPTOCELL NRF_CRYPTOCELL_S +#define NRF_CTRL_AP_PERI NRF_CTRL_AP_PERI_S +#define NRF_FICR NRF_FICR_S +#define NRF_GPIOTE0 NRF_GPIOTE0_S +#define NRF_SPU NRF_SPU_S +#define NRF_TAD NRF_TAD_S +#define NRF_UICR NRF_UICR_S +#endif + +/* Fixup for the GPIOTE driver. */ +#if defined(NRF_TRUSTZONE_NONSECURE) +#define NRF_GPIOTE NRF_GPIOTE1 +#else +#define NRF_GPIOTE NRF_GPIOTE0 +#endif + + +// <<< Use Configuration Wizard in Context Menu >>>\n + +// <h> nRF_Drivers + +// <e> NRFX_CLOCK_ENABLED - nrfx_clock - CLOCK peripheral driver. +//========================================================== +#ifndef NRFX_CLOCK_ENABLED +#define NRFX_CLOCK_ENABLED 0 +#endif +// <o> NRFX_CLOCK_CONFIG_LF_SRC - LF clock source. + +// <1=> RC +// <2=> XTAL + +#ifndef NRFX_CLOCK_CONFIG_LF_SRC +#define NRFX_CLOCK_CONFIG_LF_SRC 2 +#endif + +// <q> NRFX_CLOCK_CONFIG_LFXO_TWO_STAGE_ENABLED - Enables two-stage LFXO start procedure + +// <i> If set to a non-zero value, LFRC will be started before LFXO and corresponding +// <i> event will be generated. It means that CPU will be woken up when LFRC +// <i> oscillator starts, but user callback will be invoked only after LFXO +// <i> finally starts. + +#ifndef NRFX_CLOCK_CONFIG_LFXO_TWO_STAGE_ENABLED +#define NRFX_CLOCK_CONFIG_LFXO_TWO_STAGE_ENABLED 0 +#endif + + +// <o> NRFX_CLOCK_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority. + +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef NRFX_CLOCK_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_CLOCK_DEFAULT_CONFIG_IRQ_PRIORITY 7 +#endif + +// <e> NRFX_CLOCK_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRFX_CLOCK_CONFIG_LOG_ENABLED +#define NRFX_CLOCK_CONFIG_LOG_ENABLED 0 +#endif +// <o> NRFX_CLOCK_CONFIG_LOG_LEVEL - Default severity level. + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRFX_CLOCK_CONFIG_LOG_LEVEL +#define NRFX_CLOCK_CONFIG_LOG_LEVEL 3 +#endif + +// <o> NRFX_CLOCK_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_CLOCK_CONFIG_INFO_COLOR +#define NRFX_CLOCK_CONFIG_INFO_COLOR 0 +#endif + +// <o> NRFX_CLOCK_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_CLOCK_CONFIG_DEBUG_COLOR +#define NRFX_CLOCK_CONFIG_DEBUG_COLOR 0 +#endif + +// </e> + +// </e> + +// <e> NRFX_DPPI_ENABLED - nrfx_dppi - DPPI allocator. +//========================================================== +#ifndef NRFX_DPPI_ENABLED +#define NRFX_DPPI_ENABLED 0 +#endif +// <e> NRFX_DPPI_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRFX_DPPI_CONFIG_LOG_ENABLED +#define NRFX_DPPI_CONFIG_LOG_ENABLED 0 +#endif +// <o> NRFX_DPPI_CONFIG_LOG_LEVEL - Default severity level. + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRFX_DPPI_CONFIG_LOG_LEVEL +#define NRFX_DPPI_CONFIG_LOG_LEVEL 3 +#endif + +// <o> NRFX_DPPI_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_DPPI_CONFIG_INFO_COLOR +#define NRFX_DPPI_CONFIG_INFO_COLOR 0 +#endif + +// <o> NRFX_DPPI_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_DPPI_CONFIG_DEBUG_COLOR +#define NRFX_DPPI_CONFIG_DEBUG_COLOR 0 +#endif + +// </e> + +// </e> + +// <e> NRFX_EGU_ENABLED - nrfx_egu - EGU peripheral driver. +//========================================================== +#ifndef NRFX_EGU_ENABLED +#define NRFX_EGU_ENABLED 0 +#endif + +// <q> NRFX_EGU0_ENABLED - Enable EGU0 instance. + +#ifndef NRFX_EGU0_ENABLED +#define NRFX_EGU0_ENABLED 0 +#endif + +// <q> NRFX_EGU1_ENABLED - Enable EGU1 instance. + +#ifndef NRFX_EGU1_ENABLED +#define NRFX_EGU1_ENABLED 0 +#endif + +// <q> NRFX_EGU2_ENABLED - Enable EGU2 instance. + +#ifndef NRFX_EGU2_ENABLED +#define NRFX_EGU2_ENABLED 0 +#endif + +// <q> NRFX_EGU3_ENABLED - Enable EGU3 instance. + +#ifndef NRFX_EGU3_ENABLED +#define NRFX_EGU3_ENABLED 0 +#endif + +// <q> NRFX_EGU4_ENABLED - Enable EGU4 instance. + +#ifndef NRFX_EGU4_ENABLED +#define NRFX_EGU4_ENABLED 0 +#endif + +// <q> NRFX_EGU5_ENABLED - Enable EGU5 instance. + +#ifndef NRFX_EGU5_ENABLED +#define NRFX_EGU5_ENABLED 0 +#endif + +// <o> NRFX_EGU_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority. + +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef NRFX_EGU_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_EGU_DEFAULT_CONFIG_IRQ_PRIORITY 7 +#endif + +// </e> + +// <e> NRFX_GPIOTE_ENABLED - nrfx_gpiote - GPIOTE peripheral driver. +//========================================================== +#ifndef NRFX_GPIOTE_ENABLED +#define NRFX_GPIOTE_ENABLED 0 +#endif +// <o> NRFX_GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS - Number of lower power input pins. +#ifndef NRFX_GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS +#define NRFX_GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS 1 +#endif + +// <o> NRFX_GPIOTE_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority. + +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef NRFX_GPIOTE_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_GPIOTE_DEFAULT_CONFIG_IRQ_PRIORITY 7 +#endif + +// <e> NRFX_GPIOTE_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRFX_GPIOTE_CONFIG_LOG_ENABLED +#define NRFX_GPIOTE_CONFIG_LOG_ENABLED 0 +#endif +// <o> NRFX_GPIOTE_CONFIG_LOG_LEVEL - Default severity level. + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRFX_GPIOTE_CONFIG_LOG_LEVEL +#define NRFX_GPIOTE_CONFIG_LOG_LEVEL 3 +#endif + +// <o> NRFX_GPIOTE_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_GPIOTE_CONFIG_INFO_COLOR +#define NRFX_GPIOTE_CONFIG_INFO_COLOR 0 +#endif + +// <o> NRFX_GPIOTE_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_GPIOTE_CONFIG_DEBUG_COLOR +#define NRFX_GPIOTE_CONFIG_DEBUG_COLOR 0 +#endif + +// </e> + +// </e> + +// <e> NRFX_I2S_ENABLED - nrfx_i2s - I2S peripheral driver. +//========================================================== +#ifndef NRFX_I2S_ENABLED +#define NRFX_I2S_ENABLED 0 +#endif + +// <o> NRFX_I2S_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority. + +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef NRFX_I2S_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_I2S_DEFAULT_CONFIG_IRQ_PRIORITY 7 +#endif + +// <e> NRFX_I2S_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRFX_I2S_CONFIG_LOG_ENABLED +#define NRFX_I2S_CONFIG_LOG_ENABLED 0 +#endif +// <o> NRFX_I2S_CONFIG_LOG_LEVEL - Default severity level. + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRFX_I2S_CONFIG_LOG_LEVEL +#define NRFX_I2S_CONFIG_LOG_LEVEL 3 +#endif + +// <o> NRFX_I2S_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_I2S_CONFIG_INFO_COLOR +#define NRFX_I2S_CONFIG_INFO_COLOR 0 +#endif + +// <o> NRFX_I2S_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_I2S_CONFIG_DEBUG_COLOR +#define NRFX_I2S_CONFIG_DEBUG_COLOR 0 +#endif + +// </e> + +// </e> + +// <e> NRFX_IPC_ENABLED - nrfx_ipc - IPC peripheral driver +//========================================================== +#ifndef NRFX_IPC_ENABLED +#define NRFX_IPC_ENABLED 0 +#endif + +// </e> + +// <e> NRFX_NVMC_ENABLED - nrfx_nvmc - NVMC peripheral driver +//========================================================== +#ifndef NRFX_NVMC_ENABLED +#define NRFX_NVMC_ENABLED 0 +#endif + +// </e> + +// <e> NRFX_PDM_ENABLED - nrfx_pdm - PDM peripheral driver. +//========================================================== +#ifndef NRFX_PDM_ENABLED +#define NRFX_PDM_ENABLED 0 +#endif + +// <o> NRFX_PDM_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority. + +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef NRFX_PDM_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_PDM_DEFAULT_CONFIG_IRQ_PRIORITY 7 +#endif + +// <e> NRFX_PDM_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRFX_PDM_CONFIG_LOG_ENABLED +#define NRFX_PDM_CONFIG_LOG_ENABLED 0 +#endif +// <o> NRFX_PDM_CONFIG_LOG_LEVEL - Default severity level. + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRFX_PDM_CONFIG_LOG_LEVEL +#define NRFX_PDM_CONFIG_LOG_LEVEL 3 +#endif + +// <o> NRFX_PDM_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_PDM_CONFIG_INFO_COLOR +#define NRFX_PDM_CONFIG_INFO_COLOR 0 +#endif + +// <o> NRFX_PDM_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_PDM_CONFIG_DEBUG_COLOR +#define NRFX_PDM_CONFIG_DEBUG_COLOR 0 +#endif + +// </e> + +// </e> + +// <e> NRFX_POWER_ENABLED - nrfx_power - POWER peripheral driver. +//========================================================== +#ifndef NRFX_POWER_ENABLED +#define NRFX_POWER_ENABLED 0 +#endif +// <o> NRFX_POWER_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority. + +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef NRFX_POWER_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_POWER_DEFAULT_CONFIG_IRQ_PRIORITY 7 +#endif + +// </e> + +// <e> NRFX_PRS_ENABLED - nrfx_prs - Peripheral Resource Sharing (PRS) module. +//========================================================== +#ifndef NRFX_PRS_ENABLED +#define NRFX_PRS_ENABLED 0 +#endif +// <q> NRFX_PRS_BOX_0_ENABLED - Enables box 0 in the module. + + +#ifndef NRFX_PRS_BOX_0_ENABLED +#define NRFX_PRS_BOX_0_ENABLED 0 +#endif + +// <q> NRFX_PRS_BOX_1_ENABLED - Enables box 1 in the module. + + +#ifndef NRFX_PRS_BOX_1_ENABLED +#define NRFX_PRS_BOX_1_ENABLED 0 +#endif + +// <q> NRFX_PRS_BOX_2_ENABLED - Enables box 2 in the module. + + +#ifndef NRFX_PRS_BOX_2_ENABLED +#define NRFX_PRS_BOX_2_ENABLED 0 +#endif + +// <q> NRFX_PRS_BOX_3_ENABLED - Enables box 3 in the module. + + +#ifndef NRFX_PRS_BOX_3_ENABLED +#define NRFX_PRS_BOX_3_ENABLED 0 +#endif + +// <e> NRFX_PRS_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRFX_PRS_CONFIG_LOG_ENABLED +#define NRFX_PRS_CONFIG_LOG_ENABLED 0 +#endif +// <o> NRFX_PRS_CONFIG_LOG_LEVEL - Default severity level. + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRFX_PRS_CONFIG_LOG_LEVEL +#define NRFX_PRS_CONFIG_LOG_LEVEL 3 +#endif + +// <o> NRFX_PRS_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_PRS_CONFIG_INFO_COLOR +#define NRFX_PRS_CONFIG_INFO_COLOR 0 +#endif + +// <o> NRFX_PRS_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_PRS_CONFIG_DEBUG_COLOR +#define NRFX_PRS_CONFIG_DEBUG_COLOR 0 +#endif + +// </e> + +// </e> + +// <e> NRFX_PWM_ENABLED - nrfx_pwm - PWM peripheral driver. +//========================================================== +#ifndef NRFX_PWM_ENABLED +#define NRFX_PWM_ENABLED 0 +#endif +// <q> NRFX_PWM0_ENABLED - Enables PWM0 instance. + + +#ifndef NRFX_PWM0_ENABLED +#define NRFX_PWM0_ENABLED 0 +#endif + +// <q> NRFX_PWM1_ENABLED - Enables PWM1 instance. + + +#ifndef NRFX_PWM1_ENABLED +#define NRFX_PWM1_ENABLED 0 +#endif + +// <q> NRFX_PWM2_ENABLED - Enables PWM2 instance. + + +#ifndef NRFX_PWM2_ENABLED +#define NRFX_PWM2_ENABLED 0 +#endif + +// <q> NRFX_PWM3_ENABLED - Enables PWM3 instance. + + +#ifndef NRFX_PWM3_ENABLED +#define NRFX_PWM3_ENABLED 0 +#endif + +// <o> NRFX_PWM_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority. + +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef NRFX_PWM_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_PWM_DEFAULT_CONFIG_IRQ_PRIORITY 7 +#endif + +// <e> NRFX_PWM_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRFX_PWM_CONFIG_LOG_ENABLED +#define NRFX_PWM_CONFIG_LOG_ENABLED 0 +#endif +// <o> NRFX_PWM_CONFIG_LOG_LEVEL - Default severity level. + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRFX_PWM_CONFIG_LOG_LEVEL +#define NRFX_PWM_CONFIG_LOG_LEVEL 3 +#endif + +// <o> NRFX_PWM_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_PWM_CONFIG_INFO_COLOR +#define NRFX_PWM_CONFIG_INFO_COLOR 0 +#endif + +// <o> NRFX_PWM_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_PWM_CONFIG_DEBUG_COLOR +#define NRFX_PWM_CONFIG_DEBUG_COLOR 0 +#endif + +// </e> + +// </e> + +// <e> NRFX_RTC_ENABLED - nrfx_rtc - RTC peripheral driver. +//========================================================== +#ifndef NRFX_RTC_ENABLED +#define NRFX_RTC_ENABLED 0 +#endif +// <q> NRFX_RTC0_ENABLED - Enables RTC0 instance. + + +#ifndef NRFX_RTC0_ENABLED +#define NRFX_RTC0_ENABLED 0 +#endif + +// <q> NRFX_RTC1_ENABLED - Enables RTC1 instance. + + +#ifndef NRFX_RTC1_ENABLED +#define NRFX_RTC1_ENABLED 0 +#endif + +// <o> NRFX_RTC_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority. + +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef NRFX_RTC_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_RTC_DEFAULT_CONFIG_IRQ_PRIORITY 7 +#endif + +// <e> NRFX_RTC_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRFX_RTC_CONFIG_LOG_ENABLED +#define NRFX_RTC_CONFIG_LOG_ENABLED 0 +#endif +// <o> NRFX_RTC_CONFIG_LOG_LEVEL - Default severity level. + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRFX_RTC_CONFIG_LOG_LEVEL +#define NRFX_RTC_CONFIG_LOG_LEVEL 3 +#endif + +// <o> NRFX_RTC_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_RTC_CONFIG_INFO_COLOR +#define NRFX_RTC_CONFIG_INFO_COLOR 0 +#endif + +// <o> NRFX_RTC_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_RTC_CONFIG_DEBUG_COLOR +#define NRFX_RTC_CONFIG_DEBUG_COLOR 0 +#endif + +// </e> + +// </e> + +// <e> NRFX_SAADC_ENABLED - nrfx_saadc - SAADC peripheral driver. +//========================================================== +#ifndef NRFX_SAADC_ENABLED +#define NRFX_SAADC_ENABLED 0 +#endif + +// <o> NRFX_SAADC_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority. + +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef NRFX_SAADC_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_SAADC_DEFAULT_CONFIG_IRQ_PRIORITY 7 +#endif + +// <e> NRFX_SAADC_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRFX_SAADC_CONFIG_LOG_ENABLED +#define NRFX_SAADC_CONFIG_LOG_ENABLED 0 +#endif +// <o> NRFX_SAADC_CONFIG_LOG_LEVEL - Default severity level. + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRFX_SAADC_CONFIG_LOG_LEVEL +#define NRFX_SAADC_CONFIG_LOG_LEVEL 3 +#endif + +// <o> NRFX_SAADC_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_SAADC_CONFIG_INFO_COLOR +#define NRFX_SAADC_CONFIG_INFO_COLOR 0 +#endif + +// <o> NRFX_SAADC_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_SAADC_CONFIG_DEBUG_COLOR +#define NRFX_SAADC_CONFIG_DEBUG_COLOR 0 +#endif + +// </e> + +// </e> + +// <e> NRFX_SPIM_ENABLED - nrfx_spim - SPIM peripheral driver. +//========================================================== +#ifndef NRFX_SPIM_ENABLED +#define NRFX_SPIM_ENABLED 0 +#endif +// <q> NRFX_SPIM0_ENABLED - Enables SPIM0 instance. + + +#ifndef NRFX_SPIM0_ENABLED +#define NRFX_SPIM0_ENABLED 0 +#endif + +// <q> NRFX_SPIM1_ENABLED - Enables SPIM1 instance. + + +#ifndef NRFX_SPIM1_ENABLED +#define NRFX_SPIM1_ENABLED 0 +#endif + +// <q> NRFX_SPIM2_ENABLED - Enables SPIM2 instance. + + +#ifndef NRFX_SPIM2_ENABLED +#define NRFX_SPIM2_ENABLED 0 +#endif + +// <q> NRFX_SPIM3_ENABLED - Enables SPIM3 instance. + + +#ifndef NRFX_SPIM3_ENABLED +#define NRFX_SPIM3_ENABLED 0 +#endif + +// <o> NRFX_SPIM_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority. + +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef NRFX_SPIM_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_SPIM_DEFAULT_CONFIG_IRQ_PRIORITY 7 +#endif + +// <e> NRFX_SPIM_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRFX_SPIM_CONFIG_LOG_ENABLED +#define NRFX_SPIM_CONFIG_LOG_ENABLED 0 +#endif +// <o> NRFX_SPIM_CONFIG_LOG_LEVEL - Default severity level. + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRFX_SPIM_CONFIG_LOG_LEVEL +#define NRFX_SPIM_CONFIG_LOG_LEVEL 3 +#endif + +// <o> NRFX_SPIM_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_SPIM_CONFIG_INFO_COLOR +#define NRFX_SPIM_CONFIG_INFO_COLOR 0 +#endif + +// <o> NRFX_SPIM_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_SPIM_CONFIG_DEBUG_COLOR +#define NRFX_SPIM_CONFIG_DEBUG_COLOR 0 +#endif + +// </e> + +// </e> + +// <e> NRFX_SPIS_ENABLED - nrfx_spis - SPIS peripheral driver. +//========================================================== +#ifndef NRFX_SPIS_ENABLED +#define NRFX_SPIS_ENABLED 0 +#endif +// <q> NRFX_SPIS0_ENABLED - Enables SPIS0 instance. + + +#ifndef NRFX_SPIS0_ENABLED +#define NRFX_SPIS0_ENABLED 0 +#endif + +// <q> NRFX_SPIS1_ENABLED - Enables SPIS1 instance. + + +#ifndef NRFX_SPIS1_ENABLED +#define NRFX_SPIS1_ENABLED 0 +#endif + +// <q> NRFX_SPIS2_ENABLED - Enables SPIS2 instance. + + +#ifndef NRFX_SPIS2_ENABLED +#define NRFX_SPIS2_ENABLED 0 +#endif + +// <q> NRFX_SPIS3_ENABLED - Enables SPIS3 instance. + + +#ifndef NRFX_SPIS3_ENABLED +#define NRFX_SPIS3_ENABLED 0 +#endif + +// <o> NRFX_SPIS_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority. + +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef NRFX_SPIS_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_SPIS_DEFAULT_CONFIG_IRQ_PRIORITY 7 +#endif + +// <e> NRFX_SPIS_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRFX_SPIS_CONFIG_LOG_ENABLED +#define NRFX_SPIS_CONFIG_LOG_ENABLED 0 +#endif +// <o> NRFX_SPIS_CONFIG_LOG_LEVEL - Default severity level. + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRFX_SPIS_CONFIG_LOG_LEVEL +#define NRFX_SPIS_CONFIG_LOG_LEVEL 3 +#endif + +// <o> NRFX_SPIS_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_SPIS_CONFIG_INFO_COLOR +#define NRFX_SPIS_CONFIG_INFO_COLOR 0 +#endif + +// <o> NRFX_SPIS_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_SPIS_CONFIG_DEBUG_COLOR +#define NRFX_SPIS_CONFIG_DEBUG_COLOR 0 +#endif + +// </e> + +// </e> + +// <q> NRFX_SYSTICK_ENABLED - nrfx_systick - ARM(R) SysTick driver. + + +#ifndef NRFX_SYSTICK_ENABLED +#define NRFX_SYSTICK_ENABLED 0 +#endif + +// <e> NRFX_TIMER_ENABLED - nrfx_timer - TIMER periperal driver. +//========================================================== +#ifndef NRFX_TIMER_ENABLED +#define NRFX_TIMER_ENABLED 0 +#endif + +// <q> NRFX_TIMER0_ENABLED - Enables TIMER0 instance. + +#ifndef NRFX_TIMER0_ENABLED +#define NRFX_TIMER0_ENABLED 0 +#endif + +// <q> NRFX_TIMER1_ENABLED - Enables TIMER1 instance. + +#ifndef NRFX_TIMER1_ENABLED +#define NRFX_TIMER1_ENABLED 0 +#endif + +// <q> NRFX_TIMER2_ENABLED - Enables TIMER2 instance. + +#ifndef NRFX_TIMER2_ENABLED +#define NRFX_TIMER2_ENABLED 0 +#endif + +// <o> NRFX_TIMER_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority. + +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef NRFX_TIMER_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_TIMER_DEFAULT_CONFIG_IRQ_PRIORITY 7 +#endif + +// <e> NRFX_TIMER_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRFX_TIMER_CONFIG_LOG_ENABLED +#define NRFX_TIMER_CONFIG_LOG_ENABLED 0 +#endif +// <o> NRFX_TIMER_CONFIG_LOG_LEVEL - Default severity level. + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRFX_TIMER_CONFIG_LOG_LEVEL +#define NRFX_TIMER_CONFIG_LOG_LEVEL 3 +#endif + +// <o> NRFX_TIMER_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_TIMER_CONFIG_INFO_COLOR +#define NRFX_TIMER_CONFIG_INFO_COLOR 0 +#endif + +// <o> NRFX_TIMER_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_TIMER_CONFIG_DEBUG_COLOR +#define NRFX_TIMER_CONFIG_DEBUG_COLOR 0 +#endif + +// </e> + +// </e> + +// <e> NRFX_TWIM_ENABLED - nrfx_twim - TWIM peripheral driver. +//========================================================== +#ifndef NRFX_TWIM_ENABLED +#define NRFX_TWIM_ENABLED 0 +#endif +// <q> NRFX_TWIM0_ENABLED - Enables TWIM0 instance. + + +#ifndef NRFX_TWIM0_ENABLED +#define NRFX_TWIM0_ENABLED 0 +#endif + +// <q> NRFX_TWIM1_ENABLED - Enables TWIM1 instance. + + +#ifndef NRFX_TWIM1_ENABLED +#define NRFX_TWIM1_ENABLED 0 +#endif + +// <q> NRFX_TWIM2_ENABLED - Enables TWIM2 instance. + + +#ifndef NRFX_TWIM2_ENABLED +#define NRFX_TWIM2_ENABLED 0 +#endif + +// <q> NRFX_TWIM3_ENABLED - Enables TWIM3 instance. + + +#ifndef NRFX_TWIM3_ENABLED +#define NRFX_TWIM3_ENABLED 0 +#endif + +// <o> NRFX_TWIM_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority. + +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef NRFX_TWIM_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_TWIM_DEFAULT_CONFIG_IRQ_PRIORITY 7 +#endif + +// <e> NRFX_TWIM_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRFX_TWIM_CONFIG_LOG_ENABLED +#define NRFX_TWIM_CONFIG_LOG_ENABLED 0 +#endif +// <o> NRFX_TWIM_CONFIG_LOG_LEVEL - Default severity level. + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRFX_TWIM_CONFIG_LOG_LEVEL +#define NRFX_TWIM_CONFIG_LOG_LEVEL 3 +#endif + +// <o> NRFX_TWIM_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_TWIM_CONFIG_INFO_COLOR +#define NRFX_TWIM_CONFIG_INFO_COLOR 0 +#endif + +// <o> NRFX_TWIM_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_TWIM_CONFIG_DEBUG_COLOR +#define NRFX_TWIM_CONFIG_DEBUG_COLOR 0 +#endif + +// </e> + +// </e> + +// <e> NRFX_TWIS_ENABLED - nrfx_twis - TWIS peripheral driver. +//========================================================== +#ifndef NRFX_TWIS_ENABLED +#define NRFX_TWIS_ENABLED 0 +#endif +// <q> NRFX_TWIS0_ENABLED - Enables TWIS0 instance. + + +#ifndef NRFX_TWIS0_ENABLED +#define NRFX_TWIS0_ENABLED 0 +#endif + +// <q> NRFX_TWIS1_ENABLED - Enables TWIS1 instance. + + +#ifndef NRFX_TWIS1_ENABLED +#define NRFX_TWIS1_ENABLED 0 +#endif + +// <q> NRFX_TWIS2_ENABLED - Enables TWIS2 instance. + + +#ifndef NRFX_TWIS2_ENABLED +#define NRFX_TWIS2_ENABLED 0 +#endif + +// <q> NRFX_TWIS3_ENABLED - Enables TWIS3 instance. + + +#ifndef NRFX_TWIS3_ENABLED +#define NRFX_TWIS3_ENABLED 0 +#endif + +// <q> NRFX_TWIS_ASSUME_INIT_AFTER_RESET_ONLY - Assumes that any instance would be initialized only once. + + +// <i> Optimization flag. Registers used by TWIS are shared by other peripherals. Normally, during initialization driver tries to clear all registers to known state before doing the initialization itself. This gives initialization safe procedure, no matter when it would be called. If you activate TWIS only once and do never uninitialize it - set this flag to 1 what gives more optimal code. + +#ifndef NRFX_TWIS_ASSUME_INIT_AFTER_RESET_ONLY +#define NRFX_TWIS_ASSUME_INIT_AFTER_RESET_ONLY 0 +#endif + +// <q> NRFX_TWIS_NO_SYNC_MODE - Removes support for synchronous mode. + +// <i> Synchronous mode would be used in specific situations. And it uses some additional code and data memory to safely process state machine by polling it in status functions. If this functionality is not required it may be disabled to free some resources. + +#ifndef NRFX_TWIS_NO_SYNC_MODE +#define NRFX_TWIS_NO_SYNC_MODE 0 +#endif + +// <o> NRFX_TWIS_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority. + +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef NRFX_TWIS_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_TWIS_DEFAULT_CONFIG_IRQ_PRIORITY 7 +#endif + +// <e> NRFX_TWIS_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRFX_TWIS_CONFIG_LOG_ENABLED +#define NRFX_TWIS_CONFIG_LOG_ENABLED 0 +#endif +// <o> NRFX_TWIS_CONFIG_LOG_LEVEL - Default severity level. + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRFX_TWIS_CONFIG_LOG_LEVEL +#define NRFX_TWIS_CONFIG_LOG_LEVEL 3 +#endif + +// <o> NRFX_TWIS_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_TWIS_CONFIG_INFO_COLOR +#define NRFX_TWIS_CONFIG_INFO_COLOR 0 +#endif + +// <o> NRFX_TWIS_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_TWIS_CONFIG_DEBUG_COLOR +#define NRFX_TWIS_CONFIG_DEBUG_COLOR 0 +#endif + +// </e> + +// </e> + +// <e> NRFX_UARTE_ENABLED - nrfx_uarte - UARTE peripheral driver. +//========================================================== +#ifndef NRFX_UARTE_ENABLED +#define NRFX_UARTE_ENABLED 0 +#endif +// <q> NRFX_UARTE0_ENABLED - Enables UARTE0 instances +#ifndef NRFX_UARTE0_ENABLED +#define NRFX_UARTE0_ENABLED 0 +#endif + +// <q> NRFX_UARTE1_ENABLED - Enables UARTE1 instance. +#ifndef NRFX_UARTE1_ENABLED +#define NRFX_UARTE1_ENABLED 0 +#endif + +// <q> NRFX_UARTE2_ENABLED - Enables UARTE2 instance. +#ifndef NRFX_UARTE2_ENABLED +#define NRFX_UARTE2_ENABLED 0 +#endif + +// <q> NRFX_UARTE3_ENABLED - Enables UARTE3 instance. +#ifndef NRFX_UARTE3_ENABLED +#define NRFX_UARTE3_ENABLED 0 +#endif + +// <o> NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority. + +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY 7 +#endif + +// <e> NRFX_UARTE_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRFX_UARTE_CONFIG_LOG_ENABLED +#define NRFX_UARTE_CONFIG_LOG_ENABLED 0 +#endif +// <o> NRFX_UARTE_CONFIG_LOG_LEVEL - Default severity level. + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRFX_UARTE_CONFIG_LOG_LEVEL +#define NRFX_UARTE_CONFIG_LOG_LEVEL 3 +#endif + +// <o> NRFX_UARTE_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_UARTE_CONFIG_INFO_COLOR +#define NRFX_UARTE_CONFIG_INFO_COLOR 0 +#endif + +// <o> NRFX_UARTE_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_UARTE_CONFIG_DEBUG_COLOR +#define NRFX_UARTE_CONFIG_DEBUG_COLOR 0 +#endif + +// </e> + +// </e> + +// <e> NRFX_WDT_ENABLED - nrfx_wdt - WDT peripheral driver. +//========================================================== +#ifndef NRFX_WDT_ENABLED +#define NRFX_WDT_ENABLED 0 +#endif +// <q> NRFX_WDT0_ENABLED - Enable WDT0 instance. + + +#ifndef NRFX_WDT0_ENABLED +#define NRFX_WDT0_ENABLED 0 +#endif + +// <o> NRFX_WDT_CONFIG_NO_IRQ - Remove WDT IRQ handling from WDT driver. + +// <0=> Include WDT IRQ handling +// <1=> Remove WDT IRQ handling + +#ifndef NRFX_WDT_CONFIG_NO_IRQ +#define NRFX_WDT_CONFIG_NO_IRQ 0 +#endif + +// <o> NRFX_WDT_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority. + +// <0=> 0 (highest) +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 + +#ifndef NRFX_WDT_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_WDT_DEFAULT_CONFIG_IRQ_PRIORITY 7 +#endif + +// <e> NRFX_WDT_CONFIG_LOG_ENABLED - Enables logging in the module. +//========================================================== +#ifndef NRFX_WDT_CONFIG_LOG_ENABLED +#define NRFX_WDT_CONFIG_LOG_ENABLED 0 +#endif +// <o> NRFX_WDT_CONFIG_LOG_LEVEL - Default severity level. + +// <0=> Off +// <1=> Error +// <2=> Warning +// <3=> Info +// <4=> Debug + +#ifndef NRFX_WDT_CONFIG_LOG_LEVEL +#define NRFX_WDT_CONFIG_LOG_LEVEL 3 +#endif + +// <o> NRFX_WDT_CONFIG_INFO_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_WDT_CONFIG_INFO_COLOR +#define NRFX_WDT_CONFIG_INFO_COLOR 0 +#endif + +// <o> NRFX_WDT_CONFIG_DEBUG_COLOR - ANSI escape code prefix. + +// <0=> Default +// <1=> Black +// <2=> Red +// <3=> Green +// <4=> Yellow +// <5=> Blue +// <6=> Magenta +// <7=> Cyan +// <8=> White + +#ifndef NRFX_WDT_CONFIG_DEBUG_COLOR +#define NRFX_WDT_CONFIG_DEBUG_COLOR 0 +#endif + +// </e> + +// </e> + +// </h> + +#endif // NRFX_CONFIG_NRF91_H__ diff --git a/nrfdemo/builddk/tfm/api_ns/platform/common/nrf91/partition/flash_layout.h b/nrfdemo/builddk/tfm/api_ns/platform/common/nrf91/partition/flash_layout.h new file mode 100644 index 0000000..ca15bda --- /dev/null +++ b/nrfdemo/builddk/tfm/api_ns/platform/common/nrf91/partition/flash_layout.h @@ -0,0 +1,242 @@ +/* + * Copyright (c) 2018-2022 Arm Limited. All rights reserved. + * Copyright (c) 2020 Nordic Semiconductor ASA. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef __FLASH_LAYOUT_H__ +#define __FLASH_LAYOUT_H__ + +/* Flash layout on nRF91 with BL2: + * + * 0x0000_0000 BL2 - MCUBoot (64 KB) + * 0x0001_0000 Primary image area (448 KB): + * 0x0001_0000 Secure image primary (256 KB) + * 0x0005_0000 Non-secure image primary (192 KB) + * 0x0008_0000 Secondary image area (448 KB): + * 0x0008_0000 Secure image secondary (256 KB) + * 0x000c_0000 Non-secure image secondary (192 KB) + * 0x000f_0000 Protected Storage Area (16 KB) + * 0x000f_4000 Internal Trusted Storage Area (8 KB) + * 0x000f_6000 OTP / NV counters area (8 KB) + * 0x000f_8000 Non-secure storage, used when built with NRF_NS_STORAGE=ON, + * otherwise unused (32 KB) + * + * Flash layout on nRF91 without BL2: + * + * 0x0000_0000 Primary image area (960 KB): + * 0x0000_0000 Secure image primary (480 KB) + * 0x0007_8000 Non-secure image primary (480 KB) + * 0x000f_0000 Protected Storage Area (16 KB) + * 0x000f_4000 Internal Trusted Storage Area (8 KB) + * 0x000f_6000 OTP / NV counters area (8 KB) + * 0x000f_8000 Non-secure storage, used when built with NRF_NS_STORAGE=ON, + * otherwise unused (32 KB) + */ + +/* This header file is included from linker scatter file as well, where only a + * limited C constructs are allowed. Therefore it is not possible to include + * here the platform_base_address.h to access flash related defines. To resolve + * this some of the values are redefined here with different names, these are + * marked with comment. + */ + +/* Size of a Secure and of a Non-secure image */ +#ifdef PSA_API_TEST_IPC +/* Firmware Framework test suites */ +#define FLASH_S_PARTITION_SIZE (0x48000) /* S partition: 288 kB*/ +#define FLASH_NS_PARTITION_SIZE (0x28000) /* NS partition: 160 kB*/ +#else +#define FLASH_S_PARTITION_SIZE (0x40000) /* S partition: 256 kB*/ +#define FLASH_NS_PARTITION_SIZE (0x30000) /* NS partition: 192 kB*/ +#endif + +#if (FLASH_S_PARTITION_SIZE > FLASH_NS_PARTITION_SIZE) +#define FLASH_MAX_PARTITION_SIZE FLASH_S_PARTITION_SIZE +#else +#define FLASH_MAX_PARTITION_SIZE FLASH_NS_PARTITION_SIZE +#endif +/* Sector size of the embedded flash hardware (erase/program) */ +#define FLASH_AREA_IMAGE_SECTOR_SIZE (0x1000) /* 4 KB. Flash memory program/erase operations have a page granularity. */ + +/* FLASH size */ +#define FLASH_TOTAL_SIZE (0x100000) /* 1024 kB. */ + +/* Flash layout info for BL2 bootloader */ +#define FLASH_BASE_ADDRESS (0x00000000) + + +/* Offset and size definitions of the flash partitions that are handled by the + * bootloader. The image swapping is done between IMAGE_PRIMARY and + * IMAGE_SECONDARY, SCRATCH is used as a temporary storage during image + * swapping. + */ +#define FLASH_AREA_BL2_OFFSET (0x0) +#define FLASH_AREA_BL2_SIZE (0x10000) /* 64 KB */ + +#if !defined(MCUBOOT_IMAGE_NUMBER) || (MCUBOOT_IMAGE_NUMBER == 1) +/* Secure + Non-secure image primary slot */ +#define FLASH_AREA_0_ID (1) +#define FLASH_AREA_0_OFFSET (FLASH_AREA_BL2_OFFSET + FLASH_AREA_BL2_SIZE) +#define FLASH_AREA_0_SIZE (FLASH_S_PARTITION_SIZE + \ + FLASH_NS_PARTITION_SIZE) +/* Secure + Non-secure secondary slot */ +#define FLASH_AREA_2_ID (FLASH_AREA_0_ID + 1) +#define FLASH_AREA_2_OFFSET (FLASH_AREA_0_OFFSET + FLASH_AREA_0_SIZE) +#define FLASH_AREA_2_SIZE (FLASH_S_PARTITION_SIZE + \ + FLASH_NS_PARTITION_SIZE) +/* Not used, only the Non-swapping firmware upgrade operation + * is supported on nRF91. + */ +#define FLASH_AREA_SCRATCH_ID (FLASH_AREA_2_ID + 1) +#define FLASH_AREA_SCRATCH_OFFSET (FLASH_AREA_2_OFFSET + FLASH_AREA_2_SIZE) +#define FLASH_AREA_SCRATCH_SIZE (0) +/* Maximum number of image sectors supported by the bootloader. */ +#define MCUBOOT_MAX_IMG_SECTORS ((FLASH_S_PARTITION_SIZE + \ + FLASH_NS_PARTITION_SIZE) / \ + FLASH_AREA_IMAGE_SECTOR_SIZE) +#elif (MCUBOOT_IMAGE_NUMBER == 2) +/* Secure image primary slot */ +#define FLASH_AREA_0_ID (1) +#define FLASH_AREA_0_OFFSET (FLASH_AREA_BL2_OFFSET + FLASH_AREA_BL2_SIZE) +#define FLASH_AREA_0_SIZE (FLASH_S_PARTITION_SIZE) +/* Non-secure image primary slot */ +#define FLASH_AREA_1_ID (FLASH_AREA_0_ID + 1) +#define FLASH_AREA_1_OFFSET (FLASH_AREA_0_OFFSET + FLASH_AREA_0_SIZE) +#define FLASH_AREA_1_SIZE (FLASH_NS_PARTITION_SIZE) +/* Secure image secondary slot */ +#define FLASH_AREA_2_ID (FLASH_AREA_1_ID + 1) +#define FLASH_AREA_2_OFFSET (FLASH_AREA_1_OFFSET + FLASH_AREA_1_SIZE) +#define FLASH_AREA_2_SIZE (FLASH_S_PARTITION_SIZE) +/* Non-secure image secondary slot */ +#define FLASH_AREA_3_ID (FLASH_AREA_2_ID + 1) +#define FLASH_AREA_3_OFFSET (FLASH_AREA_2_OFFSET + FLASH_AREA_2_SIZE) +#define FLASH_AREA_3_SIZE (FLASH_NS_PARTITION_SIZE) +/* Not used, only the Non-swapping firmware upgrade operation + * is supported on nRF91. + */ +#define FLASH_AREA_SCRATCH_ID (FLASH_AREA_3_ID + 1) +#define FLASH_AREA_SCRATCH_OFFSET (FLASH_AREA_3_OFFSET + FLASH_AREA_3_SIZE) +#define FLASH_AREA_SCRATCH_SIZE (0) +/* Maximum number of image sectors supported by the bootloader. */ +#define MCUBOOT_MAX_IMG_SECTORS (FLASH_MAX_PARTITION_SIZE / \ + FLASH_AREA_IMAGE_SECTOR_SIZE) +#else /* MCUBOOT_IMAGE_NUMBER > 2 */ +#error "Only MCUBOOT_IMAGE_NUMBER 1 and 2 are supported!" +#endif /* MCUBOOT_IMAGE_NUMBER */ + +/* Not used, only the Non-swapping firmware upgrade operation + * is supported on nRF91. The maximum number of status entries + * supported by the bootloader. + */ +#define MCUBOOT_STATUS_MAX_ENTRIES (0) + + +/* Protected Storage (PS) Service definitions */ +#define FLASH_PS_AREA_OFFSET (FLASH_AREA_SCRATCH_OFFSET + \ + FLASH_AREA_SCRATCH_SIZE) +#define FLASH_PS_AREA_SIZE (0x4000) /* 16 KB */ + +/* Internal Trusted Storage (ITS) Service definitions */ +#define FLASH_ITS_AREA_OFFSET (FLASH_PS_AREA_OFFSET + \ + FLASH_PS_AREA_SIZE) +#define FLASH_ITS_AREA_SIZE (0x2000) /* 8 KB */ + +/* OTP_definitions */ +#define FLASH_OTP_NV_COUNTERS_AREA_OFFSET (FLASH_ITS_AREA_OFFSET + \ + FLASH_ITS_AREA_SIZE) +#define FLASH_OTP_NV_COUNTERS_AREA_SIZE (FLASH_AREA_IMAGE_SECTOR_SIZE * 2) +#define FLASH_OTP_NV_COUNTERS_SECTOR_SIZE FLASH_AREA_IMAGE_SECTOR_SIZE + +/* Non-secure storage region */ +#define NRF_FLASH_NS_STORAGE_AREA_OFFSET (FLASH_TOTAL_SIZE - \ + NRF_FLASH_NS_STORAGE_AREA_SIZE) +#define NRF_FLASH_NS_STORAGE_AREA_SIZE (0x8000) /* 32 KB */ + +/* Offset and size definition in flash area used by assemble.py */ +#define SECURE_IMAGE_OFFSET (0x0) +#define SECURE_IMAGE_MAX_SIZE FLASH_S_PARTITION_SIZE + +#define NON_SECURE_IMAGE_OFFSET (SECURE_IMAGE_OFFSET + \ + SECURE_IMAGE_MAX_SIZE) +#define NON_SECURE_IMAGE_MAX_SIZE FLASH_NS_PARTITION_SIZE + +/* Flash device name used by BL2 + * Name is defined in flash driver file: Driver_Flash.c + */ +#define FLASH_DEV_NAME Driver_FLASH0 +/* Smallest flash programmable unit in bytes */ +#define TFM_HAL_FLASH_PROGRAM_UNIT (0x4) + +/* Protected Storage (PS) Service definitions + * Note: Further documentation of these definitions can be found in the + * TF-M PS Integration Guide. + */ +#define TFM_HAL_PS_FLASH_DRIVER Driver_FLASH0 + +/* In this target the CMSIS driver requires only the offset from the base + * address instead of the full memory address. + */ +/* Base address of dedicated flash area for PS */ +#define TFM_HAL_PS_FLASH_AREA_ADDR FLASH_PS_AREA_OFFSET +/* Size of dedicated flash area for PS */ +#define TFM_HAL_PS_FLASH_AREA_SIZE FLASH_PS_AREA_SIZE +#define PS_RAM_FS_SIZE TFM_HAL_PS_FLASH_AREA_SIZE +/* Number of physical erase sectors per logical FS block */ +#define TFM_HAL_PS_SECTORS_PER_BLOCK (1) +/* Smallest flash programmable unit in bytes */ +#define TFM_HAL_PS_PROGRAM_UNIT (0x4) + +/* Internal Trusted Storage (ITS) Service definitions + * Note: Further documentation of these definitions can be found in the + * TF-M ITS Integration Guide. The ITS should be in the internal flash, but is + * allocated in the external flash just for development platforms that don't + * have internal flash available. + */ +#define TFM_HAL_ITS_FLASH_DRIVER Driver_FLASH0 + +/* In this target the CMSIS driver requires only the offset from the base + * address instead of the full memory address. + */ +/* Base address of dedicated flash area for ITS */ +#define TFM_HAL_ITS_FLASH_AREA_ADDR FLASH_ITS_AREA_OFFSET +/* Size of dedicated flash area for ITS */ +#define TFM_HAL_ITS_FLASH_AREA_SIZE FLASH_ITS_AREA_SIZE +#define ITS_RAM_FS_SIZE TFM_HAL_ITS_FLASH_AREA_SIZE +/* Number of physical erase sectors per logical FS block */ +#define TFM_HAL_ITS_SECTORS_PER_BLOCK (1) +/* Smallest flash programmable unit in bytes */ +#define TFM_HAL_ITS_PROGRAM_UNIT (0x4) + +/* OTP / NV counter definitions */ +#define TFM_OTP_NV_COUNTERS_AREA_SIZE (FLASH_OTP_NV_COUNTERS_AREA_SIZE / 2) +#define TFM_OTP_NV_COUNTERS_AREA_ADDR FLASH_OTP_NV_COUNTERS_AREA_OFFSET +#define TFM_OTP_NV_COUNTERS_SECTOR_SIZE FLASH_OTP_NV_COUNTERS_SECTOR_SIZE +#define TFM_OTP_NV_COUNTERS_BACKUP_AREA_ADDR (TFM_OTP_NV_COUNTERS_AREA_ADDR + \ + TFM_OTP_NV_COUNTERS_AREA_SIZE) + +/* Use Flash memory to store Code data */ +#define FLASH_BASE_ADDRESS (0x00000000) +#define S_ROM_ALIAS_BASE FLASH_BASE_ADDRESS +#define NS_ROM_ALIAS_BASE FLASH_BASE_ADDRESS + +/* Use SRAM memory to store RW data */ +#define SRAM_BASE_ADDRESS (0x20000000) +#define S_RAM_ALIAS_BASE SRAM_BASE_ADDRESS +#define NS_RAM_ALIAS_BASE SRAM_BASE_ADDRESS + +#define TOTAL_ROM_SIZE FLASH_TOTAL_SIZE +#define TOTAL_RAM_SIZE (0x00040000) /* 256 kB */ + +#endif /* __FLASH_LAYOUT_H__ */ diff --git a/nrfdemo/builddk/tfm/api_ns/platform/common/nrf91/partition/region_defs.h b/nrfdemo/builddk/tfm/api_ns/platform/common/nrf91/partition/region_defs.h new file mode 100644 index 0000000..4a4ad59 --- /dev/null +++ b/nrfdemo/builddk/tfm/api_ns/platform/common/nrf91/partition/region_defs.h @@ -0,0 +1,230 @@ +/* + * Copyright (c) 2017-2022 Arm Limited. All rights reserved. + * Copyright (c) 2020 Nordic Semiconductor ASA. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef __REGION_DEFS_H__ +#define __REGION_DEFS_H__ + +#include "flash_layout.h" + +#define BL2_HEAP_SIZE (0x00001000) +#define BL2_MSP_STACK_SIZE (0x00001800) + +#ifdef ENABLE_HEAP + #define S_HEAP_SIZE (0x0000200) +#endif + +#define S_MSP_STACK_SIZE (0x00000800) +#define S_PSP_STACK_SIZE (0x00000800) + +#define NS_HEAP_SIZE (0x00001000) +#define NS_STACK_SIZE (0x000001E0) + +/* Size of nRF SPU (Nordic IDAU) regions */ +#define SPU_FLASH_REGION_SIZE (0x00008000) +#define SPU_SRAM_REGION_SIZE (0x00002000) + +/* + * SPU flash region granularity is 32 KB on nRF91. Alignment + * of partitions is defined in accordance with this constraint. + */ +#ifdef NRF_NS_SECONDARY +#ifndef LINK_TO_SECONDARY_PARTITION +#define S_IMAGE_PRIMARY_PARTITION_OFFSET (FLASH_AREA_0_OFFSET) +#define S_IMAGE_SECONDARY_PARTITION_OFFSET (FLASH_AREA_2_OFFSET) +#else +#define S_IMAGE_PRIMARY_PARTITION_OFFSET (FLASH_AREA_2_OFFSET) +#define S_IMAGE_SECONDARY_PARTITION_OFFSET (FLASH_AREA_0_OFFSET) +#endif /* !LINK_TO_SECONDARY_PARTITION */ +#else +#define S_IMAGE_PRIMARY_PARTITION_OFFSET (0x0) +#endif /* NRF_NS_SECONDARY */ + +#ifndef LINK_TO_SECONDARY_PARTITION +#define NS_IMAGE_PRIMARY_PARTITION_OFFSET (FLASH_AREA_0_OFFSET \ + + FLASH_S_PARTITION_SIZE) +#else +#define NS_IMAGE_PRIMARY_PARTITION_OFFSET (FLASH_AREA_2_OFFSET \ + + FLASH_S_PARTITION_SIZE) +#endif /* !LINK_TO_SECONDARY_PARTITION */ + +/* Boot partition structure if MCUBoot is used: + * 0x0_0000 Bootloader header + * 0x0_0400 Image area + * 0x0_FC00 Trailer + */ +/* IMAGE_CODE_SIZE is the space available for the software binary image. + * It is less than the FLASH_S_PARTITION_SIZE + FLASH_NS_PARTITION_SIZE + * because we reserve space for the image header and trailer introduced + * by the bootloader. + */ + +#if (!defined(MCUBOOT_IMAGE_NUMBER) || (MCUBOOT_IMAGE_NUMBER == 1)) && \ + (NS_IMAGE_PRIMARY_PARTITION_OFFSET > S_IMAGE_PRIMARY_PARTITION_OFFSET) +/* If secure image and nonsecure image are concatenated, and nonsecure image + * locates at the higher memory range, then the secure image does not need + * the trailer area. + */ +#define IMAGE_S_CODE_SIZE \ + (FLASH_S_PARTITION_SIZE - BL2_HEADER_SIZE) +#else +#define IMAGE_S_CODE_SIZE \ + (FLASH_S_PARTITION_SIZE - BL2_HEADER_SIZE - BL2_TRAILER_SIZE) +#endif + +#define IMAGE_NS_CODE_SIZE \ + (FLASH_NS_PARTITION_SIZE - BL2_HEADER_SIZE - BL2_TRAILER_SIZE) + +/* Alias definitions for secure and non-secure areas*/ +#define S_ROM_ALIAS(x) (S_ROM_ALIAS_BASE + (x)) +#define NS_ROM_ALIAS(x) (NS_ROM_ALIAS_BASE + (x)) + +#define S_RAM_ALIAS(x) (S_RAM_ALIAS_BASE + (x)) +#define NS_RAM_ALIAS(x) (NS_RAM_ALIAS_BASE + (x)) + +/* Secure regions */ +#define S_IMAGE_PRIMARY_AREA_OFFSET \ + (S_IMAGE_PRIMARY_PARTITION_OFFSET + BL2_HEADER_SIZE) +#define S_CODE_START (S_ROM_ALIAS(S_IMAGE_PRIMARY_AREA_OFFSET)) +#define S_CODE_SIZE (IMAGE_S_CODE_SIZE) +#define S_CODE_LIMIT (S_CODE_START + S_CODE_SIZE - 1) + +#define S_DATA_START (S_RAM_ALIAS(0x0)) +/* Assign to SPE the minimum amount of RAM (aligned to the SPU region boundary) + * that is needed for the most demanding configuration, which turns out to be + * the RegressionIPC one. */ +#define S_DATA_SIZE 0x16000 /* 88 KB */ +#define S_DATA_LIMIT (S_DATA_START + S_DATA_SIZE - 1) + +#define S_CODE_VECTOR_TABLE_SIZE (0x144) + +#if defined(NULL_POINTER_EXCEPTION_DETECTION) && S_CODE_START == 0 +/* If this image is placed at the beginning of flash make sure we + * don't put any code in the first 256 bytes of flash as that area + * is used for null-pointer dereference detection. + */ +#define TFM_LINKER_CODE_START_RESERVED (256) +#if S_CODE_VECTOR_TABLE_SIZE < TFM_LINKER_CODE_START_RESERVED +#error "The interrupt table is too short too for null pointer detection" +#endif +#endif + +/* The veneers needs to be placed at the end of the secure image. + * This is because the NCS sub-region is defined as starting at the highest + * address of an SPU region and going downwards. + */ +#define TFM_LINKER_VENEERS_LOCATION_END +/* The CMSE veneers shall be placed in an NSC region + * which will be placed in a secure SPU region with the given alignment. + */ +#define TFM_LINKER_VENEERS_SIZE (0x400) +/* The Nordic SPU has different alignment requirements than the ARM SAU, so + * these override the default start and end alignments. */ +#define TFM_LINKER_VENEERS_START \ + (ALIGN(SPU_FLASH_REGION_SIZE) - TFM_LINKER_VENEERS_SIZE + \ + (. > (ALIGN(SPU_FLASH_REGION_SIZE) - TFM_LINKER_VENEERS_SIZE) \ + ? SPU_FLASH_REGION_SIZE : 0)) + +#define TFM_LINKER_VENEERS_END ALIGN(SPU_FLASH_REGION_SIZE) + +/* Non-secure regions */ +#define NS_IMAGE_PRIMARY_AREA_OFFSET \ + (NS_IMAGE_PRIMARY_PARTITION_OFFSET + BL2_HEADER_SIZE) +#define NS_CODE_START (NS_ROM_ALIAS(NS_IMAGE_PRIMARY_AREA_OFFSET)) +#define NS_CODE_SIZE (IMAGE_NS_CODE_SIZE) +#define NS_CODE_LIMIT (NS_CODE_START + NS_CODE_SIZE - 1) + +#define NS_DATA_START (NS_RAM_ALIAS(S_DATA_SIZE)) +#ifdef PSA_API_TEST_IPC +/* Last SRAM region must be kept secure for PSA FF tests */ +#define NS_DATA_SIZE (TOTAL_RAM_SIZE - S_DATA_SIZE - SPU_SRAM_REGION_SIZE) +#else +#define NS_DATA_SIZE (TOTAL_RAM_SIZE - S_DATA_SIZE) +#endif +#define NS_DATA_LIMIT (NS_DATA_START + NS_DATA_SIZE - 1) + +/* NS partition information is used for SPU configuration */ +#define NS_PARTITION_START \ + (NS_ROM_ALIAS(NS_IMAGE_PRIMARY_PARTITION_OFFSET)) +#define NS_PARTITION_SIZE (FLASH_NS_PARTITION_SIZE) + +/* Secondary partition for new images in case of firmware upgrade */ +#define SECONDARY_PARTITION_START \ + (NS_ROM_ALIAS(S_IMAGE_SECONDARY_PARTITION_OFFSET)) +#define SECONDARY_PARTITION_SIZE (FLASH_S_PARTITION_SIZE + \ + FLASH_NS_PARTITION_SIZE) + +/* Non-secure storage region */ +#ifdef NRF_NS_STORAGE +#define NRF_NS_STORAGE_PARTITION_START \ + (NS_ROM_ALIAS(NRF_FLASH_NS_STORAGE_AREA_OFFSET)) +#define NRF_NS_STORAGE_PARTITION_SIZE (NRF_FLASH_NS_STORAGE_AREA_SIZE) +#endif /* NRF_NS_STORAGE */ + +#ifdef BL2 +/* Bootloader regions */ +#define BL2_CODE_START (S_ROM_ALIAS(FLASH_AREA_BL2_OFFSET)) +#define BL2_CODE_SIZE (FLASH_AREA_BL2_SIZE) +#define BL2_CODE_LIMIT (BL2_CODE_START + BL2_CODE_SIZE - 1) + +#define BL2_DATA_START (S_RAM_ALIAS(0x0)) +#define BL2_DATA_SIZE (TOTAL_RAM_SIZE) +#define BL2_DATA_LIMIT (BL2_DATA_START + BL2_DATA_SIZE - 1) +#endif /* BL2 */ + +/* Shared data area between bootloader and runtime firmware. + * Shared data area is allocated at the beginning of the RAM, it is overlapping + * with TF-M Secure code's MSP stack + */ +#define BOOT_TFM_SHARED_DATA_BASE S_RAM_ALIAS_BASE +#define BOOT_TFM_SHARED_DATA_SIZE (0x400) +#define BOOT_TFM_SHARED_DATA_LIMIT (BOOT_TFM_SHARED_DATA_BASE + \ + BOOT_TFM_SHARED_DATA_SIZE - 1) + +/* Regions used by psa-arch-tests to keep state */ +#define PSA_TEST_SCRATCH_AREA_SIZE (0x400) + +#ifdef PSA_API_TEST_IPC +/* Firmware Framework test suites */ +#define FF_TEST_PARTITION_SIZE 0x100 +#define PSA_TEST_SCRATCH_AREA_BASE (NS_DATA_LIMIT + 1 - \ + PSA_TEST_SCRATCH_AREA_SIZE - \ + FF_TEST_PARTITION_SIZE) + +/* The psa-arch-tests implementation requires that the test partitions are + * placed in this specific order: + * TEST_NSPE_MMIO < TEST_SERVER < TEST_DRIVER + * + * TEST_NSPE_MMIO region must be in the NSPE, while TEST_SERVER and TEST_DRIVER + * must be in SPE. + * + * The TEST_NSPE_MMIO region is defined in the psa-arch-tests implementation, + * and it should be placed at the end of the NSPE area, after + * PSA_TEST_SCRATCH_AREA. + */ +#define FF_TEST_SERVER_PARTITION_MMIO_START (NS_DATA_LIMIT + 1) +#define FF_TEST_SERVER_PARTITION_MMIO_END (FF_TEST_SERVER_PARTITION_MMIO_START + \ + FF_TEST_PARTITION_SIZE - 1) +#define FF_TEST_DRIVER_PARTITION_MMIO_START (FF_TEST_SERVER_PARTITION_MMIO_END + 1) +#define FF_TEST_DRIVER_PARTITION_MMIO_END (FF_TEST_DRIVER_PARTITION_MMIO_START + \ + FF_TEST_PARTITION_SIZE - 1) +#else +/* Development APIs test suites */ +#define PSA_TEST_SCRATCH_AREA_BASE (NS_DATA_LIMIT + 1 - \ + PSA_TEST_SCRATCH_AREA_SIZE) +#endif /* PSA_API_TEST_IPC */ + +#endif /* __REGION_DEFS_H__ */ diff --git a/nrfdemo/builddk/tfm/api_ns/platform/common/nrf91/tests/psa_arch_tests_config.cmake b/nrfdemo/builddk/tfm/api_ns/platform/common/nrf91/tests/psa_arch_tests_config.cmake new file mode 100644 index 0000000..5320c4c --- /dev/null +++ b/nrfdemo/builddk/tfm/api_ns/platform/common/nrf91/tests/psa_arch_tests_config.cmake @@ -0,0 +1,10 @@ +#------------------------------------------------------------------------------- +# Copyright (c) 2023, Arm Limited. All rights reserved. +# +# SPDX-License-Identifier: BSD-3-Clause +# +#------------------------------------------------------------------------------- + +# Platform-specific configurations +# Use nrf9160 until test target name in PSA arch test repository has been updated to nrf91 +set(PSA_API_TEST_TARGET "nrf9160") |